/*******************************************************************************
* Copyright (C) Marvell International Ltd. and its affiliates
*
* Marvell GPL License Option
*
* If you received this File from Marvell, you may opt to use, redistribute and/or
* modify this File in accordance with the terms and conditions of the General
* Public License Version 2, June 1991 (the "GPL License"), a copy of which is
* available along with the File in the license.txt file or by writing to the Free
* Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
* on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
*
* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
* WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
* DISCLAIMED.  The GPL License provides additional details about this warranty
* disclaimer.
********************************************************************************/

#ifndef _VPP_FE_DLR_H_
#define _VPP_FE_DLR_H_

#include "thinvpp_api.h"
#include "thinvpp_module.h"

/**********************************************************************
*Data structure definitions for FE DLR  block driver                                                 *
***********************************************************************/

#define PIXEL_PER_BEAT_YUV_422   4
#define PIXEL_PER_BEAT_ARGB_8888 2
#define PIXEL_PER_BEAT_LUT8      8

/*Enum for CSC mode*/
typedef enum VPP_FE_DLR_CSC_MODES
{
    VPP_FE_DLR_CSC_BYPASS_MODE = 0,
    VPP_FE_DLR_CSC_601_TO_709,
    VPP_FE_DLR_CSC_709_TO_601,
    VPP_FE_DLR_CSC_RGB_TO_YUV_709,
    VPP_FE_DLR_CSC_YUV_709_TO_RGB,
    VPP_FE_DLR_CSC_RGB_TO_YUV_601,
    VPP_FE_DLR_CSC_YUV_601_TO_RGB,
    VPP_FE_DLR_CSC_sRGB_TO_YUV_709,
    VPP_FE_DLR_CSC_YUV_709_TO_sRGB,
    VPP_FE_DLR_CSC_sRGB_TO_YUV_601,
    VPP_FE_DLR_CSC_YUV_601_TO_sRGB,
    VPP_FE_DLR_CSC_MAX_MODES
} VPP_FE_DLR_CSC_MODES;

/*Enum for dataloader in-line channel*/
typedef enum VPP_FE_DLR_CHANNEL
{
    VPP_FE_DLR_CHANNEL_BG = 0,
    VPP_FE_DLR_CHANNEL_MAIN,
    VPP_FE_DLR_CHANNEL_PIP,
    VPP_FE_DLR_CHANNEL_PG,
    VPP_FE_DLR_CHANNEL_IG,
    VPP_FE_DLR_CHANNEL_CURSOR,
    VPP_FE_DLR_CHANNEL_MOSD,
    VPP_FE_DLR_CHANNEL_OFFLINE, //used in loading defult value for BG and off-line scaling data loader
    VPP_FE_DLR_CHANNEL_MAX = VPP_FE_DLR_CHANNEL_OFFLINE

}VPP_FE_DLR_CHANNEL;

/*Enum for dataloader off-line channel*/
typedef enum VPP_FE_DLR_OFFLINE_CHANNEL
{
    VPP_FE_DLR_OFFLINE_MAIN_W = 0,
    VPP_FE_DLR_OFFLINE_MAIN_R,
    VPP_FE_DLR_OFFLINE_PIP_W,
    VPP_FE_DLR_OFFLINE_PIP_R,
    VPP_FE_DLR_OFFLINE_AUX_W,
    VPP_FE_DLR_OFFLINE_AUX_R,
    VPP_FE_DLR_SEL_MAX

}VPP_FE_DLR_OFFLINE_CHANNEL;

/*input data format*/
typedef enum VPP_FE_DLR_FMT_SRC_FMT
{
    VPP_FE_DLR_SRC_FMT_YUV422 = 0,
    VPP_FE_DLR_SRC_FMT_ARGB32 = 0,
    VPP_FE_DLR_SRC_FMT_ARGB24,
    VPP_FE_DLR_SRC_FMT_ARGB4444,
    VPP_FE_DLR_SRC_FMT_RGB565,
    VPP_FE_DLR_SRC_FMT_ARGB1555,
    VPP_FE_DLR_SRC_FMT_LUT8,
    VPP_FE_DLR_SRC_FMT_MAX

}VPP_FE_DLR_FMT_SRC_FMT;

/*input data components order in OSD or PG graphic planes. In B0, for graphic planes*/
typedef enum VPP_FE_DLR_FMT_ORDER_OSD_PG
{
    VPP_FE_DLR_ORDER_OSD_PG_ARGB = 0,
    VPP_FE_DLR_ORDER_OSD_PG_ABGR,
    VPP_FE_DLR_ORDER_OSD_PG_RGBA,
    VPP_FE_DLR_ORDER_OSD_PG_BGRA,
    VPP_FE_DLR_ORDER_OSD_PG_MAX

}VPP_FE_DLR_FMT_ORDER_OSD_PG;

/*input data components order in PG graphic plane. In B0, for graphic planes*/
typedef enum VPP_FE_DLR_FMT_ORDER_PG
{
    VPP_FE_DLR_ORDER_PG_AVYU = 0,
    VPP_FE_DLR_ORDER_PG_AUYV,
    VPP_FE_DLR_ORDER_PG_VYUA,
    VPP_FE_DLR_ORDER_PG_UYVA,
    VPP_FE_DLR_ORDER_PG_MAX

}VPP_FE_DLR_FMT_ORDER_PG;

/*input data components order in video or PIP planes. In B0, for video planes*/
typedef enum VPP_FE_DLR_FMT_ORDER_VIDEO
{
    VPP_FE_DLR_ORDER_VIDEO_AVYU = 0,
    VPP_FE_DLR_ORDER_VIDEO_AUYV,
    VPP_FE_DLR_ORDER_VIDEO_VYUA,
    VPP_FE_DLR_ORDER_VIDEO_UYVA,
    VPP_FE_DLR_ORDER_VIDEO_MAX

}VPP_FE_DLR_FMT_ORDER_VIDEO;

/*input data format for main video*/
typedef enum VPP_FE_DLR_MAIN_INPUT_FMT
{
    VPP_FE_DLR_MAIN_INTERLACED = 0,
    VPP_FE_DLR_MAIN_PROGRESSIVE

}VPP_FE_DLR_MAIN_INPUT_FMT;

/*data loader input resolution*/
typedef struct VPP_FE_DLR_INPUT_RES_T
{
    unsigned int HRes;
    unsigned int VRes;

}VPP_FE_DLR_INPUT_RES, *PVPP_FE_DLR_INPUT_RES;

/*data loader plane start location*/
typedef struct VPP_FE_DLR_PLANE_START_LOC_T
{
    unsigned int HLoc;
    unsigned int VLoc;

}VPP_FE_DLR_PLANE_START_LOC, *PVPP_FE_DLR_PLANE_START_LOC;

/*data loader plane input format*/
typedef struct VPP_FE_DLR_PLANE_DATA_FMT_T
{
    unsigned char SrcFmt;
    unsigned char FmtOrder;

}VPP_FE_DLR_PLANE_DATA_FMT, *PVPP_FE_DLR_PLANE_DATA_FMT;

int FE_DLR_LoadDefaultVal(THINVPP_OBJ *vpp_obj, int Channel);
int FE_DLR_ClearChannel(THINVPP_OBJ *vpp_obj, int Channel);
int FE_DLR_ClearOffLineChannel(THINVPP_OBJ *vpp_obj, int Channel, int Clear);
int FE_DLR_SetPlaneSize(THINVPP_OBJ *vpp_obj, int Channel, PVPP_FE_DLR_INPUT_RES pPlaneSize, unsigned int CropWpl);
int FE_DLR_SetPlaneDataFmt(THINVPP_OBJ *vpp_obj, int Channel, PVPP_FE_DLR_PLANE_DATA_FMT pDataFmt);
int FE_DLR_EnableChannel(THINVPP_OBJ *vpp_obj, int Channel, int Enable);
int FE_DLR_EnableOffLineChannel(THINVPP_OBJ *vpp_obj, int Channel, int Enable);
int FE_DLR_SetOffLineChannel(THINVPP_OBJ *vpp_obj, int Channel, PVPP_FE_DLR_INPUT_RES pRes);
int FE_DLR_SetDummyTG(THINVPP_OBJ *vpp_obj, PVPP_FE_DLR_INPUT_RES pTotRes, int progressive, int sensio);

int FE_DLR_SetVPDMX(THINVPP_OBJ *vpp_obj, PVPP_FE_DLR_INPUT_RES pTotRes, int progressive, int sensio);
#endif