/********************************************************************************
 * Marvell GPL License Option
 *
 * If you received this File from Marvell, you may opt to use, redistribute and/or
 * modify this File in accordance with the terms and conditions of the General
 * Public License Version 2, June 1991 (the "GPL License"), a copy of which is
 * available along with the File in the license.txt file or by writing to the Free
 * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
 * on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
 * DISCLAIMED.  The GPL License provides additional details about this warranty
 * disclaimer.
 ******************************************************************************/

//////
/// don't edit! auto-generated by docc: sema.h
////////////////////////////////////////////////////////////
#ifndef sema_h
#define sema_h (){}


#include "ctypes.h"

#pragma pack(1)
#ifdef __cplusplus
  extern "C" {
#endif

#ifndef _DOCC_H_BITOPS_
#define _DOCC_H_BITOPS_ (){}

    #define _bSETMASK_(b)                                      ((b)<32 ? (1<<((b)&31)) : 0)
    #define _NSETMASK_(msb,lsb)                                (_bSETMASK_((msb)+1)-_bSETMASK_(lsb))
    #define _bCLRMASK_(b)                                      (~_bSETMASK_(b))
    #define _NCLRMASK_(msb,lsb)                                (~_NSETMASK_(msb,lsb))
    #define _BFGET_(r,msb,lsb)                                 (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb)))
    #define _BFSET_(r,msb,lsb,v)                               do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0)

#endif


//////
/// 
/// $INTERFACE SemaCell                                 (4,4)
///     ###
///     * Register specification of interface semacounter
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 LVL                  (R-)
///               %unsigned 16 consumer                  0x0
///               %unsigned 16 producer                  0x0
///                                    ###
///                                    * Read access the level of consumer and producer counter.
///                                    ###
///     @ 0x00004 THRESH               (P)
///               %unsigned 16 max                       0xF
///                                    ###
///                                    * Defines the max value for level.
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      48b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaCell
#define h_SemaCell (){}

    #define     RA_SemaCell_LVL                                0x0000

    #define     BA_SemaCell_LVL_consumer                       0x0000
    #define     B16SemaCell_LVL_consumer                       0x0000
    #define   LSb32SemaCell_LVL_consumer                          0
    #define   LSb16SemaCell_LVL_consumer                          0
    #define       bSemaCell_LVL_consumer                       16
    #define   MSK32SemaCell_LVL_consumer                          0x0000FFFF

    #define     BA_SemaCell_LVL_producer                       0x0002
    #define     B16SemaCell_LVL_producer                       0x0002
    #define   LSb32SemaCell_LVL_producer                          16
    #define   LSb16SemaCell_LVL_producer                          0
    #define       bSemaCell_LVL_producer                       16
    #define   MSK32SemaCell_LVL_producer                          0xFFFF0000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaCell_THRESH                             0x0004

    #define     BA_SemaCell_THRESH_max                         0x0004
    #define     B16SemaCell_THRESH_max                         0x0004
    #define   LSb32SemaCell_THRESH_max                            0
    #define   LSb16SemaCell_THRESH_max                            0
    #define       bSemaCell_THRESH_max                         16
    #define   MSK32SemaCell_THRESH_max                            0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaCell {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaCell_LVL_consumer(r32)                  _BFGET_(r32,15, 0)
    #define   SET32SemaCell_LVL_consumer(r32,v)                _BFSET_(r32,15, 0,v)
    #define   GET16SemaCell_LVL_consumer(r16)                  _BFGET_(r16,15, 0)
    #define   SET16SemaCell_LVL_consumer(r16,v)                _BFSET_(r16,15, 0,v)

    #define   GET32SemaCell_LVL_producer(r32)                  _BFGET_(r32,31,16)
    #define   SET32SemaCell_LVL_producer(r32,v)                _BFSET_(r32,31,16,v)
    #define   GET16SemaCell_LVL_producer(r16)                  _BFGET_(r16,15, 0)
    #define   SET16SemaCell_LVL_producer(r16,v)                _BFSET_(r16,15, 0,v)

    #define     w32SemaCell_LVL                                {\
            UNSG32 uLVL_consumer                               : 16;\
            UNSG32 uLVL_producer                               : 16;\
          }
    union { UNSG32 u32SemaCell_LVL;
            struct w32SemaCell_LVL;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaCell_THRESH_max(r32)                    _BFGET_(r32,15, 0)
    #define   SET32SemaCell_THRESH_max(r32,v)                  _BFSET_(r32,15, 0,v)
    #define   GET16SemaCell_THRESH_max(r16)                    _BFGET_(r16,15, 0)
    #define   SET16SemaCell_THRESH_max(r16,v)                  _BFSET_(r16,15, 0,v)

    #define     w32SemaCell_THRESH                             {\
            UNSG32 uTHRESH_max                                 : 16;\
            UNSG32 RSVDx4_b16                                  : 16;\
          }
    union { UNSG32 u32SemaCell_THRESH;
            struct w32SemaCell_THRESH;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaCell;

    typedef union  T32SemaCell_LVL
          { UNSG32 u32;
            struct w32SemaCell_LVL;
                 } T32SemaCell_LVL;
    typedef union  T32SemaCell_THRESH
          { UNSG32 u32;
            struct w32SemaCell_THRESH;
                 } T32SemaCell_THRESH;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaCell_LVL
          { UNSG32 u32[1];
            struct {
            struct w32SemaCell_LVL;
                   };
                 } TSemaCell_LVL;
    typedef union  TSemaCell_THRESH
          { UNSG32 u32[1];
            struct {
            struct w32SemaCell_THRESH;
                   };
                 } TSemaCell_THRESH;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaCell_drvrd(SIE_SemaCell *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaCell_drvwr(SIE_SemaCell *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaCell_reset(SIE_SemaCell *p);
     SIGN32 SemaCell_cmp  (SIE_SemaCell *p, SIE_SemaCell *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaCell_check(p,pie,pfx,hLOG) SemaCell_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaCell_print(p,    pfx,hLOG) SemaCell_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaCell
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaReq                                  (4,4)
///     ###
///     * Register specification of interface semaphore response
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 RESP                 (R-)
///               %unsigned 1  success                   
///                                    ###
///                                    * 1 as success
///                                    ###
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       1b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaReq
#define h_SemaReq (){}

    #define     RA_SemaReq_RESP                                0x0000

    #define     BA_SemaReq_RESP_success                        0x0000
    #define     B16SemaReq_RESP_success                        0x0000
    #define   LSb32SemaReq_RESP_success                           0
    #define   LSb16SemaReq_RESP_success                           0
    #define       bSemaReq_RESP_success                        1
    #define   MSK32SemaReq_RESP_success                           0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaReq {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaReq_RESP_success(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32SemaReq_RESP_success(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16SemaReq_RESP_success(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16SemaReq_RESP_success(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32SemaReq_RESP                                {\
            UNSG32 uRESP_success                               :  1;\
            UNSG32 RSVDx0_b1                                   : 31;\
          }
    union { UNSG32 u32SemaReq_RESP;
            struct w32SemaReq_RESP;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaReq;

    typedef union  T32SemaReq_RESP
          { UNSG32 u32;
            struct w32SemaReq_RESP;
                 } T32SemaReq_RESP;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaReq_RESP
          { UNSG32 u32[1];
            struct {
            struct w32SemaReq_RESP;
                   };
                 } TSemaReq_RESP;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaReq_drvrd(SIE_SemaReq *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaReq_drvwr(SIE_SemaReq *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaReq_reset(SIE_SemaReq *p);
     SIGN32 SemaReq_cmp  (SIE_SemaReq *p, SIE_SemaReq *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaReq_check(p,pie,pfx,hLOG) SemaReq_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaReq_print(p,    pfx,hLOG) SemaReq_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaReq
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaRespMap                              (4,4)
///     ###
///     * Register specification of interface semaphore response array
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 entry                
///               $SemaReq             entry             REG    [1024]
///                                    ###
///                                    * 16b access addres: see below
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    4096B, bits:    1024b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaRespMap
#define h_SemaRespMap (){}

    #define     RA_SemaRespMap_entry                           0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaRespMap {
    ///////////////////////////////////////////////////////////
              SIE_SemaReq                                      ie_entry[1024];
    ///////////////////////////////////////////////////////////
    } SIE_SemaRespMap;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaRespMap_drvrd(SIE_SemaRespMap *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaRespMap_drvwr(SIE_SemaRespMap *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaRespMap_reset(SIE_SemaRespMap *p);
     SIGN32 SemaRespMap_cmp  (SIE_SemaRespMap *p, SIE_SemaRespMap *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaRespMap_check(p,pie,pfx,hLOG) SemaRespMap_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaRespMap_print(p,    pfx,hLOG) SemaRespMap_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaRespMap
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaMap                                  (4,4)
///     ###
///     * Register specification of interface semaphore response array
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 ADDR                 (P)
///               %unsigned 2  byte                      
///               %unsigned 8  ID                        
///               %unsigned 1  op                        
///                                    : chk                       0x0
///                                    : update                    0x1
///               %unsigned 1  master                    
///                                    : producer                  0x0
///                                    : consumer                  0x1
///                                                 ###
///                                                 * 10b address map for SemaRespMap
///                                                 ###
///               %%        20         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      12b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaMap
#define h_SemaMap (){}

    #define     RA_SemaMap_ADDR                                0x0000

    #define     BA_SemaMap_ADDR_byte                           0x0000
    #define     B16SemaMap_ADDR_byte                           0x0000
    #define   LSb32SemaMap_ADDR_byte                              0
    #define   LSb16SemaMap_ADDR_byte                              0
    #define       bSemaMap_ADDR_byte                           2
    #define   MSK32SemaMap_ADDR_byte                              0x00000003

    #define     BA_SemaMap_ADDR_ID                             0x0000
    #define     B16SemaMap_ADDR_ID                             0x0000
    #define   LSb32SemaMap_ADDR_ID                                2
    #define   LSb16SemaMap_ADDR_ID                                2
    #define       bSemaMap_ADDR_ID                             8
    #define   MSK32SemaMap_ADDR_ID                                0x000003FC

    #define     BA_SemaMap_ADDR_op                             0x0001
    #define     B16SemaMap_ADDR_op                             0x0000
    #define   LSb32SemaMap_ADDR_op                                10
    #define   LSb16SemaMap_ADDR_op                                10
    #define       bSemaMap_ADDR_op                             1
    #define   MSK32SemaMap_ADDR_op                                0x00000400
    #define        SemaMap_ADDR_op_chk                                      0x0
    #define        SemaMap_ADDR_op_update                                   0x1

    #define     BA_SemaMap_ADDR_master                         0x0001
    #define     B16SemaMap_ADDR_master                         0x0000
    #define   LSb32SemaMap_ADDR_master                            11
    #define   LSb16SemaMap_ADDR_master                            11
    #define       bSemaMap_ADDR_master                         1
    #define   MSK32SemaMap_ADDR_master                            0x00000800
    #define        SemaMap_ADDR_master_producer                             0x0
    #define        SemaMap_ADDR_master_consumer                             0x1
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaMap {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaMap_ADDR_byte(r32)                      _BFGET_(r32, 1, 0)
    #define   SET32SemaMap_ADDR_byte(r32,v)                    _BFSET_(r32, 1, 0,v)
    #define   GET16SemaMap_ADDR_byte(r16)                      _BFGET_(r16, 1, 0)
    #define   SET16SemaMap_ADDR_byte(r16,v)                    _BFSET_(r16, 1, 0,v)

    #define   GET32SemaMap_ADDR_ID(r32)                        _BFGET_(r32, 9, 2)
    #define   SET32SemaMap_ADDR_ID(r32,v)                      _BFSET_(r32, 9, 2,v)
    #define   GET16SemaMap_ADDR_ID(r16)                        _BFGET_(r16, 9, 2)
    #define   SET16SemaMap_ADDR_ID(r16,v)                      _BFSET_(r16, 9, 2,v)

    #define   GET32SemaMap_ADDR_op(r32)                        _BFGET_(r32,10,10)
    #define   SET32SemaMap_ADDR_op(r32,v)                      _BFSET_(r32,10,10,v)
    #define   GET16SemaMap_ADDR_op(r16)                        _BFGET_(r16,10,10)
    #define   SET16SemaMap_ADDR_op(r16,v)                      _BFSET_(r16,10,10,v)

    #define   GET32SemaMap_ADDR_master(r32)                    _BFGET_(r32,11,11)
    #define   SET32SemaMap_ADDR_master(r32,v)                  _BFSET_(r32,11,11,v)
    #define   GET16SemaMap_ADDR_master(r16)                    _BFGET_(r16,11,11)
    #define   SET16SemaMap_ADDR_master(r16,v)                  _BFSET_(r16,11,11,v)

    #define     w32SemaMap_ADDR                                {\
            UNSG32 uADDR_byte                                  :  2;\
            UNSG32 uADDR_ID                                    :  8;\
            UNSG32 uADDR_op                                    :  1;\
            UNSG32 uADDR_master                                :  1;\
            UNSG32 RSVDx0_b12                                  : 20;\
          }
    union { UNSG32 u32SemaMap_ADDR;
            struct w32SemaMap_ADDR;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaMap;

    typedef union  T32SemaMap_ADDR
          { UNSG32 u32;
            struct w32SemaMap_ADDR;
                 } T32SemaMap_ADDR;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaMap_ADDR
          { UNSG32 u32[1];
            struct {
            struct w32SemaMap_ADDR;
                   };
                 } TSemaMap_ADDR;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaMap_drvrd(SIE_SemaMap *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaMap_drvwr(SIE_SemaMap *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaMap_reset(SIE_SemaMap *p);
     SIGN32 SemaMap_cmp  (SIE_SemaMap *p, SIE_SemaMap *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaMap_check(p,pie,pfx,hLOG) SemaMap_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaMap_print(p,    pfx,hLOG) SemaMap_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaMap
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SEMA                    biu              (4,4)
///     # # ----------------------------------------------------------
///               : NumSema            0x20
///                            ###
///                            * Number of semaphore cells
///                            ###
///     @ 0x00000 ARR                  (P)
///     # 0x00000 cell                 
///               $SemaCell            cell              REG      [24]
///                                    ###
///                                    * Semaphore array
///                                    ###
///     @ 0x000C0                      (W-)
///     #         # Stuffing bytes...
///               %% 512
///     @ 0x00100 OFST                 (WOC-)
///               %unsigned 24 arr                       0x0
///                                    ###
///                                    * Interrupt status for O/F
///                                    ###
///               %%        8          # Stuffing bits...
///     @ 0x00104 UFST                 (WOC-)
///               %unsigned 24 arr                       0xFFFFFF
///                                    ###
///                                    * Interrupt status for U/F
///                                    ###
///               %%        8          # Stuffing bits...
///     @ 0x00108 OFMSK                (P)
///               %unsigned 24 arr_0i                    0x0
///               %%        8          # Stuffing bits...
///     # 0x0010C OFMSK1               
///               %unsigned 24 arr_1i                    0x0
///               %%        8          # Stuffing bits...
///     # 0x00110 OFMSK2               
///               %unsigned 24 arr_2i                    0x0
///                                    ###
///                                    * Interrupt mask for O/F of 3 CPUs, 0 disable interrupt, 1 enable interrupt.
///                                    ###
///               %%        8          # Stuffing bits...
///     @ 0x00114 UFMSK                (P)
///               %unsigned 24 arr_0i                    0x0
///               %%        8          # Stuffing bits...
///     # 0x00118 UFMSK1               
///               %unsigned 24 arr_1i                    0x0
///               %%        8          # Stuffing bits...
///     # 0x0011C UFMSK2               
///               %unsigned 24 arr_2i                    0x0
///                                    ###
///                                    * Interrupt mask for U/F of 3 CPU, 0 disable interrupt, 1 enable interrupt.
///                                    ###
///               %%        8          # Stuffing bits...
///     @ 0x00120 XCPU                 (P)
///               %unsigned 32 mailbox_0i                
///     # 0x00124 XCPU1                
///               %unsigned 32 mailbox_1i                
///                                    ###
///                                    * Mailboxes for inter-CPU communication
///                                    ###
///     @ 0x00128 PUSH                 (P)
///               %unsigned 8  ID                        0x0
///               %unsigned 8  delta                     
///                                    ###
///                                    * CPU increase both producer & consumer counters of a semaphore by a delta number
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x0012C POP                  (P)
///               %unsigned 8  ID                        0x0
///               %unsigned 8  delta                     
///                                    ###
///                                    * CPU decrease both producer & consumer counters of a semaphore by a delta number
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00130                      (W-)
///     #         # Stuffing bytes...
///               %% 30336
///     @ 0x01000 REQ                  (R-)
///     # 0x01000 resp                 
///               $SemaRespMap         resp              MEM          
///                                    ###
///                                    * CPU interface to operate semaphores
///                                    * Read to this “memory-mapped” response table to trigger check/update semaphore & wait the operation done.
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    8192B, bits:    1472b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SEMA
#define h_SEMA (){}

    #define        SEMA_NumSema                                0x20
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_ARR                                    0x0000
    #define     RA_SEMA_cell                                   0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_OFST                                   0x0100

    #define     BA_SEMA_OFST_arr                               0x0100
    #define     B16SEMA_OFST_arr                               0x0100
    #define   LSb32SEMA_OFST_arr                                  0
    #define   LSb16SEMA_OFST_arr                                  0
    #define       bSEMA_OFST_arr                               24
    #define   MSK32SEMA_OFST_arr                                  0x00FFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_UFST                                   0x0104

    #define     BA_SEMA_UFST_arr                               0x0104
    #define     B16SEMA_UFST_arr                               0x0104
    #define   LSb32SEMA_UFST_arr                                  0
    #define   LSb16SEMA_UFST_arr                                  0
    #define       bSEMA_UFST_arr                               24
    #define   MSK32SEMA_UFST_arr                                  0x00FFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_OFMSK                                  0x0108

    #define     BA_SEMA_OFMSK_arr_0i                           0x0108
    #define     B16SEMA_OFMSK_arr_0i                           0x0108
    #define   LSb32SEMA_OFMSK_arr_0i                              0
    #define   LSb16SEMA_OFMSK_arr_0i                              0
    #define       bSEMA_OFMSK_arr_0i                           24
    #define   MSK32SEMA_OFMSK_arr_0i                              0x00FFFFFF

    #define     RA_SEMA_OFMSK1                                 0x010C

    #define     BA_SEMA_OFMSK_arr_1i                           0x010C
    #define     B16SEMA_OFMSK_arr_1i                           0x010C
    #define   LSb32SEMA_OFMSK_arr_1i                              0
    #define   LSb16SEMA_OFMSK_arr_1i                              0
    #define       bSEMA_OFMSK_arr_1i                           24
    #define   MSK32SEMA_OFMSK_arr_1i                              0x00FFFFFF

    #define     RA_SEMA_OFMSK2                                 0x0110

    #define     BA_SEMA_OFMSK_arr_2i                           0x0110
    #define     B16SEMA_OFMSK_arr_2i                           0x0110
    #define   LSb32SEMA_OFMSK_arr_2i                              0
    #define   LSb16SEMA_OFMSK_arr_2i                              0
    #define       bSEMA_OFMSK_arr_2i                           24
    #define   MSK32SEMA_OFMSK_arr_2i                              0x00FFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_UFMSK                                  0x0114

    #define     BA_SEMA_UFMSK_arr_0i                           0x0114
    #define     B16SEMA_UFMSK_arr_0i                           0x0114
    #define   LSb32SEMA_UFMSK_arr_0i                              0
    #define   LSb16SEMA_UFMSK_arr_0i                              0
    #define       bSEMA_UFMSK_arr_0i                           24
    #define   MSK32SEMA_UFMSK_arr_0i                              0x00FFFFFF

    #define     RA_SEMA_UFMSK1                                 0x0118

    #define     BA_SEMA_UFMSK_arr_1i                           0x0118
    #define     B16SEMA_UFMSK_arr_1i                           0x0118
    #define   LSb32SEMA_UFMSK_arr_1i                              0
    #define   LSb16SEMA_UFMSK_arr_1i                              0
    #define       bSEMA_UFMSK_arr_1i                           24
    #define   MSK32SEMA_UFMSK_arr_1i                              0x00FFFFFF

    #define     RA_SEMA_UFMSK2                                 0x011C

    #define     BA_SEMA_UFMSK_arr_2i                           0x011C
    #define     B16SEMA_UFMSK_arr_2i                           0x011C
    #define   LSb32SEMA_UFMSK_arr_2i                              0
    #define   LSb16SEMA_UFMSK_arr_2i                              0
    #define       bSEMA_UFMSK_arr_2i                           24
    #define   MSK32SEMA_UFMSK_arr_2i                              0x00FFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_XCPU                                   0x0120

    #define     BA_SEMA_XCPU_mailbox_0i                        0x0120
    #define     B16SEMA_XCPU_mailbox_0i                        0x0120
    #define   LSb32SEMA_XCPU_mailbox_0i                           0
    #define   LSb16SEMA_XCPU_mailbox_0i                           0
    #define       bSEMA_XCPU_mailbox_0i                        32
    #define   MSK32SEMA_XCPU_mailbox_0i                           0xFFFFFFFF

    #define     RA_SEMA_XCPU1                                  0x0124

    #define     BA_SEMA_XCPU_mailbox_1i                        0x0124
    #define     B16SEMA_XCPU_mailbox_1i                        0x0124
    #define   LSb32SEMA_XCPU_mailbox_1i                           0
    #define   LSb16SEMA_XCPU_mailbox_1i                           0
    #define       bSEMA_XCPU_mailbox_1i                        32
    #define   MSK32SEMA_XCPU_mailbox_1i                           0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_PUSH                                   0x0128

    #define     BA_SEMA_PUSH_ID                                0x0128
    #define     B16SEMA_PUSH_ID                                0x0128
    #define   LSb32SEMA_PUSH_ID                                   0
    #define   LSb16SEMA_PUSH_ID                                   0
    #define       bSEMA_PUSH_ID                                8
    #define   MSK32SEMA_PUSH_ID                                   0x000000FF

    #define     BA_SEMA_PUSH_delta                             0x0129
    #define     B16SEMA_PUSH_delta                             0x0128
    #define   LSb32SEMA_PUSH_delta                                8
    #define   LSb16SEMA_PUSH_delta                                8
    #define       bSEMA_PUSH_delta                             8
    #define   MSK32SEMA_PUSH_delta                                0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_POP                                    0x012C

    #define     BA_SEMA_POP_ID                                 0x012C
    #define     B16SEMA_POP_ID                                 0x012C
    #define   LSb32SEMA_POP_ID                                    0
    #define   LSb16SEMA_POP_ID                                    0
    #define       bSEMA_POP_ID                                 8
    #define   MSK32SEMA_POP_ID                                    0x000000FF

    #define     BA_SEMA_POP_delta                              0x012D
    #define     B16SEMA_POP_delta                              0x012C
    #define   LSb32SEMA_POP_delta                                 8
    #define   LSb16SEMA_POP_delta                                 8
    #define       bSEMA_POP_delta                              8
    #define   MSK32SEMA_POP_delta                                 0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_SEMA_REQ                                    0x1000
    #define     RA_SEMA_resp                                   0x1000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SEMA {
    ///////////////////////////////////////////////////////////
              SIE_SemaCell                                     ie_cell[24];
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxC0                                     [64];
    ///////////////////////////////////////////////////////////
    #define   GET32SEMA_OFST_arr(r32)                          _BFGET_(r32,23, 0)
    #define   SET32SEMA_OFST_arr(r32,v)                        _BFSET_(r32,23, 0,v)

    #define     w32SEMA_OFST                                   {\
            UNSG32 uOFST_arr                                   : 24;\
            UNSG32 RSVDx100_b24                                :  8;\
          }
    union { UNSG32 u32SEMA_OFST;
            struct w32SEMA_OFST;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SEMA_UFST_arr(r32)                          _BFGET_(r32,23, 0)
    #define   SET32SEMA_UFST_arr(r32,v)                        _BFSET_(r32,23, 0,v)

    #define     w32SEMA_UFST                                   {\
            UNSG32 uUFST_arr                                   : 24;\
            UNSG32 RSVDx104_b24                                :  8;\
          }
    union { UNSG32 u32SEMA_UFST;
            struct w32SEMA_UFST;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SEMA_OFMSK_arr_0i(r32)                      _BFGET_(r32,23, 0)
    #define   SET32SEMA_OFMSK_arr_0i(r32,v)                    _BFSET_(r32,23, 0,v)

    #define     w32SEMA_OFMSK                                  {\
            UNSG32 uOFMSK_arr_0i                               : 24;\
            UNSG32 RSVDx108_b24                                :  8;\
          }
    union { UNSG32 u32SEMA_OFMSK;
            struct w32SEMA_OFMSK;
          };
    #define   GET32SEMA_OFMSK_arr_1i(r32)                      _BFGET_(r32,23, 0)
    #define   SET32SEMA_OFMSK_arr_1i(r32,v)                    _BFSET_(r32,23, 0,v)

    #define     w32SEMA_OFMSK1                                 {\
            UNSG32 uOFMSK_arr_1i                               : 24;\
            UNSG32 RSVDx10C_b24                                :  8;\
          }
    union { UNSG32 u32SEMA_OFMSK1;
            struct w32SEMA_OFMSK1;
          };
    #define   GET32SEMA_OFMSK_arr_2i(r32)                      _BFGET_(r32,23, 0)
    #define   SET32SEMA_OFMSK_arr_2i(r32,v)                    _BFSET_(r32,23, 0,v)

    #define     w32SEMA_OFMSK2                                 {\
            UNSG32 uOFMSK_arr_2i                               : 24;\
            UNSG32 RSVDx110_b24                                :  8;\
          }
    union { UNSG32 u32SEMA_OFMSK2;
            struct w32SEMA_OFMSK2;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SEMA_UFMSK_arr_0i(r32)                      _BFGET_(r32,23, 0)
    #define   SET32SEMA_UFMSK_arr_0i(r32,v)                    _BFSET_(r32,23, 0,v)

    #define     w32SEMA_UFMSK                                  {\
            UNSG32 uUFMSK_arr_0i                               : 24;\
            UNSG32 RSVDx114_b24                                :  8;\
          }
    union { UNSG32 u32SEMA_UFMSK;
            struct w32SEMA_UFMSK;
          };
    #define   GET32SEMA_UFMSK_arr_1i(r32)                      _BFGET_(r32,23, 0)
    #define   SET32SEMA_UFMSK_arr_1i(r32,v)                    _BFSET_(r32,23, 0,v)

    #define     w32SEMA_UFMSK1                                 {\
            UNSG32 uUFMSK_arr_1i                               : 24;\
            UNSG32 RSVDx118_b24                                :  8;\
          }
    union { UNSG32 u32SEMA_UFMSK1;
            struct w32SEMA_UFMSK1;
          };
    #define   GET32SEMA_UFMSK_arr_2i(r32)                      _BFGET_(r32,23, 0)
    #define   SET32SEMA_UFMSK_arr_2i(r32,v)                    _BFSET_(r32,23, 0,v)

    #define     w32SEMA_UFMSK2                                 {\
            UNSG32 uUFMSK_arr_2i                               : 24;\
            UNSG32 RSVDx11C_b24                                :  8;\
          }
    union { UNSG32 u32SEMA_UFMSK2;
            struct w32SEMA_UFMSK2;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SEMA_XCPU_mailbox_0i(r32)                   _BFGET_(r32,31, 0)
    #define   SET32SEMA_XCPU_mailbox_0i(r32,v)                 _BFSET_(r32,31, 0,v)

    #define     w32SEMA_XCPU                                   {\
            UNSG32 uXCPU_mailbox_0i                            : 32;\
          }
    union { UNSG32 u32SEMA_XCPU;
            struct w32SEMA_XCPU;
          };
    #define   GET32SEMA_XCPU_mailbox_1i(r32)                   _BFGET_(r32,31, 0)
    #define   SET32SEMA_XCPU_mailbox_1i(r32,v)                 _BFSET_(r32,31, 0,v)

    #define     w32SEMA_XCPU1                                  {\
            UNSG32 uXCPU_mailbox_1i                            : 32;\
          }
    union { UNSG32 u32SEMA_XCPU1;
            struct w32SEMA_XCPU1;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SEMA_PUSH_ID(r32)                           _BFGET_(r32, 7, 0)
    #define   SET32SEMA_PUSH_ID(r32,v)                         _BFSET_(r32, 7, 0,v)
    #define   GET16SEMA_PUSH_ID(r16)                           _BFGET_(r16, 7, 0)
    #define   SET16SEMA_PUSH_ID(r16,v)                         _BFSET_(r16, 7, 0,v)

    #define   GET32SEMA_PUSH_delta(r32)                        _BFGET_(r32,15, 8)
    #define   SET32SEMA_PUSH_delta(r32,v)                      _BFSET_(r32,15, 8,v)
    #define   GET16SEMA_PUSH_delta(r16)                        _BFGET_(r16,15, 8)
    #define   SET16SEMA_PUSH_delta(r16,v)                      _BFSET_(r16,15, 8,v)

    #define     w32SEMA_PUSH                                   {\
            UNSG32 uPUSH_ID                                    :  8;\
            UNSG32 uPUSH_delta                                 :  8;\
            UNSG32 RSVDx128_b16                                : 16;\
          }
    union { UNSG32 u32SEMA_PUSH;
            struct w32SEMA_PUSH;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SEMA_POP_ID(r32)                            _BFGET_(r32, 7, 0)
    #define   SET32SEMA_POP_ID(r32,v)                          _BFSET_(r32, 7, 0,v)
    #define   GET16SEMA_POP_ID(r16)                            _BFGET_(r16, 7, 0)
    #define   SET16SEMA_POP_ID(r16,v)                          _BFSET_(r16, 7, 0,v)

    #define   GET32SEMA_POP_delta(r32)                         _BFGET_(r32,15, 8)
    #define   SET32SEMA_POP_delta(r32,v)                       _BFSET_(r32,15, 8,v)
    #define   GET16SEMA_POP_delta(r16)                         _BFGET_(r16,15, 8)
    #define   SET16SEMA_POP_delta(r16,v)                       _BFSET_(r16,15, 8,v)

    #define     w32SEMA_POP                                    {\
            UNSG32 uPOP_ID                                     :  8;\
            UNSG32 uPOP_delta                                  :  8;\
            UNSG32 RSVDx12C_b16                                : 16;\
          }
    union { UNSG32 u32SEMA_POP;
            struct w32SEMA_POP;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx130                                    [3792];
    ///////////////////////////////////////////////////////////
              SIE_SemaRespMap                                  ie_resp;
    ///////////////////////////////////////////////////////////
    } SIE_SEMA;

    typedef union  T32SEMA_OFST
          { UNSG32 u32;
            struct w32SEMA_OFST;
                 } T32SEMA_OFST;
    typedef union  T32SEMA_UFST
          { UNSG32 u32;
            struct w32SEMA_UFST;
                 } T32SEMA_UFST;
    typedef union  T32SEMA_OFMSK
          { UNSG32 u32;
            struct w32SEMA_OFMSK;
                 } T32SEMA_OFMSK;
    typedef union  T32SEMA_OFMSK1
          { UNSG32 u32;
            struct w32SEMA_OFMSK1;
                 } T32SEMA_OFMSK1;
    typedef union  T32SEMA_OFMSK2
          { UNSG32 u32;
            struct w32SEMA_OFMSK2;
                 } T32SEMA_OFMSK2;
    typedef union  T32SEMA_UFMSK
          { UNSG32 u32;
            struct w32SEMA_UFMSK;
                 } T32SEMA_UFMSK;
    typedef union  T32SEMA_UFMSK1
          { UNSG32 u32;
            struct w32SEMA_UFMSK1;
                 } T32SEMA_UFMSK1;
    typedef union  T32SEMA_UFMSK2
          { UNSG32 u32;
            struct w32SEMA_UFMSK2;
                 } T32SEMA_UFMSK2;
    typedef union  T32SEMA_XCPU
          { UNSG32 u32;
            struct w32SEMA_XCPU;
                 } T32SEMA_XCPU;
    typedef union  T32SEMA_XCPU1
          { UNSG32 u32;
            struct w32SEMA_XCPU1;
                 } T32SEMA_XCPU1;
    typedef union  T32SEMA_PUSH
          { UNSG32 u32;
            struct w32SEMA_PUSH;
                 } T32SEMA_PUSH;
    typedef union  T32SEMA_POP
          { UNSG32 u32;
            struct w32SEMA_POP;
                 } T32SEMA_POP;
    ///////////////////////////////////////////////////////////

    typedef union  TSEMA_OFST
          { UNSG32 u32[1];
            struct {
            struct w32SEMA_OFST;
                   };
                 } TSEMA_OFST;
    typedef union  TSEMA_UFST
          { UNSG32 u32[1];
            struct {
            struct w32SEMA_UFST;
                   };
                 } TSEMA_UFST;
    typedef union  TSEMA_OFMSK
          { UNSG32 u32[3];
            struct {
            struct w32SEMA_OFMSK;
            struct w32SEMA_OFMSK1;
            struct w32SEMA_OFMSK2;
                   };
                 } TSEMA_OFMSK;
    typedef union  TSEMA_UFMSK
          { UNSG32 u32[3];
            struct {
            struct w32SEMA_UFMSK;
            struct w32SEMA_UFMSK1;
            struct w32SEMA_UFMSK2;
                   };
                 } TSEMA_UFMSK;
    typedef union  TSEMA_XCPU
          { UNSG32 u32[2];
            struct {
            struct w32SEMA_XCPU;
            struct w32SEMA_XCPU1;
                   };
                 } TSEMA_XCPU;
    typedef union  TSEMA_PUSH
          { UNSG32 u32[1];
            struct {
            struct w32SEMA_PUSH;
                   };
                 } TSEMA_PUSH;
    typedef union  TSEMA_POP
          { UNSG32 u32[1];
            struct {
            struct w32SEMA_POP;
                   };
                 } TSEMA_POP;

    ///////////////////////////////////////////////////////////
     SIGN32 SEMA_drvrd(SIE_SEMA *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SEMA_drvwr(SIE_SEMA *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SEMA_reset(SIE_SEMA *p);
     SIGN32 SEMA_cmp  (SIE_SEMA *p, SIE_SEMA *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SEMA_check(p,pie,pfx,hLOG) SEMA_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SEMA_print(p,    pfx,hLOG) SEMA_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SEMA
////////////////////////////////////////////////////////////


#ifdef __cplusplus
  }
#endif
#pragma  pack()

#endif
//////
/// ENDOFFILE: sema.h
////////////////////////////////////////////////////////////