/********************************************************************************
 * Marvell GPL License Option
 *
 * If you received this File from Marvell, you may opt to use, redistribute and/or
 * modify this File in accordance with the terms and conditions of the General
 * Public License Version 2, June 1991 (the "GPL License"), a copy of which is
 * available along with the File in the license.txt file or by writing to the Free
 * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
 * on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
 * DISCLAIMED.  The GPL License provides additional details about this warranty
 * disclaimer.
 ******************************************************************************/

//////
/// don't edit! auto-generated by docc: vpro_spec.h
////////////////////////////////////////////////////////////
#ifndef vpro_spec_h
#define vpro_spec_h (){}


#include "ctypes.h"

#pragma pack(1)
#ifdef __cplusplus
  extern "C" {
#endif

#ifndef _DOCC_H_BITOPS_
#define _DOCC_H_BITOPS_ (){}

    #define _bSETMASK_(b)                                      ((b)<32 ? (1<<((b)&31)) : 0)
    #define _NSETMASK_(msb,lsb)                                (_bSETMASK_((msb)+1)-_bSETMASK_(lsb))
    #define _bCLRMASK_(b)                                      (~_bSETMASK_(b))
    #define _NCLRMASK_(msb,lsb)                                (~_NSETMASK_(msb,lsb))
    #define _BFGET_(r,msb,lsb)                                 (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb)))
    #define _BFSET_(r,msb,lsb,v)                               do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0)

#endif


//////
/// 
/// $INTERFACE SemaINTR                                 (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 mask                 (W-)
///               %unsigned 1  empty                     0x0
///                                    ###
///                                    * Enable interrupt on 'empty' condition
///                                    ###
///               %unsigned 1  full                      0x0
///                                    ###
///                                    * Enable interrupt on 'full' condition
///                                    ###
///               %unsigned 1  almostEmpty               0x0
///                                    ###
///                                    * Enable interrupt on 'almostEmpty' condition
///                                    ###
///               %unsigned 1  almostFull                0x0
///                                    ###
///                                    * Enable interrupt on 'almostFull' condition
///                                    ###
///               %%        28         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       4b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaINTR
#define h_SemaINTR (){}

    #define     RA_SemaINTR_mask                               0x0000

    #define     BA_SemaINTR_mask_empty                         0x0000
    #define     B16SemaINTR_mask_empty                         0x0000
    #define   LSb32SemaINTR_mask_empty                            0
    #define   LSb16SemaINTR_mask_empty                            0
    #define       bSemaINTR_mask_empty                         1
    #define   MSK32SemaINTR_mask_empty                            0x00000001

    #define     BA_SemaINTR_mask_full                          0x0000
    #define     B16SemaINTR_mask_full                          0x0000
    #define   LSb32SemaINTR_mask_full                             1
    #define   LSb16SemaINTR_mask_full                             1
    #define       bSemaINTR_mask_full                          1
    #define   MSK32SemaINTR_mask_full                             0x00000002

    #define     BA_SemaINTR_mask_almostEmpty                   0x0000
    #define     B16SemaINTR_mask_almostEmpty                   0x0000
    #define   LSb32SemaINTR_mask_almostEmpty                      2
    #define   LSb16SemaINTR_mask_almostEmpty                      2
    #define       bSemaINTR_mask_almostEmpty                   1
    #define   MSK32SemaINTR_mask_almostEmpty                      0x00000004

    #define     BA_SemaINTR_mask_almostFull                    0x0000
    #define     B16SemaINTR_mask_almostFull                    0x0000
    #define   LSb32SemaINTR_mask_almostFull                       3
    #define   LSb16SemaINTR_mask_almostFull                       3
    #define       bSemaINTR_mask_almostFull                    1
    #define   MSK32SemaINTR_mask_almostFull                       0x00000008
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaINTR {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaINTR_mask_empty(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32SemaINTR_mask_empty(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16SemaINTR_mask_empty(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SemaINTR_mask_empty(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32SemaINTR_mask_full(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32SemaINTR_mask_full(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16SemaINTR_mask_full(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16SemaINTR_mask_full(r16,v)                   _BFSET_(r16, 1, 1,v)

    #define   GET32SemaINTR_mask_almostEmpty(r32)              _BFGET_(r32, 2, 2)
    #define   SET32SemaINTR_mask_almostEmpty(r32,v)            _BFSET_(r32, 2, 2,v)
    #define   GET16SemaINTR_mask_almostEmpty(r16)              _BFGET_(r16, 2, 2)
    #define   SET16SemaINTR_mask_almostEmpty(r16,v)            _BFSET_(r16, 2, 2,v)

    #define   GET32SemaINTR_mask_almostFull(r32)               _BFGET_(r32, 3, 3)
    #define   SET32SemaINTR_mask_almostFull(r32,v)             _BFSET_(r32, 3, 3,v)
    #define   GET16SemaINTR_mask_almostFull(r16)               _BFGET_(r16, 3, 3)
    #define   SET16SemaINTR_mask_almostFull(r16,v)             _BFSET_(r16, 3, 3,v)

    #define     w32SemaINTR_mask                               {\
            UNSG32 umask_empty                                 :  1;\
            UNSG32 umask_full                                  :  1;\
            UNSG32 umask_almostEmpty                           :  1;\
            UNSG32 umask_almostFull                            :  1;\
            UNSG32 RSVDx0_b4                                   : 28;\
          }
    union { UNSG32 u32SemaINTR_mask;
            struct w32SemaINTR_mask;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaINTR;

    typedef union  T32SemaINTR_mask
          { UNSG32 u32;
            struct w32SemaINTR_mask;
                 } T32SemaINTR_mask;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaINTR_mask
          { UNSG32 u32[1];
            struct {
            struct w32SemaINTR_mask;
                   };
                 } TSemaINTR_mask;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaINTR_drvrd(SIE_SemaINTR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaINTR_drvwr(SIE_SemaINTR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaINTR_reset(SIE_SemaINTR *p);
     SIGN32 SemaINTR_cmp  (SIE_SemaINTR *p, SIE_SemaINTR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaINTR_check(p,pie,pfx,hLOG) SemaINTR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaINTR_print(p,    pfx,hLOG) SemaINTR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaINTR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE Semaphore               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (W-)
///               %unsigned 16 DEPTH                     0xF
///                                    ###
///                                    * Max level of semaphore
///                                    * Note: write this register will trigger counter reset
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00004                      (P)
///     # 0x00004 INTR                 
///               $SemaINTR            INTR              REG       [3]
///                                    ###
///                                    * Interrupt mask for 3 CPUs
///                                    ###
///     @ 0x00010 mask                 (W-)
///               %unsigned 1  full                      0x0
///               %unsigned 1  emp                       0x0
///                                    ###
///                                    * When full bit is set to one, to the producer, the semaphore will never be full, so that the producer will never be blocked.
///                                    * When emp bit is set to one, to the consumer, the semaphore will never be empty, so that the consumer will never be blocked.
///                                    * When the emp/full bit is set, the semaphore/FIFO pointer will be maintained, but the counter will be not correct anymore.
///                                    ###
///               %%        30         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      20B, bits:      30b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_Semaphore
#define h_Semaphore (){}

    #define     RA_Semaphore_CFG                               0x0000

    #define     BA_Semaphore_CFG_DEPTH                         0x0000
    #define     B16Semaphore_CFG_DEPTH                         0x0000
    #define   LSb32Semaphore_CFG_DEPTH                            0
    #define   LSb16Semaphore_CFG_DEPTH                            0
    #define       bSemaphore_CFG_DEPTH                         16
    #define   MSK32Semaphore_CFG_DEPTH                            0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_Semaphore_INTR                              0x0004
    ///////////////////////////////////////////////////////////
    #define     RA_Semaphore_mask                              0x0010

    #define     BA_Semaphore_mask_full                         0x0010
    #define     B16Semaphore_mask_full                         0x0010
    #define   LSb32Semaphore_mask_full                            0
    #define   LSb16Semaphore_mask_full                            0
    #define       bSemaphore_mask_full                         1
    #define   MSK32Semaphore_mask_full                            0x00000001

    #define     BA_Semaphore_mask_emp                          0x0010
    #define     B16Semaphore_mask_emp                          0x0010
    #define   LSb32Semaphore_mask_emp                             1
    #define   LSb16Semaphore_mask_emp                             1
    #define       bSemaphore_mask_emp                          1
    #define   MSK32Semaphore_mask_emp                             0x00000002
    ///////////////////////////////////////////////////////////

    typedef struct SIE_Semaphore {
    ///////////////////////////////////////////////////////////
    #define   GET32Semaphore_CFG_DEPTH(r32)                    _BFGET_(r32,15, 0)
    #define   SET32Semaphore_CFG_DEPTH(r32,v)                  _BFSET_(r32,15, 0,v)
    #define   GET16Semaphore_CFG_DEPTH(r16)                    _BFGET_(r16,15, 0)
    #define   SET16Semaphore_CFG_DEPTH(r16,v)                  _BFSET_(r16,15, 0,v)

    #define     w32Semaphore_CFG                               {\
            UNSG32 uCFG_DEPTH                                  : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32Semaphore_CFG;
            struct w32Semaphore_CFG;
          };
    ///////////////////////////////////////////////////////////
              SIE_SemaINTR                                     ie_INTR[3];
    ///////////////////////////////////////////////////////////
    #define   GET32Semaphore_mask_full(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32Semaphore_mask_full(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16Semaphore_mask_full(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16Semaphore_mask_full(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32Semaphore_mask_emp(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32Semaphore_mask_emp(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16Semaphore_mask_emp(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16Semaphore_mask_emp(r16,v)                   _BFSET_(r16, 1, 1,v)

    #define     w32Semaphore_mask                              {\
            UNSG32 umask_full                                  :  1;\
            UNSG32 umask_emp                                   :  1;\
            UNSG32 RSVDx10_b2                                  : 30;\
          }
    union { UNSG32 u32Semaphore_mask;
            struct w32Semaphore_mask;
          };
    ///////////////////////////////////////////////////////////
    } SIE_Semaphore;

    typedef union  T32Semaphore_CFG
          { UNSG32 u32;
            struct w32Semaphore_CFG;
                 } T32Semaphore_CFG;
    typedef union  T32Semaphore_mask
          { UNSG32 u32;
            struct w32Semaphore_mask;
                 } T32Semaphore_mask;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaphore_CFG
          { UNSG32 u32[1];
            struct {
            struct w32Semaphore_CFG;
                   };
                 } TSemaphore_CFG;
    typedef union  TSemaphore_mask
          { UNSG32 u32[1];
            struct {
            struct w32Semaphore_mask;
                   };
                 } TSemaphore_mask;

    ///////////////////////////////////////////////////////////
     SIGN32 Semaphore_drvrd(SIE_Semaphore *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 Semaphore_drvwr(SIE_Semaphore *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void Semaphore_reset(SIE_Semaphore *p);
     SIGN32 Semaphore_cmp  (SIE_Semaphore *p, SIE_Semaphore *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define Semaphore_check(p,pie,pfx,hLOG) Semaphore_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define Semaphore_print(p,    pfx,hLOG) Semaphore_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: Semaphore
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaQuery                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 RESP                 (R-)
///               %unsigned 16 CNT                       
///                                    ###
///                                    * Semaphore counter level
///                                    ###
///               %unsigned 16 PTR                       
///                                    ###
///                                    * Semaphore pointer:
///                                    * producer-wptr or consumer-rptr
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaQuery
#define h_SemaQuery (){}

    #define     RA_SemaQuery_RESP                              0x0000

    #define     BA_SemaQuery_RESP_CNT                          0x0000
    #define     B16SemaQuery_RESP_CNT                          0x0000
    #define   LSb32SemaQuery_RESP_CNT                             0
    #define   LSb16SemaQuery_RESP_CNT                             0
    #define       bSemaQuery_RESP_CNT                          16
    #define   MSK32SemaQuery_RESP_CNT                             0x0000FFFF

    #define     BA_SemaQuery_RESP_PTR                          0x0002
    #define     B16SemaQuery_RESP_PTR                          0x0002
    #define   LSb32SemaQuery_RESP_PTR                             16
    #define   LSb16SemaQuery_RESP_PTR                             0
    #define       bSemaQuery_RESP_PTR                          16
    #define   MSK32SemaQuery_RESP_PTR                             0xFFFF0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaQuery {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaQuery_RESP_CNT(r32)                     _BFGET_(r32,15, 0)
    #define   SET32SemaQuery_RESP_CNT(r32,v)                   _BFSET_(r32,15, 0,v)
    #define   GET16SemaQuery_RESP_CNT(r16)                     _BFGET_(r16,15, 0)
    #define   SET16SemaQuery_RESP_CNT(r16,v)                   _BFSET_(r16,15, 0,v)

    #define   GET32SemaQuery_RESP_PTR(r32)                     _BFGET_(r32,31,16)
    #define   SET32SemaQuery_RESP_PTR(r32,v)                   _BFSET_(r32,31,16,v)
    #define   GET16SemaQuery_RESP_PTR(r16)                     _BFGET_(r16,15, 0)
    #define   SET16SemaQuery_RESP_PTR(r16,v)                   _BFSET_(r16,15, 0,v)

    #define     w32SemaQuery_RESP                              {\
            UNSG32 uRESP_CNT                                   : 16;\
            UNSG32 uRESP_PTR                                   : 16;\
          }
    union { UNSG32 u32SemaQuery_RESP;
            struct w32SemaQuery_RESP;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaQuery;

    typedef union  T32SemaQuery_RESP
          { UNSG32 u32;
            struct w32SemaQuery_RESP;
                 } T32SemaQuery_RESP;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaQuery_RESP
          { UNSG32 u32[1];
            struct {
            struct w32SemaQuery_RESP;
                   };
                 } TSemaQuery_RESP;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaQuery_drvrd(SIE_SemaQuery *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaQuery_drvwr(SIE_SemaQuery *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaQuery_reset(SIE_SemaQuery *p);
     SIGN32 SemaQuery_cmp  (SIE_SemaQuery *p, SIE_SemaQuery *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaQuery_check(p,pie,pfx,hLOG) SemaQuery_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaQuery_print(p,    pfx,hLOG) SemaQuery_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaQuery
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaQueryMap                             (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 ADDR                 (P)
///               %unsigned 2  byte                      
///               %unsigned 5  ID                        
///                                    ###
///                                    * Semaphore cell index
///                                    ###
///               %unsigned 1  master                    
///                                    : producer                  0x0
///                                    : consumer                  0x1
///                                                 ###
///                                                 * Select which counter to read
///                                                 ###
///               %%        24         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       8b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaQueryMap
#define h_SemaQueryMap (){}

    #define     RA_SemaQueryMap_ADDR                           0x0000

    #define     BA_SemaQueryMap_ADDR_byte                      0x0000
    #define     B16SemaQueryMap_ADDR_byte                      0x0000
    #define   LSb32SemaQueryMap_ADDR_byte                         0
    #define   LSb16SemaQueryMap_ADDR_byte                         0
    #define       bSemaQueryMap_ADDR_byte                      2
    #define   MSK32SemaQueryMap_ADDR_byte                         0x00000003

    #define     BA_SemaQueryMap_ADDR_ID                        0x0000
    #define     B16SemaQueryMap_ADDR_ID                        0x0000
    #define   LSb32SemaQueryMap_ADDR_ID                           2
    #define   LSb16SemaQueryMap_ADDR_ID                           2
    #define       bSemaQueryMap_ADDR_ID                        5
    #define   MSK32SemaQueryMap_ADDR_ID                           0x0000007C

    #define     BA_SemaQueryMap_ADDR_master                    0x0000
    #define     B16SemaQueryMap_ADDR_master                    0x0000
    #define   LSb32SemaQueryMap_ADDR_master                       7
    #define   LSb16SemaQueryMap_ADDR_master                       7
    #define       bSemaQueryMap_ADDR_master                    1
    #define   MSK32SemaQueryMap_ADDR_master                       0x00000080
    #define        SemaQueryMap_ADDR_master_producer                        0x0
    #define        SemaQueryMap_ADDR_master_consumer                        0x1
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaQueryMap {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaQueryMap_ADDR_byte(r32)                 _BFGET_(r32, 1, 0)
    #define   SET32SemaQueryMap_ADDR_byte(r32,v)               _BFSET_(r32, 1, 0,v)
    #define   GET16SemaQueryMap_ADDR_byte(r16)                 _BFGET_(r16, 1, 0)
    #define   SET16SemaQueryMap_ADDR_byte(r16,v)               _BFSET_(r16, 1, 0,v)

    #define   GET32SemaQueryMap_ADDR_ID(r32)                   _BFGET_(r32, 6, 2)
    #define   SET32SemaQueryMap_ADDR_ID(r32,v)                 _BFSET_(r32, 6, 2,v)
    #define   GET16SemaQueryMap_ADDR_ID(r16)                   _BFGET_(r16, 6, 2)
    #define   SET16SemaQueryMap_ADDR_ID(r16,v)                 _BFSET_(r16, 6, 2,v)

    #define   GET32SemaQueryMap_ADDR_master(r32)               _BFGET_(r32, 7, 7)
    #define   SET32SemaQueryMap_ADDR_master(r32,v)             _BFSET_(r32, 7, 7,v)
    #define   GET16SemaQueryMap_ADDR_master(r16)               _BFGET_(r16, 7, 7)
    #define   SET16SemaQueryMap_ADDR_master(r16,v)             _BFSET_(r16, 7, 7,v)

    #define     w32SemaQueryMap_ADDR                           {\
            UNSG32 uADDR_byte                                  :  2;\
            UNSG32 uADDR_ID                                    :  5;\
            UNSG32 uADDR_master                                :  1;\
            UNSG32 RSVDx0_b8                                   : 24;\
          }
    union { UNSG32 u32SemaQueryMap_ADDR;
            struct w32SemaQueryMap_ADDR;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaQueryMap;

    typedef union  T32SemaQueryMap_ADDR
          { UNSG32 u32;
            struct w32SemaQueryMap_ADDR;
                 } T32SemaQueryMap_ADDR;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaQueryMap_ADDR
          { UNSG32 u32[1];
            struct {
            struct w32SemaQueryMap_ADDR;
                   };
                 } TSemaQueryMap_ADDR;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaQueryMap_drvrd(SIE_SemaQueryMap *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaQueryMap_drvwr(SIE_SemaQueryMap *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaQueryMap_reset(SIE_SemaQueryMap *p);
     SIGN32 SemaQueryMap_cmp  (SIE_SemaQueryMap *p, SIE_SemaQueryMap *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaQueryMap_check(p,pie,pfx,hLOG) SemaQueryMap_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaQueryMap_print(p,    pfx,hLOG) SemaQueryMap_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaQueryMap
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaHub                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 Query                (R-)
///     # 0x00000 counter              
///               $SemaQuery           counter           MEM      [64]
///                                    ###
///                                    * Access address as defined above
///                                    ###
///     @ 0x00100 ARR                  (P)
///     # 0x00100 cell                 
///               $Semaphore           cell              REG      [32]
///                                    ###
///                                    * Up-to 32 semaphore cells
///                                    ###
///     @ 0x00380 PUSH                 (W-)
///               %unsigned 8  ID                        
///               %unsigned 8  delta                     
///                                    ###
///                                    * CPU increases PCounter by delta (range from 0 to 255)
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00384 POP                  (W-)
///               %unsigned 8  ID                        
///               %unsigned 8  delta                     
///                                    ###
///                                    * CPU decreases CCounter by delta (range from 0 to 255)
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00388 empty                (WOC-)
///               %unsigned 1  ST_0i                     0x0
///               %unsigned 1  ST_1i                     0x0
///               %unsigned 1  ST_2i                     0x0
///               %unsigned 1  ST_3i                     0x0
///               %unsigned 1  ST_4i                     0x0
///               %unsigned 1  ST_5i                     0x0
///               %unsigned 1  ST_6i                     0x0
///               %unsigned 1  ST_7i                     0x0
///               %unsigned 1  ST_8i                     0x0
///               %unsigned 1  ST_9i                     0x0
///               %unsigned 1  ST_10i                    0x0
///               %unsigned 1  ST_11i                    0x0
///               %unsigned 1  ST_12i                    0x0
///               %unsigned 1  ST_13i                    0x0
///               %unsigned 1  ST_14i                    0x0
///               %unsigned 1  ST_15i                    0x0
///               %unsigned 1  ST_16i                    0x0
///               %unsigned 1  ST_17i                    0x0
///               %unsigned 1  ST_18i                    0x0
///               %unsigned 1  ST_19i                    0x0
///               %unsigned 1  ST_20i                    0x0
///               %unsigned 1  ST_21i                    0x0
///               %unsigned 1  ST_22i                    0x0
///               %unsigned 1  ST_23i                    0x0
///               %unsigned 1  ST_24i                    0x0
///               %unsigned 1  ST_25i                    0x0
///               %unsigned 1  ST_26i                    0x0
///               %unsigned 1  ST_27i                    0x0
///               %unsigned 1  ST_28i                    0x0
///               %unsigned 1  ST_29i                    0x0
///               %unsigned 1  ST_30i                    0x0
///               %unsigned 1  ST_31i                    0x0
///                                    ###
///                                    * All cell 'empty' status
///                                    ###
///     @ 0x0038C full                 (WOC-)
///               %unsigned 1  ST_0i                     0x0
///               %unsigned 1  ST_1i                     0x0
///               %unsigned 1  ST_2i                     0x0
///               %unsigned 1  ST_3i                     0x0
///               %unsigned 1  ST_4i                     0x0
///               %unsigned 1  ST_5i                     0x0
///               %unsigned 1  ST_6i                     0x0
///               %unsigned 1  ST_7i                     0x0
///               %unsigned 1  ST_8i                     0x0
///               %unsigned 1  ST_9i                     0x0
///               %unsigned 1  ST_10i                    0x0
///               %unsigned 1  ST_11i                    0x0
///               %unsigned 1  ST_12i                    0x0
///               %unsigned 1  ST_13i                    0x0
///               %unsigned 1  ST_14i                    0x0
///               %unsigned 1  ST_15i                    0x0
///               %unsigned 1  ST_16i                    0x0
///               %unsigned 1  ST_17i                    0x0
///               %unsigned 1  ST_18i                    0x0
///               %unsigned 1  ST_19i                    0x0
///               %unsigned 1  ST_20i                    0x0
///               %unsigned 1  ST_21i                    0x0
///               %unsigned 1  ST_22i                    0x0
///               %unsigned 1  ST_23i                    0x0
///               %unsigned 1  ST_24i                    0x0
///               %unsigned 1  ST_25i                    0x0
///               %unsigned 1  ST_26i                    0x0
///               %unsigned 1  ST_27i                    0x0
///               %unsigned 1  ST_28i                    0x0
///               %unsigned 1  ST_29i                    0x0
///               %unsigned 1  ST_30i                    0x0
///               %unsigned 1  ST_31i                    0x0
///                                    ###
///                                    * All cell 'full' status
///                                    ###
///     @ 0x00390 almostEmpty          (WOC-)
///               %unsigned 1  ST_0i                     0x0
///               %unsigned 1  ST_1i                     0x0
///               %unsigned 1  ST_2i                     0x0
///               %unsigned 1  ST_3i                     0x0
///               %unsigned 1  ST_4i                     0x0
///               %unsigned 1  ST_5i                     0x0
///               %unsigned 1  ST_6i                     0x0
///               %unsigned 1  ST_7i                     0x0
///               %unsigned 1  ST_8i                     0x0
///               %unsigned 1  ST_9i                     0x0
///               %unsigned 1  ST_10i                    0x0
///               %unsigned 1  ST_11i                    0x0
///               %unsigned 1  ST_12i                    0x0
///               %unsigned 1  ST_13i                    0x0
///               %unsigned 1  ST_14i                    0x0
///               %unsigned 1  ST_15i                    0x0
///               %unsigned 1  ST_16i                    0x0
///               %unsigned 1  ST_17i                    0x0
///               %unsigned 1  ST_18i                    0x0
///               %unsigned 1  ST_19i                    0x0
///               %unsigned 1  ST_20i                    0x0
///               %unsigned 1  ST_21i                    0x0
///               %unsigned 1  ST_22i                    0x0
///               %unsigned 1  ST_23i                    0x0
///               %unsigned 1  ST_24i                    0x0
///               %unsigned 1  ST_25i                    0x0
///               %unsigned 1  ST_26i                    0x0
///               %unsigned 1  ST_27i                    0x0
///               %unsigned 1  ST_28i                    0x0
///               %unsigned 1  ST_29i                    0x0
///               %unsigned 1  ST_30i                    0x0
///               %unsigned 1  ST_31i                    0x0
///                                    ###
///                                    * All cell 'almostEmpty' status
///                                    ###
///     @ 0x00394 almostFull           (WOC-)
///               %unsigned 1  ST_0i                     0x0
///               %unsigned 1  ST_1i                     0x0
///               %unsigned 1  ST_2i                     0x0
///               %unsigned 1  ST_3i                     0x0
///               %unsigned 1  ST_4i                     0x0
///               %unsigned 1  ST_5i                     0x0
///               %unsigned 1  ST_6i                     0x0
///               %unsigned 1  ST_7i                     0x0
///               %unsigned 1  ST_8i                     0x0
///               %unsigned 1  ST_9i                     0x0
///               %unsigned 1  ST_10i                    0x0
///               %unsigned 1  ST_11i                    0x0
///               %unsigned 1  ST_12i                    0x0
///               %unsigned 1  ST_13i                    0x0
///               %unsigned 1  ST_14i                    0x0
///               %unsigned 1  ST_15i                    0x0
///               %unsigned 1  ST_16i                    0x0
///               %unsigned 1  ST_17i                    0x0
///               %unsigned 1  ST_18i                    0x0
///               %unsigned 1  ST_19i                    0x0
///               %unsigned 1  ST_20i                    0x0
///               %unsigned 1  ST_21i                    0x0
///               %unsigned 1  ST_22i                    0x0
///               %unsigned 1  ST_23i                    0x0
///               %unsigned 1  ST_24i                    0x0
///               %unsigned 1  ST_25i                    0x0
///               %unsigned 1  ST_26i                    0x0
///               %unsigned 1  ST_27i                    0x0
///               %unsigned 1  ST_28i                    0x0
///               %unsigned 1  ST_29i                    0x0
///               %unsigned 1  ST_30i                    0x0
///               %unsigned 1  ST_31i                    0x0
///                                    ###
///                                    * All cell 'almostFull' status
///                                    ###
///     @ 0x00398                      (W-)
///     #         # Stuffing bytes...
///               %% 832
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    1024B, bits:    1152b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaHub
#define h_SemaHub (){}

    #define     RA_SemaHub_Query                               0x0000
    #define     RA_SemaHub_counter                             0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_ARR                                 0x0100
    #define     RA_SemaHub_cell                                0x0100
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_PUSH                                0x0380

    #define     BA_SemaHub_PUSH_ID                             0x0380
    #define     B16SemaHub_PUSH_ID                             0x0380
    #define   LSb32SemaHub_PUSH_ID                                0
    #define   LSb16SemaHub_PUSH_ID                                0
    #define       bSemaHub_PUSH_ID                             8
    #define   MSK32SemaHub_PUSH_ID                                0x000000FF

    #define     BA_SemaHub_PUSH_delta                          0x0381
    #define     B16SemaHub_PUSH_delta                          0x0380
    #define   LSb32SemaHub_PUSH_delta                             8
    #define   LSb16SemaHub_PUSH_delta                             8
    #define       bSemaHub_PUSH_delta                          8
    #define   MSK32SemaHub_PUSH_delta                             0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_POP                                 0x0384

    #define     BA_SemaHub_POP_ID                              0x0384
    #define     B16SemaHub_POP_ID                              0x0384
    #define   LSb32SemaHub_POP_ID                                 0
    #define   LSb16SemaHub_POP_ID                                 0
    #define       bSemaHub_POP_ID                              8
    #define   MSK32SemaHub_POP_ID                                 0x000000FF

    #define     BA_SemaHub_POP_delta                           0x0385
    #define     B16SemaHub_POP_delta                           0x0384
    #define   LSb32SemaHub_POP_delta                              8
    #define   LSb16SemaHub_POP_delta                              8
    #define       bSemaHub_POP_delta                           8
    #define   MSK32SemaHub_POP_delta                              0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_empty                               0x0388

    #define     BA_SemaHub_empty_ST_0i                         0x0388
    #define     B16SemaHub_empty_ST_0i                         0x0388
    #define   LSb32SemaHub_empty_ST_0i                            0
    #define   LSb16SemaHub_empty_ST_0i                            0
    #define       bSemaHub_empty_ST_0i                         1
    #define   MSK32SemaHub_empty_ST_0i                            0x00000001

    #define     BA_SemaHub_empty_ST_1i                         0x0388
    #define     B16SemaHub_empty_ST_1i                         0x0388
    #define   LSb32SemaHub_empty_ST_1i                            1
    #define   LSb16SemaHub_empty_ST_1i                            1
    #define       bSemaHub_empty_ST_1i                         1
    #define   MSK32SemaHub_empty_ST_1i                            0x00000002

    #define     BA_SemaHub_empty_ST_2i                         0x0388
    #define     B16SemaHub_empty_ST_2i                         0x0388
    #define   LSb32SemaHub_empty_ST_2i                            2
    #define   LSb16SemaHub_empty_ST_2i                            2
    #define       bSemaHub_empty_ST_2i                         1
    #define   MSK32SemaHub_empty_ST_2i                            0x00000004

    #define     BA_SemaHub_empty_ST_3i                         0x0388
    #define     B16SemaHub_empty_ST_3i                         0x0388
    #define   LSb32SemaHub_empty_ST_3i                            3
    #define   LSb16SemaHub_empty_ST_3i                            3
    #define       bSemaHub_empty_ST_3i                         1
    #define   MSK32SemaHub_empty_ST_3i                            0x00000008

    #define     BA_SemaHub_empty_ST_4i                         0x0388
    #define     B16SemaHub_empty_ST_4i                         0x0388
    #define   LSb32SemaHub_empty_ST_4i                            4
    #define   LSb16SemaHub_empty_ST_4i                            4
    #define       bSemaHub_empty_ST_4i                         1
    #define   MSK32SemaHub_empty_ST_4i                            0x00000010

    #define     BA_SemaHub_empty_ST_5i                         0x0388
    #define     B16SemaHub_empty_ST_5i                         0x0388
    #define   LSb32SemaHub_empty_ST_5i                            5
    #define   LSb16SemaHub_empty_ST_5i                            5
    #define       bSemaHub_empty_ST_5i                         1
    #define   MSK32SemaHub_empty_ST_5i                            0x00000020

    #define     BA_SemaHub_empty_ST_6i                         0x0388
    #define     B16SemaHub_empty_ST_6i                         0x0388
    #define   LSb32SemaHub_empty_ST_6i                            6
    #define   LSb16SemaHub_empty_ST_6i                            6
    #define       bSemaHub_empty_ST_6i                         1
    #define   MSK32SemaHub_empty_ST_6i                            0x00000040

    #define     BA_SemaHub_empty_ST_7i                         0x0388
    #define     B16SemaHub_empty_ST_7i                         0x0388
    #define   LSb32SemaHub_empty_ST_7i                            7
    #define   LSb16SemaHub_empty_ST_7i                            7
    #define       bSemaHub_empty_ST_7i                         1
    #define   MSK32SemaHub_empty_ST_7i                            0x00000080

    #define     BA_SemaHub_empty_ST_8i                         0x0389
    #define     B16SemaHub_empty_ST_8i                         0x0388
    #define   LSb32SemaHub_empty_ST_8i                            8
    #define   LSb16SemaHub_empty_ST_8i                            8
    #define       bSemaHub_empty_ST_8i                         1
    #define   MSK32SemaHub_empty_ST_8i                            0x00000100

    #define     BA_SemaHub_empty_ST_9i                         0x0389
    #define     B16SemaHub_empty_ST_9i                         0x0388
    #define   LSb32SemaHub_empty_ST_9i                            9
    #define   LSb16SemaHub_empty_ST_9i                            9
    #define       bSemaHub_empty_ST_9i                         1
    #define   MSK32SemaHub_empty_ST_9i                            0x00000200

    #define     BA_SemaHub_empty_ST_10i                        0x0389
    #define     B16SemaHub_empty_ST_10i                        0x0388
    #define   LSb32SemaHub_empty_ST_10i                           10
    #define   LSb16SemaHub_empty_ST_10i                           10
    #define       bSemaHub_empty_ST_10i                        1
    #define   MSK32SemaHub_empty_ST_10i                           0x00000400

    #define     BA_SemaHub_empty_ST_11i                        0x0389
    #define     B16SemaHub_empty_ST_11i                        0x0388
    #define   LSb32SemaHub_empty_ST_11i                           11
    #define   LSb16SemaHub_empty_ST_11i                           11
    #define       bSemaHub_empty_ST_11i                        1
    #define   MSK32SemaHub_empty_ST_11i                           0x00000800

    #define     BA_SemaHub_empty_ST_12i                        0x0389
    #define     B16SemaHub_empty_ST_12i                        0x0388
    #define   LSb32SemaHub_empty_ST_12i                           12
    #define   LSb16SemaHub_empty_ST_12i                           12
    #define       bSemaHub_empty_ST_12i                        1
    #define   MSK32SemaHub_empty_ST_12i                           0x00001000

    #define     BA_SemaHub_empty_ST_13i                        0x0389
    #define     B16SemaHub_empty_ST_13i                        0x0388
    #define   LSb32SemaHub_empty_ST_13i                           13
    #define   LSb16SemaHub_empty_ST_13i                           13
    #define       bSemaHub_empty_ST_13i                        1
    #define   MSK32SemaHub_empty_ST_13i                           0x00002000

    #define     BA_SemaHub_empty_ST_14i                        0x0389
    #define     B16SemaHub_empty_ST_14i                        0x0388
    #define   LSb32SemaHub_empty_ST_14i                           14
    #define   LSb16SemaHub_empty_ST_14i                           14
    #define       bSemaHub_empty_ST_14i                        1
    #define   MSK32SemaHub_empty_ST_14i                           0x00004000

    #define     BA_SemaHub_empty_ST_15i                        0x0389
    #define     B16SemaHub_empty_ST_15i                        0x0388
    #define   LSb32SemaHub_empty_ST_15i                           15
    #define   LSb16SemaHub_empty_ST_15i                           15
    #define       bSemaHub_empty_ST_15i                        1
    #define   MSK32SemaHub_empty_ST_15i                           0x00008000

    #define     BA_SemaHub_empty_ST_16i                        0x038A
    #define     B16SemaHub_empty_ST_16i                        0x038A
    #define   LSb32SemaHub_empty_ST_16i                           16
    #define   LSb16SemaHub_empty_ST_16i                           0
    #define       bSemaHub_empty_ST_16i                        1
    #define   MSK32SemaHub_empty_ST_16i                           0x00010000

    #define     BA_SemaHub_empty_ST_17i                        0x038A
    #define     B16SemaHub_empty_ST_17i                        0x038A
    #define   LSb32SemaHub_empty_ST_17i                           17
    #define   LSb16SemaHub_empty_ST_17i                           1
    #define       bSemaHub_empty_ST_17i                        1
    #define   MSK32SemaHub_empty_ST_17i                           0x00020000

    #define     BA_SemaHub_empty_ST_18i                        0x038A
    #define     B16SemaHub_empty_ST_18i                        0x038A
    #define   LSb32SemaHub_empty_ST_18i                           18
    #define   LSb16SemaHub_empty_ST_18i                           2
    #define       bSemaHub_empty_ST_18i                        1
    #define   MSK32SemaHub_empty_ST_18i                           0x00040000

    #define     BA_SemaHub_empty_ST_19i                        0x038A
    #define     B16SemaHub_empty_ST_19i                        0x038A
    #define   LSb32SemaHub_empty_ST_19i                           19
    #define   LSb16SemaHub_empty_ST_19i                           3
    #define       bSemaHub_empty_ST_19i                        1
    #define   MSK32SemaHub_empty_ST_19i                           0x00080000

    #define     BA_SemaHub_empty_ST_20i                        0x038A
    #define     B16SemaHub_empty_ST_20i                        0x038A
    #define   LSb32SemaHub_empty_ST_20i                           20
    #define   LSb16SemaHub_empty_ST_20i                           4
    #define       bSemaHub_empty_ST_20i                        1
    #define   MSK32SemaHub_empty_ST_20i                           0x00100000

    #define     BA_SemaHub_empty_ST_21i                        0x038A
    #define     B16SemaHub_empty_ST_21i                        0x038A
    #define   LSb32SemaHub_empty_ST_21i                           21
    #define   LSb16SemaHub_empty_ST_21i                           5
    #define       bSemaHub_empty_ST_21i                        1
    #define   MSK32SemaHub_empty_ST_21i                           0x00200000

    #define     BA_SemaHub_empty_ST_22i                        0x038A
    #define     B16SemaHub_empty_ST_22i                        0x038A
    #define   LSb32SemaHub_empty_ST_22i                           22
    #define   LSb16SemaHub_empty_ST_22i                           6
    #define       bSemaHub_empty_ST_22i                        1
    #define   MSK32SemaHub_empty_ST_22i                           0x00400000

    #define     BA_SemaHub_empty_ST_23i                        0x038A
    #define     B16SemaHub_empty_ST_23i                        0x038A
    #define   LSb32SemaHub_empty_ST_23i                           23
    #define   LSb16SemaHub_empty_ST_23i                           7
    #define       bSemaHub_empty_ST_23i                        1
    #define   MSK32SemaHub_empty_ST_23i                           0x00800000

    #define     BA_SemaHub_empty_ST_24i                        0x038B
    #define     B16SemaHub_empty_ST_24i                        0x038A
    #define   LSb32SemaHub_empty_ST_24i                           24
    #define   LSb16SemaHub_empty_ST_24i                           8
    #define       bSemaHub_empty_ST_24i                        1
    #define   MSK32SemaHub_empty_ST_24i                           0x01000000

    #define     BA_SemaHub_empty_ST_25i                        0x038B
    #define     B16SemaHub_empty_ST_25i                        0x038A
    #define   LSb32SemaHub_empty_ST_25i                           25
    #define   LSb16SemaHub_empty_ST_25i                           9
    #define       bSemaHub_empty_ST_25i                        1
    #define   MSK32SemaHub_empty_ST_25i                           0x02000000

    #define     BA_SemaHub_empty_ST_26i                        0x038B
    #define     B16SemaHub_empty_ST_26i                        0x038A
    #define   LSb32SemaHub_empty_ST_26i                           26
    #define   LSb16SemaHub_empty_ST_26i                           10
    #define       bSemaHub_empty_ST_26i                        1
    #define   MSK32SemaHub_empty_ST_26i                           0x04000000

    #define     BA_SemaHub_empty_ST_27i                        0x038B
    #define     B16SemaHub_empty_ST_27i                        0x038A
    #define   LSb32SemaHub_empty_ST_27i                           27
    #define   LSb16SemaHub_empty_ST_27i                           11
    #define       bSemaHub_empty_ST_27i                        1
    #define   MSK32SemaHub_empty_ST_27i                           0x08000000

    #define     BA_SemaHub_empty_ST_28i                        0x038B
    #define     B16SemaHub_empty_ST_28i                        0x038A
    #define   LSb32SemaHub_empty_ST_28i                           28
    #define   LSb16SemaHub_empty_ST_28i                           12
    #define       bSemaHub_empty_ST_28i                        1
    #define   MSK32SemaHub_empty_ST_28i                           0x10000000

    #define     BA_SemaHub_empty_ST_29i                        0x038B
    #define     B16SemaHub_empty_ST_29i                        0x038A
    #define   LSb32SemaHub_empty_ST_29i                           29
    #define   LSb16SemaHub_empty_ST_29i                           13
    #define       bSemaHub_empty_ST_29i                        1
    #define   MSK32SemaHub_empty_ST_29i                           0x20000000

    #define     BA_SemaHub_empty_ST_30i                        0x038B
    #define     B16SemaHub_empty_ST_30i                        0x038A
    #define   LSb32SemaHub_empty_ST_30i                           30
    #define   LSb16SemaHub_empty_ST_30i                           14
    #define       bSemaHub_empty_ST_30i                        1
    #define   MSK32SemaHub_empty_ST_30i                           0x40000000

    #define     BA_SemaHub_empty_ST_31i                        0x038B
    #define     B16SemaHub_empty_ST_31i                        0x038A
    #define   LSb32SemaHub_empty_ST_31i                           31
    #define   LSb16SemaHub_empty_ST_31i                           15
    #define       bSemaHub_empty_ST_31i                        1
    #define   MSK32SemaHub_empty_ST_31i                           0x80000000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_full                                0x038C

    #define     BA_SemaHub_full_ST_0i                          0x038C
    #define     B16SemaHub_full_ST_0i                          0x038C
    #define   LSb32SemaHub_full_ST_0i                             0
    #define   LSb16SemaHub_full_ST_0i                             0
    #define       bSemaHub_full_ST_0i                          1
    #define   MSK32SemaHub_full_ST_0i                             0x00000001

    #define     BA_SemaHub_full_ST_1i                          0x038C
    #define     B16SemaHub_full_ST_1i                          0x038C
    #define   LSb32SemaHub_full_ST_1i                             1
    #define   LSb16SemaHub_full_ST_1i                             1
    #define       bSemaHub_full_ST_1i                          1
    #define   MSK32SemaHub_full_ST_1i                             0x00000002

    #define     BA_SemaHub_full_ST_2i                          0x038C
    #define     B16SemaHub_full_ST_2i                          0x038C
    #define   LSb32SemaHub_full_ST_2i                             2
    #define   LSb16SemaHub_full_ST_2i                             2
    #define       bSemaHub_full_ST_2i                          1
    #define   MSK32SemaHub_full_ST_2i                             0x00000004

    #define     BA_SemaHub_full_ST_3i                          0x038C
    #define     B16SemaHub_full_ST_3i                          0x038C
    #define   LSb32SemaHub_full_ST_3i                             3
    #define   LSb16SemaHub_full_ST_3i                             3
    #define       bSemaHub_full_ST_3i                          1
    #define   MSK32SemaHub_full_ST_3i                             0x00000008

    #define     BA_SemaHub_full_ST_4i                          0x038C
    #define     B16SemaHub_full_ST_4i                          0x038C
    #define   LSb32SemaHub_full_ST_4i                             4
    #define   LSb16SemaHub_full_ST_4i                             4
    #define       bSemaHub_full_ST_4i                          1
    #define   MSK32SemaHub_full_ST_4i                             0x00000010

    #define     BA_SemaHub_full_ST_5i                          0x038C
    #define     B16SemaHub_full_ST_5i                          0x038C
    #define   LSb32SemaHub_full_ST_5i                             5
    #define   LSb16SemaHub_full_ST_5i                             5
    #define       bSemaHub_full_ST_5i                          1
    #define   MSK32SemaHub_full_ST_5i                             0x00000020

    #define     BA_SemaHub_full_ST_6i                          0x038C
    #define     B16SemaHub_full_ST_6i                          0x038C
    #define   LSb32SemaHub_full_ST_6i                             6
    #define   LSb16SemaHub_full_ST_6i                             6
    #define       bSemaHub_full_ST_6i                          1
    #define   MSK32SemaHub_full_ST_6i                             0x00000040

    #define     BA_SemaHub_full_ST_7i                          0x038C
    #define     B16SemaHub_full_ST_7i                          0x038C
    #define   LSb32SemaHub_full_ST_7i                             7
    #define   LSb16SemaHub_full_ST_7i                             7
    #define       bSemaHub_full_ST_7i                          1
    #define   MSK32SemaHub_full_ST_7i                             0x00000080

    #define     BA_SemaHub_full_ST_8i                          0x038D
    #define     B16SemaHub_full_ST_8i                          0x038C
    #define   LSb32SemaHub_full_ST_8i                             8
    #define   LSb16SemaHub_full_ST_8i                             8
    #define       bSemaHub_full_ST_8i                          1
    #define   MSK32SemaHub_full_ST_8i                             0x00000100

    #define     BA_SemaHub_full_ST_9i                          0x038D
    #define     B16SemaHub_full_ST_9i                          0x038C
    #define   LSb32SemaHub_full_ST_9i                             9
    #define   LSb16SemaHub_full_ST_9i                             9
    #define       bSemaHub_full_ST_9i                          1
    #define   MSK32SemaHub_full_ST_9i                             0x00000200

    #define     BA_SemaHub_full_ST_10i                         0x038D
    #define     B16SemaHub_full_ST_10i                         0x038C
    #define   LSb32SemaHub_full_ST_10i                            10
    #define   LSb16SemaHub_full_ST_10i                            10
    #define       bSemaHub_full_ST_10i                         1
    #define   MSK32SemaHub_full_ST_10i                            0x00000400

    #define     BA_SemaHub_full_ST_11i                         0x038D
    #define     B16SemaHub_full_ST_11i                         0x038C
    #define   LSb32SemaHub_full_ST_11i                            11
    #define   LSb16SemaHub_full_ST_11i                            11
    #define       bSemaHub_full_ST_11i                         1
    #define   MSK32SemaHub_full_ST_11i                            0x00000800

    #define     BA_SemaHub_full_ST_12i                         0x038D
    #define     B16SemaHub_full_ST_12i                         0x038C
    #define   LSb32SemaHub_full_ST_12i                            12
    #define   LSb16SemaHub_full_ST_12i                            12
    #define       bSemaHub_full_ST_12i                         1
    #define   MSK32SemaHub_full_ST_12i                            0x00001000

    #define     BA_SemaHub_full_ST_13i                         0x038D
    #define     B16SemaHub_full_ST_13i                         0x038C
    #define   LSb32SemaHub_full_ST_13i                            13
    #define   LSb16SemaHub_full_ST_13i                            13
    #define       bSemaHub_full_ST_13i                         1
    #define   MSK32SemaHub_full_ST_13i                            0x00002000

    #define     BA_SemaHub_full_ST_14i                         0x038D
    #define     B16SemaHub_full_ST_14i                         0x038C
    #define   LSb32SemaHub_full_ST_14i                            14
    #define   LSb16SemaHub_full_ST_14i                            14
    #define       bSemaHub_full_ST_14i                         1
    #define   MSK32SemaHub_full_ST_14i                            0x00004000

    #define     BA_SemaHub_full_ST_15i                         0x038D
    #define     B16SemaHub_full_ST_15i                         0x038C
    #define   LSb32SemaHub_full_ST_15i                            15
    #define   LSb16SemaHub_full_ST_15i                            15
    #define       bSemaHub_full_ST_15i                         1
    #define   MSK32SemaHub_full_ST_15i                            0x00008000

    #define     BA_SemaHub_full_ST_16i                         0x038E
    #define     B16SemaHub_full_ST_16i                         0x038E
    #define   LSb32SemaHub_full_ST_16i                            16
    #define   LSb16SemaHub_full_ST_16i                            0
    #define       bSemaHub_full_ST_16i                         1
    #define   MSK32SemaHub_full_ST_16i                            0x00010000

    #define     BA_SemaHub_full_ST_17i                         0x038E
    #define     B16SemaHub_full_ST_17i                         0x038E
    #define   LSb32SemaHub_full_ST_17i                            17
    #define   LSb16SemaHub_full_ST_17i                            1
    #define       bSemaHub_full_ST_17i                         1
    #define   MSK32SemaHub_full_ST_17i                            0x00020000

    #define     BA_SemaHub_full_ST_18i                         0x038E
    #define     B16SemaHub_full_ST_18i                         0x038E
    #define   LSb32SemaHub_full_ST_18i                            18
    #define   LSb16SemaHub_full_ST_18i                            2
    #define       bSemaHub_full_ST_18i                         1
    #define   MSK32SemaHub_full_ST_18i                            0x00040000

    #define     BA_SemaHub_full_ST_19i                         0x038E
    #define     B16SemaHub_full_ST_19i                         0x038E
    #define   LSb32SemaHub_full_ST_19i                            19
    #define   LSb16SemaHub_full_ST_19i                            3
    #define       bSemaHub_full_ST_19i                         1
    #define   MSK32SemaHub_full_ST_19i                            0x00080000

    #define     BA_SemaHub_full_ST_20i                         0x038E
    #define     B16SemaHub_full_ST_20i                         0x038E
    #define   LSb32SemaHub_full_ST_20i                            20
    #define   LSb16SemaHub_full_ST_20i                            4
    #define       bSemaHub_full_ST_20i                         1
    #define   MSK32SemaHub_full_ST_20i                            0x00100000

    #define     BA_SemaHub_full_ST_21i                         0x038E
    #define     B16SemaHub_full_ST_21i                         0x038E
    #define   LSb32SemaHub_full_ST_21i                            21
    #define   LSb16SemaHub_full_ST_21i                            5
    #define       bSemaHub_full_ST_21i                         1
    #define   MSK32SemaHub_full_ST_21i                            0x00200000

    #define     BA_SemaHub_full_ST_22i                         0x038E
    #define     B16SemaHub_full_ST_22i                         0x038E
    #define   LSb32SemaHub_full_ST_22i                            22
    #define   LSb16SemaHub_full_ST_22i                            6
    #define       bSemaHub_full_ST_22i                         1
    #define   MSK32SemaHub_full_ST_22i                            0x00400000

    #define     BA_SemaHub_full_ST_23i                         0x038E
    #define     B16SemaHub_full_ST_23i                         0x038E
    #define   LSb32SemaHub_full_ST_23i                            23
    #define   LSb16SemaHub_full_ST_23i                            7
    #define       bSemaHub_full_ST_23i                         1
    #define   MSK32SemaHub_full_ST_23i                            0x00800000

    #define     BA_SemaHub_full_ST_24i                         0x038F
    #define     B16SemaHub_full_ST_24i                         0x038E
    #define   LSb32SemaHub_full_ST_24i                            24
    #define   LSb16SemaHub_full_ST_24i                            8
    #define       bSemaHub_full_ST_24i                         1
    #define   MSK32SemaHub_full_ST_24i                            0x01000000

    #define     BA_SemaHub_full_ST_25i                         0x038F
    #define     B16SemaHub_full_ST_25i                         0x038E
    #define   LSb32SemaHub_full_ST_25i                            25
    #define   LSb16SemaHub_full_ST_25i                            9
    #define       bSemaHub_full_ST_25i                         1
    #define   MSK32SemaHub_full_ST_25i                            0x02000000

    #define     BA_SemaHub_full_ST_26i                         0x038F
    #define     B16SemaHub_full_ST_26i                         0x038E
    #define   LSb32SemaHub_full_ST_26i                            26
    #define   LSb16SemaHub_full_ST_26i                            10
    #define       bSemaHub_full_ST_26i                         1
    #define   MSK32SemaHub_full_ST_26i                            0x04000000

    #define     BA_SemaHub_full_ST_27i                         0x038F
    #define     B16SemaHub_full_ST_27i                         0x038E
    #define   LSb32SemaHub_full_ST_27i                            27
    #define   LSb16SemaHub_full_ST_27i                            11
    #define       bSemaHub_full_ST_27i                         1
    #define   MSK32SemaHub_full_ST_27i                            0x08000000

    #define     BA_SemaHub_full_ST_28i                         0x038F
    #define     B16SemaHub_full_ST_28i                         0x038E
    #define   LSb32SemaHub_full_ST_28i                            28
    #define   LSb16SemaHub_full_ST_28i                            12
    #define       bSemaHub_full_ST_28i                         1
    #define   MSK32SemaHub_full_ST_28i                            0x10000000

    #define     BA_SemaHub_full_ST_29i                         0x038F
    #define     B16SemaHub_full_ST_29i                         0x038E
    #define   LSb32SemaHub_full_ST_29i                            29
    #define   LSb16SemaHub_full_ST_29i                            13
    #define       bSemaHub_full_ST_29i                         1
    #define   MSK32SemaHub_full_ST_29i                            0x20000000

    #define     BA_SemaHub_full_ST_30i                         0x038F
    #define     B16SemaHub_full_ST_30i                         0x038E
    #define   LSb32SemaHub_full_ST_30i                            30
    #define   LSb16SemaHub_full_ST_30i                            14
    #define       bSemaHub_full_ST_30i                         1
    #define   MSK32SemaHub_full_ST_30i                            0x40000000

    #define     BA_SemaHub_full_ST_31i                         0x038F
    #define     B16SemaHub_full_ST_31i                         0x038E
    #define   LSb32SemaHub_full_ST_31i                            31
    #define   LSb16SemaHub_full_ST_31i                            15
    #define       bSemaHub_full_ST_31i                         1
    #define   MSK32SemaHub_full_ST_31i                            0x80000000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_almostEmpty                         0x0390

    #define     BA_SemaHub_almostEmpty_ST_0i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_0i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_0i                      0
    #define   LSb16SemaHub_almostEmpty_ST_0i                      0
    #define       bSemaHub_almostEmpty_ST_0i                   1
    #define   MSK32SemaHub_almostEmpty_ST_0i                      0x00000001

    #define     BA_SemaHub_almostEmpty_ST_1i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_1i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_1i                      1
    #define   LSb16SemaHub_almostEmpty_ST_1i                      1
    #define       bSemaHub_almostEmpty_ST_1i                   1
    #define   MSK32SemaHub_almostEmpty_ST_1i                      0x00000002

    #define     BA_SemaHub_almostEmpty_ST_2i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_2i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_2i                      2
    #define   LSb16SemaHub_almostEmpty_ST_2i                      2
    #define       bSemaHub_almostEmpty_ST_2i                   1
    #define   MSK32SemaHub_almostEmpty_ST_2i                      0x00000004

    #define     BA_SemaHub_almostEmpty_ST_3i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_3i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_3i                      3
    #define   LSb16SemaHub_almostEmpty_ST_3i                      3
    #define       bSemaHub_almostEmpty_ST_3i                   1
    #define   MSK32SemaHub_almostEmpty_ST_3i                      0x00000008

    #define     BA_SemaHub_almostEmpty_ST_4i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_4i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_4i                      4
    #define   LSb16SemaHub_almostEmpty_ST_4i                      4
    #define       bSemaHub_almostEmpty_ST_4i                   1
    #define   MSK32SemaHub_almostEmpty_ST_4i                      0x00000010

    #define     BA_SemaHub_almostEmpty_ST_5i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_5i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_5i                      5
    #define   LSb16SemaHub_almostEmpty_ST_5i                      5
    #define       bSemaHub_almostEmpty_ST_5i                   1
    #define   MSK32SemaHub_almostEmpty_ST_5i                      0x00000020

    #define     BA_SemaHub_almostEmpty_ST_6i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_6i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_6i                      6
    #define   LSb16SemaHub_almostEmpty_ST_6i                      6
    #define       bSemaHub_almostEmpty_ST_6i                   1
    #define   MSK32SemaHub_almostEmpty_ST_6i                      0x00000040

    #define     BA_SemaHub_almostEmpty_ST_7i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_7i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_7i                      7
    #define   LSb16SemaHub_almostEmpty_ST_7i                      7
    #define       bSemaHub_almostEmpty_ST_7i                   1
    #define   MSK32SemaHub_almostEmpty_ST_7i                      0x00000080

    #define     BA_SemaHub_almostEmpty_ST_8i                   0x0391
    #define     B16SemaHub_almostEmpty_ST_8i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_8i                      8
    #define   LSb16SemaHub_almostEmpty_ST_8i                      8
    #define       bSemaHub_almostEmpty_ST_8i                   1
    #define   MSK32SemaHub_almostEmpty_ST_8i                      0x00000100

    #define     BA_SemaHub_almostEmpty_ST_9i                   0x0391
    #define     B16SemaHub_almostEmpty_ST_9i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_9i                      9
    #define   LSb16SemaHub_almostEmpty_ST_9i                      9
    #define       bSemaHub_almostEmpty_ST_9i                   1
    #define   MSK32SemaHub_almostEmpty_ST_9i                      0x00000200

    #define     BA_SemaHub_almostEmpty_ST_10i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_10i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_10i                     10
    #define   LSb16SemaHub_almostEmpty_ST_10i                     10
    #define       bSemaHub_almostEmpty_ST_10i                  1
    #define   MSK32SemaHub_almostEmpty_ST_10i                     0x00000400

    #define     BA_SemaHub_almostEmpty_ST_11i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_11i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_11i                     11
    #define   LSb16SemaHub_almostEmpty_ST_11i                     11
    #define       bSemaHub_almostEmpty_ST_11i                  1
    #define   MSK32SemaHub_almostEmpty_ST_11i                     0x00000800

    #define     BA_SemaHub_almostEmpty_ST_12i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_12i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_12i                     12
    #define   LSb16SemaHub_almostEmpty_ST_12i                     12
    #define       bSemaHub_almostEmpty_ST_12i                  1
    #define   MSK32SemaHub_almostEmpty_ST_12i                     0x00001000

    #define     BA_SemaHub_almostEmpty_ST_13i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_13i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_13i                     13
    #define   LSb16SemaHub_almostEmpty_ST_13i                     13
    #define       bSemaHub_almostEmpty_ST_13i                  1
    #define   MSK32SemaHub_almostEmpty_ST_13i                     0x00002000

    #define     BA_SemaHub_almostEmpty_ST_14i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_14i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_14i                     14
    #define   LSb16SemaHub_almostEmpty_ST_14i                     14
    #define       bSemaHub_almostEmpty_ST_14i                  1
    #define   MSK32SemaHub_almostEmpty_ST_14i                     0x00004000

    #define     BA_SemaHub_almostEmpty_ST_15i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_15i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_15i                     15
    #define   LSb16SemaHub_almostEmpty_ST_15i                     15
    #define       bSemaHub_almostEmpty_ST_15i                  1
    #define   MSK32SemaHub_almostEmpty_ST_15i                     0x00008000

    #define     BA_SemaHub_almostEmpty_ST_16i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_16i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_16i                     16
    #define   LSb16SemaHub_almostEmpty_ST_16i                     0
    #define       bSemaHub_almostEmpty_ST_16i                  1
    #define   MSK32SemaHub_almostEmpty_ST_16i                     0x00010000

    #define     BA_SemaHub_almostEmpty_ST_17i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_17i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_17i                     17
    #define   LSb16SemaHub_almostEmpty_ST_17i                     1
    #define       bSemaHub_almostEmpty_ST_17i                  1
    #define   MSK32SemaHub_almostEmpty_ST_17i                     0x00020000

    #define     BA_SemaHub_almostEmpty_ST_18i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_18i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_18i                     18
    #define   LSb16SemaHub_almostEmpty_ST_18i                     2
    #define       bSemaHub_almostEmpty_ST_18i                  1
    #define   MSK32SemaHub_almostEmpty_ST_18i                     0x00040000

    #define     BA_SemaHub_almostEmpty_ST_19i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_19i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_19i                     19
    #define   LSb16SemaHub_almostEmpty_ST_19i                     3
    #define       bSemaHub_almostEmpty_ST_19i                  1
    #define   MSK32SemaHub_almostEmpty_ST_19i                     0x00080000

    #define     BA_SemaHub_almostEmpty_ST_20i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_20i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_20i                     20
    #define   LSb16SemaHub_almostEmpty_ST_20i                     4
    #define       bSemaHub_almostEmpty_ST_20i                  1
    #define   MSK32SemaHub_almostEmpty_ST_20i                     0x00100000

    #define     BA_SemaHub_almostEmpty_ST_21i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_21i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_21i                     21
    #define   LSb16SemaHub_almostEmpty_ST_21i                     5
    #define       bSemaHub_almostEmpty_ST_21i                  1
    #define   MSK32SemaHub_almostEmpty_ST_21i                     0x00200000

    #define     BA_SemaHub_almostEmpty_ST_22i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_22i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_22i                     22
    #define   LSb16SemaHub_almostEmpty_ST_22i                     6
    #define       bSemaHub_almostEmpty_ST_22i                  1
    #define   MSK32SemaHub_almostEmpty_ST_22i                     0x00400000

    #define     BA_SemaHub_almostEmpty_ST_23i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_23i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_23i                     23
    #define   LSb16SemaHub_almostEmpty_ST_23i                     7
    #define       bSemaHub_almostEmpty_ST_23i                  1
    #define   MSK32SemaHub_almostEmpty_ST_23i                     0x00800000

    #define     BA_SemaHub_almostEmpty_ST_24i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_24i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_24i                     24
    #define   LSb16SemaHub_almostEmpty_ST_24i                     8
    #define       bSemaHub_almostEmpty_ST_24i                  1
    #define   MSK32SemaHub_almostEmpty_ST_24i                     0x01000000

    #define     BA_SemaHub_almostEmpty_ST_25i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_25i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_25i                     25
    #define   LSb16SemaHub_almostEmpty_ST_25i                     9
    #define       bSemaHub_almostEmpty_ST_25i                  1
    #define   MSK32SemaHub_almostEmpty_ST_25i                     0x02000000

    #define     BA_SemaHub_almostEmpty_ST_26i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_26i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_26i                     26
    #define   LSb16SemaHub_almostEmpty_ST_26i                     10
    #define       bSemaHub_almostEmpty_ST_26i                  1
    #define   MSK32SemaHub_almostEmpty_ST_26i                     0x04000000

    #define     BA_SemaHub_almostEmpty_ST_27i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_27i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_27i                     27
    #define   LSb16SemaHub_almostEmpty_ST_27i                     11
    #define       bSemaHub_almostEmpty_ST_27i                  1
    #define   MSK32SemaHub_almostEmpty_ST_27i                     0x08000000

    #define     BA_SemaHub_almostEmpty_ST_28i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_28i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_28i                     28
    #define   LSb16SemaHub_almostEmpty_ST_28i                     12
    #define       bSemaHub_almostEmpty_ST_28i                  1
    #define   MSK32SemaHub_almostEmpty_ST_28i                     0x10000000

    #define     BA_SemaHub_almostEmpty_ST_29i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_29i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_29i                     29
    #define   LSb16SemaHub_almostEmpty_ST_29i                     13
    #define       bSemaHub_almostEmpty_ST_29i                  1
    #define   MSK32SemaHub_almostEmpty_ST_29i                     0x20000000

    #define     BA_SemaHub_almostEmpty_ST_30i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_30i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_30i                     30
    #define   LSb16SemaHub_almostEmpty_ST_30i                     14
    #define       bSemaHub_almostEmpty_ST_30i                  1
    #define   MSK32SemaHub_almostEmpty_ST_30i                     0x40000000

    #define     BA_SemaHub_almostEmpty_ST_31i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_31i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_31i                     31
    #define   LSb16SemaHub_almostEmpty_ST_31i                     15
    #define       bSemaHub_almostEmpty_ST_31i                  1
    #define   MSK32SemaHub_almostEmpty_ST_31i                     0x80000000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_almostFull                          0x0394

    #define     BA_SemaHub_almostFull_ST_0i                    0x0394
    #define     B16SemaHub_almostFull_ST_0i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_0i                       0
    #define   LSb16SemaHub_almostFull_ST_0i                       0
    #define       bSemaHub_almostFull_ST_0i                    1
    #define   MSK32SemaHub_almostFull_ST_0i                       0x00000001

    #define     BA_SemaHub_almostFull_ST_1i                    0x0394
    #define     B16SemaHub_almostFull_ST_1i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_1i                       1
    #define   LSb16SemaHub_almostFull_ST_1i                       1
    #define       bSemaHub_almostFull_ST_1i                    1
    #define   MSK32SemaHub_almostFull_ST_1i                       0x00000002

    #define     BA_SemaHub_almostFull_ST_2i                    0x0394
    #define     B16SemaHub_almostFull_ST_2i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_2i                       2
    #define   LSb16SemaHub_almostFull_ST_2i                       2
    #define       bSemaHub_almostFull_ST_2i                    1
    #define   MSK32SemaHub_almostFull_ST_2i                       0x00000004

    #define     BA_SemaHub_almostFull_ST_3i                    0x0394
    #define     B16SemaHub_almostFull_ST_3i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_3i                       3
    #define   LSb16SemaHub_almostFull_ST_3i                       3
    #define       bSemaHub_almostFull_ST_3i                    1
    #define   MSK32SemaHub_almostFull_ST_3i                       0x00000008

    #define     BA_SemaHub_almostFull_ST_4i                    0x0394
    #define     B16SemaHub_almostFull_ST_4i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_4i                       4
    #define   LSb16SemaHub_almostFull_ST_4i                       4
    #define       bSemaHub_almostFull_ST_4i                    1
    #define   MSK32SemaHub_almostFull_ST_4i                       0x00000010

    #define     BA_SemaHub_almostFull_ST_5i                    0x0394
    #define     B16SemaHub_almostFull_ST_5i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_5i                       5
    #define   LSb16SemaHub_almostFull_ST_5i                       5
    #define       bSemaHub_almostFull_ST_5i                    1
    #define   MSK32SemaHub_almostFull_ST_5i                       0x00000020

    #define     BA_SemaHub_almostFull_ST_6i                    0x0394
    #define     B16SemaHub_almostFull_ST_6i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_6i                       6
    #define   LSb16SemaHub_almostFull_ST_6i                       6
    #define       bSemaHub_almostFull_ST_6i                    1
    #define   MSK32SemaHub_almostFull_ST_6i                       0x00000040

    #define     BA_SemaHub_almostFull_ST_7i                    0x0394
    #define     B16SemaHub_almostFull_ST_7i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_7i                       7
    #define   LSb16SemaHub_almostFull_ST_7i                       7
    #define       bSemaHub_almostFull_ST_7i                    1
    #define   MSK32SemaHub_almostFull_ST_7i                       0x00000080

    #define     BA_SemaHub_almostFull_ST_8i                    0x0395
    #define     B16SemaHub_almostFull_ST_8i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_8i                       8
    #define   LSb16SemaHub_almostFull_ST_8i                       8
    #define       bSemaHub_almostFull_ST_8i                    1
    #define   MSK32SemaHub_almostFull_ST_8i                       0x00000100

    #define     BA_SemaHub_almostFull_ST_9i                    0x0395
    #define     B16SemaHub_almostFull_ST_9i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_9i                       9
    #define   LSb16SemaHub_almostFull_ST_9i                       9
    #define       bSemaHub_almostFull_ST_9i                    1
    #define   MSK32SemaHub_almostFull_ST_9i                       0x00000200

    #define     BA_SemaHub_almostFull_ST_10i                   0x0395
    #define     B16SemaHub_almostFull_ST_10i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_10i                      10
    #define   LSb16SemaHub_almostFull_ST_10i                      10
    #define       bSemaHub_almostFull_ST_10i                   1
    #define   MSK32SemaHub_almostFull_ST_10i                      0x00000400

    #define     BA_SemaHub_almostFull_ST_11i                   0x0395
    #define     B16SemaHub_almostFull_ST_11i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_11i                      11
    #define   LSb16SemaHub_almostFull_ST_11i                      11
    #define       bSemaHub_almostFull_ST_11i                   1
    #define   MSK32SemaHub_almostFull_ST_11i                      0x00000800

    #define     BA_SemaHub_almostFull_ST_12i                   0x0395
    #define     B16SemaHub_almostFull_ST_12i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_12i                      12
    #define   LSb16SemaHub_almostFull_ST_12i                      12
    #define       bSemaHub_almostFull_ST_12i                   1
    #define   MSK32SemaHub_almostFull_ST_12i                      0x00001000

    #define     BA_SemaHub_almostFull_ST_13i                   0x0395
    #define     B16SemaHub_almostFull_ST_13i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_13i                      13
    #define   LSb16SemaHub_almostFull_ST_13i                      13
    #define       bSemaHub_almostFull_ST_13i                   1
    #define   MSK32SemaHub_almostFull_ST_13i                      0x00002000

    #define     BA_SemaHub_almostFull_ST_14i                   0x0395
    #define     B16SemaHub_almostFull_ST_14i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_14i                      14
    #define   LSb16SemaHub_almostFull_ST_14i                      14
    #define       bSemaHub_almostFull_ST_14i                   1
    #define   MSK32SemaHub_almostFull_ST_14i                      0x00004000

    #define     BA_SemaHub_almostFull_ST_15i                   0x0395
    #define     B16SemaHub_almostFull_ST_15i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_15i                      15
    #define   LSb16SemaHub_almostFull_ST_15i                      15
    #define       bSemaHub_almostFull_ST_15i                   1
    #define   MSK32SemaHub_almostFull_ST_15i                      0x00008000

    #define     BA_SemaHub_almostFull_ST_16i                   0x0396
    #define     B16SemaHub_almostFull_ST_16i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_16i                      16
    #define   LSb16SemaHub_almostFull_ST_16i                      0
    #define       bSemaHub_almostFull_ST_16i                   1
    #define   MSK32SemaHub_almostFull_ST_16i                      0x00010000

    #define     BA_SemaHub_almostFull_ST_17i                   0x0396
    #define     B16SemaHub_almostFull_ST_17i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_17i                      17
    #define   LSb16SemaHub_almostFull_ST_17i                      1
    #define       bSemaHub_almostFull_ST_17i                   1
    #define   MSK32SemaHub_almostFull_ST_17i                      0x00020000

    #define     BA_SemaHub_almostFull_ST_18i                   0x0396
    #define     B16SemaHub_almostFull_ST_18i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_18i                      18
    #define   LSb16SemaHub_almostFull_ST_18i                      2
    #define       bSemaHub_almostFull_ST_18i                   1
    #define   MSK32SemaHub_almostFull_ST_18i                      0x00040000

    #define     BA_SemaHub_almostFull_ST_19i                   0x0396
    #define     B16SemaHub_almostFull_ST_19i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_19i                      19
    #define   LSb16SemaHub_almostFull_ST_19i                      3
    #define       bSemaHub_almostFull_ST_19i                   1
    #define   MSK32SemaHub_almostFull_ST_19i                      0x00080000

    #define     BA_SemaHub_almostFull_ST_20i                   0x0396
    #define     B16SemaHub_almostFull_ST_20i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_20i                      20
    #define   LSb16SemaHub_almostFull_ST_20i                      4
    #define       bSemaHub_almostFull_ST_20i                   1
    #define   MSK32SemaHub_almostFull_ST_20i                      0x00100000

    #define     BA_SemaHub_almostFull_ST_21i                   0x0396
    #define     B16SemaHub_almostFull_ST_21i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_21i                      21
    #define   LSb16SemaHub_almostFull_ST_21i                      5
    #define       bSemaHub_almostFull_ST_21i                   1
    #define   MSK32SemaHub_almostFull_ST_21i                      0x00200000

    #define     BA_SemaHub_almostFull_ST_22i                   0x0396
    #define     B16SemaHub_almostFull_ST_22i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_22i                      22
    #define   LSb16SemaHub_almostFull_ST_22i                      6
    #define       bSemaHub_almostFull_ST_22i                   1
    #define   MSK32SemaHub_almostFull_ST_22i                      0x00400000

    #define     BA_SemaHub_almostFull_ST_23i                   0x0396
    #define     B16SemaHub_almostFull_ST_23i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_23i                      23
    #define   LSb16SemaHub_almostFull_ST_23i                      7
    #define       bSemaHub_almostFull_ST_23i                   1
    #define   MSK32SemaHub_almostFull_ST_23i                      0x00800000

    #define     BA_SemaHub_almostFull_ST_24i                   0x0397
    #define     B16SemaHub_almostFull_ST_24i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_24i                      24
    #define   LSb16SemaHub_almostFull_ST_24i                      8
    #define       bSemaHub_almostFull_ST_24i                   1
    #define   MSK32SemaHub_almostFull_ST_24i                      0x01000000

    #define     BA_SemaHub_almostFull_ST_25i                   0x0397
    #define     B16SemaHub_almostFull_ST_25i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_25i                      25
    #define   LSb16SemaHub_almostFull_ST_25i                      9
    #define       bSemaHub_almostFull_ST_25i                   1
    #define   MSK32SemaHub_almostFull_ST_25i                      0x02000000

    #define     BA_SemaHub_almostFull_ST_26i                   0x0397
    #define     B16SemaHub_almostFull_ST_26i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_26i                      26
    #define   LSb16SemaHub_almostFull_ST_26i                      10
    #define       bSemaHub_almostFull_ST_26i                   1
    #define   MSK32SemaHub_almostFull_ST_26i                      0x04000000

    #define     BA_SemaHub_almostFull_ST_27i                   0x0397
    #define     B16SemaHub_almostFull_ST_27i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_27i                      27
    #define   LSb16SemaHub_almostFull_ST_27i                      11
    #define       bSemaHub_almostFull_ST_27i                   1
    #define   MSK32SemaHub_almostFull_ST_27i                      0x08000000

    #define     BA_SemaHub_almostFull_ST_28i                   0x0397
    #define     B16SemaHub_almostFull_ST_28i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_28i                      28
    #define   LSb16SemaHub_almostFull_ST_28i                      12
    #define       bSemaHub_almostFull_ST_28i                   1
    #define   MSK32SemaHub_almostFull_ST_28i                      0x10000000

    #define     BA_SemaHub_almostFull_ST_29i                   0x0397
    #define     B16SemaHub_almostFull_ST_29i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_29i                      29
    #define   LSb16SemaHub_almostFull_ST_29i                      13
    #define       bSemaHub_almostFull_ST_29i                   1
    #define   MSK32SemaHub_almostFull_ST_29i                      0x20000000

    #define     BA_SemaHub_almostFull_ST_30i                   0x0397
    #define     B16SemaHub_almostFull_ST_30i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_30i                      30
    #define   LSb16SemaHub_almostFull_ST_30i                      14
    #define       bSemaHub_almostFull_ST_30i                   1
    #define   MSK32SemaHub_almostFull_ST_30i                      0x40000000

    #define     BA_SemaHub_almostFull_ST_31i                   0x0397
    #define     B16SemaHub_almostFull_ST_31i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_31i                      31
    #define   LSb16SemaHub_almostFull_ST_31i                      15
    #define       bSemaHub_almostFull_ST_31i                   1
    #define   MSK32SemaHub_almostFull_ST_31i                      0x80000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaHub {
    ///////////////////////////////////////////////////////////
              SIE_SemaQuery                                    ie_counter[64];
    ///////////////////////////////////////////////////////////
              SIE_Semaphore                                    ie_cell[32];
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_PUSH_ID(r32)                        _BFGET_(r32, 7, 0)
    #define   SET32SemaHub_PUSH_ID(r32,v)                      _BFSET_(r32, 7, 0,v)
    #define   GET16SemaHub_PUSH_ID(r16)                        _BFGET_(r16, 7, 0)
    #define   SET16SemaHub_PUSH_ID(r16,v)                      _BFSET_(r16, 7, 0,v)

    #define   GET32SemaHub_PUSH_delta(r32)                     _BFGET_(r32,15, 8)
    #define   SET32SemaHub_PUSH_delta(r32,v)                   _BFSET_(r32,15, 8,v)
    #define   GET16SemaHub_PUSH_delta(r16)                     _BFGET_(r16,15, 8)
    #define   SET16SemaHub_PUSH_delta(r16,v)                   _BFSET_(r16,15, 8,v)

    #define     w32SemaHub_PUSH                                {\
            UNSG32 uPUSH_ID                                    :  8;\
            UNSG32 uPUSH_delta                                 :  8;\
            UNSG32 RSVDx380_b16                                : 16;\
          }
    union { UNSG32 u32SemaHub_PUSH;
            struct w32SemaHub_PUSH;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_POP_ID(r32)                         _BFGET_(r32, 7, 0)
    #define   SET32SemaHub_POP_ID(r32,v)                       _BFSET_(r32, 7, 0,v)
    #define   GET16SemaHub_POP_ID(r16)                         _BFGET_(r16, 7, 0)
    #define   SET16SemaHub_POP_ID(r16,v)                       _BFSET_(r16, 7, 0,v)

    #define   GET32SemaHub_POP_delta(r32)                      _BFGET_(r32,15, 8)
    #define   SET32SemaHub_POP_delta(r32,v)                    _BFSET_(r32,15, 8,v)
    #define   GET16SemaHub_POP_delta(r16)                      _BFGET_(r16,15, 8)
    #define   SET16SemaHub_POP_delta(r16,v)                    _BFSET_(r16,15, 8,v)

    #define     w32SemaHub_POP                                 {\
            UNSG32 uPOP_ID                                     :  8;\
            UNSG32 uPOP_delta                                  :  8;\
            UNSG32 RSVDx384_b16                                : 16;\
          }
    union { UNSG32 u32SemaHub_POP;
            struct w32SemaHub_POP;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_empty_ST_0i(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32SemaHub_empty_ST_0i(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16SemaHub_empty_ST_0i(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_empty_ST_0i(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_empty_ST_1i(r32)                    _BFGET_(r32, 1, 1)
    #define   SET32SemaHub_empty_ST_1i(r32,v)                  _BFSET_(r32, 1, 1,v)
    #define   GET16SemaHub_empty_ST_1i(r16)                    _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_empty_ST_1i(r16,v)                  _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_empty_ST_2i(r32)                    _BFGET_(r32, 2, 2)
    #define   SET32SemaHub_empty_ST_2i(r32,v)                  _BFSET_(r32, 2, 2,v)
    #define   GET16SemaHub_empty_ST_2i(r16)                    _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_empty_ST_2i(r16,v)                  _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_empty_ST_3i(r32)                    _BFGET_(r32, 3, 3)
    #define   SET32SemaHub_empty_ST_3i(r32,v)                  _BFSET_(r32, 3, 3,v)
    #define   GET16SemaHub_empty_ST_3i(r16)                    _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_empty_ST_3i(r16,v)                  _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_empty_ST_4i(r32)                    _BFGET_(r32, 4, 4)
    #define   SET32SemaHub_empty_ST_4i(r32,v)                  _BFSET_(r32, 4, 4,v)
    #define   GET16SemaHub_empty_ST_4i(r16)                    _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_empty_ST_4i(r16,v)                  _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_empty_ST_5i(r32)                    _BFGET_(r32, 5, 5)
    #define   SET32SemaHub_empty_ST_5i(r32,v)                  _BFSET_(r32, 5, 5,v)
    #define   GET16SemaHub_empty_ST_5i(r16)                    _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_empty_ST_5i(r16,v)                  _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_empty_ST_6i(r32)                    _BFGET_(r32, 6, 6)
    #define   SET32SemaHub_empty_ST_6i(r32,v)                  _BFSET_(r32, 6, 6,v)
    #define   GET16SemaHub_empty_ST_6i(r16)                    _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_empty_ST_6i(r16,v)                  _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_empty_ST_7i(r32)                    _BFGET_(r32, 7, 7)
    #define   SET32SemaHub_empty_ST_7i(r32,v)                  _BFSET_(r32, 7, 7,v)
    #define   GET16SemaHub_empty_ST_7i(r16)                    _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_empty_ST_7i(r16,v)                  _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_empty_ST_8i(r32)                    _BFGET_(r32, 8, 8)
    #define   SET32SemaHub_empty_ST_8i(r32,v)                  _BFSET_(r32, 8, 8,v)
    #define   GET16SemaHub_empty_ST_8i(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_empty_ST_8i(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_empty_ST_9i(r32)                    _BFGET_(r32, 9, 9)
    #define   SET32SemaHub_empty_ST_9i(r32,v)                  _BFSET_(r32, 9, 9,v)
    #define   GET16SemaHub_empty_ST_9i(r16)                    _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_empty_ST_9i(r16,v)                  _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_empty_ST_10i(r32)                   _BFGET_(r32,10,10)
    #define   SET32SemaHub_empty_ST_10i(r32,v)                 _BFSET_(r32,10,10,v)
    #define   GET16SemaHub_empty_ST_10i(r16)                   _BFGET_(r16,10,10)
    #define   SET16SemaHub_empty_ST_10i(r16,v)                 _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_empty_ST_11i(r32)                   _BFGET_(r32,11,11)
    #define   SET32SemaHub_empty_ST_11i(r32,v)                 _BFSET_(r32,11,11,v)
    #define   GET16SemaHub_empty_ST_11i(r16)                   _BFGET_(r16,11,11)
    #define   SET16SemaHub_empty_ST_11i(r16,v)                 _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_empty_ST_12i(r32)                   _BFGET_(r32,12,12)
    #define   SET32SemaHub_empty_ST_12i(r32,v)                 _BFSET_(r32,12,12,v)
    #define   GET16SemaHub_empty_ST_12i(r16)                   _BFGET_(r16,12,12)
    #define   SET16SemaHub_empty_ST_12i(r16,v)                 _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_empty_ST_13i(r32)                   _BFGET_(r32,13,13)
    #define   SET32SemaHub_empty_ST_13i(r32,v)                 _BFSET_(r32,13,13,v)
    #define   GET16SemaHub_empty_ST_13i(r16)                   _BFGET_(r16,13,13)
    #define   SET16SemaHub_empty_ST_13i(r16,v)                 _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_empty_ST_14i(r32)                   _BFGET_(r32,14,14)
    #define   SET32SemaHub_empty_ST_14i(r32,v)                 _BFSET_(r32,14,14,v)
    #define   GET16SemaHub_empty_ST_14i(r16)                   _BFGET_(r16,14,14)
    #define   SET16SemaHub_empty_ST_14i(r16,v)                 _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_empty_ST_15i(r32)                   _BFGET_(r32,15,15)
    #define   SET32SemaHub_empty_ST_15i(r32,v)                 _BFSET_(r32,15,15,v)
    #define   GET16SemaHub_empty_ST_15i(r16)                   _BFGET_(r16,15,15)
    #define   SET16SemaHub_empty_ST_15i(r16,v)                 _BFSET_(r16,15,15,v)

    #define   GET32SemaHub_empty_ST_16i(r32)                   _BFGET_(r32,16,16)
    #define   SET32SemaHub_empty_ST_16i(r32,v)                 _BFSET_(r32,16,16,v)
    #define   GET16SemaHub_empty_ST_16i(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_empty_ST_16i(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_empty_ST_17i(r32)                   _BFGET_(r32,17,17)
    #define   SET32SemaHub_empty_ST_17i(r32,v)                 _BFSET_(r32,17,17,v)
    #define   GET16SemaHub_empty_ST_17i(r16)                   _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_empty_ST_17i(r16,v)                 _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_empty_ST_18i(r32)                   _BFGET_(r32,18,18)
    #define   SET32SemaHub_empty_ST_18i(r32,v)                 _BFSET_(r32,18,18,v)
    #define   GET16SemaHub_empty_ST_18i(r16)                   _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_empty_ST_18i(r16,v)                 _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_empty_ST_19i(r32)                   _BFGET_(r32,19,19)
    #define   SET32SemaHub_empty_ST_19i(r32,v)                 _BFSET_(r32,19,19,v)
    #define   GET16SemaHub_empty_ST_19i(r16)                   _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_empty_ST_19i(r16,v)                 _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_empty_ST_20i(r32)                   _BFGET_(r32,20,20)
    #define   SET32SemaHub_empty_ST_20i(r32,v)                 _BFSET_(r32,20,20,v)
    #define   GET16SemaHub_empty_ST_20i(r16)                   _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_empty_ST_20i(r16,v)                 _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_empty_ST_21i(r32)                   _BFGET_(r32,21,21)
    #define   SET32SemaHub_empty_ST_21i(r32,v)                 _BFSET_(r32,21,21,v)
    #define   GET16SemaHub_empty_ST_21i(r16)                   _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_empty_ST_21i(r16,v)                 _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_empty_ST_22i(r32)                   _BFGET_(r32,22,22)
    #define   SET32SemaHub_empty_ST_22i(r32,v)                 _BFSET_(r32,22,22,v)
    #define   GET16SemaHub_empty_ST_22i(r16)                   _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_empty_ST_22i(r16,v)                 _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_empty_ST_23i(r32)                   _BFGET_(r32,23,23)
    #define   SET32SemaHub_empty_ST_23i(r32,v)                 _BFSET_(r32,23,23,v)
    #define   GET16SemaHub_empty_ST_23i(r16)                   _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_empty_ST_23i(r16,v)                 _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_empty_ST_24i(r32)                   _BFGET_(r32,24,24)
    #define   SET32SemaHub_empty_ST_24i(r32,v)                 _BFSET_(r32,24,24,v)
    #define   GET16SemaHub_empty_ST_24i(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_empty_ST_24i(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_empty_ST_25i(r32)                   _BFGET_(r32,25,25)
    #define   SET32SemaHub_empty_ST_25i(r32,v)                 _BFSET_(r32,25,25,v)
    #define   GET16SemaHub_empty_ST_25i(r16)                   _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_empty_ST_25i(r16,v)                 _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_empty_ST_26i(r32)                   _BFGET_(r32,26,26)
    #define   SET32SemaHub_empty_ST_26i(r32,v)                 _BFSET_(r32,26,26,v)
    #define   GET16SemaHub_empty_ST_26i(r16)                   _BFGET_(r16,10,10)
    #define   SET16SemaHub_empty_ST_26i(r16,v)                 _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_empty_ST_27i(r32)                   _BFGET_(r32,27,27)
    #define   SET32SemaHub_empty_ST_27i(r32,v)                 _BFSET_(r32,27,27,v)
    #define   GET16SemaHub_empty_ST_27i(r16)                   _BFGET_(r16,11,11)
    #define   SET16SemaHub_empty_ST_27i(r16,v)                 _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_empty_ST_28i(r32)                   _BFGET_(r32,28,28)
    #define   SET32SemaHub_empty_ST_28i(r32,v)                 _BFSET_(r32,28,28,v)
    #define   GET16SemaHub_empty_ST_28i(r16)                   _BFGET_(r16,12,12)
    #define   SET16SemaHub_empty_ST_28i(r16,v)                 _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_empty_ST_29i(r32)                   _BFGET_(r32,29,29)
    #define   SET32SemaHub_empty_ST_29i(r32,v)                 _BFSET_(r32,29,29,v)
    #define   GET16SemaHub_empty_ST_29i(r16)                   _BFGET_(r16,13,13)
    #define   SET16SemaHub_empty_ST_29i(r16,v)                 _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_empty_ST_30i(r32)                   _BFGET_(r32,30,30)
    #define   SET32SemaHub_empty_ST_30i(r32,v)                 _BFSET_(r32,30,30,v)
    #define   GET16SemaHub_empty_ST_30i(r16)                   _BFGET_(r16,14,14)
    #define   SET16SemaHub_empty_ST_30i(r16,v)                 _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_empty_ST_31i(r32)                   _BFGET_(r32,31,31)
    #define   SET32SemaHub_empty_ST_31i(r32,v)                 _BFSET_(r32,31,31,v)
    #define   GET16SemaHub_empty_ST_31i(r16)                   _BFGET_(r16,15,15)
    #define   SET16SemaHub_empty_ST_31i(r16,v)                 _BFSET_(r16,15,15,v)

    #define     w32SemaHub_empty                               {\
            UNSG32 uempty_ST_0i                                :  1;\
            UNSG32 uempty_ST_1i                                :  1;\
            UNSG32 uempty_ST_2i                                :  1;\
            UNSG32 uempty_ST_3i                                :  1;\
            UNSG32 uempty_ST_4i                                :  1;\
            UNSG32 uempty_ST_5i                                :  1;\
            UNSG32 uempty_ST_6i                                :  1;\
            UNSG32 uempty_ST_7i                                :  1;\
            UNSG32 uempty_ST_8i                                :  1;\
            UNSG32 uempty_ST_9i                                :  1;\
            UNSG32 uempty_ST_10i                               :  1;\
            UNSG32 uempty_ST_11i                               :  1;\
            UNSG32 uempty_ST_12i                               :  1;\
            UNSG32 uempty_ST_13i                               :  1;\
            UNSG32 uempty_ST_14i                               :  1;\
            UNSG32 uempty_ST_15i                               :  1;\
            UNSG32 uempty_ST_16i                               :  1;\
            UNSG32 uempty_ST_17i                               :  1;\
            UNSG32 uempty_ST_18i                               :  1;\
            UNSG32 uempty_ST_19i                               :  1;\
            UNSG32 uempty_ST_20i                               :  1;\
            UNSG32 uempty_ST_21i                               :  1;\
            UNSG32 uempty_ST_22i                               :  1;\
            UNSG32 uempty_ST_23i                               :  1;\
            UNSG32 uempty_ST_24i                               :  1;\
            UNSG32 uempty_ST_25i                               :  1;\
            UNSG32 uempty_ST_26i                               :  1;\
            UNSG32 uempty_ST_27i                               :  1;\
            UNSG32 uempty_ST_28i                               :  1;\
            UNSG32 uempty_ST_29i                               :  1;\
            UNSG32 uempty_ST_30i                               :  1;\
            UNSG32 uempty_ST_31i                               :  1;\
          }
    union { UNSG32 u32SemaHub_empty;
            struct w32SemaHub_empty;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_full_ST_0i(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32SemaHub_full_ST_0i(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16SemaHub_full_ST_0i(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_full_ST_0i(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_full_ST_1i(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32SemaHub_full_ST_1i(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16SemaHub_full_ST_1i(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_full_ST_1i(r16,v)                   _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_full_ST_2i(r32)                     _BFGET_(r32, 2, 2)
    #define   SET32SemaHub_full_ST_2i(r32,v)                   _BFSET_(r32, 2, 2,v)
    #define   GET16SemaHub_full_ST_2i(r16)                     _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_full_ST_2i(r16,v)                   _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_full_ST_3i(r32)                     _BFGET_(r32, 3, 3)
    #define   SET32SemaHub_full_ST_3i(r32,v)                   _BFSET_(r32, 3, 3,v)
    #define   GET16SemaHub_full_ST_3i(r16)                     _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_full_ST_3i(r16,v)                   _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_full_ST_4i(r32)                     _BFGET_(r32, 4, 4)
    #define   SET32SemaHub_full_ST_4i(r32,v)                   _BFSET_(r32, 4, 4,v)
    #define   GET16SemaHub_full_ST_4i(r16)                     _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_full_ST_4i(r16,v)                   _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_full_ST_5i(r32)                     _BFGET_(r32, 5, 5)
    #define   SET32SemaHub_full_ST_5i(r32,v)                   _BFSET_(r32, 5, 5,v)
    #define   GET16SemaHub_full_ST_5i(r16)                     _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_full_ST_5i(r16,v)                   _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_full_ST_6i(r32)                     _BFGET_(r32, 6, 6)
    #define   SET32SemaHub_full_ST_6i(r32,v)                   _BFSET_(r32, 6, 6,v)
    #define   GET16SemaHub_full_ST_6i(r16)                     _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_full_ST_6i(r16,v)                   _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_full_ST_7i(r32)                     _BFGET_(r32, 7, 7)
    #define   SET32SemaHub_full_ST_7i(r32,v)                   _BFSET_(r32, 7, 7,v)
    #define   GET16SemaHub_full_ST_7i(r16)                     _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_full_ST_7i(r16,v)                   _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_full_ST_8i(r32)                     _BFGET_(r32, 8, 8)
    #define   SET32SemaHub_full_ST_8i(r32,v)                   _BFSET_(r32, 8, 8,v)
    #define   GET16SemaHub_full_ST_8i(r16)                     _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_full_ST_8i(r16,v)                   _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_full_ST_9i(r32)                     _BFGET_(r32, 9, 9)
    #define   SET32SemaHub_full_ST_9i(r32,v)                   _BFSET_(r32, 9, 9,v)
    #define   GET16SemaHub_full_ST_9i(r16)                     _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_full_ST_9i(r16,v)                   _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_full_ST_10i(r32)                    _BFGET_(r32,10,10)
    #define   SET32SemaHub_full_ST_10i(r32,v)                  _BFSET_(r32,10,10,v)
    #define   GET16SemaHub_full_ST_10i(r16)                    _BFGET_(r16,10,10)
    #define   SET16SemaHub_full_ST_10i(r16,v)                  _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_full_ST_11i(r32)                    _BFGET_(r32,11,11)
    #define   SET32SemaHub_full_ST_11i(r32,v)                  _BFSET_(r32,11,11,v)
    #define   GET16SemaHub_full_ST_11i(r16)                    _BFGET_(r16,11,11)
    #define   SET16SemaHub_full_ST_11i(r16,v)                  _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_full_ST_12i(r32)                    _BFGET_(r32,12,12)
    #define   SET32SemaHub_full_ST_12i(r32,v)                  _BFSET_(r32,12,12,v)
    #define   GET16SemaHub_full_ST_12i(r16)                    _BFGET_(r16,12,12)
    #define   SET16SemaHub_full_ST_12i(r16,v)                  _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_full_ST_13i(r32)                    _BFGET_(r32,13,13)
    #define   SET32SemaHub_full_ST_13i(r32,v)                  _BFSET_(r32,13,13,v)
    #define   GET16SemaHub_full_ST_13i(r16)                    _BFGET_(r16,13,13)
    #define   SET16SemaHub_full_ST_13i(r16,v)                  _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_full_ST_14i(r32)                    _BFGET_(r32,14,14)
    #define   SET32SemaHub_full_ST_14i(r32,v)                  _BFSET_(r32,14,14,v)
    #define   GET16SemaHub_full_ST_14i(r16)                    _BFGET_(r16,14,14)
    #define   SET16SemaHub_full_ST_14i(r16,v)                  _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_full_ST_15i(r32)                    _BFGET_(r32,15,15)
    #define   SET32SemaHub_full_ST_15i(r32,v)                  _BFSET_(r32,15,15,v)
    #define   GET16SemaHub_full_ST_15i(r16)                    _BFGET_(r16,15,15)
    #define   SET16SemaHub_full_ST_15i(r16,v)                  _BFSET_(r16,15,15,v)

    #define   GET32SemaHub_full_ST_16i(r32)                    _BFGET_(r32,16,16)
    #define   SET32SemaHub_full_ST_16i(r32,v)                  _BFSET_(r32,16,16,v)
    #define   GET16SemaHub_full_ST_16i(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_full_ST_16i(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_full_ST_17i(r32)                    _BFGET_(r32,17,17)
    #define   SET32SemaHub_full_ST_17i(r32,v)                  _BFSET_(r32,17,17,v)
    #define   GET16SemaHub_full_ST_17i(r16)                    _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_full_ST_17i(r16,v)                  _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_full_ST_18i(r32)                    _BFGET_(r32,18,18)
    #define   SET32SemaHub_full_ST_18i(r32,v)                  _BFSET_(r32,18,18,v)
    #define   GET16SemaHub_full_ST_18i(r16)                    _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_full_ST_18i(r16,v)                  _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_full_ST_19i(r32)                    _BFGET_(r32,19,19)
    #define   SET32SemaHub_full_ST_19i(r32,v)                  _BFSET_(r32,19,19,v)
    #define   GET16SemaHub_full_ST_19i(r16)                    _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_full_ST_19i(r16,v)                  _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_full_ST_20i(r32)                    _BFGET_(r32,20,20)
    #define   SET32SemaHub_full_ST_20i(r32,v)                  _BFSET_(r32,20,20,v)
    #define   GET16SemaHub_full_ST_20i(r16)                    _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_full_ST_20i(r16,v)                  _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_full_ST_21i(r32)                    _BFGET_(r32,21,21)
    #define   SET32SemaHub_full_ST_21i(r32,v)                  _BFSET_(r32,21,21,v)
    #define   GET16SemaHub_full_ST_21i(r16)                    _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_full_ST_21i(r16,v)                  _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_full_ST_22i(r32)                    _BFGET_(r32,22,22)
    #define   SET32SemaHub_full_ST_22i(r32,v)                  _BFSET_(r32,22,22,v)
    #define   GET16SemaHub_full_ST_22i(r16)                    _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_full_ST_22i(r16,v)                  _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_full_ST_23i(r32)                    _BFGET_(r32,23,23)
    #define   SET32SemaHub_full_ST_23i(r32,v)                  _BFSET_(r32,23,23,v)
    #define   GET16SemaHub_full_ST_23i(r16)                    _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_full_ST_23i(r16,v)                  _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_full_ST_24i(r32)                    _BFGET_(r32,24,24)
    #define   SET32SemaHub_full_ST_24i(r32,v)                  _BFSET_(r32,24,24,v)
    #define   GET16SemaHub_full_ST_24i(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_full_ST_24i(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_full_ST_25i(r32)                    _BFGET_(r32,25,25)
    #define   SET32SemaHub_full_ST_25i(r32,v)                  _BFSET_(r32,25,25,v)
    #define   GET16SemaHub_full_ST_25i(r16)                    _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_full_ST_25i(r16,v)                  _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_full_ST_26i(r32)                    _BFGET_(r32,26,26)
    #define   SET32SemaHub_full_ST_26i(r32,v)                  _BFSET_(r32,26,26,v)
    #define   GET16SemaHub_full_ST_26i(r16)                    _BFGET_(r16,10,10)
    #define   SET16SemaHub_full_ST_26i(r16,v)                  _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_full_ST_27i(r32)                    _BFGET_(r32,27,27)
    #define   SET32SemaHub_full_ST_27i(r32,v)                  _BFSET_(r32,27,27,v)
    #define   GET16SemaHub_full_ST_27i(r16)                    _BFGET_(r16,11,11)
    #define   SET16SemaHub_full_ST_27i(r16,v)                  _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_full_ST_28i(r32)                    _BFGET_(r32,28,28)
    #define   SET32SemaHub_full_ST_28i(r32,v)                  _BFSET_(r32,28,28,v)
    #define   GET16SemaHub_full_ST_28i(r16)                    _BFGET_(r16,12,12)
    #define   SET16SemaHub_full_ST_28i(r16,v)                  _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_full_ST_29i(r32)                    _BFGET_(r32,29,29)
    #define   SET32SemaHub_full_ST_29i(r32,v)                  _BFSET_(r32,29,29,v)
    #define   GET16SemaHub_full_ST_29i(r16)                    _BFGET_(r16,13,13)
    #define   SET16SemaHub_full_ST_29i(r16,v)                  _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_full_ST_30i(r32)                    _BFGET_(r32,30,30)
    #define   SET32SemaHub_full_ST_30i(r32,v)                  _BFSET_(r32,30,30,v)
    #define   GET16SemaHub_full_ST_30i(r16)                    _BFGET_(r16,14,14)
    #define   SET16SemaHub_full_ST_30i(r16,v)                  _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_full_ST_31i(r32)                    _BFGET_(r32,31,31)
    #define   SET32SemaHub_full_ST_31i(r32,v)                  _BFSET_(r32,31,31,v)
    #define   GET16SemaHub_full_ST_31i(r16)                    _BFGET_(r16,15,15)
    #define   SET16SemaHub_full_ST_31i(r16,v)                  _BFSET_(r16,15,15,v)

    #define     w32SemaHub_full                                {\
            UNSG32 ufull_ST_0i                                 :  1;\
            UNSG32 ufull_ST_1i                                 :  1;\
            UNSG32 ufull_ST_2i                                 :  1;\
            UNSG32 ufull_ST_3i                                 :  1;\
            UNSG32 ufull_ST_4i                                 :  1;\
            UNSG32 ufull_ST_5i                                 :  1;\
            UNSG32 ufull_ST_6i                                 :  1;\
            UNSG32 ufull_ST_7i                                 :  1;\
            UNSG32 ufull_ST_8i                                 :  1;\
            UNSG32 ufull_ST_9i                                 :  1;\
            UNSG32 ufull_ST_10i                                :  1;\
            UNSG32 ufull_ST_11i                                :  1;\
            UNSG32 ufull_ST_12i                                :  1;\
            UNSG32 ufull_ST_13i                                :  1;\
            UNSG32 ufull_ST_14i                                :  1;\
            UNSG32 ufull_ST_15i                                :  1;\
            UNSG32 ufull_ST_16i                                :  1;\
            UNSG32 ufull_ST_17i                                :  1;\
            UNSG32 ufull_ST_18i                                :  1;\
            UNSG32 ufull_ST_19i                                :  1;\
            UNSG32 ufull_ST_20i                                :  1;\
            UNSG32 ufull_ST_21i                                :  1;\
            UNSG32 ufull_ST_22i                                :  1;\
            UNSG32 ufull_ST_23i                                :  1;\
            UNSG32 ufull_ST_24i                                :  1;\
            UNSG32 ufull_ST_25i                                :  1;\
            UNSG32 ufull_ST_26i                                :  1;\
            UNSG32 ufull_ST_27i                                :  1;\
            UNSG32 ufull_ST_28i                                :  1;\
            UNSG32 ufull_ST_29i                                :  1;\
            UNSG32 ufull_ST_30i                                :  1;\
            UNSG32 ufull_ST_31i                                :  1;\
          }
    union { UNSG32 u32SemaHub_full;
            struct w32SemaHub_full;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_almostEmpty_ST_0i(r32)              _BFGET_(r32, 0, 0)
    #define   SET32SemaHub_almostEmpty_ST_0i(r32,v)            _BFSET_(r32, 0, 0,v)
    #define   GET16SemaHub_almostEmpty_ST_0i(r16)              _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_almostEmpty_ST_0i(r16,v)            _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_almostEmpty_ST_1i(r32)              _BFGET_(r32, 1, 1)
    #define   SET32SemaHub_almostEmpty_ST_1i(r32,v)            _BFSET_(r32, 1, 1,v)
    #define   GET16SemaHub_almostEmpty_ST_1i(r16)              _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_almostEmpty_ST_1i(r16,v)            _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_almostEmpty_ST_2i(r32)              _BFGET_(r32, 2, 2)
    #define   SET32SemaHub_almostEmpty_ST_2i(r32,v)            _BFSET_(r32, 2, 2,v)
    #define   GET16SemaHub_almostEmpty_ST_2i(r16)              _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_almostEmpty_ST_2i(r16,v)            _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_almostEmpty_ST_3i(r32)              _BFGET_(r32, 3, 3)
    #define   SET32SemaHub_almostEmpty_ST_3i(r32,v)            _BFSET_(r32, 3, 3,v)
    #define   GET16SemaHub_almostEmpty_ST_3i(r16)              _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_almostEmpty_ST_3i(r16,v)            _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_almostEmpty_ST_4i(r32)              _BFGET_(r32, 4, 4)
    #define   SET32SemaHub_almostEmpty_ST_4i(r32,v)            _BFSET_(r32, 4, 4,v)
    #define   GET16SemaHub_almostEmpty_ST_4i(r16)              _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_almostEmpty_ST_4i(r16,v)            _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_almostEmpty_ST_5i(r32)              _BFGET_(r32, 5, 5)
    #define   SET32SemaHub_almostEmpty_ST_5i(r32,v)            _BFSET_(r32, 5, 5,v)
    #define   GET16SemaHub_almostEmpty_ST_5i(r16)              _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_almostEmpty_ST_5i(r16,v)            _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_almostEmpty_ST_6i(r32)              _BFGET_(r32, 6, 6)
    #define   SET32SemaHub_almostEmpty_ST_6i(r32,v)            _BFSET_(r32, 6, 6,v)
    #define   GET16SemaHub_almostEmpty_ST_6i(r16)              _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_almostEmpty_ST_6i(r16,v)            _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_almostEmpty_ST_7i(r32)              _BFGET_(r32, 7, 7)
    #define   SET32SemaHub_almostEmpty_ST_7i(r32,v)            _BFSET_(r32, 7, 7,v)
    #define   GET16SemaHub_almostEmpty_ST_7i(r16)              _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_almostEmpty_ST_7i(r16,v)            _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_almostEmpty_ST_8i(r32)              _BFGET_(r32, 8, 8)
    #define   SET32SemaHub_almostEmpty_ST_8i(r32,v)            _BFSET_(r32, 8, 8,v)
    #define   GET16SemaHub_almostEmpty_ST_8i(r16)              _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_almostEmpty_ST_8i(r16,v)            _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_almostEmpty_ST_9i(r32)              _BFGET_(r32, 9, 9)
    #define   SET32SemaHub_almostEmpty_ST_9i(r32,v)            _BFSET_(r32, 9, 9,v)
    #define   GET16SemaHub_almostEmpty_ST_9i(r16)              _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_almostEmpty_ST_9i(r16,v)            _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_almostEmpty_ST_10i(r32)             _BFGET_(r32,10,10)
    #define   SET32SemaHub_almostEmpty_ST_10i(r32,v)           _BFSET_(r32,10,10,v)
    #define   GET16SemaHub_almostEmpty_ST_10i(r16)             _BFGET_(r16,10,10)
    #define   SET16SemaHub_almostEmpty_ST_10i(r16,v)           _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_almostEmpty_ST_11i(r32)             _BFGET_(r32,11,11)
    #define   SET32SemaHub_almostEmpty_ST_11i(r32,v)           _BFSET_(r32,11,11,v)
    #define   GET16SemaHub_almostEmpty_ST_11i(r16)             _BFGET_(r16,11,11)
    #define   SET16SemaHub_almostEmpty_ST_11i(r16,v)           _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_almostEmpty_ST_12i(r32)             _BFGET_(r32,12,12)
    #define   SET32SemaHub_almostEmpty_ST_12i(r32,v)           _BFSET_(r32,12,12,v)
    #define   GET16SemaHub_almostEmpty_ST_12i(r16)             _BFGET_(r16,12,12)
    #define   SET16SemaHub_almostEmpty_ST_12i(r16,v)           _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_almostEmpty_ST_13i(r32)             _BFGET_(r32,13,13)
    #define   SET32SemaHub_almostEmpty_ST_13i(r32,v)           _BFSET_(r32,13,13,v)
    #define   GET16SemaHub_almostEmpty_ST_13i(r16)             _BFGET_(r16,13,13)
    #define   SET16SemaHub_almostEmpty_ST_13i(r16,v)           _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_almostEmpty_ST_14i(r32)             _BFGET_(r32,14,14)
    #define   SET32SemaHub_almostEmpty_ST_14i(r32,v)           _BFSET_(r32,14,14,v)
    #define   GET16SemaHub_almostEmpty_ST_14i(r16)             _BFGET_(r16,14,14)
    #define   SET16SemaHub_almostEmpty_ST_14i(r16,v)           _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_almostEmpty_ST_15i(r32)             _BFGET_(r32,15,15)
    #define   SET32SemaHub_almostEmpty_ST_15i(r32,v)           _BFSET_(r32,15,15,v)
    #define   GET16SemaHub_almostEmpty_ST_15i(r16)             _BFGET_(r16,15,15)
    #define   SET16SemaHub_almostEmpty_ST_15i(r16,v)           _BFSET_(r16,15,15,v)

    #define   GET32SemaHub_almostEmpty_ST_16i(r32)             _BFGET_(r32,16,16)
    #define   SET32SemaHub_almostEmpty_ST_16i(r32,v)           _BFSET_(r32,16,16,v)
    #define   GET16SemaHub_almostEmpty_ST_16i(r16)             _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_almostEmpty_ST_16i(r16,v)           _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_almostEmpty_ST_17i(r32)             _BFGET_(r32,17,17)
    #define   SET32SemaHub_almostEmpty_ST_17i(r32,v)           _BFSET_(r32,17,17,v)
    #define   GET16SemaHub_almostEmpty_ST_17i(r16)             _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_almostEmpty_ST_17i(r16,v)           _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_almostEmpty_ST_18i(r32)             _BFGET_(r32,18,18)
    #define   SET32SemaHub_almostEmpty_ST_18i(r32,v)           _BFSET_(r32,18,18,v)
    #define   GET16SemaHub_almostEmpty_ST_18i(r16)             _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_almostEmpty_ST_18i(r16,v)           _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_almostEmpty_ST_19i(r32)             _BFGET_(r32,19,19)
    #define   SET32SemaHub_almostEmpty_ST_19i(r32,v)           _BFSET_(r32,19,19,v)
    #define   GET16SemaHub_almostEmpty_ST_19i(r16)             _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_almostEmpty_ST_19i(r16,v)           _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_almostEmpty_ST_20i(r32)             _BFGET_(r32,20,20)
    #define   SET32SemaHub_almostEmpty_ST_20i(r32,v)           _BFSET_(r32,20,20,v)
    #define   GET16SemaHub_almostEmpty_ST_20i(r16)             _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_almostEmpty_ST_20i(r16,v)           _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_almostEmpty_ST_21i(r32)             _BFGET_(r32,21,21)
    #define   SET32SemaHub_almostEmpty_ST_21i(r32,v)           _BFSET_(r32,21,21,v)
    #define   GET16SemaHub_almostEmpty_ST_21i(r16)             _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_almostEmpty_ST_21i(r16,v)           _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_almostEmpty_ST_22i(r32)             _BFGET_(r32,22,22)
    #define   SET32SemaHub_almostEmpty_ST_22i(r32,v)           _BFSET_(r32,22,22,v)
    #define   GET16SemaHub_almostEmpty_ST_22i(r16)             _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_almostEmpty_ST_22i(r16,v)           _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_almostEmpty_ST_23i(r32)             _BFGET_(r32,23,23)
    #define   SET32SemaHub_almostEmpty_ST_23i(r32,v)           _BFSET_(r32,23,23,v)
    #define   GET16SemaHub_almostEmpty_ST_23i(r16)             _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_almostEmpty_ST_23i(r16,v)           _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_almostEmpty_ST_24i(r32)             _BFGET_(r32,24,24)
    #define   SET32SemaHub_almostEmpty_ST_24i(r32,v)           _BFSET_(r32,24,24,v)
    #define   GET16SemaHub_almostEmpty_ST_24i(r16)             _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_almostEmpty_ST_24i(r16,v)           _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_almostEmpty_ST_25i(r32)             _BFGET_(r32,25,25)
    #define   SET32SemaHub_almostEmpty_ST_25i(r32,v)           _BFSET_(r32,25,25,v)
    #define   GET16SemaHub_almostEmpty_ST_25i(r16)             _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_almostEmpty_ST_25i(r16,v)           _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_almostEmpty_ST_26i(r32)             _BFGET_(r32,26,26)
    #define   SET32SemaHub_almostEmpty_ST_26i(r32,v)           _BFSET_(r32,26,26,v)
    #define   GET16SemaHub_almostEmpty_ST_26i(r16)             _BFGET_(r16,10,10)
    #define   SET16SemaHub_almostEmpty_ST_26i(r16,v)           _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_almostEmpty_ST_27i(r32)             _BFGET_(r32,27,27)
    #define   SET32SemaHub_almostEmpty_ST_27i(r32,v)           _BFSET_(r32,27,27,v)
    #define   GET16SemaHub_almostEmpty_ST_27i(r16)             _BFGET_(r16,11,11)
    #define   SET16SemaHub_almostEmpty_ST_27i(r16,v)           _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_almostEmpty_ST_28i(r32)             _BFGET_(r32,28,28)
    #define   SET32SemaHub_almostEmpty_ST_28i(r32,v)           _BFSET_(r32,28,28,v)
    #define   GET16SemaHub_almostEmpty_ST_28i(r16)             _BFGET_(r16,12,12)
    #define   SET16SemaHub_almostEmpty_ST_28i(r16,v)           _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_almostEmpty_ST_29i(r32)             _BFGET_(r32,29,29)
    #define   SET32SemaHub_almostEmpty_ST_29i(r32,v)           _BFSET_(r32,29,29,v)
    #define   GET16SemaHub_almostEmpty_ST_29i(r16)             _BFGET_(r16,13,13)
    #define   SET16SemaHub_almostEmpty_ST_29i(r16,v)           _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_almostEmpty_ST_30i(r32)             _BFGET_(r32,30,30)
    #define   SET32SemaHub_almostEmpty_ST_30i(r32,v)           _BFSET_(r32,30,30,v)
    #define   GET16SemaHub_almostEmpty_ST_30i(r16)             _BFGET_(r16,14,14)
    #define   SET16SemaHub_almostEmpty_ST_30i(r16,v)           _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_almostEmpty_ST_31i(r32)             _BFGET_(r32,31,31)
    #define   SET32SemaHub_almostEmpty_ST_31i(r32,v)           _BFSET_(r32,31,31,v)
    #define   GET16SemaHub_almostEmpty_ST_31i(r16)             _BFGET_(r16,15,15)
    #define   SET16SemaHub_almostEmpty_ST_31i(r16,v)           _BFSET_(r16,15,15,v)

    #define     w32SemaHub_almostEmpty                         {\
            UNSG32 ualmostEmpty_ST_0i                          :  1;\
            UNSG32 ualmostEmpty_ST_1i                          :  1;\
            UNSG32 ualmostEmpty_ST_2i                          :  1;\
            UNSG32 ualmostEmpty_ST_3i                          :  1;\
            UNSG32 ualmostEmpty_ST_4i                          :  1;\
            UNSG32 ualmostEmpty_ST_5i                          :  1;\
            UNSG32 ualmostEmpty_ST_6i                          :  1;\
            UNSG32 ualmostEmpty_ST_7i                          :  1;\
            UNSG32 ualmostEmpty_ST_8i                          :  1;\
            UNSG32 ualmostEmpty_ST_9i                          :  1;\
            UNSG32 ualmostEmpty_ST_10i                         :  1;\
            UNSG32 ualmostEmpty_ST_11i                         :  1;\
            UNSG32 ualmostEmpty_ST_12i                         :  1;\
            UNSG32 ualmostEmpty_ST_13i                         :  1;\
            UNSG32 ualmostEmpty_ST_14i                         :  1;\
            UNSG32 ualmostEmpty_ST_15i                         :  1;\
            UNSG32 ualmostEmpty_ST_16i                         :  1;\
            UNSG32 ualmostEmpty_ST_17i                         :  1;\
            UNSG32 ualmostEmpty_ST_18i                         :  1;\
            UNSG32 ualmostEmpty_ST_19i                         :  1;\
            UNSG32 ualmostEmpty_ST_20i                         :  1;\
            UNSG32 ualmostEmpty_ST_21i                         :  1;\
            UNSG32 ualmostEmpty_ST_22i                         :  1;\
            UNSG32 ualmostEmpty_ST_23i                         :  1;\
            UNSG32 ualmostEmpty_ST_24i                         :  1;\
            UNSG32 ualmostEmpty_ST_25i                         :  1;\
            UNSG32 ualmostEmpty_ST_26i                         :  1;\
            UNSG32 ualmostEmpty_ST_27i                         :  1;\
            UNSG32 ualmostEmpty_ST_28i                         :  1;\
            UNSG32 ualmostEmpty_ST_29i                         :  1;\
            UNSG32 ualmostEmpty_ST_30i                         :  1;\
            UNSG32 ualmostEmpty_ST_31i                         :  1;\
          }
    union { UNSG32 u32SemaHub_almostEmpty;
            struct w32SemaHub_almostEmpty;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_almostFull_ST_0i(r32)               _BFGET_(r32, 0, 0)
    #define   SET32SemaHub_almostFull_ST_0i(r32,v)             _BFSET_(r32, 0, 0,v)
    #define   GET16SemaHub_almostFull_ST_0i(r16)               _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_almostFull_ST_0i(r16,v)             _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_almostFull_ST_1i(r32)               _BFGET_(r32, 1, 1)
    #define   SET32SemaHub_almostFull_ST_1i(r32,v)             _BFSET_(r32, 1, 1,v)
    #define   GET16SemaHub_almostFull_ST_1i(r16)               _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_almostFull_ST_1i(r16,v)             _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_almostFull_ST_2i(r32)               _BFGET_(r32, 2, 2)
    #define   SET32SemaHub_almostFull_ST_2i(r32,v)             _BFSET_(r32, 2, 2,v)
    #define   GET16SemaHub_almostFull_ST_2i(r16)               _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_almostFull_ST_2i(r16,v)             _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_almostFull_ST_3i(r32)               _BFGET_(r32, 3, 3)
    #define   SET32SemaHub_almostFull_ST_3i(r32,v)             _BFSET_(r32, 3, 3,v)
    #define   GET16SemaHub_almostFull_ST_3i(r16)               _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_almostFull_ST_3i(r16,v)             _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_almostFull_ST_4i(r32)               _BFGET_(r32, 4, 4)
    #define   SET32SemaHub_almostFull_ST_4i(r32,v)             _BFSET_(r32, 4, 4,v)
    #define   GET16SemaHub_almostFull_ST_4i(r16)               _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_almostFull_ST_4i(r16,v)             _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_almostFull_ST_5i(r32)               _BFGET_(r32, 5, 5)
    #define   SET32SemaHub_almostFull_ST_5i(r32,v)             _BFSET_(r32, 5, 5,v)
    #define   GET16SemaHub_almostFull_ST_5i(r16)               _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_almostFull_ST_5i(r16,v)             _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_almostFull_ST_6i(r32)               _BFGET_(r32, 6, 6)
    #define   SET32SemaHub_almostFull_ST_6i(r32,v)             _BFSET_(r32, 6, 6,v)
    #define   GET16SemaHub_almostFull_ST_6i(r16)               _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_almostFull_ST_6i(r16,v)             _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_almostFull_ST_7i(r32)               _BFGET_(r32, 7, 7)
    #define   SET32SemaHub_almostFull_ST_7i(r32,v)             _BFSET_(r32, 7, 7,v)
    #define   GET16SemaHub_almostFull_ST_7i(r16)               _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_almostFull_ST_7i(r16,v)             _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_almostFull_ST_8i(r32)               _BFGET_(r32, 8, 8)
    #define   SET32SemaHub_almostFull_ST_8i(r32,v)             _BFSET_(r32, 8, 8,v)
    #define   GET16SemaHub_almostFull_ST_8i(r16)               _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_almostFull_ST_8i(r16,v)             _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_almostFull_ST_9i(r32)               _BFGET_(r32, 9, 9)
    #define   SET32SemaHub_almostFull_ST_9i(r32,v)             _BFSET_(r32, 9, 9,v)
    #define   GET16SemaHub_almostFull_ST_9i(r16)               _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_almostFull_ST_9i(r16,v)             _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_almostFull_ST_10i(r32)              _BFGET_(r32,10,10)
    #define   SET32SemaHub_almostFull_ST_10i(r32,v)            _BFSET_(r32,10,10,v)
    #define   GET16SemaHub_almostFull_ST_10i(r16)              _BFGET_(r16,10,10)
    #define   SET16SemaHub_almostFull_ST_10i(r16,v)            _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_almostFull_ST_11i(r32)              _BFGET_(r32,11,11)
    #define   SET32SemaHub_almostFull_ST_11i(r32,v)            _BFSET_(r32,11,11,v)
    #define   GET16SemaHub_almostFull_ST_11i(r16)              _BFGET_(r16,11,11)
    #define   SET16SemaHub_almostFull_ST_11i(r16,v)            _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_almostFull_ST_12i(r32)              _BFGET_(r32,12,12)
    #define   SET32SemaHub_almostFull_ST_12i(r32,v)            _BFSET_(r32,12,12,v)
    #define   GET16SemaHub_almostFull_ST_12i(r16)              _BFGET_(r16,12,12)
    #define   SET16SemaHub_almostFull_ST_12i(r16,v)            _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_almostFull_ST_13i(r32)              _BFGET_(r32,13,13)
    #define   SET32SemaHub_almostFull_ST_13i(r32,v)            _BFSET_(r32,13,13,v)
    #define   GET16SemaHub_almostFull_ST_13i(r16)              _BFGET_(r16,13,13)
    #define   SET16SemaHub_almostFull_ST_13i(r16,v)            _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_almostFull_ST_14i(r32)              _BFGET_(r32,14,14)
    #define   SET32SemaHub_almostFull_ST_14i(r32,v)            _BFSET_(r32,14,14,v)
    #define   GET16SemaHub_almostFull_ST_14i(r16)              _BFGET_(r16,14,14)
    #define   SET16SemaHub_almostFull_ST_14i(r16,v)            _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_almostFull_ST_15i(r32)              _BFGET_(r32,15,15)
    #define   SET32SemaHub_almostFull_ST_15i(r32,v)            _BFSET_(r32,15,15,v)
    #define   GET16SemaHub_almostFull_ST_15i(r16)              _BFGET_(r16,15,15)
    #define   SET16SemaHub_almostFull_ST_15i(r16,v)            _BFSET_(r16,15,15,v)

    #define   GET32SemaHub_almostFull_ST_16i(r32)              _BFGET_(r32,16,16)
    #define   SET32SemaHub_almostFull_ST_16i(r32,v)            _BFSET_(r32,16,16,v)
    #define   GET16SemaHub_almostFull_ST_16i(r16)              _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_almostFull_ST_16i(r16,v)            _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_almostFull_ST_17i(r32)              _BFGET_(r32,17,17)
    #define   SET32SemaHub_almostFull_ST_17i(r32,v)            _BFSET_(r32,17,17,v)
    #define   GET16SemaHub_almostFull_ST_17i(r16)              _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_almostFull_ST_17i(r16,v)            _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_almostFull_ST_18i(r32)              _BFGET_(r32,18,18)
    #define   SET32SemaHub_almostFull_ST_18i(r32,v)            _BFSET_(r32,18,18,v)
    #define   GET16SemaHub_almostFull_ST_18i(r16)              _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_almostFull_ST_18i(r16,v)            _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_almostFull_ST_19i(r32)              _BFGET_(r32,19,19)
    #define   SET32SemaHub_almostFull_ST_19i(r32,v)            _BFSET_(r32,19,19,v)
    #define   GET16SemaHub_almostFull_ST_19i(r16)              _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_almostFull_ST_19i(r16,v)            _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_almostFull_ST_20i(r32)              _BFGET_(r32,20,20)
    #define   SET32SemaHub_almostFull_ST_20i(r32,v)            _BFSET_(r32,20,20,v)
    #define   GET16SemaHub_almostFull_ST_20i(r16)              _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_almostFull_ST_20i(r16,v)            _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_almostFull_ST_21i(r32)              _BFGET_(r32,21,21)
    #define   SET32SemaHub_almostFull_ST_21i(r32,v)            _BFSET_(r32,21,21,v)
    #define   GET16SemaHub_almostFull_ST_21i(r16)              _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_almostFull_ST_21i(r16,v)            _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_almostFull_ST_22i(r32)              _BFGET_(r32,22,22)
    #define   SET32SemaHub_almostFull_ST_22i(r32,v)            _BFSET_(r32,22,22,v)
    #define   GET16SemaHub_almostFull_ST_22i(r16)              _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_almostFull_ST_22i(r16,v)            _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_almostFull_ST_23i(r32)              _BFGET_(r32,23,23)
    #define   SET32SemaHub_almostFull_ST_23i(r32,v)            _BFSET_(r32,23,23,v)
    #define   GET16SemaHub_almostFull_ST_23i(r16)              _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_almostFull_ST_23i(r16,v)            _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_almostFull_ST_24i(r32)              _BFGET_(r32,24,24)
    #define   SET32SemaHub_almostFull_ST_24i(r32,v)            _BFSET_(r32,24,24,v)
    #define   GET16SemaHub_almostFull_ST_24i(r16)              _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_almostFull_ST_24i(r16,v)            _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_almostFull_ST_25i(r32)              _BFGET_(r32,25,25)
    #define   SET32SemaHub_almostFull_ST_25i(r32,v)            _BFSET_(r32,25,25,v)
    #define   GET16SemaHub_almostFull_ST_25i(r16)              _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_almostFull_ST_25i(r16,v)            _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_almostFull_ST_26i(r32)              _BFGET_(r32,26,26)
    #define   SET32SemaHub_almostFull_ST_26i(r32,v)            _BFSET_(r32,26,26,v)
    #define   GET16SemaHub_almostFull_ST_26i(r16)              _BFGET_(r16,10,10)
    #define   SET16SemaHub_almostFull_ST_26i(r16,v)            _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_almostFull_ST_27i(r32)              _BFGET_(r32,27,27)
    #define   SET32SemaHub_almostFull_ST_27i(r32,v)            _BFSET_(r32,27,27,v)
    #define   GET16SemaHub_almostFull_ST_27i(r16)              _BFGET_(r16,11,11)
    #define   SET16SemaHub_almostFull_ST_27i(r16,v)            _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_almostFull_ST_28i(r32)              _BFGET_(r32,28,28)
    #define   SET32SemaHub_almostFull_ST_28i(r32,v)            _BFSET_(r32,28,28,v)
    #define   GET16SemaHub_almostFull_ST_28i(r16)              _BFGET_(r16,12,12)
    #define   SET16SemaHub_almostFull_ST_28i(r16,v)            _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_almostFull_ST_29i(r32)              _BFGET_(r32,29,29)
    #define   SET32SemaHub_almostFull_ST_29i(r32,v)            _BFSET_(r32,29,29,v)
    #define   GET16SemaHub_almostFull_ST_29i(r16)              _BFGET_(r16,13,13)
    #define   SET16SemaHub_almostFull_ST_29i(r16,v)            _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_almostFull_ST_30i(r32)              _BFGET_(r32,30,30)
    #define   SET32SemaHub_almostFull_ST_30i(r32,v)            _BFSET_(r32,30,30,v)
    #define   GET16SemaHub_almostFull_ST_30i(r16)              _BFGET_(r16,14,14)
    #define   SET16SemaHub_almostFull_ST_30i(r16,v)            _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_almostFull_ST_31i(r32)              _BFGET_(r32,31,31)
    #define   SET32SemaHub_almostFull_ST_31i(r32,v)            _BFSET_(r32,31,31,v)
    #define   GET16SemaHub_almostFull_ST_31i(r16)              _BFGET_(r16,15,15)
    #define   SET16SemaHub_almostFull_ST_31i(r16,v)            _BFSET_(r16,15,15,v)

    #define     w32SemaHub_almostFull                          {\
            UNSG32 ualmostFull_ST_0i                           :  1;\
            UNSG32 ualmostFull_ST_1i                           :  1;\
            UNSG32 ualmostFull_ST_2i                           :  1;\
            UNSG32 ualmostFull_ST_3i                           :  1;\
            UNSG32 ualmostFull_ST_4i                           :  1;\
            UNSG32 ualmostFull_ST_5i                           :  1;\
            UNSG32 ualmostFull_ST_6i                           :  1;\
            UNSG32 ualmostFull_ST_7i                           :  1;\
            UNSG32 ualmostFull_ST_8i                           :  1;\
            UNSG32 ualmostFull_ST_9i                           :  1;\
            UNSG32 ualmostFull_ST_10i                          :  1;\
            UNSG32 ualmostFull_ST_11i                          :  1;\
            UNSG32 ualmostFull_ST_12i                          :  1;\
            UNSG32 ualmostFull_ST_13i                          :  1;\
            UNSG32 ualmostFull_ST_14i                          :  1;\
            UNSG32 ualmostFull_ST_15i                          :  1;\
            UNSG32 ualmostFull_ST_16i                          :  1;\
            UNSG32 ualmostFull_ST_17i                          :  1;\
            UNSG32 ualmostFull_ST_18i                          :  1;\
            UNSG32 ualmostFull_ST_19i                          :  1;\
            UNSG32 ualmostFull_ST_20i                          :  1;\
            UNSG32 ualmostFull_ST_21i                          :  1;\
            UNSG32 ualmostFull_ST_22i                          :  1;\
            UNSG32 ualmostFull_ST_23i                          :  1;\
            UNSG32 ualmostFull_ST_24i                          :  1;\
            UNSG32 ualmostFull_ST_25i                          :  1;\
            UNSG32 ualmostFull_ST_26i                          :  1;\
            UNSG32 ualmostFull_ST_27i                          :  1;\
            UNSG32 ualmostFull_ST_28i                          :  1;\
            UNSG32 ualmostFull_ST_29i                          :  1;\
            UNSG32 ualmostFull_ST_30i                          :  1;\
            UNSG32 ualmostFull_ST_31i                          :  1;\
          }
    union { UNSG32 u32SemaHub_almostFull;
            struct w32SemaHub_almostFull;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx398                                    [104];
    ///////////////////////////////////////////////////////////
    } SIE_SemaHub;

    typedef union  T32SemaHub_PUSH
          { UNSG32 u32;
            struct w32SemaHub_PUSH;
                 } T32SemaHub_PUSH;
    typedef union  T32SemaHub_POP
          { UNSG32 u32;
            struct w32SemaHub_POP;
                 } T32SemaHub_POP;
    typedef union  T32SemaHub_empty
          { UNSG32 u32;
            struct w32SemaHub_empty;
                 } T32SemaHub_empty;
    typedef union  T32SemaHub_full
          { UNSG32 u32;
            struct w32SemaHub_full;
                 } T32SemaHub_full;
    typedef union  T32SemaHub_almostEmpty
          { UNSG32 u32;
            struct w32SemaHub_almostEmpty;
                 } T32SemaHub_almostEmpty;
    typedef union  T32SemaHub_almostFull
          { UNSG32 u32;
            struct w32SemaHub_almostFull;
                 } T32SemaHub_almostFull;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaHub_PUSH
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_PUSH;
                   };
                 } TSemaHub_PUSH;
    typedef union  TSemaHub_POP
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_POP;
                   };
                 } TSemaHub_POP;
    typedef union  TSemaHub_empty
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_empty;
                   };
                 } TSemaHub_empty;
    typedef union  TSemaHub_full
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_full;
                   };
                 } TSemaHub_full;
    typedef union  TSemaHub_almostEmpty
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_almostEmpty;
                   };
                 } TSemaHub_almostEmpty;
    typedef union  TSemaHub_almostFull
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_almostFull;
                   };
                 } TSemaHub_almostFull;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaHub_drvrd(SIE_SemaHub *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaHub_drvwr(SIE_SemaHub *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaHub_reset(SIE_SemaHub *p);
     SIGN32 SemaHub_cmp  (SIE_SemaHub *p, SIE_SemaHub *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaHub_check(p,pie,pfx,hLOG) SemaHub_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaHub_print(p,    pfx,hLOG) SemaHub_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaHub
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FiFo                    biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (W-)
///               %unsigned 20 BASE                      
///                                    ###
///                                    * Base address (byte-address) of a FIFO in the shared SRAM. A channel's read/write pointers will be added to this “BASE” to get exact location of shared SRAM.
///                                    * Note: aligned with base SRAM data bus.
///                                    * For example, if SRAM data is 64-bit, then base[2:0] should be 3'b0;
///                                    ###
///               %%        12         # Stuffing bits...
///     @ 0x00004 START                (W-)
///               %unsigned 1  EN                        0x0
///                                    ###
///                                    * Write 1 to this register will enable this channel, or 0 to this register will disable this channel.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00008 CLEAR                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * Write anything to clear FIFO pointers to 0.
///                                    * Note :
///                                    * CPU should make sure to disabled the channel (write 0 to START_EN register) before issue clear command, otherwise the clear request will be ignored.
///                                    * Do not restart the channel when clear operation is in process.
///                                    * HW will make sure there is no pending transactions before execute the clear operation.
///                                    * Associated semaphore cell needs reset separately by re-write “CFG_DEPTH”
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0000C FLUSH                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * No support for now
///                                    ###
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      16B, bits:      23b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FiFo
#define h_FiFo (){}

    #define     RA_FiFo_CFG                                    0x0000

    #define     BA_FiFo_CFG_BASE                               0x0000
    #define     B16FiFo_CFG_BASE                               0x0000
    #define   LSb32FiFo_CFG_BASE                                  0
    #define   LSb16FiFo_CFG_BASE                                  0
    #define       bFiFo_CFG_BASE                               20
    #define   MSK32FiFo_CFG_BASE                                  0x000FFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FiFo_START                                  0x0004

    #define     BA_FiFo_START_EN                               0x0004
    #define     B16FiFo_START_EN                               0x0004
    #define   LSb32FiFo_START_EN                                  0
    #define   LSb16FiFo_START_EN                                  0
    #define       bFiFo_START_EN                               1
    #define   MSK32FiFo_START_EN                                  0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FiFo_CLEAR                                  0x0008

    #define     BA_FiFo_CLEAR_EN                               0x0008
    #define     B16FiFo_CLEAR_EN                               0x0008
    #define   LSb32FiFo_CLEAR_EN                                  0
    #define   LSb16FiFo_CLEAR_EN                                  0
    #define       bFiFo_CLEAR_EN                               1
    #define   MSK32FiFo_CLEAR_EN                                  0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FiFo_FLUSH                                  0x000C

    #define     BA_FiFo_FLUSH_EN                               0x000C
    #define     B16FiFo_FLUSH_EN                               0x000C
    #define   LSb32FiFo_FLUSH_EN                                  0
    #define   LSb16FiFo_FLUSH_EN                                  0
    #define       bFiFo_FLUSH_EN                               1
    #define   MSK32FiFo_FLUSH_EN                                  0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FiFo {
    ///////////////////////////////////////////////////////////
    #define   GET32FiFo_CFG_BASE(r32)                          _BFGET_(r32,19, 0)
    #define   SET32FiFo_CFG_BASE(r32,v)                        _BFSET_(r32,19, 0,v)

    #define     w32FiFo_CFG                                    {\
            UNSG32 uCFG_BASE                                   : 20;\
            UNSG32 RSVDx0_b20                                  : 12;\
          }
    union { UNSG32 u32FiFo_CFG;
            struct w32FiFo_CFG;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FiFo_START_EN(r32)                          _BFGET_(r32, 0, 0)
    #define   SET32FiFo_START_EN(r32,v)                        _BFSET_(r32, 0, 0,v)
    #define   GET16FiFo_START_EN(r16)                          _BFGET_(r16, 0, 0)
    #define   SET16FiFo_START_EN(r16,v)                        _BFSET_(r16, 0, 0,v)

    #define     w32FiFo_START                                  {\
            UNSG32 uSTART_EN                                   :  1;\
            UNSG32 RSVDx4_b1                                   : 31;\
          }
    union { UNSG32 u32FiFo_START;
            struct w32FiFo_START;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FiFo_CLEAR_EN(r32)                          _BFGET_(r32, 0, 0)
    #define   SET32FiFo_CLEAR_EN(r32,v)                        _BFSET_(r32, 0, 0,v)
    #define   GET16FiFo_CLEAR_EN(r16)                          _BFGET_(r16, 0, 0)
    #define   SET16FiFo_CLEAR_EN(r16,v)                        _BFSET_(r16, 0, 0,v)

    #define     w32FiFo_CLEAR                                  {\
            UNSG32 uCLEAR_EN                                   :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32FiFo_CLEAR;
            struct w32FiFo_CLEAR;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FiFo_FLUSH_EN(r32)                          _BFGET_(r32, 0, 0)
    #define   SET32FiFo_FLUSH_EN(r32,v)                        _BFSET_(r32, 0, 0,v)
    #define   GET16FiFo_FLUSH_EN(r16)                          _BFGET_(r16, 0, 0)
    #define   SET16FiFo_FLUSH_EN(r16,v)                        _BFSET_(r16, 0, 0,v)

    #define     w32FiFo_FLUSH                                  {\
            UNSG32 uFLUSH_EN                                   :  1;\
            UNSG32 RSVDxC_b1                                   : 31;\
          }
    union { UNSG32 u32FiFo_FLUSH;
            struct w32FiFo_FLUSH;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FiFo;

    typedef union  T32FiFo_CFG
          { UNSG32 u32;
            struct w32FiFo_CFG;
                 } T32FiFo_CFG;
    typedef union  T32FiFo_START
          { UNSG32 u32;
            struct w32FiFo_START;
                 } T32FiFo_START;
    typedef union  T32FiFo_CLEAR
          { UNSG32 u32;
            struct w32FiFo_CLEAR;
                 } T32FiFo_CLEAR;
    typedef union  T32FiFo_FLUSH
          { UNSG32 u32;
            struct w32FiFo_FLUSH;
                 } T32FiFo_FLUSH;
    ///////////////////////////////////////////////////////////

    typedef union  TFiFo_CFG
          { UNSG32 u32[1];
            struct {
            struct w32FiFo_CFG;
                   };
                 } TFiFo_CFG;
    typedef union  TFiFo_START
          { UNSG32 u32[1];
            struct {
            struct w32FiFo_START;
                   };
                 } TFiFo_START;
    typedef union  TFiFo_CLEAR
          { UNSG32 u32[1];
            struct {
            struct w32FiFo_CLEAR;
                   };
                 } TFiFo_CLEAR;
    typedef union  TFiFo_FLUSH
          { UNSG32 u32[1];
            struct {
            struct w32FiFo_FLUSH;
                   };
                 } TFiFo_FLUSH;

    ///////////////////////////////////////////////////////////
     SIGN32 FiFo_drvrd(SIE_FiFo *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FiFo_drvwr(SIE_FiFo *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FiFo_reset(SIE_FiFo *p);
     SIGN32 FiFo_cmp  (SIE_FiFo *p, SIE_FiFo *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FiFo_check(p,pie,pfx,hLOG) FiFo_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FiFo_print(p,    pfx,hLOG) FiFo_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FiFo
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE HBO                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 FiFoCtl              
///               $SemaHub             FiFoCtl           REG          
///     @ 0x00400 ARR                  (P)
///     # 0x00400 FiFo                 
///               $FiFo                FiFo              REG      [32]
///                                    ###
///                                    * Up-to 32 FIFO channels
///                                    * FiFo[N] is controlled by HBO.FiFoCtl.Channel[N]
///                                    ###
///     @ 0x00600 BUSY                 (R-)
///               %unsigned 32 ST                        
///                                    ###
///                                    * Per channel status
///                                    * Indicate the clear operation status.
///                                    * 1: clear is in process.
///                                    * 0 : clear is done.
///                                    ###
///     @ 0x00604                      (W-)
///     #         # Stuffing bytes...
///               %% 2016
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    1792B, bits:    1920b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_HBO
#define h_HBO (){}

    #define     RA_HBO_FiFoCtl                                 0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_HBO_ARR                                     0x0400
    #define     RA_HBO_FiFo                                    0x0400
    ///////////////////////////////////////////////////////////
    #define     RA_HBO_BUSY                                    0x0600

    #define     BA_HBO_BUSY_ST                                 0x0600
    #define     B16HBO_BUSY_ST                                 0x0600
    #define   LSb32HBO_BUSY_ST                                    0
    #define   LSb16HBO_BUSY_ST                                    0
    #define       bHBO_BUSY_ST                                 32
    #define   MSK32HBO_BUSY_ST                                    0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_HBO {
    ///////////////////////////////////////////////////////////
              SIE_SemaHub                                      ie_FiFoCtl;
    ///////////////////////////////////////////////////////////
              SIE_FiFo                                         ie_FiFo[32];
    ///////////////////////////////////////////////////////////
    #define   GET32HBO_BUSY_ST(r32)                            _BFGET_(r32,31, 0)
    #define   SET32HBO_BUSY_ST(r32,v)                          _BFSET_(r32,31, 0,v)

    #define     w32HBO_BUSY                                    {\
            UNSG32 uBUSY_ST                                    : 32;\
          }
    union { UNSG32 u32HBO_BUSY;
            struct w32HBO_BUSY;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx604                                    [252];
    ///////////////////////////////////////////////////////////
    } SIE_HBO;

    typedef union  T32HBO_BUSY
          { UNSG32 u32;
            struct w32HBO_BUSY;
                 } T32HBO_BUSY;
    ///////////////////////////////////////////////////////////

    typedef union  THBO_BUSY
          { UNSG32 u32[1];
            struct {
            struct w32HBO_BUSY;
                   };
                 } THBO_BUSY;

    ///////////////////////////////////////////////////////////
     SIGN32 HBO_drvrd(SIE_HBO *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 HBO_drvwr(SIE_HBO *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void HBO_reset(SIE_HBO *p);
     SIGN32 HBO_cmp  (SIE_HBO *p, SIE_HBO *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define HBO_check(p,pie,pfx,hLOG) HBO_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define HBO_print(p,    pfx,hLOG) HBO_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: HBO
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE LLDesFmt                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 mem                  (P)
///               %unsigned 16 size                      
///                                    ###
///                                    * The size of one piece of scattered memory.
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_LLDesFmt
#define h_LLDesFmt (){}

    #define     RA_LLDesFmt_mem                                0x0000

    #define     BA_LLDesFmt_mem_size                           0x0000
    #define     B16LLDesFmt_mem_size                           0x0000
    #define   LSb32LLDesFmt_mem_size                              0
    #define   LSb16LLDesFmt_mem_size                              0
    #define       bLLDesFmt_mem_size                           16
    #define   MSK32LLDesFmt_mem_size                              0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_LLDesFmt {
    ///////////////////////////////////////////////////////////
    #define   GET32LLDesFmt_mem_size(r32)                      _BFGET_(r32,15, 0)
    #define   SET32LLDesFmt_mem_size(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16LLDesFmt_mem_size(r16)                      _BFGET_(r16,15, 0)
    #define   SET16LLDesFmt_mem_size(r16,v)                    _BFSET_(r16,15, 0,v)

    #define     w32LLDesFmt_mem                                {\
            UNSG32 umem_size                                   : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32LLDesFmt_mem;
            struct w32LLDesFmt_mem;
          };
    ///////////////////////////////////////////////////////////
    } SIE_LLDesFmt;

    typedef union  T32LLDesFmt_mem
          { UNSG32 u32;
            struct w32LLDesFmt_mem;
                 } T32LLDesFmt_mem;
    ///////////////////////////////////////////////////////////

    typedef union  TLLDesFmt_mem
          { UNSG32 u32[1];
            struct {
            struct w32LLDesFmt_mem;
                   };
                 } TLLDesFmt_mem;

    ///////////////////////////////////////////////////////////
     SIGN32 LLDesFmt_drvrd(SIE_LLDesFmt *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 LLDesFmt_drvwr(SIE_LLDesFmt *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void LLDesFmt_reset(SIE_LLDesFmt *p);
     SIGN32 LLDesFmt_cmp  (SIE_LLDesFmt *p, SIE_LLDesFmt *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define LLDesFmt_check(p,pie,pfx,hLOG) LLDesFmt_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define LLDesFmt_print(p,    pfx,hLOG) LLDesFmt_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: LLDesFmt
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubCmdHDR                               (4,4)
///     ###
///     * 32-bit dHub command header
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 DESC                 (W-)
///               %unsigned 16 size                      
///                                    ###
///                                    * amount of data to be transferred, in bytes or MTU.
///                                    * Size of 0 is forbidden.
///                                    ###
///               %unsigned 1  sizeMTU                   
///                                    ###
///                                    * 0: size given in bytes;
///                                    * 1: size given in MTU (see dHubChCtl.CFG.MTU for MTU size definition)
///                                    ###
///               %unsigned 1  semOpMTU                  
///                                    ###
///                                    * 0: semaphore operations applied on dHubCmd level
///                                    * 1: semaphore operations applied on MTU level
///                                    ###
///               %unsigned 5  chkSemId                  
///                                    ###
///                                    * ID of semaphore to check before cmd / MTU;
///                                    * 0 indicates semaphore check is disabled
///                                    ###
///               %unsigned 5  updSemId                  
///                                    ###
///                                    * ID of semaphore to update after cmd / MTU;
///                                    * 0 indicates semaphore update is disabled
///                                    ###
///               %unsigned 1  interrupt                 
///                                    ###
///                                    * 1: raise interrupt upon command finish
///                                    * end dHubCmdHDR
///                                    ###
///               %%        3          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      29b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubCmdHDR
#define h_dHubCmdHDR (){}

    #define     RA_dHubCmdHDR_DESC                             0x0000

    #define     BA_dHubCmdHDR_DESC_size                        0x0000
    #define     B16dHubCmdHDR_DESC_size                        0x0000
    #define   LSb32dHubCmdHDR_DESC_size                           0
    #define   LSb16dHubCmdHDR_DESC_size                           0
    #define       bdHubCmdHDR_DESC_size                        16
    #define   MSK32dHubCmdHDR_DESC_size                           0x0000FFFF

    #define     BA_dHubCmdHDR_DESC_sizeMTU                     0x0002
    #define     B16dHubCmdHDR_DESC_sizeMTU                     0x0002
    #define   LSb32dHubCmdHDR_DESC_sizeMTU                        16
    #define   LSb16dHubCmdHDR_DESC_sizeMTU                        0
    #define       bdHubCmdHDR_DESC_sizeMTU                     1
    #define   MSK32dHubCmdHDR_DESC_sizeMTU                        0x00010000

    #define     BA_dHubCmdHDR_DESC_semOpMTU                    0x0002
    #define     B16dHubCmdHDR_DESC_semOpMTU                    0x0002
    #define   LSb32dHubCmdHDR_DESC_semOpMTU                       17
    #define   LSb16dHubCmdHDR_DESC_semOpMTU                       1
    #define       bdHubCmdHDR_DESC_semOpMTU                    1
    #define   MSK32dHubCmdHDR_DESC_semOpMTU                       0x00020000

    #define     BA_dHubCmdHDR_DESC_chkSemId                    0x0002
    #define     B16dHubCmdHDR_DESC_chkSemId                    0x0002
    #define   LSb32dHubCmdHDR_DESC_chkSemId                       18
    #define   LSb16dHubCmdHDR_DESC_chkSemId                       2
    #define       bdHubCmdHDR_DESC_chkSemId                    5
    #define   MSK32dHubCmdHDR_DESC_chkSemId                       0x007C0000

    #define     BA_dHubCmdHDR_DESC_updSemId                    0x0002
    #define     B16dHubCmdHDR_DESC_updSemId                    0x0002
    #define   LSb32dHubCmdHDR_DESC_updSemId                       23
    #define   LSb16dHubCmdHDR_DESC_updSemId                       7
    #define       bdHubCmdHDR_DESC_updSemId                    5
    #define   MSK32dHubCmdHDR_DESC_updSemId                       0x0F800000

    #define     BA_dHubCmdHDR_DESC_interrupt                   0x0003
    #define     B16dHubCmdHDR_DESC_interrupt                   0x0002
    #define   LSb32dHubCmdHDR_DESC_interrupt                      28
    #define   LSb16dHubCmdHDR_DESC_interrupt                      12
    #define       bdHubCmdHDR_DESC_interrupt                   1
    #define   MSK32dHubCmdHDR_DESC_interrupt                      0x10000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubCmdHDR {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmdHDR_DESC_size(r32)                   _BFGET_(r32,15, 0)
    #define   SET32dHubCmdHDR_DESC_size(r32,v)                 _BFSET_(r32,15, 0,v)
    #define   GET16dHubCmdHDR_DESC_size(r16)                   _BFGET_(r16,15, 0)
    #define   SET16dHubCmdHDR_DESC_size(r16,v)                 _BFSET_(r16,15, 0,v)

    #define   GET32dHubCmdHDR_DESC_sizeMTU(r32)                _BFGET_(r32,16,16)
    #define   SET32dHubCmdHDR_DESC_sizeMTU(r32,v)              _BFSET_(r32,16,16,v)
    #define   GET16dHubCmdHDR_DESC_sizeMTU(r16)                _BFGET_(r16, 0, 0)
    #define   SET16dHubCmdHDR_DESC_sizeMTU(r16,v)              _BFSET_(r16, 0, 0,v)

    #define   GET32dHubCmdHDR_DESC_semOpMTU(r32)               _BFGET_(r32,17,17)
    #define   SET32dHubCmdHDR_DESC_semOpMTU(r32,v)             _BFSET_(r32,17,17,v)
    #define   GET16dHubCmdHDR_DESC_semOpMTU(r16)               _BFGET_(r16, 1, 1)
    #define   SET16dHubCmdHDR_DESC_semOpMTU(r16,v)             _BFSET_(r16, 1, 1,v)

    #define   GET32dHubCmdHDR_DESC_chkSemId(r32)               _BFGET_(r32,22,18)
    #define   SET32dHubCmdHDR_DESC_chkSemId(r32,v)             _BFSET_(r32,22,18,v)
    #define   GET16dHubCmdHDR_DESC_chkSemId(r16)               _BFGET_(r16, 6, 2)
    #define   SET16dHubCmdHDR_DESC_chkSemId(r16,v)             _BFSET_(r16, 6, 2,v)

    #define   GET32dHubCmdHDR_DESC_updSemId(r32)               _BFGET_(r32,27,23)
    #define   SET32dHubCmdHDR_DESC_updSemId(r32,v)             _BFSET_(r32,27,23,v)
    #define   GET16dHubCmdHDR_DESC_updSemId(r16)               _BFGET_(r16,11, 7)
    #define   SET16dHubCmdHDR_DESC_updSemId(r16,v)             _BFSET_(r16,11, 7,v)

    #define   GET32dHubCmdHDR_DESC_interrupt(r32)              _BFGET_(r32,28,28)
    #define   SET32dHubCmdHDR_DESC_interrupt(r32,v)            _BFSET_(r32,28,28,v)
    #define   GET16dHubCmdHDR_DESC_interrupt(r16)              _BFGET_(r16,12,12)
    #define   SET16dHubCmdHDR_DESC_interrupt(r16,v)            _BFSET_(r16,12,12,v)

    #define     w32dHubCmdHDR_DESC                             {\
            UNSG32 uDESC_size                                  : 16;\
            UNSG32 uDESC_sizeMTU                               :  1;\
            UNSG32 uDESC_semOpMTU                              :  1;\
            UNSG32 uDESC_chkSemId                              :  5;\
            UNSG32 uDESC_updSemId                              :  5;\
            UNSG32 uDESC_interrupt                             :  1;\
            UNSG32 RSVDx0_b29                                  :  3;\
          }
    union { UNSG32 u32dHubCmdHDR_DESC;
            struct w32dHubCmdHDR_DESC;
          };
    ///////////////////////////////////////////////////////////
    } SIE_dHubCmdHDR;

    typedef union  T32dHubCmdHDR_DESC
          { UNSG32 u32;
            struct w32dHubCmdHDR_DESC;
                 } T32dHubCmdHDR_DESC;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubCmdHDR_DESC
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmdHDR_DESC;
                   };
                 } TdHubCmdHDR_DESC;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubCmdHDR_drvrd(SIE_dHubCmdHDR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubCmdHDR_drvwr(SIE_dHubCmdHDR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubCmdHDR_reset(SIE_dHubCmdHDR *p);
     SIGN32 dHubCmdHDR_cmp  (SIE_dHubCmdHDR *p, SIE_dHubCmdHDR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubCmdHDR_check(p,pie,pfx,hLOG) dHubCmdHDR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubCmdHDR_print(p,    pfx,hLOG) dHubCmdHDR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubCmdHDR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubCmd                 biu              (4,4)
///     ###
///     * 64-bit dHub command issued by read/write masters
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 MEM                  (W-)
///               %unsigned 32 addr                      
///                                    ###
///                                    * DRAM data address, in bytes; not necessarily MTU aligned.
///                                    * [32:63]
///                                    ###
///     @ 0x00004                      (P)
///     # 0x00004 HDR                  
///               $dHubCmdHDR          HDR               REG          
///                                    ###
///                                    * end dHubCmd
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      61b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubCmd
#define h_dHubCmd (){}

    #define     RA_dHubCmd_MEM                                 0x0000

    #define     BA_dHubCmd_MEM_addr                            0x0000
    #define     B16dHubCmd_MEM_addr                            0x0000
    #define   LSb32dHubCmd_MEM_addr                               0
    #define   LSb16dHubCmd_MEM_addr                               0
    #define       bdHubCmd_MEM_addr                            32
    #define   MSK32dHubCmd_MEM_addr                               0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd_HDR                                 0x0004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubCmd {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd_MEM_addr(r32)                       _BFGET_(r32,31, 0)
    #define   SET32dHubCmd_MEM_addr(r32,v)                     _BFSET_(r32,31, 0,v)

    #define     w32dHubCmd_MEM                                 {\
            UNSG32 uMEM_addr                                   : 32;\
          }
    union { UNSG32 u32dHubCmd_MEM;
            struct w32dHubCmd_MEM;
          };
    ///////////////////////////////////////////////////////////
              SIE_dHubCmdHDR                                   ie_HDR;
    ///////////////////////////////////////////////////////////
    } SIE_dHubCmd;

    typedef union  T32dHubCmd_MEM
          { UNSG32 u32;
            struct w32dHubCmd_MEM;
                 } T32dHubCmd_MEM;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubCmd_MEM
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd_MEM;
                   };
                 } TdHubCmd_MEM;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubCmd_drvrd(SIE_dHubCmd *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubCmd_drvwr(SIE_dHubCmd *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubCmd_reset(SIE_dHubCmd *p);
     SIGN32 dHubCmd_cmp  (SIE_dHubCmd *p, SIE_dHubCmd *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubCmd_check(p,pie,pfx,hLOG) dHubCmd_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubCmd_print(p,    pfx,hLOG) dHubCmd_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubCmd
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubChannel             biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (W-)
///               %unsigned 2  MTU                       
///                                    : 8byte                     0x0
///                                    : 32byte                    0x1
///                                    : 128byte                   0x2
///                                    : 1024byte                  0x3
///                                                 ###
///                                                 * Minimum transfer unit of the channel
///                                                 ###
///               %unsigned 1  QoS                       
///                                    ###
///                                    * Write 1 to turn on QoS detection
///                                    ###
///               %unsigned 1  selfLoop                  
///                                    ###
///                                    * Write 1 to enable cmd looping support; 0 to turn off
///                                    ###
///               %unsigned 1  intrCtl                   0x0
///                                    : cmdDone                   0x0
///                                    : chIdle                    0x1
///                                                 ###
///                                                 * 0 : default vlaue, the interrupt is triggered by the finish of the dHub command if the interrupt bit is defined in the dHub command.
///                                                 * 1 : The interrupt is triggered if the dHub channel is idle ( no busy and no pending and the corresponding dHub command Q is empty).
///                                                 ###
///               %%        27         # Stuffing bits...
///     @ 0x00004 START                (W-)
///               %unsigned 1  EN                        0x0
///                                    ###
///                                    * Write 1 to enable the channel; 0 to pause the channel
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00008 CLEAR                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * Write anything to reset the channel controller state
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0000C FLUSH                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * Write anything to start the data flushing process. Invalid for read (M2H) channels
///                                    * end dHubChannel
///                                    ###
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      16B, bits:       8b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubChannel
#define h_dHubChannel (){}

    #define     RA_dHubChannel_CFG                             0x0000

    #define     BA_dHubChannel_CFG_MTU                         0x0000
    #define     B16dHubChannel_CFG_MTU                         0x0000
    #define   LSb32dHubChannel_CFG_MTU                            0
    #define   LSb16dHubChannel_CFG_MTU                            0
    #define       bdHubChannel_CFG_MTU                         2
    #define   MSK32dHubChannel_CFG_MTU                            0x00000003
    #define        dHubChannel_CFG_MTU_8byte                                0x0
    #define        dHubChannel_CFG_MTU_32byte                               0x1
    #define        dHubChannel_CFG_MTU_128byte                              0x2
    #define        dHubChannel_CFG_MTU_1024byte                             0x3

    #define     BA_dHubChannel_CFG_QoS                         0x0000
    #define     B16dHubChannel_CFG_QoS                         0x0000
    #define   LSb32dHubChannel_CFG_QoS                            2
    #define   LSb16dHubChannel_CFG_QoS                            2
    #define       bdHubChannel_CFG_QoS                         1
    #define   MSK32dHubChannel_CFG_QoS                            0x00000004

    #define     BA_dHubChannel_CFG_selfLoop                    0x0000
    #define     B16dHubChannel_CFG_selfLoop                    0x0000
    #define   LSb32dHubChannel_CFG_selfLoop                       3
    #define   LSb16dHubChannel_CFG_selfLoop                       3
    #define       bdHubChannel_CFG_selfLoop                    1
    #define   MSK32dHubChannel_CFG_selfLoop                       0x00000008

    #define     BA_dHubChannel_CFG_intrCtl                     0x0000
    #define     B16dHubChannel_CFG_intrCtl                     0x0000
    #define   LSb32dHubChannel_CFG_intrCtl                        4
    #define   LSb16dHubChannel_CFG_intrCtl                        4
    #define       bdHubChannel_CFG_intrCtl                     1
    #define   MSK32dHubChannel_CFG_intrCtl                        0x00000010
    #define        dHubChannel_CFG_intrCtl_cmdDone                          0x0
    #define        dHubChannel_CFG_intrCtl_chIdle                           0x1
    ///////////////////////////////////////////////////////////
    #define     RA_dHubChannel_START                           0x0004

    #define     BA_dHubChannel_START_EN                        0x0004
    #define     B16dHubChannel_START_EN                        0x0004
    #define   LSb32dHubChannel_START_EN                           0
    #define   LSb16dHubChannel_START_EN                           0
    #define       bdHubChannel_START_EN                        1
    #define   MSK32dHubChannel_START_EN                           0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubChannel_CLEAR                           0x0008

    #define     BA_dHubChannel_CLEAR_EN                        0x0008
    #define     B16dHubChannel_CLEAR_EN                        0x0008
    #define   LSb32dHubChannel_CLEAR_EN                           0
    #define   LSb16dHubChannel_CLEAR_EN                           0
    #define       bdHubChannel_CLEAR_EN                        1
    #define   MSK32dHubChannel_CLEAR_EN                           0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubChannel_FLUSH                           0x000C

    #define     BA_dHubChannel_FLUSH_EN                        0x000C
    #define     B16dHubChannel_FLUSH_EN                        0x000C
    #define   LSb32dHubChannel_FLUSH_EN                           0
    #define   LSb16dHubChannel_FLUSH_EN                           0
    #define       bdHubChannel_FLUSH_EN                        1
    #define   MSK32dHubChannel_FLUSH_EN                           0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubChannel {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubChannel_CFG_MTU(r32)                    _BFGET_(r32, 1, 0)
    #define   SET32dHubChannel_CFG_MTU(r32,v)                  _BFSET_(r32, 1, 0,v)
    #define   GET16dHubChannel_CFG_MTU(r16)                    _BFGET_(r16, 1, 0)
    #define   SET16dHubChannel_CFG_MTU(r16,v)                  _BFSET_(r16, 1, 0,v)

    #define   GET32dHubChannel_CFG_QoS(r32)                    _BFGET_(r32, 2, 2)
    #define   SET32dHubChannel_CFG_QoS(r32,v)                  _BFSET_(r32, 2, 2,v)
    #define   GET16dHubChannel_CFG_QoS(r16)                    _BFGET_(r16, 2, 2)
    #define   SET16dHubChannel_CFG_QoS(r16,v)                  _BFSET_(r16, 2, 2,v)

    #define   GET32dHubChannel_CFG_selfLoop(r32)               _BFGET_(r32, 3, 3)
    #define   SET32dHubChannel_CFG_selfLoop(r32,v)             _BFSET_(r32, 3, 3,v)
    #define   GET16dHubChannel_CFG_selfLoop(r16)               _BFGET_(r16, 3, 3)
    #define   SET16dHubChannel_CFG_selfLoop(r16,v)             _BFSET_(r16, 3, 3,v)

    #define   GET32dHubChannel_CFG_intrCtl(r32)                _BFGET_(r32, 4, 4)
    #define   SET32dHubChannel_CFG_intrCtl(r32,v)              _BFSET_(r32, 4, 4,v)
    #define   GET16dHubChannel_CFG_intrCtl(r16)                _BFGET_(r16, 4, 4)
    #define   SET16dHubChannel_CFG_intrCtl(r16,v)              _BFSET_(r16, 4, 4,v)

    #define     w32dHubChannel_CFG                             {\
            UNSG32 uCFG_MTU                                    :  2;\
            UNSG32 uCFG_QoS                                    :  1;\
            UNSG32 uCFG_selfLoop                               :  1;\
            UNSG32 uCFG_intrCtl                                :  1;\
            UNSG32 RSVDx0_b5                                   : 27;\
          }
    union { UNSG32 u32dHubChannel_CFG;
            struct w32dHubChannel_CFG;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubChannel_START_EN(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32dHubChannel_START_EN(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16dHubChannel_START_EN(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16dHubChannel_START_EN(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32dHubChannel_START                           {\
            UNSG32 uSTART_EN                                   :  1;\
            UNSG32 RSVDx4_b1                                   : 31;\
          }
    union { UNSG32 u32dHubChannel_START;
            struct w32dHubChannel_START;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubChannel_CLEAR_EN(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32dHubChannel_CLEAR_EN(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16dHubChannel_CLEAR_EN(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16dHubChannel_CLEAR_EN(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32dHubChannel_CLEAR                           {\
            UNSG32 uCLEAR_EN                                   :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32dHubChannel_CLEAR;
            struct w32dHubChannel_CLEAR;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubChannel_FLUSH_EN(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32dHubChannel_FLUSH_EN(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16dHubChannel_FLUSH_EN(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16dHubChannel_FLUSH_EN(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32dHubChannel_FLUSH                           {\
            UNSG32 uFLUSH_EN                                   :  1;\
            UNSG32 RSVDxC_b1                                   : 31;\
          }
    union { UNSG32 u32dHubChannel_FLUSH;
            struct w32dHubChannel_FLUSH;
          };
    ///////////////////////////////////////////////////////////
    } SIE_dHubChannel;

    typedef union  T32dHubChannel_CFG
          { UNSG32 u32;
            struct w32dHubChannel_CFG;
                 } T32dHubChannel_CFG;
    typedef union  T32dHubChannel_START
          { UNSG32 u32;
            struct w32dHubChannel_START;
                 } T32dHubChannel_START;
    typedef union  T32dHubChannel_CLEAR
          { UNSG32 u32;
            struct w32dHubChannel_CLEAR;
                 } T32dHubChannel_CLEAR;
    typedef union  T32dHubChannel_FLUSH
          { UNSG32 u32;
            struct w32dHubChannel_FLUSH;
                 } T32dHubChannel_FLUSH;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubChannel_CFG
          { UNSG32 u32[1];
            struct {
            struct w32dHubChannel_CFG;
                   };
                 } TdHubChannel_CFG;
    typedef union  TdHubChannel_START
          { UNSG32 u32[1];
            struct {
            struct w32dHubChannel_START;
                   };
                 } TdHubChannel_START;
    typedef union  TdHubChannel_CLEAR
          { UNSG32 u32[1];
            struct {
            struct w32dHubChannel_CLEAR;
                   };
                 } TdHubChannel_CLEAR;
    typedef union  TdHubChannel_FLUSH
          { UNSG32 u32[1];
            struct {
            struct w32dHubChannel_FLUSH;
                   };
                 } TdHubChannel_FLUSH;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubChannel_drvrd(SIE_dHubChannel *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubChannel_drvwr(SIE_dHubChannel *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubChannel_reset(SIE_dHubChannel *p);
     SIGN32 dHubChannel_cmp  (SIE_dHubChannel *p, SIE_dHubChannel *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubChannel_check(p,pie,pfx,hLOG) dHubChannel_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubChannel_print(p,    pfx,hLOG) dHubChannel_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubChannel
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubReg                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 SemaHub              
///               $SemaHub             SemaHub           REG          
///                                    ###
///                                    * For dHub internal interrupts, also provide semaphore service for external (all channels will be opened to external to access).
///                                    * Channel 0 is used for dHub.HBO interrupt.
///                                    * Channel N+1 is used for dHub.Channel[N] interrupt.
///                                    ###
///     @ 0x00400                      (P)
///     # 0x00400 HBO                  
///               $HBO                 HBO               REG          
///                                    ###
///                                    * For dHub channels (command/data queues), also provide (unused) FIFO service for external.
///                                    * Channel 2N is used for dHub.Channel[N] command.
///                                    * Channel 2N+1 is used for dHub.Channel[N] data.
///                                    ###
///     @ 0x00B00 ARR                  (P)
///     # 0x00B00 channelCtl           
///               $dHubChannel         channelCtl        REG      [16]
///                                    ###
///                                    * Up-to 16 channels
///                                    ###
///     @ 0x00C00 BUSY                 (R-)
///               %unsigned 16 ST                        
///                                    ###
///                                    * Per channel status
///                                    * 0: no ongoing command is being processed, and no flushing is taking place
///                                    * 1: channel controller is busy
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00C04 PENDING              (R-)
///               %unsigned 16 ST                        
///                                    ###
///                                    * Per channel status
///                                    * 0: Response queue is empty, meaning no outstanding AXI transactions
///                                    * 1: there exist some outstanding AXI transactions
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00C08 busRstEn             (RW-)
///               %unsigned 1  reg                       0x0
///                                    ###
///                                    * Write one to this register will trigger gate-keeper to take over the AXI bus.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00C0C busRstDone           (R-)
///               %unsigned 1  reg                       0x1
///                                    ###
///                                    * After gate-keeper take over the AXI bus, it will assert this bit once there is no outstanding transactions on AXI bus.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00C10 flowCtl              (P)
///               %unsigned 8  rAlpha                    0x0
///               %unsigned 8  wAlpha                    0x0
///                                    ###
///                                    * Flow control parameter for read and write axi master.
///                                    * clkCnt=(alpha*bstLen)>>4.
///                                    * This # of clock cycles will be blocked for the axi master after an axi command with the burst length of “bstLen”.
///                                    * When set alpha to be 0, the master will never be blocked.
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00C14 axiCmdCol            (P)
///               %unsigned 16 rCnt                      0x0
///               %unsigned 16 wCnt                      0x0
///                                    ###
///                                    * Axi command collection. The counter value indicate read/write do the command collection for # of clock cycles, start from the first command pushed to an empty command Q. Here are the conditions that will trigger the Axi master to send out command.
///                                    * Cmd Q full or the counter count down to “0” from the programmed value.
///                                    * Set the counter to 0 will disable the command collection.
///                                    * end dHubReg
///                                    ###
///     @ 0x00C18                      (W-)
///     #         # Stuffing bytes...
///               %% 1856
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    3328B, bits:    3282b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubReg
#define h_dHubReg (){}

    #define     RA_dHubReg_SemaHub                             0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_HBO                                 0x0400
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_ARR                                 0x0B00
    #define     RA_dHubReg_channelCtl                          0x0B00
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_BUSY                                0x0C00

    #define     BA_dHubReg_BUSY_ST                             0x0C00
    #define     B16dHubReg_BUSY_ST                             0x0C00
    #define   LSb32dHubReg_BUSY_ST                                0
    #define   LSb16dHubReg_BUSY_ST                                0
    #define       bdHubReg_BUSY_ST                             16
    #define   MSK32dHubReg_BUSY_ST                                0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_PENDING                             0x0C04

    #define     BA_dHubReg_PENDING_ST                          0x0C04
    #define     B16dHubReg_PENDING_ST                          0x0C04
    #define   LSb32dHubReg_PENDING_ST                             0
    #define   LSb16dHubReg_PENDING_ST                             0
    #define       bdHubReg_PENDING_ST                          16
    #define   MSK32dHubReg_PENDING_ST                             0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_busRstEn                            0x0C08

    #define     BA_dHubReg_busRstEn_reg                        0x0C08
    #define     B16dHubReg_busRstEn_reg                        0x0C08
    #define   LSb32dHubReg_busRstEn_reg                           0
    #define   LSb16dHubReg_busRstEn_reg                           0
    #define       bdHubReg_busRstEn_reg                        1
    #define   MSK32dHubReg_busRstEn_reg                           0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_busRstDone                          0x0C0C

    #define     BA_dHubReg_busRstDone_reg                      0x0C0C
    #define     B16dHubReg_busRstDone_reg                      0x0C0C
    #define   LSb32dHubReg_busRstDone_reg                         0
    #define   LSb16dHubReg_busRstDone_reg                         0
    #define       bdHubReg_busRstDone_reg                      1
    #define   MSK32dHubReg_busRstDone_reg                         0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_flowCtl                             0x0C10

    #define     BA_dHubReg_flowCtl_rAlpha                      0x0C10
    #define     B16dHubReg_flowCtl_rAlpha                      0x0C10
    #define   LSb32dHubReg_flowCtl_rAlpha                         0
    #define   LSb16dHubReg_flowCtl_rAlpha                         0
    #define       bdHubReg_flowCtl_rAlpha                      8
    #define   MSK32dHubReg_flowCtl_rAlpha                         0x000000FF

    #define     BA_dHubReg_flowCtl_wAlpha                      0x0C11
    #define     B16dHubReg_flowCtl_wAlpha                      0x0C10
    #define   LSb32dHubReg_flowCtl_wAlpha                         8
    #define   LSb16dHubReg_flowCtl_wAlpha                         8
    #define       bdHubReg_flowCtl_wAlpha                      8
    #define   MSK32dHubReg_flowCtl_wAlpha                         0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_axiCmdCol                           0x0C14

    #define     BA_dHubReg_axiCmdCol_rCnt                      0x0C14
    #define     B16dHubReg_axiCmdCol_rCnt                      0x0C14
    #define   LSb32dHubReg_axiCmdCol_rCnt                         0
    #define   LSb16dHubReg_axiCmdCol_rCnt                         0
    #define       bdHubReg_axiCmdCol_rCnt                      16
    #define   MSK32dHubReg_axiCmdCol_rCnt                         0x0000FFFF

    #define     BA_dHubReg_axiCmdCol_wCnt                      0x0C16
    #define     B16dHubReg_axiCmdCol_wCnt                      0x0C16
    #define   LSb32dHubReg_axiCmdCol_wCnt                         16
    #define   LSb16dHubReg_axiCmdCol_wCnt                         0
    #define       bdHubReg_axiCmdCol_wCnt                      16
    #define   MSK32dHubReg_axiCmdCol_wCnt                         0xFFFF0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubReg {
    ///////////////////////////////////////////////////////////
              SIE_SemaHub                                      ie_SemaHub;
    ///////////////////////////////////////////////////////////
              SIE_HBO                                          ie_HBO;
    ///////////////////////////////////////////////////////////
              SIE_dHubChannel                                  ie_channelCtl[16];
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_BUSY_ST(r32)                        _BFGET_(r32,15, 0)
    #define   SET32dHubReg_BUSY_ST(r32,v)                      _BFSET_(r32,15, 0,v)
    #define   GET16dHubReg_BUSY_ST(r16)                        _BFGET_(r16,15, 0)
    #define   SET16dHubReg_BUSY_ST(r16,v)                      _BFSET_(r16,15, 0,v)

    #define     w32dHubReg_BUSY                                {\
            UNSG32 uBUSY_ST                                    : 16;\
            UNSG32 RSVDxC00_b16                                : 16;\
          }
    union { UNSG32 u32dHubReg_BUSY;
            struct w32dHubReg_BUSY;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_PENDING_ST(r32)                     _BFGET_(r32,15, 0)
    #define   SET32dHubReg_PENDING_ST(r32,v)                   _BFSET_(r32,15, 0,v)
    #define   GET16dHubReg_PENDING_ST(r16)                     _BFGET_(r16,15, 0)
    #define   SET16dHubReg_PENDING_ST(r16,v)                   _BFSET_(r16,15, 0,v)

    #define     w32dHubReg_PENDING                             {\
            UNSG32 uPENDING_ST                                 : 16;\
            UNSG32 RSVDxC04_b16                                : 16;\
          }
    union { UNSG32 u32dHubReg_PENDING;
            struct w32dHubReg_PENDING;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_busRstEn_reg(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32dHubReg_busRstEn_reg(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16dHubReg_busRstEn_reg(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16dHubReg_busRstEn_reg(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32dHubReg_busRstEn                            {\
            UNSG32 ubusRstEn_reg                               :  1;\
            UNSG32 RSVDxC08_b1                                 : 31;\
          }
    union { UNSG32 u32dHubReg_busRstEn;
            struct w32dHubReg_busRstEn;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_busRstDone_reg(r32)                 _BFGET_(r32, 0, 0)
    #define   SET32dHubReg_busRstDone_reg(r32,v)               _BFSET_(r32, 0, 0,v)
    #define   GET16dHubReg_busRstDone_reg(r16)                 _BFGET_(r16, 0, 0)
    #define   SET16dHubReg_busRstDone_reg(r16,v)               _BFSET_(r16, 0, 0,v)

    #define     w32dHubReg_busRstDone                          {\
            UNSG32 ubusRstDone_reg                             :  1;\
            UNSG32 RSVDxC0C_b1                                 : 31;\
          }
    union { UNSG32 u32dHubReg_busRstDone;
            struct w32dHubReg_busRstDone;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_flowCtl_rAlpha(r32)                 _BFGET_(r32, 7, 0)
    #define   SET32dHubReg_flowCtl_rAlpha(r32,v)               _BFSET_(r32, 7, 0,v)
    #define   GET16dHubReg_flowCtl_rAlpha(r16)                 _BFGET_(r16, 7, 0)
    #define   SET16dHubReg_flowCtl_rAlpha(r16,v)               _BFSET_(r16, 7, 0,v)

    #define   GET32dHubReg_flowCtl_wAlpha(r32)                 _BFGET_(r32,15, 8)
    #define   SET32dHubReg_flowCtl_wAlpha(r32,v)               _BFSET_(r32,15, 8,v)
    #define   GET16dHubReg_flowCtl_wAlpha(r16)                 _BFGET_(r16,15, 8)
    #define   SET16dHubReg_flowCtl_wAlpha(r16,v)               _BFSET_(r16,15, 8,v)

    #define     w32dHubReg_flowCtl                             {\
            UNSG32 uflowCtl_rAlpha                             :  8;\
            UNSG32 uflowCtl_wAlpha                             :  8;\
            UNSG32 RSVDxC10_b16                                : 16;\
          }
    union { UNSG32 u32dHubReg_flowCtl;
            struct w32dHubReg_flowCtl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_axiCmdCol_rCnt(r32)                 _BFGET_(r32,15, 0)
    #define   SET32dHubReg_axiCmdCol_rCnt(r32,v)               _BFSET_(r32,15, 0,v)
    #define   GET16dHubReg_axiCmdCol_rCnt(r16)                 _BFGET_(r16,15, 0)
    #define   SET16dHubReg_axiCmdCol_rCnt(r16,v)               _BFSET_(r16,15, 0,v)

    #define   GET32dHubReg_axiCmdCol_wCnt(r32)                 _BFGET_(r32,31,16)
    #define   SET32dHubReg_axiCmdCol_wCnt(r32,v)               _BFSET_(r32,31,16,v)
    #define   GET16dHubReg_axiCmdCol_wCnt(r16)                 _BFGET_(r16,15, 0)
    #define   SET16dHubReg_axiCmdCol_wCnt(r16,v)               _BFSET_(r16,15, 0,v)

    #define     w32dHubReg_axiCmdCol                           {\
            UNSG32 uaxiCmdCol_rCnt                             : 16;\
            UNSG32 uaxiCmdCol_wCnt                             : 16;\
          }
    union { UNSG32 u32dHubReg_axiCmdCol;
            struct w32dHubReg_axiCmdCol;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxC18                                    [232];
    ///////////////////////////////////////////////////////////
    } SIE_dHubReg;

    typedef union  T32dHubReg_BUSY
          { UNSG32 u32;
            struct w32dHubReg_BUSY;
                 } T32dHubReg_BUSY;
    typedef union  T32dHubReg_PENDING
          { UNSG32 u32;
            struct w32dHubReg_PENDING;
                 } T32dHubReg_PENDING;
    typedef union  T32dHubReg_busRstEn
          { UNSG32 u32;
            struct w32dHubReg_busRstEn;
                 } T32dHubReg_busRstEn;
    typedef union  T32dHubReg_busRstDone
          { UNSG32 u32;
            struct w32dHubReg_busRstDone;
                 } T32dHubReg_busRstDone;
    typedef union  T32dHubReg_flowCtl
          { UNSG32 u32;
            struct w32dHubReg_flowCtl;
                 } T32dHubReg_flowCtl;
    typedef union  T32dHubReg_axiCmdCol
          { UNSG32 u32;
            struct w32dHubReg_axiCmdCol;
                 } T32dHubReg_axiCmdCol;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubReg_BUSY
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_BUSY;
                   };
                 } TdHubReg_BUSY;
    typedef union  TdHubReg_PENDING
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_PENDING;
                   };
                 } TdHubReg_PENDING;
    typedef union  TdHubReg_busRstEn
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_busRstEn;
                   };
                 } TdHubReg_busRstEn;
    typedef union  TdHubReg_busRstDone
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_busRstDone;
                   };
                 } TdHubReg_busRstDone;
    typedef union  TdHubReg_flowCtl
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_flowCtl;
                   };
                 } TdHubReg_flowCtl;
    typedef union  TdHubReg_axiCmdCol
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_axiCmdCol;
                   };
                 } TdHubReg_axiCmdCol;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubReg_drvrd(SIE_dHubReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubReg_drvwr(SIE_dHubReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubReg_reset(SIE_dHubReg *p);
     SIGN32 dHubReg_cmp  (SIE_dHubReg *p, SIE_dHubReg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubReg_check(p,pie,pfx,hLOG) dHubReg_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubReg_print(p,    pfx,hLOG) dHubReg_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubReg
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubCmd2D               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 MEM                  (W-)
///               %unsigned 32 addr                      
///                                    ###
///                                    * DRAM data address of the 2D buffer, in bytes.
///                                    ###
///     @ 0x00004 DESC                 (W-)
///               %unsigned 16 stride                    
///                                    ###
///                                    * Line stride size in bytes
///                                    ###
///               %unsigned 13 numLine                   
///                                    ###
///                                    * Number of lines in buffer. Size of 0 is forbidden.
///                                    ###
///               %unsigned 2  hdrLoop                   
///                                    ###
///                                    * Size of line-loop for choosing dHubCmdHDR
///                                    * 0 is treated as 4
///                                    ###
///               %unsigned 1  interrupt                 
///                                    ###
///                                    * 1: raise interrupt upon whole 2D command finish.
///                                    * 1: set the last 1D command interrupt bit.
///                                    * 0 : use the default 1D command interrupt bit.
///                                    ###
///     @ 0x00008 START                (W-)
///               %unsigned 1  EN                        0x0
///                                    ###
///                                    * Write 1 to enable the channel; 0 to pause the channel
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0000C CLEAR                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * Write anything to reset the 2D engine.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00010                      (P)
///     # 0x00010 HDR                  
///               $dHubCmdHDR          HDR               REG       [4]
///                                    ###
///                                    * Headers used in generating dHubCmd for each line in looping order, loop size (1,2,3,4) specified by DESC_hdrLoop
///                                    * end dHubCmd2D
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      32B, bits:     182b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubCmd2D
#define h_dHubCmd2D (){}

    #define     RA_dHubCmd2D_MEM                               0x0000

    #define     BA_dHubCmd2D_MEM_addr                          0x0000
    #define     B16dHubCmd2D_MEM_addr                          0x0000
    #define   LSb32dHubCmd2D_MEM_addr                             0
    #define   LSb16dHubCmd2D_MEM_addr                             0
    #define       bdHubCmd2D_MEM_addr                          32
    #define   MSK32dHubCmd2D_MEM_addr                             0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd2D_DESC                              0x0004

    #define     BA_dHubCmd2D_DESC_stride                       0x0004
    #define     B16dHubCmd2D_DESC_stride                       0x0004
    #define   LSb32dHubCmd2D_DESC_stride                          0
    #define   LSb16dHubCmd2D_DESC_stride                          0
    #define       bdHubCmd2D_DESC_stride                       16
    #define   MSK32dHubCmd2D_DESC_stride                          0x0000FFFF

    #define     BA_dHubCmd2D_DESC_numLine                      0x0006
    #define     B16dHubCmd2D_DESC_numLine                      0x0006
    #define   LSb32dHubCmd2D_DESC_numLine                         16
    #define   LSb16dHubCmd2D_DESC_numLine                         0
    #define       bdHubCmd2D_DESC_numLine                      13
    #define   MSK32dHubCmd2D_DESC_numLine                         0x1FFF0000

    #define     BA_dHubCmd2D_DESC_hdrLoop                      0x0007
    #define     B16dHubCmd2D_DESC_hdrLoop                      0x0006
    #define   LSb32dHubCmd2D_DESC_hdrLoop                         29
    #define   LSb16dHubCmd2D_DESC_hdrLoop                         13
    #define       bdHubCmd2D_DESC_hdrLoop                      2
    #define   MSK32dHubCmd2D_DESC_hdrLoop                         0x60000000

    #define     BA_dHubCmd2D_DESC_interrupt                    0x0007
    #define     B16dHubCmd2D_DESC_interrupt                    0x0006
    #define   LSb32dHubCmd2D_DESC_interrupt                       31
    #define   LSb16dHubCmd2D_DESC_interrupt                       15
    #define       bdHubCmd2D_DESC_interrupt                    1
    #define   MSK32dHubCmd2D_DESC_interrupt                       0x80000000
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd2D_START                             0x0008

    #define     BA_dHubCmd2D_START_EN                          0x0008
    #define     B16dHubCmd2D_START_EN                          0x0008
    #define   LSb32dHubCmd2D_START_EN                             0
    #define   LSb16dHubCmd2D_START_EN                             0
    #define       bdHubCmd2D_START_EN                          1
    #define   MSK32dHubCmd2D_START_EN                             0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd2D_CLEAR                             0x000C

    #define     BA_dHubCmd2D_CLEAR_EN                          0x000C
    #define     B16dHubCmd2D_CLEAR_EN                          0x000C
    #define   LSb32dHubCmd2D_CLEAR_EN                             0
    #define   LSb16dHubCmd2D_CLEAR_EN                             0
    #define       bdHubCmd2D_CLEAR_EN                          1
    #define   MSK32dHubCmd2D_CLEAR_EN                             0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd2D_HDR                               0x0010
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubCmd2D {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd2D_MEM_addr(r32)                     _BFGET_(r32,31, 0)
    #define   SET32dHubCmd2D_MEM_addr(r32,v)                   _BFSET_(r32,31, 0,v)

    #define     w32dHubCmd2D_MEM                               {\
            UNSG32 uMEM_addr                                   : 32;\
          }
    union { UNSG32 u32dHubCmd2D_MEM;
            struct w32dHubCmd2D_MEM;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd2D_DESC_stride(r32)                  _BFGET_(r32,15, 0)
    #define   SET32dHubCmd2D_DESC_stride(r32,v)                _BFSET_(r32,15, 0,v)
    #define   GET16dHubCmd2D_DESC_stride(r16)                  _BFGET_(r16,15, 0)
    #define   SET16dHubCmd2D_DESC_stride(r16,v)                _BFSET_(r16,15, 0,v)

    #define   GET32dHubCmd2D_DESC_numLine(r32)                 _BFGET_(r32,28,16)
    #define   SET32dHubCmd2D_DESC_numLine(r32,v)               _BFSET_(r32,28,16,v)
    #define   GET16dHubCmd2D_DESC_numLine(r16)                 _BFGET_(r16,12, 0)
    #define   SET16dHubCmd2D_DESC_numLine(r16,v)               _BFSET_(r16,12, 0,v)

    #define   GET32dHubCmd2D_DESC_hdrLoop(r32)                 _BFGET_(r32,30,29)
    #define   SET32dHubCmd2D_DESC_hdrLoop(r32,v)               _BFSET_(r32,30,29,v)
    #define   GET16dHubCmd2D_DESC_hdrLoop(r16)                 _BFGET_(r16,14,13)
    #define   SET16dHubCmd2D_DESC_hdrLoop(r16,v)               _BFSET_(r16,14,13,v)

    #define   GET32dHubCmd2D_DESC_interrupt(r32)               _BFGET_(r32,31,31)
    #define   SET32dHubCmd2D_DESC_interrupt(r32,v)             _BFSET_(r32,31,31,v)
    #define   GET16dHubCmd2D_DESC_interrupt(r16)               _BFGET_(r16,15,15)
    #define   SET16dHubCmd2D_DESC_interrupt(r16,v)             _BFSET_(r16,15,15,v)

    #define     w32dHubCmd2D_DESC                              {\
            UNSG32 uDESC_stride                                : 16;\
            UNSG32 uDESC_numLine                               : 13;\
            UNSG32 uDESC_hdrLoop                               :  2;\
            UNSG32 uDESC_interrupt                             :  1;\
          }
    union { UNSG32 u32dHubCmd2D_DESC;
            struct w32dHubCmd2D_DESC;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd2D_START_EN(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32dHubCmd2D_START_EN(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16dHubCmd2D_START_EN(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16dHubCmd2D_START_EN(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define     w32dHubCmd2D_START                             {\
            UNSG32 uSTART_EN                                   :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32dHubCmd2D_START;
            struct w32dHubCmd2D_START;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd2D_CLEAR_EN(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32dHubCmd2D_CLEAR_EN(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16dHubCmd2D_CLEAR_EN(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16dHubCmd2D_CLEAR_EN(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define     w32dHubCmd2D_CLEAR                             {\
            UNSG32 uCLEAR_EN                                   :  1;\
            UNSG32 RSVDxC_b1                                   : 31;\
          }
    union { UNSG32 u32dHubCmd2D_CLEAR;
            struct w32dHubCmd2D_CLEAR;
          };
    ///////////////////////////////////////////////////////////
              SIE_dHubCmdHDR                                   ie_HDR[4];
    ///////////////////////////////////////////////////////////
    } SIE_dHubCmd2D;

    typedef union  T32dHubCmd2D_MEM
          { UNSG32 u32;
            struct w32dHubCmd2D_MEM;
                 } T32dHubCmd2D_MEM;
    typedef union  T32dHubCmd2D_DESC
          { UNSG32 u32;
            struct w32dHubCmd2D_DESC;
                 } T32dHubCmd2D_DESC;
    typedef union  T32dHubCmd2D_START
          { UNSG32 u32;
            struct w32dHubCmd2D_START;
                 } T32dHubCmd2D_START;
    typedef union  T32dHubCmd2D_CLEAR
          { UNSG32 u32;
            struct w32dHubCmd2D_CLEAR;
                 } T32dHubCmd2D_CLEAR;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubCmd2D_MEM
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd2D_MEM;
                   };
                 } TdHubCmd2D_MEM;
    typedef union  TdHubCmd2D_DESC
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd2D_DESC;
                   };
                 } TdHubCmd2D_DESC;
    typedef union  TdHubCmd2D_START
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd2D_START;
                   };
                 } TdHubCmd2D_START;
    typedef union  TdHubCmd2D_CLEAR
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd2D_CLEAR;
                   };
                 } TdHubCmd2D_CLEAR;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubCmd2D_drvrd(SIE_dHubCmd2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubCmd2D_drvwr(SIE_dHubCmd2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubCmd2D_reset(SIE_dHubCmd2D *p);
     SIGN32 dHubCmd2D_cmp  (SIE_dHubCmd2D *p, SIE_dHubCmd2D *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubCmd2D_check(p,pie,pfx,hLOG) dHubCmd2D_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubCmd2D_print(p,    pfx,hLOG) dHubCmd2D_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubCmd2D
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubQuery                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 RESP                 (R-)
///               %unsigned 16 ST                        
///                                    ###
///                                    * Dhub channel state machine status.
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubQuery
#define h_dHubQuery (){}

    #define     RA_dHubQuery_RESP                              0x0000

    #define     BA_dHubQuery_RESP_ST                           0x0000
    #define     B16dHubQuery_RESP_ST                           0x0000
    #define   LSb32dHubQuery_RESP_ST                              0
    #define   LSb16dHubQuery_RESP_ST                              0
    #define       bdHubQuery_RESP_ST                           16
    #define   MSK32dHubQuery_RESP_ST                              0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubQuery {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubQuery_RESP_ST(r32)                      _BFGET_(r32,15, 0)
    #define   SET32dHubQuery_RESP_ST(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16dHubQuery_RESP_ST(r16)                      _BFGET_(r16,15, 0)
    #define   SET16dHubQuery_RESP_ST(r16,v)                    _BFSET_(r16,15, 0,v)

    #define     w32dHubQuery_RESP                              {\
            UNSG32 uRESP_ST                                    : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32dHubQuery_RESP;
            struct w32dHubQuery_RESP;
          };
    ///////////////////////////////////////////////////////////
    } SIE_dHubQuery;

    typedef union  T32dHubQuery_RESP
          { UNSG32 u32;
            struct w32dHubQuery_RESP;
                 } T32dHubQuery_RESP;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubQuery_RESP
          { UNSG32 u32[1];
            struct {
            struct w32dHubQuery_RESP;
                   };
                 } TdHubQuery_RESP;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubQuery_drvrd(SIE_dHubQuery *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubQuery_drvwr(SIE_dHubQuery *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubQuery_reset(SIE_dHubQuery *p);
     SIGN32 dHubQuery_cmp  (SIE_dHubQuery *p, SIE_dHubQuery *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubQuery_check(p,pie,pfx,hLOG) dHubQuery_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubQuery_print(p,    pfx,hLOG) dHubQuery_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubQuery
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubReg2D               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 dHub                 
///               $dHubReg             dHub              REG          
///     @ 0x00D00 ARR                  (P)
///     # 0x00D00 Cmd2D                
///               $dHubCmd2D           Cmd2D             REG      [16]
///                                    ###
///                                    * Up-to 16 2D channels.
///                                    * 2D Channel[N] is connected to dHub.Channel[N] command queue, that is, dHub.HBO.Channel[2N]
///                                    * Note: Number of 2D channels could be less than dHub channels (rest of are 1D only)
///                                    ###
///     @ 0x00F00 BUSY                 (R-)
///               %unsigned 16 ST                        
///                                    ###
///                                    * Per channel status
///                                    * 0: no ongoing command is being processed
///                                    * 1: channel controller is busy
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00F04                      (W-)
///     #         # Stuffing bytes...
///               %% 480
///     @ 0x00F40                      (P)
///     # 0x00F40 CH_ST                
///               $dHubQuery           CH_ST             MEM      [16]
///                                    ###
///                                    * end dHubReg2D
///                                    ###
///     @ 0x00F80                      (W-)
///     #         # Stuffing bytes...
///               %% 1024
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    4096B, bits:    6242b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubReg2D
#define h_dHubReg2D (){}

    #define     RA_dHubReg2D_dHub                              0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg2D_ARR                               0x0D00
    #define     RA_dHubReg2D_Cmd2D                             0x0D00
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg2D_BUSY                              0x0F00

    #define     BA_dHubReg2D_BUSY_ST                           0x0F00
    #define     B16dHubReg2D_BUSY_ST                           0x0F00
    #define   LSb32dHubReg2D_BUSY_ST                              0
    #define   LSb16dHubReg2D_BUSY_ST                              0
    #define       bdHubReg2D_BUSY_ST                           16
    #define   MSK32dHubReg2D_BUSY_ST                              0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg2D_CH_ST                             0x0F40
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubReg2D {
    ///////////////////////////////////////////////////////////
              SIE_dHubReg                                      ie_dHub;
    ///////////////////////////////////////////////////////////
              SIE_dHubCmd2D                                    ie_Cmd2D[16];
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg2D_BUSY_ST(r32)                      _BFGET_(r32,15, 0)
    #define   SET32dHubReg2D_BUSY_ST(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16dHubReg2D_BUSY_ST(r16)                      _BFGET_(r16,15, 0)
    #define   SET16dHubReg2D_BUSY_ST(r16,v)                    _BFSET_(r16,15, 0,v)

    #define     w32dHubReg2D_BUSY                              {\
            UNSG32 uBUSY_ST                                    : 16;\
            UNSG32 RSVDxF00_b16                                : 16;\
          }
    union { UNSG32 u32dHubReg2D_BUSY;
            struct w32dHubReg2D_BUSY;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxF04                                    [60];
    ///////////////////////////////////////////////////////////
              SIE_dHubQuery                                    ie_CH_ST[16];
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxF80                                    [128];
    ///////////////////////////////////////////////////////////
    } SIE_dHubReg2D;

    typedef union  T32dHubReg2D_BUSY
          { UNSG32 u32;
            struct w32dHubReg2D_BUSY;
                 } T32dHubReg2D_BUSY;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubReg2D_BUSY
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg2D_BUSY;
                   };
                 } TdHubReg2D_BUSY;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubReg2D_drvrd(SIE_dHubReg2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubReg2D_drvwr(SIE_dHubReg2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubReg2D_reset(SIE_dHubReg2D *p);
     SIGN32 dHubReg2D_cmp  (SIE_dHubReg2D *p, SIE_dHubReg2D *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubReg2D_check(p,pie,pfx,hLOG) dHubReg2D_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubReg2D_print(p,    pfx,hLOG) dHubReg2D_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubReg2D
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE crcTblEntry                              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 32 word                      
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_crcTblEntry
#define h_crcTblEntry (){}

    #define     BA_crcTblEntry_word                            0x0000
    #define     B16crcTblEntry_word                            0x0000
    #define   LSb32crcTblEntry_word                               0
    #define   LSb16crcTblEntry_word                               0
    #define       bcrcTblEntry_word                            32
    #define   MSK32crcTblEntry_word                               0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_crcTblEntry {
    ///////////////////////////////////////////////////////////
    #define   GET32crcTblEntry_word(r32)                       _BFGET_(r32,31, 0)
    #define   SET32crcTblEntry_word(r32,v)                     _BFSET_(r32,31, 0,v)

            UNSG32 u_word                                      : 32;
    ///////////////////////////////////////////////////////////
    } SIE_crcTblEntry;

    ///////////////////////////////////////////////////////////
     SIGN32 crcTblEntry_drvrd(SIE_crcTblEntry *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 crcTblEntry_drvwr(SIE_crcTblEntry *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void crcTblEntry_reset(SIE_crcTblEntry *p);
     SIGN32 crcTblEntry_cmp  (SIE_crcTblEntry *p, SIE_crcTblEntry *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define crcTblEntry_check(p,pie,pfx,hLOG) crcTblEntry_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define crcTblEntry_print(p,    pfx,hLOG) crcTblEntry_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: crcTblEntry
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE crcCell                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 Auto                 (P)
///               %unsigned 1  clr_sum                   0x1
///               %unsigned 1  clr_cnt                   0x1
///               %unsigned 1  latch                     0x1
///                                    ###
///                                    * “1” to enable the auto operation
///                                    ###
///               %%        29         # Stuffing bits...
///     @ 0x00004 Manual               (RW-)
///               %unsigned 1  clr_sum                   
///               %unsigned 1  clr_cnt                   
///               %unsigned 1  latch                     
///                                    ###
///                                    * Write 1 the bit field for corresponding manual operation.
///                                    ###
///               %%        29         # Stuffing bits...
///     @ 0x00008 Latch                (P)
///               %unsigned 32 cnt                       0x64
///                                    ###
///                                    * When auto latch is enabled, the latch operation will be triggered when the number of data transaction is reached.
///                                    ###
///     @ 0x0000C cnt                  (R-)
///               %unsigned 32 val                       
///                                    ###
///                                    * The data transaction counter.
///                                    ###
///     @ 0x00010                      (W-)
///     #         # Stuffing bytes...
///               %% 128
///     @ 0x00020 CRCTBL               (R-)
///     # 0x00020 sum                  
///               $crcTblEntry         sum               MEM       [8]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      64B, bits:     102b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_crcCell
#define h_crcCell (){}

    #define     RA_crcCell_Auto                                0x0000

    #define     BA_crcCell_Auto_clr_sum                        0x0000
    #define     B16crcCell_Auto_clr_sum                        0x0000
    #define   LSb32crcCell_Auto_clr_sum                           0
    #define   LSb16crcCell_Auto_clr_sum                           0
    #define       bcrcCell_Auto_clr_sum                        1
    #define   MSK32crcCell_Auto_clr_sum                           0x00000001

    #define     BA_crcCell_Auto_clr_cnt                        0x0000
    #define     B16crcCell_Auto_clr_cnt                        0x0000
    #define   LSb32crcCell_Auto_clr_cnt                           1
    #define   LSb16crcCell_Auto_clr_cnt                           1
    #define       bcrcCell_Auto_clr_cnt                        1
    #define   MSK32crcCell_Auto_clr_cnt                           0x00000002

    #define     BA_crcCell_Auto_latch                          0x0000
    #define     B16crcCell_Auto_latch                          0x0000
    #define   LSb32crcCell_Auto_latch                             2
    #define   LSb16crcCell_Auto_latch                             2
    #define       bcrcCell_Auto_latch                          1
    #define   MSK32crcCell_Auto_latch                             0x00000004
    ///////////////////////////////////////////////////////////
    #define     RA_crcCell_Manual                              0x0004

    #define     BA_crcCell_Manual_clr_sum                      0x0004
    #define     B16crcCell_Manual_clr_sum                      0x0004
    #define   LSb32crcCell_Manual_clr_sum                         0
    #define   LSb16crcCell_Manual_clr_sum                         0
    #define       bcrcCell_Manual_clr_sum                      1
    #define   MSK32crcCell_Manual_clr_sum                         0x00000001

    #define     BA_crcCell_Manual_clr_cnt                      0x0004
    #define     B16crcCell_Manual_clr_cnt                      0x0004
    #define   LSb32crcCell_Manual_clr_cnt                         1
    #define   LSb16crcCell_Manual_clr_cnt                         1
    #define       bcrcCell_Manual_clr_cnt                      1
    #define   MSK32crcCell_Manual_clr_cnt                         0x00000002

    #define     BA_crcCell_Manual_latch                        0x0004
    #define     B16crcCell_Manual_latch                        0x0004
    #define   LSb32crcCell_Manual_latch                           2
    #define   LSb16crcCell_Manual_latch                           2
    #define       bcrcCell_Manual_latch                        1
    #define   MSK32crcCell_Manual_latch                           0x00000004
    ///////////////////////////////////////////////////////////
    #define     RA_crcCell_Latch                               0x0008

    #define     BA_crcCell_Latch_cnt                           0x0008
    #define     B16crcCell_Latch_cnt                           0x0008
    #define   LSb32crcCell_Latch_cnt                              0
    #define   LSb16crcCell_Latch_cnt                              0
    #define       bcrcCell_Latch_cnt                           32
    #define   MSK32crcCell_Latch_cnt                              0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_crcCell_cnt                                 0x000C

    #define     BA_crcCell_cnt_val                             0x000C
    #define     B16crcCell_cnt_val                             0x000C
    #define   LSb32crcCell_cnt_val                                0
    #define   LSb16crcCell_cnt_val                                0
    #define       bcrcCell_cnt_val                             32
    #define   MSK32crcCell_cnt_val                                0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_crcCell_CRCTBL                              0x0020
    #define     RA_crcCell_sum                                 0x0020
    ///////////////////////////////////////////////////////////

    typedef struct SIE_crcCell {
    ///////////////////////////////////////////////////////////
    #define   GET32crcCell_Auto_clr_sum(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32crcCell_Auto_clr_sum(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16crcCell_Auto_clr_sum(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16crcCell_Auto_clr_sum(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32crcCell_Auto_clr_cnt(r32)                   _BFGET_(r32, 1, 1)
    #define   SET32crcCell_Auto_clr_cnt(r32,v)                 _BFSET_(r32, 1, 1,v)
    #define   GET16crcCell_Auto_clr_cnt(r16)                   _BFGET_(r16, 1, 1)
    #define   SET16crcCell_Auto_clr_cnt(r16,v)                 _BFSET_(r16, 1, 1,v)

    #define   GET32crcCell_Auto_latch(r32)                     _BFGET_(r32, 2, 2)
    #define   SET32crcCell_Auto_latch(r32,v)                   _BFSET_(r32, 2, 2,v)
    #define   GET16crcCell_Auto_latch(r16)                     _BFGET_(r16, 2, 2)
    #define   SET16crcCell_Auto_latch(r16,v)                   _BFSET_(r16, 2, 2,v)

    #define     w32crcCell_Auto                                {\
            UNSG32 uAuto_clr_sum                               :  1;\
            UNSG32 uAuto_clr_cnt                               :  1;\
            UNSG32 uAuto_latch                                 :  1;\
            UNSG32 RSVDx0_b3                                   : 29;\
          }
    union { UNSG32 u32crcCell_Auto;
            struct w32crcCell_Auto;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32crcCell_Manual_clr_sum(r32)                 _BFGET_(r32, 0, 0)
    #define   SET32crcCell_Manual_clr_sum(r32,v)               _BFSET_(r32, 0, 0,v)
    #define   GET16crcCell_Manual_clr_sum(r16)                 _BFGET_(r16, 0, 0)
    #define   SET16crcCell_Manual_clr_sum(r16,v)               _BFSET_(r16, 0, 0,v)

    #define   GET32crcCell_Manual_clr_cnt(r32)                 _BFGET_(r32, 1, 1)
    #define   SET32crcCell_Manual_clr_cnt(r32,v)               _BFSET_(r32, 1, 1,v)
    #define   GET16crcCell_Manual_clr_cnt(r16)                 _BFGET_(r16, 1, 1)
    #define   SET16crcCell_Manual_clr_cnt(r16,v)               _BFSET_(r16, 1, 1,v)

    #define   GET32crcCell_Manual_latch(r32)                   _BFGET_(r32, 2, 2)
    #define   SET32crcCell_Manual_latch(r32,v)                 _BFSET_(r32, 2, 2,v)
    #define   GET16crcCell_Manual_latch(r16)                   _BFGET_(r16, 2, 2)
    #define   SET16crcCell_Manual_latch(r16,v)                 _BFSET_(r16, 2, 2,v)

    #define     w32crcCell_Manual                              {\
            UNSG32 uManual_clr_sum                             :  1;\
            UNSG32 uManual_clr_cnt                             :  1;\
            UNSG32 uManual_latch                               :  1;\
            UNSG32 RSVDx4_b3                                   : 29;\
          }
    union { UNSG32 u32crcCell_Manual;
            struct w32crcCell_Manual;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32crcCell_Latch_cnt(r32)                      _BFGET_(r32,31, 0)
    #define   SET32crcCell_Latch_cnt(r32,v)                    _BFSET_(r32,31, 0,v)

    #define     w32crcCell_Latch                               {\
            UNSG32 uLatch_cnt                                  : 32;\
          }
    union { UNSG32 u32crcCell_Latch;
            struct w32crcCell_Latch;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32crcCell_cnt_val(r32)                        _BFGET_(r32,31, 0)
    #define   SET32crcCell_cnt_val(r32,v)                      _BFSET_(r32,31, 0,v)

    #define     w32crcCell_cnt                                 {\
            UNSG32 ucnt_val                                    : 32;\
          }
    union { UNSG32 u32crcCell_cnt;
            struct w32crcCell_cnt;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx10                                     [16];
    ///////////////////////////////////////////////////////////
              SIE_crcTblEntry                                  ie_sum[8];
    ///////////////////////////////////////////////////////////
    } SIE_crcCell;

    typedef union  T32crcCell_Auto
          { UNSG32 u32;
            struct w32crcCell_Auto;
                 } T32crcCell_Auto;
    typedef union  T32crcCell_Manual
          { UNSG32 u32;
            struct w32crcCell_Manual;
                 } T32crcCell_Manual;
    typedef union  T32crcCell_Latch
          { UNSG32 u32;
            struct w32crcCell_Latch;
                 } T32crcCell_Latch;
    typedef union  T32crcCell_cnt
          { UNSG32 u32;
            struct w32crcCell_cnt;
                 } T32crcCell_cnt;
    ///////////////////////////////////////////////////////////

    typedef union  TcrcCell_Auto
          { UNSG32 u32[1];
            struct {
            struct w32crcCell_Auto;
                   };
                 } TcrcCell_Auto;
    typedef union  TcrcCell_Manual
          { UNSG32 u32[1];
            struct {
            struct w32crcCell_Manual;
                   };
                 } TcrcCell_Manual;
    typedef union  TcrcCell_Latch
          { UNSG32 u32[1];
            struct {
            struct w32crcCell_Latch;
                   };
                 } TcrcCell_Latch;
    typedef union  TcrcCell_cnt
          { UNSG32 u32[1];
            struct {
            struct w32crcCell_cnt;
                   };
                 } TcrcCell_cnt;

    ///////////////////////////////////////////////////////////
     SIGN32 crcCell_drvrd(SIE_crcCell *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 crcCell_drvwr(SIE_crcCell *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void crcCell_reset(SIE_crcCell *p);
     SIGN32 crcCell_cmp  (SIE_crcCell *p, SIE_crcCell *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define crcCell_check(p,pie,pfx,hLOG) crcCell_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define crcCell_print(p,    pfx,hLOG) crcCell_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: crcCell
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE crcArr                  biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CRCARR               (P)
///     # 0x00000 crcArr               
///               $crcCell             crcArr            REG       [8]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:     816b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_crcArr
#define h_crcArr (){}

    #define     RA_crcArr_CRCARR                               0x0000
    #define     RA_crcArr_crcArr                               0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_crcArr {
    ///////////////////////////////////////////////////////////
              SIE_crcCell                                      ie_crcArr[8];
    ///////////////////////////////////////////////////////////
    } SIE_crcArr;

    ///////////////////////////////////////////////////////////
     SIGN32 crcArr_drvrd(SIE_crcArr *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 crcArr_drvwr(SIE_crcArr *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void crcArr_reset(SIE_crcArr *p);
     SIGN32 crcArr_cmp  (SIE_crcArr *p, SIE_crcArr *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define crcArr_check(p,pie,pfx,hLOG) crcArr_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define crcArr_print(p,    pfx,hLOG) crcArr_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: crcArr
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE crcHub                  biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CRCARR               (P)
///     # 0x00000 crcArr0              
///               $crcArr              crcArr0           REG          
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:     816b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_crcHub
#define h_crcHub (){}

    #define     RA_crcHub_CRCARR                               0x0000
    #define     RA_crcHub_crcArr0                              0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_crcHub {
    ///////////////////////////////////////////////////////////
              SIE_crcArr                                       ie_crcArr0;
    ///////////////////////////////////////////////////////////
    } SIE_crcHub;

    ///////////////////////////////////////////////////////////
     SIGN32 crcHub_drvrd(SIE_crcHub *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 crcHub_drvwr(SIE_crcHub *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void crcHub_reset(SIE_crcHub *p);
     SIGN32 crcHub_cmp  (SIE_crcHub *p, SIE_crcHub *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define crcHub_check(p,pie,pfx,hLOG) crcHub_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define crcHub_print(p,    pfx,hLOG) crcHub_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: crcHub
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE vProVFC                 biu              (4,4)
///     ###
///     * vPro input data format converter. Convert raster scan data to tile format.
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 FLOW                 (P-)
///               %unsigned 1  enable                    0x0
///               %%        31         # Stuffing bits...
///     @ 0x00004 CTRL                 (P)
///               %unsigned 2  mode                      0x0
///                                    : UYVY                      0x0
///                                    : PLANAR                    0x1
///                                    : SEMIPLANAR                0x2
///               %%        30         # Stuffing bits...
///     @ 0x00008 STATUS               (R-)
///               %unsigned 1  done                      0x0
///                                    ###
///                                    * Write 0 to CTRL.enable to clear done status.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0000C BASE_Y               (P)
///               %unsigned 32 addr                      0x0
///                                    ###
///                                    * Also be used as base address of UYVY mode.
///                                    ###
///     @ 0x00010 BASE_CB              (P)
///               %unsigned 32 addr                      0x0
///     @ 0x00014 BASE_CR              (P)
///               %unsigned 32 addr                      0x0
///     @ 0x00018 SIZE                 (P)
///               %unsigned 16 width                     0x0
///               %unsigned 16 height                    0x0
///                                    ###
///                                    * UYVY mode: size of whole frame buffer.
///                                    * PLANAR mode: size of Y plane.
///                                    ###
///     @ 0x0001C STRIDE               (P)
///               %unsigned 16 luma                      0x0
///               %unsigned 16 chroma                    0x0
///                                    ###
///                                    * Stride side (pixel). UYVY mode re-use luma bitfield.
///                                    * Should be configured to 32-byte aligned.
///                                    ###
///     @ 0x00020 BURST                (P)
///               %unsigned 2  size                      0x0
///                                    : B32                       0x0
///                                    : B64                       0x1
///                                    : B128                      0x2
///                                    : B256                      0x3
///               %%        30         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      36B, bits:     166b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_vProVFC
#define h_vProVFC (){}

    #define     RA_vProVFC_FLOW                                0x0000

    #define     BA_vProVFC_FLOW_enable                         0x0000
    #define     B16vProVFC_FLOW_enable                         0x0000
    #define   LSb32vProVFC_FLOW_enable                            0
    #define   LSb16vProVFC_FLOW_enable                            0
    #define       bvProVFC_FLOW_enable                         1
    #define   MSK32vProVFC_FLOW_enable                            0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_vProVFC_CTRL                                0x0004

    #define     BA_vProVFC_CTRL_mode                           0x0004
    #define     B16vProVFC_CTRL_mode                           0x0004
    #define   LSb32vProVFC_CTRL_mode                              0
    #define   LSb16vProVFC_CTRL_mode                              0
    #define       bvProVFC_CTRL_mode                           2
    #define   MSK32vProVFC_CTRL_mode                              0x00000003
    #define        vProVFC_CTRL_mode_UYVY                                   0x0
    #define        vProVFC_CTRL_mode_PLANAR                                 0x1
    #define        vProVFC_CTRL_mode_SEMIPLANAR                             0x2
    ///////////////////////////////////////////////////////////
    #define     RA_vProVFC_STATUS                              0x0008

    #define     BA_vProVFC_STATUS_done                         0x0008
    #define     B16vProVFC_STATUS_done                         0x0008
    #define   LSb32vProVFC_STATUS_done                            0
    #define   LSb16vProVFC_STATUS_done                            0
    #define       bvProVFC_STATUS_done                         1
    #define   MSK32vProVFC_STATUS_done                            0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_vProVFC_BASE_Y                              0x000C

    #define     BA_vProVFC_BASE_Y_addr                         0x000C
    #define     B16vProVFC_BASE_Y_addr                         0x000C
    #define   LSb32vProVFC_BASE_Y_addr                            0
    #define   LSb16vProVFC_BASE_Y_addr                            0
    #define       bvProVFC_BASE_Y_addr                         32
    #define   MSK32vProVFC_BASE_Y_addr                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProVFC_BASE_CB                             0x0010

    #define     BA_vProVFC_BASE_CB_addr                        0x0010
    #define     B16vProVFC_BASE_CB_addr                        0x0010
    #define   LSb32vProVFC_BASE_CB_addr                           0
    #define   LSb16vProVFC_BASE_CB_addr                           0
    #define       bvProVFC_BASE_CB_addr                        32
    #define   MSK32vProVFC_BASE_CB_addr                           0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProVFC_BASE_CR                             0x0014

    #define     BA_vProVFC_BASE_CR_addr                        0x0014
    #define     B16vProVFC_BASE_CR_addr                        0x0014
    #define   LSb32vProVFC_BASE_CR_addr                           0
    #define   LSb16vProVFC_BASE_CR_addr                           0
    #define       bvProVFC_BASE_CR_addr                        32
    #define   MSK32vProVFC_BASE_CR_addr                           0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProVFC_SIZE                                0x0018

    #define     BA_vProVFC_SIZE_width                          0x0018
    #define     B16vProVFC_SIZE_width                          0x0018
    #define   LSb32vProVFC_SIZE_width                             0
    #define   LSb16vProVFC_SIZE_width                             0
    #define       bvProVFC_SIZE_width                          16
    #define   MSK32vProVFC_SIZE_width                             0x0000FFFF

    #define     BA_vProVFC_SIZE_height                         0x001A
    #define     B16vProVFC_SIZE_height                         0x001A
    #define   LSb32vProVFC_SIZE_height                            16
    #define   LSb16vProVFC_SIZE_height                            0
    #define       bvProVFC_SIZE_height                         16
    #define   MSK32vProVFC_SIZE_height                            0xFFFF0000
    ///////////////////////////////////////////////////////////
    #define     RA_vProVFC_STRIDE                              0x001C

    #define     BA_vProVFC_STRIDE_luma                         0x001C
    #define     B16vProVFC_STRIDE_luma                         0x001C
    #define   LSb32vProVFC_STRIDE_luma                            0
    #define   LSb16vProVFC_STRIDE_luma                            0
    #define       bvProVFC_STRIDE_luma                         16
    #define   MSK32vProVFC_STRIDE_luma                            0x0000FFFF

    #define     BA_vProVFC_STRIDE_chroma                       0x001E
    #define     B16vProVFC_STRIDE_chroma                       0x001E
    #define   LSb32vProVFC_STRIDE_chroma                          16
    #define   LSb16vProVFC_STRIDE_chroma                          0
    #define       bvProVFC_STRIDE_chroma                       16
    #define   MSK32vProVFC_STRIDE_chroma                          0xFFFF0000
    ///////////////////////////////////////////////////////////
    #define     RA_vProVFC_BURST                               0x0020

    #define     BA_vProVFC_BURST_size                          0x0020
    #define     B16vProVFC_BURST_size                          0x0020
    #define   LSb32vProVFC_BURST_size                             0
    #define   LSb16vProVFC_BURST_size                             0
    #define       bvProVFC_BURST_size                          2
    #define   MSK32vProVFC_BURST_size                             0x00000003
    #define        vProVFC_BURST_size_B32                                   0x0
    #define        vProVFC_BURST_size_B64                                   0x1
    #define        vProVFC_BURST_size_B128                                  0x2
    #define        vProVFC_BURST_size_B256                                  0x3
    ///////////////////////////////////////////////////////////

    typedef struct SIE_vProVFC {
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_FLOW_enable(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32vProVFC_FLOW_enable(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16vProVFC_FLOW_enable(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16vProVFC_FLOW_enable(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define     w32vProVFC_FLOW                                {\
            UNSG32 uFLOW_enable                                :  1;\
            UNSG32 RSVDx0_b1                                   : 31;\
          }
    union { UNSG32 u32vProVFC_FLOW;
            struct w32vProVFC_FLOW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_CTRL_mode(r32)                      _BFGET_(r32, 1, 0)
    #define   SET32vProVFC_CTRL_mode(r32,v)                    _BFSET_(r32, 1, 0,v)
    #define   GET16vProVFC_CTRL_mode(r16)                      _BFGET_(r16, 1, 0)
    #define   SET16vProVFC_CTRL_mode(r16,v)                    _BFSET_(r16, 1, 0,v)

    #define     w32vProVFC_CTRL                                {\
            UNSG32 uCTRL_mode                                  :  2;\
            UNSG32 RSVDx4_b2                                   : 30;\
          }
    union { UNSG32 u32vProVFC_CTRL;
            struct w32vProVFC_CTRL;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_STATUS_done(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32vProVFC_STATUS_done(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16vProVFC_STATUS_done(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16vProVFC_STATUS_done(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define     w32vProVFC_STATUS                              {\
            UNSG32 uSTATUS_done                                :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32vProVFC_STATUS;
            struct w32vProVFC_STATUS;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_BASE_Y_addr(r32)                    _BFGET_(r32,31, 0)
    #define   SET32vProVFC_BASE_Y_addr(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32vProVFC_BASE_Y                              {\
            UNSG32 uBASE_Y_addr                                : 32;\
          }
    union { UNSG32 u32vProVFC_BASE_Y;
            struct w32vProVFC_BASE_Y;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_BASE_CB_addr(r32)                   _BFGET_(r32,31, 0)
    #define   SET32vProVFC_BASE_CB_addr(r32,v)                 _BFSET_(r32,31, 0,v)

    #define     w32vProVFC_BASE_CB                             {\
            UNSG32 uBASE_CB_addr                               : 32;\
          }
    union { UNSG32 u32vProVFC_BASE_CB;
            struct w32vProVFC_BASE_CB;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_BASE_CR_addr(r32)                   _BFGET_(r32,31, 0)
    #define   SET32vProVFC_BASE_CR_addr(r32,v)                 _BFSET_(r32,31, 0,v)

    #define     w32vProVFC_BASE_CR                             {\
            UNSG32 uBASE_CR_addr                               : 32;\
          }
    union { UNSG32 u32vProVFC_BASE_CR;
            struct w32vProVFC_BASE_CR;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_SIZE_width(r32)                     _BFGET_(r32,15, 0)
    #define   SET32vProVFC_SIZE_width(r32,v)                   _BFSET_(r32,15, 0,v)
    #define   GET16vProVFC_SIZE_width(r16)                     _BFGET_(r16,15, 0)
    #define   SET16vProVFC_SIZE_width(r16,v)                   _BFSET_(r16,15, 0,v)

    #define   GET32vProVFC_SIZE_height(r32)                    _BFGET_(r32,31,16)
    #define   SET32vProVFC_SIZE_height(r32,v)                  _BFSET_(r32,31,16,v)
    #define   GET16vProVFC_SIZE_height(r16)                    _BFGET_(r16,15, 0)
    #define   SET16vProVFC_SIZE_height(r16,v)                  _BFSET_(r16,15, 0,v)

    #define     w32vProVFC_SIZE                                {\
            UNSG32 uSIZE_width                                 : 16;\
            UNSG32 uSIZE_height                                : 16;\
          }
    union { UNSG32 u32vProVFC_SIZE;
            struct w32vProVFC_SIZE;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_STRIDE_luma(r32)                    _BFGET_(r32,15, 0)
    #define   SET32vProVFC_STRIDE_luma(r32,v)                  _BFSET_(r32,15, 0,v)
    #define   GET16vProVFC_STRIDE_luma(r16)                    _BFGET_(r16,15, 0)
    #define   SET16vProVFC_STRIDE_luma(r16,v)                  _BFSET_(r16,15, 0,v)

    #define   GET32vProVFC_STRIDE_chroma(r32)                  _BFGET_(r32,31,16)
    #define   SET32vProVFC_STRIDE_chroma(r32,v)                _BFSET_(r32,31,16,v)
    #define   GET16vProVFC_STRIDE_chroma(r16)                  _BFGET_(r16,15, 0)
    #define   SET16vProVFC_STRIDE_chroma(r16,v)                _BFSET_(r16,15, 0,v)

    #define     w32vProVFC_STRIDE                              {\
            UNSG32 uSTRIDE_luma                                : 16;\
            UNSG32 uSTRIDE_chroma                              : 16;\
          }
    union { UNSG32 u32vProVFC_STRIDE;
            struct w32vProVFC_STRIDE;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProVFC_BURST_size(r32)                     _BFGET_(r32, 1, 0)
    #define   SET32vProVFC_BURST_size(r32,v)                   _BFSET_(r32, 1, 0,v)
    #define   GET16vProVFC_BURST_size(r16)                     _BFGET_(r16, 1, 0)
    #define   SET16vProVFC_BURST_size(r16,v)                   _BFSET_(r16, 1, 0,v)

    #define     w32vProVFC_BURST                               {\
            UNSG32 uBURST_size                                 :  2;\
            UNSG32 RSVDx20_b2                                  : 30;\
          }
    union { UNSG32 u32vProVFC_BURST;
            struct w32vProVFC_BURST;
          };
    ///////////////////////////////////////////////////////////
    } SIE_vProVFC;

    typedef union  T32vProVFC_FLOW
          { UNSG32 u32;
            struct w32vProVFC_FLOW;
                 } T32vProVFC_FLOW;
    typedef union  T32vProVFC_CTRL
          { UNSG32 u32;
            struct w32vProVFC_CTRL;
                 } T32vProVFC_CTRL;
    typedef union  T32vProVFC_STATUS
          { UNSG32 u32;
            struct w32vProVFC_STATUS;
                 } T32vProVFC_STATUS;
    typedef union  T32vProVFC_BASE_Y
          { UNSG32 u32;
            struct w32vProVFC_BASE_Y;
                 } T32vProVFC_BASE_Y;
    typedef union  T32vProVFC_BASE_CB
          { UNSG32 u32;
            struct w32vProVFC_BASE_CB;
                 } T32vProVFC_BASE_CB;
    typedef union  T32vProVFC_BASE_CR
          { UNSG32 u32;
            struct w32vProVFC_BASE_CR;
                 } T32vProVFC_BASE_CR;
    typedef union  T32vProVFC_SIZE
          { UNSG32 u32;
            struct w32vProVFC_SIZE;
                 } T32vProVFC_SIZE;
    typedef union  T32vProVFC_STRIDE
          { UNSG32 u32;
            struct w32vProVFC_STRIDE;
                 } T32vProVFC_STRIDE;
    typedef union  T32vProVFC_BURST
          { UNSG32 u32;
            struct w32vProVFC_BURST;
                 } T32vProVFC_BURST;
    ///////////////////////////////////////////////////////////

    typedef union  TvProVFC_FLOW
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_FLOW;
                   };
                 } TvProVFC_FLOW;
    typedef union  TvProVFC_CTRL
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_CTRL;
                   };
                 } TvProVFC_CTRL;
    typedef union  TvProVFC_STATUS
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_STATUS;
                   };
                 } TvProVFC_STATUS;
    typedef union  TvProVFC_BASE_Y
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_BASE_Y;
                   };
                 } TvProVFC_BASE_Y;
    typedef union  TvProVFC_BASE_CB
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_BASE_CB;
                   };
                 } TvProVFC_BASE_CB;
    typedef union  TvProVFC_BASE_CR
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_BASE_CR;
                   };
                 } TvProVFC_BASE_CR;
    typedef union  TvProVFC_SIZE
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_SIZE;
                   };
                 } TvProVFC_SIZE;
    typedef union  TvProVFC_STRIDE
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_STRIDE;
                   };
                 } TvProVFC_STRIDE;
    typedef union  TvProVFC_BURST
          { UNSG32 u32[1];
            struct {
            struct w32vProVFC_BURST;
                   };
                 } TvProVFC_BURST;

    ///////////////////////////////////////////////////////////
     SIGN32 vProVFC_drvrd(SIE_vProVFC *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 vProVFC_drvwr(SIE_vProVFC *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void vProVFC_reset(SIE_vProVFC *p);
     SIGN32 vProVFC_cmp  (SIE_vProVFC *p, SIE_vProVFC *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define vProVFC_check(p,pie,pfx,hLOG) vProVFC_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define vProVFC_print(p,    pfx,hLOG) vProVFC_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: vProVFC
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dirMvScale              biu              (4,4)
///     ###
///     * Scaling factors for temporal direct MV calculation
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %signed   12 factor                    
///                                    ###
///                                    * = clip(-1024, 1023, (tb*tx+32)>>6)
///                                    ###
///               %unsigned 20 RSVD20                    
///                                    ###
///                                    * pad to 32 bits
///                                    * [32:63]
///                                    ###
///     @ 0x00004                      (P)
///               %unsigned 32 RSVD32                    
///                                    ###
///                                    * pad to 64 bits
///                                    * End dirMvScale
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dirMvScale
#define h_dirMvScale (){}

    #define     BA_dirMvScale_factor                           0x0000
    #define     B16dirMvScale_factor                           0x0000
    #define   LSb32dirMvScale_factor                              0
    #define   LSb16dirMvScale_factor                              0
    #define       bdirMvScale_factor                           12
    #define   MSK32dirMvScale_factor                              0x00000FFF

    #define     BA_dirMvScale_RSVD20                           0x0001
    #define     B16dirMvScale_RSVD20                           0x0000
    #define   LSb32dirMvScale_RSVD20                              12
    #define   LSb16dirMvScale_RSVD20                              12
    #define       bdirMvScale_RSVD20                           20
    #define   MSK32dirMvScale_RSVD20                              0xFFFFF000
    ///////////////////////////////////////////////////////////

    #define     BA_dirMvScale_RSVD32                           0x0004
    #define     B16dirMvScale_RSVD32                           0x0004
    #define   LSb32dirMvScale_RSVD32                              0
    #define   LSb16dirMvScale_RSVD32                              0
    #define       bdirMvScale_RSVD32                           32
    #define   MSK32dirMvScale_RSVD32                              0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dirMvScale {
    ///////////////////////////////////////////////////////////
    #define   GET32dirMvScale_factor(r32)                      _BFGET_(r32,11, 0)
    #define   SET32dirMvScale_factor(r32,v)                    _BFSET_(r32,11, 0,v)
    #define   GET16dirMvScale_factor(r16)                      _BFGET_(r16,11, 0)
    #define   SET16dirMvScale_factor(r16,v)                    _BFSET_(r16,11, 0,v)

    #define   GET32dirMvScale_RSVD20(r32)                      _BFGET_(r32,31,12)
    #define   SET32dirMvScale_RSVD20(r32,v)                    _BFSET_(r32,31,12,v)

            UNSG32 s_factor                                    : 12;
            UNSG32 u_RSVD20                                    : 20;
    ///////////////////////////////////////////////////////////
    #define   GET32dirMvScale_RSVD32(r32)                      _BFGET_(r32,31, 0)
    #define   SET32dirMvScale_RSVD32(r32,v)                    _BFSET_(r32,31, 0,v)

            UNSG32 u_RSVD32                                    : 32;
    ///////////////////////////////////////////////////////////
    } SIE_dirMvScale;

    ///////////////////////////////////////////////////////////
     SIGN32 dirMvScale_drvrd(SIE_dirMvScale *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dirMvScale_drvwr(SIE_dirMvScale *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dirMvScale_reset(SIE_dirMvScale *p);
     SIGN32 dirMvScale_cmp  (SIE_dirMvScale *p, SIE_dirMvScale *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dirMvScale_check(p,pie,pfx,hLOG) dirMvScale_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dirMvScale_print(p,    pfx,hLOG) dirMvScale_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dirMvScale
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE avsDirMvScale           biu              (4,4)
///     ###
///     * Scaling factors for temporal direct MV calculation for AVS
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 16 BlockDistanceFw           
///                                    ###
///                                    * Block Distance between current block and forward reference block.
///                                    ###
///               %unsigned 16 BlockDistanceBw           
///                                    ###
///                                    * Block Distance between backward reference block and current block.
///                                    * [32:63]
///                                    ###
///     @ 0x00004                      (P)
///               %unsigned 16 invBlockDistanceRef       
///                                    ###
///                                    * 16384/BlockDistanceRef, where BlockDistanceRef is the block distance between backward reference block and reference block of the co-located block.
///                                    ###
///               %unsigned 16 RSVD16                    
///                                    ###
///                                    * pad to 64 bits
///                                    * End avsDirMvScale
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_avsDirMvScale
#define h_avsDirMvScale (){}

    #define     BA_avsDirMvScale_BlockDistanceFw               0x0000
    #define     B16avsDirMvScale_BlockDistanceFw               0x0000
    #define   LSb32avsDirMvScale_BlockDistanceFw                  0
    #define   LSb16avsDirMvScale_BlockDistanceFw                  0
    #define       bavsDirMvScale_BlockDistanceFw               16
    #define   MSK32avsDirMvScale_BlockDistanceFw                  0x0000FFFF

    #define     BA_avsDirMvScale_BlockDistanceBw               0x0002
    #define     B16avsDirMvScale_BlockDistanceBw               0x0002
    #define   LSb32avsDirMvScale_BlockDistanceBw                  16
    #define   LSb16avsDirMvScale_BlockDistanceBw                  0
    #define       bavsDirMvScale_BlockDistanceBw               16
    #define   MSK32avsDirMvScale_BlockDistanceBw                  0xFFFF0000
    ///////////////////////////////////////////////////////////

    #define     BA_avsDirMvScale_invBlockDistanceRef           0x0004
    #define     B16avsDirMvScale_invBlockDistanceRef           0x0004
    #define   LSb32avsDirMvScale_invBlockDistanceRef              0
    #define   LSb16avsDirMvScale_invBlockDistanceRef              0
    #define       bavsDirMvScale_invBlockDistanceRef           16
    #define   MSK32avsDirMvScale_invBlockDistanceRef              0x0000FFFF

    #define     BA_avsDirMvScale_RSVD16                        0x0006
    #define     B16avsDirMvScale_RSVD16                        0x0006
    #define   LSb32avsDirMvScale_RSVD16                           16
    #define   LSb16avsDirMvScale_RSVD16                           0
    #define       bavsDirMvScale_RSVD16                        16
    #define   MSK32avsDirMvScale_RSVD16                           0xFFFF0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_avsDirMvScale {
    ///////////////////////////////////////////////////////////
    #define   GET32avsDirMvScale_BlockDistanceFw(r32)          _BFGET_(r32,15, 0)
    #define   SET32avsDirMvScale_BlockDistanceFw(r32,v)        _BFSET_(r32,15, 0,v)
    #define   GET16avsDirMvScale_BlockDistanceFw(r16)          _BFGET_(r16,15, 0)
    #define   SET16avsDirMvScale_BlockDistanceFw(r16,v)        _BFSET_(r16,15, 0,v)

    #define   GET32avsDirMvScale_BlockDistanceBw(r32)          _BFGET_(r32,31,16)
    #define   SET32avsDirMvScale_BlockDistanceBw(r32,v)        _BFSET_(r32,31,16,v)
    #define   GET16avsDirMvScale_BlockDistanceBw(r16)          _BFGET_(r16,15, 0)
    #define   SET16avsDirMvScale_BlockDistanceBw(r16,v)        _BFSET_(r16,15, 0,v)

            UNSG32 u_BlockDistanceFw                           : 16;
            UNSG32 u_BlockDistanceBw                           : 16;
    ///////////////////////////////////////////////////////////
    #define   GET32avsDirMvScale_invBlockDistanceRef(r32)      _BFGET_(r32,15, 0)
    #define   SET32avsDirMvScale_invBlockDistanceRef(r32,v)    _BFSET_(r32,15, 0,v)
    #define   GET16avsDirMvScale_invBlockDistanceRef(r16)      _BFGET_(r16,15, 0)
    #define   SET16avsDirMvScale_invBlockDistanceRef(r16,v)    _BFSET_(r16,15, 0,v)

    #define   GET32avsDirMvScale_RSVD16(r32)                   _BFGET_(r32,31,16)
    #define   SET32avsDirMvScale_RSVD16(r32,v)                 _BFSET_(r32,31,16,v)
    #define   GET16avsDirMvScale_RSVD16(r16)                   _BFGET_(r16,15, 0)
    #define   SET16avsDirMvScale_RSVD16(r16,v)                 _BFSET_(r16,15, 0,v)

            UNSG32 u_invBlockDistanceRef                       : 16;
            UNSG32 u_RSVD16                                    : 16;
    ///////////////////////////////////////////////////////////
    } SIE_avsDirMvScale;

    ///////////////////////////////////////////////////////////
     SIGN32 avsDirMvScale_drvrd(SIE_avsDirMvScale *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 avsDirMvScale_drvwr(SIE_avsDirMvScale *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void avsDirMvScale_reset(SIE_avsDirMvScale *p);
     SIGN32 avsDirMvScale_cmp  (SIE_avsDirMvScale *p, SIE_avsDirMvScale *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define avsDirMvScale_check(p,pie,pfx,hLOG) avsDirMvScale_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define avsDirMvScale_print(p,    pfx,hLOG) avsDirMvScale_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: avsDirMvScale
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE BitOpX4                 biu              (4,4)
///     ###
///     * Operator format for BitOp extension
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 6  idx                       
///                                    ###
///                                    * rS[idx] or xT[idx] is used as source bit
///                                    * In case src==rS, idx[5:4] specifies the operation mode:
///                                    * idx[5:4]==2'b0x: output is from rS
///                                    * idx[5:4]==2'b10: output bit is forced to 0
///                                    * idx[5:4]==2'b11: output bit is forced to 1
///                                    ###
///               %unsigned 1  src                       
///                                    : xT                        0x0
///                                    : rS                        0x1
///                                                 ###
///                                                 * If src=rS, the source is from 16-bit input
///                                                 * If src=xT, the source is from 64-bit input
///                                                 ###
///               %unsigned 1  mode                      
///                                    : copy                      0x0
///                                    : inv                       0x1
///                                                 ###
///                                                 * copy: target bit copied from source bit
///                                                 * inv: target bit copied from source bit then inverted
///                                                 * Not used when src==rS & idx[5]==1'b1
///                                                 ###
///               %unsigned 6  idx1                      
///               %unsigned 1  src1                      
///               %unsigned 1  mode1                     
///               %unsigned 6  idx2                      
///               %unsigned 1  src2                      
///               %unsigned 1  mode2                     
///               %unsigned 6  idx3                      
///               %unsigned 1  src3                      
///               %unsigned 1  mode3                     
///                                    ###
///                                    * End BitOpX4
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_BitOpX4
#define h_BitOpX4 (){}

    #define     BA_BitOpX4_idx                                 0x0000
    #define     B16BitOpX4_idx                                 0x0000
    #define   LSb32BitOpX4_idx                                    0
    #define   LSb16BitOpX4_idx                                    0
    #define       bBitOpX4_idx                                 6
    #define   MSK32BitOpX4_idx                                    0x0000003F

    #define     BA_BitOpX4_src                                 0x0000
    #define     B16BitOpX4_src                                 0x0000
    #define   LSb32BitOpX4_src                                    6
    #define   LSb16BitOpX4_src                                    6
    #define       bBitOpX4_src                                 1
    #define   MSK32BitOpX4_src                                    0x00000040
    #define        BitOpX4_src_xT                                           0x0
    #define        BitOpX4_src_rS                                           0x1

    #define     BA_BitOpX4_mode                                0x0000
    #define     B16BitOpX4_mode                                0x0000
    #define   LSb32BitOpX4_mode                                   7
    #define   LSb16BitOpX4_mode                                   7
    #define       bBitOpX4_mode                                1
    #define   MSK32BitOpX4_mode                                   0x00000080
    #define        BitOpX4_mode_copy                                        0x0
    #define        BitOpX4_mode_inv                                         0x1

    #define     BA_BitOpX4_idx1                                0x0001
    #define     B16BitOpX4_idx1                                0x0000
    #define   LSb32BitOpX4_idx1                                   8
    #define   LSb16BitOpX4_idx1                                   8
    #define       bBitOpX4_idx1                                6
    #define   MSK32BitOpX4_idx1                                   0x00003F00

    #define     BA_BitOpX4_src1                                0x0001
    #define     B16BitOpX4_src1                                0x0000
    #define   LSb32BitOpX4_src1                                   14
    #define   LSb16BitOpX4_src1                                   14
    #define       bBitOpX4_src1                                1
    #define   MSK32BitOpX4_src1                                   0x00004000

    #define     BA_BitOpX4_mode1                               0x0001
    #define     B16BitOpX4_mode1                               0x0000
    #define   LSb32BitOpX4_mode1                                  15
    #define   LSb16BitOpX4_mode1                                  15
    #define       bBitOpX4_mode1                               1
    #define   MSK32BitOpX4_mode1                                  0x00008000

    #define     BA_BitOpX4_idx2                                0x0002
    #define     B16BitOpX4_idx2                                0x0002
    #define   LSb32BitOpX4_idx2                                   16
    #define   LSb16BitOpX4_idx2                                   0
    #define       bBitOpX4_idx2                                6
    #define   MSK32BitOpX4_idx2                                   0x003F0000

    #define     BA_BitOpX4_src2                                0x0002
    #define     B16BitOpX4_src2                                0x0002
    #define   LSb32BitOpX4_src2                                   22
    #define   LSb16BitOpX4_src2                                   6
    #define       bBitOpX4_src2                                1
    #define   MSK32BitOpX4_src2                                   0x00400000

    #define     BA_BitOpX4_mode2                               0x0002
    #define     B16BitOpX4_mode2                               0x0002
    #define   LSb32BitOpX4_mode2                                  23
    #define   LSb16BitOpX4_mode2                                  7
    #define       bBitOpX4_mode2                               1
    #define   MSK32BitOpX4_mode2                                  0x00800000

    #define     BA_BitOpX4_idx3                                0x0003
    #define     B16BitOpX4_idx3                                0x0002
    #define   LSb32BitOpX4_idx3                                   24
    #define   LSb16BitOpX4_idx3                                   8
    #define       bBitOpX4_idx3                                6
    #define   MSK32BitOpX4_idx3                                   0x3F000000

    #define     BA_BitOpX4_src3                                0x0003
    #define     B16BitOpX4_src3                                0x0002
    #define   LSb32BitOpX4_src3                                   30
    #define   LSb16BitOpX4_src3                                   14
    #define       bBitOpX4_src3                                1
    #define   MSK32BitOpX4_src3                                   0x40000000

    #define     BA_BitOpX4_mode3                               0x0003
    #define     B16BitOpX4_mode3                               0x0002
    #define   LSb32BitOpX4_mode3                                  31
    #define   LSb16BitOpX4_mode3                                  15
    #define       bBitOpX4_mode3                               1
    #define   MSK32BitOpX4_mode3                                  0x80000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_BitOpX4 {
    ///////////////////////////////////////////////////////////
    #define   GET32BitOpX4_idx(r32)                            _BFGET_(r32, 5, 0)
    #define   SET32BitOpX4_idx(r32,v)                          _BFSET_(r32, 5, 0,v)
    #define   GET16BitOpX4_idx(r16)                            _BFGET_(r16, 5, 0)
    #define   SET16BitOpX4_idx(r16,v)                          _BFSET_(r16, 5, 0,v)

    #define   GET32BitOpX4_src(r32)                            _BFGET_(r32, 6, 6)
    #define   SET32BitOpX4_src(r32,v)                          _BFSET_(r32, 6, 6,v)
    #define   GET16BitOpX4_src(r16)                            _BFGET_(r16, 6, 6)
    #define   SET16BitOpX4_src(r16,v)                          _BFSET_(r16, 6, 6,v)

    #define   GET32BitOpX4_mode(r32)                           _BFGET_(r32, 7, 7)
    #define   SET32BitOpX4_mode(r32,v)                         _BFSET_(r32, 7, 7,v)
    #define   GET16BitOpX4_mode(r16)                           _BFGET_(r16, 7, 7)
    #define   SET16BitOpX4_mode(r16,v)                         _BFSET_(r16, 7, 7,v)

    #define   GET32BitOpX4_idx1(r32)                           _BFGET_(r32,13, 8)
    #define   SET32BitOpX4_idx1(r32,v)                         _BFSET_(r32,13, 8,v)
    #define   GET16BitOpX4_idx1(r16)                           _BFGET_(r16,13, 8)
    #define   SET16BitOpX4_idx1(r16,v)                         _BFSET_(r16,13, 8,v)

    #define   GET32BitOpX4_src1(r32)                           _BFGET_(r32,14,14)
    #define   SET32BitOpX4_src1(r32,v)                         _BFSET_(r32,14,14,v)
    #define   GET16BitOpX4_src1(r16)                           _BFGET_(r16,14,14)
    #define   SET16BitOpX4_src1(r16,v)                         _BFSET_(r16,14,14,v)

    #define   GET32BitOpX4_mode1(r32)                          _BFGET_(r32,15,15)
    #define   SET32BitOpX4_mode1(r32,v)                        _BFSET_(r32,15,15,v)
    #define   GET16BitOpX4_mode1(r16)                          _BFGET_(r16,15,15)
    #define   SET16BitOpX4_mode1(r16,v)                        _BFSET_(r16,15,15,v)

    #define   GET32BitOpX4_idx2(r32)                           _BFGET_(r32,21,16)
    #define   SET32BitOpX4_idx2(r32,v)                         _BFSET_(r32,21,16,v)
    #define   GET16BitOpX4_idx2(r16)                           _BFGET_(r16, 5, 0)
    #define   SET16BitOpX4_idx2(r16,v)                         _BFSET_(r16, 5, 0,v)

    #define   GET32BitOpX4_src2(r32)                           _BFGET_(r32,22,22)
    #define   SET32BitOpX4_src2(r32,v)                         _BFSET_(r32,22,22,v)
    #define   GET16BitOpX4_src2(r16)                           _BFGET_(r16, 6, 6)
    #define   SET16BitOpX4_src2(r16,v)                         _BFSET_(r16, 6, 6,v)

    #define   GET32BitOpX4_mode2(r32)                          _BFGET_(r32,23,23)
    #define   SET32BitOpX4_mode2(r32,v)                        _BFSET_(r32,23,23,v)
    #define   GET16BitOpX4_mode2(r16)                          _BFGET_(r16, 7, 7)
    #define   SET16BitOpX4_mode2(r16,v)                        _BFSET_(r16, 7, 7,v)

    #define   GET32BitOpX4_idx3(r32)                           _BFGET_(r32,29,24)
    #define   SET32BitOpX4_idx3(r32,v)                         _BFSET_(r32,29,24,v)
    #define   GET16BitOpX4_idx3(r16)                           _BFGET_(r16,13, 8)
    #define   SET16BitOpX4_idx3(r16,v)                         _BFSET_(r16,13, 8,v)

    #define   GET32BitOpX4_src3(r32)                           _BFGET_(r32,30,30)
    #define   SET32BitOpX4_src3(r32,v)                         _BFSET_(r32,30,30,v)
    #define   GET16BitOpX4_src3(r16)                           _BFGET_(r16,14,14)
    #define   SET16BitOpX4_src3(r16,v)                         _BFSET_(r16,14,14,v)

    #define   GET32BitOpX4_mode3(r32)                          _BFGET_(r32,31,31)
    #define   SET32BitOpX4_mode3(r32,v)                        _BFSET_(r32,31,31,v)
    #define   GET16BitOpX4_mode3(r16)                          _BFGET_(r16,15,15)
    #define   SET16BitOpX4_mode3(r16,v)                        _BFSET_(r16,15,15,v)

            UNSG32 u_idx                                       :  6;
            UNSG32 u_src                                       :  1;
            UNSG32 u_mode                                      :  1;
            UNSG32 u_idx1                                      :  6;
            UNSG32 u_src1                                      :  1;
            UNSG32 u_mode1                                     :  1;
            UNSG32 u_idx2                                      :  6;
            UNSG32 u_src2                                      :  1;
            UNSG32 u_mode2                                     :  1;
            UNSG32 u_idx3                                      :  6;
            UNSG32 u_src3                                      :  1;
            UNSG32 u_mode3                                     :  1;
    ///////////////////////////////////////////////////////////
    } SIE_BitOpX4;

    ///////////////////////////////////////////////////////////
     SIGN32 BitOpX4_drvrd(SIE_BitOpX4 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 BitOpX4_drvwr(SIE_BitOpX4 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void BitOpX4_reset(SIE_BitOpX4 *p);
     SIGN32 BitOpX4_cmp  (SIE_BitOpX4 *p, SIE_BitOpX4 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define BitOpX4_check(p,pie,pfx,hLOG) BitOpX4_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define BitOpX4_print(p,    pfx,hLOG) BitOpX4_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: BitOpX4
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE BITOPRF64               biu              (4,4)
///     ###
///     * Operator format for BitOp extension
///     ###
///     # # ----------------------------------------------------------
///               : BitOp0             0x20
///               : BitOp1             0x21
///               : BitOp2             0x22
///               : BitOp3             0x23
///                            ###
///                            * extension ID definition; must be consistent with vScope_F0A64_BitOp0~3
///                            ###
///     @ 0x00000                      (P)
///     # 0x00000 cmd0                 
///               $BitOpX4             cmd0              REG       [4]
///     @ 0x00010                      (P)
///     # 0x00010 cmd1                 
///               $BitOpX4             cmd1              REG       [4]
///     @ 0x00020                      (P)
///     # 0x00020 cmd2                 
///               $BitOpX4             cmd2              REG       [4]
///     @ 0x00030                      (P)
///     # 0x00030 cmd3                 
///               $BitOpX4             cmd3              REG       [4]
///                                    ###
///                                    * Four BitOp commands, selected by extension ID
///                                    * End BitOpCtx
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      64B, bits:     512b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_BITOPRF64
#define h_BITOPRF64 (){}

    #define        BITOPRF64_BitOp0                            0x20
    #define        BITOPRF64_BitOp1                            0x21
    #define        BITOPRF64_BitOp2                            0x22
    #define        BITOPRF64_BitOp3                            0x23
    ///////////////////////////////////////////////////////////
    #define     RA_BITOPRF64_cmd0                              0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_BITOPRF64_cmd1                              0x0010
    ///////////////////////////////////////////////////////////
    #define     RA_BITOPRF64_cmd2                              0x0020
    ///////////////////////////////////////////////////////////
    #define     RA_BITOPRF64_cmd3                              0x0030
    ///////////////////////////////////////////////////////////

    typedef struct SIE_BITOPRF64 {
    ///////////////////////////////////////////////////////////
              SIE_BitOpX4                                      ie_cmd0[4];
    ///////////////////////////////////////////////////////////
              SIE_BitOpX4                                      ie_cmd1[4];
    ///////////////////////////////////////////////////////////
              SIE_BitOpX4                                      ie_cmd2[4];
    ///////////////////////////////////////////////////////////
              SIE_BitOpX4                                      ie_cmd3[4];
    ///////////////////////////////////////////////////////////
    } SIE_BITOPRF64;

    ///////////////////////////////////////////////////////////
     SIGN32 BITOPRF64_drvrd(SIE_BITOPRF64 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 BITOPRF64_drvwr(SIE_BITOPRF64 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void BITOPRF64_reset(SIE_BITOPRF64 *p);
     SIGN32 BITOPRF64_cmp  (SIE_BITOPRF64 *p, SIE_BITOPRF64 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define BITOPRF64_check(p,pie,pfx,hLOG) BITOPRF64_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define BITOPRF64_print(p,    pfx,hLOG) BITOPRF64_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: BITOPRF64
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE LUT8b                                    (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 8  data                      
///                                    ###
///                                    * Any 8b data
///                                    ###
///               %unsigned 8  data1                     
///               %unsigned 8  data2                     
///               %unsigned 8  data3                     
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_LUT8b
#define h_LUT8b (){}

    #define     BA_LUT8b_data                                  0x0000
    #define     B16LUT8b_data                                  0x0000
    #define   LSb32LUT8b_data                                     0
    #define   LSb16LUT8b_data                                     0
    #define       bLUT8b_data                                  8
    #define   MSK32LUT8b_data                                     0x000000FF

    #define     BA_LUT8b_data1                                 0x0001
    #define     B16LUT8b_data1                                 0x0000
    #define   LSb32LUT8b_data1                                    8
    #define   LSb16LUT8b_data1                                    8
    #define       bLUT8b_data1                                 8
    #define   MSK32LUT8b_data1                                    0x0000FF00

    #define     BA_LUT8b_data2                                 0x0002
    #define     B16LUT8b_data2                                 0x0002
    #define   LSb32LUT8b_data2                                    16
    #define   LSb16LUT8b_data2                                    0
    #define       bLUT8b_data2                                 8
    #define   MSK32LUT8b_data2                                    0x00FF0000

    #define     BA_LUT8b_data3                                 0x0003
    #define     B16LUT8b_data3                                 0x0002
    #define   LSb32LUT8b_data3                                    24
    #define   LSb16LUT8b_data3                                    8
    #define       bLUT8b_data3                                 8
    #define   MSK32LUT8b_data3                                    0xFF000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_LUT8b {
    ///////////////////////////////////////////////////////////
    #define   GET32LUT8b_data(r32)                             _BFGET_(r32, 7, 0)
    #define   SET32LUT8b_data(r32,v)                           _BFSET_(r32, 7, 0,v)
    #define   GET16LUT8b_data(r16)                             _BFGET_(r16, 7, 0)
    #define   SET16LUT8b_data(r16,v)                           _BFSET_(r16, 7, 0,v)

    #define   GET32LUT8b_data1(r32)                            _BFGET_(r32,15, 8)
    #define   SET32LUT8b_data1(r32,v)                          _BFSET_(r32,15, 8,v)
    #define   GET16LUT8b_data1(r16)                            _BFGET_(r16,15, 8)
    #define   SET16LUT8b_data1(r16,v)                          _BFSET_(r16,15, 8,v)

    #define   GET32LUT8b_data2(r32)                            _BFGET_(r32,23,16)
    #define   SET32LUT8b_data2(r32,v)                          _BFSET_(r32,23,16,v)
    #define   GET16LUT8b_data2(r16)                            _BFGET_(r16, 7, 0)
    #define   SET16LUT8b_data2(r16,v)                          _BFSET_(r16, 7, 0,v)

    #define   GET32LUT8b_data3(r32)                            _BFGET_(r32,31,24)
    #define   SET32LUT8b_data3(r32,v)                          _BFSET_(r32,31,24,v)
    #define   GET16LUT8b_data3(r16)                            _BFGET_(r16,15, 8)
    #define   SET16LUT8b_data3(r16,v)                          _BFSET_(r16,15, 8,v)

            UNSG32 u_data                                      :  8;
            UNSG32 u_data1                                     :  8;
            UNSG32 u_data2                                     :  8;
            UNSG32 u_data3                                     :  8;
    ///////////////////////////////////////////////////////////
    } SIE_LUT8b;

    ///////////////////////////////////////////////////////////
     SIGN32 LUT8b_drvrd(SIE_LUT8b *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 LUT8b_drvwr(SIE_LUT8b *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void LUT8b_reset(SIE_LUT8b *p);
     SIGN32 LUT8b_cmp  (SIE_LUT8b *p, SIE_LUT8b *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define LUT8b_check(p,pie,pfx,hLOG) LUT8b_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define LUT8b_print(p,    pfx,hLOG) LUT8b_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: LUT8b
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE LUT64b                                   (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 32 data_0i                   
///               %unsigned 32 data_1i                   
///                                    ###
///                                    * Any 64b data
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_LUT64b
#define h_LUT64b (){}

    #define     BA_LUT64b_data_0i                              0x0000
    #define     B16LUT64b_data_0i                              0x0000
    #define   LSb32LUT64b_data_0i                                 0
    #define   LSb16LUT64b_data_0i                                 0
    #define       bLUT64b_data_0i                              32
    #define   MSK32LUT64b_data_0i                                 0xFFFFFFFF

    #define     BA_LUT64b_data_1i                              0x0004
    #define     B16LUT64b_data_1i                              0x0004
    #define   LSb32LUT64b_data_1i                                 0
    #define   LSb16LUT64b_data_1i                                 0
    #define       bLUT64b_data_1i                              32
    #define   MSK32LUT64b_data_1i                                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_LUT64b {
    ///////////////////////////////////////////////////////////
    #define   GET32LUT64b_data_0i(r32)                         _BFGET_(r32,31, 0)
    #define   SET32LUT64b_data_0i(r32,v)                       _BFSET_(r32,31, 0,v)

            UNSG32 u_data_0i                                   : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32LUT64b_data_1i(r32)                         _BFGET_(r32,31, 0)
    #define   SET32LUT64b_data_1i(r32,v)                       _BFSET_(r32,31, 0,v)

            UNSG32 u_data_1i                                   : 32;
    ///////////////////////////////////////////////////////////
    } SIE_LUT64b;

    ///////////////////////////////////////////////////////////
     SIGN32 LUT64b_drvrd(SIE_LUT64b *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 LUT64b_drvwr(SIE_LUT64b *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void LUT64b_reset(SIE_LUT64b *p);
     SIGN32 LUT64b_cmp  (SIE_LUT64b *p, SIE_LUT64b *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define LUT64b_check(p,pie,pfx,hLOG) LUT64b_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define LUT64b_print(p,    pfx,hLOG) LUT64b_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: LUT64b
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE NLoc                                     (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 4  BLK                       
///                                    ###
///                                    * Block index
///                                    ###
///               %unsigned 4  category                  
///                                    : 16x16                     0x8
///                                    : 8x16                      0x9
///                                    : 16x8                      0xA
///                                    : 4mv                       0xB
///                                    : 8x8                       0xC
///                                    : 4x8                       0xD
///                                    : 8x4                       0xE
///                                    : 4x4                       0xF
///                                                 ###
///                                                 * Consistent with vcMsg{RSVD,level,partition}
///                                                 * Valid cases for Neighbor:
///                                                 * 16x16=16x8
///                                                 * 8x16=4mv=8x8=8x4
///                                                 * 4x8=4x4=ACY
///                                                 * Valid cases for PMV:
///                                                 * 16x16=16x8
///                                                 * 8x16
///                                                 * 4mv=8x8=8x4
///                                                 * 4x8=4x4=ACY
///                                                 ###
///                                    : ACY                       0x0
///                                                 ###
///                                                 * Valid block index:
///                                                 * 0~15 (every 4x4 indexed by coding order)
///                                                 ###
///                                    : ACU                       0x2
///                                                 ###
///                                                 * Valid block index:
///                                                 * 0~3 (3rd 4x4 in every 8x8)
///                                                 ###
///                                    : ACV                       0x3
///                                                 ###
///                                                 * Valid block index:
///                                                 * 0~3 (4th 4x4 in every 8x8)
///                                                 ###
///                                    : I16AC                     0x4
///                                                 ###
///                                                 * Only used as category, should be converted to ACY for neighbor look-up
///                                                 ###
///                                    : DCI                       0x4
///                                                 ###
///                                                 * Valid block index:
///                                                 * 0 (3rd 4x4 in 4th 8x8 only)
///                                                 ###
///                                    : DCY                       0x5
///                                                 ###
///                                                 * Valid block index:
///                                                 * 0 (4th 4x4 in 4th 8x8 only)
///                                                 ###
///                                    : SDPMV                     0x5
///                                                 ###
///                                                 * Reuse DCY in PMV extension, for Spatial Direct mode rIDX recovery.
///                                                 ###
///                                    : DCU                       0x6
///                                                 ###
///                                                 * Valid block index:
///                                                 * 0 (3rd 4x4 in 3rd 8x8 only)
///                                                 ###
///                                    : DCV                       0x7
///                                                 ###
///                                                 * Valid block index:
///                                                 * 0 (4th 4x4 in 3rd 8x8 only)
///                                                 ###
///               %unsigned 1  parity                    
///                                    ###
///                                    * 0/1 as even/odd, only for loop-filter
///                                    ###
///               %unsigned 1  direct                    
///                                    ###
///                                    * FW use only: if direct mode
///                                    * AVS: use for sym mode in hardware.
///                                    ###
///               %unsigned 2  motion                    
///                                    ###
///                                    * FW use only: motion type
///                                    ###
///               %unsigned 1  A                         
///                                    ###
///                                    * Left macroblock/block availability
///                                    ###
///               %unsigned 1  B                         
///                                    ###
///                                    * Upper macroblock/block availability
///                                    ###
///               %unsigned 1  C                         
///                                    ###
///                                    * Upper-right macroblock/block availability
///                                    ###
///               %unsigned 1  D                         
///                                    ###
///                                    * Upper-left macroblock/block availability
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_NLoc
#define h_NLoc (){}

    #define     BA_NLoc_BLK                                    0x0000
    #define     B16NLoc_BLK                                    0x0000
    #define   LSb32NLoc_BLK                                       0
    #define   LSb16NLoc_BLK                                       0
    #define       bNLoc_BLK                                    4
    #define   MSK32NLoc_BLK                                       0x0000000F

    #define     BA_NLoc_category                               0x0000
    #define     B16NLoc_category                               0x0000
    #define   LSb32NLoc_category                                  4
    #define   LSb16NLoc_category                                  4
    #define       bNLoc_category                               4
    #define   MSK32NLoc_category                                  0x000000F0
    #define        NLoc_category_16x16                                      0x8
    #define        NLoc_category_8x16                                       0x9
    #define        NLoc_category_16x8                                       0xA
    #define        NLoc_category_4mv                                        0xB
    #define        NLoc_category_8x8                                        0xC
    #define        NLoc_category_4x8                                        0xD
    #define        NLoc_category_8x4                                        0xE
    #define        NLoc_category_4x4                                        0xF
    #define        NLoc_category_ACY                                        0x0
    #define        NLoc_category_ACU                                        0x2
    #define        NLoc_category_ACV                                        0x3
    #define        NLoc_category_I16AC                                      0x4
    #define        NLoc_category_DCI                                        0x4
    #define        NLoc_category_DCY                                        0x5
    #define        NLoc_category_SDPMV                                      0x5
    #define        NLoc_category_DCU                                        0x6
    #define        NLoc_category_DCV                                        0x7

    #define     BA_NLoc_parity                                 0x0001
    #define     B16NLoc_parity                                 0x0000
    #define   LSb32NLoc_parity                                    8
    #define   LSb16NLoc_parity                                    8
    #define       bNLoc_parity                                 1
    #define   MSK32NLoc_parity                                    0x00000100

    #define     BA_NLoc_direct                                 0x0001
    #define     B16NLoc_direct                                 0x0000
    #define   LSb32NLoc_direct                                    9
    #define   LSb16NLoc_direct                                    9
    #define       bNLoc_direct                                 1
    #define   MSK32NLoc_direct                                    0x00000200

    #define     BA_NLoc_motion                                 0x0001
    #define     B16NLoc_motion                                 0x0000
    #define   LSb32NLoc_motion                                    10
    #define   LSb16NLoc_motion                                    10
    #define       bNLoc_motion                                 2
    #define   MSK32NLoc_motion                                    0x00000C00

    #define     BA_NLoc_A                                      0x0001
    #define     B16NLoc_A                                      0x0000
    #define   LSb32NLoc_A                                         12
    #define   LSb16NLoc_A                                         12
    #define       bNLoc_A                                      1
    #define   MSK32NLoc_A                                         0x00001000

    #define     BA_NLoc_B                                      0x0001
    #define     B16NLoc_B                                      0x0000
    #define   LSb32NLoc_B                                         13
    #define   LSb16NLoc_B                                         13
    #define       bNLoc_B                                      1
    #define   MSK32NLoc_B                                         0x00002000

    #define     BA_NLoc_C                                      0x0001
    #define     B16NLoc_C                                      0x0000
    #define   LSb32NLoc_C                                         14
    #define   LSb16NLoc_C                                         14
    #define       bNLoc_C                                      1
    #define   MSK32NLoc_C                                         0x00004000

    #define     BA_NLoc_D                                      0x0001
    #define     B16NLoc_D                                      0x0000
    #define   LSb32NLoc_D                                         15
    #define   LSb16NLoc_D                                         15
    #define       bNLoc_D                                      1
    #define   MSK32NLoc_D                                         0x00008000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_NLoc {
    ///////////////////////////////////////////////////////////
    #define   GET32NLoc_BLK(r32)                               _BFGET_(r32, 3, 0)
    #define   SET32NLoc_BLK(r32,v)                             _BFSET_(r32, 3, 0,v)
    #define   GET16NLoc_BLK(r16)                               _BFGET_(r16, 3, 0)
    #define   SET16NLoc_BLK(r16,v)                             _BFSET_(r16, 3, 0,v)

    #define   GET32NLoc_category(r32)                          _BFGET_(r32, 7, 4)
    #define   SET32NLoc_category(r32,v)                        _BFSET_(r32, 7, 4,v)
    #define   GET16NLoc_category(r16)                          _BFGET_(r16, 7, 4)
    #define   SET16NLoc_category(r16,v)                        _BFSET_(r16, 7, 4,v)

    #define   GET32NLoc_parity(r32)                            _BFGET_(r32, 8, 8)
    #define   SET32NLoc_parity(r32,v)                          _BFSET_(r32, 8, 8,v)
    #define   GET16NLoc_parity(r16)                            _BFGET_(r16, 8, 8)
    #define   SET16NLoc_parity(r16,v)                          _BFSET_(r16, 8, 8,v)

    #define   GET32NLoc_direct(r32)                            _BFGET_(r32, 9, 9)
    #define   SET32NLoc_direct(r32,v)                          _BFSET_(r32, 9, 9,v)
    #define   GET16NLoc_direct(r16)                            _BFGET_(r16, 9, 9)
    #define   SET16NLoc_direct(r16,v)                          _BFSET_(r16, 9, 9,v)

    #define   GET32NLoc_motion(r32)                            _BFGET_(r32,11,10)
    #define   SET32NLoc_motion(r32,v)                          _BFSET_(r32,11,10,v)
    #define   GET16NLoc_motion(r16)                            _BFGET_(r16,11,10)
    #define   SET16NLoc_motion(r16,v)                          _BFSET_(r16,11,10,v)

    #define   GET32NLoc_A(r32)                                 _BFGET_(r32,12,12)
    #define   SET32NLoc_A(r32,v)                               _BFSET_(r32,12,12,v)
    #define   GET16NLoc_A(r16)                                 _BFGET_(r16,12,12)
    #define   SET16NLoc_A(r16,v)                               _BFSET_(r16,12,12,v)

    #define   GET32NLoc_B(r32)                                 _BFGET_(r32,13,13)
    #define   SET32NLoc_B(r32,v)                               _BFSET_(r32,13,13,v)
    #define   GET16NLoc_B(r16)                                 _BFGET_(r16,13,13)
    #define   SET16NLoc_B(r16,v)                               _BFSET_(r16,13,13,v)

    #define   GET32NLoc_C(r32)                                 _BFGET_(r32,14,14)
    #define   SET32NLoc_C(r32,v)                               _BFSET_(r32,14,14,v)
    #define   GET16NLoc_C(r16)                                 _BFGET_(r16,14,14)
    #define   SET16NLoc_C(r16,v)                               _BFSET_(r16,14,14,v)

    #define   GET32NLoc_D(r32)                                 _BFGET_(r32,15,15)
    #define   SET32NLoc_D(r32,v)                               _BFSET_(r32,15,15,v)
    #define   GET16NLoc_D(r16)                                 _BFGET_(r16,15,15)
    #define   SET16NLoc_D(r16,v)                               _BFSET_(r16,15,15,v)

            UNSG32 u_BLK                                       :  4;
            UNSG32 u_category                                  :  4;
            UNSG32 u_parity                                    :  1;
            UNSG32 u_direct                                    :  1;
            UNSG32 u_motion                                    :  2;
            UNSG32 u_A                                         :  1;
            UNSG32 u_B                                         :  1;
            UNSG32 u_C                                         :  1;
            UNSG32 u_D                                         :  1;
    ///////////////////////////////////////////////////////////
    } SIE_NLoc;

    ///////////////////////////////////////////////////////////
     SIGN32 NLoc_drvrd(SIE_NLoc *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 NLoc_drvwr(SIE_NLoc *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void NLoc_reset(SIE_NLoc *p);
     SIGN32 NLoc_cmp  (SIE_NLoc *p, SIE_NLoc *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define NLoc_check(p,pie,pfx,hLOG) NLoc_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define NLoc_print(p,    pfx,hLOG) NLoc_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: NLoc
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE BLK                                      (4,4)
///     # # ----------------------------------------------------------
///               : skip               0x0
///               : direct16x16        0x1
///               : 4BLK               0x2
///               : inter              0x3
///               : IPCM               0x4
///               : intra16x16         0x5
///               : intraNxN           0x6
///                            ###
///                            * Sub-set of mb_type
///                            * MPEG2: only skip, inter, intra (intra16x16)
///                            * MPEG4/VC-1: only 1 intra type (intra16x16)
///                            * AVS: skip, direct16x16, 4BLK, inter, intra16x16 (only 1 intra type)
///                            ###
///     @ 0x00000                      (P)
///               %unsigned 2  motion                    
///                                    : Intra                     0x0
///                                    : Forward                   0x1
///                                    : Backward                  0x2
///                                    : Bi                        0x3
///                                                 ###
///                                                 * Derived 8x8 block motion type
///                                                 * NOTE: direct mode uses 'Bi'
///                                                 ###
///               %unsigned 2  partition                 
///                                    : 1mv                       0x0
///                                    : 2mvLR                     0x1
///                                    : 2mvTB                     0x2
///                                                 ###
///                                                 * MPEG2: 2mvTB used for field prediction
///                                                 * VC-1: 2-field-mv
///                                                 ###
///                                    : 4mv                       0x3
///                                                 ###
///                                                 * Block/macroblock level partitioning
///                                                 * MPEG4: 1mv & 4mv
///                                                 ###
///                                    : 4mvFLD                    0x1
///                                                 ###
///                                                 * VC-1: 4-field-mv
///                                                 ###
///               %unsigned 1  direct                    
///                                    ###
///                                    * Direct mode flag
///                                    * MPEG2: dual-prime prediction
///                                    ###
///               %unsigned 3  mvs                       
///                                    ###
///                                    * Number of motion vectors: 0/1/2/4
///                                    ###
///               %unsigned 2  motion1                   
///               %unsigned 2  partition1                
///               %unsigned 1  direct1                   
///               %unsigned 3  mvs1                      
///               %unsigned 2  motion2                   
///               %unsigned 2  partition2                
///               %unsigned 1  direct2                   
///               %unsigned 3  mvs2                      
///               %unsigned 2  motion3                   
///               %unsigned 2  partition3                
///               %unsigned 1  direct3                   
///               %unsigned 3  mvs3                      
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_BLK
#define h_BLK (){}

    #define        BLK_skip                                    0x0
    #define        BLK_direct16x16                             0x1
    #define        BLK_4BLK                                    0x2
    #define        BLK_inter                                   0x3
    #define        BLK_IPCM                                    0x4
    #define        BLK_intra16x16                              0x5
    #define        BLK_intraNxN                                0x6
    ///////////////////////////////////////////////////////////

    #define     BA_BLK_motion                                  0x0000
    #define     B16BLK_motion                                  0x0000
    #define   LSb32BLK_motion                                     0
    #define   LSb16BLK_motion                                     0
    #define       bBLK_motion                                  2
    #define   MSK32BLK_motion                                     0x00000003
    #define        BLK_motion_Intra                                         0x0
    #define        BLK_motion_Forward                                       0x1
    #define        BLK_motion_Backward                                      0x2
    #define        BLK_motion_Bi                                            0x3

    #define     BA_BLK_partition                               0x0000
    #define     B16BLK_partition                               0x0000
    #define   LSb32BLK_partition                                  2
    #define   LSb16BLK_partition                                  2
    #define       bBLK_partition                               2
    #define   MSK32BLK_partition                                  0x0000000C
    #define        BLK_partition_1mv                                        0x0
    #define        BLK_partition_2mvLR                                      0x1
    #define        BLK_partition_2mvTB                                      0x2
    #define        BLK_partition_4mv                                        0x3
    #define        BLK_partition_4mvFLD                                     0x1

    #define     BA_BLK_direct                                  0x0000
    #define     B16BLK_direct                                  0x0000
    #define   LSb32BLK_direct                                     4
    #define   LSb16BLK_direct                                     4
    #define       bBLK_direct                                  1
    #define   MSK32BLK_direct                                     0x00000010

    #define     BA_BLK_mvs                                     0x0000
    #define     B16BLK_mvs                                     0x0000
    #define   LSb32BLK_mvs                                        5
    #define   LSb16BLK_mvs                                        5
    #define       bBLK_mvs                                     3
    #define   MSK32BLK_mvs                                        0x000000E0

    #define     BA_BLK_motion1                                 0x0001
    #define     B16BLK_motion1                                 0x0000
    #define   LSb32BLK_motion1                                    8
    #define   LSb16BLK_motion1                                    8
    #define       bBLK_motion1                                 2
    #define   MSK32BLK_motion1                                    0x00000300

    #define     BA_BLK_partition1                              0x0001
    #define     B16BLK_partition1                              0x0000
    #define   LSb32BLK_partition1                                 10
    #define   LSb16BLK_partition1                                 10
    #define       bBLK_partition1                              2
    #define   MSK32BLK_partition1                                 0x00000C00

    #define     BA_BLK_direct1                                 0x0001
    #define     B16BLK_direct1                                 0x0000
    #define   LSb32BLK_direct1                                    12
    #define   LSb16BLK_direct1                                    12
    #define       bBLK_direct1                                 1
    #define   MSK32BLK_direct1                                    0x00001000

    #define     BA_BLK_mvs1                                    0x0001
    #define     B16BLK_mvs1                                    0x0000
    #define   LSb32BLK_mvs1                                       13
    #define   LSb16BLK_mvs1                                       13
    #define       bBLK_mvs1                                    3
    #define   MSK32BLK_mvs1                                       0x0000E000

    #define     BA_BLK_motion2                                 0x0002
    #define     B16BLK_motion2                                 0x0002
    #define   LSb32BLK_motion2                                    16
    #define   LSb16BLK_motion2                                    0
    #define       bBLK_motion2                                 2
    #define   MSK32BLK_motion2                                    0x00030000

    #define     BA_BLK_partition2                              0x0002
    #define     B16BLK_partition2                              0x0002
    #define   LSb32BLK_partition2                                 18
    #define   LSb16BLK_partition2                                 2
    #define       bBLK_partition2                              2
    #define   MSK32BLK_partition2                                 0x000C0000

    #define     BA_BLK_direct2                                 0x0002
    #define     B16BLK_direct2                                 0x0002
    #define   LSb32BLK_direct2                                    20
    #define   LSb16BLK_direct2                                    4
    #define       bBLK_direct2                                 1
    #define   MSK32BLK_direct2                                    0x00100000

    #define     BA_BLK_mvs2                                    0x0002
    #define     B16BLK_mvs2                                    0x0002
    #define   LSb32BLK_mvs2                                       21
    #define   LSb16BLK_mvs2                                       5
    #define       bBLK_mvs2                                    3
    #define   MSK32BLK_mvs2                                       0x00E00000

    #define     BA_BLK_motion3                                 0x0003
    #define     B16BLK_motion3                                 0x0002
    #define   LSb32BLK_motion3                                    24
    #define   LSb16BLK_motion3                                    8
    #define       bBLK_motion3                                 2
    #define   MSK32BLK_motion3                                    0x03000000

    #define     BA_BLK_partition3                              0x0003
    #define     B16BLK_partition3                              0x0002
    #define   LSb32BLK_partition3                                 26
    #define   LSb16BLK_partition3                                 10
    #define       bBLK_partition3                              2
    #define   MSK32BLK_partition3                                 0x0C000000

    #define     BA_BLK_direct3                                 0x0003
    #define     B16BLK_direct3                                 0x0002
    #define   LSb32BLK_direct3                                    28
    #define   LSb16BLK_direct3                                    12
    #define       bBLK_direct3                                 1
    #define   MSK32BLK_direct3                                    0x10000000

    #define     BA_BLK_mvs3                                    0x0003
    #define     B16BLK_mvs3                                    0x0002
    #define   LSb32BLK_mvs3                                       29
    #define   LSb16BLK_mvs3                                       13
    #define       bBLK_mvs3                                    3
    #define   MSK32BLK_mvs3                                       0xE0000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_BLK {
    ///////////////////////////////////////////////////////////
    #define   GET32BLK_motion(r32)                             _BFGET_(r32, 1, 0)
    #define   SET32BLK_motion(r32,v)                           _BFSET_(r32, 1, 0,v)
    #define   GET16BLK_motion(r16)                             _BFGET_(r16, 1, 0)
    #define   SET16BLK_motion(r16,v)                           _BFSET_(r16, 1, 0,v)

    #define   GET32BLK_partition(r32)                          _BFGET_(r32, 3, 2)
    #define   SET32BLK_partition(r32,v)                        _BFSET_(r32, 3, 2,v)
    #define   GET16BLK_partition(r16)                          _BFGET_(r16, 3, 2)
    #define   SET16BLK_partition(r16,v)                        _BFSET_(r16, 3, 2,v)

    #define   GET32BLK_direct(r32)                             _BFGET_(r32, 4, 4)
    #define   SET32BLK_direct(r32,v)                           _BFSET_(r32, 4, 4,v)
    #define   GET16BLK_direct(r16)                             _BFGET_(r16, 4, 4)
    #define   SET16BLK_direct(r16,v)                           _BFSET_(r16, 4, 4,v)

    #define   GET32BLK_mvs(r32)                                _BFGET_(r32, 7, 5)
    #define   SET32BLK_mvs(r32,v)                              _BFSET_(r32, 7, 5,v)
    #define   GET16BLK_mvs(r16)                                _BFGET_(r16, 7, 5)
    #define   SET16BLK_mvs(r16,v)                              _BFSET_(r16, 7, 5,v)

    #define   GET32BLK_motion1(r32)                            _BFGET_(r32, 9, 8)
    #define   SET32BLK_motion1(r32,v)                          _BFSET_(r32, 9, 8,v)
    #define   GET16BLK_motion1(r16)                            _BFGET_(r16, 9, 8)
    #define   SET16BLK_motion1(r16,v)                          _BFSET_(r16, 9, 8,v)

    #define   GET32BLK_partition1(r32)                         _BFGET_(r32,11,10)
    #define   SET32BLK_partition1(r32,v)                       _BFSET_(r32,11,10,v)
    #define   GET16BLK_partition1(r16)                         _BFGET_(r16,11,10)
    #define   SET16BLK_partition1(r16,v)                       _BFSET_(r16,11,10,v)

    #define   GET32BLK_direct1(r32)                            _BFGET_(r32,12,12)
    #define   SET32BLK_direct1(r32,v)                          _BFSET_(r32,12,12,v)
    #define   GET16BLK_direct1(r16)                            _BFGET_(r16,12,12)
    #define   SET16BLK_direct1(r16,v)                          _BFSET_(r16,12,12,v)

    #define   GET32BLK_mvs1(r32)                               _BFGET_(r32,15,13)
    #define   SET32BLK_mvs1(r32,v)                             _BFSET_(r32,15,13,v)
    #define   GET16BLK_mvs1(r16)                               _BFGET_(r16,15,13)
    #define   SET16BLK_mvs1(r16,v)                             _BFSET_(r16,15,13,v)

    #define   GET32BLK_motion2(r32)                            _BFGET_(r32,17,16)
    #define   SET32BLK_motion2(r32,v)                          _BFSET_(r32,17,16,v)
    #define   GET16BLK_motion2(r16)                            _BFGET_(r16, 1, 0)
    #define   SET16BLK_motion2(r16,v)                          _BFSET_(r16, 1, 0,v)

    #define   GET32BLK_partition2(r32)                         _BFGET_(r32,19,18)
    #define   SET32BLK_partition2(r32,v)                       _BFSET_(r32,19,18,v)
    #define   GET16BLK_partition2(r16)                         _BFGET_(r16, 3, 2)
    #define   SET16BLK_partition2(r16,v)                       _BFSET_(r16, 3, 2,v)

    #define   GET32BLK_direct2(r32)                            _BFGET_(r32,20,20)
    #define   SET32BLK_direct2(r32,v)                          _BFSET_(r32,20,20,v)
    #define   GET16BLK_direct2(r16)                            _BFGET_(r16, 4, 4)
    #define   SET16BLK_direct2(r16,v)                          _BFSET_(r16, 4, 4,v)

    #define   GET32BLK_mvs2(r32)                               _BFGET_(r32,23,21)
    #define   SET32BLK_mvs2(r32,v)                             _BFSET_(r32,23,21,v)
    #define   GET16BLK_mvs2(r16)                               _BFGET_(r16, 7, 5)
    #define   SET16BLK_mvs2(r16,v)                             _BFSET_(r16, 7, 5,v)

    #define   GET32BLK_motion3(r32)                            _BFGET_(r32,25,24)
    #define   SET32BLK_motion3(r32,v)                          _BFSET_(r32,25,24,v)
    #define   GET16BLK_motion3(r16)                            _BFGET_(r16, 9, 8)
    #define   SET16BLK_motion3(r16,v)                          _BFSET_(r16, 9, 8,v)

    #define   GET32BLK_partition3(r32)                         _BFGET_(r32,27,26)
    #define   SET32BLK_partition3(r32,v)                       _BFSET_(r32,27,26,v)
    #define   GET16BLK_partition3(r16)                         _BFGET_(r16,11,10)
    #define   SET16BLK_partition3(r16,v)                       _BFSET_(r16,11,10,v)

    #define   GET32BLK_direct3(r32)                            _BFGET_(r32,28,28)
    #define   SET32BLK_direct3(r32,v)                          _BFSET_(r32,28,28,v)
    #define   GET16BLK_direct3(r16)                            _BFGET_(r16,12,12)
    #define   SET16BLK_direct3(r16,v)                          _BFSET_(r16,12,12,v)

    #define   GET32BLK_mvs3(r32)                               _BFGET_(r32,31,29)
    #define   SET32BLK_mvs3(r32,v)                             _BFSET_(r32,31,29,v)
    #define   GET16BLK_mvs3(r16)                               _BFGET_(r16,15,13)
    #define   SET16BLK_mvs3(r16,v)                             _BFSET_(r16,15,13,v)

            UNSG32 u_motion                                    :  2;
            UNSG32 u_partition                                 :  2;
            UNSG32 u_direct                                    :  1;
            UNSG32 u_mvs                                       :  3;
            UNSG32 u_motion1                                   :  2;
            UNSG32 u_partition1                                :  2;
            UNSG32 u_direct1                                   :  1;
            UNSG32 u_mvs1                                      :  3;
            UNSG32 u_motion2                                   :  2;
            UNSG32 u_partition2                                :  2;
            UNSG32 u_direct2                                   :  1;
            UNSG32 u_mvs2                                      :  3;
            UNSG32 u_motion3                                   :  2;
            UNSG32 u_partition3                                :  2;
            UNSG32 u_direct3                                   :  1;
            UNSG32 u_mvs3                                      :  3;
    ///////////////////////////////////////////////////////////
    } SIE_BLK;

    ///////////////////////////////////////////////////////////
     SIGN32 BLK_drvrd(SIE_BLK *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 BLK_drvwr(SIE_BLK *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void BLK_reset(SIE_BLK *p);
     SIGN32 BLK_cmp  (SIE_BLK *p, SIE_BLK *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define BLK_check(p,pie,pfx,hLOG) BLK_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define BLK_print(p,    pfx,hLOG) BLK_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: BLK
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE MV                                       (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 2  motion                    
///                                    ###
///                                    * Derived 8x8 block motion type (direct mode uses 'Bi'), see BLK.motion above
///                                    ###
///               %signed   14 X                         
///                                    ###
///                                    * Horizontal motion vector,
///                                    * Or MVD between parser & syntax processor
///                                    ###
///               %unsigned 3  type                      
///                                    ###
///                                    * Sub-set of mb_type, see MBPROP.type above
///                                    ###
///               %signed   13 Y                         
///                                    ###
///                                    * Vertical motion vector,
///                                    * Or MVD between parser & syntax processor
///                                    * End of MV
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_MV
#define h_MV (){}

    #define     BA_MV_motion                                   0x0000
    #define     B16MV_motion                                   0x0000
    #define   LSb32MV_motion                                      0
    #define   LSb16MV_motion                                      0
    #define       bMV_motion                                   2
    #define   MSK32MV_motion                                      0x00000003

    #define     BA_MV_X                                        0x0000
    #define     B16MV_X                                        0x0000
    #define   LSb32MV_X                                           2
    #define   LSb16MV_X                                           2
    #define       bMV_X                                        14
    #define   MSK32MV_X                                           0x0000FFFC

    #define     BA_MV_type                                     0x0002
    #define     B16MV_type                                     0x0002
    #define   LSb32MV_type                                        16
    #define   LSb16MV_type                                        0
    #define       bMV_type                                     3
    #define   MSK32MV_type                                        0x00070000

    #define     BA_MV_Y                                        0x0002
    #define     B16MV_Y                                        0x0002
    #define   LSb32MV_Y                                           19
    #define   LSb16MV_Y                                           3
    #define       bMV_Y                                        13
    #define   MSK32MV_Y                                           0xFFF80000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_MV {
    ///////////////////////////////////////////////////////////
    #define   GET32MV_motion(r32)                              _BFGET_(r32, 1, 0)
    #define   SET32MV_motion(r32,v)                            _BFSET_(r32, 1, 0,v)
    #define   GET16MV_motion(r16)                              _BFGET_(r16, 1, 0)
    #define   SET16MV_motion(r16,v)                            _BFSET_(r16, 1, 0,v)

    #define   GET32MV_X(r32)                                   _BFGET_(r32,15, 2)
    #define   SET32MV_X(r32,v)                                 _BFSET_(r32,15, 2,v)
    #define   GET16MV_X(r16)                                   _BFGET_(r16,15, 2)
    #define   SET16MV_X(r16,v)                                 _BFSET_(r16,15, 2,v)

    #define   GET32MV_type(r32)                                _BFGET_(r32,18,16)
    #define   SET32MV_type(r32,v)                              _BFSET_(r32,18,16,v)
    #define   GET16MV_type(r16)                                _BFGET_(r16, 2, 0)
    #define   SET16MV_type(r16,v)                              _BFSET_(r16, 2, 0,v)

    #define   GET32MV_Y(r32)                                   _BFGET_(r32,31,19)
    #define   SET32MV_Y(r32,v)                                 _BFSET_(r32,31,19,v)
    #define   GET16MV_Y(r16)                                   _BFGET_(r16,15, 3)
    #define   SET16MV_Y(r16,v)                                 _BFSET_(r16,15, 3,v)

            UNSG32 u_motion                                    :  2;
            UNSG32 s_X                                         : 14;
            UNSG32 u_type                                      :  3;
            UNSG32 s_Y                                         : 13;
    ///////////////////////////////////////////////////////////
    } SIE_MV;

    ///////////////////////////////////////////////////////////
     SIGN32 MV_drvrd(SIE_MV *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 MV_drvwr(SIE_MV *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void MV_reset(SIE_MV *p);
     SIGN32 MV_cmp  (SIE_MV *p, SIE_MV *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define MV_check(p,pie,pfx,hLOG) MV_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define MV_print(p,    pfx,hLOG) MV_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: MV
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FCTX                    biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 6  rBID                      
///                                    ###
///                                    * Flatten 4x4s in each 8x8,
///                                    * 0 for intra (as well as direct mode between parser & syntax processor):
///                                    * Reference buffer ID, last 1b indicates access mode:
///                                    * 0: frame/progressive or top field
///                                    * 1: bottom field
///                                    ###
///               %unsigned 5  rIDX                      
///                                    ###
///                                    * Flatten 4x4s in each 8x8,
///                                    * 0 for intra (as well as P/B-skip & direct mode between parser & syntax processor):
///                                    * Syntax 'RefListIdx' directly decoded from bit stream (field information embedded)
///                                    ###
///               %unsigned 1  FLD                       
///                                    ###
///                                    * Flatten 4x4s in each 8x8:
///                                    * 1 for MBAFF field MB, 0 for otherwise
///                                    ###
///               %unsigned 1  equalpred                 
///                                    ###
///                                    * BLK property for CABAC only:
///                                    * Using block category ACV,
///                                    * (But flatten to all 4x4s in each 8x8s):
///                                    * = !Intra && !skipped && (bi-pred || fore-pred)
///                                    * NOTE: = 0 for direct mode
///                                    * VC-1:
///                                    * PMV output: for hybridPred
///                                    * PMV input: predictor_flag (0: use dominant PMV)
///                                    ###
///               %unsigned 1  transform                 
///                                    ###
///                                    * MB property (flatten in all 4x4s):
///                                    * H.264: if 8x8 transform
///                                    * Others: if field transform
///                                    ###
///               %unsigned 1  NCBPY                     
///                                    ###
///                                    * Loop-filter & CABAC use only:
///                                    * Luma using block category ACV (4th 4x4),
///                                    * (But flatten to all 4x4s in each 8x8s):
///                                    * = !(IPCM || cbp_luma)
///                                    ###
///               %unsigned 1  MixFLG                    
///                                    ###
///                                    * CABAC use only:
///                                    * CBP chroma using block category DCU/DCV,
///                                    * (Only at 3rd & 4th 4x4s in 3rd 8x8):
///                                    * bin[0]: IPCM || !(skipped || (cbp_chroma == 0))
///                                    * bin[1]: IPCM || !(skipped || (cbp_chroma != 2))
///                                    * Or:
///                                    * mb_type using block category DCY,
///                                    * (Only at 4th 4x4 in 4th 8x8):
///                                    * I_SLICE: = !I_NXN
///                                    * P_SLICE: = 0
///                                    * B_SLICE: = !skipped && !direct_16x16
///                                    * Or:
///                                    * intra-chroma_pred using block category DCI,
///                                    * (Only at 3rd 4x4 in 4th 8x8):
///                                    * = Intra && !IPCM && (intra_chroma_pred != 0)
///                                    * Or:
///                                    * Temporal context buffers for direct mode use
///                                    ###
///                                    : 8x8                       0x1
///                                                 ###
///                                                 * Only at 1st 4x4 in 1st 8x8:
///                                                 * = if MB contains no sub-8x8 partition
///                                                 ###
///                                    : 16x16                     0x1
///                                                 ###
///                                                 * Only at 1st 4x4 in 2nd 8x8:
///                                                 * = if MB contains only 1 partition (16x16)
///                                                 ###
///               %unsigned 1  CBFY                      
///                                    ###
///                                    * Loop-filter & CABAC use only:
///                                    * Using block category ACY (every 4x4s):
///                                    * = IPCM || cbf_luma_ac
///                                    ###
///               %unsigned 1  CBFUV                     
///                                    ###
///                                    * CABAC use only:
///                                    * Using block category ACU/ACV,
///                                    * (Only at 3rd & 4th 4x4 in each 8x8s):
///                                    * = IPCM || cbf_chroma_ac
///                                    ###
///               %unsigned 1  CBFDC                     
///                                    ###
///                                    * CABAC use only:
///                                    * LumaDC using block category DCY,
///                                    * (Only at 4th 4x4 in 4th 8x8):
///                                    * = IPCM || (I_16x16 && cbf_luma_dc)
///                                    * ChromaDC using block category DCU/DCV,
///                                    * (Only at 3rd 4x4 in 3rd & 4th 8x8):
///                                    * = IPCM || cbf_chroma_dc
///                                    ###
///               %unsigned 6  ABSMVDX                   
///                                    ###
///                                    * CABAC use only:
///                                    * MIN( ABS(MVD.x), 63 )
///                                    ###
///               %unsigned 7  ABSMVDY                   
///                                    ###
///                                    * CABAC use only:
///                                    * MIN( ABS(MVD.y), 127 )
///                                    ###
///     @ 0x00004                      (P)
///     # 0x00004 mv                   
///               $MV                  mv                REG          
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FCTX
#define h_FCTX (){}

    #define     BA_FCTX_rBID                                   0x0000
    #define     B16FCTX_rBID                                   0x0000
    #define   LSb32FCTX_rBID                                      0
    #define   LSb16FCTX_rBID                                      0
    #define       bFCTX_rBID                                   6
    #define   MSK32FCTX_rBID                                      0x0000003F

    #define     BA_FCTX_rIDX                                   0x0000
    #define     B16FCTX_rIDX                                   0x0000
    #define   LSb32FCTX_rIDX                                      6
    #define   LSb16FCTX_rIDX                                      6
    #define       bFCTX_rIDX                                   5
    #define   MSK32FCTX_rIDX                                      0x000007C0

    #define     BA_FCTX_FLD                                    0x0001
    #define     B16FCTX_FLD                                    0x0000
    #define   LSb32FCTX_FLD                                       11
    #define   LSb16FCTX_FLD                                       11
    #define       bFCTX_FLD                                    1
    #define   MSK32FCTX_FLD                                       0x00000800

    #define     BA_FCTX_equalpred                              0x0001
    #define     B16FCTX_equalpred                              0x0000
    #define   LSb32FCTX_equalpred                                 12
    #define   LSb16FCTX_equalpred                                 12
    #define       bFCTX_equalpred                              1
    #define   MSK32FCTX_equalpred                                 0x00001000

    #define     BA_FCTX_transform                              0x0001
    #define     B16FCTX_transform                              0x0000
    #define   LSb32FCTX_transform                                 13
    #define   LSb16FCTX_transform                                 13
    #define       bFCTX_transform                              1
    #define   MSK32FCTX_transform                                 0x00002000

    #define     BA_FCTX_NCBPY                                  0x0001
    #define     B16FCTX_NCBPY                                  0x0000
    #define   LSb32FCTX_NCBPY                                     14
    #define   LSb16FCTX_NCBPY                                     14
    #define       bFCTX_NCBPY                                  1
    #define   MSK32FCTX_NCBPY                                     0x00004000

    #define     BA_FCTX_MixFLG                                 0x0001
    #define     B16FCTX_MixFLG                                 0x0000
    #define   LSb32FCTX_MixFLG                                    15
    #define   LSb16FCTX_MixFLG                                    15
    #define       bFCTX_MixFLG                                 1
    #define   MSK32FCTX_MixFLG                                    0x00008000
    #define        FCTX_MixFLG_8x8                                          0x1
    #define        FCTX_MixFLG_16x16                                        0x1

    #define     BA_FCTX_CBFY                                   0x0002
    #define     B16FCTX_CBFY                                   0x0002
    #define   LSb32FCTX_CBFY                                      16
    #define   LSb16FCTX_CBFY                                      0
    #define       bFCTX_CBFY                                   1
    #define   MSK32FCTX_CBFY                                      0x00010000

    #define     BA_FCTX_CBFUV                                  0x0002
    #define     B16FCTX_CBFUV                                  0x0002
    #define   LSb32FCTX_CBFUV                                     17
    #define   LSb16FCTX_CBFUV                                     1
    #define       bFCTX_CBFUV                                  1
    #define   MSK32FCTX_CBFUV                                     0x00020000

    #define     BA_FCTX_CBFDC                                  0x0002
    #define     B16FCTX_CBFDC                                  0x0002
    #define   LSb32FCTX_CBFDC                                     18
    #define   LSb16FCTX_CBFDC                                     2
    #define       bFCTX_CBFDC                                  1
    #define   MSK32FCTX_CBFDC                                     0x00040000

    #define     BA_FCTX_ABSMVDX                                0x0002
    #define     B16FCTX_ABSMVDX                                0x0002
    #define   LSb32FCTX_ABSMVDX                                   19
    #define   LSb16FCTX_ABSMVDX                                   3
    #define       bFCTX_ABSMVDX                                6
    #define   MSK32FCTX_ABSMVDX                                   0x01F80000

    #define     BA_FCTX_ABSMVDY                                0x0003
    #define     B16FCTX_ABSMVDY                                0x0002
    #define   LSb32FCTX_ABSMVDY                                   25
    #define   LSb16FCTX_ABSMVDY                                   9
    #define       bFCTX_ABSMVDY                                7
    #define   MSK32FCTX_ABSMVDY                                   0xFE000000
    ///////////////////////////////////////////////////////////
    #define     RA_FCTX_mv                                     0x0004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FCTX {
    ///////////////////////////////////////////////////////////
    #define   GET32FCTX_rBID(r32)                              _BFGET_(r32, 5, 0)
    #define   SET32FCTX_rBID(r32,v)                            _BFSET_(r32, 5, 0,v)
    #define   GET16FCTX_rBID(r16)                              _BFGET_(r16, 5, 0)
    #define   SET16FCTX_rBID(r16,v)                            _BFSET_(r16, 5, 0,v)

    #define   GET32FCTX_rIDX(r32)                              _BFGET_(r32,10, 6)
    #define   SET32FCTX_rIDX(r32,v)                            _BFSET_(r32,10, 6,v)
    #define   GET16FCTX_rIDX(r16)                              _BFGET_(r16,10, 6)
    #define   SET16FCTX_rIDX(r16,v)                            _BFSET_(r16,10, 6,v)

    #define   GET32FCTX_FLD(r32)                               _BFGET_(r32,11,11)
    #define   SET32FCTX_FLD(r32,v)                             _BFSET_(r32,11,11,v)
    #define   GET16FCTX_FLD(r16)                               _BFGET_(r16,11,11)
    #define   SET16FCTX_FLD(r16,v)                             _BFSET_(r16,11,11,v)

    #define   GET32FCTX_equalpred(r32)                         _BFGET_(r32,12,12)
    #define   SET32FCTX_equalpred(r32,v)                       _BFSET_(r32,12,12,v)
    #define   GET16FCTX_equalpred(r16)                         _BFGET_(r16,12,12)
    #define   SET16FCTX_equalpred(r16,v)                       _BFSET_(r16,12,12,v)

    #define   GET32FCTX_transform(r32)                         _BFGET_(r32,13,13)
    #define   SET32FCTX_transform(r32,v)                       _BFSET_(r32,13,13,v)
    #define   GET16FCTX_transform(r16)                         _BFGET_(r16,13,13)
    #define   SET16FCTX_transform(r16,v)                       _BFSET_(r16,13,13,v)

    #define   GET32FCTX_NCBPY(r32)                             _BFGET_(r32,14,14)
    #define   SET32FCTX_NCBPY(r32,v)                           _BFSET_(r32,14,14,v)
    #define   GET16FCTX_NCBPY(r16)                             _BFGET_(r16,14,14)
    #define   SET16FCTX_NCBPY(r16,v)                           _BFSET_(r16,14,14,v)

    #define   GET32FCTX_MixFLG(r32)                            _BFGET_(r32,15,15)
    #define   SET32FCTX_MixFLG(r32,v)                          _BFSET_(r32,15,15,v)
    #define   GET16FCTX_MixFLG(r16)                            _BFGET_(r16,15,15)
    #define   SET16FCTX_MixFLG(r16,v)                          _BFSET_(r16,15,15,v)

    #define   GET32FCTX_CBFY(r32)                              _BFGET_(r32,16,16)
    #define   SET32FCTX_CBFY(r32,v)                            _BFSET_(r32,16,16,v)
    #define   GET16FCTX_CBFY(r16)                              _BFGET_(r16, 0, 0)
    #define   SET16FCTX_CBFY(r16,v)                            _BFSET_(r16, 0, 0,v)

    #define   GET32FCTX_CBFUV(r32)                             _BFGET_(r32,17,17)
    #define   SET32FCTX_CBFUV(r32,v)                           _BFSET_(r32,17,17,v)
    #define   GET16FCTX_CBFUV(r16)                             _BFGET_(r16, 1, 1)
    #define   SET16FCTX_CBFUV(r16,v)                           _BFSET_(r16, 1, 1,v)

    #define   GET32FCTX_CBFDC(r32)                             _BFGET_(r32,18,18)
    #define   SET32FCTX_CBFDC(r32,v)                           _BFSET_(r32,18,18,v)
    #define   GET16FCTX_CBFDC(r16)                             _BFGET_(r16, 2, 2)
    #define   SET16FCTX_CBFDC(r16,v)                           _BFSET_(r16, 2, 2,v)

    #define   GET32FCTX_ABSMVDX(r32)                           _BFGET_(r32,24,19)
    #define   SET32FCTX_ABSMVDX(r32,v)                         _BFSET_(r32,24,19,v)
    #define   GET16FCTX_ABSMVDX(r16)                           _BFGET_(r16, 8, 3)
    #define   SET16FCTX_ABSMVDX(r16,v)                         _BFSET_(r16, 8, 3,v)

    #define   GET32FCTX_ABSMVDY(r32)                           _BFGET_(r32,31,25)
    #define   SET32FCTX_ABSMVDY(r32,v)                         _BFSET_(r32,31,25,v)
    #define   GET16FCTX_ABSMVDY(r16)                           _BFGET_(r16,15, 9)
    #define   SET16FCTX_ABSMVDY(r16,v)                         _BFSET_(r16,15, 9,v)

            UNSG32 u_rBID                                      :  6;
            UNSG32 u_rIDX                                      :  5;
            UNSG32 u_FLD                                       :  1;
            UNSG32 u_equalpred                                 :  1;
            UNSG32 u_transform                                 :  1;
            UNSG32 u_NCBPY                                     :  1;
            UNSG32 u_MixFLG                                    :  1;
            UNSG32 u_CBFY                                      :  1;
            UNSG32 u_CBFUV                                     :  1;
            UNSG32 u_CBFDC                                     :  1;
            UNSG32 u_ABSMVDX                                   :  6;
            UNSG32 u_ABSMVDY                                   :  7;
    ///////////////////////////////////////////////////////////
              SIE_MV                                           ie_mv;
    ///////////////////////////////////////////////////////////
    } SIE_FCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 FCTX_drvrd(SIE_FCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FCTX_drvwr(SIE_FCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FCTX_reset(SIE_FCTX *p);
     SIGN32 FCTX_cmp  (SIE_FCTX *p, SIE_FCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FCTX_check(p,pie,pfx,hLOG) FCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FCTX_print(p,    pfx,hLOG) FCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FCTX_VC1                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 6  rBID                      
///                                    ###
///                                    * Flatten 4x4s in each 8x8,
///                                    * 0 for intra (as well as direct mode between parser & syntax processor):
///                                    * Reference buffer ID, last 1b indicates access mode:
///                                    * 0: frame/progressive or top field
///                                    * 1: bottom field
///                                    ###
///               %unsigned 5  rIDX                      
///                                    ###
///                                    * Flatten 4x4s in each 8x8,
///                                    * 0 for intra (as well as P/B-skip & direct mode between parser & syntax processor):
///                                    * Syntax 'RefListIdx' directly decoded from bit stream (field information embedded)
///                                    ###
///               %unsigned 1  FLD                       
///                                    ###
///                                    * Flatten 4x4s in each 8x8:
///                                    * 1 for MBAFF field MB, 0 for otherwise
///                                    ###
///               %unsigned 1  equalpred                 
///                                    ###
///                                    * BLK property for CABAC only:
///                                    * Using block category ACV,
///                                    * (But flatten to all 4x4s in each 8x8s):
///                                    * = !Intra && !skipped && (bi-pred || fore-pred)
///                                    * NOTE: = 0 for direct mode
///                                    * VC-1:
///                                    * PMV output: for hybridPred
///                                    * PMV input: predictor_flag (0: use dominant PMV)
///                                    ###
///               %unsigned 1  transform                 
///                                    ###
///                                    * MB property (flatten in all 4x4s):
///                                    * H.264: if 8x8 transform
///                                    * Others: if field transform
///                                    ###
///               %unsigned 1  NCBPY                     
///                                    ###
///                                    * Loop-filter & CABAC use only:
///                                    * Luma using block category ACV (4th 4x4),
///                                    * (But flatten to all 4x4s in each 8x8s):
///                                    * = !(IPCM || cbp_luma)
///                                    ###
///               %unsigned 1  MixFLG                    
///                                    ###
///                                    * CABAC use only:
///                                    * CBP chroma using block category DCU/DCV,
///                                    * (Only at 3rd & 4th 4x4s in 3rd 8x8):
///                                    * bin[0]: IPCM || !(skipped || (cbp_chroma == 0))
///                                    * bin[1]: IPCM || !(skipped || (cbp_chroma != 2))
///                                    * Or:
///                                    * mb_type using block category DCY,
///                                    * (Only at 4th 4x4 in 4th 8x8):
///                                    * I_SLICE: = !I_NXN
///                                    * P_SLICE: = 0
///                                    * B_SLICE: = !skipped && !direct_16x16
///                                    * Or:
///                                    * intra-chroma_pred using block category DCI,
///                                    * (Only at 3rd 4x4 in 4th 8x8):
///                                    * = Intra && !IPCM && (intra_chroma_pred != 0)
///                                    * Or:
///                                    * Temporal context buffers for direct mode use
///                                    ###
///                                    : 8x8                       0x1
///                                                 ###
///                                                 * Only at 1st 4x4 in 1st 8x8:
///                                                 * = if MB contains no sub-8x8 partition
///                                                 ###
///                                    : 16x16                     0x1
///                                                 ###
///                                                 * Only at 1st 4x4 in 2nd 8x8:
///                                                 * = if MB contains only 1 partition (16x16)
///                                                 ###
///               %unsigned 2  dctSelY                   
///                                    : 4x4                       0x0
///                                    : 8x8                       0x1
///                                    : 4x8                       0x2
///                                    : 8x4                       0x3
///                                                 ###
///                                                 * DCT transform type for Y, used for VC-1 Fop
///                                                 * flattened to all 4x4 blocks within transform block
///                                                 ###
///               %unsigned 1  CBFY                      
///                                    ###
///                                    * coded block (4x4) flag for Y, used for VC-1 Fop
///                                    ###
///               %unsigned 1  CBFY8x8                   
///                                    ###
///                                    * coded block (8x8) flag for Y, used for VC-1 MP Fop
///                                    ###
///               %unsigned 12 RSVD12                    
///     @ 0x00004                      (P)
///     # 0x00004 mv                   
///               $MV                  mv                REG          
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FCTX_VC1
#define h_FCTX_VC1 (){}

    #define     BA_FCTX_VC1_rBID                               0x0000
    #define     B16FCTX_VC1_rBID                               0x0000
    #define   LSb32FCTX_VC1_rBID                                  0
    #define   LSb16FCTX_VC1_rBID                                  0
    #define       bFCTX_VC1_rBID                               6
    #define   MSK32FCTX_VC1_rBID                                  0x0000003F

    #define     BA_FCTX_VC1_rIDX                               0x0000
    #define     B16FCTX_VC1_rIDX                               0x0000
    #define   LSb32FCTX_VC1_rIDX                                  6
    #define   LSb16FCTX_VC1_rIDX                                  6
    #define       bFCTX_VC1_rIDX                               5
    #define   MSK32FCTX_VC1_rIDX                                  0x000007C0

    #define     BA_FCTX_VC1_FLD                                0x0001
    #define     B16FCTX_VC1_FLD                                0x0000
    #define   LSb32FCTX_VC1_FLD                                   11
    #define   LSb16FCTX_VC1_FLD                                   11
    #define       bFCTX_VC1_FLD                                1
    #define   MSK32FCTX_VC1_FLD                                   0x00000800

    #define     BA_FCTX_VC1_equalpred                          0x0001
    #define     B16FCTX_VC1_equalpred                          0x0000
    #define   LSb32FCTX_VC1_equalpred                             12
    #define   LSb16FCTX_VC1_equalpred                             12
    #define       bFCTX_VC1_equalpred                          1
    #define   MSK32FCTX_VC1_equalpred                             0x00001000

    #define     BA_FCTX_VC1_transform                          0x0001
    #define     B16FCTX_VC1_transform                          0x0000
    #define   LSb32FCTX_VC1_transform                             13
    #define   LSb16FCTX_VC1_transform                             13
    #define       bFCTX_VC1_transform                          1
    #define   MSK32FCTX_VC1_transform                             0x00002000

    #define     BA_FCTX_VC1_NCBPY                              0x0001
    #define     B16FCTX_VC1_NCBPY                              0x0000
    #define   LSb32FCTX_VC1_NCBPY                                 14
    #define   LSb16FCTX_VC1_NCBPY                                 14
    #define       bFCTX_VC1_NCBPY                              1
    #define   MSK32FCTX_VC1_NCBPY                                 0x00004000

    #define     BA_FCTX_VC1_MixFLG                             0x0001
    #define     B16FCTX_VC1_MixFLG                             0x0000
    #define   LSb32FCTX_VC1_MixFLG                                15
    #define   LSb16FCTX_VC1_MixFLG                                15
    #define       bFCTX_VC1_MixFLG                             1
    #define   MSK32FCTX_VC1_MixFLG                                0x00008000
    #define        FCTX_VC1_MixFLG_8x8                                      0x1
    #define        FCTX_VC1_MixFLG_16x16                                    0x1

    #define     BA_FCTX_VC1_dctSelY                            0x0002
    #define     B16FCTX_VC1_dctSelY                            0x0002
    #define   LSb32FCTX_VC1_dctSelY                               16
    #define   LSb16FCTX_VC1_dctSelY                               0
    #define       bFCTX_VC1_dctSelY                            2
    #define   MSK32FCTX_VC1_dctSelY                               0x00030000
    #define        FCTX_VC1_dctSelY_4x4                                     0x0
    #define        FCTX_VC1_dctSelY_8x8                                     0x1
    #define        FCTX_VC1_dctSelY_4x8                                     0x2
    #define        FCTX_VC1_dctSelY_8x4                                     0x3

    #define     BA_FCTX_VC1_CBFY                               0x0002
    #define     B16FCTX_VC1_CBFY                               0x0002
    #define   LSb32FCTX_VC1_CBFY                                  18
    #define   LSb16FCTX_VC1_CBFY                                  2
    #define       bFCTX_VC1_CBFY                               1
    #define   MSK32FCTX_VC1_CBFY                                  0x00040000

    #define     BA_FCTX_VC1_CBFY8x8                            0x0002
    #define     B16FCTX_VC1_CBFY8x8                            0x0002
    #define   LSb32FCTX_VC1_CBFY8x8                               19
    #define   LSb16FCTX_VC1_CBFY8x8                               3
    #define       bFCTX_VC1_CBFY8x8                            1
    #define   MSK32FCTX_VC1_CBFY8x8                               0x00080000

    #define     BA_FCTX_VC1_RSVD12                             0x0002
    #define     B16FCTX_VC1_RSVD12                             0x0002
    #define   LSb32FCTX_VC1_RSVD12                                20
    #define   LSb16FCTX_VC1_RSVD12                                4
    #define       bFCTX_VC1_RSVD12                             12
    #define   MSK32FCTX_VC1_RSVD12                                0xFFF00000
    ///////////////////////////////////////////////////////////
    #define     RA_FCTX_VC1_mv                                 0x0004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FCTX_VC1 {
    ///////////////////////////////////////////////////////////
    #define   GET32FCTX_VC1_rBID(r32)                          _BFGET_(r32, 5, 0)
    #define   SET32FCTX_VC1_rBID(r32,v)                        _BFSET_(r32, 5, 0,v)
    #define   GET16FCTX_VC1_rBID(r16)                          _BFGET_(r16, 5, 0)
    #define   SET16FCTX_VC1_rBID(r16,v)                        _BFSET_(r16, 5, 0,v)

    #define   GET32FCTX_VC1_rIDX(r32)                          _BFGET_(r32,10, 6)
    #define   SET32FCTX_VC1_rIDX(r32,v)                        _BFSET_(r32,10, 6,v)
    #define   GET16FCTX_VC1_rIDX(r16)                          _BFGET_(r16,10, 6)
    #define   SET16FCTX_VC1_rIDX(r16,v)                        _BFSET_(r16,10, 6,v)

    #define   GET32FCTX_VC1_FLD(r32)                           _BFGET_(r32,11,11)
    #define   SET32FCTX_VC1_FLD(r32,v)                         _BFSET_(r32,11,11,v)
    #define   GET16FCTX_VC1_FLD(r16)                           _BFGET_(r16,11,11)
    #define   SET16FCTX_VC1_FLD(r16,v)                         _BFSET_(r16,11,11,v)

    #define   GET32FCTX_VC1_equalpred(r32)                     _BFGET_(r32,12,12)
    #define   SET32FCTX_VC1_equalpred(r32,v)                   _BFSET_(r32,12,12,v)
    #define   GET16FCTX_VC1_equalpred(r16)                     _BFGET_(r16,12,12)
    #define   SET16FCTX_VC1_equalpred(r16,v)                   _BFSET_(r16,12,12,v)

    #define   GET32FCTX_VC1_transform(r32)                     _BFGET_(r32,13,13)
    #define   SET32FCTX_VC1_transform(r32,v)                   _BFSET_(r32,13,13,v)
    #define   GET16FCTX_VC1_transform(r16)                     _BFGET_(r16,13,13)
    #define   SET16FCTX_VC1_transform(r16,v)                   _BFSET_(r16,13,13,v)

    #define   GET32FCTX_VC1_NCBPY(r32)                         _BFGET_(r32,14,14)
    #define   SET32FCTX_VC1_NCBPY(r32,v)                       _BFSET_(r32,14,14,v)
    #define   GET16FCTX_VC1_NCBPY(r16)                         _BFGET_(r16,14,14)
    #define   SET16FCTX_VC1_NCBPY(r16,v)                       _BFSET_(r16,14,14,v)

    #define   GET32FCTX_VC1_MixFLG(r32)                        _BFGET_(r32,15,15)
    #define   SET32FCTX_VC1_MixFLG(r32,v)                      _BFSET_(r32,15,15,v)
    #define   GET16FCTX_VC1_MixFLG(r16)                        _BFGET_(r16,15,15)
    #define   SET16FCTX_VC1_MixFLG(r16,v)                      _BFSET_(r16,15,15,v)

    #define   GET32FCTX_VC1_dctSelY(r32)                       _BFGET_(r32,17,16)
    #define   SET32FCTX_VC1_dctSelY(r32,v)                     _BFSET_(r32,17,16,v)
    #define   GET16FCTX_VC1_dctSelY(r16)                       _BFGET_(r16, 1, 0)
    #define   SET16FCTX_VC1_dctSelY(r16,v)                     _BFSET_(r16, 1, 0,v)

    #define   GET32FCTX_VC1_CBFY(r32)                          _BFGET_(r32,18,18)
    #define   SET32FCTX_VC1_CBFY(r32,v)                        _BFSET_(r32,18,18,v)
    #define   GET16FCTX_VC1_CBFY(r16)                          _BFGET_(r16, 2, 2)
    #define   SET16FCTX_VC1_CBFY(r16,v)                        _BFSET_(r16, 2, 2,v)

    #define   GET32FCTX_VC1_CBFY8x8(r32)                       _BFGET_(r32,19,19)
    #define   SET32FCTX_VC1_CBFY8x8(r32,v)                     _BFSET_(r32,19,19,v)
    #define   GET16FCTX_VC1_CBFY8x8(r16)                       _BFGET_(r16, 3, 3)
    #define   SET16FCTX_VC1_CBFY8x8(r16,v)                     _BFSET_(r16, 3, 3,v)

    #define   GET32FCTX_VC1_RSVD12(r32)                        _BFGET_(r32,31,20)
    #define   SET32FCTX_VC1_RSVD12(r32,v)                      _BFSET_(r32,31,20,v)
    #define   GET16FCTX_VC1_RSVD12(r16)                        _BFGET_(r16,15, 4)
    #define   SET16FCTX_VC1_RSVD12(r16,v)                      _BFSET_(r16,15, 4,v)

            UNSG32 u_rBID                                      :  6;
            UNSG32 u_rIDX                                      :  5;
            UNSG32 u_FLD                                       :  1;
            UNSG32 u_equalpred                                 :  1;
            UNSG32 u_transform                                 :  1;
            UNSG32 u_NCBPY                                     :  1;
            UNSG32 u_MixFLG                                    :  1;
            UNSG32 u_dctSelY                                   :  2;
            UNSG32 u_CBFY                                      :  1;
            UNSG32 u_CBFY8x8                                   :  1;
            UNSG32 u_RSVD12                                    : 12;
    ///////////////////////////////////////////////////////////
              SIE_MV                                           ie_mv;
    ///////////////////////////////////////////////////////////
    } SIE_FCTX_VC1;

    ///////////////////////////////////////////////////////////
     SIGN32 FCTX_VC1_drvrd(SIE_FCTX_VC1 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FCTX_VC1_drvwr(SIE_FCTX_VC1 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FCTX_VC1_reset(SIE_FCTX_VC1 *p);
     SIGN32 FCTX_VC1_cmp  (SIE_FCTX_VC1 *p, SIE_FCTX_VC1 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FCTX_VC1_check(p,pie,pfx,hLOG) FCTX_VC1_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FCTX_VC1_print(p,    pfx,hLOG) FCTX_VC1_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FCTX_VC1
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FCTX_RV9                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 6  rBID                      
///                                    ###
///                                    * Flatten 4x4s in each 8x8,
///                                    * 0 for intra (as well as direct mode between parser & syntax processor):
///                                    * Reference buffer ID, last 1b indicates access mode:
///                                    * 0: frame/progressive or top field
///                                    * 1: bottom field
///                                    ###
///               %unsigned 5  rIDX                      
///                                    ###
///                                    * Flatten 4x4s in each 8x8,
///                                    * 0 for intra (as well as P/B-skip & direct mode between parser & syntax processor):
///                                    * Syntax 'RefListIdx' directly decoded from bit stream (field information embedded)
///                                    ###
///               %unsigned 1  FLD                       
///                                    ###
///                                    * Flatten 4x4s in each 8x8:
///                                    * 1 for MBAFF field MB, 0 for otherwise
///                                    ###
///               %unsigned 1  equalpred                 
///                                    ###
///                                    * BLK property for CABAC only:
///                                    * Using block category ACV,
///                                    * (But flatten to all 4x4s in each 8x8s):
///                                    * = !Intra && !skipped && (bi-pred || fore-pred)
///                                    * NOTE: = 0 for direct mode
///                                    * VC-1:
///                                    * PMV output: for hybridPred
///                                    * PMV input: predictor_flag (0: use dominant PMV)
///                                    ###
///               %unsigned 1  transform                 
///                                    ###
///                                    * MB property (flatten in all 4x4s):
///                                    * H.264: if 8x8 transform
///                                    * Others: if field transform
///                                    ###
///               %unsigned 1  NCBPY                     
///                                    ###
///                                    * Loop-filter & CABAC use only:
///                                    * Luma using block category ACV (4th 4x4),
///                                    * (But flatten to all 4x4s in each 8x8s):
///                                    * = !(IPCM || cbp_luma)
///                                    ###
///               %unsigned 1  MixFLG                    
///                                    ###
///                                    * CABAC use only:
///                                    * CBP chroma using block category DCU/DCV,
///                                    * (Only at 3rd & 4th 4x4s in 3rd 8x8):
///                                    * bin[0]: IPCM || !(skipped || (cbp_chroma == 0))
///                                    * bin[1]: IPCM || !(skipped || (cbp_chroma != 2))
///                                    * Or:
///                                    * mb_type using block category DCY,
///                                    * (Only at 4th 4x4 in 4th 8x8):
///                                    * I_SLICE: = !I_NXN
///                                    * P_SLICE: = 0
///                                    * B_SLICE: = !skipped && !direct_16x16
///                                    * Or:
///                                    * intra-chroma_pred using block category DCI,
///                                    * (Only at 3rd 4x4 in 4th 8x8):
///                                    * = Intra && !IPCM && (intra_chroma_pred != 0)
///                                    * Or:
///                                    * Temporal context buffers for direct mode use
///                                    ###
///                                    : 8x8                       0x1
///                                                 ###
///                                                 * Only at 1st 4x4 in 1st 8x8:
///                                                 * = if MB contains no sub-8x8 partition
///                                                 ###
///                                    : 16x16                     0x1
///                                                 ###
///                                                 * Only at 1st 4x4 in 2nd 8x8:
///                                                 * = if MB contains only 1 partition (16x16)
///                                                 ###
///               %unsigned 1  CBPY                      
///                                    ###
///                                    * CBP for Y
///                                    ###
///               %unsigned 1  CBPU                      
///                                    ###
///                                    * CBP for U
///                                    ###
///               %unsigned 1  CBPV                      
///                                    ###
///                                    * CBP for Y
///                                    ###
///               %unsigned 2  BsY                       
///                                    ###
///                                    * Block strength for Y
///                                    ###
///               %unsigned 2  BsU                       
///                                    ###
///                                    * Block strength for U
///                                    ###
///               %unsigned 2  BsV                       
///                                    ###
///                                    * Block strength for V
///                                    ###
///               %unsigned 7  Rsvd                      
///                                    ###
///                                    * Reserved
///                                    ###
///     @ 0x00004                      (P)
///     # 0x00004 mv                   
///               $MV                  mv                REG          
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FCTX_RV9
#define h_FCTX_RV9 (){}

    #define     BA_FCTX_RV9_rBID                               0x0000
    #define     B16FCTX_RV9_rBID                               0x0000
    #define   LSb32FCTX_RV9_rBID                                  0
    #define   LSb16FCTX_RV9_rBID                                  0
    #define       bFCTX_RV9_rBID                               6
    #define   MSK32FCTX_RV9_rBID                                  0x0000003F

    #define     BA_FCTX_RV9_rIDX                               0x0000
    #define     B16FCTX_RV9_rIDX                               0x0000
    #define   LSb32FCTX_RV9_rIDX                                  6
    #define   LSb16FCTX_RV9_rIDX                                  6
    #define       bFCTX_RV9_rIDX                               5
    #define   MSK32FCTX_RV9_rIDX                                  0x000007C0

    #define     BA_FCTX_RV9_FLD                                0x0001
    #define     B16FCTX_RV9_FLD                                0x0000
    #define   LSb32FCTX_RV9_FLD                                   11
    #define   LSb16FCTX_RV9_FLD                                   11
    #define       bFCTX_RV9_FLD                                1
    #define   MSK32FCTX_RV9_FLD                                   0x00000800

    #define     BA_FCTX_RV9_equalpred                          0x0001
    #define     B16FCTX_RV9_equalpred                          0x0000
    #define   LSb32FCTX_RV9_equalpred                             12
    #define   LSb16FCTX_RV9_equalpred                             12
    #define       bFCTX_RV9_equalpred                          1
    #define   MSK32FCTX_RV9_equalpred                             0x00001000

    #define     BA_FCTX_RV9_transform                          0x0001
    #define     B16FCTX_RV9_transform                          0x0000
    #define   LSb32FCTX_RV9_transform                             13
    #define   LSb16FCTX_RV9_transform                             13
    #define       bFCTX_RV9_transform                          1
    #define   MSK32FCTX_RV9_transform                             0x00002000

    #define     BA_FCTX_RV9_NCBPY                              0x0001
    #define     B16FCTX_RV9_NCBPY                              0x0000
    #define   LSb32FCTX_RV9_NCBPY                                 14
    #define   LSb16FCTX_RV9_NCBPY                                 14
    #define       bFCTX_RV9_NCBPY                              1
    #define   MSK32FCTX_RV9_NCBPY                                 0x00004000

    #define     BA_FCTX_RV9_MixFLG                             0x0001
    #define     B16FCTX_RV9_MixFLG                             0x0000
    #define   LSb32FCTX_RV9_MixFLG                                15
    #define   LSb16FCTX_RV9_MixFLG                                15
    #define       bFCTX_RV9_MixFLG                             1
    #define   MSK32FCTX_RV9_MixFLG                                0x00008000
    #define        FCTX_RV9_MixFLG_8x8                                      0x1
    #define        FCTX_RV9_MixFLG_16x16                                    0x1

    #define     BA_FCTX_RV9_CBPY                               0x0002
    #define     B16FCTX_RV9_CBPY                               0x0002
    #define   LSb32FCTX_RV9_CBPY                                  16
    #define   LSb16FCTX_RV9_CBPY                                  0
    #define       bFCTX_RV9_CBPY                               1
    #define   MSK32FCTX_RV9_CBPY                                  0x00010000

    #define     BA_FCTX_RV9_CBPU                               0x0002
    #define     B16FCTX_RV9_CBPU                               0x0002
    #define   LSb32FCTX_RV9_CBPU                                  17
    #define   LSb16FCTX_RV9_CBPU                                  1
    #define       bFCTX_RV9_CBPU                               1
    #define   MSK32FCTX_RV9_CBPU                                  0x00020000

    #define     BA_FCTX_RV9_CBPV                               0x0002
    #define     B16FCTX_RV9_CBPV                               0x0002
    #define   LSb32FCTX_RV9_CBPV                                  18
    #define   LSb16FCTX_RV9_CBPV                                  2
    #define       bFCTX_RV9_CBPV                               1
    #define   MSK32FCTX_RV9_CBPV                                  0x00040000

    #define     BA_FCTX_RV9_BsY                                0x0002
    #define     B16FCTX_RV9_BsY                                0x0002
    #define   LSb32FCTX_RV9_BsY                                   19
    #define   LSb16FCTX_RV9_BsY                                   3
    #define       bFCTX_RV9_BsY                                2
    #define   MSK32FCTX_RV9_BsY                                   0x00180000

    #define     BA_FCTX_RV9_BsU                                0x0002
    #define     B16FCTX_RV9_BsU                                0x0002
    #define   LSb32FCTX_RV9_BsU                                   21
    #define   LSb16FCTX_RV9_BsU                                   5
    #define       bFCTX_RV9_BsU                                2
    #define   MSK32FCTX_RV9_BsU                                   0x00600000

    #define     BA_FCTX_RV9_BsV                                0x0002
    #define     B16FCTX_RV9_BsV                                0x0002
    #define   LSb32FCTX_RV9_BsV                                   23
    #define   LSb16FCTX_RV9_BsV                                   7
    #define       bFCTX_RV9_BsV                                2
    #define   MSK32FCTX_RV9_BsV                                   0x01800000

    #define     BA_FCTX_RV9_Rsvd                               0x0003
    #define     B16FCTX_RV9_Rsvd                               0x0002
    #define   LSb32FCTX_RV9_Rsvd                                  25
    #define   LSb16FCTX_RV9_Rsvd                                  9
    #define       bFCTX_RV9_Rsvd                               7
    #define   MSK32FCTX_RV9_Rsvd                                  0xFE000000
    ///////////////////////////////////////////////////////////
    #define     RA_FCTX_RV9_mv                                 0x0004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FCTX_RV9 {
    ///////////////////////////////////////////////////////////
    #define   GET32FCTX_RV9_rBID(r32)                          _BFGET_(r32, 5, 0)
    #define   SET32FCTX_RV9_rBID(r32,v)                        _BFSET_(r32, 5, 0,v)
    #define   GET16FCTX_RV9_rBID(r16)                          _BFGET_(r16, 5, 0)
    #define   SET16FCTX_RV9_rBID(r16,v)                        _BFSET_(r16, 5, 0,v)

    #define   GET32FCTX_RV9_rIDX(r32)                          _BFGET_(r32,10, 6)
    #define   SET32FCTX_RV9_rIDX(r32,v)                        _BFSET_(r32,10, 6,v)
    #define   GET16FCTX_RV9_rIDX(r16)                          _BFGET_(r16,10, 6)
    #define   SET16FCTX_RV9_rIDX(r16,v)                        _BFSET_(r16,10, 6,v)

    #define   GET32FCTX_RV9_FLD(r32)                           _BFGET_(r32,11,11)
    #define   SET32FCTX_RV9_FLD(r32,v)                         _BFSET_(r32,11,11,v)
    #define   GET16FCTX_RV9_FLD(r16)                           _BFGET_(r16,11,11)
    #define   SET16FCTX_RV9_FLD(r16,v)                         _BFSET_(r16,11,11,v)

    #define   GET32FCTX_RV9_equalpred(r32)                     _BFGET_(r32,12,12)
    #define   SET32FCTX_RV9_equalpred(r32,v)                   _BFSET_(r32,12,12,v)
    #define   GET16FCTX_RV9_equalpred(r16)                     _BFGET_(r16,12,12)
    #define   SET16FCTX_RV9_equalpred(r16,v)                   _BFSET_(r16,12,12,v)

    #define   GET32FCTX_RV9_transform(r32)                     _BFGET_(r32,13,13)
    #define   SET32FCTX_RV9_transform(r32,v)                   _BFSET_(r32,13,13,v)
    #define   GET16FCTX_RV9_transform(r16)                     _BFGET_(r16,13,13)
    #define   SET16FCTX_RV9_transform(r16,v)                   _BFSET_(r16,13,13,v)

    #define   GET32FCTX_RV9_NCBPY(r32)                         _BFGET_(r32,14,14)
    #define   SET32FCTX_RV9_NCBPY(r32,v)                       _BFSET_(r32,14,14,v)
    #define   GET16FCTX_RV9_NCBPY(r16)                         _BFGET_(r16,14,14)
    #define   SET16FCTX_RV9_NCBPY(r16,v)                       _BFSET_(r16,14,14,v)

    #define   GET32FCTX_RV9_MixFLG(r32)                        _BFGET_(r32,15,15)
    #define   SET32FCTX_RV9_MixFLG(r32,v)                      _BFSET_(r32,15,15,v)
    #define   GET16FCTX_RV9_MixFLG(r16)                        _BFGET_(r16,15,15)
    #define   SET16FCTX_RV9_MixFLG(r16,v)                      _BFSET_(r16,15,15,v)

    #define   GET32FCTX_RV9_CBPY(r32)                          _BFGET_(r32,16,16)
    #define   SET32FCTX_RV9_CBPY(r32,v)                        _BFSET_(r32,16,16,v)
    #define   GET16FCTX_RV9_CBPY(r16)                          _BFGET_(r16, 0, 0)
    #define   SET16FCTX_RV9_CBPY(r16,v)                        _BFSET_(r16, 0, 0,v)

    #define   GET32FCTX_RV9_CBPU(r32)                          _BFGET_(r32,17,17)
    #define   SET32FCTX_RV9_CBPU(r32,v)                        _BFSET_(r32,17,17,v)
    #define   GET16FCTX_RV9_CBPU(r16)                          _BFGET_(r16, 1, 1)
    #define   SET16FCTX_RV9_CBPU(r16,v)                        _BFSET_(r16, 1, 1,v)

    #define   GET32FCTX_RV9_CBPV(r32)                          _BFGET_(r32,18,18)
    #define   SET32FCTX_RV9_CBPV(r32,v)                        _BFSET_(r32,18,18,v)
    #define   GET16FCTX_RV9_CBPV(r16)                          _BFGET_(r16, 2, 2)
    #define   SET16FCTX_RV9_CBPV(r16,v)                        _BFSET_(r16, 2, 2,v)

    #define   GET32FCTX_RV9_BsY(r32)                           _BFGET_(r32,20,19)
    #define   SET32FCTX_RV9_BsY(r32,v)                         _BFSET_(r32,20,19,v)
    #define   GET16FCTX_RV9_BsY(r16)                           _BFGET_(r16, 4, 3)
    #define   SET16FCTX_RV9_BsY(r16,v)                         _BFSET_(r16, 4, 3,v)

    #define   GET32FCTX_RV9_BsU(r32)                           _BFGET_(r32,22,21)
    #define   SET32FCTX_RV9_BsU(r32,v)                         _BFSET_(r32,22,21,v)
    #define   GET16FCTX_RV9_BsU(r16)                           _BFGET_(r16, 6, 5)
    #define   SET16FCTX_RV9_BsU(r16,v)                         _BFSET_(r16, 6, 5,v)

    #define   GET32FCTX_RV9_BsV(r32)                           _BFGET_(r32,24,23)
    #define   SET32FCTX_RV9_BsV(r32,v)                         _BFSET_(r32,24,23,v)
    #define   GET16FCTX_RV9_BsV(r16)                           _BFGET_(r16, 8, 7)
    #define   SET16FCTX_RV9_BsV(r16,v)                         _BFSET_(r16, 8, 7,v)

    #define   GET32FCTX_RV9_Rsvd(r32)                          _BFGET_(r32,31,25)
    #define   SET32FCTX_RV9_Rsvd(r32,v)                        _BFSET_(r32,31,25,v)
    #define   GET16FCTX_RV9_Rsvd(r16)                          _BFGET_(r16,15, 9)
    #define   SET16FCTX_RV9_Rsvd(r16,v)                        _BFSET_(r16,15, 9,v)

            UNSG32 u_rBID                                      :  6;
            UNSG32 u_rIDX                                      :  5;
            UNSG32 u_FLD                                       :  1;
            UNSG32 u_equalpred                                 :  1;
            UNSG32 u_transform                                 :  1;
            UNSG32 u_NCBPY                                     :  1;
            UNSG32 u_MixFLG                                    :  1;
            UNSG32 u_CBPY                                      :  1;
            UNSG32 u_CBPU                                      :  1;
            UNSG32 u_CBPV                                      :  1;
            UNSG32 u_BsY                                       :  2;
            UNSG32 u_BsU                                       :  2;
            UNSG32 u_BsV                                       :  2;
            UNSG32 u_Rsvd                                      :  7;
    ///////////////////////////////////////////////////////////
              SIE_MV                                           ie_mv;
    ///////////////////////////////////////////////////////////
    } SIE_FCTX_RV9;

    ///////////////////////////////////////////////////////////
     SIGN32 FCTX_RV9_drvrd(SIE_FCTX_RV9 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FCTX_RV9_drvwr(SIE_FCTX_RV9 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FCTX_RV9_reset(SIE_FCTX_RV9 *p);
     SIGN32 FCTX_RV9_cmp  (SIE_FCTX_RV9 *p, SIE_FCTX_RV9 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FCTX_RV9_check(p,pie,pfx,hLOG) FCTX_RV9_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FCTX_RV9_print(p,    pfx,hLOG) FCTX_RV9_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FCTX_RV9
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE BCTX                    biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 6  rBID                      
///               %unsigned 5  rIDX                      
///               %unsigned 1  FLD                       
///               %unsigned 1  equalpred                 
///                                    ###
///                                    * BLK property for CABAC only:
///                                    * Using block category ACV,
///                                    * (Only at 4th 4x4 in each 8x8s):
///                                    * = !Intra && !skipped && (bi-pred || back-pred)
///                                    * NOTE: = 0 for direct mode
///                                    ###
///               %unsigned 3  RSVD                      
///                                    ###
///                                    * Reserved
///                                    ###
///               %unsigned 3  dctSel                    
///                                    : 8x8                       0x0
///                                    : 8x4                       0x1
///                                    : 4x8                       0x2
///                                    : 4x4                       0x3
///                                                 ###
///                                                 * VC-1 use only
///                                                 ###
///               %unsigned 6  ABSMVDX                   
///               %unsigned 7  ABSMVDY                   
///     @ 0x00004                      (P)
///     # 0x00004 mv                   
///               $MV                  mv                REG          
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_BCTX
#define h_BCTX (){}

    #define     BA_BCTX_rBID                                   0x0000
    #define     B16BCTX_rBID                                   0x0000
    #define   LSb32BCTX_rBID                                      0
    #define   LSb16BCTX_rBID                                      0
    #define       bBCTX_rBID                                   6
    #define   MSK32BCTX_rBID                                      0x0000003F

    #define     BA_BCTX_rIDX                                   0x0000
    #define     B16BCTX_rIDX                                   0x0000
    #define   LSb32BCTX_rIDX                                      6
    #define   LSb16BCTX_rIDX                                      6
    #define       bBCTX_rIDX                                   5
    #define   MSK32BCTX_rIDX                                      0x000007C0

    #define     BA_BCTX_FLD                                    0x0001
    #define     B16BCTX_FLD                                    0x0000
    #define   LSb32BCTX_FLD                                       11
    #define   LSb16BCTX_FLD                                       11
    #define       bBCTX_FLD                                    1
    #define   MSK32BCTX_FLD                                       0x00000800

    #define     BA_BCTX_equalpred                              0x0001
    #define     B16BCTX_equalpred                              0x0000
    #define   LSb32BCTX_equalpred                                 12
    #define   LSb16BCTX_equalpred                                 12
    #define       bBCTX_equalpred                              1
    #define   MSK32BCTX_equalpred                                 0x00001000

    #define     BA_BCTX_RSVD                                   0x0001
    #define     B16BCTX_RSVD                                   0x0000
    #define   LSb32BCTX_RSVD                                      13
    #define   LSb16BCTX_RSVD                                      13
    #define       bBCTX_RSVD                                   3
    #define   MSK32BCTX_RSVD                                      0x0000E000

    #define     BA_BCTX_dctSel                                 0x0002
    #define     B16BCTX_dctSel                                 0x0002
    #define   LSb32BCTX_dctSel                                    16
    #define   LSb16BCTX_dctSel                                    0
    #define       bBCTX_dctSel                                 3
    #define   MSK32BCTX_dctSel                                    0x00070000
    #define        BCTX_dctSel_8x8                                          0x0
    #define        BCTX_dctSel_8x4                                          0x1
    #define        BCTX_dctSel_4x8                                          0x2
    #define        BCTX_dctSel_4x4                                          0x3

    #define     BA_BCTX_ABSMVDX                                0x0002
    #define     B16BCTX_ABSMVDX                                0x0002
    #define   LSb32BCTX_ABSMVDX                                   19
    #define   LSb16BCTX_ABSMVDX                                   3
    #define       bBCTX_ABSMVDX                                6
    #define   MSK32BCTX_ABSMVDX                                   0x01F80000

    #define     BA_BCTX_ABSMVDY                                0x0003
    #define     B16BCTX_ABSMVDY                                0x0002
    #define   LSb32BCTX_ABSMVDY                                   25
    #define   LSb16BCTX_ABSMVDY                                   9
    #define       bBCTX_ABSMVDY                                7
    #define   MSK32BCTX_ABSMVDY                                   0xFE000000
    ///////////////////////////////////////////////////////////
    #define     RA_BCTX_mv                                     0x0004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_BCTX {
    ///////////////////////////////////////////////////////////
    #define   GET32BCTX_rBID(r32)                              _BFGET_(r32, 5, 0)
    #define   SET32BCTX_rBID(r32,v)                            _BFSET_(r32, 5, 0,v)
    #define   GET16BCTX_rBID(r16)                              _BFGET_(r16, 5, 0)
    #define   SET16BCTX_rBID(r16,v)                            _BFSET_(r16, 5, 0,v)

    #define   GET32BCTX_rIDX(r32)                              _BFGET_(r32,10, 6)
    #define   SET32BCTX_rIDX(r32,v)                            _BFSET_(r32,10, 6,v)
    #define   GET16BCTX_rIDX(r16)                              _BFGET_(r16,10, 6)
    #define   SET16BCTX_rIDX(r16,v)                            _BFSET_(r16,10, 6,v)

    #define   GET32BCTX_FLD(r32)                               _BFGET_(r32,11,11)
    #define   SET32BCTX_FLD(r32,v)                             _BFSET_(r32,11,11,v)
    #define   GET16BCTX_FLD(r16)                               _BFGET_(r16,11,11)
    #define   SET16BCTX_FLD(r16,v)                             _BFSET_(r16,11,11,v)

    #define   GET32BCTX_equalpred(r32)                         _BFGET_(r32,12,12)
    #define   SET32BCTX_equalpred(r32,v)                       _BFSET_(r32,12,12,v)
    #define   GET16BCTX_equalpred(r16)                         _BFGET_(r16,12,12)
    #define   SET16BCTX_equalpred(r16,v)                       _BFSET_(r16,12,12,v)

    #define   GET32BCTX_RSVD(r32)                              _BFGET_(r32,15,13)
    #define   SET32BCTX_RSVD(r32,v)                            _BFSET_(r32,15,13,v)
    #define   GET16BCTX_RSVD(r16)                              _BFGET_(r16,15,13)
    #define   SET16BCTX_RSVD(r16,v)                            _BFSET_(r16,15,13,v)

    #define   GET32BCTX_dctSel(r32)                            _BFGET_(r32,18,16)
    #define   SET32BCTX_dctSel(r32,v)                          _BFSET_(r32,18,16,v)
    #define   GET16BCTX_dctSel(r16)                            _BFGET_(r16, 2, 0)
    #define   SET16BCTX_dctSel(r16,v)                          _BFSET_(r16, 2, 0,v)

    #define   GET32BCTX_ABSMVDX(r32)                           _BFGET_(r32,24,19)
    #define   SET32BCTX_ABSMVDX(r32,v)                         _BFSET_(r32,24,19,v)
    #define   GET16BCTX_ABSMVDX(r16)                           _BFGET_(r16, 8, 3)
    #define   SET16BCTX_ABSMVDX(r16,v)                         _BFSET_(r16, 8, 3,v)

    #define   GET32BCTX_ABSMVDY(r32)                           _BFGET_(r32,31,25)
    #define   SET32BCTX_ABSMVDY(r32,v)                         _BFSET_(r32,31,25,v)
    #define   GET16BCTX_ABSMVDY(r16)                           _BFGET_(r16,15, 9)
    #define   SET16BCTX_ABSMVDY(r16,v)                         _BFSET_(r16,15, 9,v)

            UNSG32 u_rBID                                      :  6;
            UNSG32 u_rIDX                                      :  5;
            UNSG32 u_FLD                                       :  1;
            UNSG32 u_equalpred                                 :  1;
            UNSG32 u_RSVD                                      :  3;
            UNSG32 u_dctSel                                    :  3;
            UNSG32 u_ABSMVDX                                   :  6;
            UNSG32 u_ABSMVDY                                   :  7;
    ///////////////////////////////////////////////////////////
              SIE_MV                                           ie_mv;
    ///////////////////////////////////////////////////////////
    } SIE_BCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 BCTX_drvrd(SIE_BCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 BCTX_drvwr(SIE_BCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void BCTX_reset(SIE_BCTX *p);
     SIGN32 BCTX_cmp  (SIE_BCTX *p, SIE_BCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define BCTX_check(p,pie,pfx,hLOG) BCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define BCTX_print(p,    pfx,hLOG) BCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: BCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE BCTX_VC1                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 6  rBID                      
///               %unsigned 5  rIDX                      
///               %unsigned 1  FLD                       
///               %unsigned 1  equalpred                 
///                                    ###
///                                    * BLK property for CABAC only:
///                                    * Using block category ACV,
///                                    * (Only at 4th 4x4 in each 8x8s):
///                                    * = !Intra && !skipped && (bi-pred || back-pred)
///                                    * NOTE: = 0 for direct mode
///                                    ###
///               %unsigned 3  RSVD                      
///                                    ###
///                                    * Reserved
///                                    ###
///               %unsigned 2  dctSelU                   
///                                    ###
///                                    * DCT transform type for U; used for VC-1 Fop
///                                    ###
///               %unsigned 2  dctSelV                   
///                                    ###
///                                    * DCT transform type for V; used for VC-1 Fop
///                                    ###
///               %unsigned 1  CBFU                      
///                                    ###
///                                    * coded block (4x4) flag for U; used for VC-1 Fop
///                                    ###
///               %unsigned 1  CBFV                      
///                                    ###
///                                    * coded block (4x4) flag for V; used for VC-1 Fop
///                                    ###
///               %unsigned 1  CBFU8x8                   
///                                    ###
///                                    * coded block (8x8) flag for U, used for VC-1 Fop
///                                    ###
///               %unsigned 1  CBFV8x8                   
///                                    ###
///                                    * coded block (8x8) flag for V, used for VC-1 Fop
///                                    ###
///               %unsigned 8  RSVD8                     
///     @ 0x00004                      (P)
///     # 0x00004 mv                   
///               $MV                  mv                REG          
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_BCTX_VC1
#define h_BCTX_VC1 (){}

    #define     BA_BCTX_VC1_rBID                               0x0000
    #define     B16BCTX_VC1_rBID                               0x0000
    #define   LSb32BCTX_VC1_rBID                                  0
    #define   LSb16BCTX_VC1_rBID                                  0
    #define       bBCTX_VC1_rBID                               6
    #define   MSK32BCTX_VC1_rBID                                  0x0000003F

    #define     BA_BCTX_VC1_rIDX                               0x0000
    #define     B16BCTX_VC1_rIDX                               0x0000
    #define   LSb32BCTX_VC1_rIDX                                  6
    #define   LSb16BCTX_VC1_rIDX                                  6
    #define       bBCTX_VC1_rIDX                               5
    #define   MSK32BCTX_VC1_rIDX                                  0x000007C0

    #define     BA_BCTX_VC1_FLD                                0x0001
    #define     B16BCTX_VC1_FLD                                0x0000
    #define   LSb32BCTX_VC1_FLD                                   11
    #define   LSb16BCTX_VC1_FLD                                   11
    #define       bBCTX_VC1_FLD                                1
    #define   MSK32BCTX_VC1_FLD                                   0x00000800

    #define     BA_BCTX_VC1_equalpred                          0x0001
    #define     B16BCTX_VC1_equalpred                          0x0000
    #define   LSb32BCTX_VC1_equalpred                             12
    #define   LSb16BCTX_VC1_equalpred                             12
    #define       bBCTX_VC1_equalpred                          1
    #define   MSK32BCTX_VC1_equalpred                             0x00001000

    #define     BA_BCTX_VC1_RSVD                               0x0001
    #define     B16BCTX_VC1_RSVD                               0x0000
    #define   LSb32BCTX_VC1_RSVD                                  13
    #define   LSb16BCTX_VC1_RSVD                                  13
    #define       bBCTX_VC1_RSVD                               3
    #define   MSK32BCTX_VC1_RSVD                                  0x0000E000

    #define     BA_BCTX_VC1_dctSelU                            0x0002
    #define     B16BCTX_VC1_dctSelU                            0x0002
    #define   LSb32BCTX_VC1_dctSelU                               16
    #define   LSb16BCTX_VC1_dctSelU                               0
    #define       bBCTX_VC1_dctSelU                            2
    #define   MSK32BCTX_VC1_dctSelU                               0x00030000

    #define     BA_BCTX_VC1_dctSelV                            0x0002
    #define     B16BCTX_VC1_dctSelV                            0x0002
    #define   LSb32BCTX_VC1_dctSelV                               18
    #define   LSb16BCTX_VC1_dctSelV                               2
    #define       bBCTX_VC1_dctSelV                            2
    #define   MSK32BCTX_VC1_dctSelV                               0x000C0000

    #define     BA_BCTX_VC1_CBFU                               0x0002
    #define     B16BCTX_VC1_CBFU                               0x0002
    #define   LSb32BCTX_VC1_CBFU                                  20
    #define   LSb16BCTX_VC1_CBFU                                  4
    #define       bBCTX_VC1_CBFU                               1
    #define   MSK32BCTX_VC1_CBFU                                  0x00100000

    #define     BA_BCTX_VC1_CBFV                               0x0002
    #define     B16BCTX_VC1_CBFV                               0x0002
    #define   LSb32BCTX_VC1_CBFV                                  21
    #define   LSb16BCTX_VC1_CBFV                                  5
    #define       bBCTX_VC1_CBFV                               1
    #define   MSK32BCTX_VC1_CBFV                                  0x00200000

    #define     BA_BCTX_VC1_CBFU8x8                            0x0002
    #define     B16BCTX_VC1_CBFU8x8                            0x0002
    #define   LSb32BCTX_VC1_CBFU8x8                               22
    #define   LSb16BCTX_VC1_CBFU8x8                               6
    #define       bBCTX_VC1_CBFU8x8                            1
    #define   MSK32BCTX_VC1_CBFU8x8                               0x00400000

    #define     BA_BCTX_VC1_CBFV8x8                            0x0002
    #define     B16BCTX_VC1_CBFV8x8                            0x0002
    #define   LSb32BCTX_VC1_CBFV8x8                               23
    #define   LSb16BCTX_VC1_CBFV8x8                               7
    #define       bBCTX_VC1_CBFV8x8                            1
    #define   MSK32BCTX_VC1_CBFV8x8                               0x00800000

    #define     BA_BCTX_VC1_RSVD8                              0x0003
    #define     B16BCTX_VC1_RSVD8                              0x0002
    #define   LSb32BCTX_VC1_RSVD8                                 24
    #define   LSb16BCTX_VC1_RSVD8                                 8
    #define       bBCTX_VC1_RSVD8                              8
    #define   MSK32BCTX_VC1_RSVD8                                 0xFF000000
    ///////////////////////////////////////////////////////////
    #define     RA_BCTX_VC1_mv                                 0x0004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_BCTX_VC1 {
    ///////////////////////////////////////////////////////////
    #define   GET32BCTX_VC1_rBID(r32)                          _BFGET_(r32, 5, 0)
    #define   SET32BCTX_VC1_rBID(r32,v)                        _BFSET_(r32, 5, 0,v)
    #define   GET16BCTX_VC1_rBID(r16)                          _BFGET_(r16, 5, 0)
    #define   SET16BCTX_VC1_rBID(r16,v)                        _BFSET_(r16, 5, 0,v)

    #define   GET32BCTX_VC1_rIDX(r32)                          _BFGET_(r32,10, 6)
    #define   SET32BCTX_VC1_rIDX(r32,v)                        _BFSET_(r32,10, 6,v)
    #define   GET16BCTX_VC1_rIDX(r16)                          _BFGET_(r16,10, 6)
    #define   SET16BCTX_VC1_rIDX(r16,v)                        _BFSET_(r16,10, 6,v)

    #define   GET32BCTX_VC1_FLD(r32)                           _BFGET_(r32,11,11)
    #define   SET32BCTX_VC1_FLD(r32,v)                         _BFSET_(r32,11,11,v)
    #define   GET16BCTX_VC1_FLD(r16)                           _BFGET_(r16,11,11)
    #define   SET16BCTX_VC1_FLD(r16,v)                         _BFSET_(r16,11,11,v)

    #define   GET32BCTX_VC1_equalpred(r32)                     _BFGET_(r32,12,12)
    #define   SET32BCTX_VC1_equalpred(r32,v)                   _BFSET_(r32,12,12,v)
    #define   GET16BCTX_VC1_equalpred(r16)                     _BFGET_(r16,12,12)
    #define   SET16BCTX_VC1_equalpred(r16,v)                   _BFSET_(r16,12,12,v)

    #define   GET32BCTX_VC1_RSVD(r32)                          _BFGET_(r32,15,13)
    #define   SET32BCTX_VC1_RSVD(r32,v)                        _BFSET_(r32,15,13,v)
    #define   GET16BCTX_VC1_RSVD(r16)                          _BFGET_(r16,15,13)
    #define   SET16BCTX_VC1_RSVD(r16,v)                        _BFSET_(r16,15,13,v)

    #define   GET32BCTX_VC1_dctSelU(r32)                       _BFGET_(r32,17,16)
    #define   SET32BCTX_VC1_dctSelU(r32,v)                     _BFSET_(r32,17,16,v)
    #define   GET16BCTX_VC1_dctSelU(r16)                       _BFGET_(r16, 1, 0)
    #define   SET16BCTX_VC1_dctSelU(r16,v)                     _BFSET_(r16, 1, 0,v)

    #define   GET32BCTX_VC1_dctSelV(r32)                       _BFGET_(r32,19,18)
    #define   SET32BCTX_VC1_dctSelV(r32,v)                     _BFSET_(r32,19,18,v)
    #define   GET16BCTX_VC1_dctSelV(r16)                       _BFGET_(r16, 3, 2)
    #define   SET16BCTX_VC1_dctSelV(r16,v)                     _BFSET_(r16, 3, 2,v)

    #define   GET32BCTX_VC1_CBFU(r32)                          _BFGET_(r32,20,20)
    #define   SET32BCTX_VC1_CBFU(r32,v)                        _BFSET_(r32,20,20,v)
    #define   GET16BCTX_VC1_CBFU(r16)                          _BFGET_(r16, 4, 4)
    #define   SET16BCTX_VC1_CBFU(r16,v)                        _BFSET_(r16, 4, 4,v)

    #define   GET32BCTX_VC1_CBFV(r32)                          _BFGET_(r32,21,21)
    #define   SET32BCTX_VC1_CBFV(r32,v)                        _BFSET_(r32,21,21,v)
    #define   GET16BCTX_VC1_CBFV(r16)                          _BFGET_(r16, 5, 5)
    #define   SET16BCTX_VC1_CBFV(r16,v)                        _BFSET_(r16, 5, 5,v)

    #define   GET32BCTX_VC1_CBFU8x8(r32)                       _BFGET_(r32,22,22)
    #define   SET32BCTX_VC1_CBFU8x8(r32,v)                     _BFSET_(r32,22,22,v)
    #define   GET16BCTX_VC1_CBFU8x8(r16)                       _BFGET_(r16, 6, 6)
    #define   SET16BCTX_VC1_CBFU8x8(r16,v)                     _BFSET_(r16, 6, 6,v)

    #define   GET32BCTX_VC1_CBFV8x8(r32)                       _BFGET_(r32,23,23)
    #define   SET32BCTX_VC1_CBFV8x8(r32,v)                     _BFSET_(r32,23,23,v)
    #define   GET16BCTX_VC1_CBFV8x8(r16)                       _BFGET_(r16, 7, 7)
    #define   SET16BCTX_VC1_CBFV8x8(r16,v)                     _BFSET_(r16, 7, 7,v)

    #define   GET32BCTX_VC1_RSVD8(r32)                         _BFGET_(r32,31,24)
    #define   SET32BCTX_VC1_RSVD8(r32,v)                       _BFSET_(r32,31,24,v)
    #define   GET16BCTX_VC1_RSVD8(r16)                         _BFGET_(r16,15, 8)
    #define   SET16BCTX_VC1_RSVD8(r16,v)                       _BFSET_(r16,15, 8,v)

            UNSG32 u_rBID                                      :  6;
            UNSG32 u_rIDX                                      :  5;
            UNSG32 u_FLD                                       :  1;
            UNSG32 u_equalpred                                 :  1;
            UNSG32 u_RSVD                                      :  3;
            UNSG32 u_dctSelU                                   :  2;
            UNSG32 u_dctSelV                                   :  2;
            UNSG32 u_CBFU                                      :  1;
            UNSG32 u_CBFV                                      :  1;
            UNSG32 u_CBFU8x8                                   :  1;
            UNSG32 u_CBFV8x8                                   :  1;
            UNSG32 u_RSVD8                                     :  8;
    ///////////////////////////////////////////////////////////
              SIE_MV                                           ie_mv;
    ///////////////////////////////////////////////////////////
    } SIE_BCTX_VC1;

    ///////////////////////////////////////////////////////////
     SIGN32 BCTX_VC1_drvrd(SIE_BCTX_VC1 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 BCTX_VC1_drvwr(SIE_BCTX_VC1 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void BCTX_VC1_reset(SIE_BCTX_VC1 *p);
     SIGN32 BCTX_VC1_cmp  (SIE_BCTX_VC1 *p, SIE_BCTX_VC1 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define BCTX_VC1_check(p,pie,pfx,hLOG) BCTX_VC1_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define BCTX_VC1_print(p,    pfx,hLOG) BCTX_VC1_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: BCTX_VC1
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FCTXI                   biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 22 RSVD                      
///               %unsigned 5  NCUV                      
///                                    ###
///                                    * CAVLC use only:
///                                    * Using block category ACU/ACV: 0~15
///                                    ###
///               %unsigned 5  NCY                       
///                                    ###
///                                    * CAVLC use only:
///                                    * Using block category ACY (every 4x4s): 0~16
///                                    ###
///     @ 0x00004                      (P)
///               %unsigned 20 RSVD20                    
///               %unsigned 4  intraChroma               
///                                    ###
///                                    * For encoder: Intra prediction mode for chormablocks, see IntraChroma.mode above. Only appears in DCI, one per MB.
///                                    ###
///               %unsigned 8  intraLuma                 
///                                    ###
///                                    * Intra 16x16/NxN prediction mode for luma blocks, see IntraLuma.mode above
///                                    * =0 between parser & syntax processor
///                                    * End of FCTXI
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FCTXI
#define h_FCTXI (){}

    #define     BA_FCTXI_RSVD                                  0x0000
    #define     B16FCTXI_RSVD                                  0x0000
    #define   LSb32FCTXI_RSVD                                     0
    #define   LSb16FCTXI_RSVD                                     0
    #define       bFCTXI_RSVD                                  22
    #define   MSK32FCTXI_RSVD                                     0x003FFFFF

    #define     BA_FCTXI_NCUV                                  0x0002
    #define     B16FCTXI_NCUV                                  0x0002
    #define   LSb32FCTXI_NCUV                                     22
    #define   LSb16FCTXI_NCUV                                     6
    #define       bFCTXI_NCUV                                  5
    #define   MSK32FCTXI_NCUV                                     0x07C00000

    #define     BA_FCTXI_NCY                                   0x0003
    #define     B16FCTXI_NCY                                   0x0002
    #define   LSb32FCTXI_NCY                                      27
    #define   LSb16FCTXI_NCY                                      11
    #define       bFCTXI_NCY                                   5
    #define   MSK32FCTXI_NCY                                      0xF8000000
    ///////////////////////////////////////////////////////////

    #define     BA_FCTXI_RSVD20                                0x0004
    #define     B16FCTXI_RSVD20                                0x0004
    #define   LSb32FCTXI_RSVD20                                   0
    #define   LSb16FCTXI_RSVD20                                   0
    #define       bFCTXI_RSVD20                                20
    #define   MSK32FCTXI_RSVD20                                   0x000FFFFF

    #define     BA_FCTXI_intraChroma                           0x0006
    #define     B16FCTXI_intraChroma                           0x0006
    #define   LSb32FCTXI_intraChroma                              20
    #define   LSb16FCTXI_intraChroma                              4
    #define       bFCTXI_intraChroma                           4
    #define   MSK32FCTXI_intraChroma                              0x00F00000

    #define     BA_FCTXI_intraLuma                             0x0007
    #define     B16FCTXI_intraLuma                             0x0006
    #define   LSb32FCTXI_intraLuma                                24
    #define   LSb16FCTXI_intraLuma                                8
    #define       bFCTXI_intraLuma                             8
    #define   MSK32FCTXI_intraLuma                                0xFF000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FCTXI {
    ///////////////////////////////////////////////////////////
    #define   GET32FCTXI_RSVD(r32)                             _BFGET_(r32,21, 0)
    #define   SET32FCTXI_RSVD(r32,v)                           _BFSET_(r32,21, 0,v)

    #define   GET32FCTXI_NCUV(r32)                             _BFGET_(r32,26,22)
    #define   SET32FCTXI_NCUV(r32,v)                           _BFSET_(r32,26,22,v)
    #define   GET16FCTXI_NCUV(r16)                             _BFGET_(r16,10, 6)
    #define   SET16FCTXI_NCUV(r16,v)                           _BFSET_(r16,10, 6,v)

    #define   GET32FCTXI_NCY(r32)                              _BFGET_(r32,31,27)
    #define   SET32FCTXI_NCY(r32,v)                            _BFSET_(r32,31,27,v)
    #define   GET16FCTXI_NCY(r16)                              _BFGET_(r16,15,11)
    #define   SET16FCTXI_NCY(r16,v)                            _BFSET_(r16,15,11,v)

            UNSG32 u_RSVD                                      : 22;
            UNSG32 u_NCUV                                      :  5;
            UNSG32 u_NCY                                       :  5;
    ///////////////////////////////////////////////////////////
    #define   GET32FCTXI_RSVD20(r32)                           _BFGET_(r32,19, 0)
    #define   SET32FCTXI_RSVD20(r32,v)                         _BFSET_(r32,19, 0,v)

    #define   GET32FCTXI_intraChroma(r32)                      _BFGET_(r32,23,20)
    #define   SET32FCTXI_intraChroma(r32,v)                    _BFSET_(r32,23,20,v)
    #define   GET16FCTXI_intraChroma(r16)                      _BFGET_(r16, 7, 4)
    #define   SET16FCTXI_intraChroma(r16,v)                    _BFSET_(r16, 7, 4,v)

    #define   GET32FCTXI_intraLuma(r32)                        _BFGET_(r32,31,24)
    #define   SET32FCTXI_intraLuma(r32,v)                      _BFSET_(r32,31,24,v)
    #define   GET16FCTXI_intraLuma(r16)                        _BFGET_(r16,15, 8)
    #define   SET16FCTXI_intraLuma(r16,v)                      _BFSET_(r16,15, 8,v)

            UNSG32 u_RSVD20                                    : 20;
            UNSG32 u_intraChroma                               :  4;
            UNSG32 u_intraLuma                                 :  8;
    ///////////////////////////////////////////////////////////
    } SIE_FCTXI;

    ///////////////////////////////////////////////////////////
     SIGN32 FCTXI_drvrd(SIE_FCTXI *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FCTXI_drvwr(SIE_FCTXI *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FCTXI_reset(SIE_FCTXI *p);
     SIGN32 FCTXI_cmp  (SIE_FCTXI *p, SIE_FCTXI *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FCTXI_check(p,pie,pfx,hLOG) FCTXI_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FCTXI_print(p,    pfx,hLOG) FCTXI_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FCTXI
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE HCTX4x4                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 fore                 
///               $FCTX                fore              REG          
///                                    ###
///                                    * Forward prediction
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 back                 
///               $BCTX                back              REG          
///                                    ###
///                                    * Backward prediction
///                                    * End of HCTX4x4
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      16B, bits:     128b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_HCTX4x4
#define h_HCTX4x4 (){}

    #define     RA_HCTX4x4_fore                                0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_HCTX4x4_back                                0x0008
    ///////////////////////////////////////////////////////////

    typedef struct SIE_HCTX4x4 {
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_fore;
    ///////////////////////////////////////////////////////////
              SIE_BCTX                                         ie_back;
    ///////////////////////////////////////////////////////////
    } SIE_HCTX4x4;

    ///////////////////////////////////////////////////////////
     SIGN32 HCTX4x4_drvrd(SIE_HCTX4x4 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 HCTX4x4_drvwr(SIE_HCTX4x4 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void HCTX4x4_reset(SIE_HCTX4x4 *p);
     SIGN32 HCTX4x4_cmp  (SIE_HCTX4x4 *p, SIE_HCTX4x4 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define HCTX4x4_check(p,pie,pfx,hLOG) HCTX4x4_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define HCTX4x4_print(p,    pfx,hLOG) HCTX4x4_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: HCTX4x4
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE CTXI                    biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %signed   16 AC0                       
///                                    ###
///                                    * DC or horizontal/vertical AC coefficient
///                                    ###
///               %signed   13 AC1                       
///                                    ###
///                                    * 2nd horizontal/vertical AC coefficient
///                                    ###
///               %unsigned 1  cbpcy                     
///                                    ###
///                                    * Flatten all 4x4s in a 8x8 block, coded or not
///                                    ###
///               %unsigned 2  mquantL                   
///                                    ###
///                                    * Low 2 bits of mquant, flatten all 4x4s in a macroblock
///                                    ###
///               %unsigned 3  mquantH                   
///                                    ###
///                                    * High 3 bits of mquant, flatten all 4x4s in a macroblock
///                                    ###
///               %signed   13 AC2                       
///                                    ###
///                                    * 3rd horizontal/vertical AC coefficient
///                                    ###
///               %unsigned 3  type                      
///                                    ###
///                                    * Sub-set of mb_type, see MBPROP.type above
///                                    * = intra16x16
///                                    ###
///               %signed   13 AC3                       
///                                    ###
///                                    * 4th horizontal/vertical AC coefficient
///                                    * End of CTXI
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_CTXI
#define h_CTXI (){}

    #define     BA_CTXI_AC0                                    0x0000
    #define     B16CTXI_AC0                                    0x0000
    #define   LSb32CTXI_AC0                                       0
    #define   LSb16CTXI_AC0                                       0
    #define       bCTXI_AC0                                    16
    #define   MSK32CTXI_AC0                                       0x0000FFFF

    #define     BA_CTXI_AC1                                    0x0002
    #define     B16CTXI_AC1                                    0x0002
    #define   LSb32CTXI_AC1                                       16
    #define   LSb16CTXI_AC1                                       0
    #define       bCTXI_AC1                                    13
    #define   MSK32CTXI_AC1                                       0x1FFF0000

    #define     BA_CTXI_cbpcy                                  0x0003
    #define     B16CTXI_cbpcy                                  0x0002
    #define   LSb32CTXI_cbpcy                                     29
    #define   LSb16CTXI_cbpcy                                     13
    #define       bCTXI_cbpcy                                  1
    #define   MSK32CTXI_cbpcy                                     0x20000000

    #define     BA_CTXI_mquantL                                0x0003
    #define     B16CTXI_mquantL                                0x0002
    #define   LSb32CTXI_mquantL                                   30
    #define   LSb16CTXI_mquantL                                   14
    #define       bCTXI_mquantL                                2
    #define   MSK32CTXI_mquantL                                   0xC0000000

    #define     BA_CTXI_mquantH                                0x0004
    #define     B16CTXI_mquantH                                0x0004
    #define   LSb32CTXI_mquantH                                   0
    #define   LSb16CTXI_mquantH                                   0
    #define       bCTXI_mquantH                                3
    #define   MSK32CTXI_mquantH                                   0x00000007

    #define     BA_CTXI_AC2                                    0x0004
    #define     B16CTXI_AC2                                    0x0004
    #define   LSb32CTXI_AC2                                       3
    #define   LSb16CTXI_AC2                                       3
    #define       bCTXI_AC2                                    13
    #define   MSK32CTXI_AC2                                       0x0000FFF8

    #define     BA_CTXI_type                                   0x0006
    #define     B16CTXI_type                                   0x0006
    #define   LSb32CTXI_type                                      16
    #define   LSb16CTXI_type                                      0
    #define       bCTXI_type                                   3
    #define   MSK32CTXI_type                                      0x00070000

    #define     BA_CTXI_AC3                                    0x0006
    #define     B16CTXI_AC3                                    0x0006
    #define   LSb32CTXI_AC3                                       19
    #define   LSb16CTXI_AC3                                       3
    #define       bCTXI_AC3                                    13
    #define   MSK32CTXI_AC3                                       0xFFF80000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_CTXI {
    ///////////////////////////////////////////////////////////
    #define   GET32CTXI_AC0(r32)                               _BFGET_(r32,15, 0)
    #define   SET32CTXI_AC0(r32,v)                             _BFSET_(r32,15, 0,v)
    #define   GET16CTXI_AC0(r16)                               _BFGET_(r16,15, 0)
    #define   SET16CTXI_AC0(r16,v)                             _BFSET_(r16,15, 0,v)

    #define   GET32CTXI_AC1(r32)                               _BFGET_(r32,28,16)
    #define   SET32CTXI_AC1(r32,v)                             _BFSET_(r32,28,16,v)
    #define   GET16CTXI_AC1(r16)                               _BFGET_(r16,12, 0)
    #define   SET16CTXI_AC1(r16,v)                             _BFSET_(r16,12, 0,v)

    #define   GET32CTXI_cbpcy(r32)                             _BFGET_(r32,29,29)
    #define   SET32CTXI_cbpcy(r32,v)                           _BFSET_(r32,29,29,v)
    #define   GET16CTXI_cbpcy(r16)                             _BFGET_(r16,13,13)
    #define   SET16CTXI_cbpcy(r16,v)                           _BFSET_(r16,13,13,v)

    #define   GET32CTXI_mquantL(r32)                           _BFGET_(r32,31,30)
    #define   SET32CTXI_mquantL(r32,v)                         _BFSET_(r32,31,30,v)
    #define   GET16CTXI_mquantL(r16)                           _BFGET_(r16,15,14)
    #define   SET16CTXI_mquantL(r16,v)                         _BFSET_(r16,15,14,v)

            UNSG32 s_AC0                                       : 16;
            UNSG32 s_AC1                                       : 13;
            UNSG32 u_cbpcy                                     :  1;
            UNSG32 u_mquantL                                   :  2;
    ///////////////////////////////////////////////////////////

    #define   GET32CTXI_mquantH(r32)                           _BFGET_(r32, 2, 0)
    #define   SET32CTXI_mquantH(r32,v)                         _BFSET_(r32, 2, 0,v)
    #define   GET16CTXI_mquantH(r16)                           _BFGET_(r16, 2, 0)
    #define   SET16CTXI_mquantH(r16,v)                         _BFSET_(r16, 2, 0,v)

    #define   GET32CTXI_AC2(r32)                               _BFGET_(r32,15, 3)
    #define   SET32CTXI_AC2(r32,v)                             _BFSET_(r32,15, 3,v)
    #define   GET16CTXI_AC2(r16)                               _BFGET_(r16,15, 3)
    #define   SET16CTXI_AC2(r16,v)                             _BFSET_(r16,15, 3,v)

    #define   GET32CTXI_type(r32)                              _BFGET_(r32,18,16)
    #define   SET32CTXI_type(r32,v)                            _BFSET_(r32,18,16,v)
    #define   GET16CTXI_type(r16)                              _BFGET_(r16, 2, 0)
    #define   SET16CTXI_type(r16,v)                            _BFSET_(r16, 2, 0,v)

    #define   GET32CTXI_AC3(r32)                               _BFGET_(r32,31,19)
    #define   SET32CTXI_AC3(r32,v)                             _BFSET_(r32,31,19,v)
    #define   GET16CTXI_AC3(r16)                               _BFGET_(r16,15, 3)
    #define   SET16CTXI_AC3(r16,v)                             _BFSET_(r16,15, 3,v)

            UNSG32 u_mquantH                                   :  3;
            UNSG32 s_AC2                                       : 13;
            UNSG32 u_type                                      :  3;
            UNSG32 s_AC3                                       : 13;
    ///////////////////////////////////////////////////////////
    } SIE_CTXI;

    ///////////////////////////////////////////////////////////
     SIGN32 CTXI_drvrd(SIE_CTXI *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 CTXI_drvwr(SIE_CTXI *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void CTXI_reset(SIE_CTXI *p);
     SIGN32 CTXI_cmp  (SIE_CTXI *p, SIE_CTXI *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define CTXI_check(p,pie,pfx,hLOG) CTXI_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define CTXI_print(p,    pfx,hLOG) CTXI_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: CTXI
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE CTXI4x4                                  (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 luma                 
///               $CTXI                luma              REG          
///                                    ###
///                                    * DC/AC for Y
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 chroma               
///               $CTXI                chroma            REG          
///                                    ###
///                                    * DC/AC for UV
///                                    * End of CTXI4x4
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      16B, bits:     128b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_CTXI4x4
#define h_CTXI4x4 (){}

    #define     RA_CTXI4x4_luma                                0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_CTXI4x4_chroma                              0x0008
    ///////////////////////////////////////////////////////////

    typedef struct SIE_CTXI4x4 {
    ///////////////////////////////////////////////////////////
              SIE_CTXI                                         ie_luma;
    ///////////////////////////////////////////////////////////
              SIE_CTXI                                         ie_chroma;
    ///////////////////////////////////////////////////////////
    } SIE_CTXI4x4;

    ///////////////////////////////////////////////////////////
     SIGN32 CTXI4x4_drvrd(SIE_CTXI4x4 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 CTXI4x4_drvwr(SIE_CTXI4x4 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void CTXI4x4_reset(SIE_CTXI4x4 *p);
     SIGN32 CTXI4x4_cmp  (SIE_CTXI4x4 *p, SIE_CTXI4x4 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define CTXI4x4_check(p,pie,pfx,hLOG) CTXI4x4_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define CTXI4x4_print(p,    pfx,hLOG) CTXI4x4_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: CTXI4x4
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE IDX2BID                                  (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 frmIDX2BID           
///               $LUT8b               frmIDX2BID        REG      [16]
///                                    ###
///                                    * Cast to 8b rBID[32:rIDX][2:L0/L1]
///                                    * Note: field picture use this table (32 rIDX)!
///                                    ###
///     @ 0x00040                      (P)
///     # 0x00040 topIDX2BID           
///               $LUT8b               topIDX2BID        REG      [16]
///                                    ###
///                                    * Cast to 8b rBID[32:rIDX][2:L0/L1]
///                                    ###
///     @ 0x00080                      (P)
///     # 0x00080 btmIDX2BID           
///               $LUT8b               btmIDX2BID        REG      [16]
///                                    ###
///                                    * Cast to 8b rBID[32:rIDX][2:L0/L1]
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     192B, bits:    1536b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_IDX2BID
#define h_IDX2BID (){}

    #define     RA_IDX2BID_frmIDX2BID                          0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_IDX2BID_topIDX2BID                          0x0040
    ///////////////////////////////////////////////////////////
    #define     RA_IDX2BID_btmIDX2BID                          0x0080
    ///////////////////////////////////////////////////////////

    typedef struct SIE_IDX2BID {
    ///////////////////////////////////////////////////////////
              SIE_LUT8b                                        ie_frmIDX2BID[16];
    ///////////////////////////////////////////////////////////
              SIE_LUT8b                                        ie_topIDX2BID[16];
    ///////////////////////////////////////////////////////////
              SIE_LUT8b                                        ie_btmIDX2BID[16];
    ///////////////////////////////////////////////////////////
    } SIE_IDX2BID;

    ///////////////////////////////////////////////////////////
     SIGN32 IDX2BID_drvrd(SIE_IDX2BID *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 IDX2BID_drvwr(SIE_IDX2BID *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void IDX2BID_reset(SIE_IDX2BID *p);
     SIGN32 IDX2BID_cmp  (SIE_IDX2BID *p, SIE_IDX2BID *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define IDX2BID_check(p,pie,pfx,hLOG) IDX2BID_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define IDX2BID_print(p,    pfx,hLOG) IDX2BID_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: IDX2BID
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE BID2IDX                                  (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 frmBID2IDX           
///               $LUT8b               frmBID2IDX        REG      [10]
///                                    ###
///                                    * Cast to 8b L0.min.rIDX[34:rBID]
///                                    * Note: field picture use this table (32 rIDX)!
///                                    ###
///     @ 0x00028                      (P)
///     # 0x00028 topBID2IDX           
///               $LUT8b               topBID2IDX        REG      [10]
///                                    ###
///                                    * Cast to 8b L0.min.rIDX[34:rBID]
///                                    ###
///     @ 0x00050                      (P)
///     # 0x00050 btmBID2IDX           
///               $LUT8b               btmBID2IDX        REG      [10]
///                                    ###
///                                    * Cast to 8b L0.min.rIDX[34:rBID]
///                                    * Note: direct mode corner case
///                                    * Alternative method (not used) if not adjust rIDX:
///                                    * rBID = CoL.rBID | (CoL.Frm & Cur.Btm)
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     120B, bits:     960b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_BID2IDX
#define h_BID2IDX (){}

    #define     RA_BID2IDX_frmBID2IDX                          0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_BID2IDX_topBID2IDX                          0x0028
    ///////////////////////////////////////////////////////////
    #define     RA_BID2IDX_btmBID2IDX                          0x0050
    ///////////////////////////////////////////////////////////

    typedef struct SIE_BID2IDX {
    ///////////////////////////////////////////////////////////
              SIE_LUT8b                                        ie_frmBID2IDX[10];
    ///////////////////////////////////////////////////////////
              SIE_LUT8b                                        ie_topBID2IDX[10];
    ///////////////////////////////////////////////////////////
              SIE_LUT8b                                        ie_btmBID2IDX[10];
    ///////////////////////////////////////////////////////////
    } SIE_BID2IDX;

    ///////////////////////////////////////////////////////////
     SIGN32 BID2IDX_drvrd(SIE_BID2IDX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 BID2IDX_drvwr(SIE_BID2IDX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void BID2IDX_reset(SIE_BID2IDX *p);
     SIGN32 BID2IDX_cmp  (SIE_BID2IDX *p, SIE_BID2IDX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define BID2IDX_check(p,pie,pfx,hLOG) BID2IDX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define BID2IDX_print(p,    pfx,hLOG) BID2IDX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: BID2IDX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ASPSET                  biu              (4,4)
///     ###
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 3  type                      
///                                    ###
///                                    * MB type
///                                    ###
///               %unsigned 2  chroma                    
///                                    ###
///                                    * Intra MB only: intra_chroma_pred
///                                    ###
///               %unsigned 1  t8x8                      
///                                    ###
///                                    * 8x8 transform; used by AspInit & residual.
///                                    * End of ASPSET
///                                    ###
///               %%        26         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       6b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ASPSET
#define h_ASPSET (){}

    #define     BA_ASPSET_type                                 0x0000
    #define     B16ASPSET_type                                 0x0000
    #define   LSb32ASPSET_type                                    0
    #define   LSb16ASPSET_type                                    0
    #define       bASPSET_type                                 3
    #define   MSK32ASPSET_type                                    0x00000007

    #define     BA_ASPSET_chroma                               0x0000
    #define     B16ASPSET_chroma                               0x0000
    #define   LSb32ASPSET_chroma                                  3
    #define   LSb16ASPSET_chroma                                  3
    #define       bASPSET_chroma                               2
    #define   MSK32ASPSET_chroma                                  0x00000018

    #define     BA_ASPSET_t8x8                                 0x0000
    #define     B16ASPSET_t8x8                                 0x0000
    #define   LSb32ASPSET_t8x8                                    5
    #define   LSb16ASPSET_t8x8                                    5
    #define       bASPSET_t8x8                                 1
    #define   MSK32ASPSET_t8x8                                    0x00000020
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ASPSET {
    ///////////////////////////////////////////////////////////
    #define   GET32ASPSET_type(r32)                            _BFGET_(r32, 2, 0)
    #define   SET32ASPSET_type(r32,v)                          _BFSET_(r32, 2, 0,v)
    #define   GET16ASPSET_type(r16)                            _BFGET_(r16, 2, 0)
    #define   SET16ASPSET_type(r16,v)                          _BFSET_(r16, 2, 0,v)

    #define   GET32ASPSET_chroma(r32)                          _BFGET_(r32, 4, 3)
    #define   SET32ASPSET_chroma(r32,v)                        _BFSET_(r32, 4, 3,v)
    #define   GET16ASPSET_chroma(r16)                          _BFGET_(r16, 4, 3)
    #define   SET16ASPSET_chroma(r16,v)                        _BFSET_(r16, 4, 3,v)

    #define   GET32ASPSET_t8x8(r32)                            _BFGET_(r32, 5, 5)
    #define   SET32ASPSET_t8x8(r32,v)                          _BFSET_(r32, 5, 5,v)
    #define   GET16ASPSET_t8x8(r16)                            _BFGET_(r16, 5, 5)
    #define   SET16ASPSET_t8x8(r16,v)                          _BFSET_(r16, 5, 5,v)

            UNSG32 u_type                                      :  3;
            UNSG32 u_chroma                                    :  2;
            UNSG32 u_t8x8                                      :  1;
            UNSG32 RSVDx0_b6                                   : 26;
    ///////////////////////////////////////////////////////////
    } SIE_ASPSET;

    ///////////////////////////////////////////////////////////
     SIGN32 ASPSET_drvrd(SIE_ASPSET *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ASPSET_drvwr(SIE_ASPSET *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ASPSET_reset(SIE_ASPSET *p);
     SIGN32 ASPSET_cmp  (SIE_ASPSET *p, SIE_ASPSET *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ASPSET_check(p,pie,pfx,hLOG) ASPSET_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ASPSET_print(p,    pfx,hLOG) ASPSET_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ASPSET
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE IntraPROP                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 3  type                      
///                                    ###
///                                    * See BLK.type above,
///                                    * LUT: IPCM or intraNxN or intra16x16
///                                    ###
///               %unsigned 1  8x8IDX0                   
///                                    ###
///                                    * LUT: 0 (P_8x8ref0)
///                                    ###
///               %unsigned 1  t8x8I                     
///                                    ###
///                                    * LUT: MB.transform8x8 & intraNxN
///                                    ###
///               %unsigned 1  t8x8PB                    
///                                    ###
///                                    * LUT: 0
///                                    ###
///               %unsigned 2  luma16x16                 
///                                    ###
///                                    * LUT: intra 16x16 prediction mode
///                                    ###
///               %unsigned 6  CBP                       
///                                    ###
///                                    * LUT: intra 16x16 coded block pattern
///                                    * MPEG4 LUT: Chroma cbp
///                                    * End of IntraPROP
///                                    ###
///               %%        18         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      14b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_IntraPROP
#define h_IntraPROP (){}

    #define     BA_IntraPROP_type                              0x0000
    #define     B16IntraPROP_type                              0x0000
    #define   LSb32IntraPROP_type                                 0
    #define   LSb16IntraPROP_type                                 0
    #define       bIntraPROP_type                              3
    #define   MSK32IntraPROP_type                                 0x00000007

    #define     BA_IntraPROP_8x8IDX0                           0x0000
    #define     B16IntraPROP_8x8IDX0                           0x0000
    #define   LSb32IntraPROP_8x8IDX0                              3
    #define   LSb16IntraPROP_8x8IDX0                              3
    #define       bIntraPROP_8x8IDX0                           1
    #define   MSK32IntraPROP_8x8IDX0                              0x00000008

    #define     BA_IntraPROP_t8x8I                             0x0000
    #define     B16IntraPROP_t8x8I                             0x0000
    #define   LSb32IntraPROP_t8x8I                                4
    #define   LSb16IntraPROP_t8x8I                                4
    #define       bIntraPROP_t8x8I                             1
    #define   MSK32IntraPROP_t8x8I                                0x00000010

    #define     BA_IntraPROP_t8x8PB                            0x0000
    #define     B16IntraPROP_t8x8PB                            0x0000
    #define   LSb32IntraPROP_t8x8PB                               5
    #define   LSb16IntraPROP_t8x8PB                               5
    #define       bIntraPROP_t8x8PB                            1
    #define   MSK32IntraPROP_t8x8PB                               0x00000020

    #define     BA_IntraPROP_luma16x16                         0x0000
    #define     B16IntraPROP_luma16x16                         0x0000
    #define   LSb32IntraPROP_luma16x16                            6
    #define   LSb16IntraPROP_luma16x16                            6
    #define       bIntraPROP_luma16x16                         2
    #define   MSK32IntraPROP_luma16x16                            0x000000C0

    #define     BA_IntraPROP_CBP                               0x0001
    #define     B16IntraPROP_CBP                               0x0000
    #define   LSb32IntraPROP_CBP                                  8
    #define   LSb16IntraPROP_CBP                                  8
    #define       bIntraPROP_CBP                               6
    #define   MSK32IntraPROP_CBP                                  0x00003F00
    ///////////////////////////////////////////////////////////

    typedef struct SIE_IntraPROP {
    ///////////////////////////////////////////////////////////
    #define   GET32IntraPROP_type(r32)                         _BFGET_(r32, 2, 0)
    #define   SET32IntraPROP_type(r32,v)                       _BFSET_(r32, 2, 0,v)
    #define   GET16IntraPROP_type(r16)                         _BFGET_(r16, 2, 0)
    #define   SET16IntraPROP_type(r16,v)                       _BFSET_(r16, 2, 0,v)

    #define   GET32IntraPROP_8x8IDX0(r32)                      _BFGET_(r32, 3, 3)
    #define   SET32IntraPROP_8x8IDX0(r32,v)                    _BFSET_(r32, 3, 3,v)
    #define   GET16IntraPROP_8x8IDX0(r16)                      _BFGET_(r16, 3, 3)
    #define   SET16IntraPROP_8x8IDX0(r16,v)                    _BFSET_(r16, 3, 3,v)

    #define   GET32IntraPROP_t8x8I(r32)                        _BFGET_(r32, 4, 4)
    #define   SET32IntraPROP_t8x8I(r32,v)                      _BFSET_(r32, 4, 4,v)
    #define   GET16IntraPROP_t8x8I(r16)                        _BFGET_(r16, 4, 4)
    #define   SET16IntraPROP_t8x8I(r16,v)                      _BFSET_(r16, 4, 4,v)

    #define   GET32IntraPROP_t8x8PB(r32)                       _BFGET_(r32, 5, 5)
    #define   SET32IntraPROP_t8x8PB(r32,v)                     _BFSET_(r32, 5, 5,v)
    #define   GET16IntraPROP_t8x8PB(r16)                       _BFGET_(r16, 5, 5)
    #define   SET16IntraPROP_t8x8PB(r16,v)                     _BFSET_(r16, 5, 5,v)

    #define   GET32IntraPROP_luma16x16(r32)                    _BFGET_(r32, 7, 6)
    #define   SET32IntraPROP_luma16x16(r32,v)                  _BFSET_(r32, 7, 6,v)
    #define   GET16IntraPROP_luma16x16(r16)                    _BFGET_(r16, 7, 6)
    #define   SET16IntraPROP_luma16x16(r16,v)                  _BFSET_(r16, 7, 6,v)

    #define   GET32IntraPROP_CBP(r32)                          _BFGET_(r32,13, 8)
    #define   SET32IntraPROP_CBP(r32,v)                        _BFSET_(r32,13, 8,v)
    #define   GET16IntraPROP_CBP(r16)                          _BFGET_(r16,13, 8)
    #define   SET16IntraPROP_CBP(r16,v)                        _BFSET_(r16,13, 8,v)

            UNSG32 u_type                                      :  3;
            UNSG32 u_8x8IDX0                                   :  1;
            UNSG32 u_t8x8I                                     :  1;
            UNSG32 u_t8x8PB                                    :  1;
            UNSG32 u_luma16x16                                 :  2;
            UNSG32 u_CBP                                       :  6;
            UNSG32 RSVDx0_b14                                  : 18;
    ///////////////////////////////////////////////////////////
    } SIE_IntraPROP;

    ///////////////////////////////////////////////////////////
     SIGN32 IntraPROP_drvrd(SIE_IntraPROP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 IntraPROP_drvwr(SIE_IntraPROP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void IntraPROP_reset(SIE_IntraPROP *p);
     SIGN32 IntraPROP_cmp  (SIE_IntraPROP *p, SIE_IntraPROP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define IntraPROP_check(p,pie,pfx,hLOG) IntraPROP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define IntraPROP_print(p,    pfx,hLOG) IntraPROP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: IntraPROP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE InterPROP                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 3  type                      
///                                    ###
///                                    * See MBPROP.type above,
///                                    * LUT: inter or 8x8PB or 8x8IDX0 or direct16x16
///                                    ###
///               %unsigned 1  8x8IDX0                   
///                                    ###
///                                    * LUT: P_8x8ref0
///                                    ###
///               %unsigned 1  t8x8I                     
///                                    ###
///                                    * LUT: 0
///                                    ###
///               %unsigned 1  t8x8PB                    
///                                    ###
///                                    * LUT: MB.transform8x8 & inter &
///                                    * (MB.direct8x8 | !direct16x16)
///                                    ###
///               %unsigned 2  partition                 
///                                    ###
///                                    * See MBPROP.partition above
///                                    ###
///               %unsigned 2  motion_0i                 
///               %unsigned 2  motion_1i                 
///                                    ###
///                                    * LUT: intra/forward/backward/bi, see BLK.motion above
///                                    ###
///               %unsigned 2  mvs_0i                    
///               %unsigned 2  mvs_1i                    
///                                    ###
///                                    * Number of motion vectors for each directions
///                                    * End of InterPROP
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_InterPROP
#define h_InterPROP (){}

    #define     BA_InterPROP_type                              0x0000
    #define     B16InterPROP_type                              0x0000
    #define   LSb32InterPROP_type                                 0
    #define   LSb16InterPROP_type                                 0
    #define       bInterPROP_type                              3
    #define   MSK32InterPROP_type                                 0x00000007

    #define     BA_InterPROP_8x8IDX0                           0x0000
    #define     B16InterPROP_8x8IDX0                           0x0000
    #define   LSb32InterPROP_8x8IDX0                              3
    #define   LSb16InterPROP_8x8IDX0                              3
    #define       bInterPROP_8x8IDX0                           1
    #define   MSK32InterPROP_8x8IDX0                              0x00000008

    #define     BA_InterPROP_t8x8I                             0x0000
    #define     B16InterPROP_t8x8I                             0x0000
    #define   LSb32InterPROP_t8x8I                                4
    #define   LSb16InterPROP_t8x8I                                4
    #define       bInterPROP_t8x8I                             1
    #define   MSK32InterPROP_t8x8I                                0x00000010

    #define     BA_InterPROP_t8x8PB                            0x0000
    #define     B16InterPROP_t8x8PB                            0x0000
    #define   LSb32InterPROP_t8x8PB                               5
    #define   LSb16InterPROP_t8x8PB                               5
    #define       bInterPROP_t8x8PB                            1
    #define   MSK32InterPROP_t8x8PB                               0x00000020

    #define     BA_InterPROP_partition                         0x0000
    #define     B16InterPROP_partition                         0x0000
    #define   LSb32InterPROP_partition                            6
    #define   LSb16InterPROP_partition                            6
    #define       bInterPROP_partition                         2
    #define   MSK32InterPROP_partition                            0x000000C0

    #define     BA_InterPROP_motion_0i                         0x0001
    #define     B16InterPROP_motion_0i                         0x0000
    #define   LSb32InterPROP_motion_0i                            8
    #define   LSb16InterPROP_motion_0i                            8
    #define       bInterPROP_motion_0i                         2
    #define   MSK32InterPROP_motion_0i                            0x00000300

    #define     BA_InterPROP_motion_1i                         0x0001
    #define     B16InterPROP_motion_1i                         0x0000
    #define   LSb32InterPROP_motion_1i                            10
    #define   LSb16InterPROP_motion_1i                            10
    #define       bInterPROP_motion_1i                         2
    #define   MSK32InterPROP_motion_1i                            0x00000C00

    #define     BA_InterPROP_mvs_0i                            0x0001
    #define     B16InterPROP_mvs_0i                            0x0000
    #define   LSb32InterPROP_mvs_0i                               12
    #define   LSb16InterPROP_mvs_0i                               12
    #define       bInterPROP_mvs_0i                            2
    #define   MSK32InterPROP_mvs_0i                               0x00003000

    #define     BA_InterPROP_mvs_1i                            0x0001
    #define     B16InterPROP_mvs_1i                            0x0000
    #define   LSb32InterPROP_mvs_1i                               14
    #define   LSb16InterPROP_mvs_1i                               14
    #define       bInterPROP_mvs_1i                            2
    #define   MSK32InterPROP_mvs_1i                               0x0000C000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_InterPROP {
    ///////////////////////////////////////////////////////////
    #define   GET32InterPROP_type(r32)                         _BFGET_(r32, 2, 0)
    #define   SET32InterPROP_type(r32,v)                       _BFSET_(r32, 2, 0,v)
    #define   GET16InterPROP_type(r16)                         _BFGET_(r16, 2, 0)
    #define   SET16InterPROP_type(r16,v)                       _BFSET_(r16, 2, 0,v)

    #define   GET32InterPROP_8x8IDX0(r32)                      _BFGET_(r32, 3, 3)
    #define   SET32InterPROP_8x8IDX0(r32,v)                    _BFSET_(r32, 3, 3,v)
    #define   GET16InterPROP_8x8IDX0(r16)                      _BFGET_(r16, 3, 3)
    #define   SET16InterPROP_8x8IDX0(r16,v)                    _BFSET_(r16, 3, 3,v)

    #define   GET32InterPROP_t8x8I(r32)                        _BFGET_(r32, 4, 4)
    #define   SET32InterPROP_t8x8I(r32,v)                      _BFSET_(r32, 4, 4,v)
    #define   GET16InterPROP_t8x8I(r16)                        _BFGET_(r16, 4, 4)
    #define   SET16InterPROP_t8x8I(r16,v)                      _BFSET_(r16, 4, 4,v)

    #define   GET32InterPROP_t8x8PB(r32)                       _BFGET_(r32, 5, 5)
    #define   SET32InterPROP_t8x8PB(r32,v)                     _BFSET_(r32, 5, 5,v)
    #define   GET16InterPROP_t8x8PB(r16)                       _BFGET_(r16, 5, 5)
    #define   SET16InterPROP_t8x8PB(r16,v)                     _BFSET_(r16, 5, 5,v)

    #define   GET32InterPROP_partition(r32)                    _BFGET_(r32, 7, 6)
    #define   SET32InterPROP_partition(r32,v)                  _BFSET_(r32, 7, 6,v)
    #define   GET16InterPROP_partition(r16)                    _BFGET_(r16, 7, 6)
    #define   SET16InterPROP_partition(r16,v)                  _BFSET_(r16, 7, 6,v)

    #define   GET32InterPROP_motion_0i(r32)                    _BFGET_(r32, 9, 8)
    #define   SET32InterPROP_motion_0i(r32,v)                  _BFSET_(r32, 9, 8,v)
    #define   GET16InterPROP_motion_0i(r16)                    _BFGET_(r16, 9, 8)
    #define   SET16InterPROP_motion_0i(r16,v)                  _BFSET_(r16, 9, 8,v)

    #define   GET32InterPROP_motion_1i(r32)                    _BFGET_(r32,11,10)
    #define   SET32InterPROP_motion_1i(r32,v)                  _BFSET_(r32,11,10,v)
    #define   GET16InterPROP_motion_1i(r16)                    _BFGET_(r16,11,10)
    #define   SET16InterPROP_motion_1i(r16,v)                  _BFSET_(r16,11,10,v)

    #define   GET32InterPROP_mvs_0i(r32)                       _BFGET_(r32,13,12)
    #define   SET32InterPROP_mvs_0i(r32,v)                     _BFSET_(r32,13,12,v)
    #define   GET16InterPROP_mvs_0i(r16)                       _BFGET_(r16,13,12)
    #define   SET16InterPROP_mvs_0i(r16,v)                     _BFSET_(r16,13,12,v)

    #define   GET32InterPROP_mvs_1i(r32)                       _BFGET_(r32,15,14)
    #define   SET32InterPROP_mvs_1i(r32,v)                     _BFSET_(r32,15,14,v)
    #define   GET16InterPROP_mvs_1i(r16)                       _BFGET_(r16,15,14)
    #define   SET16InterPROP_mvs_1i(r16,v)                     _BFSET_(r16,15,14,v)

            UNSG32 u_type                                      :  3;
            UNSG32 u_8x8IDX0                                   :  1;
            UNSG32 u_t8x8I                                     :  1;
            UNSG32 u_t8x8PB                                    :  1;
            UNSG32 u_partition                                 :  2;
            UNSG32 u_motion_0i                                 :  2;
            UNSG32 u_motion_1i                                 :  2;
            UNSG32 u_mvs_0i                                    :  2;
            UNSG32 u_mvs_1i                                    :  2;
            UNSG32 RSVDx0_b16                                  : 16;
    ///////////////////////////////////////////////////////////
    } SIE_InterPROP;

    ///////////////////////////////////////////////////////////
     SIGN32 InterPROP_drvrd(SIE_InterPROP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 InterPROP_drvwr(SIE_InterPROP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void InterPROP_reset(SIE_InterPROP *p);
     SIGN32 InterPROP_cmp  (SIE_InterPROP *p, SIE_InterPROP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define InterPROP_check(p,pie,pfx,hLOG) InterPROP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define InterPROP_print(p,    pfx,hLOG) InterPROP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: InterPROP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ResPROP_VC1                              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 8  MaxNumCoeff               
///                                    ###
///                                    * Maximal number of coefficients to decode,
///                                    * The valid number is: 16, 32, 63, and 64
///                                    ###
///               %unsigned 3  eBlk                      
///                                    ###
///                                    * 8x8 Block index. 0~3 for Y, 4 for Cb, 5 for Cr
///                                    ###
///               %unsigned 1  IsIntra                   
///                                    ###
///                                    * 1: intra block
///                                    * 0: inter block
///                                    ###
///               %unsigned 2  SubBlkIdx                 
///                                    ###
///                                    * Sub-block index in 8x8 block. Unit is 4x4 regardless of transform type.
///                                    ###
///               %unsigned 2  TransTypeOrIpMode         
///                                    ###
///                                    * For inter block, this field contain transform type information.
///                                    ###
///                                    : TRANS_4x4                 0x0
///                                    : TRANS_4x8                 0x1
///                                    : TRANS_8x4                 0x2
///                                    : TRANS_8x8                 0x3
///                                                 ###
///                                                 * For intra block, this field is intra prediction mode.
///                                                 ###
///                                    : IP_NORMAL                 0x0
///                                    : IP_HORIZONTAL             0x1
///                                    : IP_VERTICAL               0x2
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ResPROP_VC1
#define h_ResPROP_VC1 (){}

    #define     BA_ResPROP_VC1_MaxNumCoeff                     0x0000
    #define     B16ResPROP_VC1_MaxNumCoeff                     0x0000
    #define   LSb32ResPROP_VC1_MaxNumCoeff                        0
    #define   LSb16ResPROP_VC1_MaxNumCoeff                        0
    #define       bResPROP_VC1_MaxNumCoeff                     8
    #define   MSK32ResPROP_VC1_MaxNumCoeff                        0x000000FF

    #define     BA_ResPROP_VC1_eBlk                            0x0001
    #define     B16ResPROP_VC1_eBlk                            0x0000
    #define   LSb32ResPROP_VC1_eBlk                               8
    #define   LSb16ResPROP_VC1_eBlk                               8
    #define       bResPROP_VC1_eBlk                            3
    #define   MSK32ResPROP_VC1_eBlk                               0x00000700

    #define     BA_ResPROP_VC1_IsIntra                         0x0001
    #define     B16ResPROP_VC1_IsIntra                         0x0000
    #define   LSb32ResPROP_VC1_IsIntra                            11
    #define   LSb16ResPROP_VC1_IsIntra                            11
    #define       bResPROP_VC1_IsIntra                         1
    #define   MSK32ResPROP_VC1_IsIntra                            0x00000800

    #define     BA_ResPROP_VC1_SubBlkIdx                       0x0001
    #define     B16ResPROP_VC1_SubBlkIdx                       0x0000
    #define   LSb32ResPROP_VC1_SubBlkIdx                          12
    #define   LSb16ResPROP_VC1_SubBlkIdx                          12
    #define       bResPROP_VC1_SubBlkIdx                       2
    #define   MSK32ResPROP_VC1_SubBlkIdx                          0x00003000

    #define     BA_ResPROP_VC1_TransTypeOrIpMode               0x0001
    #define     B16ResPROP_VC1_TransTypeOrIpMode               0x0000
    #define   LSb32ResPROP_VC1_TransTypeOrIpMode                  14
    #define   LSb16ResPROP_VC1_TransTypeOrIpMode                  14
    #define       bResPROP_VC1_TransTypeOrIpMode               2
    #define   MSK32ResPROP_VC1_TransTypeOrIpMode                  0x0000C000
    #define        ResPROP_VC1_TransTypeOrIpMode_TRANS_4x4                  0x0
    #define        ResPROP_VC1_TransTypeOrIpMode_TRANS_4x8                  0x1
    #define        ResPROP_VC1_TransTypeOrIpMode_TRANS_8x4                  0x2
    #define        ResPROP_VC1_TransTypeOrIpMode_TRANS_8x8                  0x3
    #define        ResPROP_VC1_TransTypeOrIpMode_IP_NORMAL                  0x0
    #define        ResPROP_VC1_TransTypeOrIpMode_IP_HORIZONTAL              0x1
    #define        ResPROP_VC1_TransTypeOrIpMode_IP_VERTICAL                0x2
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ResPROP_VC1 {
    ///////////////////////////////////////////////////////////
    #define   GET32ResPROP_VC1_MaxNumCoeff(r32)                _BFGET_(r32, 7, 0)
    #define   SET32ResPROP_VC1_MaxNumCoeff(r32,v)              _BFSET_(r32, 7, 0,v)
    #define   GET16ResPROP_VC1_MaxNumCoeff(r16)                _BFGET_(r16, 7, 0)
    #define   SET16ResPROP_VC1_MaxNumCoeff(r16,v)              _BFSET_(r16, 7, 0,v)

    #define   GET32ResPROP_VC1_eBlk(r32)                       _BFGET_(r32,10, 8)
    #define   SET32ResPROP_VC1_eBlk(r32,v)                     _BFSET_(r32,10, 8,v)
    #define   GET16ResPROP_VC1_eBlk(r16)                       _BFGET_(r16,10, 8)
    #define   SET16ResPROP_VC1_eBlk(r16,v)                     _BFSET_(r16,10, 8,v)

    #define   GET32ResPROP_VC1_IsIntra(r32)                    _BFGET_(r32,11,11)
    #define   SET32ResPROP_VC1_IsIntra(r32,v)                  _BFSET_(r32,11,11,v)
    #define   GET16ResPROP_VC1_IsIntra(r16)                    _BFGET_(r16,11,11)
    #define   SET16ResPROP_VC1_IsIntra(r16,v)                  _BFSET_(r16,11,11,v)

    #define   GET32ResPROP_VC1_SubBlkIdx(r32)                  _BFGET_(r32,13,12)
    #define   SET32ResPROP_VC1_SubBlkIdx(r32,v)                _BFSET_(r32,13,12,v)
    #define   GET16ResPROP_VC1_SubBlkIdx(r16)                  _BFGET_(r16,13,12)
    #define   SET16ResPROP_VC1_SubBlkIdx(r16,v)                _BFSET_(r16,13,12,v)

    #define   GET32ResPROP_VC1_TransTypeOrIpMode(r32)          _BFGET_(r32,15,14)
    #define   SET32ResPROP_VC1_TransTypeOrIpMode(r32,v)        _BFSET_(r32,15,14,v)
    #define   GET16ResPROP_VC1_TransTypeOrIpMode(r16)          _BFGET_(r16,15,14)
    #define   SET16ResPROP_VC1_TransTypeOrIpMode(r16,v)        _BFSET_(r16,15,14,v)

            UNSG32 u_MaxNumCoeff                               :  8;
            UNSG32 u_eBlk                                      :  3;
            UNSG32 u_IsIntra                                   :  1;
            UNSG32 u_SubBlkIdx                                 :  2;
            UNSG32 u_TransTypeOrIpMode                         :  2;
            UNSG32 RSVDx0_b16                                  : 16;
    ///////////////////////////////////////////////////////////
    } SIE_ResPROP_VC1;

    ///////////////////////////////////////////////////////////
     SIGN32 ResPROP_VC1_drvrd(SIE_ResPROP_VC1 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ResPROP_VC1_drvwr(SIE_ResPROP_VC1 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ResPROP_VC1_reset(SIE_ResPROP_VC1 *p);
     SIGN32 ResPROP_VC1_cmp  (SIE_ResPROP_VC1 *p, SIE_ResPROP_VC1 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ResPROP_VC1_check(p,pie,pfx,hLOG) ResPROP_VC1_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ResPROP_VC1_print(p,    pfx,hLOG) ResPROP_VC1_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ResPROP_VC1
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ResPROP_MPEG2                            (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 1  Intra_MB                  
///                                    : inter                     0x0
///                                    : intra                     0x1
///                                                 ###
///                                                 * Indicate current MB is inter-coded or intra-coded
///                                                 ###
///               %unsigned 1  CC                        
///                                    : luma                      0x0
///                                    : chroma                    0x1
///                                                 ###
///                                                 * Color component (to select VLC table)
///                                                 ###
///               %unsigned 1  intra_vlc_format          
///                                    ###
///                                    * Whether to use intra VLC DC table or inter table
///                                    * End of ResProp_MPEG2
///                                    ###
///               %%        29         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       3b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ResPROP_MPEG2
#define h_ResPROP_MPEG2 (){}

    #define     BA_ResPROP_MPEG2_Intra_MB                      0x0000
    #define     B16ResPROP_MPEG2_Intra_MB                      0x0000
    #define   LSb32ResPROP_MPEG2_Intra_MB                         0
    #define   LSb16ResPROP_MPEG2_Intra_MB                         0
    #define       bResPROP_MPEG2_Intra_MB                      1
    #define   MSK32ResPROP_MPEG2_Intra_MB                         0x00000001
    #define        ResPROP_MPEG2_Intra_MB_inter                             0x0
    #define        ResPROP_MPEG2_Intra_MB_intra                             0x1

    #define     BA_ResPROP_MPEG2_CC                            0x0000
    #define     B16ResPROP_MPEG2_CC                            0x0000
    #define   LSb32ResPROP_MPEG2_CC                               1
    #define   LSb16ResPROP_MPEG2_CC                               1
    #define       bResPROP_MPEG2_CC                            1
    #define   MSK32ResPROP_MPEG2_CC                               0x00000002
    #define        ResPROP_MPEG2_CC_luma                                    0x0
    #define        ResPROP_MPEG2_CC_chroma                                  0x1

    #define     BA_ResPROP_MPEG2_intra_vlc_format              0x0000
    #define     B16ResPROP_MPEG2_intra_vlc_format              0x0000
    #define   LSb32ResPROP_MPEG2_intra_vlc_format                 2
    #define   LSb16ResPROP_MPEG2_intra_vlc_format                 2
    #define       bResPROP_MPEG2_intra_vlc_format              1
    #define   MSK32ResPROP_MPEG2_intra_vlc_format                 0x00000004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ResPROP_MPEG2 {
    ///////////////////////////////////////////////////////////
    #define   GET32ResPROP_MPEG2_Intra_MB(r32)                 _BFGET_(r32, 0, 0)
    #define   SET32ResPROP_MPEG2_Intra_MB(r32,v)               _BFSET_(r32, 0, 0,v)
    #define   GET16ResPROP_MPEG2_Intra_MB(r16)                 _BFGET_(r16, 0, 0)
    #define   SET16ResPROP_MPEG2_Intra_MB(r16,v)               _BFSET_(r16, 0, 0,v)

    #define   GET32ResPROP_MPEG2_CC(r32)                       _BFGET_(r32, 1, 1)
    #define   SET32ResPROP_MPEG2_CC(r32,v)                     _BFSET_(r32, 1, 1,v)
    #define   GET16ResPROP_MPEG2_CC(r16)                       _BFGET_(r16, 1, 1)
    #define   SET16ResPROP_MPEG2_CC(r16,v)                     _BFSET_(r16, 1, 1,v)

    #define   GET32ResPROP_MPEG2_intra_vlc_format(r32)         _BFGET_(r32, 2, 2)
    #define   SET32ResPROP_MPEG2_intra_vlc_format(r32,v)       _BFSET_(r32, 2, 2,v)
    #define   GET16ResPROP_MPEG2_intra_vlc_format(r16)         _BFGET_(r16, 2, 2)
    #define   SET16ResPROP_MPEG2_intra_vlc_format(r16,v)       _BFSET_(r16, 2, 2,v)

            UNSG32 u_Intra_MB                                  :  1;
            UNSG32 u_CC                                        :  1;
            UNSG32 u_intra_vlc_format                          :  1;
            UNSG32 RSVDx0_b3                                   : 29;
    ///////////////////////////////////////////////////////////
    } SIE_ResPROP_MPEG2;

    ///////////////////////////////////////////////////////////
     SIGN32 ResPROP_MPEG2_drvrd(SIE_ResPROP_MPEG2 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ResPROP_MPEG2_drvwr(SIE_ResPROP_MPEG2 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ResPROP_MPEG2_reset(SIE_ResPROP_MPEG2 *p);
     SIGN32 ResPROP_MPEG2_cmp  (SIE_ResPROP_MPEG2 *p, SIE_ResPROP_MPEG2 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ResPROP_MPEG2_check(p,pie,pfx,hLOG) ResPROP_MPEG2_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ResPROP_MPEG2_print(p,    pfx,hLOG) ResPROP_MPEG2_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ResPROP_MPEG2
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ResPROP_MPEG4                            (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 1  Intra_MB                  
///                                    : inter                     0x0
///                                    : intra                     0x1
///                                                 ###
///                                                 * Indicate current MB is inter-coded or intra-coded
///                                                 ###
///               %unsigned 1  CC                        
///                                    : luma                      0x0
///                                    : chroma                    0x1
///                                                 ###
///                                                 * Color component (to select VLC table)
///                                                 ###
///               %unsigned 1  use_intra_dc_vlc          
///                                    ###
///                                    * Whether to use intra VLC DC table or inter table
///                                    ###
///               %unsigned 1  pattern_code              
///                                    ###
///                                    * Indicate whether to encode AC coefficients
///                                    ###
///               %unsigned 2  scan_order                
///                                    : normal                    0x0
///                                    : horizontal                0x1
///                                    : vertical                  0x2
///                                                 ###
///                                                 * Indicate zigzag scan order of 8x8 coefficients
///                                                 * End of ResProp_MPEG4
///                                                 ###
///               %%        26         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       6b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ResPROP_MPEG4
#define h_ResPROP_MPEG4 (){}

    #define     BA_ResPROP_MPEG4_Intra_MB                      0x0000
    #define     B16ResPROP_MPEG4_Intra_MB                      0x0000
    #define   LSb32ResPROP_MPEG4_Intra_MB                         0
    #define   LSb16ResPROP_MPEG4_Intra_MB                         0
    #define       bResPROP_MPEG4_Intra_MB                      1
    #define   MSK32ResPROP_MPEG4_Intra_MB                         0x00000001
    #define        ResPROP_MPEG4_Intra_MB_inter                             0x0
    #define        ResPROP_MPEG4_Intra_MB_intra                             0x1

    #define     BA_ResPROP_MPEG4_CC                            0x0000
    #define     B16ResPROP_MPEG4_CC                            0x0000
    #define   LSb32ResPROP_MPEG4_CC                               1
    #define   LSb16ResPROP_MPEG4_CC                               1
    #define       bResPROP_MPEG4_CC                            1
    #define   MSK32ResPROP_MPEG4_CC                               0x00000002
    #define        ResPROP_MPEG4_CC_luma                                    0x0
    #define        ResPROP_MPEG4_CC_chroma                                  0x1

    #define     BA_ResPROP_MPEG4_use_intra_dc_vlc              0x0000
    #define     B16ResPROP_MPEG4_use_intra_dc_vlc              0x0000
    #define   LSb32ResPROP_MPEG4_use_intra_dc_vlc                 2
    #define   LSb16ResPROP_MPEG4_use_intra_dc_vlc                 2
    #define       bResPROP_MPEG4_use_intra_dc_vlc              1
    #define   MSK32ResPROP_MPEG4_use_intra_dc_vlc                 0x00000004

    #define     BA_ResPROP_MPEG4_pattern_code                  0x0000
    #define     B16ResPROP_MPEG4_pattern_code                  0x0000
    #define   LSb32ResPROP_MPEG4_pattern_code                     3
    #define   LSb16ResPROP_MPEG4_pattern_code                     3
    #define       bResPROP_MPEG4_pattern_code                  1
    #define   MSK32ResPROP_MPEG4_pattern_code                     0x00000008

    #define     BA_ResPROP_MPEG4_scan_order                    0x0000
    #define     B16ResPROP_MPEG4_scan_order                    0x0000
    #define   LSb32ResPROP_MPEG4_scan_order                       4
    #define   LSb16ResPROP_MPEG4_scan_order                       4
    #define       bResPROP_MPEG4_scan_order                    2
    #define   MSK32ResPROP_MPEG4_scan_order                       0x00000030
    #define        ResPROP_MPEG4_scan_order_normal                          0x0
    #define        ResPROP_MPEG4_scan_order_horizontal                      0x1
    #define        ResPROP_MPEG4_scan_order_vertical                        0x2
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ResPROP_MPEG4 {
    ///////////////////////////////////////////////////////////
    #define   GET32ResPROP_MPEG4_Intra_MB(r32)                 _BFGET_(r32, 0, 0)
    #define   SET32ResPROP_MPEG4_Intra_MB(r32,v)               _BFSET_(r32, 0, 0,v)
    #define   GET16ResPROP_MPEG4_Intra_MB(r16)                 _BFGET_(r16, 0, 0)
    #define   SET16ResPROP_MPEG4_Intra_MB(r16,v)               _BFSET_(r16, 0, 0,v)

    #define   GET32ResPROP_MPEG4_CC(r32)                       _BFGET_(r32, 1, 1)
    #define   SET32ResPROP_MPEG4_CC(r32,v)                     _BFSET_(r32, 1, 1,v)
    #define   GET16ResPROP_MPEG4_CC(r16)                       _BFGET_(r16, 1, 1)
    #define   SET16ResPROP_MPEG4_CC(r16,v)                     _BFSET_(r16, 1, 1,v)

    #define   GET32ResPROP_MPEG4_use_intra_dc_vlc(r32)         _BFGET_(r32, 2, 2)
    #define   SET32ResPROP_MPEG4_use_intra_dc_vlc(r32,v)       _BFSET_(r32, 2, 2,v)
    #define   GET16ResPROP_MPEG4_use_intra_dc_vlc(r16)         _BFGET_(r16, 2, 2)
    #define   SET16ResPROP_MPEG4_use_intra_dc_vlc(r16,v)       _BFSET_(r16, 2, 2,v)

    #define   GET32ResPROP_MPEG4_pattern_code(r32)             _BFGET_(r32, 3, 3)
    #define   SET32ResPROP_MPEG4_pattern_code(r32,v)           _BFSET_(r32, 3, 3,v)
    #define   GET16ResPROP_MPEG4_pattern_code(r16)             _BFGET_(r16, 3, 3)
    #define   SET16ResPROP_MPEG4_pattern_code(r16,v)           _BFSET_(r16, 3, 3,v)

    #define   GET32ResPROP_MPEG4_scan_order(r32)               _BFGET_(r32, 5, 4)
    #define   SET32ResPROP_MPEG4_scan_order(r32,v)             _BFSET_(r32, 5, 4,v)
    #define   GET16ResPROP_MPEG4_scan_order(r16)               _BFGET_(r16, 5, 4)
    #define   SET16ResPROP_MPEG4_scan_order(r16,v)             _BFSET_(r16, 5, 4,v)

            UNSG32 u_Intra_MB                                  :  1;
            UNSG32 u_CC                                        :  1;
            UNSG32 u_use_intra_dc_vlc                          :  1;
            UNSG32 u_pattern_code                              :  1;
            UNSG32 u_scan_order                                :  2;
            UNSG32 RSVDx0_b6                                   : 26;
    ///////////////////////////////////////////////////////////
    } SIE_ResPROP_MPEG4;

    ///////////////////////////////////////////////////////////
     SIGN32 ResPROP_MPEG4_drvrd(SIE_ResPROP_MPEG4 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ResPROP_MPEG4_drvwr(SIE_ResPROP_MPEG4 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ResPROP_MPEG4_reset(SIE_ResPROP_MPEG4 *p);
     SIGN32 ResPROP_MPEG4_cmp  (SIE_ResPROP_MPEG4 *p, SIE_ResPROP_MPEG4 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ResPROP_MPEG4_check(p,pie,pfx,hLOG) ResPROP_MPEG4_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ResPROP_MPEG4_print(p,    pfx,hLOG) ResPROP_MPEG4_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ResPROP_MPEG4
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ResPROP_JPEG                             (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 1  DCTblId                   
///                                    : luma                      0x0
///                                    : chroma                    0x1
///                                                 ###
///                                                 * Selects Huffman table used to decode or encode DC coefficients
///                                                 ###
///               %unsigned 1  ACTblId                   
///                                    : luma                      0x0
///                                    : chroma                    0x1
///                                                 ###
///                                                 * Selects Huffman table used to decode or encode AC coefficients
///                                                 * End of ResPROP_JPEG
///                                                 ###
///               %%        30         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       2b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ResPROP_JPEG
#define h_ResPROP_JPEG (){}

    #define     BA_ResPROP_JPEG_DCTblId                        0x0000
    #define     B16ResPROP_JPEG_DCTblId                        0x0000
    #define   LSb32ResPROP_JPEG_DCTblId                           0
    #define   LSb16ResPROP_JPEG_DCTblId                           0
    #define       bResPROP_JPEG_DCTblId                        1
    #define   MSK32ResPROP_JPEG_DCTblId                           0x00000001
    #define        ResPROP_JPEG_DCTblId_luma                                0x0
    #define        ResPROP_JPEG_DCTblId_chroma                              0x1

    #define     BA_ResPROP_JPEG_ACTblId                        0x0000
    #define     B16ResPROP_JPEG_ACTblId                        0x0000
    #define   LSb32ResPROP_JPEG_ACTblId                           1
    #define   LSb16ResPROP_JPEG_ACTblId                           1
    #define       bResPROP_JPEG_ACTblId                        1
    #define   MSK32ResPROP_JPEG_ACTblId                           0x00000002
    #define        ResPROP_JPEG_ACTblId_luma                                0x0
    #define        ResPROP_JPEG_ACTblId_chroma                              0x1
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ResPROP_JPEG {
    ///////////////////////////////////////////////////////////
    #define   GET32ResPROP_JPEG_DCTblId(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32ResPROP_JPEG_DCTblId(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16ResPROP_JPEG_DCTblId(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16ResPROP_JPEG_DCTblId(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32ResPROP_JPEG_ACTblId(r32)                   _BFGET_(r32, 1, 1)
    #define   SET32ResPROP_JPEG_ACTblId(r32,v)                 _BFSET_(r32, 1, 1,v)
    #define   GET16ResPROP_JPEG_ACTblId(r16)                   _BFGET_(r16, 1, 1)
    #define   SET16ResPROP_JPEG_ACTblId(r16,v)                 _BFSET_(r16, 1, 1,v)

            UNSG32 u_DCTblId                                   :  1;
            UNSG32 u_ACTblId                                   :  1;
            UNSG32 RSVDx0_b2                                   : 30;
    ///////////////////////////////////////////////////////////
    } SIE_ResPROP_JPEG;

    ///////////////////////////////////////////////////////////
     SIGN32 ResPROP_JPEG_drvrd(SIE_ResPROP_JPEG *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ResPROP_JPEG_drvwr(SIE_ResPROP_JPEG *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ResPROP_JPEG_reset(SIE_ResPROP_JPEG *p);
     SIGN32 ResPROP_JPEG_cmp  (SIE_ResPROP_JPEG *p, SIE_ResPROP_JPEG *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ResPROP_JPEG_check(p,pie,pfx,hLOG) ResPROP_JPEG_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ResPROP_JPEG_print(p,    pfx,hLOG) ResPROP_JPEG_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ResPROP_JPEG
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TotalCoeff6                              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 5  nc_0i                     
///               %unsigned 5  nc_1i                     
///               %unsigned 5  nc_2i                     
///                                    ###
///                                    * The number of non-zero transform coefficients in a 4x4 Y or UV coefficient block. Totally 3 blocks are in order 0 ~ 2.
///                                    ###
///               %%        1          # Stuffing bits...
///               %unsigned 5  nc1_0i                    
///               %unsigned 5  nc1_1i                    
///               %unsigned 5  nc1_2i                    
///               %%        1          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      30b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TotalCoeff6
#define h_TotalCoeff6 (){}

    #define     BA_TotalCoeff6_nc_0i                           0x0000
    #define     B16TotalCoeff6_nc_0i                           0x0000
    #define   LSb32TotalCoeff6_nc_0i                              0
    #define   LSb16TotalCoeff6_nc_0i                              0
    #define       bTotalCoeff6_nc_0i                           5
    #define   MSK32TotalCoeff6_nc_0i                              0x0000001F

    #define     BA_TotalCoeff6_nc_1i                           0x0000
    #define     B16TotalCoeff6_nc_1i                           0x0000
    #define   LSb32TotalCoeff6_nc_1i                              5
    #define   LSb16TotalCoeff6_nc_1i                              5
    #define       bTotalCoeff6_nc_1i                           5
    #define   MSK32TotalCoeff6_nc_1i                              0x000003E0

    #define     BA_TotalCoeff6_nc_2i                           0x0001
    #define     B16TotalCoeff6_nc_2i                           0x0000
    #define   LSb32TotalCoeff6_nc_2i                              10
    #define   LSb16TotalCoeff6_nc_2i                              10
    #define       bTotalCoeff6_nc_2i                           5
    #define   MSK32TotalCoeff6_nc_2i                              0x00007C00

    #define     BA_TotalCoeff6_nc1_0i                          0x0002
    #define     B16TotalCoeff6_nc1_0i                          0x0002
    #define   LSb32TotalCoeff6_nc1_0i                             16
    #define   LSb16TotalCoeff6_nc1_0i                             0
    #define       bTotalCoeff6_nc1_0i                          5
    #define   MSK32TotalCoeff6_nc1_0i                             0x001F0000

    #define     BA_TotalCoeff6_nc1_1i                          0x0002
    #define     B16TotalCoeff6_nc1_1i                          0x0002
    #define   LSb32TotalCoeff6_nc1_1i                             21
    #define   LSb16TotalCoeff6_nc1_1i                             5
    #define       bTotalCoeff6_nc1_1i                          5
    #define   MSK32TotalCoeff6_nc1_1i                             0x03E00000

    #define     BA_TotalCoeff6_nc1_2i                          0x0003
    #define     B16TotalCoeff6_nc1_2i                          0x0002
    #define   LSb32TotalCoeff6_nc1_2i                             26
    #define   LSb16TotalCoeff6_nc1_2i                             10
    #define       bTotalCoeff6_nc1_2i                          5
    #define   MSK32TotalCoeff6_nc1_2i                             0x7C000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TotalCoeff6 {
    ///////////////////////////////////////////////////////////
    #define   GET32TotalCoeff6_nc_0i(r32)                      _BFGET_(r32, 4, 0)
    #define   SET32TotalCoeff6_nc_0i(r32,v)                    _BFSET_(r32, 4, 0,v)
    #define   GET16TotalCoeff6_nc_0i(r16)                      _BFGET_(r16, 4, 0)
    #define   SET16TotalCoeff6_nc_0i(r16,v)                    _BFSET_(r16, 4, 0,v)

    #define   GET32TotalCoeff6_nc_1i(r32)                      _BFGET_(r32, 9, 5)
    #define   SET32TotalCoeff6_nc_1i(r32,v)                    _BFSET_(r32, 9, 5,v)
    #define   GET16TotalCoeff6_nc_1i(r16)                      _BFGET_(r16, 9, 5)
    #define   SET16TotalCoeff6_nc_1i(r16,v)                    _BFSET_(r16, 9, 5,v)

    #define   GET32TotalCoeff6_nc_2i(r32)                      _BFGET_(r32,14,10)
    #define   SET32TotalCoeff6_nc_2i(r32,v)                    _BFSET_(r32,14,10,v)
    #define   GET16TotalCoeff6_nc_2i(r16)                      _BFGET_(r16,14,10)
    #define   SET16TotalCoeff6_nc_2i(r16,v)                    _BFSET_(r16,14,10,v)

    #define   GET32TotalCoeff6_nc1_0i(r32)                     _BFGET_(r32,20,16)
    #define   SET32TotalCoeff6_nc1_0i(r32,v)                   _BFSET_(r32,20,16,v)
    #define   GET16TotalCoeff6_nc1_0i(r16)                     _BFGET_(r16, 4, 0)
    #define   SET16TotalCoeff6_nc1_0i(r16,v)                   _BFSET_(r16, 4, 0,v)

    #define   GET32TotalCoeff6_nc1_1i(r32)                     _BFGET_(r32,25,21)
    #define   SET32TotalCoeff6_nc1_1i(r32,v)                   _BFSET_(r32,25,21,v)
    #define   GET16TotalCoeff6_nc1_1i(r16)                     _BFGET_(r16, 9, 5)
    #define   SET16TotalCoeff6_nc1_1i(r16,v)                   _BFSET_(r16, 9, 5,v)

    #define   GET32TotalCoeff6_nc1_2i(r32)                     _BFGET_(r32,30,26)
    #define   SET32TotalCoeff6_nc1_2i(r32,v)                   _BFSET_(r32,30,26,v)
    #define   GET16TotalCoeff6_nc1_2i(r16)                     _BFGET_(r16,14,10)
    #define   SET16TotalCoeff6_nc1_2i(r16,v)                   _BFSET_(r16,14,10,v)

            UNSG32 u_nc_0i                                     :  5;
            UNSG32 u_nc_1i                                     :  5;
            UNSG32 u_nc_2i                                     :  5;
            UNSG32 RSVDx0_b15                                  :  1;
            UNSG32 u_nc1_0i                                    :  5;
            UNSG32 u_nc1_1i                                    :  5;
            UNSG32 u_nc1_2i                                    :  5;
            UNSG32 RSVDx0_b31                                  :  1;
    ///////////////////////////////////////////////////////////
    } SIE_TotalCoeff6;

    ///////////////////////////////////////////////////////////
     SIGN32 TotalCoeff6_drvrd(SIE_TotalCoeff6 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TotalCoeff6_drvwr(SIE_TotalCoeff6 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TotalCoeff6_reset(SIE_TotalCoeff6 *p);
     SIGN32 TotalCoeff6_cmp  (SIE_TotalCoeff6 *p, SIE_TotalCoeff6 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TotalCoeff6_check(p,pie,pfx,hLOG) TotalCoeff6_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TotalCoeff6_print(p,    pfx,hLOG) TotalCoeff6_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TotalCoeff6
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ASEPopTotalCoeff                         (4,2)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 TotalCoeff           
///               $TotalCoeff6         TotalCoeff        REG       [2]
///                                    ###
///                                    * The number of non-zero transform coefficients in a 4x4 Y or UV coefficient block in 3 block group. Totally 12 blocks in 4 groups are in order 0 ~ 11.
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      60b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ASEPopTotalCoeff
#define h_ASEPopTotalCoeff (){}

    #define     RA_ASEPopTotalCoeff_TotalCoeff                 0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ASEPopTotalCoeff {
    ///////////////////////////////////////////////////////////
              SIE_TotalCoeff6                                  ie_TotalCoeff[2];
    ///////////////////////////////////////////////////////////
    } SIE_ASEPopTotalCoeff;

    ///////////////////////////////////////////////////////////
     SIGN32 ASEPopTotalCoeff_drvrd(SIE_ASEPopTotalCoeff *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ASEPopTotalCoeff_drvwr(SIE_ASEPopTotalCoeff *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ASEPopTotalCoeff_reset(SIE_ASEPopTotalCoeff *p);
     SIGN32 ASEPopTotalCoeff_cmp  (SIE_ASEPopTotalCoeff *p, SIE_ASEPopTotalCoeff *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ASEPopTotalCoeff_check(p,pie,pfx,hLOG) ASEPopTotalCoeff_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ASEPopTotalCoeff_print(p,    pfx,hLOG) ASEPopTotalCoeff_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ASEPopTotalCoeff
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RF64PIC                 biu              (4,4)
///     ###
///     * RF64 picture-level information for ALU64 extensions; padded to 64b. Used in placed of BIU register for efficiency. Parameters in this interface should only be updated at the slice boundary.
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 3  format                    
///                                    : h264                      0x0
///                                    : wmv                       0x1
///                                                 ###
///                                                 * VC-1 Main Profile
///                                                 ###
///                                    : mpg2                      0x2
///                                    : other                     0x3
///                                    : mpg4                      0x4
///                                    : vc1ap                     0x5
///                                                 ###
///                                                 * VC-1 Advanced Profile
///                                                 ###
///                                    : h263                      0x6
///                                    : avs                       0x7
///                                                 ###
///                                                 * Format of the current video stream
///                                                 ###
///               %unsigned 1  cabac                     
///                                    ###
///                                    * Whether current slice is coded in CABAC
///                                    ###
///               %unsigned 2  picType                   
///                                    : I                         0x0
///                                    : P                         0x1
///                                    : B                         0x2
///                                                 ###
///                                                 * Used by PMV to qualify between P_skip & B_skip
///                                                 ###
///               %unsigned 5  maxL0                     
///                                    ###
///                                    * H264: num_ref_idx_l0_active_minus1
///                                    ###
///               %unsigned 5  maxL1                     
///                                    ###
///                                    * H264: num_ref_idx_l1_active_minus1
///                                    ###
///               %unsigned 1  MbaffPic                  
///                                    ###
///                                    * Whether current picture is Mbaff pic or not; for FOP
///                                    * For VC-1:
///                                    * (~Mbaffpic && ~fieldPic) -> progressive
///                                    * (Mbaffpic && ~fieldPic) -> interlace frame
///                                    ###
///               %unsigned 1  fieldPic                  
///                                    ###
///                                    * Whether current picture is field coded or not; for FOP
///                                    * For VC-1:
///                                    * (~MbaffPic && fieldPic) -> interlace field, one ref;
///                                    * (MbaffPic && fieldPic) -> interlace field, two ref
///                                    ###
///               %unsigned 1  spatialPred               
///                                    ###
///                                    * Spatial direct prediction modee; for dirMV.
///                                    ###
///               %unsigned 1  colPicMbaff               
///                                    ###
///                                    * Whether colocated pic is Mbaff pic or not; for dirMV
///                                    ###
///               %unsigned 1  colPicField               
///                                    ###
///                                    * Whether colocated picture is field pic or not; for dirMV
///                                    ###
///               %unsigned 1  colPicST                  
///                                    ###
///                                    * Co-located picture is a long-term (0) or short-term (1) reference picture; for dirMV.
///                                    ###
///               %signed   5  AC0Offset                 
///                                    ###
///                                    * = slice_alpha_c0_offset_div2<<1, -12 ~ +12, inclusive, even numbers only. For FOP only.
///                                    ###
///               %signed   5  BetaOffset                
///                                    ###
///                                    * = slice_beta_offset_div2<<1, -12 ~ +12, inclusive, even numbers only. For FOP only.
///                                    ###
///     @ 0x00004                      (P)
///               %unsigned 16 dqAcLimit                 
///                                    ###
///                                    * Saturation limit for AC dequantization
///                                    * Also apply for universal dequantization
///                                    ###
///               %unsigned 14 dqDcLimit                 
///                                    ###
///                                    * Saturation limit for DC dequantization
///                                    ###
///               %unsigned 2  mismatch                  
///                                    : none                      0x0
///                                    : mpeg1                     0x1
///                                    : mpeg2                     0x2
///                                                 ###
///                                                 * mismatch control, for AC dequant only
///                                                 ###
///     @ 0x00008                      (P)
///               %unsigned 16 picW                      
///                                    ###
///                                    * Width of current picture; up to 2047
///                                    ###
///               %unsigned 13 picH                      
///                                    ###
///                                    * Height of current picture; up to 2047. For vcMsg only
///                                    ###
///               %unsigned 1  btmFldPic                 
///                                    ###
///                                    * H.264: Current picture is bottom field; for vcMsg. Valid only when fieldPic==1.
///                                    ###
///               %unsigned 2  hint                      
///                                    ###
///                                    * Same as CacheMsg.hint; for vcMsg only
///                                    ###
///     @ 0x0000C                      (P)
///               %unsigned 8  shiftLumaX                
///                                    ###
///                                    * (For vcMsg only) Shift amount lookup table for Luma X direction. 4 entries, 2-bit per entry, indexed by mvx[1:0] in little-endian format
///                                    ###
///               %unsigned 8  shiftLumaY                
///                                    ###
///                                    * (For vcMsg only) Shift amount lookup table for Luma Y direction. 4 entries, 2-bit per entry, indexed by mvy[1:0] in little-endian format
///                                    ###
///               %unsigned 8  shiftChromaX              
///                                    ###
///                                    * (For vcMsg only) Shift amount lookup table for Chroma X direction. 4 entries, 2-bit per entry, indexed by mvx[1:0] in little-endian format
///                                    ###
///               %unsigned 8  shiftChromaY              
///                                    ###
///                                    * (For vcMsg only) Shift amount lookup table for Chroma Y direction. 4 entries, 2-bit per entry, indexed by mvy[1:0] in little-endian format
///                                    ###
///     @ 0x00010                      (P)
///               %unsigned 4  fracTapDiv2Y              
///                                    ###
///                                    * (Tap size / 2) for luma fractional MV interpolation
///                                    ###
///               %unsigned 4  fracTapDiv2C              
///                                    ###
///                                    * (Tap size / 2) for chroma fractional MV interpolation
///                                    ###
///               %unsigned 6  IPCM_QPU                  
///                                    ###
///                                    * QPU for IPCM coded MBs; for H.264 FOP
///                                    ###
///               %unsigned 6  IPCM_QPV                  
///                                    ###
///                                    * QPV for IPCM coded MBs; for H.264 FOP
///                                    ###
///               %unsigned 12 RSVD12                    
///                                    ###
///                                    * padding to 32 bits
///                                    ###
///     @ 0x00014                      (P)
///               %unsigned 5  PQUANT                    
///                                    ###
///                                    * picture-level quantization factor
///                                    ###
///               %unsigned 2  FRFD                      
///                                    ###
///                                    * Forward reference picture distance, 0~3.
///                                    * Used by VC1 for interlace P field PMV, or for interlace B field forward PMV
///                                    ###
///               %unsigned 2  BRFD                      
///                                    ###
///                                    * Backward reference picture distance, 0~3.
///                                    * Used by VC1 for interlace B field backward PMV
///                                    ###
///               %unsigned 1  secondFld                 
///                                    ###
///                                    * Used by PMV for interlace field picture: whether current field is 1st field or 2nd field of display picture
///                                    ###
///               %unsigned 2  mvRange                   
///                                    ###
///                                    * 0~3; used to lookup range_x & range_y for PMV; see VC-1 spec table 75.
///                                    ###
///               %unsigned 1  hybridMvThres             
///                                    ###
///                                    * 0: threshold = 16; 1: threshold = 32
///                                    ###
///               %unsigned 1  firstMbIntra              
///                                    ###
///                                    * 0: first MB or block is inter coded; 1: intra coded; used for VC-1 Fop
///                                    ###
///               %unsigned 1  halfPixel                 
///                                    ###
///                                    * Half pixel flag, for VC-1 PMV interlace field mode.
///                                    ###
///               %unsigned 1  forwRefInterlace          
///                                    ###
///                                    * For VC-1 interlace frame picture in VCMSG extension forward reference is 0: progressive coded; 1: interlace coded
///                                    ###
///               %unsigned 1  backRefInterlace          
///                                    ###
///                                    * For VC-1 interlace frame picture in VCMSG extension backward reference is 0: progressive coded; 1: interlace coded
///                                    ###
///               %unsigned 2  FrmTransACSet             
///                                    ###
///                                    * For VC-1 frame-level transform AC coding set selection (for Cb and Cr block; and inter Y block).
///                                    * Valid values are 0, 1, and 2
///                                    ###
///               %unsigned 2  FrmTransACSet2            
///                                    ###
///                                    * For VC-1 frame-level transform AC table-2 index selection (for I-frame Y block)
///                                    * Valid values are 0, 1, and 2
///                                    ###
///               %unsigned 1  PQIndexGT8                
///                                    ###
///                                    * Indicator to represent whether Picture Quantized Index (PQIndexG8, defined in Table 36 in VC-1 spec) is greater than 8.
///                                    * 0: value of PQIndex is less than or equal to 8
///                                    * 1: value of PQIndex is greater than 8
///                                    ###
///               %unsigned 1  EscapeTBL                 
///                                    ###
///                                    * For VC-1 to select escape table in residual decoding
///                                    ###
///               %unsigned 4  format1                   
///                                    : RV9                       0x0
///                                    : RV8                       0x1
///                                    : vp8                       0x2
///                                    : jpeg                      0x3
///               %unsigned 1  noReorder                 
///                                    ###
///                                    * For ASE, disable coefficient reorder.
///                                    ###
///               %unsigned 1  iplusModeOn               
///                                    ###
///                                    * For ASE, IPLUS mode is on or not.
///                                    ###
///               %unsigned 3  RSVD3                     
///                                    ###
///                                    * padding to 32 bits
///                                    ###
///     @ 0x00018                      (P)
///     # 0x00018 RSVD                 
///               $LUT64b              RSVD              REG       [5]
///                                    ###
///                                    * Reserved for alignment
///                                    ###
///     @ 0x00040                      (P)
///     # 0x00040 rIDX2BID             
///               $IDX2BID             rIDX2BID          REG          
///                                    ###
///                                    * Defined in 'decHal_mbLvl.sxw.txt'
///                                    * End of RF64PIC
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     256B, bits:    2048b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RF64PIC
#define h_RF64PIC (){}

    #define     BA_RF64PIC_format                              0x0000
    #define     B16RF64PIC_format                              0x0000
    #define   LSb32RF64PIC_format                                 0
    #define   LSb16RF64PIC_format                                 0
    #define       bRF64PIC_format                              3
    #define   MSK32RF64PIC_format                                 0x00000007
    #define        RF64PIC_format_h264                                      0x0
    #define        RF64PIC_format_wmv                                       0x1
    #define        RF64PIC_format_mpg2                                      0x2
    #define        RF64PIC_format_other                                     0x3
    #define        RF64PIC_format_mpg4                                      0x4
    #define        RF64PIC_format_vc1ap                                     0x5
    #define        RF64PIC_format_h263                                      0x6
    #define        RF64PIC_format_avs                                       0x7

    #define     BA_RF64PIC_cabac                               0x0000
    #define     B16RF64PIC_cabac                               0x0000
    #define   LSb32RF64PIC_cabac                                  3
    #define   LSb16RF64PIC_cabac                                  3
    #define       bRF64PIC_cabac                               1
    #define   MSK32RF64PIC_cabac                                  0x00000008

    #define     BA_RF64PIC_picType                             0x0000
    #define     B16RF64PIC_picType                             0x0000
    #define   LSb32RF64PIC_picType                                4
    #define   LSb16RF64PIC_picType                                4
    #define       bRF64PIC_picType                             2
    #define   MSK32RF64PIC_picType                                0x00000030
    #define        RF64PIC_picType_I                                        0x0
    #define        RF64PIC_picType_P                                        0x1
    #define        RF64PIC_picType_B                                        0x2

    #define     BA_RF64PIC_maxL0                               0x0000
    #define     B16RF64PIC_maxL0                               0x0000
    #define   LSb32RF64PIC_maxL0                                  6
    #define   LSb16RF64PIC_maxL0                                  6
    #define       bRF64PIC_maxL0                               5
    #define   MSK32RF64PIC_maxL0                                  0x000007C0

    #define     BA_RF64PIC_maxL1                               0x0001
    #define     B16RF64PIC_maxL1                               0x0000
    #define   LSb32RF64PIC_maxL1                                  11
    #define   LSb16RF64PIC_maxL1                                  11
    #define       bRF64PIC_maxL1                               5
    #define   MSK32RF64PIC_maxL1                                  0x0000F800

    #define     BA_RF64PIC_MbaffPic                            0x0002
    #define     B16RF64PIC_MbaffPic                            0x0002
    #define   LSb32RF64PIC_MbaffPic                               16
    #define   LSb16RF64PIC_MbaffPic                               0
    #define       bRF64PIC_MbaffPic                            1
    #define   MSK32RF64PIC_MbaffPic                               0x00010000

    #define     BA_RF64PIC_fieldPic                            0x0002
    #define     B16RF64PIC_fieldPic                            0x0002
    #define   LSb32RF64PIC_fieldPic                               17
    #define   LSb16RF64PIC_fieldPic                               1
    #define       bRF64PIC_fieldPic                            1
    #define   MSK32RF64PIC_fieldPic                               0x00020000

    #define     BA_RF64PIC_spatialPred                         0x0002
    #define     B16RF64PIC_spatialPred                         0x0002
    #define   LSb32RF64PIC_spatialPred                            18
    #define   LSb16RF64PIC_spatialPred                            2
    #define       bRF64PIC_spatialPred                         1
    #define   MSK32RF64PIC_spatialPred                            0x00040000

    #define     BA_RF64PIC_colPicMbaff                         0x0002
    #define     B16RF64PIC_colPicMbaff                         0x0002
    #define   LSb32RF64PIC_colPicMbaff                            19
    #define   LSb16RF64PIC_colPicMbaff                            3
    #define       bRF64PIC_colPicMbaff                         1
    #define   MSK32RF64PIC_colPicMbaff                            0x00080000

    #define     BA_RF64PIC_colPicField                         0x0002
    #define     B16RF64PIC_colPicField                         0x0002
    #define   LSb32RF64PIC_colPicField                            20
    #define   LSb16RF64PIC_colPicField                            4
    #define       bRF64PIC_colPicField                         1
    #define   MSK32RF64PIC_colPicField                            0x00100000

    #define     BA_RF64PIC_colPicST                            0x0002
    #define     B16RF64PIC_colPicST                            0x0002
    #define   LSb32RF64PIC_colPicST                               21
    #define   LSb16RF64PIC_colPicST                               5
    #define       bRF64PIC_colPicST                            1
    #define   MSK32RF64PIC_colPicST                               0x00200000

    #define     BA_RF64PIC_AC0Offset                           0x0002
    #define     B16RF64PIC_AC0Offset                           0x0002
    #define   LSb32RF64PIC_AC0Offset                              22
    #define   LSb16RF64PIC_AC0Offset                              6
    #define       bRF64PIC_AC0Offset                           5
    #define   MSK32RF64PIC_AC0Offset                              0x07C00000

    #define     BA_RF64PIC_BetaOffset                          0x0003
    #define     B16RF64PIC_BetaOffset                          0x0002
    #define   LSb32RF64PIC_BetaOffset                             27
    #define   LSb16RF64PIC_BetaOffset                             11
    #define       bRF64PIC_BetaOffset                          5
    #define   MSK32RF64PIC_BetaOffset                             0xF8000000
    ///////////////////////////////////////////////////////////

    #define     BA_RF64PIC_dqAcLimit                           0x0004
    #define     B16RF64PIC_dqAcLimit                           0x0004
    #define   LSb32RF64PIC_dqAcLimit                              0
    #define   LSb16RF64PIC_dqAcLimit                              0
    #define       bRF64PIC_dqAcLimit                           16
    #define   MSK32RF64PIC_dqAcLimit                              0x0000FFFF

    #define     BA_RF64PIC_dqDcLimit                           0x0006
    #define     B16RF64PIC_dqDcLimit                           0x0006
    #define   LSb32RF64PIC_dqDcLimit                              16
    #define   LSb16RF64PIC_dqDcLimit                              0
    #define       bRF64PIC_dqDcLimit                           14
    #define   MSK32RF64PIC_dqDcLimit                              0x3FFF0000

    #define     BA_RF64PIC_mismatch                            0x0007
    #define     B16RF64PIC_mismatch                            0x0006
    #define   LSb32RF64PIC_mismatch                               30
    #define   LSb16RF64PIC_mismatch                               14
    #define       bRF64PIC_mismatch                            2
    #define   MSK32RF64PIC_mismatch                               0xC0000000
    #define        RF64PIC_mismatch_none                                    0x0
    #define        RF64PIC_mismatch_mpeg1                                   0x1
    #define        RF64PIC_mismatch_mpeg2                                   0x2
    ///////////////////////////////////////////////////////////

    #define     BA_RF64PIC_picW                                0x0008
    #define     B16RF64PIC_picW                                0x0008
    #define   LSb32RF64PIC_picW                                   0
    #define   LSb16RF64PIC_picW                                   0
    #define       bRF64PIC_picW                                16
    #define   MSK32RF64PIC_picW                                   0x0000FFFF

    #define     BA_RF64PIC_picH                                0x000A
    #define     B16RF64PIC_picH                                0x000A
    #define   LSb32RF64PIC_picH                                   16
    #define   LSb16RF64PIC_picH                                   0
    #define       bRF64PIC_picH                                13
    #define   MSK32RF64PIC_picH                                   0x1FFF0000

    #define     BA_RF64PIC_btmFldPic                           0x000B
    #define     B16RF64PIC_btmFldPic                           0x000A
    #define   LSb32RF64PIC_btmFldPic                              29
    #define   LSb16RF64PIC_btmFldPic                              13
    #define       bRF64PIC_btmFldPic                           1
    #define   MSK32RF64PIC_btmFldPic                              0x20000000

    #define     BA_RF64PIC_hint                                0x000B
    #define     B16RF64PIC_hint                                0x000A
    #define   LSb32RF64PIC_hint                                   30
    #define   LSb16RF64PIC_hint                                   14
    #define       bRF64PIC_hint                                2
    #define   MSK32RF64PIC_hint                                   0xC0000000
    ///////////////////////////////////////////////////////////

    #define     BA_RF64PIC_shiftLumaX                          0x000C
    #define     B16RF64PIC_shiftLumaX                          0x000C
    #define   LSb32RF64PIC_shiftLumaX                             0
    #define   LSb16RF64PIC_shiftLumaX                             0
    #define       bRF64PIC_shiftLumaX                          8
    #define   MSK32RF64PIC_shiftLumaX                             0x000000FF

    #define     BA_RF64PIC_shiftLumaY                          0x000D
    #define     B16RF64PIC_shiftLumaY                          0x000C
    #define   LSb32RF64PIC_shiftLumaY                             8
    #define   LSb16RF64PIC_shiftLumaY                             8
    #define       bRF64PIC_shiftLumaY                          8
    #define   MSK32RF64PIC_shiftLumaY                             0x0000FF00

    #define     BA_RF64PIC_shiftChromaX                        0x000E
    #define     B16RF64PIC_shiftChromaX                        0x000E
    #define   LSb32RF64PIC_shiftChromaX                           16
    #define   LSb16RF64PIC_shiftChromaX                           0
    #define       bRF64PIC_shiftChromaX                        8
    #define   MSK32RF64PIC_shiftChromaX                           0x00FF0000

    #define     BA_RF64PIC_shiftChromaY                        0x000F
    #define     B16RF64PIC_shiftChromaY                        0x000E
    #define   LSb32RF64PIC_shiftChromaY                           24
    #define   LSb16RF64PIC_shiftChromaY                           8
    #define       bRF64PIC_shiftChromaY                        8
    #define   MSK32RF64PIC_shiftChromaY                           0xFF000000
    ///////////////////////////////////////////////////////////

    #define     BA_RF64PIC_fracTapDiv2Y                        0x0010
    #define     B16RF64PIC_fracTapDiv2Y                        0x0010
    #define   LSb32RF64PIC_fracTapDiv2Y                           0
    #define   LSb16RF64PIC_fracTapDiv2Y                           0
    #define       bRF64PIC_fracTapDiv2Y                        4
    #define   MSK32RF64PIC_fracTapDiv2Y                           0x0000000F

    #define     BA_RF64PIC_fracTapDiv2C                        0x0010
    #define     B16RF64PIC_fracTapDiv2C                        0x0010
    #define   LSb32RF64PIC_fracTapDiv2C                           4
    #define   LSb16RF64PIC_fracTapDiv2C                           4
    #define       bRF64PIC_fracTapDiv2C                        4
    #define   MSK32RF64PIC_fracTapDiv2C                           0x000000F0

    #define     BA_RF64PIC_IPCM_QPU                            0x0011
    #define     B16RF64PIC_IPCM_QPU                            0x0010
    #define   LSb32RF64PIC_IPCM_QPU                               8
    #define   LSb16RF64PIC_IPCM_QPU                               8
    #define       bRF64PIC_IPCM_QPU                            6
    #define   MSK32RF64PIC_IPCM_QPU                               0x00003F00

    #define     BA_RF64PIC_IPCM_QPV                            0x0011
    #define     B16RF64PIC_IPCM_QPV                            0x0010
    #define   LSb32RF64PIC_IPCM_QPV                               14
    #define   LSb16RF64PIC_IPCM_QPV                               14
    #define       bRF64PIC_IPCM_QPV                            6
    #define   MSK32RF64PIC_IPCM_QPV                               0x000FC000

    #define     BA_RF64PIC_RSVD12                              0x0012
    #define     B16RF64PIC_RSVD12                              0x0012
    #define   LSb32RF64PIC_RSVD12                                 20
    #define   LSb16RF64PIC_RSVD12                                 4
    #define       bRF64PIC_RSVD12                              12
    #define   MSK32RF64PIC_RSVD12                                 0xFFF00000
    ///////////////////////////////////////////////////////////

    #define     BA_RF64PIC_PQUANT                              0x0014
    #define     B16RF64PIC_PQUANT                              0x0014
    #define   LSb32RF64PIC_PQUANT                                 0
    #define   LSb16RF64PIC_PQUANT                                 0
    #define       bRF64PIC_PQUANT                              5
    #define   MSK32RF64PIC_PQUANT                                 0x0000001F

    #define     BA_RF64PIC_FRFD                                0x0014
    #define     B16RF64PIC_FRFD                                0x0014
    #define   LSb32RF64PIC_FRFD                                   5
    #define   LSb16RF64PIC_FRFD                                   5
    #define       bRF64PIC_FRFD                                2
    #define   MSK32RF64PIC_FRFD                                   0x00000060

    #define     BA_RF64PIC_BRFD                                0x0014
    #define     B16RF64PIC_BRFD                                0x0014
    #define   LSb32RF64PIC_BRFD                                   7
    #define   LSb16RF64PIC_BRFD                                   7
    #define       bRF64PIC_BRFD                                2
    #define   MSK32RF64PIC_BRFD                                   0x00000180

    #define     BA_RF64PIC_secondFld                           0x0015
    #define     B16RF64PIC_secondFld                           0x0014
    #define   LSb32RF64PIC_secondFld                              9
    #define   LSb16RF64PIC_secondFld                              9
    #define       bRF64PIC_secondFld                           1
    #define   MSK32RF64PIC_secondFld                              0x00000200

    #define     BA_RF64PIC_mvRange                             0x0015
    #define     B16RF64PIC_mvRange                             0x0014
    #define   LSb32RF64PIC_mvRange                                10
    #define   LSb16RF64PIC_mvRange                                10
    #define       bRF64PIC_mvRange                             2
    #define   MSK32RF64PIC_mvRange                                0x00000C00

    #define     BA_RF64PIC_hybridMvThres                       0x0015
    #define     B16RF64PIC_hybridMvThres                       0x0014
    #define   LSb32RF64PIC_hybridMvThres                          12
    #define   LSb16RF64PIC_hybridMvThres                          12
    #define       bRF64PIC_hybridMvThres                       1
    #define   MSK32RF64PIC_hybridMvThres                          0x00001000

    #define     BA_RF64PIC_firstMbIntra                        0x0015
    #define     B16RF64PIC_firstMbIntra                        0x0014
    #define   LSb32RF64PIC_firstMbIntra                           13
    #define   LSb16RF64PIC_firstMbIntra                           13
    #define       bRF64PIC_firstMbIntra                        1
    #define   MSK32RF64PIC_firstMbIntra                           0x00002000

    #define     BA_RF64PIC_halfPixel                           0x0015
    #define     B16RF64PIC_halfPixel                           0x0014
    #define   LSb32RF64PIC_halfPixel                              14
    #define   LSb16RF64PIC_halfPixel                              14
    #define       bRF64PIC_halfPixel                           1
    #define   MSK32RF64PIC_halfPixel                              0x00004000

    #define     BA_RF64PIC_forwRefInterlace                    0x0015
    #define     B16RF64PIC_forwRefInterlace                    0x0014
    #define   LSb32RF64PIC_forwRefInterlace                       15
    #define   LSb16RF64PIC_forwRefInterlace                       15
    #define       bRF64PIC_forwRefInterlace                    1
    #define   MSK32RF64PIC_forwRefInterlace                       0x00008000

    #define     BA_RF64PIC_backRefInterlace                    0x0016
    #define     B16RF64PIC_backRefInterlace                    0x0016
    #define   LSb32RF64PIC_backRefInterlace                       16
    #define   LSb16RF64PIC_backRefInterlace                       0
    #define       bRF64PIC_backRefInterlace                    1
    #define   MSK32RF64PIC_backRefInterlace                       0x00010000

    #define     BA_RF64PIC_FrmTransACSet                       0x0016
    #define     B16RF64PIC_FrmTransACSet                       0x0016
    #define   LSb32RF64PIC_FrmTransACSet                          17
    #define   LSb16RF64PIC_FrmTransACSet                          1
    #define       bRF64PIC_FrmTransACSet                       2
    #define   MSK32RF64PIC_FrmTransACSet                          0x00060000

    #define     BA_RF64PIC_FrmTransACSet2                      0x0016
    #define     B16RF64PIC_FrmTransACSet2                      0x0016
    #define   LSb32RF64PIC_FrmTransACSet2                         19
    #define   LSb16RF64PIC_FrmTransACSet2                         3
    #define       bRF64PIC_FrmTransACSet2                      2
    #define   MSK32RF64PIC_FrmTransACSet2                         0x00180000

    #define     BA_RF64PIC_PQIndexGT8                          0x0016
    #define     B16RF64PIC_PQIndexGT8                          0x0016
    #define   LSb32RF64PIC_PQIndexGT8                             21
    #define   LSb16RF64PIC_PQIndexGT8                             5
    #define       bRF64PIC_PQIndexGT8                          1
    #define   MSK32RF64PIC_PQIndexGT8                             0x00200000

    #define     BA_RF64PIC_EscapeTBL                           0x0016
    #define     B16RF64PIC_EscapeTBL                           0x0016
    #define   LSb32RF64PIC_EscapeTBL                              22
    #define   LSb16RF64PIC_EscapeTBL                              6
    #define       bRF64PIC_EscapeTBL                           1
    #define   MSK32RF64PIC_EscapeTBL                              0x00400000

    #define     BA_RF64PIC_format1                             0x0016
    #define     B16RF64PIC_format1                             0x0016
    #define   LSb32RF64PIC_format1                                23
    #define   LSb16RF64PIC_format1                                7
    #define       bRF64PIC_format1                             4
    #define   MSK32RF64PIC_format1                                0x07800000
    #define        RF64PIC_format1_RV9                                      0x0
    #define        RF64PIC_format1_RV8                                      0x1
    #define        RF64PIC_format1_vp8                                      0x2
    #define        RF64PIC_format1_jpeg                                     0x3

    #define     BA_RF64PIC_noReorder                           0x0017
    #define     B16RF64PIC_noReorder                           0x0016
    #define   LSb32RF64PIC_noReorder                              27
    #define   LSb16RF64PIC_noReorder                              11
    #define       bRF64PIC_noReorder                           1
    #define   MSK32RF64PIC_noReorder                              0x08000000

    #define     BA_RF64PIC_iplusModeOn                         0x0017
    #define     B16RF64PIC_iplusModeOn                         0x0016
    #define   LSb32RF64PIC_iplusModeOn                            28
    #define   LSb16RF64PIC_iplusModeOn                            12
    #define       bRF64PIC_iplusModeOn                         1
    #define   MSK32RF64PIC_iplusModeOn                            0x10000000

    #define     BA_RF64PIC_RSVD3                               0x0017
    #define     B16RF64PIC_RSVD3                               0x0016
    #define   LSb32RF64PIC_RSVD3                                  29
    #define   LSb16RF64PIC_RSVD3                                  13
    #define       bRF64PIC_RSVD3                               3
    #define   MSK32RF64PIC_RSVD3                                  0xE0000000
    ///////////////////////////////////////////////////////////
    #define     RA_RF64PIC_RSVD                                0x0018
    ///////////////////////////////////////////////////////////
    #define     RA_RF64PIC_rIDX2BID                            0x0040
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RF64PIC {
    ///////////////////////////////////////////////////////////
    #define   GET32RF64PIC_format(r32)                         _BFGET_(r32, 2, 0)
    #define   SET32RF64PIC_format(r32,v)                       _BFSET_(r32, 2, 0,v)
    #define   GET16RF64PIC_format(r16)                         _BFGET_(r16, 2, 0)
    #define   SET16RF64PIC_format(r16,v)                       _BFSET_(r16, 2, 0,v)

    #define   GET32RF64PIC_cabac(r32)                          _BFGET_(r32, 3, 3)
    #define   SET32RF64PIC_cabac(r32,v)                        _BFSET_(r32, 3, 3,v)
    #define   GET16RF64PIC_cabac(r16)                          _BFGET_(r16, 3, 3)
    #define   SET16RF64PIC_cabac(r16,v)                        _BFSET_(r16, 3, 3,v)

    #define   GET32RF64PIC_picType(r32)                        _BFGET_(r32, 5, 4)
    #define   SET32RF64PIC_picType(r32,v)                      _BFSET_(r32, 5, 4,v)
    #define   GET16RF64PIC_picType(r16)                        _BFGET_(r16, 5, 4)
    #define   SET16RF64PIC_picType(r16,v)                      _BFSET_(r16, 5, 4,v)

    #define   GET32RF64PIC_maxL0(r32)                          _BFGET_(r32,10, 6)
    #define   SET32RF64PIC_maxL0(r32,v)                        _BFSET_(r32,10, 6,v)
    #define   GET16RF64PIC_maxL0(r16)                          _BFGET_(r16,10, 6)
    #define   SET16RF64PIC_maxL0(r16,v)                        _BFSET_(r16,10, 6,v)

    #define   GET32RF64PIC_maxL1(r32)                          _BFGET_(r32,15,11)
    #define   SET32RF64PIC_maxL1(r32,v)                        _BFSET_(r32,15,11,v)
    #define   GET16RF64PIC_maxL1(r16)                          _BFGET_(r16,15,11)
    #define   SET16RF64PIC_maxL1(r16,v)                        _BFSET_(r16,15,11,v)

    #define   GET32RF64PIC_MbaffPic(r32)                       _BFGET_(r32,16,16)
    #define   SET32RF64PIC_MbaffPic(r32,v)                     _BFSET_(r32,16,16,v)
    #define   GET16RF64PIC_MbaffPic(r16)                       _BFGET_(r16, 0, 0)
    #define   SET16RF64PIC_MbaffPic(r16,v)                     _BFSET_(r16, 0, 0,v)

    #define   GET32RF64PIC_fieldPic(r32)                       _BFGET_(r32,17,17)
    #define   SET32RF64PIC_fieldPic(r32,v)                     _BFSET_(r32,17,17,v)
    #define   GET16RF64PIC_fieldPic(r16)                       _BFGET_(r16, 1, 1)
    #define   SET16RF64PIC_fieldPic(r16,v)                     _BFSET_(r16, 1, 1,v)

    #define   GET32RF64PIC_spatialPred(r32)                    _BFGET_(r32,18,18)
    #define   SET32RF64PIC_spatialPred(r32,v)                  _BFSET_(r32,18,18,v)
    #define   GET16RF64PIC_spatialPred(r16)                    _BFGET_(r16, 2, 2)
    #define   SET16RF64PIC_spatialPred(r16,v)                  _BFSET_(r16, 2, 2,v)

    #define   GET32RF64PIC_colPicMbaff(r32)                    _BFGET_(r32,19,19)
    #define   SET32RF64PIC_colPicMbaff(r32,v)                  _BFSET_(r32,19,19,v)
    #define   GET16RF64PIC_colPicMbaff(r16)                    _BFGET_(r16, 3, 3)
    #define   SET16RF64PIC_colPicMbaff(r16,v)                  _BFSET_(r16, 3, 3,v)

    #define   GET32RF64PIC_colPicField(r32)                    _BFGET_(r32,20,20)
    #define   SET32RF64PIC_colPicField(r32,v)                  _BFSET_(r32,20,20,v)
    #define   GET16RF64PIC_colPicField(r16)                    _BFGET_(r16, 4, 4)
    #define   SET16RF64PIC_colPicField(r16,v)                  _BFSET_(r16, 4, 4,v)

    #define   GET32RF64PIC_colPicST(r32)                       _BFGET_(r32,21,21)
    #define   SET32RF64PIC_colPicST(r32,v)                     _BFSET_(r32,21,21,v)
    #define   GET16RF64PIC_colPicST(r16)                       _BFGET_(r16, 5, 5)
    #define   SET16RF64PIC_colPicST(r16,v)                     _BFSET_(r16, 5, 5,v)

    #define   GET32RF64PIC_AC0Offset(r32)                      _BFGET_(r32,26,22)
    #define   SET32RF64PIC_AC0Offset(r32,v)                    _BFSET_(r32,26,22,v)
    #define   GET16RF64PIC_AC0Offset(r16)                      _BFGET_(r16,10, 6)
    #define   SET16RF64PIC_AC0Offset(r16,v)                    _BFSET_(r16,10, 6,v)

    #define   GET32RF64PIC_BetaOffset(r32)                     _BFGET_(r32,31,27)
    #define   SET32RF64PIC_BetaOffset(r32,v)                   _BFSET_(r32,31,27,v)
    #define   GET16RF64PIC_BetaOffset(r16)                     _BFGET_(r16,15,11)
    #define   SET16RF64PIC_BetaOffset(r16,v)                   _BFSET_(r16,15,11,v)

            UNSG32 u_format                                    :  3;
            UNSG32 u_cabac                                     :  1;
            UNSG32 u_picType                                   :  2;
            UNSG32 u_maxL0                                     :  5;
            UNSG32 u_maxL1                                     :  5;
            UNSG32 u_MbaffPic                                  :  1;
            UNSG32 u_fieldPic                                  :  1;
            UNSG32 u_spatialPred                               :  1;
            UNSG32 u_colPicMbaff                               :  1;
            UNSG32 u_colPicField                               :  1;
            UNSG32 u_colPicST                                  :  1;
            UNSG32 s_AC0Offset                                 :  5;
            UNSG32 s_BetaOffset                                :  5;
    ///////////////////////////////////////////////////////////
    #define   GET32RF64PIC_dqAcLimit(r32)                      _BFGET_(r32,15, 0)
    #define   SET32RF64PIC_dqAcLimit(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16RF64PIC_dqAcLimit(r16)                      _BFGET_(r16,15, 0)
    #define   SET16RF64PIC_dqAcLimit(r16,v)                    _BFSET_(r16,15, 0,v)

    #define   GET32RF64PIC_dqDcLimit(r32)                      _BFGET_(r32,29,16)
    #define   SET32RF64PIC_dqDcLimit(r32,v)                    _BFSET_(r32,29,16,v)
    #define   GET16RF64PIC_dqDcLimit(r16)                      _BFGET_(r16,13, 0)
    #define   SET16RF64PIC_dqDcLimit(r16,v)                    _BFSET_(r16,13, 0,v)

    #define   GET32RF64PIC_mismatch(r32)                       _BFGET_(r32,31,30)
    #define   SET32RF64PIC_mismatch(r32,v)                     _BFSET_(r32,31,30,v)
    #define   GET16RF64PIC_mismatch(r16)                       _BFGET_(r16,15,14)
    #define   SET16RF64PIC_mismatch(r16,v)                     _BFSET_(r16,15,14,v)

            UNSG32 u_dqAcLimit                                 : 16;
            UNSG32 u_dqDcLimit                                 : 14;
            UNSG32 u_mismatch                                  :  2;
    ///////////////////////////////////////////////////////////
    #define   GET32RF64PIC_picW(r32)                           _BFGET_(r32,15, 0)
    #define   SET32RF64PIC_picW(r32,v)                         _BFSET_(r32,15, 0,v)
    #define   GET16RF64PIC_picW(r16)                           _BFGET_(r16,15, 0)
    #define   SET16RF64PIC_picW(r16,v)                         _BFSET_(r16,15, 0,v)

    #define   GET32RF64PIC_picH(r32)                           _BFGET_(r32,28,16)
    #define   SET32RF64PIC_picH(r32,v)                         _BFSET_(r32,28,16,v)
    #define   GET16RF64PIC_picH(r16)                           _BFGET_(r16,12, 0)
    #define   SET16RF64PIC_picH(r16,v)                         _BFSET_(r16,12, 0,v)

    #define   GET32RF64PIC_btmFldPic(r32)                      _BFGET_(r32,29,29)
    #define   SET32RF64PIC_btmFldPic(r32,v)                    _BFSET_(r32,29,29,v)
    #define   GET16RF64PIC_btmFldPic(r16)                      _BFGET_(r16,13,13)
    #define   SET16RF64PIC_btmFldPic(r16,v)                    _BFSET_(r16,13,13,v)

    #define   GET32RF64PIC_hint(r32)                           _BFGET_(r32,31,30)
    #define   SET32RF64PIC_hint(r32,v)                         _BFSET_(r32,31,30,v)
    #define   GET16RF64PIC_hint(r16)                           _BFGET_(r16,15,14)
    #define   SET16RF64PIC_hint(r16,v)                         _BFSET_(r16,15,14,v)

            UNSG32 u_picW                                      : 16;
            UNSG32 u_picH                                      : 13;
            UNSG32 u_btmFldPic                                 :  1;
            UNSG32 u_hint                                      :  2;
    ///////////////////////////////////////////////////////////
    #define   GET32RF64PIC_shiftLumaX(r32)                     _BFGET_(r32, 7, 0)
    #define   SET32RF64PIC_shiftLumaX(r32,v)                   _BFSET_(r32, 7, 0,v)
    #define   GET16RF64PIC_shiftLumaX(r16)                     _BFGET_(r16, 7, 0)
    #define   SET16RF64PIC_shiftLumaX(r16,v)                   _BFSET_(r16, 7, 0,v)

    #define   GET32RF64PIC_shiftLumaY(r32)                     _BFGET_(r32,15, 8)
    #define   SET32RF64PIC_shiftLumaY(r32,v)                   _BFSET_(r32,15, 8,v)
    #define   GET16RF64PIC_shiftLumaY(r16)                     _BFGET_(r16,15, 8)
    #define   SET16RF64PIC_shiftLumaY(r16,v)                   _BFSET_(r16,15, 8,v)

    #define   GET32RF64PIC_shiftChromaX(r32)                   _BFGET_(r32,23,16)
    #define   SET32RF64PIC_shiftChromaX(r32,v)                 _BFSET_(r32,23,16,v)
    #define   GET16RF64PIC_shiftChromaX(r16)                   _BFGET_(r16, 7, 0)
    #define   SET16RF64PIC_shiftChromaX(r16,v)                 _BFSET_(r16, 7, 0,v)

    #define   GET32RF64PIC_shiftChromaY(r32)                   _BFGET_(r32,31,24)
    #define   SET32RF64PIC_shiftChromaY(r32,v)                 _BFSET_(r32,31,24,v)
    #define   GET16RF64PIC_shiftChromaY(r16)                   _BFGET_(r16,15, 8)
    #define   SET16RF64PIC_shiftChromaY(r16,v)                 _BFSET_(r16,15, 8,v)

            UNSG32 u_shiftLumaX                                :  8;
            UNSG32 u_shiftLumaY                                :  8;
            UNSG32 u_shiftChromaX                              :  8;
            UNSG32 u_shiftChromaY                              :  8;
    ///////////////////////////////////////////////////////////
    #define   GET32RF64PIC_fracTapDiv2Y(r32)                   _BFGET_(r32, 3, 0)
    #define   SET32RF64PIC_fracTapDiv2Y(r32,v)                 _BFSET_(r32, 3, 0,v)
    #define   GET16RF64PIC_fracTapDiv2Y(r16)                   _BFGET_(r16, 3, 0)
    #define   SET16RF64PIC_fracTapDiv2Y(r16,v)                 _BFSET_(r16, 3, 0,v)

    #define   GET32RF64PIC_fracTapDiv2C(r32)                   _BFGET_(r32, 7, 4)
    #define   SET32RF64PIC_fracTapDiv2C(r32,v)                 _BFSET_(r32, 7, 4,v)
    #define   GET16RF64PIC_fracTapDiv2C(r16)                   _BFGET_(r16, 7, 4)
    #define   SET16RF64PIC_fracTapDiv2C(r16,v)                 _BFSET_(r16, 7, 4,v)

    #define   GET32RF64PIC_IPCM_QPU(r32)                       _BFGET_(r32,13, 8)
    #define   SET32RF64PIC_IPCM_QPU(r32,v)                     _BFSET_(r32,13, 8,v)
    #define   GET16RF64PIC_IPCM_QPU(r16)                       _BFGET_(r16,13, 8)
    #define   SET16RF64PIC_IPCM_QPU(r16,v)                     _BFSET_(r16,13, 8,v)

    #define   GET32RF64PIC_IPCM_QPV(r32)                       _BFGET_(r32,19,14)
    #define   SET32RF64PIC_IPCM_QPV(r32,v)                     _BFSET_(r32,19,14,v)

    #define   GET32RF64PIC_RSVD12(r32)                         _BFGET_(r32,31,20)
    #define   SET32RF64PIC_RSVD12(r32,v)                       _BFSET_(r32,31,20,v)
    #define   GET16RF64PIC_RSVD12(r16)                         _BFGET_(r16,15, 4)
    #define   SET16RF64PIC_RSVD12(r16,v)                       _BFSET_(r16,15, 4,v)

            UNSG32 u_fracTapDiv2Y                              :  4;
            UNSG32 u_fracTapDiv2C                              :  4;
            UNSG32 u_IPCM_QPU                                  :  6;
            UNSG32 u_IPCM_QPV                                  :  6;
            UNSG32 u_RSVD12                                    : 12;
    ///////////////////////////////////////////////////////////
    #define   GET32RF64PIC_PQUANT(r32)                         _BFGET_(r32, 4, 0)
    #define   SET32RF64PIC_PQUANT(r32,v)                       _BFSET_(r32, 4, 0,v)
    #define   GET16RF64PIC_PQUANT(r16)                         _BFGET_(r16, 4, 0)
    #define   SET16RF64PIC_PQUANT(r16,v)                       _BFSET_(r16, 4, 0,v)

    #define   GET32RF64PIC_FRFD(r32)                           _BFGET_(r32, 6, 5)
    #define   SET32RF64PIC_FRFD(r32,v)                         _BFSET_(r32, 6, 5,v)
    #define   GET16RF64PIC_FRFD(r16)                           _BFGET_(r16, 6, 5)
    #define   SET16RF64PIC_FRFD(r16,v)                         _BFSET_(r16, 6, 5,v)

    #define   GET32RF64PIC_BRFD(r32)                           _BFGET_(r32, 8, 7)
    #define   SET32RF64PIC_BRFD(r32,v)                         _BFSET_(r32, 8, 7,v)
    #define   GET16RF64PIC_BRFD(r16)                           _BFGET_(r16, 8, 7)
    #define   SET16RF64PIC_BRFD(r16,v)                         _BFSET_(r16, 8, 7,v)

    #define   GET32RF64PIC_secondFld(r32)                      _BFGET_(r32, 9, 9)
    #define   SET32RF64PIC_secondFld(r32,v)                    _BFSET_(r32, 9, 9,v)
    #define   GET16RF64PIC_secondFld(r16)                      _BFGET_(r16, 9, 9)
    #define   SET16RF64PIC_secondFld(r16,v)                    _BFSET_(r16, 9, 9,v)

    #define   GET32RF64PIC_mvRange(r32)                        _BFGET_(r32,11,10)
    #define   SET32RF64PIC_mvRange(r32,v)                      _BFSET_(r32,11,10,v)
    #define   GET16RF64PIC_mvRange(r16)                        _BFGET_(r16,11,10)
    #define   SET16RF64PIC_mvRange(r16,v)                      _BFSET_(r16,11,10,v)

    #define   GET32RF64PIC_hybridMvThres(r32)                  _BFGET_(r32,12,12)
    #define   SET32RF64PIC_hybridMvThres(r32,v)                _BFSET_(r32,12,12,v)
    #define   GET16RF64PIC_hybridMvThres(r16)                  _BFGET_(r16,12,12)
    #define   SET16RF64PIC_hybridMvThres(r16,v)                _BFSET_(r16,12,12,v)

    #define   GET32RF64PIC_firstMbIntra(r32)                   _BFGET_(r32,13,13)
    #define   SET32RF64PIC_firstMbIntra(r32,v)                 _BFSET_(r32,13,13,v)
    #define   GET16RF64PIC_firstMbIntra(r16)                   _BFGET_(r16,13,13)
    #define   SET16RF64PIC_firstMbIntra(r16,v)                 _BFSET_(r16,13,13,v)

    #define   GET32RF64PIC_halfPixel(r32)                      _BFGET_(r32,14,14)
    #define   SET32RF64PIC_halfPixel(r32,v)                    _BFSET_(r32,14,14,v)
    #define   GET16RF64PIC_halfPixel(r16)                      _BFGET_(r16,14,14)
    #define   SET16RF64PIC_halfPixel(r16,v)                    _BFSET_(r16,14,14,v)

    #define   GET32RF64PIC_forwRefInterlace(r32)               _BFGET_(r32,15,15)
    #define   SET32RF64PIC_forwRefInterlace(r32,v)             _BFSET_(r32,15,15,v)
    #define   GET16RF64PIC_forwRefInterlace(r16)               _BFGET_(r16,15,15)
    #define   SET16RF64PIC_forwRefInterlace(r16,v)             _BFSET_(r16,15,15,v)

    #define   GET32RF64PIC_backRefInterlace(r32)               _BFGET_(r32,16,16)
    #define   SET32RF64PIC_backRefInterlace(r32,v)             _BFSET_(r32,16,16,v)
    #define   GET16RF64PIC_backRefInterlace(r16)               _BFGET_(r16, 0, 0)
    #define   SET16RF64PIC_backRefInterlace(r16,v)             _BFSET_(r16, 0, 0,v)

    #define   GET32RF64PIC_FrmTransACSet(r32)                  _BFGET_(r32,18,17)
    #define   SET32RF64PIC_FrmTransACSet(r32,v)                _BFSET_(r32,18,17,v)
    #define   GET16RF64PIC_FrmTransACSet(r16)                  _BFGET_(r16, 2, 1)
    #define   SET16RF64PIC_FrmTransACSet(r16,v)                _BFSET_(r16, 2, 1,v)

    #define   GET32RF64PIC_FrmTransACSet2(r32)                 _BFGET_(r32,20,19)
    #define   SET32RF64PIC_FrmTransACSet2(r32,v)               _BFSET_(r32,20,19,v)
    #define   GET16RF64PIC_FrmTransACSet2(r16)                 _BFGET_(r16, 4, 3)
    #define   SET16RF64PIC_FrmTransACSet2(r16,v)               _BFSET_(r16, 4, 3,v)

    #define   GET32RF64PIC_PQIndexGT8(r32)                     _BFGET_(r32,21,21)
    #define   SET32RF64PIC_PQIndexGT8(r32,v)                   _BFSET_(r32,21,21,v)
    #define   GET16RF64PIC_PQIndexGT8(r16)                     _BFGET_(r16, 5, 5)
    #define   SET16RF64PIC_PQIndexGT8(r16,v)                   _BFSET_(r16, 5, 5,v)

    #define   GET32RF64PIC_EscapeTBL(r32)                      _BFGET_(r32,22,22)
    #define   SET32RF64PIC_EscapeTBL(r32,v)                    _BFSET_(r32,22,22,v)
    #define   GET16RF64PIC_EscapeTBL(r16)                      _BFGET_(r16, 6, 6)
    #define   SET16RF64PIC_EscapeTBL(r16,v)                    _BFSET_(r16, 6, 6,v)

    #define   GET32RF64PIC_format1(r32)                        _BFGET_(r32,26,23)
    #define   SET32RF64PIC_format1(r32,v)                      _BFSET_(r32,26,23,v)
    #define   GET16RF64PIC_format1(r16)                        _BFGET_(r16,10, 7)
    #define   SET16RF64PIC_format1(r16,v)                      _BFSET_(r16,10, 7,v)

    #define   GET32RF64PIC_noReorder(r32)                      _BFGET_(r32,27,27)
    #define   SET32RF64PIC_noReorder(r32,v)                    _BFSET_(r32,27,27,v)
    #define   GET16RF64PIC_noReorder(r16)                      _BFGET_(r16,11,11)
    #define   SET16RF64PIC_noReorder(r16,v)                    _BFSET_(r16,11,11,v)

    #define   GET32RF64PIC_iplusModeOn(r32)                    _BFGET_(r32,28,28)
    #define   SET32RF64PIC_iplusModeOn(r32,v)                  _BFSET_(r32,28,28,v)
    #define   GET16RF64PIC_iplusModeOn(r16)                    _BFGET_(r16,12,12)
    #define   SET16RF64PIC_iplusModeOn(r16,v)                  _BFSET_(r16,12,12,v)

    #define   GET32RF64PIC_RSVD3(r32)                          _BFGET_(r32,31,29)
    #define   SET32RF64PIC_RSVD3(r32,v)                        _BFSET_(r32,31,29,v)
    #define   GET16RF64PIC_RSVD3(r16)                          _BFGET_(r16,15,13)
    #define   SET16RF64PIC_RSVD3(r16,v)                        _BFSET_(r16,15,13,v)

            UNSG32 u_PQUANT                                    :  5;
            UNSG32 u_FRFD                                      :  2;
            UNSG32 u_BRFD                                      :  2;
            UNSG32 u_secondFld                                 :  1;
            UNSG32 u_mvRange                                   :  2;
            UNSG32 u_hybridMvThres                             :  1;
            UNSG32 u_firstMbIntra                              :  1;
            UNSG32 u_halfPixel                                 :  1;
            UNSG32 u_forwRefInterlace                          :  1;
            UNSG32 u_backRefInterlace                          :  1;
            UNSG32 u_FrmTransACSet                             :  2;
            UNSG32 u_FrmTransACSet2                            :  2;
            UNSG32 u_PQIndexGT8                                :  1;
            UNSG32 u_EscapeTBL                                 :  1;
            UNSG32 u_format1                                   :  4;
            UNSG32 u_noReorder                                 :  1;
            UNSG32 u_iplusModeOn                               :  1;
            UNSG32 u_RSVD3                                     :  3;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[5];
    ///////////////////////////////////////////////////////////
              SIE_IDX2BID                                      ie_rIDX2BID;
    ///////////////////////////////////////////////////////////
    } SIE_RF64PIC;

    ///////////////////////////////////////////////////////////
     SIGN32 RF64PIC_drvrd(SIE_RF64PIC *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RF64PIC_drvwr(SIE_RF64PIC *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RF64PIC_reset(SIE_RF64PIC *p);
     SIGN32 RF64PIC_cmp  (SIE_RF64PIC *p, SIE_RF64PIC *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RF64PIC_check(p,pie,pfx,hLOG) RF64PIC_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RF64PIC_print(p,    pfx,hLOG) RF64PIC_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RF64PIC
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RF64MB                  biu              (4,4)
///     ###
///     * RF64 macroblock-level information for ALU64 extensions; padded to 64b
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               ###
///               * [0:15] casted from MBPROP[0:15] in decHal_mbLvl.sxw.txt
///               ###
///               %unsigned 3  BANK                      
///                                    ###
///                                    * Bank[0] indicates whether current MB is even or odd in an MB pair.
///                                    ###
///               %unsigned 1  Inter                     
///                                    ###
///                                    * Intra (0) or inter (1) macroblock, for DQmatrix selection in dQuant only
///                                    ###
///               %unsigned 1  lastMbRow                 
///                                    ###
///                                    * Current MB row is the last in slice; for VC-1 FOP
///                                    ###
///               %unsigned 1  lastMbRowPic              
///                                    ###
///                                    * Current MB row is the last in picture; for VC-1 FOP
///                                    ###
///               %unsigned 1  RSVD                      
///                                    ###
///                                    * reserved for bitfield alignment. Removed RF64MB.Mbaff.
///                                    ###
///               %unsigned 1  FLD                       
///                                    ###
///                                    * - if current MB is MBAFF field MB. Only valid when RF64PIC.MbaffPic = 1.
///                                    ###
///               %unsigned 1  FLDNeighborA              
///                                    ###
///                                    * - if left MB is MBAFF field MB. Only valid when RF64PIC.MbaffPic = 1.
///                                    ###
///               %unsigned 1  FLDNeighborB              
///                                    ###
///                                    * - if upper MB is MBAFF field MB. Only valid when RF64PIC.MbaffPic = 1.
///                                    ###
///               %unsigned 1  FLDNeighborC              
///                                    ###
///                                    * - if upper-right MB is MBAFF field MB. Only valid when RF64PIC.MbaffPic = 1.
///                                    ###
///               %unsigned 1  FLDNeighborD              
///                                    ###
///                                    * - if upper-left MB is MBAFF field MB. Only valid when RF64PIC.MbaffPic = 1.
///                                    ###
///               %unsigned 1  NeighborA                 
///                                    ###
///                                    * From stream-parser to syntax-processor:
///                                    * - if left MB is available
///                                    * From vScope to PCube:
///                                    * - if left MB is available as intra predictor
///                                    ###
///               %unsigned 1  NeighborB                 
///                                    ###
///                                    * From stream-parser to syntax-processor:
///                                    * - if upper MB is available
///                                    * From vScope to PCube:
///                                    * - if upper MB is available as intra predictor
///                                    ###
///               %unsigned 1  NeighborC                 
///                                    ###
///                                    * From stream-parser to syntax-processor:
///                                    * - if upper-right MB is available
///                                    * From vScope to PCube:
///                                    * - if upper-right MB is available as intra predictor
///                                    ###
///               %unsigned 1  NeighborD                 
///                                    ###
///                                    * From stream-parser to syntax-processor:
///                                    * - if upper-left MB is available
///                                    * From vScope to PCube:
///                                    * - if upper-left MB is available as intra predictor
///                                    ###
///               %unsigned 8  FopAddr2                  
///                                    ###
///                                    * VC-1: base addr 2 for FOP output, 16-byte based
///                                    ###
///               %unsigned 8  FopAddr3                  
///                                    ###
///                                    * VC-1: base addr 3 for FOP output, 16-byte based
///                                    * [32:63]
///                                    ###
///     @ 0x00004                      (P)
///               %unsigned 8  FopAddr                   
///                                    ###
///                                    * H.264: FOP output addr
///                                    * VC-1: base addr 0 for FOP output, 16-byte based
///                                    ###
///               %unsigned 8  FopAddr1                  
///                                    ###
///                                    * VC-1: base addr 1 for FOP output, 16-byte based
///                                    ###
///               %unsigned 8  MbX                       
///                                    ###
///                                    * Current MB index in X direction;
///                                    * from 0 up to ((picW+15)>>4) -1
///                                    ###
///               %unsigned 8  MbY                       
///                                    ###
///                                    * Current MB index in Y direction;
///                                    * from 0 up to ((picH+15)>>4) -1
///                                    * End of RF64MB
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RF64MB
#define h_RF64MB (){}

    #define     BA_RF64MB_BANK                                 0x0000
    #define     B16RF64MB_BANK                                 0x0000
    #define   LSb32RF64MB_BANK                                    0
    #define   LSb16RF64MB_BANK                                    0
    #define       bRF64MB_BANK                                 3
    #define   MSK32RF64MB_BANK                                    0x00000007

    #define     BA_RF64MB_Inter                                0x0000
    #define     B16RF64MB_Inter                                0x0000
    #define   LSb32RF64MB_Inter                                   3
    #define   LSb16RF64MB_Inter                                   3
    #define       bRF64MB_Inter                                1
    #define   MSK32RF64MB_Inter                                   0x00000008

    #define     BA_RF64MB_lastMbRow                            0x0000
    #define     B16RF64MB_lastMbRow                            0x0000
    #define   LSb32RF64MB_lastMbRow                               4
    #define   LSb16RF64MB_lastMbRow                               4
    #define       bRF64MB_lastMbRow                            1
    #define   MSK32RF64MB_lastMbRow                               0x00000010

    #define     BA_RF64MB_lastMbRowPic                         0x0000
    #define     B16RF64MB_lastMbRowPic                         0x0000
    #define   LSb32RF64MB_lastMbRowPic                            5
    #define   LSb16RF64MB_lastMbRowPic                            5
    #define       bRF64MB_lastMbRowPic                         1
    #define   MSK32RF64MB_lastMbRowPic                            0x00000020

    #define     BA_RF64MB_RSVD                                 0x0000
    #define     B16RF64MB_RSVD                                 0x0000
    #define   LSb32RF64MB_RSVD                                    6
    #define   LSb16RF64MB_RSVD                                    6
    #define       bRF64MB_RSVD                                 1
    #define   MSK32RF64MB_RSVD                                    0x00000040

    #define     BA_RF64MB_FLD                                  0x0000
    #define     B16RF64MB_FLD                                  0x0000
    #define   LSb32RF64MB_FLD                                     7
    #define   LSb16RF64MB_FLD                                     7
    #define       bRF64MB_FLD                                  1
    #define   MSK32RF64MB_FLD                                     0x00000080

    #define     BA_RF64MB_FLDNeighborA                         0x0001
    #define     B16RF64MB_FLDNeighborA                         0x0000
    #define   LSb32RF64MB_FLDNeighborA                            8
    #define   LSb16RF64MB_FLDNeighborA                            8
    #define       bRF64MB_FLDNeighborA                         1
    #define   MSK32RF64MB_FLDNeighborA                            0x00000100

    #define     BA_RF64MB_FLDNeighborB                         0x0001
    #define     B16RF64MB_FLDNeighborB                         0x0000
    #define   LSb32RF64MB_FLDNeighborB                            9
    #define   LSb16RF64MB_FLDNeighborB                            9
    #define       bRF64MB_FLDNeighborB                         1
    #define   MSK32RF64MB_FLDNeighborB                            0x00000200

    #define     BA_RF64MB_FLDNeighborC                         0x0001
    #define     B16RF64MB_FLDNeighborC                         0x0000
    #define   LSb32RF64MB_FLDNeighborC                            10
    #define   LSb16RF64MB_FLDNeighborC                            10
    #define       bRF64MB_FLDNeighborC                         1
    #define   MSK32RF64MB_FLDNeighborC                            0x00000400

    #define     BA_RF64MB_FLDNeighborD                         0x0001
    #define     B16RF64MB_FLDNeighborD                         0x0000
    #define   LSb32RF64MB_FLDNeighborD                            11
    #define   LSb16RF64MB_FLDNeighborD                            11
    #define       bRF64MB_FLDNeighborD                         1
    #define   MSK32RF64MB_FLDNeighborD                            0x00000800

    #define     BA_RF64MB_NeighborA                            0x0001
    #define     B16RF64MB_NeighborA                            0x0000
    #define   LSb32RF64MB_NeighborA                               12
    #define   LSb16RF64MB_NeighborA                               12
    #define       bRF64MB_NeighborA                            1
    #define   MSK32RF64MB_NeighborA                               0x00001000

    #define     BA_RF64MB_NeighborB                            0x0001
    #define     B16RF64MB_NeighborB                            0x0000
    #define   LSb32RF64MB_NeighborB                               13
    #define   LSb16RF64MB_NeighborB                               13
    #define       bRF64MB_NeighborB                            1
    #define   MSK32RF64MB_NeighborB                               0x00002000

    #define     BA_RF64MB_NeighborC                            0x0001
    #define     B16RF64MB_NeighborC                            0x0000
    #define   LSb32RF64MB_NeighborC                               14
    #define   LSb16RF64MB_NeighborC                               14
    #define       bRF64MB_NeighborC                            1
    #define   MSK32RF64MB_NeighborC                               0x00004000

    #define     BA_RF64MB_NeighborD                            0x0001
    #define     B16RF64MB_NeighborD                            0x0000
    #define   LSb32RF64MB_NeighborD                               15
    #define   LSb16RF64MB_NeighborD                               15
    #define       bRF64MB_NeighborD                            1
    #define   MSK32RF64MB_NeighborD                               0x00008000

    #define     BA_RF64MB_FopAddr2                             0x0002
    #define     B16RF64MB_FopAddr2                             0x0002
    #define   LSb32RF64MB_FopAddr2                                16
    #define   LSb16RF64MB_FopAddr2                                0
    #define       bRF64MB_FopAddr2                             8
    #define   MSK32RF64MB_FopAddr2                                0x00FF0000

    #define     BA_RF64MB_FopAddr3                             0x0003
    #define     B16RF64MB_FopAddr3                             0x0002
    #define   LSb32RF64MB_FopAddr3                                24
    #define   LSb16RF64MB_FopAddr3                                8
    #define       bRF64MB_FopAddr3                             8
    #define   MSK32RF64MB_FopAddr3                                0xFF000000
    ///////////////////////////////////////////////////////////

    #define     BA_RF64MB_FopAddr                              0x0004
    #define     B16RF64MB_FopAddr                              0x0004
    #define   LSb32RF64MB_FopAddr                                 0
    #define   LSb16RF64MB_FopAddr                                 0
    #define       bRF64MB_FopAddr                              8
    #define   MSK32RF64MB_FopAddr                                 0x000000FF

    #define     BA_RF64MB_FopAddr1                             0x0005
    #define     B16RF64MB_FopAddr1                             0x0004
    #define   LSb32RF64MB_FopAddr1                                8
    #define   LSb16RF64MB_FopAddr1                                8
    #define       bRF64MB_FopAddr1                             8
    #define   MSK32RF64MB_FopAddr1                                0x0000FF00

    #define     BA_RF64MB_MbX                                  0x0006
    #define     B16RF64MB_MbX                                  0x0006
    #define   LSb32RF64MB_MbX                                     16
    #define   LSb16RF64MB_MbX                                     0
    #define       bRF64MB_MbX                                  8
    #define   MSK32RF64MB_MbX                                     0x00FF0000

    #define     BA_RF64MB_MbY                                  0x0007
    #define     B16RF64MB_MbY                                  0x0006
    #define   LSb32RF64MB_MbY                                     24
    #define   LSb16RF64MB_MbY                                     8
    #define       bRF64MB_MbY                                  8
    #define   MSK32RF64MB_MbY                                     0xFF000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RF64MB {
    ///////////////////////////////////////////////////////////
    #define   GET32RF64MB_BANK(r32)                            _BFGET_(r32, 2, 0)
    #define   SET32RF64MB_BANK(r32,v)                          _BFSET_(r32, 2, 0,v)
    #define   GET16RF64MB_BANK(r16)                            _BFGET_(r16, 2, 0)
    #define   SET16RF64MB_BANK(r16,v)                          _BFSET_(r16, 2, 0,v)

    #define   GET32RF64MB_Inter(r32)                           _BFGET_(r32, 3, 3)
    #define   SET32RF64MB_Inter(r32,v)                         _BFSET_(r32, 3, 3,v)
    #define   GET16RF64MB_Inter(r16)                           _BFGET_(r16, 3, 3)
    #define   SET16RF64MB_Inter(r16,v)                         _BFSET_(r16, 3, 3,v)

    #define   GET32RF64MB_lastMbRow(r32)                       _BFGET_(r32, 4, 4)
    #define   SET32RF64MB_lastMbRow(r32,v)                     _BFSET_(r32, 4, 4,v)
    #define   GET16RF64MB_lastMbRow(r16)                       _BFGET_(r16, 4, 4)
    #define   SET16RF64MB_lastMbRow(r16,v)                     _BFSET_(r16, 4, 4,v)

    #define   GET32RF64MB_lastMbRowPic(r32)                    _BFGET_(r32, 5, 5)
    #define   SET32RF64MB_lastMbRowPic(r32,v)                  _BFSET_(r32, 5, 5,v)
    #define   GET16RF64MB_lastMbRowPic(r16)                    _BFGET_(r16, 5, 5)
    #define   SET16RF64MB_lastMbRowPic(r16,v)                  _BFSET_(r16, 5, 5,v)

    #define   GET32RF64MB_RSVD(r32)                            _BFGET_(r32, 6, 6)
    #define   SET32RF64MB_RSVD(r32,v)                          _BFSET_(r32, 6, 6,v)
    #define   GET16RF64MB_RSVD(r16)                            _BFGET_(r16, 6, 6)
    #define   SET16RF64MB_RSVD(r16,v)                          _BFSET_(r16, 6, 6,v)

    #define   GET32RF64MB_FLD(r32)                             _BFGET_(r32, 7, 7)
    #define   SET32RF64MB_FLD(r32,v)                           _BFSET_(r32, 7, 7,v)
    #define   GET16RF64MB_FLD(r16)                             _BFGET_(r16, 7, 7)
    #define   SET16RF64MB_FLD(r16,v)                           _BFSET_(r16, 7, 7,v)

    #define   GET32RF64MB_FLDNeighborA(r32)                    _BFGET_(r32, 8, 8)
    #define   SET32RF64MB_FLDNeighborA(r32,v)                  _BFSET_(r32, 8, 8,v)
    #define   GET16RF64MB_FLDNeighborA(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16RF64MB_FLDNeighborA(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32RF64MB_FLDNeighborB(r32)                    _BFGET_(r32, 9, 9)
    #define   SET32RF64MB_FLDNeighborB(r32,v)                  _BFSET_(r32, 9, 9,v)
    #define   GET16RF64MB_FLDNeighborB(r16)                    _BFGET_(r16, 9, 9)
    #define   SET16RF64MB_FLDNeighborB(r16,v)                  _BFSET_(r16, 9, 9,v)

    #define   GET32RF64MB_FLDNeighborC(r32)                    _BFGET_(r32,10,10)
    #define   SET32RF64MB_FLDNeighborC(r32,v)                  _BFSET_(r32,10,10,v)
    #define   GET16RF64MB_FLDNeighborC(r16)                    _BFGET_(r16,10,10)
    #define   SET16RF64MB_FLDNeighborC(r16,v)                  _BFSET_(r16,10,10,v)

    #define   GET32RF64MB_FLDNeighborD(r32)                    _BFGET_(r32,11,11)
    #define   SET32RF64MB_FLDNeighborD(r32,v)                  _BFSET_(r32,11,11,v)
    #define   GET16RF64MB_FLDNeighborD(r16)                    _BFGET_(r16,11,11)
    #define   SET16RF64MB_FLDNeighborD(r16,v)                  _BFSET_(r16,11,11,v)

    #define   GET32RF64MB_NeighborA(r32)                       _BFGET_(r32,12,12)
    #define   SET32RF64MB_NeighborA(r32,v)                     _BFSET_(r32,12,12,v)
    #define   GET16RF64MB_NeighborA(r16)                       _BFGET_(r16,12,12)
    #define   SET16RF64MB_NeighborA(r16,v)                     _BFSET_(r16,12,12,v)

    #define   GET32RF64MB_NeighborB(r32)                       _BFGET_(r32,13,13)
    #define   SET32RF64MB_NeighborB(r32,v)                     _BFSET_(r32,13,13,v)
    #define   GET16RF64MB_NeighborB(r16)                       _BFGET_(r16,13,13)
    #define   SET16RF64MB_NeighborB(r16,v)                     _BFSET_(r16,13,13,v)

    #define   GET32RF64MB_NeighborC(r32)                       _BFGET_(r32,14,14)
    #define   SET32RF64MB_NeighborC(r32,v)                     _BFSET_(r32,14,14,v)
    #define   GET16RF64MB_NeighborC(r16)                       _BFGET_(r16,14,14)
    #define   SET16RF64MB_NeighborC(r16,v)                     _BFSET_(r16,14,14,v)

    #define   GET32RF64MB_NeighborD(r32)                       _BFGET_(r32,15,15)
    #define   SET32RF64MB_NeighborD(r32,v)                     _BFSET_(r32,15,15,v)
    #define   GET16RF64MB_NeighborD(r16)                       _BFGET_(r16,15,15)
    #define   SET16RF64MB_NeighborD(r16,v)                     _BFSET_(r16,15,15,v)

    #define   GET32RF64MB_FopAddr2(r32)                        _BFGET_(r32,23,16)
    #define   SET32RF64MB_FopAddr2(r32,v)                      _BFSET_(r32,23,16,v)
    #define   GET16RF64MB_FopAddr2(r16)                        _BFGET_(r16, 7, 0)
    #define   SET16RF64MB_FopAddr2(r16,v)                      _BFSET_(r16, 7, 0,v)

    #define   GET32RF64MB_FopAddr3(r32)                        _BFGET_(r32,31,24)
    #define   SET32RF64MB_FopAddr3(r32,v)                      _BFSET_(r32,31,24,v)
    #define   GET16RF64MB_FopAddr3(r16)                        _BFGET_(r16,15, 8)
    #define   SET16RF64MB_FopAddr3(r16,v)                      _BFSET_(r16,15, 8,v)

            UNSG32 u_BANK                                      :  3;
            UNSG32 u_Inter                                     :  1;
            UNSG32 u_lastMbRow                                 :  1;
            UNSG32 u_lastMbRowPic                              :  1;
            UNSG32 u_RSVD                                      :  1;
            UNSG32 u_FLD                                       :  1;
            UNSG32 u_FLDNeighborA                              :  1;
            UNSG32 u_FLDNeighborB                              :  1;
            UNSG32 u_FLDNeighborC                              :  1;
            UNSG32 u_FLDNeighborD                              :  1;
            UNSG32 u_NeighborA                                 :  1;
            UNSG32 u_NeighborB                                 :  1;
            UNSG32 u_NeighborC                                 :  1;
            UNSG32 u_NeighborD                                 :  1;
            UNSG32 u_FopAddr2                                  :  8;
            UNSG32 u_FopAddr3                                  :  8;
    ///////////////////////////////////////////////////////////
    #define   GET32RF64MB_FopAddr(r32)                         _BFGET_(r32, 7, 0)
    #define   SET32RF64MB_FopAddr(r32,v)                       _BFSET_(r32, 7, 0,v)
    #define   GET16RF64MB_FopAddr(r16)                         _BFGET_(r16, 7, 0)
    #define   SET16RF64MB_FopAddr(r16,v)                       _BFSET_(r16, 7, 0,v)

    #define   GET32RF64MB_FopAddr1(r32)                        _BFGET_(r32,15, 8)
    #define   SET32RF64MB_FopAddr1(r32,v)                      _BFSET_(r32,15, 8,v)
    #define   GET16RF64MB_FopAddr1(r16)                        _BFGET_(r16,15, 8)
    #define   SET16RF64MB_FopAddr1(r16,v)                      _BFSET_(r16,15, 8,v)

    #define   GET32RF64MB_MbX(r32)                             _BFGET_(r32,23,16)
    #define   SET32RF64MB_MbX(r32,v)                           _BFSET_(r32,23,16,v)
    #define   GET16RF64MB_MbX(r16)                             _BFGET_(r16, 7, 0)
    #define   SET16RF64MB_MbX(r16,v)                           _BFSET_(r16, 7, 0,v)

    #define   GET32RF64MB_MbY(r32)                             _BFGET_(r32,31,24)
    #define   SET32RF64MB_MbY(r32,v)                           _BFSET_(r32,31,24,v)
    #define   GET16RF64MB_MbY(r16)                             _BFGET_(r16,15, 8)
    #define   SET16RF64MB_MbY(r16,v)                           _BFSET_(r16,15, 8,v)

            UNSG32 u_FopAddr                                   :  8;
            UNSG32 u_FopAddr1                                  :  8;
            UNSG32 u_MbX                                       :  8;
            UNSG32 u_MbY                                       :  8;
    ///////////////////////////////////////////////////////////
    } SIE_RF64MB;

    ///////////////////////////////////////////////////////////
     SIGN32 RF64MB_drvrd(SIE_RF64MB *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RF64MB_drvwr(SIE_RF64MB *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RF64MB_reset(SIE_RF64MB *p);
     SIGN32 RF64MB_cmp  (SIE_RF64MB *p, SIE_RF64MB *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RF64MB_check(p,pie,pfx,hLOG) RF64MB_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RF64MB_print(p,    pfx,hLOG) RF64MB_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RF64MB
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RF64QP                  biu              (4,4)
///     ###
///     * QP for neighboring macroblocks; used by FOP only. Padded to 64b
///     * Same as {BLK,chroma,RSVD,QP,Qu,Qv} in MBPROP in decHal_mbLvl.sxw.txt
///     * Also added DC/ACstep_* for coefficient scaling for DC/AC prediction for MPEG-4/VC-1
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 8  DCstep_Y                  
///                                    ###
///                                    * VC-1: DCSTEP for coeff scaling in DC prediction (only 6 bits are used)
///                                    * MPEG-4: qstep luma coeff scaling in DC prediction
///                                    ###
///               %unsigned 8  ACstep_Y                  
///                                    ###
///                                    * VC-1: DCSTEP for coeff scaling in AC prediction (only 6 bits are used)
///                                    * MPEG-4: qstep luma coeff scaling in AC prediction
///                                    ###
///               %unsigned 8  DCstep_C                  
///                                    ###
///                                    * VC-1: not used
///                                    * MPEG-4: qstep chroma coeff scaling in DC prediction
///                                    ###
///               %unsigned 8  ACstep_C                  
///                                    ###
///                                    * VC-1: not used
///                                    * MPEG-4: qstep chroma coeff scaling in AC prediction
///                                    * [32:63]
///                                    ###
///     @ 0x00004                      (P)
///               %unsigned 8  RSVD8                     
///               %unsigned 8  QPY                       
///                                    ###
///                                    * H.264: QP for Luma; 0~51 inclusive
///                                    * MPEG-4: QP_AC (used to determine if coeff scaling is required for AC prediction)
///                                    ###
///               %unsigned 8  QPU                       
///                                    ###
///                                    * H.264: QP fo Cb; 0~51 inclusive
///                                    ###
///               %unsigned 8  QPV                       
///                                    ###
///                                    * H.264: QP for Cr; 0~51 inclusive
///                                    * End of RF64QP
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RF64QP
#define h_RF64QP (){}

    #define     BA_RF64QP_DCstep_Y                             0x0000
    #define     B16RF64QP_DCstep_Y                             0x0000
    #define   LSb32RF64QP_DCstep_Y                                0
    #define   LSb16RF64QP_DCstep_Y                                0
    #define       bRF64QP_DCstep_Y                             8
    #define   MSK32RF64QP_DCstep_Y                                0x000000FF

    #define     BA_RF64QP_ACstep_Y                             0x0001
    #define     B16RF64QP_ACstep_Y                             0x0000
    #define   LSb32RF64QP_ACstep_Y                                8
    #define   LSb16RF64QP_ACstep_Y                                8
    #define       bRF64QP_ACstep_Y                             8
    #define   MSK32RF64QP_ACstep_Y                                0x0000FF00

    #define     BA_RF64QP_DCstep_C                             0x0002
    #define     B16RF64QP_DCstep_C                             0x0002
    #define   LSb32RF64QP_DCstep_C                                16
    #define   LSb16RF64QP_DCstep_C                                0
    #define       bRF64QP_DCstep_C                             8
    #define   MSK32RF64QP_DCstep_C                                0x00FF0000

    #define     BA_RF64QP_ACstep_C                             0x0003
    #define     B16RF64QP_ACstep_C                             0x0002
    #define   LSb32RF64QP_ACstep_C                                24
    #define   LSb16RF64QP_ACstep_C                                8
    #define       bRF64QP_ACstep_C                             8
    #define   MSK32RF64QP_ACstep_C                                0xFF000000
    ///////////////////////////////////////////////////////////

    #define     BA_RF64QP_RSVD8                                0x0004
    #define     B16RF64QP_RSVD8                                0x0004
    #define   LSb32RF64QP_RSVD8                                   0
    #define   LSb16RF64QP_RSVD8                                   0
    #define       bRF64QP_RSVD8                                8
    #define   MSK32RF64QP_RSVD8                                   0x000000FF

    #define     BA_RF64QP_QPY                                  0x0005
    #define     B16RF64QP_QPY                                  0x0004
    #define   LSb32RF64QP_QPY                                     8
    #define   LSb16RF64QP_QPY                                     8
    #define       bRF64QP_QPY                                  8
    #define   MSK32RF64QP_QPY                                     0x0000FF00

    #define     BA_RF64QP_QPU                                  0x0006
    #define     B16RF64QP_QPU                                  0x0006
    #define   LSb32RF64QP_QPU                                     16
    #define   LSb16RF64QP_QPU                                     0
    #define       bRF64QP_QPU                                  8
    #define   MSK32RF64QP_QPU                                     0x00FF0000

    #define     BA_RF64QP_QPV                                  0x0007
    #define     B16RF64QP_QPV                                  0x0006
    #define   LSb32RF64QP_QPV                                     24
    #define   LSb16RF64QP_QPV                                     8
    #define       bRF64QP_QPV                                  8
    #define   MSK32RF64QP_QPV                                     0xFF000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RF64QP {
    ///////////////////////////////////////////////////////////
    #define   GET32RF64QP_DCstep_Y(r32)                        _BFGET_(r32, 7, 0)
    #define   SET32RF64QP_DCstep_Y(r32,v)                      _BFSET_(r32, 7, 0,v)
    #define   GET16RF64QP_DCstep_Y(r16)                        _BFGET_(r16, 7, 0)
    #define   SET16RF64QP_DCstep_Y(r16,v)                      _BFSET_(r16, 7, 0,v)

    #define   GET32RF64QP_ACstep_Y(r32)                        _BFGET_(r32,15, 8)
    #define   SET32RF64QP_ACstep_Y(r32,v)                      _BFSET_(r32,15, 8,v)
    #define   GET16RF64QP_ACstep_Y(r16)                        _BFGET_(r16,15, 8)
    #define   SET16RF64QP_ACstep_Y(r16,v)                      _BFSET_(r16,15, 8,v)

    #define   GET32RF64QP_DCstep_C(r32)                        _BFGET_(r32,23,16)
    #define   SET32RF64QP_DCstep_C(r32,v)                      _BFSET_(r32,23,16,v)
    #define   GET16RF64QP_DCstep_C(r16)                        _BFGET_(r16, 7, 0)
    #define   SET16RF64QP_DCstep_C(r16,v)                      _BFSET_(r16, 7, 0,v)

    #define   GET32RF64QP_ACstep_C(r32)                        _BFGET_(r32,31,24)
    #define   SET32RF64QP_ACstep_C(r32,v)                      _BFSET_(r32,31,24,v)
    #define   GET16RF64QP_ACstep_C(r16)                        _BFGET_(r16,15, 8)
    #define   SET16RF64QP_ACstep_C(r16,v)                      _BFSET_(r16,15, 8,v)

            UNSG32 u_DCstep_Y                                  :  8;
            UNSG32 u_ACstep_Y                                  :  8;
            UNSG32 u_DCstep_C                                  :  8;
            UNSG32 u_ACstep_C                                  :  8;
    ///////////////////////////////////////////////////////////
    #define   GET32RF64QP_RSVD8(r32)                           _BFGET_(r32, 7, 0)
    #define   SET32RF64QP_RSVD8(r32,v)                         _BFSET_(r32, 7, 0,v)
    #define   GET16RF64QP_RSVD8(r16)                           _BFGET_(r16, 7, 0)
    #define   SET16RF64QP_RSVD8(r16,v)                         _BFSET_(r16, 7, 0,v)

    #define   GET32RF64QP_QPY(r32)                             _BFGET_(r32,15, 8)
    #define   SET32RF64QP_QPY(r32,v)                           _BFSET_(r32,15, 8,v)
    #define   GET16RF64QP_QPY(r16)                             _BFGET_(r16,15, 8)
    #define   SET16RF64QP_QPY(r16,v)                           _BFSET_(r16,15, 8,v)

    #define   GET32RF64QP_QPU(r32)                             _BFGET_(r32,23,16)
    #define   SET32RF64QP_QPU(r32,v)                           _BFSET_(r32,23,16,v)
    #define   GET16RF64QP_QPU(r16)                             _BFGET_(r16, 7, 0)
    #define   SET16RF64QP_QPU(r16,v)                           _BFSET_(r16, 7, 0,v)

    #define   GET32RF64QP_QPV(r32)                             _BFGET_(r32,31,24)
    #define   SET32RF64QP_QPV(r32,v)                           _BFSET_(r32,31,24,v)
    #define   GET16RF64QP_QPV(r16)                             _BFGET_(r16,15, 8)
    #define   SET16RF64QP_QPV(r16,v)                           _BFSET_(r16,15, 8,v)

            UNSG32 u_RSVD8                                     :  8;
            UNSG32 u_QPY                                       :  8;
            UNSG32 u_QPU                                       :  8;
            UNSG32 u_QPV                                       :  8;
    ///////////////////////////////////////////////////////////
    } SIE_RF64QP;

    ///////////////////////////////////////////////////////////
     SIGN32 RF64QP_drvrd(SIE_RF64QP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RF64QP_drvwr(SIE_RF64QP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RF64QP_reset(SIE_RF64QP *p);
     SIGN32 RF64QP_cmp  (SIE_RF64QP *p, SIE_RF64QP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RF64QP_check(p,pie,pfx,hLOG) RF64QP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RF64QP_print(p,    pfx,hLOG) RF64QP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RF64QP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE NLUTCTX                 biu              (4,4)
///     ###
///     * RF64 context for nLut
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * Macroblock-level information; reprogrammed by FIGO at the start of every macroblock
///                                    * [64:2047]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 RSVD                 
///               $LUT64b              RSVD              REG      [31]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End NLUTCTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_NLUTCTX
#define h_NLUTCTX (){}

    #define     RA_NLUTCTX_MB                                  0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_NLUTCTX_RSVD                                0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_NLUTCTX_PIC                                 0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_NLUTCTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[31];
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_NLUTCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 NLUTCTX_drvrd(SIE_NLUTCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 NLUTCTX_drvwr(SIE_NLUTCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void NLUTCTX_reset(SIE_NLUTCTX *p);
     SIGN32 NLUTCTX_cmp  (SIE_NLUTCTX *p, SIE_NLUTCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define NLUTCTX_check(p,pie,pfx,hLOG) NLUTCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define NLUTCTX_print(p,    pfx,hLOG) NLUTCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: NLUTCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE BITOPCTX                biu              (4,4)
///     ###
///     * Operator format for BitOp extension
///     * [0:3583]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 RSVD                 
///               $LUT64b              RSVD              REG      [56]
///                                    ###
///                                    * padding to 3583
///                                    * [3584:3711]
///                                    ###
///     @ 0x001C0                      (P)
///     # 0x001C0 CTX                  
///               $BITOPRF64           CTX               REG          
///                                    ###
///                                    * Four BitOp commands, selected by extension ID
///                                    * End BitOpCtx
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_BITOPCTX
#define h_BITOPCTX (){}

    #define     RA_BITOPCTX_RSVD                               0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_BITOPCTX_CTX                                0x01C0
    ///////////////////////////////////////////////////////////

    typedef struct SIE_BITOPCTX {
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[56];
    ///////////////////////////////////////////////////////////
              SIE_BITOPRF64                                    ie_CTX;
    ///////////////////////////////////////////////////////////
    } SIE_BITOPCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 BITOPCTX_drvrd(SIE_BITOPCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 BITOPCTX_drvwr(SIE_BITOPCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void BITOPCTX_reset(SIE_BITOPCTX *p);
     SIGN32 BITOPCTX_cmp  (SIE_BITOPCTX *p, SIE_BITOPCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define BITOPCTX_check(p,pie,pfx,hLOG) BITOPCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define BITOPCTX_print(p,    pfx,hLOG) BITOPCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: BITOPCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DQCTX                   biu              (4,4)
///     ###
///     * RF64 context for dQuant
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * Reserved for RF64MB
///                                    * [64:191]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 QPX                  
///               $RF64QP              QPX               REG          
///                                    ###
///                                    * QP of current block
///                                    ###
///     @ 0x00010                      (P)
///     # 0x00010 QPN                  
///               $RF64QP              QPN               REG          
///                                    ###
///                                    * QP of neighboring block
///                                    * Used for VC-1/MPEG-4 DC/AC prediction
///                                    * [192:2047]
///                                    ###
///     @ 0x00018                      (P)
///     # 0x00018 RSVD                 
///               $LUT64b              RSVD              REG      [29]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End DQCTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DQCTX
#define h_DQCTX (){}

    #define     RA_DQCTX_MB                                    0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_DQCTX_QPX                                   0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_DQCTX_QPN                                   0x0010
    ///////////////////////////////////////////////////////////
    #define     RA_DQCTX_RSVD                                  0x0018
    ///////////////////////////////////////////////////////////
    #define     RA_DQCTX_PIC                                   0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DQCTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_RF64QP                                       ie_QPX;
    ///////////////////////////////////////////////////////////
              SIE_RF64QP                                       ie_QPN;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[29];
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_DQCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 DQCTX_drvrd(SIE_DQCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DQCTX_drvwr(SIE_DQCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DQCTX_reset(SIE_DQCTX *p);
     SIGN32 DQCTX_cmp  (SIE_DQCTX *p, SIE_DQCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DQCTX_check(p,pie,pfx,hLOG) DQCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DQCTX_print(p,    pfx,hLOG) DQCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DQCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ASPCTX                  biu              (4,4)
///     ###
///     * RF64 context for ASP
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * Reserved for RF64MB
///                                    * [64:255]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 RSVD                 
///               $LUT64b              RSVD              REG       [3]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    ###
///     @ 0x00020                      (P)
///     # 0x00020 D33                  
///               $HCTX4x4             D33               REG          
///                                    ###
///                                    * Y(-1,-1)
///                                    ###
///     @ 0x00030                      (P)
///     # 0x00030 B30                  
///               $HCTX4x4             B30               REG          
///                                    ###
///                                    * Y(0,-1) or U(0,-1) or DCU(0,-1)
///                                    ###
///     @ 0x00040                      (P)
///     # 0x00040 B31                  
///               $HCTX4x4             B31               REG          
///                                    ###
///                                    * Y(1,-1) or V(0,-1) or DCV(0,-1)
///                                    ###
///     @ 0x00050                      (P)
///     # 0x00050 B32                  
///               $HCTX4x4             B32               REG          
///                                    ###
///                                    * Y(2,-1) or U(1,-1)
///                                    ###
///     @ 0x00060                      (P)
///     # 0x00060 B33                  
///               $HCTX4x4             B33               REG          
///                                    ###
///                                    * Y(3,-1) or V(1,-1) or DCY(0,-1)
///                                    ###
///     @ 0x00070                      (P)
///     # 0x00070 C30                  
///               $HCTX4x4             C30               REG          
///                                    ###
///                                    * Y(4,-1)
///                                    ###
///     @ 0x00080                      (P)
///     # 0x00080 A03                  
///               $HCTX4x4             A03               REG          
///                                    ###
///                                    * Y(-1,0)
///                                    ###
///     @ 0x00090                      (P)
///     # 0x00090 A12                  
///               $HCTX4x4             A12               REG          
///                                    ###
///                                    * U(-1,0) & V(-1,0)
///                                    ###
///     @ 0x000A0                      (P)
///     # 0x000A0 A13                  
///               $HCTX4x4             A13               REG          
///                                    ###
///                                    * Y(-1,1)
///                                    ###
///     @ 0x000B0                      (P)
///     # 0x000B0 A23                  
///               $HCTX4x4             A23               REG          
///                                    ###
///                                    * Y(-1,2)
///                                    ###
///     @ 0x000C0                      (P)
///     # 0x000C0 A30                  
///               $HCTX4x4             A30               REG          
///                                    ###
///                                    * DCU(-1,0) & DCV(-1,0)
///                                    ###
///     @ 0x000D0                      (P)
///     # 0x000D0 A31                  
///               $HCTX4x4             A31               REG          
///                                    ###
///                                    * DCI(-1,0) & DCY(-1,0)
///                                    ###
///     @ 0x000E0                      (P)
///     # 0x000E0 A32                  
///               $HCTX4x4             A32               REG          
///                                    ###
///                                    * U(-1,1) & V(-1,1)
///                                    ###
///     @ 0x000F0                      (P)
///     # 0x000F0 A33                  
///               $HCTX4x4             A33               REG          
///                                    ###
///                                    * Y(-1,3)
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End ASPCTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ASPCTX
#define h_ASPCTX (){}

    #define     RA_ASPCTX_MB                                   0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_RSVD                                 0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_D33                                  0x0020
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_B30                                  0x0030
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_B31                                  0x0040
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_B32                                  0x0050
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_B33                                  0x0060
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_C30                                  0x0070
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_A03                                  0x0080
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_A12                                  0x0090
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_A13                                  0x00A0
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_A23                                  0x00B0
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_A30                                  0x00C0
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_A31                                  0x00D0
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_A32                                  0x00E0
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_A33                                  0x00F0
    ///////////////////////////////////////////////////////////
    #define     RA_ASPCTX_PIC                                  0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ASPCTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[3];
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_D33;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_B30;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_B31;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_B32;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_B33;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_C30;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A03;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A12;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A13;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A23;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A30;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A31;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A32;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A33;
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_ASPCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 ASPCTX_drvrd(SIE_ASPCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ASPCTX_drvwr(SIE_ASPCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ASPCTX_reset(SIE_ASPCTX *p);
     SIGN32 ASPCTX_cmp  (SIE_ASPCTX *p, SIE_ASPCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ASPCTX_check(p,pie,pfx,hLOG) ASPCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ASPCTX_print(p,    pfx,hLOG) ASPCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ASPCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE HCTX_ARR                biu              (4,4)
///     ###
///     * 16 * HCTX4x4 for ASP
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 CTX                  
///               $HCTX4x4             CTX               REG      [16]
///                                    ###
///                                    * HCTX4x4
///                                    * End HCTX_ARR
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     256B, bits:    2048b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_HCTX_ARR
#define h_HCTX_ARR (){}

    #define     RA_HCTX_ARR_CTX                                0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_HCTX_ARR {
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_CTX[16];
    ///////////////////////////////////////////////////////////
    } SIE_HCTX_ARR;

    ///////////////////////////////////////////////////////////
     SIGN32 HCTX_ARR_drvrd(SIE_HCTX_ARR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 HCTX_ARR_drvwr(SIE_HCTX_ARR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void HCTX_ARR_reset(SIE_HCTX_ARR *p);
     SIGN32 HCTX_ARR_cmp  (SIE_HCTX_ARR *p, SIE_HCTX_ARR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define HCTX_ARR_check(p,pie,pfx,hLOG) HCTX_ARR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define HCTX_ARR_print(p,    pfx,hLOG) HCTX_ARR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: HCTX_ARR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ASECTX                  biu              (4,4)
///     ###
///     * RF64 context for ASE
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * Reserved for RF64MB
///                                    * [64:255]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 RSVD                 
///               $LUT64b              RSVD              REG       [3]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    ###
///     @ 0x00020                      (P)
///     # 0x00020 D33                  
///               $HCTX4x4             D33               REG          
///                                    ###
///                                    * Y(-1,-1)
///                                    ###
///     @ 0x00030                      (P)
///     # 0x00030 B30                  
///               $HCTX4x4             B30               REG          
///                                    ###
///                                    * Y(0,-1) or U(0,-1) or DCU(0,-1)
///                                    ###
///     @ 0x00040                      (P)
///     # 0x00040 B31                  
///               $HCTX4x4             B31               REG          
///                                    ###
///                                    * Y(1,-1) or V(0,-1) or DCV(0,-1)
///                                    ###
///     @ 0x00050                      (P)
///     # 0x00050 B32                  
///               $HCTX4x4             B32               REG          
///                                    ###
///                                    * Y(2,-1) or U(1,-1)
///                                    ###
///     @ 0x00060                      (P)
///     # 0x00060 B33                  
///               $HCTX4x4             B33               REG          
///                                    ###
///                                    * Y(3,-1) or V(1,-1) or DCY(0,-1)
///                                    ###
///     @ 0x00070                      (P)
///     # 0x00070 C30                  
///               $HCTX4x4             C30               REG          
///                                    ###
///                                    * Y(4,-1)
///                                    ###
///     @ 0x00080                      (P)
///     # 0x00080 A03                  
///               $HCTX4x4             A03               REG          
///                                    ###
///                                    * Y(-1,0)
///                                    ###
///     @ 0x00090                      (P)
///     # 0x00090 A12                  
///               $HCTX4x4             A12               REG          
///                                    ###
///                                    * U(-1,0) & V(-1,0)
///                                    ###
///     @ 0x000A0                      (P)
///     # 0x000A0 A13                  
///               $HCTX4x4             A13               REG          
///                                    ###
///                                    * Y(-1,1)
///                                    ###
///     @ 0x000B0                      (P)
///     # 0x000B0 A23                  
///               $HCTX4x4             A23               REG          
///                                    ###
///                                    * Y(-1,2)
///                                    ###
///     @ 0x000C0                      (P)
///     # 0x000C0 A30                  
///               $HCTX4x4             A30               REG          
///                                    ###
///                                    * DCU(-1,0) & DCV(-1,0)
///                                    ###
///     @ 0x000D0                      (P)
///     # 0x000D0 A31                  
///               $HCTX4x4             A31               REG          
///                                    ###
///                                    * DCI(-1,0) & DCY(-1,0)
///                                    ###
///     @ 0x000E0                      (P)
///     # 0x000E0 A32                  
///               $HCTX4x4             A32               REG          
///                                    ###
///                                    * U(-1,1) & V(-1,1)
///                                    ###
///     @ 0x000F0                      (P)
///     # 0x000F0 A33                  
///               $HCTX4x4             A33               REG          
///                                    ###
///                                    * Y(-1,3)
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End ASECTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ASECTX
#define h_ASECTX (){}

    #define     RA_ASECTX_MB                                   0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_RSVD                                 0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_D33                                  0x0020
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_B30                                  0x0030
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_B31                                  0x0040
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_B32                                  0x0050
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_B33                                  0x0060
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_C30                                  0x0070
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_A03                                  0x0080
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_A12                                  0x0090
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_A13                                  0x00A0
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_A23                                  0x00B0
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_A30                                  0x00C0
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_A31                                  0x00D0
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_A32                                  0x00E0
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_A33                                  0x00F0
    ///////////////////////////////////////////////////////////
    #define     RA_ASECTX_PIC                                  0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ASECTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[3];
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_D33;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_B30;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_B31;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_B32;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_B33;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_C30;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A03;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A12;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A13;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A23;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A30;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A31;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A32;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A33;
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_ASECTX;

    ///////////////////////////////////////////////////////////
     SIGN32 ASECTX_drvrd(SIE_ASECTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ASECTX_drvwr(SIE_ASECTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ASECTX_reset(SIE_ASECTX *p);
     SIGN32 ASECTX_cmp  (SIE_ASECTX *p, SIE_ASECTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ASECTX_check(p,pie,pfx,hLOG) ASECTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ASECTX_print(p,    pfx,hLOG) ASECTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ASECTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ASE_ND_CTX              biu              (4,4)
///     ###
///     * RF64 context for ASE (to store Neighbor D in MBAFF mode)
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 RSVD                 
///               $LUT64b              RSVD              REG          
///                                    ###
///                                    * Reserved for RF64MB
///                                    * [64:191]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 A03m                 
///               $HCTX4x4             A03m              REG          
///                                    ###
///                                    * Neighbor D for when locating at A03 in MBAFF mode
///                                    * [192:255]
///                                    ###
///     @ 0x00018                      (P)
///     # 0x00018 RSVD1                
///               $LUT64b              RSVD1             REG      [32]
///                                    ###
///                                    * [2240:2367]
///                                    ###
///     @ 0x00118                      (P)
///     # 0x00118 A13m                 
///               $HCTX4x4             A13m              REG          
///                                    ###
///                                    * Neighbor D for when locating at A13 in MBAFF mode
///                                    * [2368:2495]
///                                    ###
///     @ 0x00128                      (P)
///     # 0x00128 A23m                 
///               $HCTX4x4             A23m              REG          
///                                    ###
///                                    * Neighbor D for when locating at A23 in MBAFF mode
///                                    * [2496:4097]
///                                    ###
///     @ 0x00138                      (P)
///     # 0x00138 RSVD2                
///               $LUT64b              RSVD2             REG      [25]
///                                    ###
///                                    * Padding to the end
///                                    * End ASE_ND_CTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ASE_ND_CTX
#define h_ASE_ND_CTX (){}

    #define     RA_ASE_ND_CTX_RSVD                             0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_ASE_ND_CTX_A03m                             0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_ASE_ND_CTX_RSVD1                            0x0018
    ///////////////////////////////////////////////////////////
    #define     RA_ASE_ND_CTX_A13m                             0x0118
    ///////////////////////////////////////////////////////////
    #define     RA_ASE_ND_CTX_A23m                             0x0128
    ///////////////////////////////////////////////////////////
    #define     RA_ASE_ND_CTX_RSVD2                            0x0138
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ASE_ND_CTX {
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A03m;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD1[32];
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A13m;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_A23m;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD2[25];
    ///////////////////////////////////////////////////////////
    } SIE_ASE_ND_CTX;

    ///////////////////////////////////////////////////////////
     SIGN32 ASE_ND_CTX_drvrd(SIE_ASE_ND_CTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ASE_ND_CTX_drvwr(SIE_ASE_ND_CTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ASE_ND_CTX_reset(SIE_ASE_ND_CTX *p);
     SIGN32 ASE_ND_CTX_cmp  (SIE_ASE_ND_CTX *p, SIE_ASE_ND_CTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ASE_ND_CTX_check(p,pie,pfx,hLOG) ASE_ND_CTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ASE_ND_CTX_print(p,    pfx,hLOG) ASE_ND_CTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ASE_ND_CTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FOPCTX                  biu              (4,4)
///     ###
///     * RF64 context for FOP
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * Macroblock-level information; reprogrammed by FIGO at the start of every macroblock
///                                    * [64:447]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 QPX0                 
///               $RF64QP              QPX0              REG          
///                                    ###
///                                    * QP of current MB
///                                    ###
///     @ 0x00010                      (P)
///     # 0x00010 QPX1                 
///               $RF64QP              QPX1              REG          
///                                    ###
///                                    * QP of current MB
///                                    ###
///     @ 0x00018                      (P)
///     # 0x00018 QPA0                 
///               $RF64QP              QPA0              REG          
///                                    ###
///                                    * QP of even MB of left MB pair
///                                    ###
///     @ 0x00020                      (P)
///     # 0x00020 QPA1                 
///               $RF64QP              QPA1              REG          
///                                    ###
///                                    * QP of odd MB of left MB pair
///                                    ###
///     @ 0x00028                      (P)
///     # 0x00028 QPB0                 
///               $RF64QP              QPB0              REG          
///                                    ###
///                                    * QP of even MB of top MB pair
///                                    ###
///     @ 0x00030                      (P)
///     # 0x00030 QPB1                 
///               $RF64QP              QPB1              REG          
///                                    ###
///                                    * QP of odd MB of top MB pair
///                                    * [448:831]
///                                    ###
///     @ 0x00038                      (P)
///     # 0x00038 BlkX                 
///               $HCTX4x4             BlkX              REG          
///                                    ###
///                                    * Context for current block
///                                    ###
///     @ 0x00048                      (P)
///     # 0x00048 BlkA                 
///               $HCTX4x4             BlkA              REG          
///                                    ###
///                                    * Context for left neighbor
///                                    ###
///     @ 0x00058                      (P)
///     # 0x00058 BlkB                 
///               $HCTX4x4             BlkB              REG          
///                                    ###
///                                    * Context for top block
///                                    ###
///     @ 0x00068                      (P)
///     # 0x00068 BlkC                 
///               $HCTX4x4             BlkC              REG          
///                                    ###
///                                    * Block context used in VC-1 main profile P exception 2.
///                                    * [960:2047]
///                                    ###
///     @ 0x00078                      (P)
///     # 0x00078 RSVD                 
///               $LUT64b              RSVD              REG      [17]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End RF64CTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FOPCTX
#define h_FOPCTX (){}

    #define     RA_FOPCTX_MB                                   0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_QPX0                                 0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_QPX1                                 0x0010
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_QPA0                                 0x0018
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_QPA1                                 0x0020
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_QPB0                                 0x0028
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_QPB1                                 0x0030
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_BlkX                                 0x0038
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_BlkA                                 0x0048
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_BlkB                                 0x0058
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_BlkC                                 0x0068
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_RSVD                                 0x0078
    ///////////////////////////////////////////////////////////
    #define     RA_FOPCTX_PIC                                  0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FOPCTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_RF64QP                                       ie_QPX0;
    ///////////////////////////////////////////////////////////
              SIE_RF64QP                                       ie_QPX1;
    ///////////////////////////////////////////////////////////
              SIE_RF64QP                                       ie_QPA0;
    ///////////////////////////////////////////////////////////
              SIE_RF64QP                                       ie_QPA1;
    ///////////////////////////////////////////////////////////
              SIE_RF64QP                                       ie_QPB0;
    ///////////////////////////////////////////////////////////
              SIE_RF64QP                                       ie_QPB1;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_BlkX;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_BlkA;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_BlkB;
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_BlkC;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[17];
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_FOPCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 FOPCTX_drvrd(SIE_FOPCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FOPCTX_drvwr(SIE_FOPCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FOPCTX_reset(SIE_FOPCTX *p);
     SIGN32 FOPCTX_cmp  (SIE_FOPCTX *p, SIE_FOPCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FOPCTX_check(p,pie,pfx,hLOG) FOPCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FOPCTX_print(p,    pfx,hLOG) FOPCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FOPCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE pmvScale                biu              (4,4)
///     ###
///     * Scaling factors for PMV calculation (for AVS)
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 32 scaleA                    
///                                    ###
///                                    * Scaling factor for MVs of block A
///                                    ###
///     @ 0x00004                      (P)
///               %unsigned 32 scaleB                    
///                                    ###
///                                    * Scaling factor for MVs of block B
///                                    * [64:127]
///                                    ###
///     @ 0x00008                      (P)
///               %unsigned 32 scaleC                    
///                                    ###
///                                    * Scaling factor for MVs of block C
///                                    ###
///     @ 0x0000C                      (P)
///               %unsigned 32 scaleD                    
///                                    ###
///                                    * Scaling factor for MVs of block D
///                                    * End pmvScale
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      16B, bits:     128b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_pmvScale
#define h_pmvScale (){}

    #define     BA_pmvScale_scaleA                             0x0000
    #define     B16pmvScale_scaleA                             0x0000
    #define   LSb32pmvScale_scaleA                                0
    #define   LSb16pmvScale_scaleA                                0
    #define       bpmvScale_scaleA                             32
    #define   MSK32pmvScale_scaleA                                0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    #define     BA_pmvScale_scaleB                             0x0004
    #define     B16pmvScale_scaleB                             0x0004
    #define   LSb32pmvScale_scaleB                                0
    #define   LSb16pmvScale_scaleB                                0
    #define       bpmvScale_scaleB                             32
    #define   MSK32pmvScale_scaleB                                0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    #define     BA_pmvScale_scaleC                             0x0008
    #define     B16pmvScale_scaleC                             0x0008
    #define   LSb32pmvScale_scaleC                                0
    #define   LSb16pmvScale_scaleC                                0
    #define       bpmvScale_scaleC                             32
    #define   MSK32pmvScale_scaleC                                0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    #define     BA_pmvScale_scaleD                             0x000C
    #define     B16pmvScale_scaleD                             0x000C
    #define   LSb32pmvScale_scaleD                                0
    #define   LSb16pmvScale_scaleD                                0
    #define       bpmvScale_scaleD                             32
    #define   MSK32pmvScale_scaleD                                0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_pmvScale {
    ///////////////////////////////////////////////////////////
    #define   GET32pmvScale_scaleA(r32)                        _BFGET_(r32,31, 0)
    #define   SET32pmvScale_scaleA(r32,v)                      _BFSET_(r32,31, 0,v)

            UNSG32 u_scaleA                                    : 32;
    ///////////////////////////////////////////////////////////
    #define   GET32pmvScale_scaleB(r32)                        _BFGET_(r32,31, 0)
    #define   SET32pmvScale_scaleB(r32,v)                      _BFSET_(r32,31, 0,v)

            UNSG32 u_scaleB                                    : 32;
    ///////////////////////////////////////////////////////////
    #define   GET32pmvScale_scaleC(r32)                        _BFGET_(r32,31, 0)
    #define   SET32pmvScale_scaleC(r32,v)                      _BFSET_(r32,31, 0,v)

            UNSG32 u_scaleC                                    : 32;
    ///////////////////////////////////////////////////////////
    #define   GET32pmvScale_scaleD(r32)                        _BFGET_(r32,31, 0)
    #define   SET32pmvScale_scaleD(r32,v)                      _BFSET_(r32,31, 0,v)

            UNSG32 u_scaleD                                    : 32;
    ///////////////////////////////////////////////////////////
    } SIE_pmvScale;

    ///////////////////////////////////////////////////////////
     SIGN32 pmvScale_drvrd(SIE_pmvScale *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 pmvScale_drvwr(SIE_pmvScale *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void pmvScale_reset(SIE_pmvScale *p);
     SIGN32 pmvScale_cmp  (SIE_pmvScale *p, SIE_pmvScale *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define pmvScale_check(p,pie,pfx,hLOG) pmvScale_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define pmvScale_print(p,    pfx,hLOG) pmvScale_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: pmvScale
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE PMVCTX                  biu              (4,4)
///     ###
///     * RF64 context for PMV
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * Macroblock-level information; reprogrammed by FIGO at the start of every macroblock
///                                    * [64:447]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 RSVD0                
///               $LUT64b              RSVD0             REG       [6]
///                                    ###
///                                    * padding to align block-level context
///                                    * [448:1087]
///                                    ###
///     @ 0x00038                      (P)
///     # 0x00038 BlkX                 
///               $FCTX                BlkX              REG          
///                                    ###
///                                    * Context for current block
///                                    ###
///     @ 0x00040                      (P)
///     # 0x00040 ChromaMV             
///               $MV                  ChromaMV          REG          
///                                    ###
///                                    * MPEG-4 chroma MV
///                                    ###
///     @ 0x00044                      (P)
///               %unsigned 32 RSVDX                     
///                                    ###
///                                    * padding to 128-bit
///                                    ###
///     @ 0x00048                      (P)
///     # 0x00048 BlkA                 
///               $FCTX                BlkA              REG          
///                                    ###
///                                    * Context for left neighbor
///                                    ###
///     @ 0x00050                      (P)
///     # 0x00050 BlkD                 
///               $FCTX                BlkD              REG          
///                                    ###
///                                    * Context for upper-left neighbor
///                                    ###
///     @ 0x00058                      (P)
///     # 0x00058 BlkB                 
///               $FCTX                BlkB              REG          
///                                    ###
///                                    * Context for top neighbor
///                                    ###
///     @ 0x00060                      (P)
///     # 0x00060 BlkC                 
///               $FCTX                BlkC              REG          
///                                    ###
///                                    * Context for upper-right neighbor
///                                    ###
///     @ 0x00068                      (P)
///     # 0x00068 BlkA1                
///               $FCTX                BlkA1             REG          
///                                    ###
///                                    * Context for 2nd left neighbor, interlace frame
///                                    ###
///     @ 0x00070                      (P)
///     # 0x00070 BlkD1                
///               $FCTX                BlkD1             REG          
///                                    ###
///                                    * Context for 2nd upper-left neighbor, interlace frame
///                                    ###
///     @ 0x00078                      (P)
///     # 0x00078 BlkB1                
///               $FCTX                BlkB1             REG          
///                                    ###
///                                    * Context for 2nd top neighbor, interlace frame
///                                    ###
///     @ 0x00080                      (P)
///     # 0x00080 BlkC1                
///               $FCTX                BlkC1             REG          
///                                    ###
///                                    * Context for 2nd up-right neighbor, interlace frame only
///                                    * [1088:1727]
///                                    ###
///     @ 0x00088                      (P)
///               %unsigned 32 pmvScale_0i               
///               %unsigned 32 pmvScale_1i               
///               %unsigned 32 pmvScale_2i               
///               %unsigned 32 pmvScale_3i               
///               %unsigned 32 pmvScale_4i               
///               %unsigned 32 pmvScale_5i               
///               %unsigned 32 pmvScale_6i               
///               %unsigned 32 pmvScale_7i               
///               %unsigned 32 pmvScale_8i               
///               %unsigned 32 pmvScale_9i               
///               %unsigned 32 pmvScale_10i              
///               %unsigned 32 pmvScale_11i              
///               %unsigned 32 pmvScale_12i              
///               %unsigned 32 pmvScale_13i              
///               %unsigned 32 pmvScale_14i              
///               %unsigned 32 pmvScale_15i              
///               %unsigned 32 pmvScale_16i              
///               %unsigned 32 pmvScale_17i              
///               %unsigned 32 pmvScale_18i              
///               %unsigned 32 pmvScale_19i              
///                                    ###
///                                    * Scale candidates for PMV.
///                                    * [1727:2047]
///                                    ###
///     @ 0x000D8                      (P)
///     # 0x000D8 RSVD                 
///               $LUT64b              RSVD              REG       [5]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End PMVCTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_PMVCTX
#define h_PMVCTX (){}

    #define     RA_PMVCTX_MB                                   0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_RSVD0                                0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkX                                 0x0038
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_ChromaMV                             0x0040
    ///////////////////////////////////////////////////////////

    #define     BA_PMVCTX_RSVDX                                0x0044
    #define     B16PMVCTX_RSVDX                                0x0044
    #define   LSb32PMVCTX_RSVDX                                   0
    #define   LSb16PMVCTX_RSVDX                                   0
    #define       bPMVCTX_RSVDX                                32
    #define   MSK32PMVCTX_RSVDX                                   0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkA                                 0x0048
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkD                                 0x0050
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkB                                 0x0058
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkC                                 0x0060
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkA1                                0x0068
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkD1                                0x0070
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkB1                                0x0078
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_BlkC1                                0x0080
    ///////////////////////////////////////////////////////////

    #define     BA_PMVCTX_pmvScale_0i                          0x0088
    #define     B16PMVCTX_pmvScale_0i                          0x0088
    #define   LSb32PMVCTX_pmvScale_0i                             0
    #define   LSb16PMVCTX_pmvScale_0i                             0
    #define       bPMVCTX_pmvScale_0i                          32
    #define   MSK32PMVCTX_pmvScale_0i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_1i                          0x008C
    #define     B16PMVCTX_pmvScale_1i                          0x008C
    #define   LSb32PMVCTX_pmvScale_1i                             0
    #define   LSb16PMVCTX_pmvScale_1i                             0
    #define       bPMVCTX_pmvScale_1i                          32
    #define   MSK32PMVCTX_pmvScale_1i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_2i                          0x0090
    #define     B16PMVCTX_pmvScale_2i                          0x0090
    #define   LSb32PMVCTX_pmvScale_2i                             0
    #define   LSb16PMVCTX_pmvScale_2i                             0
    #define       bPMVCTX_pmvScale_2i                          32
    #define   MSK32PMVCTX_pmvScale_2i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_3i                          0x0094
    #define     B16PMVCTX_pmvScale_3i                          0x0094
    #define   LSb32PMVCTX_pmvScale_3i                             0
    #define   LSb16PMVCTX_pmvScale_3i                             0
    #define       bPMVCTX_pmvScale_3i                          32
    #define   MSK32PMVCTX_pmvScale_3i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_4i                          0x0098
    #define     B16PMVCTX_pmvScale_4i                          0x0098
    #define   LSb32PMVCTX_pmvScale_4i                             0
    #define   LSb16PMVCTX_pmvScale_4i                             0
    #define       bPMVCTX_pmvScale_4i                          32
    #define   MSK32PMVCTX_pmvScale_4i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_5i                          0x009C
    #define     B16PMVCTX_pmvScale_5i                          0x009C
    #define   LSb32PMVCTX_pmvScale_5i                             0
    #define   LSb16PMVCTX_pmvScale_5i                             0
    #define       bPMVCTX_pmvScale_5i                          32
    #define   MSK32PMVCTX_pmvScale_5i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_6i                          0x00A0
    #define     B16PMVCTX_pmvScale_6i                          0x00A0
    #define   LSb32PMVCTX_pmvScale_6i                             0
    #define   LSb16PMVCTX_pmvScale_6i                             0
    #define       bPMVCTX_pmvScale_6i                          32
    #define   MSK32PMVCTX_pmvScale_6i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_7i                          0x00A4
    #define     B16PMVCTX_pmvScale_7i                          0x00A4
    #define   LSb32PMVCTX_pmvScale_7i                             0
    #define   LSb16PMVCTX_pmvScale_7i                             0
    #define       bPMVCTX_pmvScale_7i                          32
    #define   MSK32PMVCTX_pmvScale_7i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_8i                          0x00A8
    #define     B16PMVCTX_pmvScale_8i                          0x00A8
    #define   LSb32PMVCTX_pmvScale_8i                             0
    #define   LSb16PMVCTX_pmvScale_8i                             0
    #define       bPMVCTX_pmvScale_8i                          32
    #define   MSK32PMVCTX_pmvScale_8i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_9i                          0x00AC
    #define     B16PMVCTX_pmvScale_9i                          0x00AC
    #define   LSb32PMVCTX_pmvScale_9i                             0
    #define   LSb16PMVCTX_pmvScale_9i                             0
    #define       bPMVCTX_pmvScale_9i                          32
    #define   MSK32PMVCTX_pmvScale_9i                             0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_10i                         0x00B0
    #define     B16PMVCTX_pmvScale_10i                         0x00B0
    #define   LSb32PMVCTX_pmvScale_10i                            0
    #define   LSb16PMVCTX_pmvScale_10i                            0
    #define       bPMVCTX_pmvScale_10i                         32
    #define   MSK32PMVCTX_pmvScale_10i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_11i                         0x00B4
    #define     B16PMVCTX_pmvScale_11i                         0x00B4
    #define   LSb32PMVCTX_pmvScale_11i                            0
    #define   LSb16PMVCTX_pmvScale_11i                            0
    #define       bPMVCTX_pmvScale_11i                         32
    #define   MSK32PMVCTX_pmvScale_11i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_12i                         0x00B8
    #define     B16PMVCTX_pmvScale_12i                         0x00B8
    #define   LSb32PMVCTX_pmvScale_12i                            0
    #define   LSb16PMVCTX_pmvScale_12i                            0
    #define       bPMVCTX_pmvScale_12i                         32
    #define   MSK32PMVCTX_pmvScale_12i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_13i                         0x00BC
    #define     B16PMVCTX_pmvScale_13i                         0x00BC
    #define   LSb32PMVCTX_pmvScale_13i                            0
    #define   LSb16PMVCTX_pmvScale_13i                            0
    #define       bPMVCTX_pmvScale_13i                         32
    #define   MSK32PMVCTX_pmvScale_13i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_14i                         0x00C0
    #define     B16PMVCTX_pmvScale_14i                         0x00C0
    #define   LSb32PMVCTX_pmvScale_14i                            0
    #define   LSb16PMVCTX_pmvScale_14i                            0
    #define       bPMVCTX_pmvScale_14i                         32
    #define   MSK32PMVCTX_pmvScale_14i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_15i                         0x00C4
    #define     B16PMVCTX_pmvScale_15i                         0x00C4
    #define   LSb32PMVCTX_pmvScale_15i                            0
    #define   LSb16PMVCTX_pmvScale_15i                            0
    #define       bPMVCTX_pmvScale_15i                         32
    #define   MSK32PMVCTX_pmvScale_15i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_16i                         0x00C8
    #define     B16PMVCTX_pmvScale_16i                         0x00C8
    #define   LSb32PMVCTX_pmvScale_16i                            0
    #define   LSb16PMVCTX_pmvScale_16i                            0
    #define       bPMVCTX_pmvScale_16i                         32
    #define   MSK32PMVCTX_pmvScale_16i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_17i                         0x00CC
    #define     B16PMVCTX_pmvScale_17i                         0x00CC
    #define   LSb32PMVCTX_pmvScale_17i                            0
    #define   LSb16PMVCTX_pmvScale_17i                            0
    #define       bPMVCTX_pmvScale_17i                         32
    #define   MSK32PMVCTX_pmvScale_17i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_18i                         0x00D0
    #define     B16PMVCTX_pmvScale_18i                         0x00D0
    #define   LSb32PMVCTX_pmvScale_18i                            0
    #define   LSb16PMVCTX_pmvScale_18i                            0
    #define       bPMVCTX_pmvScale_18i                         32
    #define   MSK32PMVCTX_pmvScale_18i                            0xFFFFFFFF

    #define     BA_PMVCTX_pmvScale_19i                         0x00D4
    #define     B16PMVCTX_pmvScale_19i                         0x00D4
    #define   LSb32PMVCTX_pmvScale_19i                            0
    #define   LSb16PMVCTX_pmvScale_19i                            0
    #define       bPMVCTX_pmvScale_19i                         32
    #define   MSK32PMVCTX_pmvScale_19i                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_RSVD                                 0x00D8
    ///////////////////////////////////////////////////////////
    #define     RA_PMVCTX_PIC                                  0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_PMVCTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD0[6];
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkX;
    ///////////////////////////////////////////////////////////
              SIE_MV                                           ie_ChromaMV;
    ///////////////////////////////////////////////////////////
    #define   GET32PMVCTX_RSVDX(r32)                           _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_RSVDX(r32,v)                         _BFSET_(r32,31, 0,v)

            UNSG32 u_RSVDX                                     : 32;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkA;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkD;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkB;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkC;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkA1;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkD1;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkB1;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkC1;
    ///////////////////////////////////////////////////////////
    #define   GET32PMVCTX_pmvScale_0i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_0i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_0i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_1i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_1i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_1i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_2i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_2i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_2i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_3i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_3i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_3i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_4i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_4i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_4i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_5i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_5i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_5i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_6i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_6i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_6i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_7i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_7i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_7i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_8i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_8i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_8i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_9i(r32)                     _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_9i(r32,v)                   _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_9i                               : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_10i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_10i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_10i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_11i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_11i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_11i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_12i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_12i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_12i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_13i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_13i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_13i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_14i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_14i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_14i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_15i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_15i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_15i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_16i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_16i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_16i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_17i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_17i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_17i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_18i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_18i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_18i                              : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32PMVCTX_pmvScale_19i(r32)                    _BFGET_(r32,31, 0)
    #define   SET32PMVCTX_pmvScale_19i(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_pmvScale_19i                              : 32;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[5];
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_PMVCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 PMVCTX_drvrd(SIE_PMVCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 PMVCTX_drvwr(SIE_PMVCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void PMVCTX_reset(SIE_PMVCTX *p);
     SIGN32 PMVCTX_cmp  (SIE_PMVCTX *p, SIE_PMVCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define PMVCTX_check(p,pie,pfx,hLOG) PMVCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define PMVCTX_print(p,    pfx,hLOG) PMVCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: PMVCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dirMvCTX                biu              (4,4)
///     ###
///     * RF64 context for direct mode MV calculation
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * Reserved for RF64MB
///                                    * [64:447]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 RSVD0                
///               $LUT64b              RSVD0             REG       [6]
///                                    ###
///                                    * padding to align block-level context
///                                    * [448:575]
///                                    ###
///     @ 0x00038                      (P)
///     # 0x00038 BlkX                 
///               $HCTX4x4             BlkX              REG          
///                                    ###
///                                    * Context of the current block; 128-bit.
///                                    * [576:639]
///                                    ###
///     @ 0x00048                      (P)
///     # 0x00048 BlkCol               
///               $FCTX                BlkCol            REG          
///                                    ###
///                                    * Context of co-located block; 64-bit.
///                                    * [640:703]
///                                    ###
///     @ 0x00050                      (P)
///     # 0x00050 mvScale              
///               $dirMvScale          mvScale           REG          
///                                    ###
///                                    * MV scaling factor for temporal direct mode; 64 bits
///                                    * [704:1919]
///                                    ###
///     @ 0x00058                      (P)
///     # 0x00058 RSVD                 
///               $LUT64b              RSVD              REG      [19]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    * [1920:2047]
///                                    ###
///     @ 0x000F0                      (P)
///     # 0x000F0 MbPMV                
///               $HCTX4x4             MbPMV             REG          
///                                    ###
///                                    * Macroblock PMV, for spatial direct mode only
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End dirMvCTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dirMvCTX
#define h_dirMvCTX (){}

    #define     RA_dirMvCTX_MB                                 0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_dirMvCTX_RSVD0                              0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_dirMvCTX_BlkX                               0x0038
    ///////////////////////////////////////////////////////////
    #define     RA_dirMvCTX_BlkCol                             0x0048
    ///////////////////////////////////////////////////////////
    #define     RA_dirMvCTX_mvScale                            0x0050
    ///////////////////////////////////////////////////////////
    #define     RA_dirMvCTX_RSVD                               0x0058
    ///////////////////////////////////////////////////////////
    #define     RA_dirMvCTX_MbPMV                              0x00F0
    ///////////////////////////////////////////////////////////
    #define     RA_dirMvCTX_PIC                                0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dirMvCTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD0[6];
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_BlkX;
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_BlkCol;
    ///////////////////////////////////////////////////////////
              SIE_dirMvScale                                   ie_mvScale;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[19];
    ///////////////////////////////////////////////////////////
              SIE_HCTX4x4                                      ie_MbPMV;
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_dirMvCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 dirMvCTX_drvrd(SIE_dirMvCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dirMvCTX_drvwr(SIE_dirMvCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dirMvCTX_reset(SIE_dirMvCTX *p);
     SIGN32 dirMvCTX_cmp  (SIE_dirMvCTX *p, SIE_dirMvCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dirMvCTX_check(p,pie,pfx,hLOG) dirMvCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dirMvCTX_print(p,    pfx,hLOG) dirMvCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dirMvCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE vcMsgCTX                biu              (4,4)
///     ###
///     * RF64 context for the vcMsg extension
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * 64b macroblock-level parameter
///                                    * [64:447]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 RSVD0                
///               $LUT64b              RSVD0             REG       [6]
///                                    ###
///                                    * padding to align block-level context
///                                    * [448:511]
///                                    ###
///     @ 0x00038                      (P)
///     # 0x00038 blkX                 
///               $FCTX                blkX              REG          
///                                    ###
///                                    * Motion information context of current partition
///                                    * [512:2047]
///                                    ###
///     @ 0x00040                      (P)
///     # 0x00040 RSVD                 
///               $LUT64b              RSVD              REG      [24]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End vcMsgCTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_vcMsgCTX
#define h_vcMsgCTX (){}

    #define     RA_vcMsgCTX_MB                                 0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_vcMsgCTX_RSVD0                              0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_vcMsgCTX_blkX                               0x0038
    ///////////////////////////////////////////////////////////
    #define     RA_vcMsgCTX_RSVD                               0x0040
    ///////////////////////////////////////////////////////////
    #define     RA_vcMsgCTX_PIC                                0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_vcMsgCTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD0[6];
    ///////////////////////////////////////////////////////////
              SIE_FCTX                                         ie_blkX;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[24];
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_vcMsgCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 vcMsgCTX_drvrd(SIE_vcMsgCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 vcMsgCTX_drvwr(SIE_vcMsgCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void vcMsgCTX_reset(SIE_vcMsgCTX *p);
     SIGN32 vcMsgCTX_cmp  (SIE_vcMsgCTX *p, SIE_vcMsgCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define vcMsgCTX_check(p,pie,pfx,hLOG) vcMsgCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define vcMsgCTX_print(p,    pfx,hLOG) vcMsgCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: vcMsgCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE vldCTX                  biu              (4,4)
///     ###
///     * RF64 context for vld
///     * [0:63]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 MB                   
///               $RF64MB              MB                REG          
///                                    ###
///                                    * Macroblock-level information; reprogrammed by FIGO at the start of every macroblock
///                                    * [64:2047]
///                                    ###
///     @ 0x00008                      (P)
///     # 0x00008 RSVD                 
///               $LUT64b              RSVD              REG      [31]
///                                    ###
///                                    * padding to 2048-bit boundary
///                                    * [2048:4095]
///                                    ###
///     @ 0x00100                      (P)
///     # 0x00100 PIC                  
///               $RF64PIC             PIC               REG          
///                                    ###
///                                    * Picture-level Parameters for ALU64 extensions.
///                                    * End vldCTX
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     512B, bits:    4096b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_vldCTX
#define h_vldCTX (){}

    #define     RA_vldCTX_MB                                   0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_vldCTX_RSVD                                 0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_vldCTX_PIC                                  0x0100
    ///////////////////////////////////////////////////////////

    typedef struct SIE_vldCTX {
    ///////////////////////////////////////////////////////////
              SIE_RF64MB                                       ie_MB;
    ///////////////////////////////////////////////////////////
              SIE_LUT64b                                       ie_RSVD[31];
    ///////////////////////////////////////////////////////////
              SIE_RF64PIC                                      ie_PIC;
    ///////////////////////////////////////////////////////////
    } SIE_vldCTX;

    ///////////////////////////////////////////////////////////
     SIGN32 vldCTX_drvrd(SIE_vldCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 vldCTX_drvwr(SIE_vldCTX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void vldCTX_reset(SIE_vldCTX *p);
     SIGN32 vldCTX_cmp  (SIE_vldCTX *p, SIE_vldCTX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define vldCTX_check(p,pie,pfx,hLOG) vldCTX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define vldCTX_print(p,    pfx,hLOG) vldCTX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: vldCTX
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ClkRstBiu               biu              (4,4)
///     ###
///     * Common Biu Unit used for block level reset and clock gating control
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 CRCtl                (P)
///               ###
///               * Clock Reset Control Register
///               ###
///               %unsigned 1  rst                       0x1
///                                    ###
///                                    * Software reset. The reset signal is active low.
///                                    * 0 -> the block will be under reset.
///                                    * 1-> the block will be out of reset.
///                                    ###
///               %unsigned 1  swClk_en                  0x1
///                                    ###
///                                    * Software controlled clock enable.
///                                    * 0 -> The corresponding block will be disabled (gated)
///                                    * 1 -> The corresponding clock will be enabled (ungated)
///                                    ###
///               %unsigned 1  dyCG_en                   0x1
///                                    ###
///                                    * This is used to control (enalbe/disable) the HW self dynamic clock gating unit.
///                                    * 0 -> the dynamic clock gating will be disabled (the clock can not be turned off by dynamic clock gating unit).
///                                    * 1 -> the dynamic clock gating will be enabled (the clock can be dynamically turned on/off by the dynamic clock control unit).
///                                    * Here is the glue logic to generate the block level clock enable signal.
///                                    * ClkEn = swClk_en & (~dyCG_en | dyClk_en).
///                                    * swClk_en and dyCG_en are from this biu, and dyClk_en is the signal generated by the dynamic clock control unit.
///                                    * End of ClkRstBiu
///                                    ###
///               %%        29         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       3b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ClkRstBiu
#define h_ClkRstBiu (){}

    #define     RA_ClkRstBiu_CRCtl                             0x0000

    #define     BA_ClkRstBiu_CRCtl_rst                         0x0000
    #define     B16ClkRstBiu_CRCtl_rst                         0x0000
    #define   LSb32ClkRstBiu_CRCtl_rst                            0
    #define   LSb16ClkRstBiu_CRCtl_rst                            0
    #define       bClkRstBiu_CRCtl_rst                         1
    #define   MSK32ClkRstBiu_CRCtl_rst                            0x00000001

    #define     BA_ClkRstBiu_CRCtl_swClk_en                    0x0000
    #define     B16ClkRstBiu_CRCtl_swClk_en                    0x0000
    #define   LSb32ClkRstBiu_CRCtl_swClk_en                       1
    #define   LSb16ClkRstBiu_CRCtl_swClk_en                       1
    #define       bClkRstBiu_CRCtl_swClk_en                    1
    #define   MSK32ClkRstBiu_CRCtl_swClk_en                       0x00000002

    #define     BA_ClkRstBiu_CRCtl_dyCG_en                     0x0000
    #define     B16ClkRstBiu_CRCtl_dyCG_en                     0x0000
    #define   LSb32ClkRstBiu_CRCtl_dyCG_en                        2
    #define   LSb16ClkRstBiu_CRCtl_dyCG_en                        2
    #define       bClkRstBiu_CRCtl_dyCG_en                     1
    #define   MSK32ClkRstBiu_CRCtl_dyCG_en                        0x00000004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ClkRstBiu {
    ///////////////////////////////////////////////////////////
    #define   GET32ClkRstBiu_CRCtl_rst(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32ClkRstBiu_CRCtl_rst(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16ClkRstBiu_CRCtl_rst(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16ClkRstBiu_CRCtl_rst(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32ClkRstBiu_CRCtl_swClk_en(r32)               _BFGET_(r32, 1, 1)
    #define   SET32ClkRstBiu_CRCtl_swClk_en(r32,v)             _BFSET_(r32, 1, 1,v)
    #define   GET16ClkRstBiu_CRCtl_swClk_en(r16)               _BFGET_(r16, 1, 1)
    #define   SET16ClkRstBiu_CRCtl_swClk_en(r16,v)             _BFSET_(r16, 1, 1,v)

    #define   GET32ClkRstBiu_CRCtl_dyCG_en(r32)                _BFGET_(r32, 2, 2)
    #define   SET32ClkRstBiu_CRCtl_dyCG_en(r32,v)              _BFSET_(r32, 2, 2,v)
    #define   GET16ClkRstBiu_CRCtl_dyCG_en(r16)                _BFGET_(r16, 2, 2)
    #define   SET16ClkRstBiu_CRCtl_dyCG_en(r16,v)              _BFSET_(r16, 2, 2,v)

    #define     w32ClkRstBiu_CRCtl                             {\
            UNSG32 uCRCtl_rst                                  :  1;\
            UNSG32 uCRCtl_swClk_en                             :  1;\
            UNSG32 uCRCtl_dyCG_en                              :  1;\
            UNSG32 RSVDx0_b3                                   : 29;\
          }
    union { UNSG32 u32ClkRstBiu_CRCtl;
            struct w32ClkRstBiu_CRCtl;
          };
    ///////////////////////////////////////////////////////////
    } SIE_ClkRstBiu;

    typedef union  T32ClkRstBiu_CRCtl
          { UNSG32 u32;
            struct w32ClkRstBiu_CRCtl;
                 } T32ClkRstBiu_CRCtl;
    ///////////////////////////////////////////////////////////

    typedef union  TClkRstBiu_CRCtl
          { UNSG32 u32[1];
            struct {
            struct w32ClkRstBiu_CRCtl;
                   };
                 } TClkRstBiu_CRCtl;

    ///////////////////////////////////////////////////////////
     SIGN32 ClkRstBiu_drvrd(SIE_ClkRstBiu *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ClkRstBiu_drvwr(SIE_ClkRstBiu *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ClkRstBiu_reset(SIE_ClkRstBiu *p);
     SIGN32 ClkRstBiu_cmp  (SIE_ClkRstBiu *p, SIE_ClkRstBiu *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ClkRstBiu_check(p,pie,pfx,hLOG) ClkRstBiu_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ClkRstBiu_print(p,    pfx,hLOG) ClkRstBiu_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ClkRstBiu
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE vProDHub                                 (4,4)
///     ###
///     * dHub channel ID assignment and channel size configurations
///     ###
///     # # ----------------------------------------------------------
///               : ChannelNum         0xC
///                            ###
///                            * Bank[0], 4KByte
///                            ###
///               : ID_CPU_RD          0x0
///               : SIZE_CPU_RD_CMD    0x20
///               : SIZE_CPU_RD_DAT    0x80
///                            ###
///                            * CPU read channel; doubles as M2H copy channel
///                            ###
///               : ID_CPU_WR          0x1
///               : SIZE_CPU_WR_CMD    0x20
///               : SIZE_CPU_WR_DAT    0x200
///                            ###
///                            * CPU write channel; doubles as H2M copy channel
///                            ###
///               : ID_BIU_CFG         0x2
///               : SIZE_BIU_CFG_CMD   0x100
///               : SIZE_BIU_CFG_DAT   0x80
///                            ###
///                            * vPro BIU config channel
///                            ###
///               : ID_VFMT_WR         0x3
///               : SIZE_VFMT_WR_CMD   0x40
///               : SIZE_VFMT_WR_DAT   0x400
///                            ###
///                            * vFMT write channel
///                            ###
///               : ID_DS_RD           0x4
///               : SIZE_DS_RD_CMD     0x20
///               : SIZE_DS_RD_DAT     0x100
///                            ###
///                            * Data Streamer read channel
///                            ###
///               : ID_DS_WR           0x5
///               : SIZE_DS_WR_CMD     0x20
///               : SIZE_DS_WR_DAT     0x100
///                            ###
///                            * Data Streamer write channel
///                            ###
///               : ID_P3ALT_RD        0x6
///               : SIZE_P3ALT_RD_CMD  0x10
///               : SIZE_P3ALT_RD_DAT  0x80
///                            ###
///                            * PCube VC-1 deblocking context in; double as debugging input
///                            ###
///               : ID_P3ALT_WR        0x7
///               : SIZE_P3ALT_WR_CMD  0x10
///               : SIZE_P3ALT_WR_DAT  0x80
///                            ###
///                            * PCube VC-1 deblocking context out; doubles as debugging out
///                            ###
///               : ID_VLDX_RD         0x8
///               : SIZE_VLDX_RD_CMD   0x80
///               : SIZE_VLDX_RD_DAT   0x100
///                            ###
///                            * vldX read channel
///                            ###
///               : ID_VLD0_RD         0x9
///               : SIZE_VLD0_RD_CMD   0x80
///               : SIZE_VLD0_RD_DAT   0x100
///                            ###
///                            * Vld0 read channel
///                            ###
///               : ID_VLC_WR          0xA
///               : SIZE_VLC_WR_CMD    0x20
///               : SIZE_VLC_WR_DAT    0x100
///                            ###
///                            * VLC write channel 0
///                            ###
///               : ID_VLC1_WR         0xB
///               : SIZE_VLC1_WR_CMD   0x20
///               : SIZE_VLC1_WR_DAT   0x100
///                            ###
///                            * VLC write channel 1
///                            * Bank[1],4KByte (32Kbit)
///                            ###
///               : ID_VC_RD           0xC
///               : SIZE_VC_RD_CMD     0x100
///               : SIZE_VC_RD_DAT     0xF00
///                            ###
///                            * vCache reference read channel
///                            ###
///     @ 0x00000 Dummy                (P)
///               %unsigned 1  xxx                       0x0
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       1b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_vProDHub
#define h_vProDHub (){}

    #define        vProDHub_ChannelNum                         0xC
    #define        vProDHub_ID_CPU_RD                          0x0
    #define        vProDHub_SIZE_CPU_RD_CMD                    0x20
    #define        vProDHub_SIZE_CPU_RD_DAT                    0x80
    #define        vProDHub_ID_CPU_WR                          0x1
    #define        vProDHub_SIZE_CPU_WR_CMD                    0x20
    #define        vProDHub_SIZE_CPU_WR_DAT                    0x200
    #define        vProDHub_ID_BIU_CFG                         0x2
    #define        vProDHub_SIZE_BIU_CFG_CMD                   0x100
    #define        vProDHub_SIZE_BIU_CFG_DAT                   0x80
    #define        vProDHub_ID_VFMT_WR                         0x3
    #define        vProDHub_SIZE_VFMT_WR_CMD                   0x40
    #define        vProDHub_SIZE_VFMT_WR_DAT                   0x400
    #define        vProDHub_ID_DS_RD                           0x4
    #define        vProDHub_SIZE_DS_RD_CMD                     0x20
    #define        vProDHub_SIZE_DS_RD_DAT                     0x100
    #define        vProDHub_ID_DS_WR                           0x5
    #define        vProDHub_SIZE_DS_WR_CMD                     0x20
    #define        vProDHub_SIZE_DS_WR_DAT                     0x100
    #define        vProDHub_ID_P3ALT_RD                        0x6
    #define        vProDHub_SIZE_P3ALT_RD_CMD                  0x10
    #define        vProDHub_SIZE_P3ALT_RD_DAT                  0x80
    #define        vProDHub_ID_P3ALT_WR                        0x7
    #define        vProDHub_SIZE_P3ALT_WR_CMD                  0x10
    #define        vProDHub_SIZE_P3ALT_WR_DAT                  0x80
    #define        vProDHub_ID_VLDX_RD                         0x8
    #define        vProDHub_SIZE_VLDX_RD_CMD                   0x80
    #define        vProDHub_SIZE_VLDX_RD_DAT                   0x100
    #define        vProDHub_ID_VLD0_RD                         0x9
    #define        vProDHub_SIZE_VLD0_RD_CMD                   0x80
    #define        vProDHub_SIZE_VLD0_RD_DAT                   0x100
    #define        vProDHub_ID_VLC_WR                          0xA
    #define        vProDHub_SIZE_VLC_WR_CMD                    0x20
    #define        vProDHub_SIZE_VLC_WR_DAT                    0x100
    #define        vProDHub_ID_VLC1_WR                         0xB
    #define        vProDHub_SIZE_VLC1_WR_CMD                   0x20
    #define        vProDHub_SIZE_VLC1_WR_DAT                   0x100
    #define        vProDHub_ID_VC_RD                           0xC
    #define        vProDHub_SIZE_VC_RD_CMD                     0x100
    #define        vProDHub_SIZE_VC_RD_DAT                     0xF00
    ///////////////////////////////////////////////////////////
    #define     RA_vProDHub_Dummy                              0x0000

    #define     BA_vProDHub_Dummy_xxx                          0x0000
    #define     B16vProDHub_Dummy_xxx                          0x0000
    #define   LSb32vProDHub_Dummy_xxx                             0
    #define   LSb16vProDHub_Dummy_xxx                             0
    #define       bvProDHub_Dummy_xxx                          1
    #define   MSK32vProDHub_Dummy_xxx                             0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_vProDHub {
    ///////////////////////////////////////////////////////////
    #define   GET32vProDHub_Dummy_xxx(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32vProDHub_Dummy_xxx(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16vProDHub_Dummy_xxx(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16vProDHub_Dummy_xxx(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define     w32vProDHub_Dummy                              {\
            UNSG32 uDummy_xxx                                  :  1;\
            UNSG32 RSVDx0_b1                                   : 31;\
          }
    union { UNSG32 u32vProDHub_Dummy;
            struct w32vProDHub_Dummy;
          };
    ///////////////////////////////////////////////////////////
    } SIE_vProDHub;

    typedef union  T32vProDHub_Dummy
          { UNSG32 u32;
            struct w32vProDHub_Dummy;
                 } T32vProDHub_Dummy;
    ///////////////////////////////////////////////////////////

    typedef union  TvProDHub_Dummy
          { UNSG32 u32[1];
            struct {
            struct w32vProDHub_Dummy;
                   };
                 } TvProDHub_Dummy;

    ///////////////////////////////////////////////////////////
     SIGN32 vProDHub_drvrd(SIE_vProDHub *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 vProDHub_drvwr(SIE_vProDHub *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void vProDHub_reset(SIE_vProDHub *p);
     SIGN32 vProDHub_cmp  (SIE_vProDHub *p, SIE_vProDHub *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define vProDHub_check(p,pie,pfx,hLOG) vProDHub_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define vProDHub_print(p,    pfx,hLOG) vProDHub_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: vProDHub
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dtcmEntry                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 32 word_0i                   
///               %unsigned 32 word_1i                   
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dtcmEntry
#define h_dtcmEntry (){}

    #define     BA_dtcmEntry_word_0i                           0x0000
    #define     B16dtcmEntry_word_0i                           0x0000
    #define   LSb32dtcmEntry_word_0i                              0
    #define   LSb16dtcmEntry_word_0i                              0
    #define       bdtcmEntry_word_0i                           32
    #define   MSK32dtcmEntry_word_0i                              0xFFFFFFFF

    #define     BA_dtcmEntry_word_1i                           0x0004
    #define     B16dtcmEntry_word_1i                           0x0004
    #define   LSb32dtcmEntry_word_1i                              0
    #define   LSb16dtcmEntry_word_1i                              0
    #define       bdtcmEntry_word_1i                           32
    #define   MSK32dtcmEntry_word_1i                              0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dtcmEntry {
    ///////////////////////////////////////////////////////////
    #define   GET32dtcmEntry_word_0i(r32)                      _BFGET_(r32,31, 0)
    #define   SET32dtcmEntry_word_0i(r32,v)                    _BFSET_(r32,31, 0,v)

            UNSG32 u_word_0i                                   : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32dtcmEntry_word_1i(r32)                      _BFGET_(r32,31, 0)
    #define   SET32dtcmEntry_word_1i(r32,v)                    _BFSET_(r32,31, 0,v)

            UNSG32 u_word_1i                                   : 32;
    ///////////////////////////////////////////////////////////
    } SIE_dtcmEntry;

    ///////////////////////////////////////////////////////////
     SIGN32 dtcmEntry_drvrd(SIE_dtcmEntry *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dtcmEntry_drvwr(SIE_dtcmEntry *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dtcmEntry_reset(SIE_dtcmEntry *p);
     SIGN32 dtcmEntry_cmp  (SIE_dtcmEntry *p, SIE_dtcmEntry *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dtcmEntry_check(p,pie,pfx,hLOG) dtcmEntry_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dtcmEntry_print(p,    pfx,hLOG) dtcmEntry_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dtcmEntry
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE busAdrWin                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 adrH                 (P)
///               %unsigned 32 val                       0xFFFFFFFF
///     @ 0x00004 adrL                 (P)
///               %unsigned 32 val                       0x0
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_busAdrWin
#define h_busAdrWin (){}

    #define     RA_busAdrWin_adrH                              0x0000

    #define     BA_busAdrWin_adrH_val                          0x0000
    #define     B16busAdrWin_adrH_val                          0x0000
    #define   LSb32busAdrWin_adrH_val                             0
    #define   LSb16busAdrWin_adrH_val                             0
    #define       bbusAdrWin_adrH_val                          32
    #define   MSK32busAdrWin_adrH_val                             0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_busAdrWin_adrL                              0x0004

    #define     BA_busAdrWin_adrL_val                          0x0004
    #define     B16busAdrWin_adrL_val                          0x0004
    #define   LSb32busAdrWin_adrL_val                             0
    #define   LSb16busAdrWin_adrL_val                             0
    #define       bbusAdrWin_adrL_val                          32
    #define   MSK32busAdrWin_adrL_val                             0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_busAdrWin {
    ///////////////////////////////////////////////////////////
    #define   GET32busAdrWin_adrH_val(r32)                     _BFGET_(r32,31, 0)
    #define   SET32busAdrWin_adrH_val(r32,v)                   _BFSET_(r32,31, 0,v)

    #define     w32busAdrWin_adrH                              {\
            UNSG32 uadrH_val                                   : 32;\
          }
    union { UNSG32 u32busAdrWin_adrH;
            struct w32busAdrWin_adrH;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32busAdrWin_adrL_val(r32)                     _BFGET_(r32,31, 0)
    #define   SET32busAdrWin_adrL_val(r32,v)                   _BFSET_(r32,31, 0,v)

    #define     w32busAdrWin_adrL                              {\
            UNSG32 uadrL_val                                   : 32;\
          }
    union { UNSG32 u32busAdrWin_adrL;
            struct w32busAdrWin_adrL;
          };
    ///////////////////////////////////////////////////////////
    } SIE_busAdrWin;

    typedef union  T32busAdrWin_adrH
          { UNSG32 u32;
            struct w32busAdrWin_adrH;
                 } T32busAdrWin_adrH;
    typedef union  T32busAdrWin_adrL
          { UNSG32 u32;
            struct w32busAdrWin_adrL;
                 } T32busAdrWin_adrL;
    ///////////////////////////////////////////////////////////

    typedef union  TbusAdrWin_adrH
          { UNSG32 u32[1];
            struct {
            struct w32busAdrWin_adrH;
                   };
                 } TbusAdrWin_adrH;
    typedef union  TbusAdrWin_adrL
          { UNSG32 u32[1];
            struct {
            struct w32busAdrWin_adrL;
                   };
                 } TbusAdrWin_adrL;

    ///////////////////////////////////////////////////////////
     SIGN32 busAdrWin_drvrd(SIE_busAdrWin *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 busAdrWin_drvwr(SIE_busAdrWin *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void busAdrWin_reset(SIE_busAdrWin *p);
     SIGN32 busAdrWin_cmp  (SIE_busAdrWin *p, SIE_busAdrWin *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define busAdrWin_check(p,pie,pfx,hLOG) busAdrWin_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define busAdrWin_print(p,    pfx,hLOG) busAdrWin_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: busAdrWin
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE axiBusCtrl              biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 busWinArr            
///               $busAdrWin           busWinArr         REG       [8]
///     @ 0x00040 trash                (P)
///               %unsigned 32 adr                       
///                                    ###
///                                    * If the bus (AXI) write does not fall into any range specified by the 8 set of busAdrWin, it will redirect to the trash.adr in DRAM. The trash buffer size should be at least 128Byte to cover the one AXI bus burst.
///                                    * SW need to configure the 8 set of bus address window and the trash address properly to avoid vMeta write any address in DRAM which is not belong to vMeta data buffer.
///                                    ###
///     @ 0x00044 busErr               (RW-)
///               %unsigned 32 adr                       0xFFFFFFFF
///                                    ###
///                                    * Used to record the Error address when bus wirte address is not falling into any specified window.
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      72B, bits:     576b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_axiBusCtrl
#define h_axiBusCtrl (){}

    #define     RA_axiBusCtrl_busWinArr                        0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_axiBusCtrl_trash                            0x0040

    #define     BA_axiBusCtrl_trash_adr                        0x0040
    #define     B16axiBusCtrl_trash_adr                        0x0040
    #define   LSb32axiBusCtrl_trash_adr                           0
    #define   LSb16axiBusCtrl_trash_adr                           0
    #define       baxiBusCtrl_trash_adr                        32
    #define   MSK32axiBusCtrl_trash_adr                           0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_axiBusCtrl_busErr                           0x0044

    #define     BA_axiBusCtrl_busErr_adr                       0x0044
    #define     B16axiBusCtrl_busErr_adr                       0x0044
    #define   LSb32axiBusCtrl_busErr_adr                          0
    #define   LSb16axiBusCtrl_busErr_adr                          0
    #define       baxiBusCtrl_busErr_adr                       32
    #define   MSK32axiBusCtrl_busErr_adr                          0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_axiBusCtrl {
    ///////////////////////////////////////////////////////////
              SIE_busAdrWin                                    ie_busWinArr[8];
    ///////////////////////////////////////////////////////////
    #define   GET32axiBusCtrl_trash_adr(r32)                   _BFGET_(r32,31, 0)
    #define   SET32axiBusCtrl_trash_adr(r32,v)                 _BFSET_(r32,31, 0,v)

    #define     w32axiBusCtrl_trash                            {\
            UNSG32 utrash_adr                                  : 32;\
          }
    union { UNSG32 u32axiBusCtrl_trash;
            struct w32axiBusCtrl_trash;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32axiBusCtrl_busErr_adr(r32)                  _BFGET_(r32,31, 0)
    #define   SET32axiBusCtrl_busErr_adr(r32,v)                _BFSET_(r32,31, 0,v)

    #define     w32axiBusCtrl_busErr                           {\
            UNSG32 ubusErr_adr                                 : 32;\
          }
    union { UNSG32 u32axiBusCtrl_busErr;
            struct w32axiBusCtrl_busErr;
          };
    ///////////////////////////////////////////////////////////
    } SIE_axiBusCtrl;

    typedef union  T32axiBusCtrl_trash
          { UNSG32 u32;
            struct w32axiBusCtrl_trash;
                 } T32axiBusCtrl_trash;
    typedef union  T32axiBusCtrl_busErr
          { UNSG32 u32;
            struct w32axiBusCtrl_busErr;
                 } T32axiBusCtrl_busErr;
    ///////////////////////////////////////////////////////////

    typedef union  TaxiBusCtrl_trash
          { UNSG32 u32[1];
            struct {
            struct w32axiBusCtrl_trash;
                   };
                 } TaxiBusCtrl_trash;
    typedef union  TaxiBusCtrl_busErr
          { UNSG32 u32[1];
            struct {
            struct w32axiBusCtrl_busErr;
                   };
                 } TaxiBusCtrl_busErr;

    ///////////////////////////////////////////////////////////
     SIGN32 axiBusCtrl_drvrd(SIE_axiBusCtrl *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 axiBusCtrl_drvwr(SIE_axiBusCtrl *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void axiBusCtrl_reset(SIE_axiBusCtrl *p);
     SIGN32 axiBusCtrl_cmp  (SIE_axiBusCtrl *p, SIE_axiBusCtrl *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define axiBusCtrl_check(p,pie,pfx,hLOG) axiBusCtrl_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define axiBusCtrl_print(p,    pfx,hLOG) axiBusCtrl_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: axiBusCtrl
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE vProMisc                biu              (4,4)
///     ###
///     * vPro top-level BIU, providing accesses to vPro HBO and other misc configurations such as software resets
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 TCM                  (P)
///     # 0x00000 dtcm                 
///               $dtcmEntry           dtcm              MEM   [12544]
///                                    ###
///                                    * vProHbo DTCM, occupying 256KB address space; physical size is ~100KB
///                                    ###
///     @ 0x20000                      (W-)
///     #         # Stuffing bytes...
///               %% 1048576
///     @ 0x40000 HMEM                 (P)
///     # 0x40000 hmem                 
///               $dtcmEntry           hmem              MEM    [1536]
///                                    ###
///                                    * vProHub DTCM, occupying 16KB address space; physical size is 8KB
///                                    * vPro top-level module BIUs
///                                    ###
///     @ 0x44000 HBO                  (P)
///     # 0x44000 hbo                  
///               $HBO                 hbo               REG          
///     @ 0x44700 DHUB                 (P)
///     # 0x44700 dhub                 
///               $dHubReg2D           dhub              REG          
///                                    ###
///                                    * Misc register definitions
///                                    ###
///     @ 0x45700 P3Dbg                (P)
///               %unsigned 1  En                        0x0
///                                    ###
///                                    * 0 : DMA channel 0 and 1 are hooked up together for memory copy.
///                                    * 1: Dma channel 0 and 1 are hooked up with p3 debug read and write channel.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x45704 vProM2m              (P)
///               %unsigned 1  En                        0x0
///                                    ###
///                                    * 0: use dHub channels 1 & 2 for CPU read / write
///                                    * 1: use dHub channels 1 & 2 for m2m copy
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x45708 vProCfgChn           (P)
///               %unsigned 1  En                        0x1
///                                    ###
///                                    * 0: Disable dHub channel 3 for BIU write.
///                                    * 1: use dHub channel 3 for BIU write. (config channel)
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x4570C vProAxiRaMin         (P)
///               %unsigned 32 addr                      0x0
///     @ 0x45710 vProAxiRaMax         (P)
///               %unsigned 32 addr                      0x0
///     @ 0x45714 vProAxiWaMin         (P)
///               %unsigned 32 addr                      0x0
///     @ 0x45718 vProAxiWaMax         (P)
///               %unsigned 32 addr                      0x0
///     @ 0x4571C vProVFC              (P)
///     # 0x4571C VFC                  
///               $vProVFC             VFC               REG          
///     @ 0x45740 CRCHUB               (P)
///     # 0x45740 crcHub               
///               $crcHub              crcHub            REG          
///     @ 0x45940 AXIBUSCTRL           (P)
///     # 0x45940 axiBusCtrl           
///               $axiBusCtrl          axiBusCtrl        REG          
///     @ 0x45988                      (W-)
///     #         # Stuffing bytes...
///               %% 865216
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:  393216B, bits:    9915b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_vProMisc
#define h_vProMisc (){}

    #define     RA_vProMisc_TCM                                0x0000
    #define     RA_vProMisc_dtcm                               0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_HMEM                               0x40000
    #define     RA_vProMisc_hmem                               0x40000
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_HBO                                0x44000
    #define     RA_vProMisc_hbo                                0x44000
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_DHUB                               0x44700
    #define     RA_vProMisc_dhub                               0x44700
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_P3Dbg                              0x45700

    #define     BA_vProMisc_P3Dbg_En                           0x45700
    #define     B16vProMisc_P3Dbg_En                           0x45700
    #define   LSb32vProMisc_P3Dbg_En                              0
    #define   LSb16vProMisc_P3Dbg_En                              0
    #define       bvProMisc_P3Dbg_En                           1
    #define   MSK32vProMisc_P3Dbg_En                              0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_vProM2m                            0x45704

    #define     BA_vProMisc_vProM2m_En                         0x45704
    #define     B16vProMisc_vProM2m_En                         0x45704
    #define   LSb32vProMisc_vProM2m_En                            0
    #define   LSb16vProMisc_vProM2m_En                            0
    #define       bvProMisc_vProM2m_En                         1
    #define   MSK32vProMisc_vProM2m_En                            0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_vProCfgChn                         0x45708

    #define     BA_vProMisc_vProCfgChn_En                      0x45708
    #define     B16vProMisc_vProCfgChn_En                      0x45708
    #define   LSb32vProMisc_vProCfgChn_En                         0
    #define   LSb16vProMisc_vProCfgChn_En                         0
    #define       bvProMisc_vProCfgChn_En                      1
    #define   MSK32vProMisc_vProCfgChn_En                         0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_vProAxiRaMin                       0x4570C

    #define     BA_vProMisc_vProAxiRaMin_addr                  0x4570C
    #define     B16vProMisc_vProAxiRaMin_addr                  0x4570C
    #define   LSb32vProMisc_vProAxiRaMin_addr                     0
    #define   LSb16vProMisc_vProAxiRaMin_addr                     0
    #define       bvProMisc_vProAxiRaMin_addr                  32
    #define   MSK32vProMisc_vProAxiRaMin_addr                     0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_vProAxiRaMax                       0x45710

    #define     BA_vProMisc_vProAxiRaMax_addr                  0x45710
    #define     B16vProMisc_vProAxiRaMax_addr                  0x45710
    #define   LSb32vProMisc_vProAxiRaMax_addr                     0
    #define   LSb16vProMisc_vProAxiRaMax_addr                     0
    #define       bvProMisc_vProAxiRaMax_addr                  32
    #define   MSK32vProMisc_vProAxiRaMax_addr                     0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_vProAxiWaMin                       0x45714

    #define     BA_vProMisc_vProAxiWaMin_addr                  0x45714
    #define     B16vProMisc_vProAxiWaMin_addr                  0x45714
    #define   LSb32vProMisc_vProAxiWaMin_addr                     0
    #define   LSb16vProMisc_vProAxiWaMin_addr                     0
    #define       bvProMisc_vProAxiWaMin_addr                  32
    #define   MSK32vProMisc_vProAxiWaMin_addr                     0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_vProAxiWaMax                       0x45718

    #define     BA_vProMisc_vProAxiWaMax_addr                  0x45718
    #define     B16vProMisc_vProAxiWaMax_addr                  0x45718
    #define   LSb32vProMisc_vProAxiWaMax_addr                     0
    #define   LSb16vProMisc_vProAxiWaMax_addr                     0
    #define       bvProMisc_vProAxiWaMax_addr                  32
    #define   MSK32vProMisc_vProAxiWaMax_addr                     0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_vProVFC                            0x4571C
    #define     RA_vProMisc_VFC                                0x4571C
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_CRCHUB                             0x45740
    #define     RA_vProMisc_crcHub                             0x45740
    ///////////////////////////////////////////////////////////
    #define     RA_vProMisc_AXIBUSCTRL                         0x45940
    #define     RA_vProMisc_axiBusCtrl                         0x45940
    ///////////////////////////////////////////////////////////

    typedef struct SIE_vProMisc {
    ///////////////////////////////////////////////////////////
              SIE_dtcmEntry                                    ie_dtcm[12544];
             UNSG8 RSVD_dtcm                                   [30720];
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx20000                                  [131072];
    ///////////////////////////////////////////////////////////
              SIE_dtcmEntry                                    ie_hmem[1536];
             UNSG8 RSVD_hmem                                   [4096];
    ///////////////////////////////////////////////////////////
              SIE_HBO                                          ie_hbo;
    ///////////////////////////////////////////////////////////
              SIE_dHubReg2D                                    ie_dhub;
    ///////////////////////////////////////////////////////////
    #define   GET32vProMisc_P3Dbg_En(r32)                      _BFGET_(r32, 0, 0)
    #define   SET32vProMisc_P3Dbg_En(r32,v)                    _BFSET_(r32, 0, 0,v)
    #define   GET16vProMisc_P3Dbg_En(r16)                      _BFGET_(r16, 0, 0)
    #define   SET16vProMisc_P3Dbg_En(r16,v)                    _BFSET_(r16, 0, 0,v)

    #define     w32vProMisc_P3Dbg                              {\
            UNSG32 uP3Dbg_En                                   :  1;\
            UNSG32 RSVDx45700_b1                               : 31;\
          }
    union { UNSG32 u32vProMisc_P3Dbg;
            struct w32vProMisc_P3Dbg;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProMisc_vProM2m_En(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32vProMisc_vProM2m_En(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16vProMisc_vProM2m_En(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16vProMisc_vProM2m_En(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define     w32vProMisc_vProM2m                            {\
            UNSG32 uvProM2m_En                                 :  1;\
            UNSG32 RSVDx45704_b1                               : 31;\
          }
    union { UNSG32 u32vProMisc_vProM2m;
            struct w32vProMisc_vProM2m;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProMisc_vProCfgChn_En(r32)                 _BFGET_(r32, 0, 0)
    #define   SET32vProMisc_vProCfgChn_En(r32,v)               _BFSET_(r32, 0, 0,v)
    #define   GET16vProMisc_vProCfgChn_En(r16)                 _BFGET_(r16, 0, 0)
    #define   SET16vProMisc_vProCfgChn_En(r16,v)               _BFSET_(r16, 0, 0,v)

    #define     w32vProMisc_vProCfgChn                         {\
            UNSG32 uvProCfgChn_En                              :  1;\
            UNSG32 RSVDx45708_b1                               : 31;\
          }
    union { UNSG32 u32vProMisc_vProCfgChn;
            struct w32vProMisc_vProCfgChn;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProMisc_vProAxiRaMin_addr(r32)             _BFGET_(r32,31, 0)
    #define   SET32vProMisc_vProAxiRaMin_addr(r32,v)           _BFSET_(r32,31, 0,v)

    #define     w32vProMisc_vProAxiRaMin                       {\
            UNSG32 uvProAxiRaMin_addr                          : 32;\
          }
    union { UNSG32 u32vProMisc_vProAxiRaMin;
            struct w32vProMisc_vProAxiRaMin;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProMisc_vProAxiRaMax_addr(r32)             _BFGET_(r32,31, 0)
    #define   SET32vProMisc_vProAxiRaMax_addr(r32,v)           _BFSET_(r32,31, 0,v)

    #define     w32vProMisc_vProAxiRaMax                       {\
            UNSG32 uvProAxiRaMax_addr                          : 32;\
          }
    union { UNSG32 u32vProMisc_vProAxiRaMax;
            struct w32vProMisc_vProAxiRaMax;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProMisc_vProAxiWaMin_addr(r32)             _BFGET_(r32,31, 0)
    #define   SET32vProMisc_vProAxiWaMin_addr(r32,v)           _BFSET_(r32,31, 0,v)

    #define     w32vProMisc_vProAxiWaMin                       {\
            UNSG32 uvProAxiWaMin_addr                          : 32;\
          }
    union { UNSG32 u32vProMisc_vProAxiWaMin;
            struct w32vProMisc_vProAxiWaMin;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProMisc_vProAxiWaMax_addr(r32)             _BFGET_(r32,31, 0)
    #define   SET32vProMisc_vProAxiWaMax_addr(r32,v)           _BFSET_(r32,31, 0,v)

    #define     w32vProMisc_vProAxiWaMax                       {\
            UNSG32 uvProAxiWaMax_addr                          : 32;\
          }
    union { UNSG32 u32vProMisc_vProAxiWaMax;
            struct w32vProMisc_vProAxiWaMax;
          };
    ///////////////////////////////////////////////////////////
              SIE_vProVFC                                      ie_VFC;
    ///////////////////////////////////////////////////////////
              SIE_crcHub                                       ie_crcHub;
    ///////////////////////////////////////////////////////////
              SIE_axiBusCtrl                                   ie_axiBusCtrl;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx45988                                  [108152];
    ///////////////////////////////////////////////////////////
    } SIE_vProMisc;

    typedef union  T32vProMisc_P3Dbg
          { UNSG32 u32;
            struct w32vProMisc_P3Dbg;
                 } T32vProMisc_P3Dbg;
    typedef union  T32vProMisc_vProM2m
          { UNSG32 u32;
            struct w32vProMisc_vProM2m;
                 } T32vProMisc_vProM2m;
    typedef union  T32vProMisc_vProCfgChn
          { UNSG32 u32;
            struct w32vProMisc_vProCfgChn;
                 } T32vProMisc_vProCfgChn;
    typedef union  T32vProMisc_vProAxiRaMin
          { UNSG32 u32;
            struct w32vProMisc_vProAxiRaMin;
                 } T32vProMisc_vProAxiRaMin;
    typedef union  T32vProMisc_vProAxiRaMax
          { UNSG32 u32;
            struct w32vProMisc_vProAxiRaMax;
                 } T32vProMisc_vProAxiRaMax;
    typedef union  T32vProMisc_vProAxiWaMin
          { UNSG32 u32;
            struct w32vProMisc_vProAxiWaMin;
                 } T32vProMisc_vProAxiWaMin;
    typedef union  T32vProMisc_vProAxiWaMax
          { UNSG32 u32;
            struct w32vProMisc_vProAxiWaMax;
                 } T32vProMisc_vProAxiWaMax;
    ///////////////////////////////////////////////////////////

    typedef union  TvProMisc_P3Dbg
          { UNSG32 u32[1];
            struct {
            struct w32vProMisc_P3Dbg;
                   };
                 } TvProMisc_P3Dbg;
    typedef union  TvProMisc_vProM2m
          { UNSG32 u32[1];
            struct {
            struct w32vProMisc_vProM2m;
                   };
                 } TvProMisc_vProM2m;
    typedef union  TvProMisc_vProCfgChn
          { UNSG32 u32[1];
            struct {
            struct w32vProMisc_vProCfgChn;
                   };
                 } TvProMisc_vProCfgChn;
    typedef union  TvProMisc_vProAxiRaMin
          { UNSG32 u32[1];
            struct {
            struct w32vProMisc_vProAxiRaMin;
                   };
                 } TvProMisc_vProAxiRaMin;
    typedef union  TvProMisc_vProAxiRaMax
          { UNSG32 u32[1];
            struct {
            struct w32vProMisc_vProAxiRaMax;
                   };
                 } TvProMisc_vProAxiRaMax;
    typedef union  TvProMisc_vProAxiWaMin
          { UNSG32 u32[1];
            struct {
            struct w32vProMisc_vProAxiWaMin;
                   };
                 } TvProMisc_vProAxiWaMin;
    typedef union  TvProMisc_vProAxiWaMax
          { UNSG32 u32[1];
            struct {
            struct w32vProMisc_vProAxiWaMax;
                   };
                 } TvProMisc_vProAxiWaMax;

    ///////////////////////////////////////////////////////////
     SIGN32 vProMisc_drvrd(SIE_vProMisc *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 vProMisc_drvwr(SIE_vProMisc *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void vProMisc_reset(SIE_vProMisc *p);
     SIGN32 vProMisc_cmp  (SIE_vProMisc *p, SIE_vProMisc *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define vProMisc_check(p,pie,pfx,hLOG) vProMisc_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define vProMisc_print(p,    pfx,hLOG) vProMisc_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: vProMisc
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE vProRst                 biu              (4,4)
///     ###
///     * vPro control BIU, providing all block level and vPro subsystem software reset, gated clock control, and also provides vPro version number.
///     * For all reset control bit, 0-- reset, 1-- release. After chip power on reset, all these registers are 0 which means the vPro subsystem is in reset state and should be kicked-off by CPU.
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 Version              (R-)
///               %unsigned 8  build                     0x0
///               %unsigned 8  rsvd                      0x0
///               %unsigned 8  minor                     0x5
///               %unsigned 8  major                     0x2
///     @ 0x00004 vPro                 (RW-)
///               %unsigned 1  rstn                      0x0
///                                    ###
///                                    * Write 0 to reset the whole vPro; write 1 to release
///                                    ###
///               %unsigned 1  clk_en                    0x0
///                                    ###
///                                    * Write 0 to disable vPro clock source.
///                                    ###
///               %%        30         # Stuffing bits...
///     @ 0x00008                      (P)
///     # 0x00008 vproBiu              
///               $ClkRstBiu           vproBiu           REG          
///     @ 0x0000C                      (P)
///     # 0x0000C vproMisc             
///               $ClkRstBiu           vproMisc          REG          
///     @ 0x00010 clkCntL              (RW-)
///               %unsigned 32 val                       
///     @ 0x00014 clkCntH              (RW-)
///               %unsigned 32 val                       
///                                    ###
///                                    * cklCntL and clkCntH together forms a 64-bit free run counter to count the sysClk. Here is the operation mode.
///                                    * 1. CPU read clkCntL: CPU will get the lower 32-bit of the counter, and the higher 32-bit will be updated to clkCntH.
///                                    * 2. CPU read clkCntH: CPU will get the higher 32-bit of the counter previously latched by operation #1.
///                                    * 3. CPU write cklCntL: will set the internal 64-bit counter with register value of {clkCntH, clkCntL}.
///                                    * 4. CPU write clkCntH: only clkClkCnt will be updated, and the internal 64-bit counter will not be touched.
///                                    ###
///     @ 0x00018 busEn                (RW-)
///               %unsigned 32 val                       
///                                    : start                 0x5650524F
///                                    : stop                  0x53544F50
///                                                 ###
///                                                 * Write “VPRO” to enable bus, and write “STOP” to disable bus.
///                                                 * When bus is disabled, CPU can not access any internal biu except the vProRst biu.
///                                                 * When bus is enabled, CPU can access any vMeta biu.
///                                                 ###
///     @ 0x0001C busErr               (RW-)
///               %unsigned 32 val                       0xFFFFFFFF
///                                    ###
///                                    * The bus access information will be recorded if the following two conditions are true.
///                                    * 1. bus is disabled.
///                                    * 2. bus is trying to access vMeta internal biu (other than vProRst biu).
///                                    * bit [31:2] record the address[31:2],
///                                    * bit [1] record the transaction type, 0 -> read and 1-> write.
///                                    * Bit[0]=0 indicate the register has been updated.
///                                    ###
///     @ 0x00020 interrupt            (R-)
///               %unsigned 1  status                    
///                                    ###
///                                    * This is a read only register, it will return the current vPro interrupt line value. (dmaIntrVpro, whether the interrupt is asserted to CPU or not)
///                                    * 1: vMeta asserts interrupt to the CPU
///                                    * 0: vMeta does not assert interrupt to the CPU
///                                    ###
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      36B, bits:     169b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_vProRst
#define h_vProRst (){}

    #define     RA_vProRst_Version                             0x0000

    #define     BA_vProRst_Version_build                       0x0000
    #define     B16vProRst_Version_build                       0x0000
    #define   LSb32vProRst_Version_build                          0
    #define   LSb16vProRst_Version_build                          0
    #define       bvProRst_Version_build                       8
    #define   MSK32vProRst_Version_build                          0x000000FF

    #define     BA_vProRst_Version_rsvd                        0x0001
    #define     B16vProRst_Version_rsvd                        0x0000
    #define   LSb32vProRst_Version_rsvd                           8
    #define   LSb16vProRst_Version_rsvd                           8
    #define       bvProRst_Version_rsvd                        8
    #define   MSK32vProRst_Version_rsvd                           0x0000FF00

    #define     BA_vProRst_Version_minor                       0x0002
    #define     B16vProRst_Version_minor                       0x0002
    #define   LSb32vProRst_Version_minor                          16
    #define   LSb16vProRst_Version_minor                          0
    #define       bvProRst_Version_minor                       8
    #define   MSK32vProRst_Version_minor                          0x00FF0000

    #define     BA_vProRst_Version_major                       0x0003
    #define     B16vProRst_Version_major                       0x0002
    #define   LSb32vProRst_Version_major                          24
    #define   LSb16vProRst_Version_major                          8
    #define       bvProRst_Version_major                       8
    #define   MSK32vProRst_Version_major                          0xFF000000
    ///////////////////////////////////////////////////////////
    #define     RA_vProRst_vPro                                0x0004

    #define     BA_vProRst_vPro_rstn                           0x0004
    #define     B16vProRst_vPro_rstn                           0x0004
    #define   LSb32vProRst_vPro_rstn                              0
    #define   LSb16vProRst_vPro_rstn                              0
    #define       bvProRst_vPro_rstn                           1
    #define   MSK32vProRst_vPro_rstn                              0x00000001

    #define     BA_vProRst_vPro_clk_en                         0x0004
    #define     B16vProRst_vPro_clk_en                         0x0004
    #define   LSb32vProRst_vPro_clk_en                            1
    #define   LSb16vProRst_vPro_clk_en                            1
    #define       bvProRst_vPro_clk_en                         1
    #define   MSK32vProRst_vPro_clk_en                            0x00000002
    ///////////////////////////////////////////////////////////
    #define     RA_vProRst_vproBiu                             0x0008
    ///////////////////////////////////////////////////////////
    #define     RA_vProRst_vproMisc                            0x000C
    ///////////////////////////////////////////////////////////
    #define     RA_vProRst_clkCntL                             0x0010

    #define     BA_vProRst_clkCntL_val                         0x0010
    #define     B16vProRst_clkCntL_val                         0x0010
    #define   LSb32vProRst_clkCntL_val                            0
    #define   LSb16vProRst_clkCntL_val                            0
    #define       bvProRst_clkCntL_val                         32
    #define   MSK32vProRst_clkCntL_val                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProRst_clkCntH                             0x0014

    #define     BA_vProRst_clkCntH_val                         0x0014
    #define     B16vProRst_clkCntH_val                         0x0014
    #define   LSb32vProRst_clkCntH_val                            0
    #define   LSb16vProRst_clkCntH_val                            0
    #define       bvProRst_clkCntH_val                         32
    #define   MSK32vProRst_clkCntH_val                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProRst_busEn                               0x0018

    #define     BA_vProRst_busEn_val                           0x0018
    #define     B16vProRst_busEn_val                           0x0018
    #define   LSb32vProRst_busEn_val                              0
    #define   LSb16vProRst_busEn_val                              0
    #define       bvProRst_busEn_val                           32
    #define   MSK32vProRst_busEn_val                              0xFFFFFFFF
    #define        vProRst_busEn_val_start                                  0x5650524F
    #define        vProRst_busEn_val_stop                                   0x53544F50
    ///////////////////////////////////////////////////////////
    #define     RA_vProRst_busErr                              0x001C

    #define     BA_vProRst_busErr_val                          0x001C
    #define     B16vProRst_busErr_val                          0x001C
    #define   LSb32vProRst_busErr_val                             0
    #define   LSb16vProRst_busErr_val                             0
    #define       bvProRst_busErr_val                          32
    #define   MSK32vProRst_busErr_val                             0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_vProRst_interrupt                           0x0020

    #define     BA_vProRst_interrupt_status                    0x0020
    #define     B16vProRst_interrupt_status                    0x0020
    #define   LSb32vProRst_interrupt_status                       0
    #define   LSb16vProRst_interrupt_status                       0
    #define       bvProRst_interrupt_status                    1
    #define   MSK32vProRst_interrupt_status                       0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_vProRst {
    ///////////////////////////////////////////////////////////
    #define   GET32vProRst_Version_build(r32)                  _BFGET_(r32, 7, 0)
    #define   SET32vProRst_Version_build(r32,v)                _BFSET_(r32, 7, 0,v)
    #define   GET16vProRst_Version_build(r16)                  _BFGET_(r16, 7, 0)
    #define   SET16vProRst_Version_build(r16,v)                _BFSET_(r16, 7, 0,v)

    #define   GET32vProRst_Version_rsvd(r32)                   _BFGET_(r32,15, 8)
    #define   SET32vProRst_Version_rsvd(r32,v)                 _BFSET_(r32,15, 8,v)
    #define   GET16vProRst_Version_rsvd(r16)                   _BFGET_(r16,15, 8)
    #define   SET16vProRst_Version_rsvd(r16,v)                 _BFSET_(r16,15, 8,v)

    #define   GET32vProRst_Version_minor(r32)                  _BFGET_(r32,23,16)
    #define   SET32vProRst_Version_minor(r32,v)                _BFSET_(r32,23,16,v)
    #define   GET16vProRst_Version_minor(r16)                  _BFGET_(r16, 7, 0)
    #define   SET16vProRst_Version_minor(r16,v)                _BFSET_(r16, 7, 0,v)

    #define   GET32vProRst_Version_major(r32)                  _BFGET_(r32,31,24)
    #define   SET32vProRst_Version_major(r32,v)                _BFSET_(r32,31,24,v)
    #define   GET16vProRst_Version_major(r16)                  _BFGET_(r16,15, 8)
    #define   SET16vProRst_Version_major(r16,v)                _BFSET_(r16,15, 8,v)

    #define     w32vProRst_Version                             {\
            UNSG32 uVersion_build                              :  8;\
            UNSG32 uVersion_rsvd                               :  8;\
            UNSG32 uVersion_minor                              :  8;\
            UNSG32 uVersion_major                              :  8;\
          }
    union { UNSG32 u32vProRst_Version;
            struct w32vProRst_Version;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProRst_vPro_rstn(r32)                      _BFGET_(r32, 0, 0)
    #define   SET32vProRst_vPro_rstn(r32,v)                    _BFSET_(r32, 0, 0,v)
    #define   GET16vProRst_vPro_rstn(r16)                      _BFGET_(r16, 0, 0)
    #define   SET16vProRst_vPro_rstn(r16,v)                    _BFSET_(r16, 0, 0,v)

    #define   GET32vProRst_vPro_clk_en(r32)                    _BFGET_(r32, 1, 1)
    #define   SET32vProRst_vPro_clk_en(r32,v)                  _BFSET_(r32, 1, 1,v)
    #define   GET16vProRst_vPro_clk_en(r16)                    _BFGET_(r16, 1, 1)
    #define   SET16vProRst_vPro_clk_en(r16,v)                  _BFSET_(r16, 1, 1,v)

    #define     w32vProRst_vPro                                {\
            UNSG32 uvPro_rstn                                  :  1;\
            UNSG32 uvPro_clk_en                                :  1;\
            UNSG32 RSVDx4_b2                                   : 30;\
          }
    union { UNSG32 u32vProRst_vPro;
            struct w32vProRst_vPro;
          };
    ///////////////////////////////////////////////////////////
              SIE_ClkRstBiu                                    ie_vproBiu;
    ///////////////////////////////////////////////////////////
              SIE_ClkRstBiu                                    ie_vproMisc;
    ///////////////////////////////////////////////////////////
    #define   GET32vProRst_clkCntL_val(r32)                    _BFGET_(r32,31, 0)
    #define   SET32vProRst_clkCntL_val(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32vProRst_clkCntL                             {\
            UNSG32 uclkCntL_val                                : 32;\
          }
    union { UNSG32 u32vProRst_clkCntL;
            struct w32vProRst_clkCntL;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProRst_clkCntH_val(r32)                    _BFGET_(r32,31, 0)
    #define   SET32vProRst_clkCntH_val(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32vProRst_clkCntH                             {\
            UNSG32 uclkCntH_val                                : 32;\
          }
    union { UNSG32 u32vProRst_clkCntH;
            struct w32vProRst_clkCntH;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProRst_busEn_val(r32)                      _BFGET_(r32,31, 0)
    #define   SET32vProRst_busEn_val(r32,v)                    _BFSET_(r32,31, 0,v)

    #define     w32vProRst_busEn                               {\
            UNSG32 ubusEn_val                                  : 32;\
          }
    union { UNSG32 u32vProRst_busEn;
            struct w32vProRst_busEn;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProRst_busErr_val(r32)                     _BFGET_(r32,31, 0)
    #define   SET32vProRst_busErr_val(r32,v)                   _BFSET_(r32,31, 0,v)

    #define     w32vProRst_busErr                              {\
            UNSG32 ubusErr_val                                 : 32;\
          }
    union { UNSG32 u32vProRst_busErr;
            struct w32vProRst_busErr;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32vProRst_interrupt_status(r32)               _BFGET_(r32, 0, 0)
    #define   SET32vProRst_interrupt_status(r32,v)             _BFSET_(r32, 0, 0,v)
    #define   GET16vProRst_interrupt_status(r16)               _BFGET_(r16, 0, 0)
    #define   SET16vProRst_interrupt_status(r16,v)             _BFSET_(r16, 0, 0,v)

    #define     w32vProRst_interrupt                           {\
            UNSG32 uinterrupt_status                           :  1;\
            UNSG32 RSVDx20_b1                                  : 31;\
          }
    union { UNSG32 u32vProRst_interrupt;
            struct w32vProRst_interrupt;
          };
    ///////////////////////////////////////////////////////////
    } SIE_vProRst;

    typedef union  T32vProRst_Version
          { UNSG32 u32;
            struct w32vProRst_Version;
                 } T32vProRst_Version;
    typedef union  T32vProRst_vPro
          { UNSG32 u32;
            struct w32vProRst_vPro;
                 } T32vProRst_vPro;
    typedef union  T32vProRst_clkCntL
          { UNSG32 u32;
            struct w32vProRst_clkCntL;
                 } T32vProRst_clkCntL;
    typedef union  T32vProRst_clkCntH
          { UNSG32 u32;
            struct w32vProRst_clkCntH;
                 } T32vProRst_clkCntH;
    typedef union  T32vProRst_busEn
          { UNSG32 u32;
            struct w32vProRst_busEn;
                 } T32vProRst_busEn;
    typedef union  T32vProRst_busErr
          { UNSG32 u32;
            struct w32vProRst_busErr;
                 } T32vProRst_busErr;
    typedef union  T32vProRst_interrupt
          { UNSG32 u32;
            struct w32vProRst_interrupt;
                 } T32vProRst_interrupt;
    ///////////////////////////////////////////////////////////

    typedef union  TvProRst_Version
          { UNSG32 u32[1];
            struct {
            struct w32vProRst_Version;
                   };
                 } TvProRst_Version;
    typedef union  TvProRst_vPro
          { UNSG32 u32[1];
            struct {
            struct w32vProRst_vPro;
                   };
                 } TvProRst_vPro;
    typedef union  TvProRst_clkCntL
          { UNSG32 u32[1];
            struct {
            struct w32vProRst_clkCntL;
                   };
                 } TvProRst_clkCntL;
    typedef union  TvProRst_clkCntH
          { UNSG32 u32[1];
            struct {
            struct w32vProRst_clkCntH;
                   };
                 } TvProRst_clkCntH;
    typedef union  TvProRst_busEn
          { UNSG32 u32[1];
            struct {
            struct w32vProRst_busEn;
                   };
                 } TvProRst_busEn;
    typedef union  TvProRst_busErr
          { UNSG32 u32[1];
            struct {
            struct w32vProRst_busErr;
                   };
                 } TvProRst_busErr;
    typedef union  TvProRst_interrupt
          { UNSG32 u32[1];
            struct {
            struct w32vProRst_interrupt;
                   };
                 } TvProRst_interrupt;

    ///////////////////////////////////////////////////////////
     SIGN32 vProRst_drvrd(SIE_vProRst *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 vProRst_drvwr(SIE_vProRst *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void vProRst_reset(SIE_vProRst *p);
     SIGN32 vProRst_cmp  (SIE_vProRst *p, SIE_vProRst *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define vProRst_check(p,pie,pfx,hLOG) vProRst_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define vProRst_print(p,    pfx,hLOG) vProRst_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: vProRst
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE vPro                                     (4,4)
///     ###
///     * Constants for vPro submodule hSel decoding
///     ###
///     # # ----------------------------------------------------------
///               : SIZE               0x400000
///               : DEC_BIT            0x16
///                            ###
///                            * vProRst module
///                            ###
///               : RST_OFST           0x0
///               : RST_SIZE           0x10000
///               : RST_DEC_BIT        0x10
///                            ###
///                            * vCache
///                            ###
///               : VC_OFST            0x10000
///               : VC_SIZE            0x10000
///               : VC_DEC_BIT         0x10
///                            ###
///                            * vProMisc
///                            ###
///               : MX_OFST            0x80000
///               : MX_SIZE            0x80000
///               : MX_DEC_BIT         0x13
///                            ###
///                            * VSCOPE
///                            ###
///               : VX_OFST            0x100000
///               : VX_SIZE            0x100000
///               : VX_DEC_BIT         0x14
///                            ###
///                            * PCUBE
///                            ###
///               : P3_OFST            0x200000
///               : P3_SIZE            0x100000
///               : P3_DEC_BIT         0x14
///     @ 0x00000 Dummy                (P)
///               %unsigned 1  xxx                       0x0
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       1b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_vPro
#define h_vPro (){}

    #define        vPro_SIZE                                   0x400000
    #define        vPro_DEC_BIT                                0x16
    #define        vPro_RST_OFST                               0x0
    #define        vPro_RST_SIZE                               0x10000
    #define        vPro_RST_DEC_BIT                            0x10
    #define        vPro_VC_OFST                                0x10000
    #define        vPro_VC_SIZE                                0x10000
    #define        vPro_VC_DEC_BIT                             0x10
    #define        vPro_MX_OFST                                0x80000
    #define        vPro_MX_SIZE                                0x80000
    #define        vPro_MX_DEC_BIT                             0x13
    #define        vPro_VX_OFST                                0x100000
    #define        vPro_VX_SIZE                                0x100000
    #define        vPro_VX_DEC_BIT                             0x14
    #define        vPro_P3_OFST                                0x200000
    #define        vPro_P3_SIZE                                0x100000
    #define        vPro_P3_DEC_BIT                             0x14
    ///////////////////////////////////////////////////////////
    #define     RA_vPro_Dummy                                  0x0000

    #define     BA_vPro_Dummy_xxx                              0x0000
    #define     B16vPro_Dummy_xxx                              0x0000
    #define   LSb32vPro_Dummy_xxx                                 0
    #define   LSb16vPro_Dummy_xxx                                 0
    #define       bvPro_Dummy_xxx                              1
    #define   MSK32vPro_Dummy_xxx                                 0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_vPro {
    ///////////////////////////////////////////////////////////
    #define   GET32vPro_Dummy_xxx(r32)                         _BFGET_(r32, 0, 0)
    #define   SET32vPro_Dummy_xxx(r32,v)                       _BFSET_(r32, 0, 0,v)
    #define   GET16vPro_Dummy_xxx(r16)                         _BFGET_(r16, 0, 0)
    #define   SET16vPro_Dummy_xxx(r16,v)                       _BFSET_(r16, 0, 0,v)

    #define     w32vPro_Dummy                                  {\
            UNSG32 uDummy_xxx                                  :  1;\
            UNSG32 RSVDx0_b1                                   : 31;\
          }
    union { UNSG32 u32vPro_Dummy;
            struct w32vPro_Dummy;
          };
    ///////////////////////////////////////////////////////////
    } SIE_vPro;

    typedef union  T32vPro_Dummy
          { UNSG32 u32;
            struct w32vPro_Dummy;
                 } T32vPro_Dummy;
    ///////////////////////////////////////////////////////////

    typedef union  TvPro_Dummy
          { UNSG32 u32[1];
            struct {
            struct w32vPro_Dummy;
                   };
                 } TvPro_Dummy;

    ///////////////////////////////////////////////////////////
     SIGN32 vPro_drvrd(SIE_vPro *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 vPro_drvwr(SIE_vPro *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void vPro_reset(SIE_vPro *p);
     SIGN32 vPro_cmp  (SIE_vPro *p, SIE_vPro *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define vPro_check(p,pie,pfx,hLOG) vPro_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define vPro_print(p,    pfx,hLOG) vPro_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: vPro
////////////////////////////////////////////////////////////


#ifdef __cplusplus
  }
#endif
#pragma  pack()

#endif
//////
/// ENDOFFILE: vpro_spec.h
////////////////////////////////////////////////////////////