/********************************************************************************
 * Marvell GPL License Option
 *
 * If you received this File from Marvell, you may opt to use, redistribute and/or
 * modify this File in accordance with the terms and conditions of the General
 * Public License Version 2, June 1991 (the "GPL License"), a copy of which is
 * available along with the File in the license.txt file or by writing to the Free
 * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
 * on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
 * DISCLAIMED.  The GPL License provides additional details about this warranty
 * disclaimer.
 ******************************************************************************/

//////
/// don't edit! auto-generated by docc: avifGbl.h
////////////////////////////////////////////////////////////
#ifndef avifGbl_h
#define avifGbl_h (){}


#include "ctypes.h"

#pragma pack(1)
#ifdef __cplusplus
  extern "C" {
#endif

#ifndef _DOCC_H_BITOPS_
#define _DOCC_H_BITOPS_ (){}

    #define _bSETMASK_(b)                                      ((b)<32 ? (1<<((b)&31)) : 0)
    #define _NSETMASK_(msb,lsb)                                (_bSETMASK_((msb)+1)-_bSETMASK_(lsb))
    #define _bCLRMASK_(b)                                      (~_bSETMASK_(b))
    #define _NCLRMASK_(msb,lsb)                                (~_NSETMASK_(msb,lsb))
    #define _BFGET_(r,msb,lsb)                                 (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb)))
    #define _BFSET_(r,msb,lsb,v)                               do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0)

#endif


//////
/// 
/// $INTERFACE oneReg                                   (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (R-)
///               %unsigned 32 0x00000000                
///                                    ###
///                                    * One Register in Demod block.
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_oneReg
#define h_oneReg (){}

    #define     BA_oneReg_0x00000000                           0x0000
    #define     B16oneReg_0x00000000                           0x0000
    #define   LSb32oneReg_0x00000000                              0
    #define   LSb16oneReg_0x00000000                              0
    #define       boneReg_0x00000000                           32
    #define   MSK32oneReg_0x00000000                              0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_oneReg {
    ///////////////////////////////////////////////////////////
    #define   GET32oneReg_0x00000000(r32)                      _BFGET_(r32,31, 0)
    #define   SET32oneReg_0x00000000(r32,v)                    _BFSET_(r32,31, 0,v)

            UNSG32 u_0x00000000                                : 32;
    ///////////////////////////////////////////////////////////
    } SIE_oneReg;

    ///////////////////////////////////////////////////////////
     SIGN32 oneReg_drvrd(SIE_oneReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 oneReg_drvwr(SIE_oneReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void oneReg_reset(SIE_oneReg *p);
     SIGN32 oneReg_cmp  (SIE_oneReg *p, SIE_oneReg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define oneReg_check(p,pie,pfx,hLOG) oneReg_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define oneReg_print(p,    pfx,hLOG) oneReg_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: oneReg
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE Demod_REG                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 dummy                
///               $oneReg              dummy             REG     [256]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    1024B, bits:    8192b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_Demod_REG
#define h_Demod_REG (){}

    #define     RA_Demod_REG_dummy                             0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_Demod_REG {
    ///////////////////////////////////////////////////////////
              SIE_oneReg                                       ie_dummy[256];
    ///////////////////////////////////////////////////////////
    } SIE_Demod_REG;

    ///////////////////////////////////////////////////////////
     SIGN32 Demod_REG_drvrd(SIE_Demod_REG *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 Demod_REG_drvwr(SIE_Demod_REG *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void Demod_REG_reset(SIE_Demod_REG *p);
     SIGN32 Demod_REG_cmp  (SIE_Demod_REG *p, SIE_Demod_REG *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define Demod_REG_check(p,pie,pfx,hLOG) Demod_REG_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define Demod_REG_print(p,    pfx,hLOG) Demod_REG_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: Demod_REG
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE avifGbl                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (R-)
///     # 0x00000 cfgReg               
///               $Demod_REG           cfgReg            MEM          
///                                    ###
///                                    * Interface to access Demod Registers
///                                    ###
///     @ 0x00400 DemodRegIfCtrl       (P)
///               ###
///               * Controls the MWR/MRD pulse width and read data capture point for Demod Register interface.
///               ###
///               %unsigned 8  mwrWidth                  0x1
///                                    ###
///                                    * Specifies the width of the MWR pulse (in terms of cfgClks) to demod IP.
///                                    ###
///               %unsigned 8  hold                      0x1
///                                    ###
///                                    * Specifies the time (in terms of cfgClks) between Demod read data mux output to sample point in AVIF Global BIU.
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00404 SWRST_CTRL           (P-)
///               ###
///               * Soft resets for various blocks inside AVIF.
///               ###
///               %unsigned 1  avifIpRstn                0x1
///                                    ###
///                                    * Reset control for AVIF IP.
///                                    * 1: de-assert reset
///                                    * 0: Assert reset
///                                    ###
///               %unsigned 1  demodRstn                 0x1
///                                    ###
///                                    * Reset for Demod IP.
///                                    * 1: de-assert reset
///                                    * 0: Assert reset
///                                    ###
///               %unsigned 1  farrow270MRstn            0x1
///                                    ###
///                                    * Reset for Farrow resampler for 270MHz clock
///                                    * 1: de-assert reset
///                                    * 0: Assert reset
///                                    ###
///               %unsigned 1  farrow27MRstn             0x1
///                                    ###
///                                    * Reset for Farrow resampler for 27MHz clock
///                                    * 1: de-assert reset
///                                    * 0: Assert reset
///                                    ###
///               %unsigned 1  bypassFarrow              0x0
///                                    ###
///                                    * Bypass Farrow Resampler
///                                    * 1: bypass
///                                    * 0: no bypass
///                                    ###
///               %%        27         # Stuffing bits...
///     @ 0x00408 RWTC_31to0           (P)
///               ###
///               * rwtcBus[31:0]
///               * *INTERNAL_ONLY**
///               ###
///               %unsigned 32 value                     0x999966AA
///                                    ###
///                                    * RTWC [31:0] value for AVIF internal memories.
///                                    ###
///     @ 0x0040C RWTC_57to32          (P)
///               ###
///               * rwtcBus[57:32]
///               * *INTERNAL_ONLY**
///               ###
///               %unsigned 26 value                     0x265675A
///                                    ###
///                                    * RTWC [57:32] value for AVIF internal memories.
///                                    ###
///               %%        6          # Stuffing bits...
///     @ 0x00410 Debug_Ctrl           (P)
///               ###
///               * Bus selection between demod adc, demod IP and avif
///               ###
///               %unsigned 1  avifdebug_sel             0x0
///                                    ###
///                                    * DebugSel
///                                    * 1 – Debug bus from AVIF selected
///                                    * 0 – Debug bus from demod selected
///                                    ###
///               %unsigned 1  demodIP_outsel            0x0
///                                    ###
///                                    * DemodOutSel
///                                    * 1 – demod audio output selected
///                                    * 0 – demod video output is selected
///                                    ###
///               %unsigned 1  demodAfe_outsel           0x0
///                                    ###
///                                    * 1- demod adc output selected on debug bus
///                                    * 0 – either avifdebug or demod output is selected on debug bus
///                                    ###
///               %%        29         # Stuffing bits...
///     @ 0x00414 DemodADC_Status      (P)
///               ###
///               * Demod ADC status bits
///               ###
///               %unsigned 1  DEMOD_ERROR               0x0
///                                    ###
///                                    * DEMOD ADC out of range flag
///                                    * 1'b0: normal mode
///                                    * 1'b1: ADC out of range
///                                    ###
///               %unsigned 1  DEMOD_OFFCAL              0x0
///                                    ###
///                                    * DEMOD ADC offline calibration mode of operation flag
///                                    * 1'b0: normal mode
///                                    * 1'b1: ADC offline calibration
///                                    ###
///               %unsigned 1  DEMOD_READY               0x1
///                                    ###
///                                    * DEMOD ADC ready flag (goes low when the ADC is in offline calibration mode)
///                                    * 1'b0: ADC is not ready
///                                    * 1'b1: normal mode
///                                    ###
///               %unsigned 8  DEMOD_COEFF_OUT           
///                                    ###
///                                    * DEMOD ADC calibration coefficient output values
///                                    ###
///               %%        21         # Stuffing bits...
///     @ 0x00418 DemodADC_Func        (P)
///               ###
///               * Demod ADC functional control register
///               ###
///               %unsigned 1  DEMOD_RSTB                0x1
///                                    ###
///                                    * Reset the DEMOD ADC digital part, ACTIVE LOW
///                                    * 1'b0: reset state
///                                    * 1'b1: not reset (default)
///                                    ###
///               %unsigned 1  DEMOD_CLKINV              0x0
///                                    ###
///                                    * DEMOD output clock polarity control
///                                    * 1'b0: normal polarity (default)
///                                    * 1'b1: inverted polarity
///                                    ###
///               %unsigned 1  DEMOD_CLKMONEN            0x0
///                                    ###
///                                    * DEMOD clock monitor enable
///                                    * 1'b0: clock monitor disabled
///                                    * 1'b1: clock monitor enabled (default)
///                                    ###
///               %unsigned 1  DEMOD_MUTE                0x0
///                                    ###
///                                    * DEMOD mute control
///                                    * 1'b0: normal mode (default)
///                                    * 1'b1: mute mode
///                                    ###
///               %unsigned 1  DEMOD_RSTSAR              0x0
///                                    ###
///                                    * DEMOD SAR controller reset
///                                    * 1'b0: not reset (default)
///                                    * 1'b1: reset state
///                                    ###
///               %unsigned 1  DEMOD_OUTSIGNED           0x1
///                                    ###
///                                    * DEMOD output data format
///                                    * 1'b0: unsigned
///                                    * 1'b1: signed (default) sign magnitude form (S11.10)
///                                    ###
///               %unsigned 1  DEMOD_PD                  0x1
///                                    ###
///                                    * DEMOD power down control
///                                    * 1'b0: power up (default)
///                                    * 1'b1: power down
///                                    ###
///               %%        25         # Stuffing bits...
///     @ 0x0041C DemodADC_CurrentCntrl (P)
///               ###
///               * Demod ADC current settings
///               ###
///               %unsigned 2  DEMOD_ADC_ICCTRL          0x2
///                                    ###
///                                    * DEMOD ADC constant current control
///                                    * 2'b00: 37.5uA
///                                    * 2'b01: 50.0uA (default)
///                                    * 2'b10: 62.5uA
///                                    * 2'b11: 75.0uA
///                                    ###
///               %unsigned 2  DEMOD_ADC_IPCTRL          0x2
///                                    ###
///                                    * DEMOD ADC poly current control
///                                    * 2'b00: 150uA
///                                    * 2'b01: 200uA (default)
///                                    * 2'b10: 250uA
///                                    * 2'b11: 300uA
///                                    ###
///               %unsigned 2  DEMOD_BUF_VREFCTRL        0x2
///                                    ###
///                                    * Not used; Reserved for future use.
///                                    ###
///               %unsigned 2  DEMOD_ADC_VREFCTRL        0x2
///                                    ###
///                                    * DEMOD ADC reference voltage control
///                                    * 2'b00: VCM = 820mV
///                                    * 2'b01: VCM = 795mV
///                                    * 2'b10: VCM = 770mV (default)
///                                    * 2'b11: VCM = 745mV
///                                    ###
///               %unsigned 2  DEMOD_BUF_VCMOCTRL        0x2
///                                    ###
///                                    * DEMOD buffer output common mode voltage control
///                                    * 2'b00: 700mV
///                                    * 2'b01: 725mV (default)
///                                    * 2'b10: 750mV
///                                    * 2'b11: 775mV
///                                    ###
///               %%        22         # Stuffing bits...
///     @ 0x00420 DemodADC_CalCntrl    (P)
///               ###
///               * Demod ADC calibration control
///               ###
///               %unsigned 2  DEMOD_CAL_SPEED           0x0
///                                    ###
///                                    * Controls the number n of averages in the DEMOD ADC calibration algorithm
///                                    * 2'b00: n = 256 (default)
///                                    * 2'b01: n = 512
///                                    * 2'b10: n = 1024
///                                    * 2'b11: n = 2048
///                                    ###
///               %unsigned 2  DEMOD_COEFF_ADDR          0x0
///                                    ###
///                                    * Not used; Reserved for future use.
///                                    ###
///               %unsigned 8  DEMOD_COEFF_IN            0x0
///                                    ###
///                                    * DEMOD ADC calibration coefficient input values (2's complement)
///                                    ###
///               %unsigned 1  DEMOD_SPEED_EN            0x0
///                                    ###
///                                    * Enable the DEMOD ADC delay line calibration
///                                    * 1'b0 : disable calibration
///                                    * 1'b1 : enable calibration (default)
///                                    ###
///               %unsigned 1  DEMOD_COEFF_FORCE         0x0
///                                    ###
///                                    * Apply to DEMOD ADC coefficient values previously written from outside
///                                    * 1'b0: do not apply external coefficients (default)
///                                    * 1'b1: apply external coefficients
///                                    ###
///               %unsigned 1  DEMOD_COEFF_RD            0x0
///                                    ###
///                                    * Read calibrated coefficients; not used
///                                    ###
///               %unsigned 1  DEMOD_COEFF_WR            0x0
///                                    ###
///                                    * Write the coefficient value in DEMOD_COEFF_IN[7:0] at the address specified by DEMOD_COEFF_ADDR[3:0]
///                                    * 1'b0: do not write (default)
///                                    * 1'b1: write
///                                    ###
///               %unsigned 1  DEMOD_CORRECT             0x0
///                                    ###
///                                    * Apply correction to the calibration
///                                    ###
///               %unsigned 1  DEMOD_START               0x0
///                                    ###
///                                    * DEMOD ADC calibration start (A pulse makes the ADC calibration start)
///                                    ###
///               %%        14         # Stuffing bits...
///     @ 0x00424 DemodADC_TestCntrl   (P)
///               ###
///               * Demod ADC Test control
///               ###
///               %unsigned 1  DEMOD_ADC_TESTEN          0x0
///                                    ###
///                                    * DEMOD ADC test enable
///                                    * 1'b0: disabled (default)
///                                    * 1'b1: enabled
///                                    ###
///               %unsigned 1  DEMOD_BUF_TESTEN          0x0
///                                    ###
///                                    * DEMOD buffer test enable
///                                    * 1'b0: disabled (default)
///                                    * 1'b1: enabled
///                                    ###
///               %unsigned 1  DEMOD_META_EN             0x0
///                                    ###
///                                    * Enable the DEMOD ADC meta-stability delay line calibration
///                                    * 1'b0: disable calibration
///                                    * 1'b1: enable calibration (default)
///                                    ###
///               %unsigned 1  DEMOD_REG_GATE            0x0
///                                    ###
///                                    * Not used; reserved for future use.
///                                    ###
///               %unsigned 3  DEMOD_ADC_TEST            0x0
///                                    ###
///                                    * DEMOD ADC test point selection
///                                    * 3'b000: VDDCTRL13
///                                    * 3'b001: VDD13
///                                    * 3'b010: IP200U
///                                    * 3'b011: REG_VC
///                                    * 3'b100: DAC_REFN
///                                    * 3'b101: DAC_REFP
///                                    * 3'b110: AVDD18
///                                    * 3'b111: IC25U_REF
///                                    ###
///               %unsigned 3  DEMOD_BUF_TEST            0x0
///                                    ###
///                                    * DEMOD buffer test point selection
///                                    * 3'b000: AVSS
///                                    * 3'b001: AVSS
///                                    * 3'b010: AVSS
///                                    * 3'b011: AVDD
///                                    * 3'b100: VCMO
///                                    * 3'b101: VCM_MUTE
///                                    * 3'b110: VCM
///                                    * 3'b111: AVSS
///                                    ###
///               %unsigned 8  DEMOD_META_REF            0x0
///                                    ###
///                                    * Set point for the DEMOD ADC meta-stability delay lines: the decimal number in DEMOD_META_REF[7:0] divided by 16 is the average of meta-stability events in 1024 samples that is wanted. The meta-stability delay lines are controlled accordingly through SARA_META_CTRL[3:0] signals
///                                    * 8'h00 : TBD events
///                                    * ...
///                                    * 8'hFF : TBD events
///                                    ###
///               %unsigned 8  DEMOD_SPEED_REF           0x0
///                                    ###
///                                    * Set point for the delay lines calibration in the SAR loop: the decimal number in DEMOD_SPEED_REF[7:0] divided by 16 is the average conversion steps that will be forced in the speed trap period which is 2/3 of the clock period. The loop delay lines are controlled accordingly through SARA_SPEED_CTRL[3:0]
///                                    * 8'h00 : TBD steps
///                                    * ...
///                                    * 8'hFF : TBD steps
///                                    ###
///               %%        6          # Stuffing bits...
///     @ 0x00428 DemodADC_SpareCntrl  (P)
///               ###
///               * Demod control spare register
///               ###
///               %unsigned 6  DEMOD_SPARE               0x0
///                                    ###
///                                    * DEMOD spare bits (for future applications)
///                                    ###
///               %unsigned 8  DEMOD_SPARE_DIG           0x0
///                                    ###
///                                    * [7:4] DEMOD ADC calibration coefficient address (DEMOD_COEFF_ADDR[3:0])
///                                    * [3:3] Select Farrow filter's output on debug bus
///                                    * [2:1] digital logic spare bits (for future applications)
///                                    * [0] DVDD_CALEN
///                                    * 1'b0: DVDD calibration disabled
///                                    * 1'b1: DVDD calibration enabled (default)
///                                    ###
///               %%        18         # Stuffing bits...
///     @ 0x0042C                      (W-)
///     #         # Stuffing bytes...
///               %% 7840
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    2048B, bits:     200b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_avifGbl
#define h_avifGbl (){}

    #define     RA_avifGbl_cfgReg                              0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_DemodRegIfCtrl                      0x0400

    #define     BA_avifGbl_DemodRegIfCtrl_mwrWidth             0x0400
    #define     B16avifGbl_DemodRegIfCtrl_mwrWidth             0x0400
    #define   LSb32avifGbl_DemodRegIfCtrl_mwrWidth                0
    #define   LSb16avifGbl_DemodRegIfCtrl_mwrWidth                0
    #define       bavifGbl_DemodRegIfCtrl_mwrWidth             8
    #define   MSK32avifGbl_DemodRegIfCtrl_mwrWidth                0x000000FF

    #define     BA_avifGbl_DemodRegIfCtrl_hold                 0x0401
    #define     B16avifGbl_DemodRegIfCtrl_hold                 0x0400
    #define   LSb32avifGbl_DemodRegIfCtrl_hold                    8
    #define   LSb16avifGbl_DemodRegIfCtrl_hold                    8
    #define       bavifGbl_DemodRegIfCtrl_hold                 8
    #define   MSK32avifGbl_DemodRegIfCtrl_hold                    0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_SWRST_CTRL                          0x0404

    #define     BA_avifGbl_SWRST_CTRL_avifIpRstn               0x0404
    #define     B16avifGbl_SWRST_CTRL_avifIpRstn               0x0404
    #define   LSb32avifGbl_SWRST_CTRL_avifIpRstn                  0
    #define   LSb16avifGbl_SWRST_CTRL_avifIpRstn                  0
    #define       bavifGbl_SWRST_CTRL_avifIpRstn               1
    #define   MSK32avifGbl_SWRST_CTRL_avifIpRstn                  0x00000001

    #define     BA_avifGbl_SWRST_CTRL_demodRstn                0x0404
    #define     B16avifGbl_SWRST_CTRL_demodRstn                0x0404
    #define   LSb32avifGbl_SWRST_CTRL_demodRstn                   1
    #define   LSb16avifGbl_SWRST_CTRL_demodRstn                   1
    #define       bavifGbl_SWRST_CTRL_demodRstn                1
    #define   MSK32avifGbl_SWRST_CTRL_demodRstn                   0x00000002

    #define     BA_avifGbl_SWRST_CTRL_farrow270MRstn           0x0404
    #define     B16avifGbl_SWRST_CTRL_farrow270MRstn           0x0404
    #define   LSb32avifGbl_SWRST_CTRL_farrow270MRstn              2
    #define   LSb16avifGbl_SWRST_CTRL_farrow270MRstn              2
    #define       bavifGbl_SWRST_CTRL_farrow270MRstn           1
    #define   MSK32avifGbl_SWRST_CTRL_farrow270MRstn              0x00000004

    #define     BA_avifGbl_SWRST_CTRL_farrow27MRstn            0x0404
    #define     B16avifGbl_SWRST_CTRL_farrow27MRstn            0x0404
    #define   LSb32avifGbl_SWRST_CTRL_farrow27MRstn               3
    #define   LSb16avifGbl_SWRST_CTRL_farrow27MRstn               3
    #define       bavifGbl_SWRST_CTRL_farrow27MRstn            1
    #define   MSK32avifGbl_SWRST_CTRL_farrow27MRstn               0x00000008

    #define     BA_avifGbl_SWRST_CTRL_bypassFarrow             0x0404
    #define     B16avifGbl_SWRST_CTRL_bypassFarrow             0x0404
    #define   LSb32avifGbl_SWRST_CTRL_bypassFarrow                4
    #define   LSb16avifGbl_SWRST_CTRL_bypassFarrow                4
    #define       bavifGbl_SWRST_CTRL_bypassFarrow             1
    #define   MSK32avifGbl_SWRST_CTRL_bypassFarrow                0x00000010
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_RWTC_31to0                          0x0408

    #define     BA_avifGbl_RWTC_31to0_value                    0x0408
    #define     B16avifGbl_RWTC_31to0_value                    0x0408
    #define   LSb32avifGbl_RWTC_31to0_value                       0
    #define   LSb16avifGbl_RWTC_31to0_value                       0
    #define       bavifGbl_RWTC_31to0_value                    32
    #define   MSK32avifGbl_RWTC_31to0_value                       0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_RWTC_57to32                         0x040C

    #define     BA_avifGbl_RWTC_57to32_value                   0x040C
    #define     B16avifGbl_RWTC_57to32_value                   0x040C
    #define   LSb32avifGbl_RWTC_57to32_value                      0
    #define   LSb16avifGbl_RWTC_57to32_value                      0
    #define       bavifGbl_RWTC_57to32_value                   26
    #define   MSK32avifGbl_RWTC_57to32_value                      0x03FFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_Debug_Ctrl                          0x0410

    #define     BA_avifGbl_Debug_Ctrl_avifdebug_sel            0x0410
    #define     B16avifGbl_Debug_Ctrl_avifdebug_sel            0x0410
    #define   LSb32avifGbl_Debug_Ctrl_avifdebug_sel               0
    #define   LSb16avifGbl_Debug_Ctrl_avifdebug_sel               0
    #define       bavifGbl_Debug_Ctrl_avifdebug_sel            1
    #define   MSK32avifGbl_Debug_Ctrl_avifdebug_sel               0x00000001

    #define     BA_avifGbl_Debug_Ctrl_demodIP_outsel           0x0410
    #define     B16avifGbl_Debug_Ctrl_demodIP_outsel           0x0410
    #define   LSb32avifGbl_Debug_Ctrl_demodIP_outsel              1
    #define   LSb16avifGbl_Debug_Ctrl_demodIP_outsel              1
    #define       bavifGbl_Debug_Ctrl_demodIP_outsel           1
    #define   MSK32avifGbl_Debug_Ctrl_demodIP_outsel              0x00000002

    #define     BA_avifGbl_Debug_Ctrl_demodAfe_outsel          0x0410
    #define     B16avifGbl_Debug_Ctrl_demodAfe_outsel          0x0410
    #define   LSb32avifGbl_Debug_Ctrl_demodAfe_outsel             2
    #define   LSb16avifGbl_Debug_Ctrl_demodAfe_outsel             2
    #define       bavifGbl_Debug_Ctrl_demodAfe_outsel          1
    #define   MSK32avifGbl_Debug_Ctrl_demodAfe_outsel             0x00000004
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_DemodADC_Status                     0x0414

    #define     BA_avifGbl_DemodADC_Status_DEMOD_ERROR         0x0414
    #define     B16avifGbl_DemodADC_Status_DEMOD_ERROR         0x0414
    #define   LSb32avifGbl_DemodADC_Status_DEMOD_ERROR            0
    #define   LSb16avifGbl_DemodADC_Status_DEMOD_ERROR            0
    #define       bavifGbl_DemodADC_Status_DEMOD_ERROR         1
    #define   MSK32avifGbl_DemodADC_Status_DEMOD_ERROR            0x00000001

    #define     BA_avifGbl_DemodADC_Status_DEMOD_OFFCAL        0x0414
    #define     B16avifGbl_DemodADC_Status_DEMOD_OFFCAL        0x0414
    #define   LSb32avifGbl_DemodADC_Status_DEMOD_OFFCAL           1
    #define   LSb16avifGbl_DemodADC_Status_DEMOD_OFFCAL           1
    #define       bavifGbl_DemodADC_Status_DEMOD_OFFCAL        1
    #define   MSK32avifGbl_DemodADC_Status_DEMOD_OFFCAL           0x00000002

    #define     BA_avifGbl_DemodADC_Status_DEMOD_READY         0x0414
    #define     B16avifGbl_DemodADC_Status_DEMOD_READY         0x0414
    #define   LSb32avifGbl_DemodADC_Status_DEMOD_READY            2
    #define   LSb16avifGbl_DemodADC_Status_DEMOD_READY            2
    #define       bavifGbl_DemodADC_Status_DEMOD_READY         1
    #define   MSK32avifGbl_DemodADC_Status_DEMOD_READY            0x00000004

    #define     BA_avifGbl_DemodADC_Status_DEMOD_COEFF_OUT     0x0414
    #define     B16avifGbl_DemodADC_Status_DEMOD_COEFF_OUT     0x0414
    #define   LSb32avifGbl_DemodADC_Status_DEMOD_COEFF_OUT        3
    #define   LSb16avifGbl_DemodADC_Status_DEMOD_COEFF_OUT        3
    #define       bavifGbl_DemodADC_Status_DEMOD_COEFF_OUT     8
    #define   MSK32avifGbl_DemodADC_Status_DEMOD_COEFF_OUT        0x000007F8
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_DemodADC_Func                       0x0418

    #define     BA_avifGbl_DemodADC_Func_DEMOD_RSTB            0x0418
    #define     B16avifGbl_DemodADC_Func_DEMOD_RSTB            0x0418
    #define   LSb32avifGbl_DemodADC_Func_DEMOD_RSTB               0
    #define   LSb16avifGbl_DemodADC_Func_DEMOD_RSTB               0
    #define       bavifGbl_DemodADC_Func_DEMOD_RSTB            1
    #define   MSK32avifGbl_DemodADC_Func_DEMOD_RSTB               0x00000001

    #define     BA_avifGbl_DemodADC_Func_DEMOD_CLKINV          0x0418
    #define     B16avifGbl_DemodADC_Func_DEMOD_CLKINV          0x0418
    #define   LSb32avifGbl_DemodADC_Func_DEMOD_CLKINV             1
    #define   LSb16avifGbl_DemodADC_Func_DEMOD_CLKINV             1
    #define       bavifGbl_DemodADC_Func_DEMOD_CLKINV          1
    #define   MSK32avifGbl_DemodADC_Func_DEMOD_CLKINV             0x00000002

    #define     BA_avifGbl_DemodADC_Func_DEMOD_CLKMONEN        0x0418
    #define     B16avifGbl_DemodADC_Func_DEMOD_CLKMONEN        0x0418
    #define   LSb32avifGbl_DemodADC_Func_DEMOD_CLKMONEN           2
    #define   LSb16avifGbl_DemodADC_Func_DEMOD_CLKMONEN           2
    #define       bavifGbl_DemodADC_Func_DEMOD_CLKMONEN        1
    #define   MSK32avifGbl_DemodADC_Func_DEMOD_CLKMONEN           0x00000004

    #define     BA_avifGbl_DemodADC_Func_DEMOD_MUTE            0x0418
    #define     B16avifGbl_DemodADC_Func_DEMOD_MUTE            0x0418
    #define   LSb32avifGbl_DemodADC_Func_DEMOD_MUTE               3
    #define   LSb16avifGbl_DemodADC_Func_DEMOD_MUTE               3
    #define       bavifGbl_DemodADC_Func_DEMOD_MUTE            1
    #define   MSK32avifGbl_DemodADC_Func_DEMOD_MUTE               0x00000008

    #define     BA_avifGbl_DemodADC_Func_DEMOD_RSTSAR          0x0418
    #define     B16avifGbl_DemodADC_Func_DEMOD_RSTSAR          0x0418
    #define   LSb32avifGbl_DemodADC_Func_DEMOD_RSTSAR             4
    #define   LSb16avifGbl_DemodADC_Func_DEMOD_RSTSAR             4
    #define       bavifGbl_DemodADC_Func_DEMOD_RSTSAR          1
    #define   MSK32avifGbl_DemodADC_Func_DEMOD_RSTSAR             0x00000010

    #define     BA_avifGbl_DemodADC_Func_DEMOD_OUTSIGNED       0x0418
    #define     B16avifGbl_DemodADC_Func_DEMOD_OUTSIGNED       0x0418
    #define   LSb32avifGbl_DemodADC_Func_DEMOD_OUTSIGNED          5
    #define   LSb16avifGbl_DemodADC_Func_DEMOD_OUTSIGNED          5
    #define       bavifGbl_DemodADC_Func_DEMOD_OUTSIGNED       1
    #define   MSK32avifGbl_DemodADC_Func_DEMOD_OUTSIGNED          0x00000020

    #define     BA_avifGbl_DemodADC_Func_DEMOD_PD              0x0418
    #define     B16avifGbl_DemodADC_Func_DEMOD_PD              0x0418
    #define   LSb32avifGbl_DemodADC_Func_DEMOD_PD                 6
    #define   LSb16avifGbl_DemodADC_Func_DEMOD_PD                 6
    #define       bavifGbl_DemodADC_Func_DEMOD_PD              1
    #define   MSK32avifGbl_DemodADC_Func_DEMOD_PD                 0x00000040
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_DemodADC_CurrentCntrl               0x041C

    #define     BA_avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL 0x041C
    #define     B16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL 0x041C
    #define   LSb32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL    0
    #define   LSb16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL    0
    #define       bavifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL 2
    #define   MSK32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL    0x00000003

    #define     BA_avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL 0x041C
    #define     B16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL 0x041C
    #define   LSb32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL    2
    #define   LSb16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL    2
    #define       bavifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL 2
    #define   MSK32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL    0x0000000C

    #define     BA_avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL 0x041C
    #define     B16avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL 0x041C
    #define   LSb32avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL    4
    #define   LSb16avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL    4
    #define       bavifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL 2
    #define   MSK32avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL    0x00000030

    #define     BA_avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL 0x041C
    #define     B16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL 0x041C
    #define   LSb32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL    6
    #define   LSb16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL    6
    #define       bavifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL 2
    #define   MSK32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL    0x000000C0

    #define     BA_avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL 0x041D
    #define     B16avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL 0x041C
    #define   LSb32avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL    8
    #define   LSb16avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL    8
    #define       bavifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL 2
    #define   MSK32avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL    0x00000300
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_DemodADC_CalCntrl                   0x0420

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED   0x0420
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED   0x0420
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED      0
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED      0
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED   2
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED      0x00000003

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR  0x0420
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR  0x0420
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR     2
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR     2
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR  2
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR     0x0000000C

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN    0x0420
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN    0x0420
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN       4
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN       4
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN    8
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN       0x00000FF0

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN    0x0421
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN    0x0420
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN       12
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN       12
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN    1
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN       0x00001000

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE 0x0421
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE 0x0420
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE    13
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE    13
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE 1
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE    0x00002000

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD    0x0421
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD    0x0420
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD       14
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD       14
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD    1
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD       0x00004000

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR    0x0421
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR    0x0420
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR       15
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR       15
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR    1
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR       0x00008000

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT     0x0422
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT     0x0422
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT        16
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT        0
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_CORRECT     1
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT        0x00010000

    #define     BA_avifGbl_DemodADC_CalCntrl_DEMOD_START       0x0422
    #define     B16avifGbl_DemodADC_CalCntrl_DEMOD_START       0x0422
    #define   LSb32avifGbl_DemodADC_CalCntrl_DEMOD_START          17
    #define   LSb16avifGbl_DemodADC_CalCntrl_DEMOD_START          1
    #define       bavifGbl_DemodADC_CalCntrl_DEMOD_START       1
    #define   MSK32avifGbl_DemodADC_CalCntrl_DEMOD_START          0x00020000
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_DemodADC_TestCntrl                  0x0424

    #define     BA_avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN 0x0424
    #define     B16avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN 0x0424
    #define   LSb32avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN    0
    #define   LSb16avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN    0
    #define       bavifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN 1
    #define   MSK32avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN    0x00000001

    #define     BA_avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN 0x0424
    #define     B16avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN 0x0424
    #define   LSb32avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN    1
    #define   LSb16avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN    1
    #define       bavifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN 1
    #define   MSK32avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN    0x00000002

    #define     BA_avifGbl_DemodADC_TestCntrl_DEMOD_META_EN    0x0424
    #define     B16avifGbl_DemodADC_TestCntrl_DEMOD_META_EN    0x0424
    #define   LSb32avifGbl_DemodADC_TestCntrl_DEMOD_META_EN       2
    #define   LSb16avifGbl_DemodADC_TestCntrl_DEMOD_META_EN       2
    #define       bavifGbl_DemodADC_TestCntrl_DEMOD_META_EN    1
    #define   MSK32avifGbl_DemodADC_TestCntrl_DEMOD_META_EN       0x00000004

    #define     BA_avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE   0x0424
    #define     B16avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE   0x0424
    #define   LSb32avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE      3
    #define   LSb16avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE      3
    #define       bavifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE   1
    #define   MSK32avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE      0x00000008

    #define     BA_avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST   0x0424
    #define     B16avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST   0x0424
    #define   LSb32avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST      4
    #define   LSb16avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST      4
    #define       bavifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST   3
    #define   MSK32avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST      0x00000070

    #define     BA_avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST   0x0424
    #define     B16avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST   0x0424
    #define   LSb32avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST      7
    #define   LSb16avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST      7
    #define       bavifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST   3
    #define   MSK32avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST      0x00000380

    #define     BA_avifGbl_DemodADC_TestCntrl_DEMOD_META_REF   0x0425
    #define     B16avifGbl_DemodADC_TestCntrl_DEMOD_META_REF   0x0424
    #define   LSb32avifGbl_DemodADC_TestCntrl_DEMOD_META_REF      10
    #define   LSb16avifGbl_DemodADC_TestCntrl_DEMOD_META_REF      10
    #define       bavifGbl_DemodADC_TestCntrl_DEMOD_META_REF   8
    #define   MSK32avifGbl_DemodADC_TestCntrl_DEMOD_META_REF      0x0003FC00

    #define     BA_avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF  0x0426
    #define     B16avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF  0x0426
    #define   LSb32avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF     18
    #define   LSb16avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF     2
    #define       bavifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF  8
    #define   MSK32avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF     0x03FC0000
    ///////////////////////////////////////////////////////////
    #define     RA_avifGbl_DemodADC_SpareCntrl                 0x0428

    #define     BA_avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE     0x0428
    #define     B16avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE     0x0428
    #define   LSb32avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE        0
    #define   LSb16avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE        0
    #define       bavifGbl_DemodADC_SpareCntrl_DEMOD_SPARE     6
    #define   MSK32avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE        0x0000003F

    #define     BA_avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG 0x0428
    #define     B16avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG 0x0428
    #define   LSb32avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG    6
    #define   LSb16avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG    6
    #define       bavifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG 8
    #define   MSK32avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG    0x00003FC0
    ///////////////////////////////////////////////////////////

    typedef struct SIE_avifGbl {
    ///////////////////////////////////////////////////////////
              SIE_Demod_REG                                    ie_cfgReg;
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_DemodRegIfCtrl_mwrWidth(r32)        _BFGET_(r32, 7, 0)
    #define   SET32avifGbl_DemodRegIfCtrl_mwrWidth(r32,v)      _BFSET_(r32, 7, 0,v)
    #define   GET16avifGbl_DemodRegIfCtrl_mwrWidth(r16)        _BFGET_(r16, 7, 0)
    #define   SET16avifGbl_DemodRegIfCtrl_mwrWidth(r16,v)      _BFSET_(r16, 7, 0,v)

    #define   GET32avifGbl_DemodRegIfCtrl_hold(r32)            _BFGET_(r32,15, 8)
    #define   SET32avifGbl_DemodRegIfCtrl_hold(r32,v)          _BFSET_(r32,15, 8,v)
    #define   GET16avifGbl_DemodRegIfCtrl_hold(r16)            _BFGET_(r16,15, 8)
    #define   SET16avifGbl_DemodRegIfCtrl_hold(r16,v)          _BFSET_(r16,15, 8,v)

    #define     w32avifGbl_DemodRegIfCtrl                      {\
            UNSG32 uDemodRegIfCtrl_mwrWidth                    :  8;\
            UNSG32 uDemodRegIfCtrl_hold                        :  8;\
            UNSG32 RSVDx400_b16                                : 16;\
          }
    union { UNSG32 u32avifGbl_DemodRegIfCtrl;
            struct w32avifGbl_DemodRegIfCtrl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_SWRST_CTRL_avifIpRstn(r32)          _BFGET_(r32, 0, 0)
    #define   SET32avifGbl_SWRST_CTRL_avifIpRstn(r32,v)        _BFSET_(r32, 0, 0,v)
    #define   GET16avifGbl_SWRST_CTRL_avifIpRstn(r16)          _BFGET_(r16, 0, 0)
    #define   SET16avifGbl_SWRST_CTRL_avifIpRstn(r16,v)        _BFSET_(r16, 0, 0,v)

    #define   GET32avifGbl_SWRST_CTRL_demodRstn(r32)           _BFGET_(r32, 1, 1)
    #define   SET32avifGbl_SWRST_CTRL_demodRstn(r32,v)         _BFSET_(r32, 1, 1,v)
    #define   GET16avifGbl_SWRST_CTRL_demodRstn(r16)           _BFGET_(r16, 1, 1)
    #define   SET16avifGbl_SWRST_CTRL_demodRstn(r16,v)         _BFSET_(r16, 1, 1,v)

    #define   GET32avifGbl_SWRST_CTRL_farrow270MRstn(r32)      _BFGET_(r32, 2, 2)
    #define   SET32avifGbl_SWRST_CTRL_farrow270MRstn(r32,v)    _BFSET_(r32, 2, 2,v)
    #define   GET16avifGbl_SWRST_CTRL_farrow270MRstn(r16)      _BFGET_(r16, 2, 2)
    #define   SET16avifGbl_SWRST_CTRL_farrow270MRstn(r16,v)    _BFSET_(r16, 2, 2,v)

    #define   GET32avifGbl_SWRST_CTRL_farrow27MRstn(r32)       _BFGET_(r32, 3, 3)
    #define   SET32avifGbl_SWRST_CTRL_farrow27MRstn(r32,v)     _BFSET_(r32, 3, 3,v)
    #define   GET16avifGbl_SWRST_CTRL_farrow27MRstn(r16)       _BFGET_(r16, 3, 3)
    #define   SET16avifGbl_SWRST_CTRL_farrow27MRstn(r16,v)     _BFSET_(r16, 3, 3,v)

    #define   GET32avifGbl_SWRST_CTRL_bypassFarrow(r32)        _BFGET_(r32, 4, 4)
    #define   SET32avifGbl_SWRST_CTRL_bypassFarrow(r32,v)      _BFSET_(r32, 4, 4,v)
    #define   GET16avifGbl_SWRST_CTRL_bypassFarrow(r16)        _BFGET_(r16, 4, 4)
    #define   SET16avifGbl_SWRST_CTRL_bypassFarrow(r16,v)      _BFSET_(r16, 4, 4,v)

    #define     w32avifGbl_SWRST_CTRL                          {\
            UNSG32 uSWRST_CTRL_avifIpRstn                      :  1;\
            UNSG32 uSWRST_CTRL_demodRstn                       :  1;\
            UNSG32 uSWRST_CTRL_farrow270MRstn                  :  1;\
            UNSG32 uSWRST_CTRL_farrow27MRstn                   :  1;\
            UNSG32 uSWRST_CTRL_bypassFarrow                    :  1;\
            UNSG32 RSVDx404_b5                                 : 27;\
          }
    union { UNSG32 u32avifGbl_SWRST_CTRL;
            struct w32avifGbl_SWRST_CTRL;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_RWTC_31to0_value(r32)               _BFGET_(r32,31, 0)
    #define   SET32avifGbl_RWTC_31to0_value(r32,v)             _BFSET_(r32,31, 0,v)

    #define     w32avifGbl_RWTC_31to0                          {\
            UNSG32 uRWTC_31to0_value                           : 32;\
          }
    union { UNSG32 u32avifGbl_RWTC_31to0;
            struct w32avifGbl_RWTC_31to0;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_RWTC_57to32_value(r32)              _BFGET_(r32,25, 0)
    #define   SET32avifGbl_RWTC_57to32_value(r32,v)            _BFSET_(r32,25, 0,v)

    #define     w32avifGbl_RWTC_57to32                         {\
            UNSG32 uRWTC_57to32_value                          : 26;\
            UNSG32 RSVDx40C_b26                                :  6;\
          }
    union { UNSG32 u32avifGbl_RWTC_57to32;
            struct w32avifGbl_RWTC_57to32;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_Debug_Ctrl_avifdebug_sel(r32)       _BFGET_(r32, 0, 0)
    #define   SET32avifGbl_Debug_Ctrl_avifdebug_sel(r32,v)     _BFSET_(r32, 0, 0,v)
    #define   GET16avifGbl_Debug_Ctrl_avifdebug_sel(r16)       _BFGET_(r16, 0, 0)
    #define   SET16avifGbl_Debug_Ctrl_avifdebug_sel(r16,v)     _BFSET_(r16, 0, 0,v)

    #define   GET32avifGbl_Debug_Ctrl_demodIP_outsel(r32)      _BFGET_(r32, 1, 1)
    #define   SET32avifGbl_Debug_Ctrl_demodIP_outsel(r32,v)    _BFSET_(r32, 1, 1,v)
    #define   GET16avifGbl_Debug_Ctrl_demodIP_outsel(r16)      _BFGET_(r16, 1, 1)
    #define   SET16avifGbl_Debug_Ctrl_demodIP_outsel(r16,v)    _BFSET_(r16, 1, 1,v)

    #define   GET32avifGbl_Debug_Ctrl_demodAfe_outsel(r32)     _BFGET_(r32, 2, 2)
    #define   SET32avifGbl_Debug_Ctrl_demodAfe_outsel(r32,v)   _BFSET_(r32, 2, 2,v)
    #define   GET16avifGbl_Debug_Ctrl_demodAfe_outsel(r16)     _BFGET_(r16, 2, 2)
    #define   SET16avifGbl_Debug_Ctrl_demodAfe_outsel(r16,v)   _BFSET_(r16, 2, 2,v)

    #define     w32avifGbl_Debug_Ctrl                          {\
            UNSG32 uDebug_Ctrl_avifdebug_sel                   :  1;\
            UNSG32 uDebug_Ctrl_demodIP_outsel                  :  1;\
            UNSG32 uDebug_Ctrl_demodAfe_outsel                 :  1;\
            UNSG32 RSVDx410_b3                                 : 29;\
          }
    union { UNSG32 u32avifGbl_Debug_Ctrl;
            struct w32avifGbl_Debug_Ctrl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_DemodADC_Status_DEMOD_ERROR(r32)    _BFGET_(r32, 0, 0)
    #define   SET32avifGbl_DemodADC_Status_DEMOD_ERROR(r32,v)  _BFSET_(r32, 0, 0,v)
    #define   GET16avifGbl_DemodADC_Status_DEMOD_ERROR(r16)    _BFGET_(r16, 0, 0)
    #define   SET16avifGbl_DemodADC_Status_DEMOD_ERROR(r16,v)  _BFSET_(r16, 0, 0,v)

    #define   GET32avifGbl_DemodADC_Status_DEMOD_OFFCAL(r32)   _BFGET_(r32, 1, 1)
    #define   SET32avifGbl_DemodADC_Status_DEMOD_OFFCAL(r32,v) _BFSET_(r32, 1, 1,v)
    #define   GET16avifGbl_DemodADC_Status_DEMOD_OFFCAL(r16)   _BFGET_(r16, 1, 1)
    #define   SET16avifGbl_DemodADC_Status_DEMOD_OFFCAL(r16,v) _BFSET_(r16, 1, 1,v)

    #define   GET32avifGbl_DemodADC_Status_DEMOD_READY(r32)    _BFGET_(r32, 2, 2)
    #define   SET32avifGbl_DemodADC_Status_DEMOD_READY(r32,v)  _BFSET_(r32, 2, 2,v)
    #define   GET16avifGbl_DemodADC_Status_DEMOD_READY(r16)    _BFGET_(r16, 2, 2)
    #define   SET16avifGbl_DemodADC_Status_DEMOD_READY(r16,v)  _BFSET_(r16, 2, 2,v)

    #define   GET32avifGbl_DemodADC_Status_DEMOD_COEFF_OUT(r32) _BFGET_(r32,10, 3)
    #define   SET32avifGbl_DemodADC_Status_DEMOD_COEFF_OUT(r32,v) _BFSET_(r32,10, 3,v)
    #define   GET16avifGbl_DemodADC_Status_DEMOD_COEFF_OUT(r16) _BFGET_(r16,10, 3)
    #define   SET16avifGbl_DemodADC_Status_DEMOD_COEFF_OUT(r16,v) _BFSET_(r16,10, 3,v)

    #define     w32avifGbl_DemodADC_Status                     {\
            UNSG32 uDemodADC_Status_DEMOD_ERROR                :  1;\
            UNSG32 uDemodADC_Status_DEMOD_OFFCAL               :  1;\
            UNSG32 uDemodADC_Status_DEMOD_READY                :  1;\
            UNSG32 uDemodADC_Status_DEMOD_COEFF_OUT            :  8;\
            UNSG32 RSVDx414_b11                                : 21;\
          }
    union { UNSG32 u32avifGbl_DemodADC_Status;
            struct w32avifGbl_DemodADC_Status;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_DemodADC_Func_DEMOD_RSTB(r32)       _BFGET_(r32, 0, 0)
    #define   SET32avifGbl_DemodADC_Func_DEMOD_RSTB(r32,v)     _BFSET_(r32, 0, 0,v)
    #define   GET16avifGbl_DemodADC_Func_DEMOD_RSTB(r16)       _BFGET_(r16, 0, 0)
    #define   SET16avifGbl_DemodADC_Func_DEMOD_RSTB(r16,v)     _BFSET_(r16, 0, 0,v)

    #define   GET32avifGbl_DemodADC_Func_DEMOD_CLKINV(r32)     _BFGET_(r32, 1, 1)
    #define   SET32avifGbl_DemodADC_Func_DEMOD_CLKINV(r32,v)   _BFSET_(r32, 1, 1,v)
    #define   GET16avifGbl_DemodADC_Func_DEMOD_CLKINV(r16)     _BFGET_(r16, 1, 1)
    #define   SET16avifGbl_DemodADC_Func_DEMOD_CLKINV(r16,v)   _BFSET_(r16, 1, 1,v)

    #define   GET32avifGbl_DemodADC_Func_DEMOD_CLKMONEN(r32)   _BFGET_(r32, 2, 2)
    #define   SET32avifGbl_DemodADC_Func_DEMOD_CLKMONEN(r32,v) _BFSET_(r32, 2, 2,v)
    #define   GET16avifGbl_DemodADC_Func_DEMOD_CLKMONEN(r16)   _BFGET_(r16, 2, 2)
    #define   SET16avifGbl_DemodADC_Func_DEMOD_CLKMONEN(r16,v) _BFSET_(r16, 2, 2,v)

    #define   GET32avifGbl_DemodADC_Func_DEMOD_MUTE(r32)       _BFGET_(r32, 3, 3)
    #define   SET32avifGbl_DemodADC_Func_DEMOD_MUTE(r32,v)     _BFSET_(r32, 3, 3,v)
    #define   GET16avifGbl_DemodADC_Func_DEMOD_MUTE(r16)       _BFGET_(r16, 3, 3)
    #define   SET16avifGbl_DemodADC_Func_DEMOD_MUTE(r16,v)     _BFSET_(r16, 3, 3,v)

    #define   GET32avifGbl_DemodADC_Func_DEMOD_RSTSAR(r32)     _BFGET_(r32, 4, 4)
    #define   SET32avifGbl_DemodADC_Func_DEMOD_RSTSAR(r32,v)   _BFSET_(r32, 4, 4,v)
    #define   GET16avifGbl_DemodADC_Func_DEMOD_RSTSAR(r16)     _BFGET_(r16, 4, 4)
    #define   SET16avifGbl_DemodADC_Func_DEMOD_RSTSAR(r16,v)   _BFSET_(r16, 4, 4,v)

    #define   GET32avifGbl_DemodADC_Func_DEMOD_OUTSIGNED(r32)  _BFGET_(r32, 5, 5)
    #define   SET32avifGbl_DemodADC_Func_DEMOD_OUTSIGNED(r32,v) _BFSET_(r32, 5, 5,v)
    #define   GET16avifGbl_DemodADC_Func_DEMOD_OUTSIGNED(r16)  _BFGET_(r16, 5, 5)
    #define   SET16avifGbl_DemodADC_Func_DEMOD_OUTSIGNED(r16,v) _BFSET_(r16, 5, 5,v)

    #define   GET32avifGbl_DemodADC_Func_DEMOD_PD(r32)         _BFGET_(r32, 6, 6)
    #define   SET32avifGbl_DemodADC_Func_DEMOD_PD(r32,v)       _BFSET_(r32, 6, 6,v)
    #define   GET16avifGbl_DemodADC_Func_DEMOD_PD(r16)         _BFGET_(r16, 6, 6)
    #define   SET16avifGbl_DemodADC_Func_DEMOD_PD(r16,v)       _BFSET_(r16, 6, 6,v)

    #define     w32avifGbl_DemodADC_Func                       {\
            UNSG32 uDemodADC_Func_DEMOD_RSTB                   :  1;\
            UNSG32 uDemodADC_Func_DEMOD_CLKINV                 :  1;\
            UNSG32 uDemodADC_Func_DEMOD_CLKMONEN               :  1;\
            UNSG32 uDemodADC_Func_DEMOD_MUTE                   :  1;\
            UNSG32 uDemodADC_Func_DEMOD_RSTSAR                 :  1;\
            UNSG32 uDemodADC_Func_DEMOD_OUTSIGNED              :  1;\
            UNSG32 uDemodADC_Func_DEMOD_PD                     :  1;\
            UNSG32 RSVDx418_b7                                 : 25;\
          }
    union { UNSG32 u32avifGbl_DemodADC_Func;
            struct w32avifGbl_DemodADC_Func;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL(r32) _BFGET_(r32, 1, 0)
    #define   SET32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL(r32,v) _BFSET_(r32, 1, 0,v)
    #define   GET16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL(r16) _BFGET_(r16, 1, 0)
    #define   SET16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL(r16,v) _BFSET_(r16, 1, 0,v)

    #define   GET32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL(r32) _BFGET_(r32, 3, 2)
    #define   SET32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL(r32,v) _BFSET_(r32, 3, 2,v)
    #define   GET16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL(r16) _BFGET_(r16, 3, 2)
    #define   SET16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL(r16,v) _BFSET_(r16, 3, 2,v)

    #define   GET32avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL(r32) _BFGET_(r32, 5, 4)
    #define   SET32avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL(r32,v) _BFSET_(r32, 5, 4,v)
    #define   GET16avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL(r16) _BFGET_(r16, 5, 4)
    #define   SET16avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL(r16,v) _BFSET_(r16, 5, 4,v)

    #define   GET32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL(r32) _BFGET_(r32, 7, 6)
    #define   SET32avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL(r32,v) _BFSET_(r32, 7, 6,v)
    #define   GET16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL(r16) _BFGET_(r16, 7, 6)
    #define   SET16avifGbl_DemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL(r16,v) _BFSET_(r16, 7, 6,v)

    #define   GET32avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL(r32) _BFGET_(r32, 9, 8)
    #define   SET32avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL(r32,v) _BFSET_(r32, 9, 8,v)
    #define   GET16avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL(r16) _BFGET_(r16, 9, 8)
    #define   SET16avifGbl_DemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL(r16,v) _BFSET_(r16, 9, 8,v)

    #define     w32avifGbl_DemodADC_CurrentCntrl               {\
            UNSG32 uDemodADC_CurrentCntrl_DEMOD_ADC_ICCTRL     :  2;\
            UNSG32 uDemodADC_CurrentCntrl_DEMOD_ADC_IPCTRL     :  2;\
            UNSG32 uDemodADC_CurrentCntrl_DEMOD_BUF_VREFCTRL   :  2;\
            UNSG32 uDemodADC_CurrentCntrl_DEMOD_ADC_VREFCTRL   :  2;\
            UNSG32 uDemodADC_CurrentCntrl_DEMOD_BUF_VCMOCTRL   :  2;\
            UNSG32 RSVDx41C_b10                                : 22;\
          }
    union { UNSG32 u32avifGbl_DemodADC_CurrentCntrl;
            struct w32avifGbl_DemodADC_CurrentCntrl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED(r32) _BFGET_(r32, 1, 0)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED(r32,v) _BFSET_(r32, 1, 0,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED(r16) _BFGET_(r16, 1, 0)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_CAL_SPEED(r16,v) _BFSET_(r16, 1, 0,v)

    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR(r32) _BFGET_(r32, 3, 2)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR(r32,v) _BFSET_(r32, 3, 2,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR(r16) _BFGET_(r16, 3, 2)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_ADDR(r16,v) _BFSET_(r16, 3, 2,v)

    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN(r32) _BFGET_(r32,11, 4)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN(r32,v) _BFSET_(r32,11, 4,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN(r16) _BFGET_(r16,11, 4)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_IN(r16,v) _BFSET_(r16,11, 4,v)

    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN(r32) _BFGET_(r32,12,12)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN(r32,v) _BFSET_(r32,12,12,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN(r16) _BFGET_(r16,12,12)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_SPEED_EN(r16,v) _BFSET_(r16,12,12,v)

    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE(r32) _BFGET_(r32,13,13)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE(r32,v) _BFSET_(r32,13,13,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE(r16) _BFGET_(r16,13,13)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_FORCE(r16,v) _BFSET_(r16,13,13,v)

    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD(r32) _BFGET_(r32,14,14)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD(r32,v) _BFSET_(r32,14,14,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD(r16) _BFGET_(r16,14,14)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_RD(r16,v) _BFSET_(r16,14,14,v)

    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR(r32) _BFGET_(r32,15,15)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR(r32,v) _BFSET_(r32,15,15,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR(r16) _BFGET_(r16,15,15)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_COEFF_WR(r16,v) _BFSET_(r16,15,15,v)

    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT(r32) _BFGET_(r32,16,16)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT(r32,v) _BFSET_(r32,16,16,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT(r16) _BFGET_(r16, 0, 0)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_CORRECT(r16,v) _BFSET_(r16, 0, 0,v)

    #define   GET32avifGbl_DemodADC_CalCntrl_DEMOD_START(r32)  _BFGET_(r32,17,17)
    #define   SET32avifGbl_DemodADC_CalCntrl_DEMOD_START(r32,v) _BFSET_(r32,17,17,v)
    #define   GET16avifGbl_DemodADC_CalCntrl_DEMOD_START(r16)  _BFGET_(r16, 1, 1)
    #define   SET16avifGbl_DemodADC_CalCntrl_DEMOD_START(r16,v) _BFSET_(r16, 1, 1,v)

    #define     w32avifGbl_DemodADC_CalCntrl                   {\
            UNSG32 uDemodADC_CalCntrl_DEMOD_CAL_SPEED          :  2;\
            UNSG32 uDemodADC_CalCntrl_DEMOD_COEFF_ADDR         :  2;\
            UNSG32 uDemodADC_CalCntrl_DEMOD_COEFF_IN           :  8;\
            UNSG32 uDemodADC_CalCntrl_DEMOD_SPEED_EN           :  1;\
            UNSG32 uDemodADC_CalCntrl_DEMOD_COEFF_FORCE        :  1;\
            UNSG32 uDemodADC_CalCntrl_DEMOD_COEFF_RD           :  1;\
            UNSG32 uDemodADC_CalCntrl_DEMOD_COEFF_WR           :  1;\
            UNSG32 uDemodADC_CalCntrl_DEMOD_CORRECT            :  1;\
            UNSG32 uDemodADC_CalCntrl_DEMOD_START              :  1;\
            UNSG32 RSVDx420_b18                                : 14;\
          }
    union { UNSG32 u32avifGbl_DemodADC_CalCntrl;
            struct w32avifGbl_DemodADC_CalCntrl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN(r32) _BFGET_(r32, 0, 0)
    #define   SET32avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN(r32,v) _BFSET_(r32, 0, 0,v)
    #define   GET16avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN(r16) _BFGET_(r16, 0, 0)
    #define   SET16avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TESTEN(r16,v) _BFSET_(r16, 0, 0,v)

    #define   GET32avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN(r32) _BFGET_(r32, 1, 1)
    #define   SET32avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN(r32,v) _BFSET_(r32, 1, 1,v)
    #define   GET16avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN(r16) _BFGET_(r16, 1, 1)
    #define   SET16avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TESTEN(r16,v) _BFSET_(r16, 1, 1,v)

    #define   GET32avifGbl_DemodADC_TestCntrl_DEMOD_META_EN(r32) _BFGET_(r32, 2, 2)
    #define   SET32avifGbl_DemodADC_TestCntrl_DEMOD_META_EN(r32,v) _BFSET_(r32, 2, 2,v)
    #define   GET16avifGbl_DemodADC_TestCntrl_DEMOD_META_EN(r16) _BFGET_(r16, 2, 2)
    #define   SET16avifGbl_DemodADC_TestCntrl_DEMOD_META_EN(r16,v) _BFSET_(r16, 2, 2,v)

    #define   GET32avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE(r32) _BFGET_(r32, 3, 3)
    #define   SET32avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE(r32,v) _BFSET_(r32, 3, 3,v)
    #define   GET16avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE(r16) _BFGET_(r16, 3, 3)
    #define   SET16avifGbl_DemodADC_TestCntrl_DEMOD_REG_GATE(r16,v) _BFSET_(r16, 3, 3,v)

    #define   GET32avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST(r32) _BFGET_(r32, 6, 4)
    #define   SET32avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST(r32,v) _BFSET_(r32, 6, 4,v)
    #define   GET16avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST(r16) _BFGET_(r16, 6, 4)
    #define   SET16avifGbl_DemodADC_TestCntrl_DEMOD_ADC_TEST(r16,v) _BFSET_(r16, 6, 4,v)

    #define   GET32avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST(r32) _BFGET_(r32, 9, 7)
    #define   SET32avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST(r32,v) _BFSET_(r32, 9, 7,v)
    #define   GET16avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST(r16) _BFGET_(r16, 9, 7)
    #define   SET16avifGbl_DemodADC_TestCntrl_DEMOD_BUF_TEST(r16,v) _BFSET_(r16, 9, 7,v)

    #define   GET32avifGbl_DemodADC_TestCntrl_DEMOD_META_REF(r32) _BFGET_(r32,17,10)
    #define   SET32avifGbl_DemodADC_TestCntrl_DEMOD_META_REF(r32,v) _BFSET_(r32,17,10,v)

    #define   GET32avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF(r32) _BFGET_(r32,25,18)
    #define   SET32avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF(r32,v) _BFSET_(r32,25,18,v)
    #define   GET16avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF(r16) _BFGET_(r16, 9, 2)
    #define   SET16avifGbl_DemodADC_TestCntrl_DEMOD_SPEED_REF(r16,v) _BFSET_(r16, 9, 2,v)

    #define     w32avifGbl_DemodADC_TestCntrl                  {\
            UNSG32 uDemodADC_TestCntrl_DEMOD_ADC_TESTEN        :  1;\
            UNSG32 uDemodADC_TestCntrl_DEMOD_BUF_TESTEN        :  1;\
            UNSG32 uDemodADC_TestCntrl_DEMOD_META_EN           :  1;\
            UNSG32 uDemodADC_TestCntrl_DEMOD_REG_GATE          :  1;\
            UNSG32 uDemodADC_TestCntrl_DEMOD_ADC_TEST          :  3;\
            UNSG32 uDemodADC_TestCntrl_DEMOD_BUF_TEST          :  3;\
            UNSG32 uDemodADC_TestCntrl_DEMOD_META_REF          :  8;\
            UNSG32 uDemodADC_TestCntrl_DEMOD_SPEED_REF         :  8;\
            UNSG32 RSVDx424_b26                                :  6;\
          }
    union { UNSG32 u32avifGbl_DemodADC_TestCntrl;
            struct w32avifGbl_DemodADC_TestCntrl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE(r32) _BFGET_(r32, 5, 0)
    #define   SET32avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE(r32,v) _BFSET_(r32, 5, 0,v)
    #define   GET16avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE(r16) _BFGET_(r16, 5, 0)
    #define   SET16avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE(r16,v) _BFSET_(r16, 5, 0,v)

    #define   GET32avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG(r32) _BFGET_(r32,13, 6)
    #define   SET32avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG(r32,v) _BFSET_(r32,13, 6,v)
    #define   GET16avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG(r16) _BFGET_(r16,13, 6)
    #define   SET16avifGbl_DemodADC_SpareCntrl_DEMOD_SPARE_DIG(r16,v) _BFSET_(r16,13, 6,v)

    #define     w32avifGbl_DemodADC_SpareCntrl                 {\
            UNSG32 uDemodADC_SpareCntrl_DEMOD_SPARE            :  6;\
            UNSG32 uDemodADC_SpareCntrl_DEMOD_SPARE_DIG        :  8;\
            UNSG32 RSVDx428_b14                                : 18;\
          }
    union { UNSG32 u32avifGbl_DemodADC_SpareCntrl;
            struct w32avifGbl_DemodADC_SpareCntrl;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx42C                                    [980];
    ///////////////////////////////////////////////////////////
    } SIE_avifGbl;

    typedef union  T32avifGbl_DemodRegIfCtrl
          { UNSG32 u32;
            struct w32avifGbl_DemodRegIfCtrl;
                 } T32avifGbl_DemodRegIfCtrl;
    typedef union  T32avifGbl_SWRST_CTRL
          { UNSG32 u32;
            struct w32avifGbl_SWRST_CTRL;
                 } T32avifGbl_SWRST_CTRL;
    typedef union  T32avifGbl_RWTC_31to0
          { UNSG32 u32;
            struct w32avifGbl_RWTC_31to0;
                 } T32avifGbl_RWTC_31to0;
    typedef union  T32avifGbl_RWTC_57to32
          { UNSG32 u32;
            struct w32avifGbl_RWTC_57to32;
                 } T32avifGbl_RWTC_57to32;
    typedef union  T32avifGbl_Debug_Ctrl
          { UNSG32 u32;
            struct w32avifGbl_Debug_Ctrl;
                 } T32avifGbl_Debug_Ctrl;
    typedef union  T32avifGbl_DemodADC_Status
          { UNSG32 u32;
            struct w32avifGbl_DemodADC_Status;
                 } T32avifGbl_DemodADC_Status;
    typedef union  T32avifGbl_DemodADC_Func
          { UNSG32 u32;
            struct w32avifGbl_DemodADC_Func;
                 } T32avifGbl_DemodADC_Func;
    typedef union  T32avifGbl_DemodADC_CurrentCntrl
          { UNSG32 u32;
            struct w32avifGbl_DemodADC_CurrentCntrl;
                 } T32avifGbl_DemodADC_CurrentCntrl;
    typedef union  T32avifGbl_DemodADC_CalCntrl
          { UNSG32 u32;
            struct w32avifGbl_DemodADC_CalCntrl;
                 } T32avifGbl_DemodADC_CalCntrl;
    typedef union  T32avifGbl_DemodADC_TestCntrl
          { UNSG32 u32;
            struct w32avifGbl_DemodADC_TestCntrl;
                 } T32avifGbl_DemodADC_TestCntrl;
    typedef union  T32avifGbl_DemodADC_SpareCntrl
          { UNSG32 u32;
            struct w32avifGbl_DemodADC_SpareCntrl;
                 } T32avifGbl_DemodADC_SpareCntrl;
    ///////////////////////////////////////////////////////////

    typedef union  TavifGbl_DemodRegIfCtrl
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_DemodRegIfCtrl;
                   };
                 } TavifGbl_DemodRegIfCtrl;
    typedef union  TavifGbl_SWRST_CTRL
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_SWRST_CTRL;
                   };
                 } TavifGbl_SWRST_CTRL;
    typedef union  TavifGbl_RWTC_31to0
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_RWTC_31to0;
                   };
                 } TavifGbl_RWTC_31to0;
    typedef union  TavifGbl_RWTC_57to32
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_RWTC_57to32;
                   };
                 } TavifGbl_RWTC_57to32;
    typedef union  TavifGbl_Debug_Ctrl
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_Debug_Ctrl;
                   };
                 } TavifGbl_Debug_Ctrl;
    typedef union  TavifGbl_DemodADC_Status
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_DemodADC_Status;
                   };
                 } TavifGbl_DemodADC_Status;
    typedef union  TavifGbl_DemodADC_Func
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_DemodADC_Func;
                   };
                 } TavifGbl_DemodADC_Func;
    typedef union  TavifGbl_DemodADC_CurrentCntrl
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_DemodADC_CurrentCntrl;
                   };
                 } TavifGbl_DemodADC_CurrentCntrl;
    typedef union  TavifGbl_DemodADC_CalCntrl
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_DemodADC_CalCntrl;
                   };
                 } TavifGbl_DemodADC_CalCntrl;
    typedef union  TavifGbl_DemodADC_TestCntrl
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_DemodADC_TestCntrl;
                   };
                 } TavifGbl_DemodADC_TestCntrl;
    typedef union  TavifGbl_DemodADC_SpareCntrl
          { UNSG32 u32[1];
            struct {
            struct w32avifGbl_DemodADC_SpareCntrl;
                   };
                 } TavifGbl_DemodADC_SpareCntrl;

    ///////////////////////////////////////////////////////////
     SIGN32 avifGbl_drvrd(SIE_avifGbl *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 avifGbl_drvwr(SIE_avifGbl *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void avifGbl_reset(SIE_avifGbl *p);
     SIGN32 avifGbl_cmp  (SIE_avifGbl *p, SIE_avifGbl *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define avifGbl_check(p,pie,pfx,hLOG) avifGbl_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define avifGbl_print(p,    pfx,hLOG) avifGbl_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: avifGbl
////////////////////////////////////////////////////////////


#ifdef __cplusplus
  }
#endif
#pragma  pack()

#endif
//////
/// ENDOFFILE: avifGbl.h
////////////////////////////////////////////////////////////