/********************************************************************************
 * Marvell GPL License Option
 *
 * If you received this File from Marvell, you may opt to use, redistribute and/or
 * modify this File in accordance with the terms and conditions of the General
 * Public License Version 2, June 1991 (the "GPL License"), a copy of which is
 * available along with the File in the license.txt file or by writing to the Free
 * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
 * on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
 * DISCLAIMED.  The GPL License provides additional details about this warranty
 * disclaimer.
 ******************************************************************************/

//////
/// don't edit! auto-generated by docc: dmx.h
////////////////////////////////////////////////////////////
#ifndef dmx_h
#define dmx_h (){}


#include "ctypes.h"

#pragma pack(1)
#ifdef __cplusplus
  extern "C" {
#endif

#ifndef _DOCC_H_BITOPS_
#define _DOCC_H_BITOPS_ (){}

    #define _bSETMASK_(b)                                      ((b)<32 ? (1<<((b)&31)) : 0)
    #define _NSETMASK_(msb,lsb)                                (_bSETMASK_((msb)+1)-_bSETMASK_(lsb))
    #define _bCLRMASK_(b)                                      (~_bSETMASK_(b))
    #define _NCLRMASK_(msb,lsb)                                (~_NSETMASK_(msb,lsb))
    #define _BFGET_(r,msb,lsb)                                 (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb)))
    #define _BFSET_(r,msb,lsb,v)                               do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0)

#endif


//////
/// 
/// $INTERFACE PIDWord                                  (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 1  V                         0x0
///                                    ###
///                                    * 1 = enable this PID match ;
///                                    * DV-FR-CNR
///                                    ###
///               %unsigned 1  FLT                       0x0
///                                    ###
///                                    * indicates packets matching this ID is for PSI
///                                    * DV-FR-CNR
///                                    ###
///               %unsigned 13 N                         0x0
///                                    ###
///                                    * value to match
///                                    * DV-FR-CNR
///                                    ###
///               %unsigned 8  LTSID                     
///                                    ###
///                                    * local TSID for opencable
///                                    ###
///               %%        9          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      23b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_PIDWord
#define h_PIDWord (){}

    #define     BA_PIDWord_V                                   0x0000
    #define     B16PIDWord_V                                   0x0000
    #define   LSb32PIDWord_V                                      0
    #define   LSb16PIDWord_V                                      0
    #define       bPIDWord_V                                   1
    #define   MSK32PIDWord_V                                      0x00000001

    #define     BA_PIDWord_FLT                                 0x0000
    #define     B16PIDWord_FLT                                 0x0000
    #define   LSb32PIDWord_FLT                                    1
    #define   LSb16PIDWord_FLT                                    1
    #define       bPIDWord_FLT                                 1
    #define   MSK32PIDWord_FLT                                    0x00000002

    #define     BA_PIDWord_N                                   0x0000
    #define     B16PIDWord_N                                   0x0000
    #define   LSb32PIDWord_N                                      2
    #define   LSb16PIDWord_N                                      2
    #define       bPIDWord_N                                   13
    #define   MSK32PIDWord_N                                      0x00007FFC

    #define     BA_PIDWord_LTSID                               0x0001
    #define     B16PIDWord_LTSID                               0x0000
    #define   LSb32PIDWord_LTSID                                  15
    #define   LSb16PIDWord_LTSID                                  15
    #define       bPIDWord_LTSID                               8
    #define   MSK32PIDWord_LTSID                                  0x007F8000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_PIDWord {
    ///////////////////////////////////////////////////////////
    #define   GET32PIDWord_V(r32)                              _BFGET_(r32, 0, 0)
    #define   SET32PIDWord_V(r32,v)                            _BFSET_(r32, 0, 0,v)
    #define   GET16PIDWord_V(r16)                              _BFGET_(r16, 0, 0)
    #define   SET16PIDWord_V(r16,v)                            _BFSET_(r16, 0, 0,v)

    #define   GET32PIDWord_FLT(r32)                            _BFGET_(r32, 1, 1)
    #define   SET32PIDWord_FLT(r32,v)                          _BFSET_(r32, 1, 1,v)
    #define   GET16PIDWord_FLT(r16)                            _BFGET_(r16, 1, 1)
    #define   SET16PIDWord_FLT(r16,v)                          _BFSET_(r16, 1, 1,v)

    #define   GET32PIDWord_N(r32)                              _BFGET_(r32,14, 2)
    #define   SET32PIDWord_N(r32,v)                            _BFSET_(r32,14, 2,v)
    #define   GET16PIDWord_N(r16)                              _BFGET_(r16,14, 2)
    #define   SET16PIDWord_N(r16,v)                            _BFSET_(r16,14, 2,v)

    #define   GET32PIDWord_LTSID(r32)                          _BFGET_(r32,22,15)
    #define   SET32PIDWord_LTSID(r32,v)                        _BFSET_(r32,22,15,v)

            UNSG32 u_V                                         :  1;
            UNSG32 u_FLT                                       :  1;
            UNSG32 u_N                                         : 13;
            UNSG32 u_LTSID                                     :  8;
            UNSG32 RSVDx0_b23                                  :  9;
    ///////////////////////////////////////////////////////////
    } SIE_PIDWord;

    ///////////////////////////////////////////////////////////
     SIGN32 PIDWord_drvrd(SIE_PIDWord *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 PIDWord_drvwr(SIE_PIDWord *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void PIDWord_reset(SIE_PIDWord *p);
     SIGN32 PIDWord_cmp  (SIE_PIDWord *p, SIE_PIDWord *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define PIDWord_check(p,pie,pfx,hLOG) PIDWord_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define PIDWord_print(p,    pfx,hLOG) PIDWord_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: PIDWord
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE PID                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 PID                  
///               $PIDWord             PID               REG      [32]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     128B, bits:     736b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_PID
#define h_PID (){}

    #define     RA_PID_PID                                     0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_PID {
    ///////////////////////////////////////////////////////////
              SIE_PIDWord                                      ie_PID[32];
    ///////////////////////////////////////////////////////////
    } SIE_PID;

    ///////////////////////////////////////////////////////////
     SIGN32 PID_drvrd(SIE_PID *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 PID_drvwr(SIE_PID *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void PID_reset(SIE_PID *p);
     SIGN32 PID_cmp  (SIE_PID *p, SIE_PID *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define PID_check(p,pie,pfx,hLOG) PID_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define PID_print(p,    pfx,hLOG) PID_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: PID
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSCmd                   biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 PID                       0x0
///               %unsigned 2  TSID                      0x0
///               %unsigned 1  cascade                   0x0
///                                    ###
///                                    * 1: indicates this packet needs to go through a cascaded section filter
///                                    ###
///               %unsigned 5  PIDIDX                    0x0
///               %unsigned 1  TSERR                     0x0
///               %unsigned 1  MATCH                     
///                                    ###
///                                    * not used in TSC, will be set by section filter
///                                    ###
///               %unsigned 7  FLTID                     0x0
///                                    ###
///                                    * indicates the ID of matched section filter
///                                    ###
///               %%        2          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      30b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSCmd
#define h_TSCmd (){}

    #define     BA_TSCmd_PID                                   0x0000
    #define     B16TSCmd_PID                                   0x0000
    #define   LSb32TSCmd_PID                                      0
    #define   LSb16TSCmd_PID                                      0
    #define       bTSCmd_PID                                   13
    #define   MSK32TSCmd_PID                                      0x00001FFF

    #define     BA_TSCmd_TSID                                  0x0001
    #define     B16TSCmd_TSID                                  0x0000
    #define   LSb32TSCmd_TSID                                     13
    #define   LSb16TSCmd_TSID                                     13
    #define       bTSCmd_TSID                                  2
    #define   MSK32TSCmd_TSID                                     0x00006000

    #define     BA_TSCmd_cascade                               0x0001
    #define     B16TSCmd_cascade                               0x0000
    #define   LSb32TSCmd_cascade                                  15
    #define   LSb16TSCmd_cascade                                  15
    #define       bTSCmd_cascade                               1
    #define   MSK32TSCmd_cascade                                  0x00008000

    #define     BA_TSCmd_PIDIDX                                0x0002
    #define     B16TSCmd_PIDIDX                                0x0002
    #define   LSb32TSCmd_PIDIDX                                   16
    #define   LSb16TSCmd_PIDIDX                                   0
    #define       bTSCmd_PIDIDX                                5
    #define   MSK32TSCmd_PIDIDX                                   0x001F0000

    #define     BA_TSCmd_TSERR                                 0x0002
    #define     B16TSCmd_TSERR                                 0x0002
    #define   LSb32TSCmd_TSERR                                    21
    #define   LSb16TSCmd_TSERR                                    5
    #define       bTSCmd_TSERR                                 1
    #define   MSK32TSCmd_TSERR                                    0x00200000

    #define     BA_TSCmd_MATCH                                 0x0002
    #define     B16TSCmd_MATCH                                 0x0002
    #define   LSb32TSCmd_MATCH                                    22
    #define   LSb16TSCmd_MATCH                                    6
    #define       bTSCmd_MATCH                                 1
    #define   MSK32TSCmd_MATCH                                    0x00400000

    #define     BA_TSCmd_FLTID                                 0x0002
    #define     B16TSCmd_FLTID                                 0x0002
    #define   LSb32TSCmd_FLTID                                    23
    #define   LSb16TSCmd_FLTID                                    7
    #define       bTSCmd_FLTID                                 7
    #define   MSK32TSCmd_FLTID                                    0x3F800000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSCmd {
    ///////////////////////////////////////////////////////////
    #define   GET32TSCmd_PID(r32)                              _BFGET_(r32,12, 0)
    #define   SET32TSCmd_PID(r32,v)                            _BFSET_(r32,12, 0,v)
    #define   GET16TSCmd_PID(r16)                              _BFGET_(r16,12, 0)
    #define   SET16TSCmd_PID(r16,v)                            _BFSET_(r16,12, 0,v)

    #define   GET32TSCmd_TSID(r32)                             _BFGET_(r32,14,13)
    #define   SET32TSCmd_TSID(r32,v)                           _BFSET_(r32,14,13,v)
    #define   GET16TSCmd_TSID(r16)                             _BFGET_(r16,14,13)
    #define   SET16TSCmd_TSID(r16,v)                           _BFSET_(r16,14,13,v)

    #define   GET32TSCmd_cascade(r32)                          _BFGET_(r32,15,15)
    #define   SET32TSCmd_cascade(r32,v)                        _BFSET_(r32,15,15,v)
    #define   GET16TSCmd_cascade(r16)                          _BFGET_(r16,15,15)
    #define   SET16TSCmd_cascade(r16,v)                        _BFSET_(r16,15,15,v)

    #define   GET32TSCmd_PIDIDX(r32)                           _BFGET_(r32,20,16)
    #define   SET32TSCmd_PIDIDX(r32,v)                         _BFSET_(r32,20,16,v)
    #define   GET16TSCmd_PIDIDX(r16)                           _BFGET_(r16, 4, 0)
    #define   SET16TSCmd_PIDIDX(r16,v)                         _BFSET_(r16, 4, 0,v)

    #define   GET32TSCmd_TSERR(r32)                            _BFGET_(r32,21,21)
    #define   SET32TSCmd_TSERR(r32,v)                          _BFSET_(r32,21,21,v)
    #define   GET16TSCmd_TSERR(r16)                            _BFGET_(r16, 5, 5)
    #define   SET16TSCmd_TSERR(r16,v)                          _BFSET_(r16, 5, 5,v)

    #define   GET32TSCmd_MATCH(r32)                            _BFGET_(r32,22,22)
    #define   SET32TSCmd_MATCH(r32,v)                          _BFSET_(r32,22,22,v)
    #define   GET16TSCmd_MATCH(r16)                            _BFGET_(r16, 6, 6)
    #define   SET16TSCmd_MATCH(r16,v)                          _BFSET_(r16, 6, 6,v)

    #define   GET32TSCmd_FLTID(r32)                            _BFGET_(r32,29,23)
    #define   SET32TSCmd_FLTID(r32,v)                          _BFSET_(r32,29,23,v)
    #define   GET16TSCmd_FLTID(r16)                            _BFGET_(r16,13, 7)
    #define   SET16TSCmd_FLTID(r16,v)                          _BFSET_(r16,13, 7,v)

            UNSG32 u_PID                                       : 13;
            UNSG32 u_TSID                                      :  2;
            UNSG32 u_cascade                                   :  1;
            UNSG32 u_PIDIDX                                    :  5;
            UNSG32 u_TSERR                                     :  1;
            UNSG32 u_MATCH                                     :  1;
            UNSG32 u_FLTID                                     :  7;
            UNSG32 RSVDx0_b30                                  :  2;
    ///////////////////////////////////////////////////////////
    } SIE_TSCmd;

    ///////////////////////////////////////////////////////////
     SIGN32 TSCmd_drvrd(SIE_TSCmd *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSCmd_drvwr(SIE_TSCmd *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSCmd_reset(SIE_TSCmd *p);
     SIGN32 TSCmd_cmp  (SIE_TSCmd *p, SIE_TSCmd *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSCmd_check(p,pie,pfx,hLOG) TSCmd_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSCmd_print(p,    pfx,hLOG) TSCmd_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSCmd
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSCmdTSC                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 PID                       0x0
///               %unsigned 2  TSID                      0x0
///               %unsigned 1  PUS                       0x0
///                                    ###
///                                    * 1: indicates this packet have payload_unit_start =1
///                                    ###
///               %unsigned 5  PIDIDX                    0x0
///               %unsigned 1  TSERR                     0x0
///                                    ###
///                                    * value of TSTAMPL and TSTAMPH will only valid when TSERR =0 ; when TSERR =1, TSTAMPL will content error information.
///                                    ###
///               %unsigned 10 TSTAMPL                   
///                                    ###
///                                    * low 10 bits of timestamp,
///                                    ###
///               %unsigned 32 TSTAMPH                   0x0
///                                    ###
///                                    * high 32 bit of timestamp
///                                    ###
///               %unsigned 8  LTSID                     0x0
///                                    ###
///                                    * local TS id for openCable M-Card,
///                                    * refer to cableCARD2.0 sepc, this field not exist in when tsc.CFG.mcard=0 ,
///                                    ###
///               %unsigned 8  RES1                      0x0
///                                    ###
///                                    * Mcard reserved byte 1, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 16 HOSTres                   0x0
///                                    ###
///                                    * reserved field to be set by Host , refer to cableCARD2.0 specification
///                                    ###
///               %unsigned 32 LTS                       0x0
///                                    ###
///                                    * local timestamp for opencable M-Card, this field not exist in when tsc.CFG.mcard=0
///                                    ###
///               %unsigned 16 CABLECARDRES              0x0
///                                    ###
///                                    * field reserved to use by card, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 8  RES2                      0x0
///                                    ###
///                                    * Mcard resverved byte 2, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 8  CRC                       0x0
///                                    ###
///                                    * CRC for the 11bytes mcard preheader,
///                                    * CRC-8= x8+x7+x6+x4+x2+1
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      20B, bits:     160b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSCmdTSC
#define h_TSCmdTSC (){}

    #define     BA_TSCmdTSC_PID                                0x0000
    #define     B16TSCmdTSC_PID                                0x0000
    #define   LSb32TSCmdTSC_PID                                   0
    #define   LSb16TSCmdTSC_PID                                   0
    #define       bTSCmdTSC_PID                                13
    #define   MSK32TSCmdTSC_PID                                   0x00001FFF

    #define     BA_TSCmdTSC_TSID                               0x0001
    #define     B16TSCmdTSC_TSID                               0x0000
    #define   LSb32TSCmdTSC_TSID                                  13
    #define   LSb16TSCmdTSC_TSID                                  13
    #define       bTSCmdTSC_TSID                               2
    #define   MSK32TSCmdTSC_TSID                                  0x00006000

    #define     BA_TSCmdTSC_PUS                                0x0001
    #define     B16TSCmdTSC_PUS                                0x0000
    #define   LSb32TSCmdTSC_PUS                                   15
    #define   LSb16TSCmdTSC_PUS                                   15
    #define       bTSCmdTSC_PUS                                1
    #define   MSK32TSCmdTSC_PUS                                   0x00008000

    #define     BA_TSCmdTSC_PIDIDX                             0x0002
    #define     B16TSCmdTSC_PIDIDX                             0x0002
    #define   LSb32TSCmdTSC_PIDIDX                                16
    #define   LSb16TSCmdTSC_PIDIDX                                0
    #define       bTSCmdTSC_PIDIDX                             5
    #define   MSK32TSCmdTSC_PIDIDX                                0x001F0000

    #define     BA_TSCmdTSC_TSERR                              0x0002
    #define     B16TSCmdTSC_TSERR                              0x0002
    #define   LSb32TSCmdTSC_TSERR                                 21
    #define   LSb16TSCmdTSC_TSERR                                 5
    #define       bTSCmdTSC_TSERR                              1
    #define   MSK32TSCmdTSC_TSERR                                 0x00200000

    #define     BA_TSCmdTSC_TSTAMPL                            0x0002
    #define     B16TSCmdTSC_TSTAMPL                            0x0002
    #define   LSb32TSCmdTSC_TSTAMPL                               22
    #define   LSb16TSCmdTSC_TSTAMPL                               6
    #define       bTSCmdTSC_TSTAMPL                            10
    #define   MSK32TSCmdTSC_TSTAMPL                               0xFFC00000

    #define     BA_TSCmdTSC_TSTAMPH                            0x0004
    #define     B16TSCmdTSC_TSTAMPH                            0x0004
    #define   LSb32TSCmdTSC_TSTAMPH                               0
    #define   LSb16TSCmdTSC_TSTAMPH                               0
    #define       bTSCmdTSC_TSTAMPH                            32
    #define   MSK32TSCmdTSC_TSTAMPH                               0xFFFFFFFF

    #define     BA_TSCmdTSC_LTSID                              0x0008
    #define     B16TSCmdTSC_LTSID                              0x0008
    #define   LSb32TSCmdTSC_LTSID                                 0
    #define   LSb16TSCmdTSC_LTSID                                 0
    #define       bTSCmdTSC_LTSID                              8
    #define   MSK32TSCmdTSC_LTSID                                 0x000000FF

    #define     BA_TSCmdTSC_RES1                               0x0009
    #define     B16TSCmdTSC_RES1                               0x0008
    #define   LSb32TSCmdTSC_RES1                                  8
    #define   LSb16TSCmdTSC_RES1                                  8
    #define       bTSCmdTSC_RES1                               8
    #define   MSK32TSCmdTSC_RES1                                  0x0000FF00

    #define     BA_TSCmdTSC_HOSTres                            0x000A
    #define     B16TSCmdTSC_HOSTres                            0x000A
    #define   LSb32TSCmdTSC_HOSTres                               16
    #define   LSb16TSCmdTSC_HOSTres                               0
    #define       bTSCmdTSC_HOSTres                            16
    #define   MSK32TSCmdTSC_HOSTres                               0xFFFF0000

    #define     BA_TSCmdTSC_LTS                                0x000C
    #define     B16TSCmdTSC_LTS                                0x000C
    #define   LSb32TSCmdTSC_LTS                                   0
    #define   LSb16TSCmdTSC_LTS                                   0
    #define       bTSCmdTSC_LTS                                32
    #define   MSK32TSCmdTSC_LTS                                   0xFFFFFFFF

    #define     BA_TSCmdTSC_CABLECARDRES                       0x0010
    #define     B16TSCmdTSC_CABLECARDRES                       0x0010
    #define   LSb32TSCmdTSC_CABLECARDRES                          0
    #define   LSb16TSCmdTSC_CABLECARDRES                          0
    #define       bTSCmdTSC_CABLECARDRES                       16
    #define   MSK32TSCmdTSC_CABLECARDRES                          0x0000FFFF

    #define     BA_TSCmdTSC_RES2                               0x0012
    #define     B16TSCmdTSC_RES2                               0x0012
    #define   LSb32TSCmdTSC_RES2                                  16
    #define   LSb16TSCmdTSC_RES2                                  0
    #define       bTSCmdTSC_RES2                               8
    #define   MSK32TSCmdTSC_RES2                                  0x00FF0000

    #define     BA_TSCmdTSC_CRC                                0x0013
    #define     B16TSCmdTSC_CRC                                0x0012
    #define   LSb32TSCmdTSC_CRC                                   24
    #define   LSb16TSCmdTSC_CRC                                   8
    #define       bTSCmdTSC_CRC                                8
    #define   MSK32TSCmdTSC_CRC                                   0xFF000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSCmdTSC {
    ///////////////////////////////////////////////////////////
    #define   GET32TSCmdTSC_PID(r32)                           _BFGET_(r32,12, 0)
    #define   SET32TSCmdTSC_PID(r32,v)                         _BFSET_(r32,12, 0,v)
    #define   GET16TSCmdTSC_PID(r16)                           _BFGET_(r16,12, 0)
    #define   SET16TSCmdTSC_PID(r16,v)                         _BFSET_(r16,12, 0,v)

    #define   GET32TSCmdTSC_TSID(r32)                          _BFGET_(r32,14,13)
    #define   SET32TSCmdTSC_TSID(r32,v)                        _BFSET_(r32,14,13,v)
    #define   GET16TSCmdTSC_TSID(r16)                          _BFGET_(r16,14,13)
    #define   SET16TSCmdTSC_TSID(r16,v)                        _BFSET_(r16,14,13,v)

    #define   GET32TSCmdTSC_PUS(r32)                           _BFGET_(r32,15,15)
    #define   SET32TSCmdTSC_PUS(r32,v)                         _BFSET_(r32,15,15,v)
    #define   GET16TSCmdTSC_PUS(r16)                           _BFGET_(r16,15,15)
    #define   SET16TSCmdTSC_PUS(r16,v)                         _BFSET_(r16,15,15,v)

    #define   GET32TSCmdTSC_PIDIDX(r32)                        _BFGET_(r32,20,16)
    #define   SET32TSCmdTSC_PIDIDX(r32,v)                      _BFSET_(r32,20,16,v)
    #define   GET16TSCmdTSC_PIDIDX(r16)                        _BFGET_(r16, 4, 0)
    #define   SET16TSCmdTSC_PIDIDX(r16,v)                      _BFSET_(r16, 4, 0,v)

    #define   GET32TSCmdTSC_TSERR(r32)                         _BFGET_(r32,21,21)
    #define   SET32TSCmdTSC_TSERR(r32,v)                       _BFSET_(r32,21,21,v)
    #define   GET16TSCmdTSC_TSERR(r16)                         _BFGET_(r16, 5, 5)
    #define   SET16TSCmdTSC_TSERR(r16,v)                       _BFSET_(r16, 5, 5,v)

    #define   GET32TSCmdTSC_TSTAMPL(r32)                       _BFGET_(r32,31,22)
    #define   SET32TSCmdTSC_TSTAMPL(r32,v)                     _BFSET_(r32,31,22,v)
    #define   GET16TSCmdTSC_TSTAMPL(r16)                       _BFGET_(r16,15, 6)
    #define   SET16TSCmdTSC_TSTAMPL(r16,v)                     _BFSET_(r16,15, 6,v)

            UNSG32 u_PID                                       : 13;
            UNSG32 u_TSID                                      :  2;
            UNSG32 u_PUS                                       :  1;
            UNSG32 u_PIDIDX                                    :  5;
            UNSG32 u_TSERR                                     :  1;
            UNSG32 u_TSTAMPL                                   : 10;
    ///////////////////////////////////////////////////////////

    #define   GET32TSCmdTSC_TSTAMPH(r32)                       _BFGET_(r32,31, 0)
    #define   SET32TSCmdTSC_TSTAMPH(r32,v)                     _BFSET_(r32,31, 0,v)

            UNSG32 u_TSTAMPH                                   : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32TSCmdTSC_LTSID(r32)                         _BFGET_(r32, 7, 0)
    #define   SET32TSCmdTSC_LTSID(r32,v)                       _BFSET_(r32, 7, 0,v)
    #define   GET16TSCmdTSC_LTSID(r16)                         _BFGET_(r16, 7, 0)
    #define   SET16TSCmdTSC_LTSID(r16,v)                       _BFSET_(r16, 7, 0,v)

    #define   GET32TSCmdTSC_RES1(r32)                          _BFGET_(r32,15, 8)
    #define   SET32TSCmdTSC_RES1(r32,v)                        _BFSET_(r32,15, 8,v)
    #define   GET16TSCmdTSC_RES1(r16)                          _BFGET_(r16,15, 8)
    #define   SET16TSCmdTSC_RES1(r16,v)                        _BFSET_(r16,15, 8,v)

    #define   GET32TSCmdTSC_HOSTres(r32)                       _BFGET_(r32,31,16)
    #define   SET32TSCmdTSC_HOSTres(r32,v)                     _BFSET_(r32,31,16,v)
    #define   GET16TSCmdTSC_HOSTres(r16)                       _BFGET_(r16,15, 0)
    #define   SET16TSCmdTSC_HOSTres(r16,v)                     _BFSET_(r16,15, 0,v)

            UNSG32 u_LTSID                                     :  8;
            UNSG32 u_RES1                                      :  8;
            UNSG32 u_HOSTres                                   : 16;
    ///////////////////////////////////////////////////////////

    #define   GET32TSCmdTSC_LTS(r32)                           _BFGET_(r32,31, 0)
    #define   SET32TSCmdTSC_LTS(r32,v)                         _BFSET_(r32,31, 0,v)

            UNSG32 u_LTS                                       : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32TSCmdTSC_CABLECARDRES(r32)                  _BFGET_(r32,15, 0)
    #define   SET32TSCmdTSC_CABLECARDRES(r32,v)                _BFSET_(r32,15, 0,v)
    #define   GET16TSCmdTSC_CABLECARDRES(r16)                  _BFGET_(r16,15, 0)
    #define   SET16TSCmdTSC_CABLECARDRES(r16,v)                _BFSET_(r16,15, 0,v)

    #define   GET32TSCmdTSC_RES2(r32)                          _BFGET_(r32,23,16)
    #define   SET32TSCmdTSC_RES2(r32,v)                        _BFSET_(r32,23,16,v)
    #define   GET16TSCmdTSC_RES2(r16)                          _BFGET_(r16, 7, 0)
    #define   SET16TSCmdTSC_RES2(r16,v)                        _BFSET_(r16, 7, 0,v)

    #define   GET32TSCmdTSC_CRC(r32)                           _BFGET_(r32,31,24)
    #define   SET32TSCmdTSC_CRC(r32,v)                         _BFSET_(r32,31,24,v)
    #define   GET16TSCmdTSC_CRC(r16)                           _BFGET_(r16,15, 8)
    #define   SET16TSCmdTSC_CRC(r16,v)                         _BFSET_(r16,15, 8,v)

            UNSG32 u_CABLECARDRES                              : 16;
            UNSG32 u_RES2                                      :  8;
            UNSG32 u_CRC                                       :  8;
    ///////////////////////////////////////////////////////////
    } SIE_TSCmdTSC;

    ///////////////////////////////////////////////////////////
     SIGN32 TSCmdTSC_drvrd(SIE_TSCmdTSC *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSCmdTSC_drvwr(SIE_TSCmdTSC *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSCmdTSC_reset(SIE_TSCmdTSC *p);
     SIGN32 TSCmdTSC_cmp  (SIE_TSCmdTSC *p, SIE_TSCmdTSC *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSCmdTSC_check(p,pie,pfx,hLOG) TSCmdTSC_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSCmdTSC_print(p,    pfx,hLOG) TSCmdTSC_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSCmdTSC
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSCmdTSCERR             biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 PID                       0x0
///               %unsigned 2  TSID                      0x0
///               %unsigned 1  PUS                       0x0
///                                    ###
///                                    * 1: indicates this packet have payload_unit_start =1
///                                    ###
///               %unsigned 5  PIDIDX                    0x0
///               %unsigned 1  TSERR                     0x0
///                                    ###
///                                    * value of TSTAMPL and TSTAMPH will only valid when TSERR =0 ; when TSERR =1, TSTAMPL will content error information.
///                                    ###
///               %unsigned 1  COR                       
///                                    ###
///                                    * packet have uncorrectable error
///                                    ###
///               %unsigned 1  SYNC                      
///                                    ###
///                                    * sync word is not as defined
///                                    ###
///               %unsigned 1  INCMPLT                   
///                                    ###
///                                    * a TS Sync happened before packet finishes
///                                    ###
///               %unsigned 1  OVERFLOW                  
///                                    ###
///                                    * overflow happened during the capture of the packet
///                                    ###
///               %%        6          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      26b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSCmdTSCERR
#define h_TSCmdTSCERR (){}

    #define     BA_TSCmdTSCERR_PID                             0x0000
    #define     B16TSCmdTSCERR_PID                             0x0000
    #define   LSb32TSCmdTSCERR_PID                                0
    #define   LSb16TSCmdTSCERR_PID                                0
    #define       bTSCmdTSCERR_PID                             13
    #define   MSK32TSCmdTSCERR_PID                                0x00001FFF

    #define     BA_TSCmdTSCERR_TSID                            0x0001
    #define     B16TSCmdTSCERR_TSID                            0x0000
    #define   LSb32TSCmdTSCERR_TSID                               13
    #define   LSb16TSCmdTSCERR_TSID                               13
    #define       bTSCmdTSCERR_TSID                            2
    #define   MSK32TSCmdTSCERR_TSID                               0x00006000

    #define     BA_TSCmdTSCERR_PUS                             0x0001
    #define     B16TSCmdTSCERR_PUS                             0x0000
    #define   LSb32TSCmdTSCERR_PUS                                15
    #define   LSb16TSCmdTSCERR_PUS                                15
    #define       bTSCmdTSCERR_PUS                             1
    #define   MSK32TSCmdTSCERR_PUS                                0x00008000

    #define     BA_TSCmdTSCERR_PIDIDX                          0x0002
    #define     B16TSCmdTSCERR_PIDIDX                          0x0002
    #define   LSb32TSCmdTSCERR_PIDIDX                             16
    #define   LSb16TSCmdTSCERR_PIDIDX                             0
    #define       bTSCmdTSCERR_PIDIDX                          5
    #define   MSK32TSCmdTSCERR_PIDIDX                             0x001F0000

    #define     BA_TSCmdTSCERR_TSERR                           0x0002
    #define     B16TSCmdTSCERR_TSERR                           0x0002
    #define   LSb32TSCmdTSCERR_TSERR                              21
    #define   LSb16TSCmdTSCERR_TSERR                              5
    #define       bTSCmdTSCERR_TSERR                           1
    #define   MSK32TSCmdTSCERR_TSERR                              0x00200000

    #define     BA_TSCmdTSCERR_COR                             0x0002
    #define     B16TSCmdTSCERR_COR                             0x0002
    #define   LSb32TSCmdTSCERR_COR                                22
    #define   LSb16TSCmdTSCERR_COR                                6
    #define       bTSCmdTSCERR_COR                             1
    #define   MSK32TSCmdTSCERR_COR                                0x00400000

    #define     BA_TSCmdTSCERR_SYNC                            0x0002
    #define     B16TSCmdTSCERR_SYNC                            0x0002
    #define   LSb32TSCmdTSCERR_SYNC                               23
    #define   LSb16TSCmdTSCERR_SYNC                               7
    #define       bTSCmdTSCERR_SYNC                            1
    #define   MSK32TSCmdTSCERR_SYNC                               0x00800000

    #define     BA_TSCmdTSCERR_INCMPLT                         0x0003
    #define     B16TSCmdTSCERR_INCMPLT                         0x0002
    #define   LSb32TSCmdTSCERR_INCMPLT                            24
    #define   LSb16TSCmdTSCERR_INCMPLT                            8
    #define       bTSCmdTSCERR_INCMPLT                         1
    #define   MSK32TSCmdTSCERR_INCMPLT                            0x01000000

    #define     BA_TSCmdTSCERR_OVERFLOW                        0x0003
    #define     B16TSCmdTSCERR_OVERFLOW                        0x0002
    #define   LSb32TSCmdTSCERR_OVERFLOW                           25
    #define   LSb16TSCmdTSCERR_OVERFLOW                           9
    #define       bTSCmdTSCERR_OVERFLOW                        1
    #define   MSK32TSCmdTSCERR_OVERFLOW                           0x02000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSCmdTSCERR {
    ///////////////////////////////////////////////////////////
    #define   GET32TSCmdTSCERR_PID(r32)                        _BFGET_(r32,12, 0)
    #define   SET32TSCmdTSCERR_PID(r32,v)                      _BFSET_(r32,12, 0,v)
    #define   GET16TSCmdTSCERR_PID(r16)                        _BFGET_(r16,12, 0)
    #define   SET16TSCmdTSCERR_PID(r16,v)                      _BFSET_(r16,12, 0,v)

    #define   GET32TSCmdTSCERR_TSID(r32)                       _BFGET_(r32,14,13)
    #define   SET32TSCmdTSCERR_TSID(r32,v)                     _BFSET_(r32,14,13,v)
    #define   GET16TSCmdTSCERR_TSID(r16)                       _BFGET_(r16,14,13)
    #define   SET16TSCmdTSCERR_TSID(r16,v)                     _BFSET_(r16,14,13,v)

    #define   GET32TSCmdTSCERR_PUS(r32)                        _BFGET_(r32,15,15)
    #define   SET32TSCmdTSCERR_PUS(r32,v)                      _BFSET_(r32,15,15,v)
    #define   GET16TSCmdTSCERR_PUS(r16)                        _BFGET_(r16,15,15)
    #define   SET16TSCmdTSCERR_PUS(r16,v)                      _BFSET_(r16,15,15,v)

    #define   GET32TSCmdTSCERR_PIDIDX(r32)                     _BFGET_(r32,20,16)
    #define   SET32TSCmdTSCERR_PIDIDX(r32,v)                   _BFSET_(r32,20,16,v)
    #define   GET16TSCmdTSCERR_PIDIDX(r16)                     _BFGET_(r16, 4, 0)
    #define   SET16TSCmdTSCERR_PIDIDX(r16,v)                   _BFSET_(r16, 4, 0,v)

    #define   GET32TSCmdTSCERR_TSERR(r32)                      _BFGET_(r32,21,21)
    #define   SET32TSCmdTSCERR_TSERR(r32,v)                    _BFSET_(r32,21,21,v)
    #define   GET16TSCmdTSCERR_TSERR(r16)                      _BFGET_(r16, 5, 5)
    #define   SET16TSCmdTSCERR_TSERR(r16,v)                    _BFSET_(r16, 5, 5,v)

    #define   GET32TSCmdTSCERR_COR(r32)                        _BFGET_(r32,22,22)
    #define   SET32TSCmdTSCERR_COR(r32,v)                      _BFSET_(r32,22,22,v)
    #define   GET16TSCmdTSCERR_COR(r16)                        _BFGET_(r16, 6, 6)
    #define   SET16TSCmdTSCERR_COR(r16,v)                      _BFSET_(r16, 6, 6,v)

    #define   GET32TSCmdTSCERR_SYNC(r32)                       _BFGET_(r32,23,23)
    #define   SET32TSCmdTSCERR_SYNC(r32,v)                     _BFSET_(r32,23,23,v)
    #define   GET16TSCmdTSCERR_SYNC(r16)                       _BFGET_(r16, 7, 7)
    #define   SET16TSCmdTSCERR_SYNC(r16,v)                     _BFSET_(r16, 7, 7,v)

    #define   GET32TSCmdTSCERR_INCMPLT(r32)                    _BFGET_(r32,24,24)
    #define   SET32TSCmdTSCERR_INCMPLT(r32,v)                  _BFSET_(r32,24,24,v)
    #define   GET16TSCmdTSCERR_INCMPLT(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16TSCmdTSCERR_INCMPLT(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32TSCmdTSCERR_OVERFLOW(r32)                   _BFGET_(r32,25,25)
    #define   SET32TSCmdTSCERR_OVERFLOW(r32,v)                 _BFSET_(r32,25,25,v)
    #define   GET16TSCmdTSCERR_OVERFLOW(r16)                   _BFGET_(r16, 9, 9)
    #define   SET16TSCmdTSCERR_OVERFLOW(r16,v)                 _BFSET_(r16, 9, 9,v)

            UNSG32 u_PID                                       : 13;
            UNSG32 u_TSID                                      :  2;
            UNSG32 u_PUS                                       :  1;
            UNSG32 u_PIDIDX                                    :  5;
            UNSG32 u_TSERR                                     :  1;
            UNSG32 u_COR                                       :  1;
            UNSG32 u_SYNC                                      :  1;
            UNSG32 u_INCMPLT                                   :  1;
            UNSG32 u_OVERFLOW                                  :  1;
            UNSG32 RSVDx0_b26                                  :  6;
    ///////////////////////////////////////////////////////////
    } SIE_TSCmdTSCERR;

    ///////////////////////////////////////////////////////////
     SIGN32 TSCmdTSCERR_drvrd(SIE_TSCmdTSCERR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSCmdTSCERR_drvwr(SIE_TSCmdTSCERR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSCmdTSCERR_reset(SIE_TSCmdTSCERR *p);
     SIGN32 TSCmdTSCERR_cmp  (SIE_TSCmdTSCERR *p, SIE_TSCmdTSCERR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSCmdTSCERR_check(p,pie,pfx,hLOG) TSCmdTSCERR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSCmdTSCERR_print(p,    pfx,hLOG) TSCmdTSCERR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSCmdTSCERR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE MCARDHDR                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 8  LTSID                     0x0
///                                    ###
///                                    * local TS id for openCable M-Card,
///                                    * refer to cableCARD2.0 sepc, this field not exist in when tsc.CFG.mcard=0 ,
///                                    ###
///               %unsigned 8  RES1                      0x0
///                                    ###
///                                    * Mcard reserved byte 1, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 16 HOSTres                   0x0
///                                    ###
///                                    * reserved field to be set by Host , refer to cableCARD2.0 specification
///                                    ###
///               %unsigned 32 LTS                       0x0
///                                    ###
///                                    * local timestamp for opencable M-Card, this field not exist in when tsc.CFG.mcard=0
///                                    ###
///               %unsigned 16 CABLECARDRES              0x0
///                                    ###
///                                    * field reserved to use by card, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 8  RES2                      0x0
///                                    ###
///                                    * Mcard resverved byte 2, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 8  CRC                       0x0
///                                    ###
///                                    * CRC for the 11bytes mcard preheader,
///                                    * CRC-8= x8+x7+x6+x4+x2+1
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      12B, bits:      96b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_MCARDHDR
#define h_MCARDHDR (){}

    #define     BA_MCARDHDR_LTSID                              0x0000
    #define     B16MCARDHDR_LTSID                              0x0000
    #define   LSb32MCARDHDR_LTSID                                 0
    #define   LSb16MCARDHDR_LTSID                                 0
    #define       bMCARDHDR_LTSID                              8
    #define   MSK32MCARDHDR_LTSID                                 0x000000FF

    #define     BA_MCARDHDR_RES1                               0x0001
    #define     B16MCARDHDR_RES1                               0x0000
    #define   LSb32MCARDHDR_RES1                                  8
    #define   LSb16MCARDHDR_RES1                                  8
    #define       bMCARDHDR_RES1                               8
    #define   MSK32MCARDHDR_RES1                                  0x0000FF00

    #define     BA_MCARDHDR_HOSTres                            0x0002
    #define     B16MCARDHDR_HOSTres                            0x0002
    #define   LSb32MCARDHDR_HOSTres                               16
    #define   LSb16MCARDHDR_HOSTres                               0
    #define       bMCARDHDR_HOSTres                            16
    #define   MSK32MCARDHDR_HOSTres                               0xFFFF0000

    #define     BA_MCARDHDR_LTS                                0x0004
    #define     B16MCARDHDR_LTS                                0x0004
    #define   LSb32MCARDHDR_LTS                                   0
    #define   LSb16MCARDHDR_LTS                                   0
    #define       bMCARDHDR_LTS                                32
    #define   MSK32MCARDHDR_LTS                                   0xFFFFFFFF

    #define     BA_MCARDHDR_CABLECARDRES                       0x0008
    #define     B16MCARDHDR_CABLECARDRES                       0x0008
    #define   LSb32MCARDHDR_CABLECARDRES                          0
    #define   LSb16MCARDHDR_CABLECARDRES                          0
    #define       bMCARDHDR_CABLECARDRES                       16
    #define   MSK32MCARDHDR_CABLECARDRES                          0x0000FFFF

    #define     BA_MCARDHDR_RES2                               0x000A
    #define     B16MCARDHDR_RES2                               0x000A
    #define   LSb32MCARDHDR_RES2                                  16
    #define   LSb16MCARDHDR_RES2                                  0
    #define       bMCARDHDR_RES2                               8
    #define   MSK32MCARDHDR_RES2                                  0x00FF0000

    #define     BA_MCARDHDR_CRC                                0x000B
    #define     B16MCARDHDR_CRC                                0x000A
    #define   LSb32MCARDHDR_CRC                                   24
    #define   LSb16MCARDHDR_CRC                                   8
    #define       bMCARDHDR_CRC                                8
    #define   MSK32MCARDHDR_CRC                                   0xFF000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_MCARDHDR {
    ///////////////////////////////////////////////////////////
    #define   GET32MCARDHDR_LTSID(r32)                         _BFGET_(r32, 7, 0)
    #define   SET32MCARDHDR_LTSID(r32,v)                       _BFSET_(r32, 7, 0,v)
    #define   GET16MCARDHDR_LTSID(r16)                         _BFGET_(r16, 7, 0)
    #define   SET16MCARDHDR_LTSID(r16,v)                       _BFSET_(r16, 7, 0,v)

    #define   GET32MCARDHDR_RES1(r32)                          _BFGET_(r32,15, 8)
    #define   SET32MCARDHDR_RES1(r32,v)                        _BFSET_(r32,15, 8,v)
    #define   GET16MCARDHDR_RES1(r16)                          _BFGET_(r16,15, 8)
    #define   SET16MCARDHDR_RES1(r16,v)                        _BFSET_(r16,15, 8,v)

    #define   GET32MCARDHDR_HOSTres(r32)                       _BFGET_(r32,31,16)
    #define   SET32MCARDHDR_HOSTres(r32,v)                     _BFSET_(r32,31,16,v)
    #define   GET16MCARDHDR_HOSTres(r16)                       _BFGET_(r16,15, 0)
    #define   SET16MCARDHDR_HOSTres(r16,v)                     _BFSET_(r16,15, 0,v)

            UNSG32 u_LTSID                                     :  8;
            UNSG32 u_RES1                                      :  8;
            UNSG32 u_HOSTres                                   : 16;
    ///////////////////////////////////////////////////////////

    #define   GET32MCARDHDR_LTS(r32)                           _BFGET_(r32,31, 0)
    #define   SET32MCARDHDR_LTS(r32,v)                         _BFSET_(r32,31, 0,v)

            UNSG32 u_LTS                                       : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32MCARDHDR_CABLECARDRES(r32)                  _BFGET_(r32,15, 0)
    #define   SET32MCARDHDR_CABLECARDRES(r32,v)                _BFSET_(r32,15, 0,v)
    #define   GET16MCARDHDR_CABLECARDRES(r16)                  _BFGET_(r16,15, 0)
    #define   SET16MCARDHDR_CABLECARDRES(r16,v)                _BFSET_(r16,15, 0,v)

    #define   GET32MCARDHDR_RES2(r32)                          _BFGET_(r32,23,16)
    #define   SET32MCARDHDR_RES2(r32,v)                        _BFSET_(r32,23,16,v)
    #define   GET16MCARDHDR_RES2(r16)                          _BFGET_(r16, 7, 0)
    #define   SET16MCARDHDR_RES2(r16,v)                        _BFSET_(r16, 7, 0,v)

    #define   GET32MCARDHDR_CRC(r32)                           _BFGET_(r32,31,24)
    #define   SET32MCARDHDR_CRC(r32,v)                         _BFSET_(r32,31,24,v)
    #define   GET16MCARDHDR_CRC(r16)                           _BFGET_(r16,15, 8)
    #define   SET16MCARDHDR_CRC(r16,v)                         _BFSET_(r16,15, 8,v)

            UNSG32 u_CABLECARDRES                              : 16;
            UNSG32 u_RES2                                      :  8;
            UNSG32 u_CRC                                       :  8;
    ///////////////////////////////////////////////////////////
    } SIE_MCARDHDR;

    ///////////////////////////////////////////////////////////
     SIGN32 MCARDHDR_drvrd(SIE_MCARDHDR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 MCARDHDR_drvwr(SIE_MCARDHDR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void MCARDHDR_reset(SIE_MCARDHDR *p);
     SIGN32 MCARDHDR_cmp  (SIE_MCARDHDR *p, SIE_MCARDHDR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define MCARDHDR_check(p,pie,pfx,hLOG) MCARDHDR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define MCARDHDR_print(p,    pfx,hLOG) MCARDHDR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: MCARDHDR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSO                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (RW)
///               %unsigned 1  tscMode                   0x0
///                                    ###
///                                    * 0 : TsInput Mode
///                                    * 1 : TsOutput Mode
///                                    ###
///               %unsigned 1  tsoEn                     0x0
///                                    ###
///                                    * Transport stream Output Enable
///                                    ###
///               %unsigned 2  tsoMode                   0x0
///                                    ###
///                                    * 00 : Mode0 TS+TSP
///                                    * 01 : Mode1 TSP Only
///                                    * 10 : Mode2 BYPASS
///                                    ###
///               %unsigned 1  tsoSerialMode             0x0
///                                    ###
///                                    * 0 : Serial Mode
///                                    * 1 : Parallel Mode
///                                    ###
///               %%        27         # Stuffing bits...
///     @ 0x00004 tsoInterPktH         (RW)
///               %unsigned 10 interPktRateH             0x0
///               %%        22         # Stuffing bits...
///     @ 0x00008 tsoInterPktL         (RW)
///               %unsigned 32 interPktRateL             0x0
///     @ 0x0000C tsoIntraPkt          (RW)
///               %unsigned 32 IntraPktRate              0x0
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      16B, bits:      79b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSO
#define h_TSO (){}

    #define     RA_TSO_CFG                                     0x0000

    #define     BA_TSO_CFG_tscMode                             0x0000
    #define     B16TSO_CFG_tscMode                             0x0000
    #define   LSb32TSO_CFG_tscMode                                0
    #define   LSb16TSO_CFG_tscMode                                0
    #define       bTSO_CFG_tscMode                             1
    #define   MSK32TSO_CFG_tscMode                                0x00000001

    #define     BA_TSO_CFG_tsoEn                               0x0000
    #define     B16TSO_CFG_tsoEn                               0x0000
    #define   LSb32TSO_CFG_tsoEn                                  1
    #define   LSb16TSO_CFG_tsoEn                                  1
    #define       bTSO_CFG_tsoEn                               1
    #define   MSK32TSO_CFG_tsoEn                                  0x00000002

    #define     BA_TSO_CFG_tsoMode                             0x0000
    #define     B16TSO_CFG_tsoMode                             0x0000
    #define   LSb32TSO_CFG_tsoMode                                2
    #define   LSb16TSO_CFG_tsoMode                                2
    #define       bTSO_CFG_tsoMode                             2
    #define   MSK32TSO_CFG_tsoMode                                0x0000000C

    #define     BA_TSO_CFG_tsoSerialMode                       0x0000
    #define     B16TSO_CFG_tsoSerialMode                       0x0000
    #define   LSb32TSO_CFG_tsoSerialMode                          4
    #define   LSb16TSO_CFG_tsoSerialMode                          4
    #define       bTSO_CFG_tsoSerialMode                       1
    #define   MSK32TSO_CFG_tsoSerialMode                          0x00000010
    ///////////////////////////////////////////////////////////
    #define     RA_TSO_tsoInterPktH                            0x0004

    #define     BA_TSO_tsoInterPktH_interPktRateH              0x0004
    #define     B16TSO_tsoInterPktH_interPktRateH              0x0004
    #define   LSb32TSO_tsoInterPktH_interPktRateH                 0
    #define   LSb16TSO_tsoInterPktH_interPktRateH                 0
    #define       bTSO_tsoInterPktH_interPktRateH              10
    #define   MSK32TSO_tsoInterPktH_interPktRateH                 0x000003FF
    ///////////////////////////////////////////////////////////
    #define     RA_TSO_tsoInterPktL                            0x0008

    #define     BA_TSO_tsoInterPktL_interPktRateL              0x0008
    #define     B16TSO_tsoInterPktL_interPktRateL              0x0008
    #define   LSb32TSO_tsoInterPktL_interPktRateL                 0
    #define   LSb16TSO_tsoInterPktL_interPktRateL                 0
    #define       bTSO_tsoInterPktL_interPktRateL              32
    #define   MSK32TSO_tsoInterPktL_interPktRateL                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_TSO_tsoIntraPkt                             0x000C

    #define     BA_TSO_tsoIntraPkt_IntraPktRate                0x000C
    #define     B16TSO_tsoIntraPkt_IntraPktRate                0x000C
    #define   LSb32TSO_tsoIntraPkt_IntraPktRate                   0
    #define   LSb16TSO_tsoIntraPkt_IntraPktRate                   0
    #define       bTSO_tsoIntraPkt_IntraPktRate                32
    #define   MSK32TSO_tsoIntraPkt_IntraPktRate                   0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSO {
    ///////////////////////////////////////////////////////////
    #define   GET32TSO_CFG_tscMode(r32)                        _BFGET_(r32, 0, 0)
    #define   SET32TSO_CFG_tscMode(r32,v)                      _BFSET_(r32, 0, 0,v)
    #define   GET16TSO_CFG_tscMode(r16)                        _BFGET_(r16, 0, 0)
    #define   SET16TSO_CFG_tscMode(r16,v)                      _BFSET_(r16, 0, 0,v)

    #define   GET32TSO_CFG_tsoEn(r32)                          _BFGET_(r32, 1, 1)
    #define   SET32TSO_CFG_tsoEn(r32,v)                        _BFSET_(r32, 1, 1,v)
    #define   GET16TSO_CFG_tsoEn(r16)                          _BFGET_(r16, 1, 1)
    #define   SET16TSO_CFG_tsoEn(r16,v)                        _BFSET_(r16, 1, 1,v)

    #define   GET32TSO_CFG_tsoMode(r32)                        _BFGET_(r32, 3, 2)
    #define   SET32TSO_CFG_tsoMode(r32,v)                      _BFSET_(r32, 3, 2,v)
    #define   GET16TSO_CFG_tsoMode(r16)                        _BFGET_(r16, 3, 2)
    #define   SET16TSO_CFG_tsoMode(r16,v)                      _BFSET_(r16, 3, 2,v)

    #define   GET32TSO_CFG_tsoSerialMode(r32)                  _BFGET_(r32, 4, 4)
    #define   SET32TSO_CFG_tsoSerialMode(r32,v)                _BFSET_(r32, 4, 4,v)
    #define   GET16TSO_CFG_tsoSerialMode(r16)                  _BFGET_(r16, 4, 4)
    #define   SET16TSO_CFG_tsoSerialMode(r16,v)                _BFSET_(r16, 4, 4,v)

    #define     w32TSO_CFG                                     {\
            UNSG32 uCFG_tscMode                                :  1;\
            UNSG32 uCFG_tsoEn                                  :  1;\
            UNSG32 uCFG_tsoMode                                :  2;\
            UNSG32 uCFG_tsoSerialMode                          :  1;\
            UNSG32 RSVDx0_b5                                   : 27;\
          }
    union { UNSG32 u32TSO_CFG;
            struct w32TSO_CFG;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32TSO_tsoInterPktH_interPktRateH(r32)         _BFGET_(r32, 9, 0)
    #define   SET32TSO_tsoInterPktH_interPktRateH(r32,v)       _BFSET_(r32, 9, 0,v)
    #define   GET16TSO_tsoInterPktH_interPktRateH(r16)         _BFGET_(r16, 9, 0)
    #define   SET16TSO_tsoInterPktH_interPktRateH(r16,v)       _BFSET_(r16, 9, 0,v)

    #define     w32TSO_tsoInterPktH                            {\
            UNSG32 utsoInterPktH_interPktRateH                 : 10;\
            UNSG32 RSVDx4_b10                                  : 22;\
          }
    union { UNSG32 u32TSO_tsoInterPktH;
            struct w32TSO_tsoInterPktH;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32TSO_tsoInterPktL_interPktRateL(r32)         _BFGET_(r32,31, 0)
    #define   SET32TSO_tsoInterPktL_interPktRateL(r32,v)       _BFSET_(r32,31, 0,v)

    #define     w32TSO_tsoInterPktL                            {\
            UNSG32 utsoInterPktL_interPktRateL                 : 32;\
          }
    union { UNSG32 u32TSO_tsoInterPktL;
            struct w32TSO_tsoInterPktL;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32TSO_tsoIntraPkt_IntraPktRate(r32)           _BFGET_(r32,31, 0)
    #define   SET32TSO_tsoIntraPkt_IntraPktRate(r32,v)         _BFSET_(r32,31, 0,v)

    #define     w32TSO_tsoIntraPkt                             {\
            UNSG32 utsoIntraPkt_IntraPktRate                   : 32;\
          }
    union { UNSG32 u32TSO_tsoIntraPkt;
            struct w32TSO_tsoIntraPkt;
          };
    ///////////////////////////////////////////////////////////
    } SIE_TSO;

    typedef union  T32TSO_CFG
          { UNSG32 u32;
            struct w32TSO_CFG;
                 } T32TSO_CFG;
    typedef union  T32TSO_tsoInterPktH
          { UNSG32 u32;
            struct w32TSO_tsoInterPktH;
                 } T32TSO_tsoInterPktH;
    typedef union  T32TSO_tsoInterPktL
          { UNSG32 u32;
            struct w32TSO_tsoInterPktL;
                 } T32TSO_tsoInterPktL;
    typedef union  T32TSO_tsoIntraPkt
          { UNSG32 u32;
            struct w32TSO_tsoIntraPkt;
                 } T32TSO_tsoIntraPkt;
    ///////////////////////////////////////////////////////////

    typedef union  TTSO_CFG
          { UNSG32 u32[1];
            struct {
            struct w32TSO_CFG;
                   };
                 } TTSO_CFG;
    typedef union  TTSO_tsoInterPktH
          { UNSG32 u32[1];
            struct {
            struct w32TSO_tsoInterPktH;
                   };
                 } TTSO_tsoInterPktH;
    typedef union  TTSO_tsoInterPktL
          { UNSG32 u32[1];
            struct {
            struct w32TSO_tsoInterPktL;
                   };
                 } TTSO_tsoInterPktL;
    typedef union  TTSO_tsoIntraPkt
          { UNSG32 u32[1];
            struct {
            struct w32TSO_tsoIntraPkt;
                   };
                 } TTSO_tsoIntraPkt;

    ///////////////////////////////////////////////////////////
     SIGN32 TSO_drvrd(SIE_TSO *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSO_drvwr(SIE_TSO *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSO_reset(SIE_TSO *p);
     SIGN32 TSO_cmp  (SIE_TSO *p, SIE_TSO *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSO_check(p,pie,pfx,hLOG) TSO_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSO_print(p,    pfx,hLOG) TSO_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSO
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSC                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (P)
///               %unsigned 31 STCINITH                  0x0
///                                    ###
///                                    * DV-FR-CNR
///                                    ###
///               %unsigned 1  STCSEL                    0x0
///                                    ###
///                                    * DV-FR-CR
///                                    ###
///     # 0x00004 CFG1                 
///               %unsigned 32 STCINITL                  0x0
///                                    ###
///                                    * DV-FR-CNR
///                                    ###
///     # 0x00008 CFG2                 
///               %unsigned 1  STCLOAD                   0x0
///                                    ###
///                                    * write 1'b1 means load {STCINITH,STCINITL} to STC counter 1, write 1'b0 means load to STC counter 0
///                                    * DV-FCR
///                                    ###
///               %unsigned 3  PORTSEL                   0x0
///                                    ###
///                                    * 3'b1xx: from TSOFifo0
///                                    * 3'b1xx: from TSOFifo1
///                                    * 3'b0b1b0: from TSI port {b1,b0}
///                                    * DV-FCR
///                                    ###
///               %unsigned 4  LATPHASE                  0x0
///                                    ###
///                                    * DV-FR-CR ( TCQ from 0 to
///                                    * 0.8 tsClk cycle)
///                                    ###
///               %unsigned 1  SERIAL                    0x0
///                                    ###
///                                    * 0: parallel mode 1: serial mode
///                                    * DV-FCR
///                                    ###
///               %unsigned 8  PACKSIZE                  0xBB
///                                    ###
///                                    * packet size -1
///                                    * DV-FR-CNR(150-250)
///                                    ###
///               %unsigned 8  PIDOFFSET                 0x2
///                                    ###
///                                    * pidoffset -1
///                                    * DV-FR-CNR(1-4)
///                                    ###
///               %%        7          # Stuffing bits...
///     # 0x0000C CFG3                 
///               %unsigned 8  PCROFFSET                 0xC
///                                    ###
///                                    * pcr offset -1
///                                    * DV-FR-CNR(5-64)
///                                    ###
///               %unsigned 16 SYNCTHD                   0x0
///                                    ###
///                                    * DV-FR-CNR(1-100 when SYNCOPT=auto)
///                                    ###
///               %unsigned 2  SYNCOPT                   0x0
///                                    ###
///                                    * 2'b1x: auto
///                                    * 2'b00: no capture
///                                    * 2'b01: capture
///                                    * DV-FC
///                                    ###
///               %%        6          # Stuffing bits...
///     # 0x00010 CFG4                 
///               %unsigned 8  SYNCBYTE                  0x47
///               %unsigned 1  USESYNCBYTE               0x1
///               %unsigned 1  MCARD                     0x0
///                                    ###
///                                    * 1: enable mcard model for opencable
///                                    ###
///               %unsigned 1  BYPASS                    0x0
///                                    ###
///                                    * 1: disable PID filtering, capture all the packets from the port
///                                    ###
///               %%        21         # Stuffing bits...
///     @ 0x00014 STS                  (R-)
///               %unsigned 16 SYNCCNT                   0x0
///               %%        16         # Stuffing bits...
///     # 0x00018 STS1                 
///               %unsigned 32 TSCMD0                    0x0
///     # 0x0001C STS2                 
///               %unsigned 32 TSCMD1                    0x0
///     @ 0x00020                      (P)
///     # 0x00020 PID                  
///               $PID                 PID               REG          
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     160B, bits:     942b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSC
#define h_TSC (){}

    #define     RA_TSC_CFG                                     0x0000

    #define     BA_TSC_CFG_STCINITH                            0x0000
    #define     B16TSC_CFG_STCINITH                            0x0000
    #define   LSb32TSC_CFG_STCINITH                               0
    #define   LSb16TSC_CFG_STCINITH                               0
    #define       bTSC_CFG_STCINITH                            31
    #define   MSK32TSC_CFG_STCINITH                               0x7FFFFFFF

    #define     BA_TSC_CFG_STCSEL                              0x0003
    #define     B16TSC_CFG_STCSEL                              0x0002
    #define   LSb32TSC_CFG_STCSEL                                 31
    #define   LSb16TSC_CFG_STCSEL                                 15
    #define       bTSC_CFG_STCSEL                              1
    #define   MSK32TSC_CFG_STCSEL                                 0x80000000

    #define     RA_TSC_CFG1                                    0x0004

    #define     BA_TSC_CFG_STCINITL                            0x0004
    #define     B16TSC_CFG_STCINITL                            0x0004
    #define   LSb32TSC_CFG_STCINITL                               0
    #define   LSb16TSC_CFG_STCINITL                               0
    #define       bTSC_CFG_STCINITL                            32
    #define   MSK32TSC_CFG_STCINITL                               0xFFFFFFFF

    #define     RA_TSC_CFG2                                    0x0008

    #define     BA_TSC_CFG_STCLOAD                             0x0008
    #define     B16TSC_CFG_STCLOAD                             0x0008
    #define   LSb32TSC_CFG_STCLOAD                                0
    #define   LSb16TSC_CFG_STCLOAD                                0
    #define       bTSC_CFG_STCLOAD                             1
    #define   MSK32TSC_CFG_STCLOAD                                0x00000001

    #define     BA_TSC_CFG_PORTSEL                             0x0008
    #define     B16TSC_CFG_PORTSEL                             0x0008
    #define   LSb32TSC_CFG_PORTSEL                                1
    #define   LSb16TSC_CFG_PORTSEL                                1
    #define       bTSC_CFG_PORTSEL                             3
    #define   MSK32TSC_CFG_PORTSEL                                0x0000000E

    #define     BA_TSC_CFG_LATPHASE                            0x0008
    #define     B16TSC_CFG_LATPHASE                            0x0008
    #define   LSb32TSC_CFG_LATPHASE                               4
    #define   LSb16TSC_CFG_LATPHASE                               4
    #define       bTSC_CFG_LATPHASE                            4
    #define   MSK32TSC_CFG_LATPHASE                               0x000000F0

    #define     BA_TSC_CFG_SERIAL                              0x0009
    #define     B16TSC_CFG_SERIAL                              0x0008
    #define   LSb32TSC_CFG_SERIAL                                 8
    #define   LSb16TSC_CFG_SERIAL                                 8
    #define       bTSC_CFG_SERIAL                              1
    #define   MSK32TSC_CFG_SERIAL                                 0x00000100

    #define     BA_TSC_CFG_PACKSIZE                            0x0009
    #define     B16TSC_CFG_PACKSIZE                            0x0008
    #define   LSb32TSC_CFG_PACKSIZE                               9
    #define   LSb16TSC_CFG_PACKSIZE                               9
    #define       bTSC_CFG_PACKSIZE                            8
    #define   MSK32TSC_CFG_PACKSIZE                               0x0001FE00

    #define     BA_TSC_CFG_PIDOFFSET                           0x000A
    #define     B16TSC_CFG_PIDOFFSET                           0x000A
    #define   LSb32TSC_CFG_PIDOFFSET                              17
    #define   LSb16TSC_CFG_PIDOFFSET                              1
    #define       bTSC_CFG_PIDOFFSET                           8
    #define   MSK32TSC_CFG_PIDOFFSET                              0x01FE0000

    #define     RA_TSC_CFG3                                    0x000C

    #define     BA_TSC_CFG_PCROFFSET                           0x000C
    #define     B16TSC_CFG_PCROFFSET                           0x000C
    #define   LSb32TSC_CFG_PCROFFSET                              0
    #define   LSb16TSC_CFG_PCROFFSET                              0
    #define       bTSC_CFG_PCROFFSET                           8
    #define   MSK32TSC_CFG_PCROFFSET                              0x000000FF

    #define     BA_TSC_CFG_SYNCTHD                             0x000D
    #define     B16TSC_CFG_SYNCTHD                             0x000C
    #define   LSb32TSC_CFG_SYNCTHD                                8
    #define   LSb16TSC_CFG_SYNCTHD                                8
    #define       bTSC_CFG_SYNCTHD                             16
    #define   MSK32TSC_CFG_SYNCTHD                                0x00FFFF00

    #define     BA_TSC_CFG_SYNCOPT                             0x000F
    #define     B16TSC_CFG_SYNCOPT                             0x000E
    #define   LSb32TSC_CFG_SYNCOPT                                24
    #define   LSb16TSC_CFG_SYNCOPT                                8
    #define       bTSC_CFG_SYNCOPT                             2
    #define   MSK32TSC_CFG_SYNCOPT                                0x03000000

    #define     RA_TSC_CFG4                                    0x0010

    #define     BA_TSC_CFG_SYNCBYTE                            0x0010
    #define     B16TSC_CFG_SYNCBYTE                            0x0010
    #define   LSb32TSC_CFG_SYNCBYTE                               0
    #define   LSb16TSC_CFG_SYNCBYTE                               0
    #define       bTSC_CFG_SYNCBYTE                            8
    #define   MSK32TSC_CFG_SYNCBYTE                               0x000000FF

    #define     BA_TSC_CFG_USESYNCBYTE                         0x0011
    #define     B16TSC_CFG_USESYNCBYTE                         0x0010
    #define   LSb32TSC_CFG_USESYNCBYTE                            8
    #define   LSb16TSC_CFG_USESYNCBYTE                            8
    #define       bTSC_CFG_USESYNCBYTE                         1
    #define   MSK32TSC_CFG_USESYNCBYTE                            0x00000100

    #define     BA_TSC_CFG_MCARD                               0x0011
    #define     B16TSC_CFG_MCARD                               0x0010
    #define   LSb32TSC_CFG_MCARD                                  9
    #define   LSb16TSC_CFG_MCARD                                  9
    #define       bTSC_CFG_MCARD                               1
    #define   MSK32TSC_CFG_MCARD                                  0x00000200

    #define     BA_TSC_CFG_BYPASS                              0x0011
    #define     B16TSC_CFG_BYPASS                              0x0010
    #define   LSb32TSC_CFG_BYPASS                                 10
    #define   LSb16TSC_CFG_BYPASS                                 10
    #define       bTSC_CFG_BYPASS                              1
    #define   MSK32TSC_CFG_BYPASS                                 0x00000400
    ///////////////////////////////////////////////////////////
    #define     RA_TSC_STS                                     0x0014

    #define     BA_TSC_STS_SYNCCNT                             0x0014
    #define     B16TSC_STS_SYNCCNT                             0x0014
    #define   LSb32TSC_STS_SYNCCNT                                0
    #define   LSb16TSC_STS_SYNCCNT                                0
    #define       bTSC_STS_SYNCCNT                             16
    #define   MSK32TSC_STS_SYNCCNT                                0x0000FFFF

    #define     RA_TSC_STS1                                    0x0018

    #define     BA_TSC_STS_TSCMD0                              0x0018
    #define     B16TSC_STS_TSCMD0                              0x0018
    #define   LSb32TSC_STS_TSCMD0                                 0
    #define   LSb16TSC_STS_TSCMD0                                 0
    #define       bTSC_STS_TSCMD0                              32
    #define   MSK32TSC_STS_TSCMD0                                 0xFFFFFFFF

    #define     RA_TSC_STS2                                    0x001C

    #define     BA_TSC_STS_TSCMD1                              0x001C
    #define     B16TSC_STS_TSCMD1                              0x001C
    #define   LSb32TSC_STS_TSCMD1                                 0
    #define   LSb16TSC_STS_TSCMD1                                 0
    #define       bTSC_STS_TSCMD1                              32
    #define   MSK32TSC_STS_TSCMD1                                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_TSC_PID                                     0x0020
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSC {
    ///////////////////////////////////////////////////////////
    #define   GET32TSC_CFG_STCINITH(r32)                       _BFGET_(r32,30, 0)
    #define   SET32TSC_CFG_STCINITH(r32,v)                     _BFSET_(r32,30, 0,v)

    #define   GET32TSC_CFG_STCSEL(r32)                         _BFGET_(r32,31,31)
    #define   SET32TSC_CFG_STCSEL(r32,v)                       _BFSET_(r32,31,31,v)
    #define   GET16TSC_CFG_STCSEL(r16)                         _BFGET_(r16,15,15)
    #define   SET16TSC_CFG_STCSEL(r16,v)                       _BFSET_(r16,15,15,v)

    #define     w32TSC_CFG                                     {\
            UNSG32 uCFG_STCINITH                               : 31;\
            UNSG32 uCFG_STCSEL                                 :  1;\
          }
    union { UNSG32 u32TSC_CFG;
            struct w32TSC_CFG;
          };
    #define   GET32TSC_CFG_STCINITL(r32)                       _BFGET_(r32,31, 0)
    #define   SET32TSC_CFG_STCINITL(r32,v)                     _BFSET_(r32,31, 0,v)

    #define     w32TSC_CFG1                                    {\
            UNSG32 uCFG_STCINITL                               : 32;\
          }
    union { UNSG32 u32TSC_CFG1;
            struct w32TSC_CFG1;
          };
    #define   GET32TSC_CFG_STCLOAD(r32)                        _BFGET_(r32, 0, 0)
    #define   SET32TSC_CFG_STCLOAD(r32,v)                      _BFSET_(r32, 0, 0,v)
    #define   GET16TSC_CFG_STCLOAD(r16)                        _BFGET_(r16, 0, 0)
    #define   SET16TSC_CFG_STCLOAD(r16,v)                      _BFSET_(r16, 0, 0,v)

    #define   GET32TSC_CFG_PORTSEL(r32)                        _BFGET_(r32, 3, 1)
    #define   SET32TSC_CFG_PORTSEL(r32,v)                      _BFSET_(r32, 3, 1,v)
    #define   GET16TSC_CFG_PORTSEL(r16)                        _BFGET_(r16, 3, 1)
    #define   SET16TSC_CFG_PORTSEL(r16,v)                      _BFSET_(r16, 3, 1,v)

    #define   GET32TSC_CFG_LATPHASE(r32)                       _BFGET_(r32, 7, 4)
    #define   SET32TSC_CFG_LATPHASE(r32,v)                     _BFSET_(r32, 7, 4,v)
    #define   GET16TSC_CFG_LATPHASE(r16)                       _BFGET_(r16, 7, 4)
    #define   SET16TSC_CFG_LATPHASE(r16,v)                     _BFSET_(r16, 7, 4,v)

    #define   GET32TSC_CFG_SERIAL(r32)                         _BFGET_(r32, 8, 8)
    #define   SET32TSC_CFG_SERIAL(r32,v)                       _BFSET_(r32, 8, 8,v)
    #define   GET16TSC_CFG_SERIAL(r16)                         _BFGET_(r16, 8, 8)
    #define   SET16TSC_CFG_SERIAL(r16,v)                       _BFSET_(r16, 8, 8,v)

    #define   GET32TSC_CFG_PACKSIZE(r32)                       _BFGET_(r32,16, 9)
    #define   SET32TSC_CFG_PACKSIZE(r32,v)                     _BFSET_(r32,16, 9,v)

    #define   GET32TSC_CFG_PIDOFFSET(r32)                      _BFGET_(r32,24,17)
    #define   SET32TSC_CFG_PIDOFFSET(r32,v)                    _BFSET_(r32,24,17,v)
    #define   GET16TSC_CFG_PIDOFFSET(r16)                      _BFGET_(r16, 8, 1)
    #define   SET16TSC_CFG_PIDOFFSET(r16,v)                    _BFSET_(r16, 8, 1,v)

    #define     w32TSC_CFG2                                    {\
            UNSG32 uCFG_STCLOAD                                :  1;\
            UNSG32 uCFG_PORTSEL                                :  3;\
            UNSG32 uCFG_LATPHASE                               :  4;\
            UNSG32 uCFG_SERIAL                                 :  1;\
            UNSG32 uCFG_PACKSIZE                               :  8;\
            UNSG32 uCFG_PIDOFFSET                              :  8;\
            UNSG32 RSVDx8_b25                                  :  7;\
          }
    union { UNSG32 u32TSC_CFG2;
            struct w32TSC_CFG2;
          };
    #define   GET32TSC_CFG_PCROFFSET(r32)                      _BFGET_(r32, 7, 0)
    #define   SET32TSC_CFG_PCROFFSET(r32,v)                    _BFSET_(r32, 7, 0,v)
    #define   GET16TSC_CFG_PCROFFSET(r16)                      _BFGET_(r16, 7, 0)
    #define   SET16TSC_CFG_PCROFFSET(r16,v)                    _BFSET_(r16, 7, 0,v)

    #define   GET32TSC_CFG_SYNCTHD(r32)                        _BFGET_(r32,23, 8)
    #define   SET32TSC_CFG_SYNCTHD(r32,v)                      _BFSET_(r32,23, 8,v)

    #define   GET32TSC_CFG_SYNCOPT(r32)                        _BFGET_(r32,25,24)
    #define   SET32TSC_CFG_SYNCOPT(r32,v)                      _BFSET_(r32,25,24,v)
    #define   GET16TSC_CFG_SYNCOPT(r16)                        _BFGET_(r16, 9, 8)
    #define   SET16TSC_CFG_SYNCOPT(r16,v)                      _BFSET_(r16, 9, 8,v)

    #define     w32TSC_CFG3                                    {\
            UNSG32 uCFG_PCROFFSET                              :  8;\
            UNSG32 uCFG_SYNCTHD                                : 16;\
            UNSG32 uCFG_SYNCOPT                                :  2;\
            UNSG32 RSVDxC_b26                                  :  6;\
          }
    union { UNSG32 u32TSC_CFG3;
            struct w32TSC_CFG3;
          };
    #define   GET32TSC_CFG_SYNCBYTE(r32)                       _BFGET_(r32, 7, 0)
    #define   SET32TSC_CFG_SYNCBYTE(r32,v)                     _BFSET_(r32, 7, 0,v)
    #define   GET16TSC_CFG_SYNCBYTE(r16)                       _BFGET_(r16, 7, 0)
    #define   SET16TSC_CFG_SYNCBYTE(r16,v)                     _BFSET_(r16, 7, 0,v)

    #define   GET32TSC_CFG_USESYNCBYTE(r32)                    _BFGET_(r32, 8, 8)
    #define   SET32TSC_CFG_USESYNCBYTE(r32,v)                  _BFSET_(r32, 8, 8,v)
    #define   GET16TSC_CFG_USESYNCBYTE(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16TSC_CFG_USESYNCBYTE(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32TSC_CFG_MCARD(r32)                          _BFGET_(r32, 9, 9)
    #define   SET32TSC_CFG_MCARD(r32,v)                        _BFSET_(r32, 9, 9,v)
    #define   GET16TSC_CFG_MCARD(r16)                          _BFGET_(r16, 9, 9)
    #define   SET16TSC_CFG_MCARD(r16,v)                        _BFSET_(r16, 9, 9,v)

    #define   GET32TSC_CFG_BYPASS(r32)                         _BFGET_(r32,10,10)
    #define   SET32TSC_CFG_BYPASS(r32,v)                       _BFSET_(r32,10,10,v)
    #define   GET16TSC_CFG_BYPASS(r16)                         _BFGET_(r16,10,10)
    #define   SET16TSC_CFG_BYPASS(r16,v)                       _BFSET_(r16,10,10,v)

    #define     w32TSC_CFG4                                    {\
            UNSG32 uCFG_SYNCBYTE                               :  8;\
            UNSG32 uCFG_USESYNCBYTE                            :  1;\
            UNSG32 uCFG_MCARD                                  :  1;\
            UNSG32 uCFG_BYPASS                                 :  1;\
            UNSG32 RSVDx10_b11                                 : 21;\
          }
    union { UNSG32 u32TSC_CFG4;
            struct w32TSC_CFG4;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32TSC_STS_SYNCCNT(r32)                        _BFGET_(r32,15, 0)
    #define   SET32TSC_STS_SYNCCNT(r32,v)                      _BFSET_(r32,15, 0,v)
    #define   GET16TSC_STS_SYNCCNT(r16)                        _BFGET_(r16,15, 0)
    #define   SET16TSC_STS_SYNCCNT(r16,v)                      _BFSET_(r16,15, 0,v)

    #define     w32TSC_STS                                     {\
            UNSG32 uSTS_SYNCCNT                                : 16;\
            UNSG32 RSVDx14_b16                                 : 16;\
          }
    union { UNSG32 u32TSC_STS;
            struct w32TSC_STS;
          };
    #define   GET32TSC_STS_TSCMD0(r32)                         _BFGET_(r32,31, 0)
    #define   SET32TSC_STS_TSCMD0(r32,v)                       _BFSET_(r32,31, 0,v)

    #define     w32TSC_STS1                                    {\
            UNSG32 uSTS_TSCMD0                                 : 32;\
          }
    union { UNSG32 u32TSC_STS1;
            struct w32TSC_STS1;
          };
    #define   GET32TSC_STS_TSCMD1(r32)                         _BFGET_(r32,31, 0)
    #define   SET32TSC_STS_TSCMD1(r32,v)                       _BFSET_(r32,31, 0,v)

    #define     w32TSC_STS2                                    {\
            UNSG32 uSTS_TSCMD1                                 : 32;\
          }
    union { UNSG32 u32TSC_STS2;
            struct w32TSC_STS2;
          };
    ///////////////////////////////////////////////////////////
              SIE_PID                                          ie_PID;
    ///////////////////////////////////////////////////////////
    } SIE_TSC;

    typedef union  T32TSC_CFG
          { UNSG32 u32;
            struct w32TSC_CFG;
                 } T32TSC_CFG;
    typedef union  T32TSC_CFG1
          { UNSG32 u32;
            struct w32TSC_CFG1;
                 } T32TSC_CFG1;
    typedef union  T32TSC_CFG2
          { UNSG32 u32;
            struct w32TSC_CFG2;
                 } T32TSC_CFG2;
    typedef union  T32TSC_CFG3
          { UNSG32 u32;
            struct w32TSC_CFG3;
                 } T32TSC_CFG3;
    typedef union  T32TSC_CFG4
          { UNSG32 u32;
            struct w32TSC_CFG4;
                 } T32TSC_CFG4;
    typedef union  T32TSC_STS
          { UNSG32 u32;
            struct w32TSC_STS;
                 } T32TSC_STS;
    typedef union  T32TSC_STS1
          { UNSG32 u32;
            struct w32TSC_STS1;
                 } T32TSC_STS1;
    typedef union  T32TSC_STS2
          { UNSG32 u32;
            struct w32TSC_STS2;
                 } T32TSC_STS2;
    ///////////////////////////////////////////////////////////

    typedef union  TTSC_CFG
          { UNSG32 u32[5];
            struct {
            struct w32TSC_CFG;
            struct w32TSC_CFG1;
            struct w32TSC_CFG2;
            struct w32TSC_CFG3;
            struct w32TSC_CFG4;
                   };
                 } TTSC_CFG;
    typedef union  TTSC_STS
          { UNSG32 u32[3];
            struct {
            struct w32TSC_STS;
            struct w32TSC_STS1;
            struct w32TSC_STS2;
                   };
                 } TTSC_STS;

    ///////////////////////////////////////////////////////////
     SIGN32 TSC_drvrd(SIE_TSC *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSC_drvwr(SIE_TSC *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSC_reset(SIE_TSC *p);
     SIGN32 TSC_cmp  (SIE_TSC *p, SIE_TSC *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSC_check(p,pie,pfx,hLOG) TSC_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSC_print(p,    pfx,hLOG) TSC_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSC
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FIFOMAP                                  (4,4)
///     # # ----------------------------------------------------------
///               : CHN_TSP0           0x0
///               : CHN_TSP1           0x1
///               : CHN_TSP2           0x2
///               : CHN_TSP3           0x3
///               : CHN_TSCMD          0x4
///               : CHN_DS0            0x5
///               : CHN_SFCMDQ         0x6
///               : CHN_SFEVENT        0x7
///               : CHN_TSO0           0x8
///               : TSCP0              0x0
///               : TSCP0SIZE          0x40
///               : TSCP1              0x40
///               : TSCP1SIZE          0x40
///               : TSCP2              0x80
///               : TSCP2SIZE          0x40
///               : TSCP3              0xC0
///               : TSCP3SIZE          0x40
///               : TSCMD              0x100
///               : TSCMDSIZE          0x10
///               : DS                 0x110
///               : DSSIZE             0x10
///               : SFEVENTQ           0x1A0
///               : SFEVENTQSIZE       0x20
///               : SFCMDQ             0x1E0
///               : SFCMDQSIZE         0x10
///               : TSO0               0x1F0
///               : TSO0SIZE           0x10
///     @ 0x00000 fifomap              (R-)
///               %unsigned 32 dummy                     0x0
///                                    ###
///                                    * TSO0
///                                    * TSO0SIZE
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FIFOMAP
#define h_FIFOMAP (){}

    #define        FIFOMAP_CHN_TSP0                            0x0
    #define        FIFOMAP_CHN_TSP1                            0x1
    #define        FIFOMAP_CHN_TSP2                            0x2
    #define        FIFOMAP_CHN_TSP3                            0x3
    #define        FIFOMAP_CHN_TSCMD                           0x4
    #define        FIFOMAP_CHN_DS0                             0x5
    #define        FIFOMAP_CHN_SFCMDQ                          0x6
    #define        FIFOMAP_CHN_SFEVENT                         0x7
    #define        FIFOMAP_CHN_TSO0                            0x8
    #define        FIFOMAP_TSCP0                               0x0
    #define        FIFOMAP_TSCP0SIZE                           0x40
    #define        FIFOMAP_TSCP1                               0x40
    #define        FIFOMAP_TSCP1SIZE                           0x40
    #define        FIFOMAP_TSCP2                               0x80
    #define        FIFOMAP_TSCP2SIZE                           0x40
    #define        FIFOMAP_TSCP3                               0xC0
    #define        FIFOMAP_TSCP3SIZE                           0x40
    #define        FIFOMAP_TSCMD                               0x100
    #define        FIFOMAP_TSCMDSIZE                           0x10
    #define        FIFOMAP_DS                                  0x110
    #define        FIFOMAP_DSSIZE                              0x10
    #define        FIFOMAP_SFEVENTQ                            0x1A0
    #define        FIFOMAP_SFEVENTQSIZE                        0x20
    #define        FIFOMAP_SFCMDQ                              0x1E0
    #define        FIFOMAP_SFCMDQSIZE                          0x10
    #define        FIFOMAP_TSO0                                0x1F0
    #define        FIFOMAP_TSO0SIZE                            0x10
    ///////////////////////////////////////////////////////////
    #define     RA_FIFOMAP_fifomap                             0x0000

    #define     BA_FIFOMAP_fifomap_dummy                       0x0000
    #define     B16FIFOMAP_fifomap_dummy                       0x0000
    #define   LSb32FIFOMAP_fifomap_dummy                          0
    #define   LSb16FIFOMAP_fifomap_dummy                          0
    #define       bFIFOMAP_fifomap_dummy                       32
    #define   MSK32FIFOMAP_fifomap_dummy                          0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FIFOMAP {
    ///////////////////////////////////////////////////////////
    #define   GET32FIFOMAP_fifomap_dummy(r32)                  _BFGET_(r32,31, 0)
    #define   SET32FIFOMAP_fifomap_dummy(r32,v)                _BFSET_(r32,31, 0,v)

    #define     w32FIFOMAP_fifomap                             {\
            UNSG32 ufifomap_dummy                              : 32;\
          }
    union { UNSG32 u32FIFOMAP_fifomap;
            struct w32FIFOMAP_fifomap;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FIFOMAP;

    typedef union  T32FIFOMAP_fifomap
          { UNSG32 u32;
            struct w32FIFOMAP_fifomap;
                 } T32FIFOMAP_fifomap;
    ///////////////////////////////////////////////////////////

    typedef union  TFIFOMAP_fifomap
          { UNSG32 u32[1];
            struct {
            struct w32FIFOMAP_fifomap;
                   };
                 } TFIFOMAP_fifomap;

    ///////////////////////////////////////////////////////////
     SIGN32 FIFOMAP_drvrd(SIE_FIFOMAP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FIFOMAP_drvwr(SIE_FIFOMAP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FIFOMAP_reset(SIE_FIFOMAP *p);
     SIGN32 FIFOMAP_cmp  (SIE_FIFOMAP *p, SIE_FIFOMAP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FIFOMAP_check(p,pie,pfx,hLOG) FIFOMAP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FIFOMAP_print(p,    pfx,hLOG) FIFOMAP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FIFOMAP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SFCONTROL               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 1  enable                    0x0
///                                    ###
///                                    * DV-FC
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00004                      (R-)
///               %unsigned 32 shot0                     0x0
///               %unsigned 32 shot1                     0x0
///               %unsigned 32 shot2                     0x0
///               %unsigned 32 shot3                     0x0
///     @ 0x00014                      (RW-)
///               %unsigned 7  clearShot                 0x0
///                                    ###
///                                    * write to this register will clear the specified shot
///                                    * DV-FR-CNR (0-128, need all shots be set first)
///                                    ###
///               %%        25         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      24B, bits:     136b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SFCONTROL
#define h_SFCONTROL (){}

    #define     BA_SFCONTROL_enable                            0x0000
    #define     B16SFCONTROL_enable                            0x0000
    #define   LSb32SFCONTROL_enable                               0
    #define   LSb16SFCONTROL_enable                               0
    #define       bSFCONTROL_enable                            1
    #define   MSK32SFCONTROL_enable                               0x00000001
    ///////////////////////////////////////////////////////////

    #define     BA_SFCONTROL_shot0                             0x0004
    #define     B16SFCONTROL_shot0                             0x0004
    #define   LSb32SFCONTROL_shot0                                0
    #define   LSb16SFCONTROL_shot0                                0
    #define       bSFCONTROL_shot0                             32
    #define   MSK32SFCONTROL_shot0                                0xFFFFFFFF

    #define     BA_SFCONTROL_shot1                             0x0008
    #define     B16SFCONTROL_shot1                             0x0008
    #define   LSb32SFCONTROL_shot1                                0
    #define   LSb16SFCONTROL_shot1                                0
    #define       bSFCONTROL_shot1                             32
    #define   MSK32SFCONTROL_shot1                                0xFFFFFFFF

    #define     BA_SFCONTROL_shot2                             0x000C
    #define     B16SFCONTROL_shot2                             0x000C
    #define   LSb32SFCONTROL_shot2                                0
    #define   LSb16SFCONTROL_shot2                                0
    #define       bSFCONTROL_shot2                             32
    #define   MSK32SFCONTROL_shot2                                0xFFFFFFFF

    #define     BA_SFCONTROL_shot3                             0x0010
    #define     B16SFCONTROL_shot3                             0x0010
    #define   LSb32SFCONTROL_shot3                                0
    #define   LSb16SFCONTROL_shot3                                0
    #define       bSFCONTROL_shot3                             32
    #define   MSK32SFCONTROL_shot3                                0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    #define     BA_SFCONTROL_clearShot                         0x0014
    #define     B16SFCONTROL_clearShot                         0x0014
    #define   LSb32SFCONTROL_clearShot                            0
    #define   LSb16SFCONTROL_clearShot                            0
    #define       bSFCONTROL_clearShot                         7
    #define   MSK32SFCONTROL_clearShot                            0x0000007F
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SFCONTROL {
    ///////////////////////////////////////////////////////////
    #define   GET32SFCONTROL_enable(r32)                       _BFGET_(r32, 0, 0)
    #define   SET32SFCONTROL_enable(r32,v)                     _BFSET_(r32, 0, 0,v)
    #define   GET16SFCONTROL_enable(r16)                       _BFGET_(r16, 0, 0)
    #define   SET16SFCONTROL_enable(r16,v)                     _BFSET_(r16, 0, 0,v)

            UNSG32 u_enable                                    :  1;
            UNSG32 RSVDx0_b1                                   : 31;
    ///////////////////////////////////////////////////////////
    #define   GET32SFCONTROL_shot0(r32)                        _BFGET_(r32,31, 0)
    #define   SET32SFCONTROL_shot0(r32,v)                      _BFSET_(r32,31, 0,v)

            UNSG32 u_shot0                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32SFCONTROL_shot1(r32)                        _BFGET_(r32,31, 0)
    #define   SET32SFCONTROL_shot1(r32,v)                      _BFSET_(r32,31, 0,v)

            UNSG32 u_shot1                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32SFCONTROL_shot2(r32)                        _BFGET_(r32,31, 0)
    #define   SET32SFCONTROL_shot2(r32,v)                      _BFSET_(r32,31, 0,v)

            UNSG32 u_shot2                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32SFCONTROL_shot3(r32)                        _BFGET_(r32,31, 0)
    #define   SET32SFCONTROL_shot3(r32,v)                      _BFSET_(r32,31, 0,v)

            UNSG32 u_shot3                                     : 32;
    ///////////////////////////////////////////////////////////
    #define   GET32SFCONTROL_clearShot(r32)                    _BFGET_(r32, 6, 0)
    #define   SET32SFCONTROL_clearShot(r32,v)                  _BFSET_(r32, 6, 0,v)
    #define   GET16SFCONTROL_clearShot(r16)                    _BFGET_(r16, 6, 0)
    #define   SET16SFCONTROL_clearShot(r16,v)                  _BFSET_(r16, 6, 0,v)

            UNSG32 u_clearShot                                 :  7;
            UNSG32 RSVDx14_b7                                  : 25;
    ///////////////////////////////////////////////////////////
    } SIE_SFCONTROL;

    ///////////////////////////////////////////////////////////
     SIGN32 SFCONTROL_drvrd(SIE_SFCONTROL *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SFCONTROL_drvwr(SIE_SFCONTROL *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SFCONTROL_reset(SIE_SFCONTROL *p);
     SIGN32 SFCONTROL_cmp  (SIE_SFCONTROL *p, SIE_SFCONTROL *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SFCONTROL_check(p,pie,pfx,hLOG) SFCONTROL_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SFCONTROL_print(p,    pfx,hLOG) SFCONTROL_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SFCONTROL
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FLTRDESC                                 (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 HEADER               (P)
///               %unsigned 2  ENB                       0x0
///                                    ###
///                                    * 2'b00: disable
///                                    * 2'b01: match PID only
///                                    * 2'b10: enable always
///                                    * 2'b11: enable 1 shot
///                                    * DV-FC
///                                    ###
///               %unsigned 16 EXTPID                    0x0
///                                    ###
///                                    * {TSID,PID} to match
///                                    * DV-FR-CNR(PID from 0 to 0x1fff, TSID from 0,1,2,3}
///                                    ###
///               %unsigned 14 reserved                  0x0
///                                    ###
///                                    * data for Figo usage
///                                    * sectf will append these data into TSCmd
///                                    * DV-FR-CNR
///                                    ###
///     @ 0x00004 RANGE                (P)
///               %unsigned 1  RAND0                     0x0
///                                    ###
///                                    * 0: range filter0 will be AND with other results
///                                    * 1: range filter0 will be OR with other results
///                                    * DV-FR-CR ( individually set RANDi bit 0/1 for all range filters)
///                                    * 0x0
///                                    ###
///               %unsigned 3  RLEN0                     0x0
///                                    ###
///                                    * Length of range filter 0, 0x0 means filter is disabled, 0x1 means 2 bits,... 0x7 means 8 bits
///                                    * DV-FR-CR ( individually random from 0 to 7 for all range filters)
///                                    ###
///               %unsigned 1  RAND1                     0x0
///               %unsigned 3  RLEN1                     0x0
///               %unsigned 1  RAND2                     0x0
///               %unsigned 3  RLEN2                     0x0
///               %unsigned 1  RAND3                     0x0
///               %unsigned 3  RLEN3                     0x0
///               %unsigned 1  RAND4                     0x0
///               %unsigned 3  RLEN4                     0x0
///               %unsigned 1  RAND5                     0x0
///               %unsigned 3  RLEN5                     0x0
///               %unsigned 1  RAND6                     0x0
///               %unsigned 3  RLEN6                     0x0
///               %unsigned 1  RAND7                     0x0
///               %unsigned 3  RLEN7                     0x0
///     # 0x00008 RANGE1               
///               %unsigned 1  RNEG0                     0x0
///                                    ###
///                                    * 1: range filter 0 result will be negated
///                                    * DV-FR-CR (0-1 individually for all range filters)
///                                    ###
///               %unsigned 7  ROFF0                     0x0
///                                    ###
///                                    * offset of the range filter
///                                    * DV-R-CR ( 0 – 126, ROFF0, ... ROFFi, ... ROFF7 must in incremental and not overlap manner)
///                                    ###
///               %unsigned 1  RNEG1                     0x0
///               %unsigned 7  ROFF1                     0x0
///               %unsigned 1  RNEG2                     0x0
///               %unsigned 7  ROFF2                     0x0
///               %unsigned 1  RNEG3                     0x0
///               %unsigned 7  ROFF3                     0x0
///     # 0x0000C RANGE2               
///               %unsigned 1  RNEG4                     0x0
///               %unsigned 7  ROFF4                     0x0
///               %unsigned 1  RNEG5                     0x0
///               %unsigned 7  ROFF5                     0x0
///               %unsigned 1  RNEG6                     0x0
///               %unsigned 7  ROFF6                     0x0
///               %unsigned 1  RNEG7                     0x0
///               %unsigned 7  ROFF7                     0x0
///     @ 0x00010 COFF                 (P)
///               %unsigned 32 COFF0                     0x0
///     # 0x00014 COFF1                
///               %unsigned 32 COFF1                     0x0
///     # 0x00018 COFF2                
///               %unsigned 32 COFF2                     0x0
///     # 0x0001C COFF3                
///               %unsigned 32 COFF3                     0x0
///                                    ###
///                                    * if related mask bit is 0, the coeff bits is the value to be matched, if mask bit is 1, the coeff bits denotes the MAX for range comparison
///                                    * DV-R-CNR (for bits in range filter, MIN+1 to 1<<RLEN0, random for all 8 individual range filters, for bits not in range filter, free random)
///                                    ###
///     @ 0x00020 NEG                  (P)
///               %unsigned 32 NEG0                      0x0
///     # 0x00024 NEG1                 
///               %unsigned 32 NEG1                      0x0
///     # 0x00028 NEG2                 
///               %unsigned 32 NEG2                      0x0
///     # 0x0002C NEG3                 
///               %unsigned 32 NEG3                      0x0
///                                    ###
///                                    * if related mask bit is 0, the neg bits is to be XORed with the packet bits, if mask bit is 1, the NEG bits denotes the MIN for range comparison
///                                    * DV-FR-CNR( for bits in range filter: 0 to 1<<RLEN0-1, random for all 8 individual range filters, for bits not in range filter, free random)
///                                    * 0x0
///                                    ###
///     @ 0x00030 MASK                 (P)
///               %unsigned 32 MASK0                     0x0
///     # 0x00034 MASK1                
///               %unsigned 32 MASK1                     0x0
///     # 0x00038 MASK2                
///               %unsigned 32 MASK2                     0x0
///     # 0x0003C MASK3                
///               %unsigned 32 MASK3                     0x0
///                                    ###
///                                    * indicates if the related bit needs to be compared with the coeff
///                                    * DV-R-CNR( for all bits not included in range filter, free random all individual mask bits)
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      64B, bits:     512b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FLTRDESC
#define h_FLTRDESC (){}

    #define     RA_FLTRDESC_HEADER                             0x0000

    #define     BA_FLTRDESC_HEADER_ENB                         0x0000
    #define     B16FLTRDESC_HEADER_ENB                         0x0000
    #define   LSb32FLTRDESC_HEADER_ENB                            0
    #define   LSb16FLTRDESC_HEADER_ENB                            0
    #define       bFLTRDESC_HEADER_ENB                         2
    #define   MSK32FLTRDESC_HEADER_ENB                            0x00000003

    #define     BA_FLTRDESC_HEADER_EXTPID                      0x0000
    #define     B16FLTRDESC_HEADER_EXTPID                      0x0000
    #define   LSb32FLTRDESC_HEADER_EXTPID                         2
    #define   LSb16FLTRDESC_HEADER_EXTPID                         2
    #define       bFLTRDESC_HEADER_EXTPID                      16
    #define   MSK32FLTRDESC_HEADER_EXTPID                         0x0003FFFC

    #define     BA_FLTRDESC_HEADER_reserved                    0x0002
    #define     B16FLTRDESC_HEADER_reserved                    0x0002
    #define   LSb32FLTRDESC_HEADER_reserved                       18
    #define   LSb16FLTRDESC_HEADER_reserved                       2
    #define       bFLTRDESC_HEADER_reserved                    14
    #define   MSK32FLTRDESC_HEADER_reserved                       0xFFFC0000
    ///////////////////////////////////////////////////////////
    #define     RA_FLTRDESC_RANGE                              0x0004

    #define     BA_FLTRDESC_RANGE_RAND0                        0x0004
    #define     B16FLTRDESC_RANGE_RAND0                        0x0004
    #define   LSb32FLTRDESC_RANGE_RAND0                           0
    #define   LSb16FLTRDESC_RANGE_RAND0                           0
    #define       bFLTRDESC_RANGE_RAND0                        1
    #define   MSK32FLTRDESC_RANGE_RAND0                           0x00000001

    #define     BA_FLTRDESC_RANGE_RLEN0                        0x0004
    #define     B16FLTRDESC_RANGE_RLEN0                        0x0004
    #define   LSb32FLTRDESC_RANGE_RLEN0                           1
    #define   LSb16FLTRDESC_RANGE_RLEN0                           1
    #define       bFLTRDESC_RANGE_RLEN0                        3
    #define   MSK32FLTRDESC_RANGE_RLEN0                           0x0000000E

    #define     BA_FLTRDESC_RANGE_RAND1                        0x0004
    #define     B16FLTRDESC_RANGE_RAND1                        0x0004
    #define   LSb32FLTRDESC_RANGE_RAND1                           4
    #define   LSb16FLTRDESC_RANGE_RAND1                           4
    #define       bFLTRDESC_RANGE_RAND1                        1
    #define   MSK32FLTRDESC_RANGE_RAND1                           0x00000010

    #define     BA_FLTRDESC_RANGE_RLEN1                        0x0004
    #define     B16FLTRDESC_RANGE_RLEN1                        0x0004
    #define   LSb32FLTRDESC_RANGE_RLEN1                           5
    #define   LSb16FLTRDESC_RANGE_RLEN1                           5
    #define       bFLTRDESC_RANGE_RLEN1                        3
    #define   MSK32FLTRDESC_RANGE_RLEN1                           0x000000E0

    #define     BA_FLTRDESC_RANGE_RAND2                        0x0005
    #define     B16FLTRDESC_RANGE_RAND2                        0x0004
    #define   LSb32FLTRDESC_RANGE_RAND2                           8
    #define   LSb16FLTRDESC_RANGE_RAND2                           8
    #define       bFLTRDESC_RANGE_RAND2                        1
    #define   MSK32FLTRDESC_RANGE_RAND2                           0x00000100

    #define     BA_FLTRDESC_RANGE_RLEN2                        0x0005
    #define     B16FLTRDESC_RANGE_RLEN2                        0x0004
    #define   LSb32FLTRDESC_RANGE_RLEN2                           9
    #define   LSb16FLTRDESC_RANGE_RLEN2                           9
    #define       bFLTRDESC_RANGE_RLEN2                        3
    #define   MSK32FLTRDESC_RANGE_RLEN2                           0x00000E00

    #define     BA_FLTRDESC_RANGE_RAND3                        0x0005
    #define     B16FLTRDESC_RANGE_RAND3                        0x0004
    #define   LSb32FLTRDESC_RANGE_RAND3                           12
    #define   LSb16FLTRDESC_RANGE_RAND3                           12
    #define       bFLTRDESC_RANGE_RAND3                        1
    #define   MSK32FLTRDESC_RANGE_RAND3                           0x00001000

    #define     BA_FLTRDESC_RANGE_RLEN3                        0x0005
    #define     B16FLTRDESC_RANGE_RLEN3                        0x0004
    #define   LSb32FLTRDESC_RANGE_RLEN3                           13
    #define   LSb16FLTRDESC_RANGE_RLEN3                           13
    #define       bFLTRDESC_RANGE_RLEN3                        3
    #define   MSK32FLTRDESC_RANGE_RLEN3                           0x0000E000

    #define     BA_FLTRDESC_RANGE_RAND4                        0x0006
    #define     B16FLTRDESC_RANGE_RAND4                        0x0006
    #define   LSb32FLTRDESC_RANGE_RAND4                           16
    #define   LSb16FLTRDESC_RANGE_RAND4                           0
    #define       bFLTRDESC_RANGE_RAND4                        1
    #define   MSK32FLTRDESC_RANGE_RAND4                           0x00010000

    #define     BA_FLTRDESC_RANGE_RLEN4                        0x0006
    #define     B16FLTRDESC_RANGE_RLEN4                        0x0006
    #define   LSb32FLTRDESC_RANGE_RLEN4                           17
    #define   LSb16FLTRDESC_RANGE_RLEN4                           1
    #define       bFLTRDESC_RANGE_RLEN4                        3
    #define   MSK32FLTRDESC_RANGE_RLEN4                           0x000E0000

    #define     BA_FLTRDESC_RANGE_RAND5                        0x0006
    #define     B16FLTRDESC_RANGE_RAND5                        0x0006
    #define   LSb32FLTRDESC_RANGE_RAND5                           20
    #define   LSb16FLTRDESC_RANGE_RAND5                           4
    #define       bFLTRDESC_RANGE_RAND5                        1
    #define   MSK32FLTRDESC_RANGE_RAND5                           0x00100000

    #define     BA_FLTRDESC_RANGE_RLEN5                        0x0006
    #define     B16FLTRDESC_RANGE_RLEN5                        0x0006
    #define   LSb32FLTRDESC_RANGE_RLEN5                           21
    #define   LSb16FLTRDESC_RANGE_RLEN5                           5
    #define       bFLTRDESC_RANGE_RLEN5                        3
    #define   MSK32FLTRDESC_RANGE_RLEN5                           0x00E00000

    #define     BA_FLTRDESC_RANGE_RAND6                        0x0007
    #define     B16FLTRDESC_RANGE_RAND6                        0x0006
    #define   LSb32FLTRDESC_RANGE_RAND6                           24
    #define   LSb16FLTRDESC_RANGE_RAND6                           8
    #define       bFLTRDESC_RANGE_RAND6                        1
    #define   MSK32FLTRDESC_RANGE_RAND6                           0x01000000

    #define     BA_FLTRDESC_RANGE_RLEN6                        0x0007
    #define     B16FLTRDESC_RANGE_RLEN6                        0x0006
    #define   LSb32FLTRDESC_RANGE_RLEN6                           25
    #define   LSb16FLTRDESC_RANGE_RLEN6                           9
    #define       bFLTRDESC_RANGE_RLEN6                        3
    #define   MSK32FLTRDESC_RANGE_RLEN6                           0x0E000000

    #define     BA_FLTRDESC_RANGE_RAND7                        0x0007
    #define     B16FLTRDESC_RANGE_RAND7                        0x0006
    #define   LSb32FLTRDESC_RANGE_RAND7                           28
    #define   LSb16FLTRDESC_RANGE_RAND7                           12
    #define       bFLTRDESC_RANGE_RAND7                        1
    #define   MSK32FLTRDESC_RANGE_RAND7                           0x10000000

    #define     BA_FLTRDESC_RANGE_RLEN7                        0x0007
    #define     B16FLTRDESC_RANGE_RLEN7                        0x0006
    #define   LSb32FLTRDESC_RANGE_RLEN7                           29
    #define   LSb16FLTRDESC_RANGE_RLEN7                           13
    #define       bFLTRDESC_RANGE_RLEN7                        3
    #define   MSK32FLTRDESC_RANGE_RLEN7                           0xE0000000

    #define     RA_FLTRDESC_RANGE1                             0x0008

    #define     BA_FLTRDESC_RANGE_RNEG0                        0x0008
    #define     B16FLTRDESC_RANGE_RNEG0                        0x0008
    #define   LSb32FLTRDESC_RANGE_RNEG0                           0
    #define   LSb16FLTRDESC_RANGE_RNEG0                           0
    #define       bFLTRDESC_RANGE_RNEG0                        1
    #define   MSK32FLTRDESC_RANGE_RNEG0                           0x00000001

    #define     BA_FLTRDESC_RANGE_ROFF0                        0x0008
    #define     B16FLTRDESC_RANGE_ROFF0                        0x0008
    #define   LSb32FLTRDESC_RANGE_ROFF0                           1
    #define   LSb16FLTRDESC_RANGE_ROFF0                           1
    #define       bFLTRDESC_RANGE_ROFF0                        7
    #define   MSK32FLTRDESC_RANGE_ROFF0                           0x000000FE

    #define     BA_FLTRDESC_RANGE_RNEG1                        0x0009
    #define     B16FLTRDESC_RANGE_RNEG1                        0x0008
    #define   LSb32FLTRDESC_RANGE_RNEG1                           8
    #define   LSb16FLTRDESC_RANGE_RNEG1                           8
    #define       bFLTRDESC_RANGE_RNEG1                        1
    #define   MSK32FLTRDESC_RANGE_RNEG1                           0x00000100

    #define     BA_FLTRDESC_RANGE_ROFF1                        0x0009
    #define     B16FLTRDESC_RANGE_ROFF1                        0x0008
    #define   LSb32FLTRDESC_RANGE_ROFF1                           9
    #define   LSb16FLTRDESC_RANGE_ROFF1                           9
    #define       bFLTRDESC_RANGE_ROFF1                        7
    #define   MSK32FLTRDESC_RANGE_ROFF1                           0x0000FE00

    #define     BA_FLTRDESC_RANGE_RNEG2                        0x000A
    #define     B16FLTRDESC_RANGE_RNEG2                        0x000A
    #define   LSb32FLTRDESC_RANGE_RNEG2                           16
    #define   LSb16FLTRDESC_RANGE_RNEG2                           0
    #define       bFLTRDESC_RANGE_RNEG2                        1
    #define   MSK32FLTRDESC_RANGE_RNEG2                           0x00010000

    #define     BA_FLTRDESC_RANGE_ROFF2                        0x000A
    #define     B16FLTRDESC_RANGE_ROFF2                        0x000A
    #define   LSb32FLTRDESC_RANGE_ROFF2                           17
    #define   LSb16FLTRDESC_RANGE_ROFF2                           1
    #define       bFLTRDESC_RANGE_ROFF2                        7
    #define   MSK32FLTRDESC_RANGE_ROFF2                           0x00FE0000

    #define     BA_FLTRDESC_RANGE_RNEG3                        0x000B
    #define     B16FLTRDESC_RANGE_RNEG3                        0x000A
    #define   LSb32FLTRDESC_RANGE_RNEG3                           24
    #define   LSb16FLTRDESC_RANGE_RNEG3                           8
    #define       bFLTRDESC_RANGE_RNEG3                        1
    #define   MSK32FLTRDESC_RANGE_RNEG3                           0x01000000

    #define     BA_FLTRDESC_RANGE_ROFF3                        0x000B
    #define     B16FLTRDESC_RANGE_ROFF3                        0x000A
    #define   LSb32FLTRDESC_RANGE_ROFF3                           25
    #define   LSb16FLTRDESC_RANGE_ROFF3                           9
    #define       bFLTRDESC_RANGE_ROFF3                        7
    #define   MSK32FLTRDESC_RANGE_ROFF3                           0xFE000000

    #define     RA_FLTRDESC_RANGE2                             0x000C

    #define     BA_FLTRDESC_RANGE_RNEG4                        0x000C
    #define     B16FLTRDESC_RANGE_RNEG4                        0x000C
    #define   LSb32FLTRDESC_RANGE_RNEG4                           0
    #define   LSb16FLTRDESC_RANGE_RNEG4                           0
    #define       bFLTRDESC_RANGE_RNEG4                        1
    #define   MSK32FLTRDESC_RANGE_RNEG4                           0x00000001

    #define     BA_FLTRDESC_RANGE_ROFF4                        0x000C
    #define     B16FLTRDESC_RANGE_ROFF4                        0x000C
    #define   LSb32FLTRDESC_RANGE_ROFF4                           1
    #define   LSb16FLTRDESC_RANGE_ROFF4                           1
    #define       bFLTRDESC_RANGE_ROFF4                        7
    #define   MSK32FLTRDESC_RANGE_ROFF4                           0x000000FE

    #define     BA_FLTRDESC_RANGE_RNEG5                        0x000D
    #define     B16FLTRDESC_RANGE_RNEG5                        0x000C
    #define   LSb32FLTRDESC_RANGE_RNEG5                           8
    #define   LSb16FLTRDESC_RANGE_RNEG5                           8
    #define       bFLTRDESC_RANGE_RNEG5                        1
    #define   MSK32FLTRDESC_RANGE_RNEG5                           0x00000100

    #define     BA_FLTRDESC_RANGE_ROFF5                        0x000D
    #define     B16FLTRDESC_RANGE_ROFF5                        0x000C
    #define   LSb32FLTRDESC_RANGE_ROFF5                           9
    #define   LSb16FLTRDESC_RANGE_ROFF5                           9
    #define       bFLTRDESC_RANGE_ROFF5                        7
    #define   MSK32FLTRDESC_RANGE_ROFF5                           0x0000FE00

    #define     BA_FLTRDESC_RANGE_RNEG6                        0x000E
    #define     B16FLTRDESC_RANGE_RNEG6                        0x000E
    #define   LSb32FLTRDESC_RANGE_RNEG6                           16
    #define   LSb16FLTRDESC_RANGE_RNEG6                           0
    #define       bFLTRDESC_RANGE_RNEG6                        1
    #define   MSK32FLTRDESC_RANGE_RNEG6                           0x00010000

    #define     BA_FLTRDESC_RANGE_ROFF6                        0x000E
    #define     B16FLTRDESC_RANGE_ROFF6                        0x000E
    #define   LSb32FLTRDESC_RANGE_ROFF6                           17
    #define   LSb16FLTRDESC_RANGE_ROFF6                           1
    #define       bFLTRDESC_RANGE_ROFF6                        7
    #define   MSK32FLTRDESC_RANGE_ROFF6                           0x00FE0000

    #define     BA_FLTRDESC_RANGE_RNEG7                        0x000F
    #define     B16FLTRDESC_RANGE_RNEG7                        0x000E
    #define   LSb32FLTRDESC_RANGE_RNEG7                           24
    #define   LSb16FLTRDESC_RANGE_RNEG7                           8
    #define       bFLTRDESC_RANGE_RNEG7                        1
    #define   MSK32FLTRDESC_RANGE_RNEG7                           0x01000000

    #define     BA_FLTRDESC_RANGE_ROFF7                        0x000F
    #define     B16FLTRDESC_RANGE_ROFF7                        0x000E
    #define   LSb32FLTRDESC_RANGE_ROFF7                           25
    #define   LSb16FLTRDESC_RANGE_ROFF7                           9
    #define       bFLTRDESC_RANGE_ROFF7                        7
    #define   MSK32FLTRDESC_RANGE_ROFF7                           0xFE000000
    ///////////////////////////////////////////////////////////
    #define     RA_FLTRDESC_COFF                               0x0010

    #define     BA_FLTRDESC_COFF_COFF0                         0x0010
    #define     B16FLTRDESC_COFF_COFF0                         0x0010
    #define   LSb32FLTRDESC_COFF_COFF0                            0
    #define   LSb16FLTRDESC_COFF_COFF0                            0
    #define       bFLTRDESC_COFF_COFF0                         32
    #define   MSK32FLTRDESC_COFF_COFF0                            0xFFFFFFFF

    #define     RA_FLTRDESC_COFF1                              0x0014

    #define     BA_FLTRDESC_COFF_COFF1                         0x0014
    #define     B16FLTRDESC_COFF_COFF1                         0x0014
    #define   LSb32FLTRDESC_COFF_COFF1                            0
    #define   LSb16FLTRDESC_COFF_COFF1                            0
    #define       bFLTRDESC_COFF_COFF1                         32
    #define   MSK32FLTRDESC_COFF_COFF1                            0xFFFFFFFF

    #define     RA_FLTRDESC_COFF2                              0x0018

    #define     BA_FLTRDESC_COFF_COFF2                         0x0018
    #define     B16FLTRDESC_COFF_COFF2                         0x0018
    #define   LSb32FLTRDESC_COFF_COFF2                            0
    #define   LSb16FLTRDESC_COFF_COFF2                            0
    #define       bFLTRDESC_COFF_COFF2                         32
    #define   MSK32FLTRDESC_COFF_COFF2                            0xFFFFFFFF

    #define     RA_FLTRDESC_COFF3                              0x001C

    #define     BA_FLTRDESC_COFF_COFF3                         0x001C
    #define     B16FLTRDESC_COFF_COFF3                         0x001C
    #define   LSb32FLTRDESC_COFF_COFF3                            0
    #define   LSb16FLTRDESC_COFF_COFF3                            0
    #define       bFLTRDESC_COFF_COFF3                         32
    #define   MSK32FLTRDESC_COFF_COFF3                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FLTRDESC_NEG                                0x0020

    #define     BA_FLTRDESC_NEG_NEG0                           0x0020
    #define     B16FLTRDESC_NEG_NEG0                           0x0020
    #define   LSb32FLTRDESC_NEG_NEG0                              0
    #define   LSb16FLTRDESC_NEG_NEG0                              0
    #define       bFLTRDESC_NEG_NEG0                           32
    #define   MSK32FLTRDESC_NEG_NEG0                              0xFFFFFFFF

    #define     RA_FLTRDESC_NEG1                               0x0024

    #define     BA_FLTRDESC_NEG_NEG1                           0x0024
    #define     B16FLTRDESC_NEG_NEG1                           0x0024
    #define   LSb32FLTRDESC_NEG_NEG1                              0
    #define   LSb16FLTRDESC_NEG_NEG1                              0
    #define       bFLTRDESC_NEG_NEG1                           32
    #define   MSK32FLTRDESC_NEG_NEG1                              0xFFFFFFFF

    #define     RA_FLTRDESC_NEG2                               0x0028

    #define     BA_FLTRDESC_NEG_NEG2                           0x0028
    #define     B16FLTRDESC_NEG_NEG2                           0x0028
    #define   LSb32FLTRDESC_NEG_NEG2                              0
    #define   LSb16FLTRDESC_NEG_NEG2                              0
    #define       bFLTRDESC_NEG_NEG2                           32
    #define   MSK32FLTRDESC_NEG_NEG2                              0xFFFFFFFF

    #define     RA_FLTRDESC_NEG3                               0x002C

    #define     BA_FLTRDESC_NEG_NEG3                           0x002C
    #define     B16FLTRDESC_NEG_NEG3                           0x002C
    #define   LSb32FLTRDESC_NEG_NEG3                              0
    #define   LSb16FLTRDESC_NEG_NEG3                              0
    #define       bFLTRDESC_NEG_NEG3                           32
    #define   MSK32FLTRDESC_NEG_NEG3                              0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FLTRDESC_MASK                               0x0030

    #define     BA_FLTRDESC_MASK_MASK0                         0x0030
    #define     B16FLTRDESC_MASK_MASK0                         0x0030
    #define   LSb32FLTRDESC_MASK_MASK0                            0
    #define   LSb16FLTRDESC_MASK_MASK0                            0
    #define       bFLTRDESC_MASK_MASK0                         32
    #define   MSK32FLTRDESC_MASK_MASK0                            0xFFFFFFFF

    #define     RA_FLTRDESC_MASK1                              0x0034

    #define     BA_FLTRDESC_MASK_MASK1                         0x0034
    #define     B16FLTRDESC_MASK_MASK1                         0x0034
    #define   LSb32FLTRDESC_MASK_MASK1                            0
    #define   LSb16FLTRDESC_MASK_MASK1                            0
    #define       bFLTRDESC_MASK_MASK1                         32
    #define   MSK32FLTRDESC_MASK_MASK1                            0xFFFFFFFF

    #define     RA_FLTRDESC_MASK2                              0x0038

    #define     BA_FLTRDESC_MASK_MASK2                         0x0038
    #define     B16FLTRDESC_MASK_MASK2                         0x0038
    #define   LSb32FLTRDESC_MASK_MASK2                            0
    #define   LSb16FLTRDESC_MASK_MASK2                            0
    #define       bFLTRDESC_MASK_MASK2                         32
    #define   MSK32FLTRDESC_MASK_MASK2                            0xFFFFFFFF

    #define     RA_FLTRDESC_MASK3                              0x003C

    #define     BA_FLTRDESC_MASK_MASK3                         0x003C
    #define     B16FLTRDESC_MASK_MASK3                         0x003C
    #define   LSb32FLTRDESC_MASK_MASK3                            0
    #define   LSb16FLTRDESC_MASK_MASK3                            0
    #define       bFLTRDESC_MASK_MASK3                         32
    #define   MSK32FLTRDESC_MASK_MASK3                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FLTRDESC {
    ///////////////////////////////////////////////////////////
    #define   GET32FLTRDESC_HEADER_ENB(r32)                    _BFGET_(r32, 1, 0)
    #define   SET32FLTRDESC_HEADER_ENB(r32,v)                  _BFSET_(r32, 1, 0,v)
    #define   GET16FLTRDESC_HEADER_ENB(r16)                    _BFGET_(r16, 1, 0)
    #define   SET16FLTRDESC_HEADER_ENB(r16,v)                  _BFSET_(r16, 1, 0,v)

    #define   GET32FLTRDESC_HEADER_EXTPID(r32)                 _BFGET_(r32,17, 2)
    #define   SET32FLTRDESC_HEADER_EXTPID(r32,v)               _BFSET_(r32,17, 2,v)

    #define   GET32FLTRDESC_HEADER_reserved(r32)               _BFGET_(r32,31,18)
    #define   SET32FLTRDESC_HEADER_reserved(r32,v)             _BFSET_(r32,31,18,v)
    #define   GET16FLTRDESC_HEADER_reserved(r16)               _BFGET_(r16,15, 2)
    #define   SET16FLTRDESC_HEADER_reserved(r16,v)             _BFSET_(r16,15, 2,v)

    #define     w32FLTRDESC_HEADER                             {\
            UNSG32 uHEADER_ENB                                 :  2;\
            UNSG32 uHEADER_EXTPID                              : 16;\
            UNSG32 uHEADER_reserved                            : 14;\
          }
    union { UNSG32 u32FLTRDESC_HEADER;
            struct w32FLTRDESC_HEADER;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FLTRDESC_RANGE_RAND0(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32FLTRDESC_RANGE_RAND0(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16FLTRDESC_RANGE_RAND0(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16FLTRDESC_RANGE_RAND0(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32FLTRDESC_RANGE_RLEN0(r32)                   _BFGET_(r32, 3, 1)
    #define   SET32FLTRDESC_RANGE_RLEN0(r32,v)                 _BFSET_(r32, 3, 1,v)
    #define   GET16FLTRDESC_RANGE_RLEN0(r16)                   _BFGET_(r16, 3, 1)
    #define   SET16FLTRDESC_RANGE_RLEN0(r16,v)                 _BFSET_(r16, 3, 1,v)

    #define   GET32FLTRDESC_RANGE_RAND1(r32)                   _BFGET_(r32, 4, 4)
    #define   SET32FLTRDESC_RANGE_RAND1(r32,v)                 _BFSET_(r32, 4, 4,v)
    #define   GET16FLTRDESC_RANGE_RAND1(r16)                   _BFGET_(r16, 4, 4)
    #define   SET16FLTRDESC_RANGE_RAND1(r16,v)                 _BFSET_(r16, 4, 4,v)

    #define   GET32FLTRDESC_RANGE_RLEN1(r32)                   _BFGET_(r32, 7, 5)
    #define   SET32FLTRDESC_RANGE_RLEN1(r32,v)                 _BFSET_(r32, 7, 5,v)
    #define   GET16FLTRDESC_RANGE_RLEN1(r16)                   _BFGET_(r16, 7, 5)
    #define   SET16FLTRDESC_RANGE_RLEN1(r16,v)                 _BFSET_(r16, 7, 5,v)

    #define   GET32FLTRDESC_RANGE_RAND2(r32)                   _BFGET_(r32, 8, 8)
    #define   SET32FLTRDESC_RANGE_RAND2(r32,v)                 _BFSET_(r32, 8, 8,v)
    #define   GET16FLTRDESC_RANGE_RAND2(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16FLTRDESC_RANGE_RAND2(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32FLTRDESC_RANGE_RLEN2(r32)                   _BFGET_(r32,11, 9)
    #define   SET32FLTRDESC_RANGE_RLEN2(r32,v)                 _BFSET_(r32,11, 9,v)
    #define   GET16FLTRDESC_RANGE_RLEN2(r16)                   _BFGET_(r16,11, 9)
    #define   SET16FLTRDESC_RANGE_RLEN2(r16,v)                 _BFSET_(r16,11, 9,v)

    #define   GET32FLTRDESC_RANGE_RAND3(r32)                   _BFGET_(r32,12,12)
    #define   SET32FLTRDESC_RANGE_RAND3(r32,v)                 _BFSET_(r32,12,12,v)
    #define   GET16FLTRDESC_RANGE_RAND3(r16)                   _BFGET_(r16,12,12)
    #define   SET16FLTRDESC_RANGE_RAND3(r16,v)                 _BFSET_(r16,12,12,v)

    #define   GET32FLTRDESC_RANGE_RLEN3(r32)                   _BFGET_(r32,15,13)
    #define   SET32FLTRDESC_RANGE_RLEN3(r32,v)                 _BFSET_(r32,15,13,v)
    #define   GET16FLTRDESC_RANGE_RLEN3(r16)                   _BFGET_(r16,15,13)
    #define   SET16FLTRDESC_RANGE_RLEN3(r16,v)                 _BFSET_(r16,15,13,v)

    #define   GET32FLTRDESC_RANGE_RAND4(r32)                   _BFGET_(r32,16,16)
    #define   SET32FLTRDESC_RANGE_RAND4(r32,v)                 _BFSET_(r32,16,16,v)
    #define   GET16FLTRDESC_RANGE_RAND4(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16FLTRDESC_RANGE_RAND4(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32FLTRDESC_RANGE_RLEN4(r32)                   _BFGET_(r32,19,17)
    #define   SET32FLTRDESC_RANGE_RLEN4(r32,v)                 _BFSET_(r32,19,17,v)
    #define   GET16FLTRDESC_RANGE_RLEN4(r16)                   _BFGET_(r16, 3, 1)
    #define   SET16FLTRDESC_RANGE_RLEN4(r16,v)                 _BFSET_(r16, 3, 1,v)

    #define   GET32FLTRDESC_RANGE_RAND5(r32)                   _BFGET_(r32,20,20)
    #define   SET32FLTRDESC_RANGE_RAND5(r32,v)                 _BFSET_(r32,20,20,v)
    #define   GET16FLTRDESC_RANGE_RAND5(r16)                   _BFGET_(r16, 4, 4)
    #define   SET16FLTRDESC_RANGE_RAND5(r16,v)                 _BFSET_(r16, 4, 4,v)

    #define   GET32FLTRDESC_RANGE_RLEN5(r32)                   _BFGET_(r32,23,21)
    #define   SET32FLTRDESC_RANGE_RLEN5(r32,v)                 _BFSET_(r32,23,21,v)
    #define   GET16FLTRDESC_RANGE_RLEN5(r16)                   _BFGET_(r16, 7, 5)
    #define   SET16FLTRDESC_RANGE_RLEN5(r16,v)                 _BFSET_(r16, 7, 5,v)

    #define   GET32FLTRDESC_RANGE_RAND6(r32)                   _BFGET_(r32,24,24)
    #define   SET32FLTRDESC_RANGE_RAND6(r32,v)                 _BFSET_(r32,24,24,v)
    #define   GET16FLTRDESC_RANGE_RAND6(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16FLTRDESC_RANGE_RAND6(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32FLTRDESC_RANGE_RLEN6(r32)                   _BFGET_(r32,27,25)
    #define   SET32FLTRDESC_RANGE_RLEN6(r32,v)                 _BFSET_(r32,27,25,v)
    #define   GET16FLTRDESC_RANGE_RLEN6(r16)                   _BFGET_(r16,11, 9)
    #define   SET16FLTRDESC_RANGE_RLEN6(r16,v)                 _BFSET_(r16,11, 9,v)

    #define   GET32FLTRDESC_RANGE_RAND7(r32)                   _BFGET_(r32,28,28)
    #define   SET32FLTRDESC_RANGE_RAND7(r32,v)                 _BFSET_(r32,28,28,v)
    #define   GET16FLTRDESC_RANGE_RAND7(r16)                   _BFGET_(r16,12,12)
    #define   SET16FLTRDESC_RANGE_RAND7(r16,v)                 _BFSET_(r16,12,12,v)

    #define   GET32FLTRDESC_RANGE_RLEN7(r32)                   _BFGET_(r32,31,29)
    #define   SET32FLTRDESC_RANGE_RLEN7(r32,v)                 _BFSET_(r32,31,29,v)
    #define   GET16FLTRDESC_RANGE_RLEN7(r16)                   _BFGET_(r16,15,13)
    #define   SET16FLTRDESC_RANGE_RLEN7(r16,v)                 _BFSET_(r16,15,13,v)

    #define     w32FLTRDESC_RANGE                              {\
            UNSG32 uRANGE_RAND0                                :  1;\
            UNSG32 uRANGE_RLEN0                                :  3;\
            UNSG32 uRANGE_RAND1                                :  1;\
            UNSG32 uRANGE_RLEN1                                :  3;\
            UNSG32 uRANGE_RAND2                                :  1;\
            UNSG32 uRANGE_RLEN2                                :  3;\
            UNSG32 uRANGE_RAND3                                :  1;\
            UNSG32 uRANGE_RLEN3                                :  3;\
            UNSG32 uRANGE_RAND4                                :  1;\
            UNSG32 uRANGE_RLEN4                                :  3;\
            UNSG32 uRANGE_RAND5                                :  1;\
            UNSG32 uRANGE_RLEN5                                :  3;\
            UNSG32 uRANGE_RAND6                                :  1;\
            UNSG32 uRANGE_RLEN6                                :  3;\
            UNSG32 uRANGE_RAND7                                :  1;\
            UNSG32 uRANGE_RLEN7                                :  3;\
          }
    union { UNSG32 u32FLTRDESC_RANGE;
            struct w32FLTRDESC_RANGE;
          };
    #define   GET32FLTRDESC_RANGE_RNEG0(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32FLTRDESC_RANGE_RNEG0(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16FLTRDESC_RANGE_RNEG0(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16FLTRDESC_RANGE_RNEG0(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32FLTRDESC_RANGE_ROFF0(r32)                   _BFGET_(r32, 7, 1)
    #define   SET32FLTRDESC_RANGE_ROFF0(r32,v)                 _BFSET_(r32, 7, 1,v)
    #define   GET16FLTRDESC_RANGE_ROFF0(r16)                   _BFGET_(r16, 7, 1)
    #define   SET16FLTRDESC_RANGE_ROFF0(r16,v)                 _BFSET_(r16, 7, 1,v)

    #define   GET32FLTRDESC_RANGE_RNEG1(r32)                   _BFGET_(r32, 8, 8)
    #define   SET32FLTRDESC_RANGE_RNEG1(r32,v)                 _BFSET_(r32, 8, 8,v)
    #define   GET16FLTRDESC_RANGE_RNEG1(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16FLTRDESC_RANGE_RNEG1(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32FLTRDESC_RANGE_ROFF1(r32)                   _BFGET_(r32,15, 9)
    #define   SET32FLTRDESC_RANGE_ROFF1(r32,v)                 _BFSET_(r32,15, 9,v)
    #define   GET16FLTRDESC_RANGE_ROFF1(r16)                   _BFGET_(r16,15, 9)
    #define   SET16FLTRDESC_RANGE_ROFF1(r16,v)                 _BFSET_(r16,15, 9,v)

    #define   GET32FLTRDESC_RANGE_RNEG2(r32)                   _BFGET_(r32,16,16)
    #define   SET32FLTRDESC_RANGE_RNEG2(r32,v)                 _BFSET_(r32,16,16,v)
    #define   GET16FLTRDESC_RANGE_RNEG2(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16FLTRDESC_RANGE_RNEG2(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32FLTRDESC_RANGE_ROFF2(r32)                   _BFGET_(r32,23,17)
    #define   SET32FLTRDESC_RANGE_ROFF2(r32,v)                 _BFSET_(r32,23,17,v)
    #define   GET16FLTRDESC_RANGE_ROFF2(r16)                   _BFGET_(r16, 7, 1)
    #define   SET16FLTRDESC_RANGE_ROFF2(r16,v)                 _BFSET_(r16, 7, 1,v)

    #define   GET32FLTRDESC_RANGE_RNEG3(r32)                   _BFGET_(r32,24,24)
    #define   SET32FLTRDESC_RANGE_RNEG3(r32,v)                 _BFSET_(r32,24,24,v)
    #define   GET16FLTRDESC_RANGE_RNEG3(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16FLTRDESC_RANGE_RNEG3(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32FLTRDESC_RANGE_ROFF3(r32)                   _BFGET_(r32,31,25)
    #define   SET32FLTRDESC_RANGE_ROFF3(r32,v)                 _BFSET_(r32,31,25,v)
    #define   GET16FLTRDESC_RANGE_ROFF3(r16)                   _BFGET_(r16,15, 9)
    #define   SET16FLTRDESC_RANGE_ROFF3(r16,v)                 _BFSET_(r16,15, 9,v)

    #define     w32FLTRDESC_RANGE1                             {\
            UNSG32 uRANGE_RNEG0                                :  1;\
            UNSG32 uRANGE_ROFF0                                :  7;\
            UNSG32 uRANGE_RNEG1                                :  1;\
            UNSG32 uRANGE_ROFF1                                :  7;\
            UNSG32 uRANGE_RNEG2                                :  1;\
            UNSG32 uRANGE_ROFF2                                :  7;\
            UNSG32 uRANGE_RNEG3                                :  1;\
            UNSG32 uRANGE_ROFF3                                :  7;\
          }
    union { UNSG32 u32FLTRDESC_RANGE1;
            struct w32FLTRDESC_RANGE1;
          };
    #define   GET32FLTRDESC_RANGE_RNEG4(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32FLTRDESC_RANGE_RNEG4(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16FLTRDESC_RANGE_RNEG4(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16FLTRDESC_RANGE_RNEG4(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32FLTRDESC_RANGE_ROFF4(r32)                   _BFGET_(r32, 7, 1)
    #define   SET32FLTRDESC_RANGE_ROFF4(r32,v)                 _BFSET_(r32, 7, 1,v)
    #define   GET16FLTRDESC_RANGE_ROFF4(r16)                   _BFGET_(r16, 7, 1)
    #define   SET16FLTRDESC_RANGE_ROFF4(r16,v)                 _BFSET_(r16, 7, 1,v)

    #define   GET32FLTRDESC_RANGE_RNEG5(r32)                   _BFGET_(r32, 8, 8)
    #define   SET32FLTRDESC_RANGE_RNEG5(r32,v)                 _BFSET_(r32, 8, 8,v)
    #define   GET16FLTRDESC_RANGE_RNEG5(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16FLTRDESC_RANGE_RNEG5(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32FLTRDESC_RANGE_ROFF5(r32)                   _BFGET_(r32,15, 9)
    #define   SET32FLTRDESC_RANGE_ROFF5(r32,v)                 _BFSET_(r32,15, 9,v)
    #define   GET16FLTRDESC_RANGE_ROFF5(r16)                   _BFGET_(r16,15, 9)
    #define   SET16FLTRDESC_RANGE_ROFF5(r16,v)                 _BFSET_(r16,15, 9,v)

    #define   GET32FLTRDESC_RANGE_RNEG6(r32)                   _BFGET_(r32,16,16)
    #define   SET32FLTRDESC_RANGE_RNEG6(r32,v)                 _BFSET_(r32,16,16,v)
    #define   GET16FLTRDESC_RANGE_RNEG6(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16FLTRDESC_RANGE_RNEG6(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32FLTRDESC_RANGE_ROFF6(r32)                   _BFGET_(r32,23,17)
    #define   SET32FLTRDESC_RANGE_ROFF6(r32,v)                 _BFSET_(r32,23,17,v)
    #define   GET16FLTRDESC_RANGE_ROFF6(r16)                   _BFGET_(r16, 7, 1)
    #define   SET16FLTRDESC_RANGE_ROFF6(r16,v)                 _BFSET_(r16, 7, 1,v)

    #define   GET32FLTRDESC_RANGE_RNEG7(r32)                   _BFGET_(r32,24,24)
    #define   SET32FLTRDESC_RANGE_RNEG7(r32,v)                 _BFSET_(r32,24,24,v)
    #define   GET16FLTRDESC_RANGE_RNEG7(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16FLTRDESC_RANGE_RNEG7(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32FLTRDESC_RANGE_ROFF7(r32)                   _BFGET_(r32,31,25)
    #define   SET32FLTRDESC_RANGE_ROFF7(r32,v)                 _BFSET_(r32,31,25,v)
    #define   GET16FLTRDESC_RANGE_ROFF7(r16)                   _BFGET_(r16,15, 9)
    #define   SET16FLTRDESC_RANGE_ROFF7(r16,v)                 _BFSET_(r16,15, 9,v)

    #define     w32FLTRDESC_RANGE2                             {\
            UNSG32 uRANGE_RNEG4                                :  1;\
            UNSG32 uRANGE_ROFF4                                :  7;\
            UNSG32 uRANGE_RNEG5                                :  1;\
            UNSG32 uRANGE_ROFF5                                :  7;\
            UNSG32 uRANGE_RNEG6                                :  1;\
            UNSG32 uRANGE_ROFF6                                :  7;\
            UNSG32 uRANGE_RNEG7                                :  1;\
            UNSG32 uRANGE_ROFF7                                :  7;\
          }
    union { UNSG32 u32FLTRDESC_RANGE2;
            struct w32FLTRDESC_RANGE2;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FLTRDESC_COFF_COFF0(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_COFF_COFF0(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_COFF                               {\
            UNSG32 uCOFF_COFF0                                 : 32;\
          }
    union { UNSG32 u32FLTRDESC_COFF;
            struct w32FLTRDESC_COFF;
          };
    #define   GET32FLTRDESC_COFF_COFF1(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_COFF_COFF1(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_COFF1                              {\
            UNSG32 uCOFF_COFF1                                 : 32;\
          }
    union { UNSG32 u32FLTRDESC_COFF1;
            struct w32FLTRDESC_COFF1;
          };
    #define   GET32FLTRDESC_COFF_COFF2(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_COFF_COFF2(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_COFF2                              {\
            UNSG32 uCOFF_COFF2                                 : 32;\
          }
    union { UNSG32 u32FLTRDESC_COFF2;
            struct w32FLTRDESC_COFF2;
          };
    #define   GET32FLTRDESC_COFF_COFF3(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_COFF_COFF3(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_COFF3                              {\
            UNSG32 uCOFF_COFF3                                 : 32;\
          }
    union { UNSG32 u32FLTRDESC_COFF3;
            struct w32FLTRDESC_COFF3;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FLTRDESC_NEG_NEG0(r32)                      _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_NEG_NEG0(r32,v)                    _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_NEG                                {\
            UNSG32 uNEG_NEG0                                   : 32;\
          }
    union { UNSG32 u32FLTRDESC_NEG;
            struct w32FLTRDESC_NEG;
          };
    #define   GET32FLTRDESC_NEG_NEG1(r32)                      _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_NEG_NEG1(r32,v)                    _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_NEG1                               {\
            UNSG32 uNEG_NEG1                                   : 32;\
          }
    union { UNSG32 u32FLTRDESC_NEG1;
            struct w32FLTRDESC_NEG1;
          };
    #define   GET32FLTRDESC_NEG_NEG2(r32)                      _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_NEG_NEG2(r32,v)                    _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_NEG2                               {\
            UNSG32 uNEG_NEG2                                   : 32;\
          }
    union { UNSG32 u32FLTRDESC_NEG2;
            struct w32FLTRDESC_NEG2;
          };
    #define   GET32FLTRDESC_NEG_NEG3(r32)                      _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_NEG_NEG3(r32,v)                    _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_NEG3                               {\
            UNSG32 uNEG_NEG3                                   : 32;\
          }
    union { UNSG32 u32FLTRDESC_NEG3;
            struct w32FLTRDESC_NEG3;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FLTRDESC_MASK_MASK0(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_MASK_MASK0(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_MASK                               {\
            UNSG32 uMASK_MASK0                                 : 32;\
          }
    union { UNSG32 u32FLTRDESC_MASK;
            struct w32FLTRDESC_MASK;
          };
    #define   GET32FLTRDESC_MASK_MASK1(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_MASK_MASK1(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_MASK1                              {\
            UNSG32 uMASK_MASK1                                 : 32;\
          }
    union { UNSG32 u32FLTRDESC_MASK1;
            struct w32FLTRDESC_MASK1;
          };
    #define   GET32FLTRDESC_MASK_MASK2(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_MASK_MASK2(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_MASK2                              {\
            UNSG32 uMASK_MASK2                                 : 32;\
          }
    union { UNSG32 u32FLTRDESC_MASK2;
            struct w32FLTRDESC_MASK2;
          };
    #define   GET32FLTRDESC_MASK_MASK3(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FLTRDESC_MASK_MASK3(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FLTRDESC_MASK3                              {\
            UNSG32 uMASK_MASK3                                 : 32;\
          }
    union { UNSG32 u32FLTRDESC_MASK3;
            struct w32FLTRDESC_MASK3;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FLTRDESC;

    typedef union  T32FLTRDESC_HEADER
          { UNSG32 u32;
            struct w32FLTRDESC_HEADER;
                 } T32FLTRDESC_HEADER;
    typedef union  T32FLTRDESC_RANGE
          { UNSG32 u32;
            struct w32FLTRDESC_RANGE;
                 } T32FLTRDESC_RANGE;
    typedef union  T32FLTRDESC_RANGE1
          { UNSG32 u32;
            struct w32FLTRDESC_RANGE1;
                 } T32FLTRDESC_RANGE1;
    typedef union  T32FLTRDESC_RANGE2
          { UNSG32 u32;
            struct w32FLTRDESC_RANGE2;
                 } T32FLTRDESC_RANGE2;
    typedef union  T32FLTRDESC_COFF
          { UNSG32 u32;
            struct w32FLTRDESC_COFF;
                 } T32FLTRDESC_COFF;
    typedef union  T32FLTRDESC_COFF1
          { UNSG32 u32;
            struct w32FLTRDESC_COFF1;
                 } T32FLTRDESC_COFF1;
    typedef union  T32FLTRDESC_COFF2
          { UNSG32 u32;
            struct w32FLTRDESC_COFF2;
                 } T32FLTRDESC_COFF2;
    typedef union  T32FLTRDESC_COFF3
          { UNSG32 u32;
            struct w32FLTRDESC_COFF3;
                 } T32FLTRDESC_COFF3;
    typedef union  T32FLTRDESC_NEG
          { UNSG32 u32;
            struct w32FLTRDESC_NEG;
                 } T32FLTRDESC_NEG;
    typedef union  T32FLTRDESC_NEG1
          { UNSG32 u32;
            struct w32FLTRDESC_NEG1;
                 } T32FLTRDESC_NEG1;
    typedef union  T32FLTRDESC_NEG2
          { UNSG32 u32;
            struct w32FLTRDESC_NEG2;
                 } T32FLTRDESC_NEG2;
    typedef union  T32FLTRDESC_NEG3
          { UNSG32 u32;
            struct w32FLTRDESC_NEG3;
                 } T32FLTRDESC_NEG3;
    typedef union  T32FLTRDESC_MASK
          { UNSG32 u32;
            struct w32FLTRDESC_MASK;
                 } T32FLTRDESC_MASK;
    typedef union  T32FLTRDESC_MASK1
          { UNSG32 u32;
            struct w32FLTRDESC_MASK1;
                 } T32FLTRDESC_MASK1;
    typedef union  T32FLTRDESC_MASK2
          { UNSG32 u32;
            struct w32FLTRDESC_MASK2;
                 } T32FLTRDESC_MASK2;
    typedef union  T32FLTRDESC_MASK3
          { UNSG32 u32;
            struct w32FLTRDESC_MASK3;
                 } T32FLTRDESC_MASK3;
    ///////////////////////////////////////////////////////////

    typedef union  TFLTRDESC_HEADER
          { UNSG32 u32[1];
            struct {
            struct w32FLTRDESC_HEADER;
                   };
                 } TFLTRDESC_HEADER;
    typedef union  TFLTRDESC_RANGE
          { UNSG32 u32[3];
            struct {
            struct w32FLTRDESC_RANGE;
            struct w32FLTRDESC_RANGE1;
            struct w32FLTRDESC_RANGE2;
                   };
                 } TFLTRDESC_RANGE;
    typedef union  TFLTRDESC_COFF
          { UNSG32 u32[4];
            struct {
            struct w32FLTRDESC_COFF;
            struct w32FLTRDESC_COFF1;
            struct w32FLTRDESC_COFF2;
            struct w32FLTRDESC_COFF3;
                   };
                 } TFLTRDESC_COFF;
    typedef union  TFLTRDESC_NEG
          { UNSG32 u32[4];
            struct {
            struct w32FLTRDESC_NEG;
            struct w32FLTRDESC_NEG1;
            struct w32FLTRDESC_NEG2;
            struct w32FLTRDESC_NEG3;
                   };
                 } TFLTRDESC_NEG;
    typedef union  TFLTRDESC_MASK
          { UNSG32 u32[4];
            struct {
            struct w32FLTRDESC_MASK;
            struct w32FLTRDESC_MASK1;
            struct w32FLTRDESC_MASK2;
            struct w32FLTRDESC_MASK3;
                   };
                 } TFLTRDESC_MASK;

    ///////////////////////////////////////////////////////////
     SIGN32 FLTRDESC_drvrd(SIE_FLTRDESC *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FLTRDESC_drvwr(SIE_FLTRDESC *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FLTRDESC_reset(SIE_FLTRDESC *p);
     SIGN32 FLTRDESC_cmp  (SIE_FLTRDESC *p, SIE_FLTRDESC *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FLTRDESC_check(p,pie,pfx,hLOG) FLTRDESC_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FLTRDESC_print(p,    pfx,hLOG) FLTRDESC_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FLTRDESC
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RNG                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 8  rate                      0x1
///                                    ###
///                                    * RNG bitrate = 12.5 * rate Kbps
///                                    * DV-FR-CNR ( 1 to 255)
///                                    ###
///               %unsigned 1  crc                       0x1
///                                    ###
///                                    * 1: enable CRC
///                                    * 0: disable CRC for testing
///                                    * DV-FR-CR(0-1)
///                                    ###
///               %%        23         # Stuffing bits...
///     @ 0x00004                      (RW)
///               %unsigned 1  ready                     0x0
///                                    ###
///                                    * H/W indicates random data ready by set ready to 1
///                                    * S/W write 0 to it after read the random data
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00008                      (R-)
///               %unsigned 32 data                      0x0
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      12B, bits:      42b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RNG
#define h_RNG (){}

    #define     BA_RNG_rate                                    0x0000
    #define     B16RNG_rate                                    0x0000
    #define   LSb32RNG_rate                                       0
    #define   LSb16RNG_rate                                       0
    #define       bRNG_rate                                    8
    #define   MSK32RNG_rate                                       0x000000FF

    #define     BA_RNG_crc                                     0x0001
    #define     B16RNG_crc                                     0x0000
    #define   LSb32RNG_crc                                        8
    #define   LSb16RNG_crc                                        8
    #define       bRNG_crc                                     1
    #define   MSK32RNG_crc                                        0x00000100
    ///////////////////////////////////////////////////////////

    #define     BA_RNG_ready                                   0x0004
    #define     B16RNG_ready                                   0x0004
    #define   LSb32RNG_ready                                      0
    #define   LSb16RNG_ready                                      0
    #define       bRNG_ready                                   1
    #define   MSK32RNG_ready                                      0x00000001
    ///////////////////////////////////////////////////////////

    #define     BA_RNG_data                                    0x0008
    #define     B16RNG_data                                    0x0008
    #define   LSb32RNG_data                                       0
    #define   LSb16RNG_data                                       0
    #define       bRNG_data                                    32
    #define   MSK32RNG_data                                       0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RNG {
    ///////////////////////////////////////////////////////////
    #define   GET32RNG_rate(r32)                               _BFGET_(r32, 7, 0)
    #define   SET32RNG_rate(r32,v)                             _BFSET_(r32, 7, 0,v)
    #define   GET16RNG_rate(r16)                               _BFGET_(r16, 7, 0)
    #define   SET16RNG_rate(r16,v)                             _BFSET_(r16, 7, 0,v)

    #define   GET32RNG_crc(r32)                                _BFGET_(r32, 8, 8)
    #define   SET32RNG_crc(r32,v)                              _BFSET_(r32, 8, 8,v)
    #define   GET16RNG_crc(r16)                                _BFGET_(r16, 8, 8)
    #define   SET16RNG_crc(r16,v)                              _BFSET_(r16, 8, 8,v)

            UNSG32 u_rate                                      :  8;
            UNSG32 u_crc                                       :  1;
            UNSG32 RSVDx0_b9                                   : 23;
    ///////////////////////////////////////////////////////////
    #define   GET32RNG_ready(r32)                              _BFGET_(r32, 0, 0)
    #define   SET32RNG_ready(r32,v)                            _BFSET_(r32, 0, 0,v)
    #define   GET16RNG_ready(r16)                              _BFGET_(r16, 0, 0)
    #define   SET16RNG_ready(r16,v)                            _BFSET_(r16, 0, 0,v)

            UNSG32 u_ready                                     :  1;
            UNSG32 RSVDx4_b1                                   : 31;
    ///////////////////////////////////////////////////////////
    #define   GET32RNG_data(r32)                               _BFGET_(r32,31, 0)
    #define   SET32RNG_data(r32,v)                             _BFSET_(r32,31, 0,v)

            UNSG32 u_data                                      : 32;
    ///////////////////////////////////////////////////////////
    } SIE_RNG;

    ///////////////////////////////////////////////////////////
     SIGN32 RNG_drvrd(SIE_RNG *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RNG_drvwr(SIE_RNG *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RNG_reset(SIE_RNG *p);
     SIGN32 RNG_cmp  (SIE_RNG *p, SIE_RNG *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RNG_check(p,pie,pfx,hLOG) RNG_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RNG_print(p,    pfx,hLOG) RNG_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RNG
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE OTP                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 1  rstb                      0x1
///               %unsigned 1  csb                       0x1
///               %unsigned 1  pgm                       0x0
///               %unsigned 1  sclk                      0x0
///               %unsigned 1  wprot                     0x1
///                                    ###
///                                    * please refer to OTP Macro Document regarding to programming timing
///                                    * DV-FC
///                                    ###
///               %%        27         # Stuffing bits...
///     @ 0x00004                      (R-)
///               %unsigned 32 data8                     0x1
///                                    ###
///                                    * security fuse bit
///                                    ###
///               %unsigned 32 data7                     0x1
///               %unsigned 32 data6                     0x1
///               %unsigned 32 data5                     0x1
///               %unsigned 32 data4                     0x1
///               %unsigned 32 data3                     0x1
///               %unsigned 32 data2                     0x1
///               %unsigned 32 data1                     0x1
///               %unsigned 32 data0                     0x1
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      40B, bits:     293b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_OTP
#define h_OTP (){}

    #define     BA_OTP_rstb                                    0x0000
    #define     B16OTP_rstb                                    0x0000
    #define   LSb32OTP_rstb                                       0
    #define   LSb16OTP_rstb                                       0
    #define       bOTP_rstb                                    1
    #define   MSK32OTP_rstb                                       0x00000001

    #define     BA_OTP_csb                                     0x0000
    #define     B16OTP_csb                                     0x0000
    #define   LSb32OTP_csb                                        1
    #define   LSb16OTP_csb                                        1
    #define       bOTP_csb                                     1
    #define   MSK32OTP_csb                                        0x00000002

    #define     BA_OTP_pgm                                     0x0000
    #define     B16OTP_pgm                                     0x0000
    #define   LSb32OTP_pgm                                        2
    #define   LSb16OTP_pgm                                        2
    #define       bOTP_pgm                                     1
    #define   MSK32OTP_pgm                                        0x00000004

    #define     BA_OTP_sclk                                    0x0000
    #define     B16OTP_sclk                                    0x0000
    #define   LSb32OTP_sclk                                       3
    #define   LSb16OTP_sclk                                       3
    #define       bOTP_sclk                                    1
    #define   MSK32OTP_sclk                                       0x00000008

    #define     BA_OTP_wprot                                   0x0000
    #define     B16OTP_wprot                                   0x0000
    #define   LSb32OTP_wprot                                      4
    #define   LSb16OTP_wprot                                      4
    #define       bOTP_wprot                                   1
    #define   MSK32OTP_wprot                                      0x00000010
    ///////////////////////////////////////////////////////////

    #define     BA_OTP_data8                                   0x0004
    #define     B16OTP_data8                                   0x0004
    #define   LSb32OTP_data8                                      0
    #define   LSb16OTP_data8                                      0
    #define       bOTP_data8                                   32
    #define   MSK32OTP_data8                                      0xFFFFFFFF

    #define     BA_OTP_data7                                   0x0008
    #define     B16OTP_data7                                   0x0008
    #define   LSb32OTP_data7                                      0
    #define   LSb16OTP_data7                                      0
    #define       bOTP_data7                                   32
    #define   MSK32OTP_data7                                      0xFFFFFFFF

    #define     BA_OTP_data6                                   0x000C
    #define     B16OTP_data6                                   0x000C
    #define   LSb32OTP_data6                                      0
    #define   LSb16OTP_data6                                      0
    #define       bOTP_data6                                   32
    #define   MSK32OTP_data6                                      0xFFFFFFFF

    #define     BA_OTP_data5                                   0x0010
    #define     B16OTP_data5                                   0x0010
    #define   LSb32OTP_data5                                      0
    #define   LSb16OTP_data5                                      0
    #define       bOTP_data5                                   32
    #define   MSK32OTP_data5                                      0xFFFFFFFF

    #define     BA_OTP_data4                                   0x0014
    #define     B16OTP_data4                                   0x0014
    #define   LSb32OTP_data4                                      0
    #define   LSb16OTP_data4                                      0
    #define       bOTP_data4                                   32
    #define   MSK32OTP_data4                                      0xFFFFFFFF

    #define     BA_OTP_data3                                   0x0018
    #define     B16OTP_data3                                   0x0018
    #define   LSb32OTP_data3                                      0
    #define   LSb16OTP_data3                                      0
    #define       bOTP_data3                                   32
    #define   MSK32OTP_data3                                      0xFFFFFFFF

    #define     BA_OTP_data2                                   0x001C
    #define     B16OTP_data2                                   0x001C
    #define   LSb32OTP_data2                                      0
    #define   LSb16OTP_data2                                      0
    #define       bOTP_data2                                   32
    #define   MSK32OTP_data2                                      0xFFFFFFFF

    #define     BA_OTP_data1                                   0x0020
    #define     B16OTP_data1                                   0x0020
    #define   LSb32OTP_data1                                      0
    #define   LSb16OTP_data1                                      0
    #define       bOTP_data1                                   32
    #define   MSK32OTP_data1                                      0xFFFFFFFF

    #define     BA_OTP_data0                                   0x0024
    #define     B16OTP_data0                                   0x0024
    #define   LSb32OTP_data0                                      0
    #define   LSb16OTP_data0                                      0
    #define       bOTP_data0                                   32
    #define   MSK32OTP_data0                                      0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_OTP {
    ///////////////////////////////////////////////////////////
    #define   GET32OTP_rstb(r32)                               _BFGET_(r32, 0, 0)
    #define   SET32OTP_rstb(r32,v)                             _BFSET_(r32, 0, 0,v)
    #define   GET16OTP_rstb(r16)                               _BFGET_(r16, 0, 0)
    #define   SET16OTP_rstb(r16,v)                             _BFSET_(r16, 0, 0,v)

    #define   GET32OTP_csb(r32)                                _BFGET_(r32, 1, 1)
    #define   SET32OTP_csb(r32,v)                              _BFSET_(r32, 1, 1,v)
    #define   GET16OTP_csb(r16)                                _BFGET_(r16, 1, 1)
    #define   SET16OTP_csb(r16,v)                              _BFSET_(r16, 1, 1,v)

    #define   GET32OTP_pgm(r32)                                _BFGET_(r32, 2, 2)
    #define   SET32OTP_pgm(r32,v)                              _BFSET_(r32, 2, 2,v)
    #define   GET16OTP_pgm(r16)                                _BFGET_(r16, 2, 2)
    #define   SET16OTP_pgm(r16,v)                              _BFSET_(r16, 2, 2,v)

    #define   GET32OTP_sclk(r32)                               _BFGET_(r32, 3, 3)
    #define   SET32OTP_sclk(r32,v)                             _BFSET_(r32, 3, 3,v)
    #define   GET16OTP_sclk(r16)                               _BFGET_(r16, 3, 3)
    #define   SET16OTP_sclk(r16,v)                             _BFSET_(r16, 3, 3,v)

    #define   GET32OTP_wprot(r32)                              _BFGET_(r32, 4, 4)
    #define   SET32OTP_wprot(r32,v)                            _BFSET_(r32, 4, 4,v)
    #define   GET16OTP_wprot(r16)                              _BFGET_(r16, 4, 4)
    #define   SET16OTP_wprot(r16,v)                            _BFSET_(r16, 4, 4,v)

            UNSG32 u_rstb                                      :  1;
            UNSG32 u_csb                                       :  1;
            UNSG32 u_pgm                                       :  1;
            UNSG32 u_sclk                                      :  1;
            UNSG32 u_wprot                                     :  1;
            UNSG32 RSVDx0_b5                                   : 27;
    ///////////////////////////////////////////////////////////
    #define   GET32OTP_data8(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data8(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data8                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data7(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data7(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data7                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data6(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data6(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data6                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data5(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data5(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data5                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data4(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data4(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data4                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data3(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data3(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data3                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data2(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data2(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data2                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data1(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data1(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data1                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data0(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data0(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data0                                     : 32;
    ///////////////////////////////////////////////////////////
    } SIE_OTP;

    ///////////////////////////////////////////////////////////
     SIGN32 OTP_drvrd(SIE_OTP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 OTP_drvwr(SIE_OTP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void OTP_reset(SIE_OTP *p);
     SIGN32 OTP_cmp  (SIE_OTP *p, SIE_OTP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define OTP_check(p,pie,pfx,hLOG) OTP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define OTP_print(p,    pfx,hLOG) OTP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: OTP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE a64Par                  biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 4  s0                        0x0
///                                    ###
///                                    * address for source operand 0
///                                    * 4
///                                    * s1
///                                    * 0
///                                    * address for source operand 1
///                                    * 4
///                                    * s2
///                                    * 0
///                                    * for DRM A64 Instructions, operand2 is not used, this field is used for SIMD pipeline enable & table address base
///                                    * S2[1:0] = tableAddress[9:8];
///                                    * S2[3:2]=0: SIMD pipeline 1 enbled
///                                    * S2[3:2]=1: SIMD pipeline 2 enbled
///                                    * S2[3:2]=2: SIMD pipeline 3 enbled
///                                    * S2[3:2]=3: SIMD pipeline 4 enbled
///                                    * Currently only SIMP pipeline 1 and 2 are implemented
///                                    * 4
///                                    * d0
///                                    * 0
///                                    * address for destination operand 1
///                                    ###
///               %%        28         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       4b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_a64Par
#define h_a64Par (){}

    #define     BA_a64Par_s0                                   0x0000
    #define     B16a64Par_s0                                   0x0000
    #define   LSb32a64Par_s0                                      0
    #define   LSb16a64Par_s0                                      0
    #define       ba64Par_s0                                   4
    #define   MSK32a64Par_s0                                      0x0000000F
    ///////////////////////////////////////////////////////////

    typedef struct SIE_a64Par {
    ///////////////////////////////////////////////////////////
    #define   GET32a64Par_s0(r32)                              _BFGET_(r32, 3, 0)
    #define   SET32a64Par_s0(r32,v)                            _BFSET_(r32, 3, 0,v)
    #define   GET16a64Par_s0(r16)                              _BFGET_(r16, 3, 0)
    #define   SET16a64Par_s0(r16,v)                            _BFSET_(r16, 3, 0,v)

            UNSG32 u_s0                                        :  4;
            UNSG32 RSVDx0_b4                                   : 28;
    ///////////////////////////////////////////////////////////
    } SIE_a64Par;

    ///////////////////////////////////////////////////////////
     SIGN32 a64Par_drvrd(SIE_a64Par *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 a64Par_drvwr(SIE_a64Par *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void a64Par_reset(SIE_a64Par *p);
     SIGN32 a64Par_cmp  (SIE_a64Par *p, SIE_a64Par *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define a64Par_check(p,pie,pfx,hLOG) a64Par_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define a64Par_print(p,    pfx,hLOG) a64Par_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: a64Par
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DRMPUSHID               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 2  OP                        0x0
///                                    : PUSH                      0x0
///                                    : RSV                       0x1
///                                    : TBINIT                    0x2
///                                    : EXE0                      0x3
///               %unsigned 4  OPCSEL                    
///                                    ###
///                                    * for Exec instruction, which byte of the cmd64(“xT” register) to select as the opcode for the DRM instruction
///                                    * for TBINIT instruction, this is the write enable to 4 table SRAM3, 2, 1, 0
///                                    ###
///               %%        26         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       6b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DRMPUSHID
#define h_DRMPUSHID (){}

    #define     BA_DRMPUSHID_OP                                0x0000
    #define     B16DRMPUSHID_OP                                0x0000
    #define   LSb32DRMPUSHID_OP                                   0
    #define   LSb16DRMPUSHID_OP                                   0
    #define       bDRMPUSHID_OP                                2
    #define   MSK32DRMPUSHID_OP                                   0x00000003
    #define        DRMPUSHID_OP_PUSH                                        0x0
    #define        DRMPUSHID_OP_RSV                                         0x1
    #define        DRMPUSHID_OP_TBINIT                                      0x2
    #define        DRMPUSHID_OP_EXE0                                        0x3

    #define     BA_DRMPUSHID_OPCSEL                            0x0000
    #define     B16DRMPUSHID_OPCSEL                            0x0000
    #define   LSb32DRMPUSHID_OPCSEL                               2
    #define   LSb16DRMPUSHID_OPCSEL                               2
    #define       bDRMPUSHID_OPCSEL                            4
    #define   MSK32DRMPUSHID_OPCSEL                               0x0000003C
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DRMPUSHID {
    ///////////////////////////////////////////////////////////
    #define   GET32DRMPUSHID_OP(r32)                           _BFGET_(r32, 1, 0)
    #define   SET32DRMPUSHID_OP(r32,v)                         _BFSET_(r32, 1, 0,v)
    #define   GET16DRMPUSHID_OP(r16)                           _BFGET_(r16, 1, 0)
    #define   SET16DRMPUSHID_OP(r16,v)                         _BFSET_(r16, 1, 0,v)

    #define   GET32DRMPUSHID_OPCSEL(r32)                       _BFGET_(r32, 5, 2)
    #define   SET32DRMPUSHID_OPCSEL(r32,v)                     _BFSET_(r32, 5, 2,v)
    #define   GET16DRMPUSHID_OPCSEL(r16)                       _BFGET_(r16, 5, 2)
    #define   SET16DRMPUSHID_OPCSEL(r16,v)                     _BFSET_(r16, 5, 2,v)

            UNSG32 u_OP                                        :  2;
            UNSG32 u_OPCSEL                                    :  4;
            UNSG32 RSVDx0_b6                                   : 26;
    ///////////////////////////////////////////////////////////
    } SIE_DRMPUSHID;

    ///////////////////////////////////////////////////////////
     SIGN32 DRMPUSHID_drvrd(SIE_DRMPUSHID *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DRMPUSHID_drvwr(SIE_DRMPUSHID *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DRMPUSHID_reset(SIE_DRMPUSHID *p);
     SIGN32 DRMPUSHID_cmp  (SIE_DRMPUSHID *p, SIE_DRMPUSHID *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DRMPUSHID_check(p,pie,pfx,hLOG) DRMPUSHID_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DRMPUSHID_print(p,    pfx,hLOG) DRMPUSHID_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DRMPUSHID
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DRMA64CTL               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 1  s0selLUT                  0x0
///                                    ###
///                                    * 0: RF, 1: {LUT1:LUT0}
///                                    ###
///               %unsigned 1  s1selLUT                  0x0
///                                    ###
///                                    * 0:RF, 1: LUT
///                                    ###
///               %unsigned 2  s1LUTsrc                  
///                                    ###
///                                    * select 1 of 4 LUT data
///                                    * 0: {LUT1,0}
///                                    * 1:{LUT0,1}
///                                    * 2:{LUT3,2}
///                                    * 3:{LUT2,3}
///                                    ###
///               %unsigned 8  OPC                       0x0
///                                    : PUSH                      0x0
///                                    : XORQ                      0x1
///                                    : ORQ                       0x2
///                                    : ANDQ                      0x3
///                                    : PUNPCKL8                  0x4
///                                    : PUNPCKH8                  0x5
///                                    : SWPQ32                    0x6
///                                    : ROLQ32_1                  0x7
///                                    : ROLQ32_2                  0x8
///                                    : DESIP                     0x9
///                                    : DESKIP                    0xA
///                                    : DESDFIP                   0xB
///                                    : DESKP                     0xC
///                                    : XORDESDP                  0xD
///                                    : LSRXORQ32_1               0xE
///                                    : LSRXORQ32_3               0xF
///                                    : ROLXORQ32_8              0x10
///                                    : PUNPCKH16                0x11
///                                    : PUNPCKL32                0x12
///                                    : PUNPCKH32                0x13
///                                    : ROLXORQ32_9              0x14
///                                    : ROLXORQ32_16             0x15
///                                    : ROLXORQ32_22             0x16
///                                    : ROLXORQ32_30             0x17
///                                    : LSRXORQ32_7              0x18
///                                    : LSRXORQ32_8              0x19
///                                    : RORQ28_1                 0x1A
///                                    : RORQ28_2                 0x1B
///                                    : RORQ56_17                0x1C
///                                    : ROLQ32_3                 0x1D
///                                    : ROLXORQ32_4              0x1E
///                                    : SLQ32_24                 0x1F
///                                    : AESTS                    0x20
///                                    : ROLQ32_5                 0x21
///                                    : MP2CRC                   0x22
///                                                 ###
///                                                 * MPEG-2 CRC, generation function:
///                                                 * x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 +x5 +x4 +x2 +x +1
///                                                 ###
///                                    : ROLQ32_30                0x23
///                                    : C2PERM                   0x24
///                                    : ADDQ32                   0x25
///                                    : SUBQ32                   0x26
///                                    : MULQ32L                  0x27
///                                    : PLUTXOR32H               0x48
///                                    : PLUTXOR32L               0x40
///                                    : LUTXOR32_0               0x41
///                                    : LUTXOR32_1               0x42
///                                    : LUTXOR32_2               0x43
///                                    : LUTXOR32_3               0x44
///               %unsigned 8  latency                   0x0
///                                    ###
///                                    * latency of current instruction
///                                    ###
///               %unsigned 1  WB                        0x0
///                                    ###
///                                    * write back enable
///                                    ###
///               %unsigned 1  LUTASelP16                0x0
///                                    ###
///                                    * 0: from S1
///                                    * 1: from p16
///                                    ###
///               %unsigned 4  LUTWE                     0x0
///                                    ###
///                                    * write enable for LUT
///                                    ###
///               %unsigned 3  MCPSEL                    0x0
///                                    ###
///                                    * selects which multi-cycle path for ALU64 Data
///                                    ###
///               %%        3          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      29b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DRMA64CTL
#define h_DRMA64CTL (){}

    #define     BA_DRMA64CTL_s0selLUT                          0x0000
    #define     B16DRMA64CTL_s0selLUT                          0x0000
    #define   LSb32DRMA64CTL_s0selLUT                             0
    #define   LSb16DRMA64CTL_s0selLUT                             0
    #define       bDRMA64CTL_s0selLUT                          1
    #define   MSK32DRMA64CTL_s0selLUT                             0x00000001

    #define     BA_DRMA64CTL_s1selLUT                          0x0000
    #define     B16DRMA64CTL_s1selLUT                          0x0000
    #define   LSb32DRMA64CTL_s1selLUT                             1
    #define   LSb16DRMA64CTL_s1selLUT                             1
    #define       bDRMA64CTL_s1selLUT                          1
    #define   MSK32DRMA64CTL_s1selLUT                             0x00000002

    #define     BA_DRMA64CTL_s1LUTsrc                          0x0000
    #define     B16DRMA64CTL_s1LUTsrc                          0x0000
    #define   LSb32DRMA64CTL_s1LUTsrc                             2
    #define   LSb16DRMA64CTL_s1LUTsrc                             2
    #define       bDRMA64CTL_s1LUTsrc                          2
    #define   MSK32DRMA64CTL_s1LUTsrc                             0x0000000C

    #define     BA_DRMA64CTL_OPC                               0x0000
    #define     B16DRMA64CTL_OPC                               0x0000
    #define   LSb32DRMA64CTL_OPC                                  4
    #define   LSb16DRMA64CTL_OPC                                  4
    #define       bDRMA64CTL_OPC                               8
    #define   MSK32DRMA64CTL_OPC                                  0x00000FF0
    #define        DRMA64CTL_OPC_PUSH                                       0x0
    #define        DRMA64CTL_OPC_XORQ                                       0x1
    #define        DRMA64CTL_OPC_ORQ                                        0x2
    #define        DRMA64CTL_OPC_ANDQ                                       0x3
    #define        DRMA64CTL_OPC_PUNPCKL8                                   0x4
    #define        DRMA64CTL_OPC_PUNPCKH8                                   0x5
    #define        DRMA64CTL_OPC_SWPQ32                                     0x6
    #define        DRMA64CTL_OPC_ROLQ32_1                                   0x7
    #define        DRMA64CTL_OPC_ROLQ32_2                                   0x8
    #define        DRMA64CTL_OPC_DESIP                                      0x9
    #define        DRMA64CTL_OPC_DESKIP                                     0xA
    #define        DRMA64CTL_OPC_DESDFIP                                    0xB
    #define        DRMA64CTL_OPC_DESKP                                      0xC
    #define        DRMA64CTL_OPC_XORDESDP                                   0xD
    #define        DRMA64CTL_OPC_LSRXORQ32_1                                0xE
    #define        DRMA64CTL_OPC_LSRXORQ32_3                                0xF
    #define        DRMA64CTL_OPC_ROLXORQ32_8                                0x10
    #define        DRMA64CTL_OPC_PUNPCKH16                                  0x11
    #define        DRMA64CTL_OPC_PUNPCKL32                                  0x12
    #define        DRMA64CTL_OPC_PUNPCKH32                                  0x13
    #define        DRMA64CTL_OPC_ROLXORQ32_9                                0x14
    #define        DRMA64CTL_OPC_ROLXORQ32_16                               0x15
    #define        DRMA64CTL_OPC_ROLXORQ32_22                               0x16
    #define        DRMA64CTL_OPC_ROLXORQ32_30                               0x17
    #define        DRMA64CTL_OPC_LSRXORQ32_7                                0x18
    #define        DRMA64CTL_OPC_LSRXORQ32_8                                0x19
    #define        DRMA64CTL_OPC_RORQ28_1                                   0x1A
    #define        DRMA64CTL_OPC_RORQ28_2                                   0x1B
    #define        DRMA64CTL_OPC_RORQ56_17                                  0x1C
    #define        DRMA64CTL_OPC_ROLQ32_3                                   0x1D
    #define        DRMA64CTL_OPC_ROLXORQ32_4                                0x1E
    #define        DRMA64CTL_OPC_SLQ32_24                                   0x1F
    #define        DRMA64CTL_OPC_AESTS                                      0x20
    #define        DRMA64CTL_OPC_ROLQ32_5                                   0x21
    #define        DRMA64CTL_OPC_MP2CRC                                     0x22
    #define        DRMA64CTL_OPC_ROLQ32_30                                  0x23
    #define        DRMA64CTL_OPC_C2PERM                                     0x24
    #define        DRMA64CTL_OPC_ADDQ32                                     0x25
    #define        DRMA64CTL_OPC_SUBQ32                                     0x26
    #define        DRMA64CTL_OPC_MULQ32L                                    0x27
    #define        DRMA64CTL_OPC_PLUTXOR32H                                 0x48
    #define        DRMA64CTL_OPC_PLUTXOR32L                                 0x40
    #define        DRMA64CTL_OPC_LUTXOR32_0                                 0x41
    #define        DRMA64CTL_OPC_LUTXOR32_1                                 0x42
    #define        DRMA64CTL_OPC_LUTXOR32_2                                 0x43
    #define        DRMA64CTL_OPC_LUTXOR32_3                                 0x44

    #define     BA_DRMA64CTL_latency                           0x0001
    #define     B16DRMA64CTL_latency                           0x0000
    #define   LSb32DRMA64CTL_latency                              12
    #define   LSb16DRMA64CTL_latency                              12
    #define       bDRMA64CTL_latency                           8
    #define   MSK32DRMA64CTL_latency                              0x000FF000

    #define     BA_DRMA64CTL_WB                                0x0002
    #define     B16DRMA64CTL_WB                                0x0002
    #define   LSb32DRMA64CTL_WB                                   20
    #define   LSb16DRMA64CTL_WB                                   4
    #define       bDRMA64CTL_WB                                1
    #define   MSK32DRMA64CTL_WB                                   0x00100000

    #define     BA_DRMA64CTL_LUTASelP16                        0x0002
    #define     B16DRMA64CTL_LUTASelP16                        0x0002
    #define   LSb32DRMA64CTL_LUTASelP16                           21
    #define   LSb16DRMA64CTL_LUTASelP16                           5
    #define       bDRMA64CTL_LUTASelP16                        1
    #define   MSK32DRMA64CTL_LUTASelP16                           0x00200000

    #define     BA_DRMA64CTL_LUTWE                             0x0002
    #define     B16DRMA64CTL_LUTWE                             0x0002
    #define   LSb32DRMA64CTL_LUTWE                                22
    #define   LSb16DRMA64CTL_LUTWE                                6
    #define       bDRMA64CTL_LUTWE                             4
    #define   MSK32DRMA64CTL_LUTWE                                0x03C00000

    #define     BA_DRMA64CTL_MCPSEL                            0x0003
    #define     B16DRMA64CTL_MCPSEL                            0x0002
    #define   LSb32DRMA64CTL_MCPSEL                               26
    #define   LSb16DRMA64CTL_MCPSEL                               10
    #define       bDRMA64CTL_MCPSEL                            3
    #define   MSK32DRMA64CTL_MCPSEL                               0x1C000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DRMA64CTL {
    ///////////////////////////////////////////////////////////
    #define   GET32DRMA64CTL_s0selLUT(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32DRMA64CTL_s0selLUT(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16DRMA64CTL_s0selLUT(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16DRMA64CTL_s0selLUT(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define   GET32DRMA64CTL_s1selLUT(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32DRMA64CTL_s1selLUT(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16DRMA64CTL_s1selLUT(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16DRMA64CTL_s1selLUT(r16,v)                   _BFSET_(r16, 1, 1,v)

    #define   GET32DRMA64CTL_s1LUTsrc(r32)                     _BFGET_(r32, 3, 2)
    #define   SET32DRMA64CTL_s1LUTsrc(r32,v)                   _BFSET_(r32, 3, 2,v)
    #define   GET16DRMA64CTL_s1LUTsrc(r16)                     _BFGET_(r16, 3, 2)
    #define   SET16DRMA64CTL_s1LUTsrc(r16,v)                   _BFSET_(r16, 3, 2,v)

    #define   GET32DRMA64CTL_OPC(r32)                          _BFGET_(r32,11, 4)
    #define   SET32DRMA64CTL_OPC(r32,v)                        _BFSET_(r32,11, 4,v)
    #define   GET16DRMA64CTL_OPC(r16)                          _BFGET_(r16,11, 4)
    #define   SET16DRMA64CTL_OPC(r16,v)                        _BFSET_(r16,11, 4,v)

    #define   GET32DRMA64CTL_latency(r32)                      _BFGET_(r32,19,12)
    #define   SET32DRMA64CTL_latency(r32,v)                    _BFSET_(r32,19,12,v)

    #define   GET32DRMA64CTL_WB(r32)                           _BFGET_(r32,20,20)
    #define   SET32DRMA64CTL_WB(r32,v)                         _BFSET_(r32,20,20,v)
    #define   GET16DRMA64CTL_WB(r16)                           _BFGET_(r16, 4, 4)
    #define   SET16DRMA64CTL_WB(r16,v)                         _BFSET_(r16, 4, 4,v)

    #define   GET32DRMA64CTL_LUTASelP16(r32)                   _BFGET_(r32,21,21)
    #define   SET32DRMA64CTL_LUTASelP16(r32,v)                 _BFSET_(r32,21,21,v)
    #define   GET16DRMA64CTL_LUTASelP16(r16)                   _BFGET_(r16, 5, 5)
    #define   SET16DRMA64CTL_LUTASelP16(r16,v)                 _BFSET_(r16, 5, 5,v)

    #define   GET32DRMA64CTL_LUTWE(r32)                        _BFGET_(r32,25,22)
    #define   SET32DRMA64CTL_LUTWE(r32,v)                      _BFSET_(r32,25,22,v)
    #define   GET16DRMA64CTL_LUTWE(r16)                        _BFGET_(r16, 9, 6)
    #define   SET16DRMA64CTL_LUTWE(r16,v)                      _BFSET_(r16, 9, 6,v)

    #define   GET32DRMA64CTL_MCPSEL(r32)                       _BFGET_(r32,28,26)
    #define   SET32DRMA64CTL_MCPSEL(r32,v)                     _BFSET_(r32,28,26,v)
    #define   GET16DRMA64CTL_MCPSEL(r16)                       _BFGET_(r16,12,10)
    #define   SET16DRMA64CTL_MCPSEL(r16,v)                     _BFSET_(r16,12,10,v)

            UNSG32 u_s0selLUT                                  :  1;
            UNSG32 u_s1selLUT                                  :  1;
            UNSG32 u_s1LUTsrc                                  :  2;
            UNSG32 u_OPC                                       :  8;
            UNSG32 u_latency                                   :  8;
            UNSG32 u_WB                                        :  1;
            UNSG32 u_LUTASelP16                                :  1;
            UNSG32 u_LUTWE                                     :  4;
            UNSG32 u_MCPSEL                                    :  3;
            UNSG32 RSVDx0_b29                                  :  3;
    ///////////////////////////////////////////////////////////
    } SIE_DRMA64CTL;

    ///////////////////////////////////////////////////////////
     SIGN32 DRMA64CTL_drvrd(SIE_DRMA64CTL *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DRMA64CTL_drvwr(SIE_DRMA64CTL *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DRMA64CTL_reset(SIE_DRMA64CTL *p);
     SIGN32 DRMA64CTL_cmp  (SIE_DRMA64CTL *p, SIE_DRMA64CTL *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DRMA64CTL_check(p,pie,pfx,hLOG) DRMA64CTL_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DRMA64CTL_print(p,    pfx,hLOG) DRMA64CTL_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DRMA64CTL
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RAM1WORD                                 (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 32 word                      
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RAM1WORD
#define h_RAM1WORD (){}

    #define     BA_RAM1WORD_word                               0x0000
    #define     B16RAM1WORD_word                               0x0000
    #define   LSb32RAM1WORD_word                                  0
    #define   LSb16RAM1WORD_word                                  0
    #define       bRAM1WORD_word                               32
    #define   MSK32RAM1WORD_word                                  0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RAM1WORD {
    ///////////////////////////////////////////////////////////
    #define   GET32RAM1WORD_word(r32)                          _BFGET_(r32,31, 0)
    #define   SET32RAM1WORD_word(r32,v)                        _BFSET_(r32,31, 0,v)

            UNSG32 u_word                                      : 32;
    ///////////////////////////////////////////////////////////
    } SIE_RAM1WORD;

    ///////////////////////////////////////////////////////////
     SIGN32 RAM1WORD_drvrd(SIE_RAM1WORD *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RAM1WORD_drvwr(SIE_RAM1WORD *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RAM1WORD_reset(SIE_RAM1WORD *p);
     SIGN32 RAM1WORD_cmp  (SIE_RAM1WORD *p, SIE_RAM1WORD *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RAM1WORD_check(p,pie,pfx,hLOG) RAM1WORD_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RAM1WORD_print(p,    pfx,hLOG) RAM1WORD_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RAM1WORD
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RAM2WORD                                 (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 32 wordh                     
///     @ 0x00004                      (P)
///               %unsigned 32 wordl                     
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RAM2WORD
#define h_RAM2WORD (){}

    #define     BA_RAM2WORD_wordh                              0x0000
    #define     B16RAM2WORD_wordh                              0x0000
    #define   LSb32RAM2WORD_wordh                                 0
    #define   LSb16RAM2WORD_wordh                                 0
    #define       bRAM2WORD_wordh                              32
    #define   MSK32RAM2WORD_wordh                                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    #define     BA_RAM2WORD_wordl                              0x0004
    #define     B16RAM2WORD_wordl                              0x0004
    #define   LSb32RAM2WORD_wordl                                 0
    #define   LSb16RAM2WORD_wordl                                 0
    #define       bRAM2WORD_wordl                              32
    #define   MSK32RAM2WORD_wordl                                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RAM2WORD {
    ///////////////////////////////////////////////////////////
    #define   GET32RAM2WORD_wordh(r32)                         _BFGET_(r32,31, 0)
    #define   SET32RAM2WORD_wordh(r32,v)                       _BFSET_(r32,31, 0,v)

            UNSG32 u_wordh                                     : 32;
    ///////////////////////////////////////////////////////////
    #define   GET32RAM2WORD_wordl(r32)                         _BFGET_(r32,31, 0)
    #define   SET32RAM2WORD_wordl(r32,v)                       _BFSET_(r32,31, 0,v)

            UNSG32 u_wordl                                     : 32;
    ///////////////////////////////////////////////////////////
    } SIE_RAM2WORD;

    ///////////////////////////////////////////////////////////
     SIGN32 RAM2WORD_drvrd(SIE_RAM2WORD *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RAM2WORD_drvwr(SIE_RAM2WORD *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RAM2WORD_reset(SIE_RAM2WORD *p);
     SIGN32 RAM2WORD_cmp  (SIE_RAM2WORD *p, SIE_RAM2WORD *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RAM2WORD_check(p,pie,pfx,hLOG) RAM2WORD_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RAM2WORD_print(p,    pfx,hLOG) RAM2WORD_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RAM2WORD
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SFRAM                                    (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 word                 
///               $RAM1WORD            word              REG    [2048]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    8192B, bits:   65536b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SFRAM
#define h_SFRAM (){}

    #define     RA_SFRAM_word                                  0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SFRAM {
    ///////////////////////////////////////////////////////////
              SIE_RAM1WORD                                     ie_word[2048];
    ///////////////////////////////////////////////////////////
    } SIE_SFRAM;

    ///////////////////////////////////////////////////////////
     SIGN32 SFRAM_drvrd(SIE_SFRAM *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SFRAM_drvwr(SIE_SFRAM *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SFRAM_reset(SIE_SFRAM *p);
     SIGN32 SFRAM_cmp  (SIE_SFRAM *p, SIE_SFRAM *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SFRAM_check(p,pie,pfx,hLOG) SFRAM_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SFRAM_print(p,    pfx,hLOG) SFRAM_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SFRAM
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FIGOITCM                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 word                 
///               $RAM1WORD            word              REG    [4096]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:   16384B, bits:  131072b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FIGOITCM
#define h_FIGOITCM (){}

    #define     RA_FIGOITCM_word                               0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FIGOITCM {
    ///////////////////////////////////////////////////////////
              SIE_RAM1WORD                                     ie_word[4096];
    ///////////////////////////////////////////////////////////
    } SIE_FIGOITCM;

    ///////////////////////////////////////////////////////////
     SIGN32 FIGOITCM_drvrd(SIE_FIGOITCM *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FIGOITCM_drvwr(SIE_FIGOITCM *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FIGOITCM_reset(SIE_FIGOITCM *p);
     SIGN32 FIGOITCM_cmp  (SIE_FIGOITCM *p, SIE_FIGOITCM *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FIGOITCM_check(p,pie,pfx,hLOG) FIGOITCM_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FIGOITCM_print(p,    pfx,hLOG) FIGOITCM_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FIGOITCM
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE HBODTCM                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 word                 
///               $RAM2WORD            word              REG    [2048]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:   16384B, bits:  131072b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_HBODTCM
#define h_HBODTCM (){}

    #define     RA_HBODTCM_word                                0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_HBODTCM {
    ///////////////////////////////////////////////////////////
              SIE_RAM2WORD                                     ie_word[2048];
    ///////////////////////////////////////////////////////////
    } SIE_HBODTCM;

    ///////////////////////////////////////////////////////////
     SIGN32 HBODTCM_drvrd(SIE_HBODTCM *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 HBODTCM_drvwr(SIE_HBODTCM *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void HBODTCM_reset(SIE_HBODTCM *p);
     SIGN32 HBODTCM_cmp  (SIE_HBODTCM *p, SIE_HBODTCM *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define HBODTCM_check(p,pie,pfx,hLOG) HBODTCM_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define HBODTCM_print(p,    pfx,hLOG) HBODTCM_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: HBODTCM
////////////////////////////////////////////////////////////


#ifdef __cplusplus
  }
#endif
#pragma  pack()

#endif
//////
/// ENDOFFILE: dmx.h
////////////////////////////////////////////////////////////