/********************************************************************************
 * Marvell GPL License Option
 *
 * If you received this File from Marvell, you may opt to use, redistribute and/or
 * modify this File in accordance with the terms and conditions of the General
 * Public License Version 2, June 1991 (the "GPL License"), a copy of which is
 * available along with the File in the license.txt file or by writing to the Free
 * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
 * on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
 * DISCLAIMED.  The GPL License provides additional details about this warranty
 * disclaimer.
 ******************************************************************************/

//////
/// don't edit! auto-generated by docc: drmdmx.h
////////////////////////////////////////////////////////////
#ifndef drmdmx_h
#define drmdmx_h (){}


#include "ctypes.h"

#pragma pack(1)
#ifdef __cplusplus
  extern "C" {
#endif

#ifndef _DOCC_H_BITOPS_
#define _DOCC_H_BITOPS_ (){}

    #define _bSETMASK_(b)                                      ((b)<32 ? (1<<((b)&31)) : 0)
    #define _NSETMASK_(msb,lsb)                                (_bSETMASK_((msb)+1)-_bSETMASK_(lsb))
    #define _bCLRMASK_(b)                                      (~_bSETMASK_(b))
    #define _NCLRMASK_(msb,lsb)                                (~_NSETMASK_(msb,lsb))
    #define _BFGET_(r,msb,lsb)                                 (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb)))
    #define _BFSET_(r,msb,lsb,v)                               do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0)

#endif


//////
/// 
/// $INTERFACE SemaINTR                                 (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 mask                 (W-)
///               %unsigned 1  empty                     0x0
///                                    ###
///                                    * Enable interrupt on 'empty' condition
///                                    ###
///               %unsigned 1  full                      0x0
///                                    ###
///                                    * Enable interrupt on 'full' condition
///                                    ###
///               %unsigned 1  almostEmpty               0x0
///                                    ###
///                                    * Enable interrupt on 'almostEmpty' condition
///                                    ###
///               %unsigned 1  almostFull                0x0
///                                    ###
///                                    * Enable interrupt on 'almostFull' condition
///                                    ###
///               %%        28         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       4b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaINTR
#define h_SemaINTR (){}

    #define     RA_SemaINTR_mask                               0x0000

    #define     BA_SemaINTR_mask_empty                         0x0000
    #define     B16SemaINTR_mask_empty                         0x0000
    #define   LSb32SemaINTR_mask_empty                            0
    #define   LSb16SemaINTR_mask_empty                            0
    #define       bSemaINTR_mask_empty                         1
    #define   MSK32SemaINTR_mask_empty                            0x00000001

    #define     BA_SemaINTR_mask_full                          0x0000
    #define     B16SemaINTR_mask_full                          0x0000
    #define   LSb32SemaINTR_mask_full                             1
    #define   LSb16SemaINTR_mask_full                             1
    #define       bSemaINTR_mask_full                          1
    #define   MSK32SemaINTR_mask_full                             0x00000002

    #define     BA_SemaINTR_mask_almostEmpty                   0x0000
    #define     B16SemaINTR_mask_almostEmpty                   0x0000
    #define   LSb32SemaINTR_mask_almostEmpty                      2
    #define   LSb16SemaINTR_mask_almostEmpty                      2
    #define       bSemaINTR_mask_almostEmpty                   1
    #define   MSK32SemaINTR_mask_almostEmpty                      0x00000004

    #define     BA_SemaINTR_mask_almostFull                    0x0000
    #define     B16SemaINTR_mask_almostFull                    0x0000
    #define   LSb32SemaINTR_mask_almostFull                       3
    #define   LSb16SemaINTR_mask_almostFull                       3
    #define       bSemaINTR_mask_almostFull                    1
    #define   MSK32SemaINTR_mask_almostFull                       0x00000008
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaINTR {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaINTR_mask_empty(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32SemaINTR_mask_empty(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16SemaINTR_mask_empty(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SemaINTR_mask_empty(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32SemaINTR_mask_full(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32SemaINTR_mask_full(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16SemaINTR_mask_full(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16SemaINTR_mask_full(r16,v)                   _BFSET_(r16, 1, 1,v)

    #define   GET32SemaINTR_mask_almostEmpty(r32)              _BFGET_(r32, 2, 2)
    #define   SET32SemaINTR_mask_almostEmpty(r32,v)            _BFSET_(r32, 2, 2,v)
    #define   GET16SemaINTR_mask_almostEmpty(r16)              _BFGET_(r16, 2, 2)
    #define   SET16SemaINTR_mask_almostEmpty(r16,v)            _BFSET_(r16, 2, 2,v)

    #define   GET32SemaINTR_mask_almostFull(r32)               _BFGET_(r32, 3, 3)
    #define   SET32SemaINTR_mask_almostFull(r32,v)             _BFSET_(r32, 3, 3,v)
    #define   GET16SemaINTR_mask_almostFull(r16)               _BFGET_(r16, 3, 3)
    #define   SET16SemaINTR_mask_almostFull(r16,v)             _BFSET_(r16, 3, 3,v)

    #define     w32SemaINTR_mask                               {\
            UNSG32 umask_empty                                 :  1;\
            UNSG32 umask_full                                  :  1;\
            UNSG32 umask_almostEmpty                           :  1;\
            UNSG32 umask_almostFull                            :  1;\
            UNSG32 RSVDx0_b4                                   : 28;\
          }
    union { UNSG32 u32SemaINTR_mask;
            struct w32SemaINTR_mask;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaINTR;

    typedef union  T32SemaINTR_mask
          { UNSG32 u32;
            struct w32SemaINTR_mask;
                 } T32SemaINTR_mask;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaINTR_mask
          { UNSG32 u32[1];
            struct {
            struct w32SemaINTR_mask;
                   };
                 } TSemaINTR_mask;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaINTR_drvrd(SIE_SemaINTR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaINTR_drvwr(SIE_SemaINTR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaINTR_reset(SIE_SemaINTR *p);
     SIGN32 SemaINTR_cmp  (SIE_SemaINTR *p, SIE_SemaINTR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaINTR_check(p,pie,pfx,hLOG) SemaINTR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaINTR_print(p,    pfx,hLOG) SemaINTR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaINTR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE Semaphore               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (W-)
///               %unsigned 16 DEPTH                     0xF
///                                    ###
///                                    * Max level of semaphore
///                                    * Note: write this register will trigger counter reset
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00004                      (P)
///     # 0x00004 INTR                 
///               $SemaINTR            INTR              REG       [3]
///                                    ###
///                                    * Interrupt mask for 3 CPUs
///                                    ###
///     @ 0x00010 mask                 (W-)
///               %unsigned 1  full                      0x0
///               %unsigned 1  emp                       0x0
///                                    ###
///                                    * When full bit is set to one, to the producer, the semaphore will never be full, so that the producer will never be blocked.
///                                    * When emp bit is set to one, to the consumer, the semaphore will never be empty, so that the consumer will never be blocked.
///                                    * When the emp/full bit is set, the semaphore/FIFO pointer will be maintained, but the counter will be not correct anymore.
///                                    ###
///               %%        30         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      20B, bits:      30b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_Semaphore
#define h_Semaphore (){}

    #define     RA_Semaphore_CFG                               0x0000

    #define     BA_Semaphore_CFG_DEPTH                         0x0000
    #define     B16Semaphore_CFG_DEPTH                         0x0000
    #define   LSb32Semaphore_CFG_DEPTH                            0
    #define   LSb16Semaphore_CFG_DEPTH                            0
    #define       bSemaphore_CFG_DEPTH                         16
    #define   MSK32Semaphore_CFG_DEPTH                            0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_Semaphore_INTR                              0x0004
    ///////////////////////////////////////////////////////////
    #define     RA_Semaphore_mask                              0x0010

    #define     BA_Semaphore_mask_full                         0x0010
    #define     B16Semaphore_mask_full                         0x0010
    #define   LSb32Semaphore_mask_full                            0
    #define   LSb16Semaphore_mask_full                            0
    #define       bSemaphore_mask_full                         1
    #define   MSK32Semaphore_mask_full                            0x00000001

    #define     BA_Semaphore_mask_emp                          0x0010
    #define     B16Semaphore_mask_emp                          0x0010
    #define   LSb32Semaphore_mask_emp                             1
    #define   LSb16Semaphore_mask_emp                             1
    #define       bSemaphore_mask_emp                          1
    #define   MSK32Semaphore_mask_emp                             0x00000002
    ///////////////////////////////////////////////////////////

    typedef struct SIE_Semaphore {
    ///////////////////////////////////////////////////////////
    #define   GET32Semaphore_CFG_DEPTH(r32)                    _BFGET_(r32,15, 0)
    #define   SET32Semaphore_CFG_DEPTH(r32,v)                  _BFSET_(r32,15, 0,v)
    #define   GET16Semaphore_CFG_DEPTH(r16)                    _BFGET_(r16,15, 0)
    #define   SET16Semaphore_CFG_DEPTH(r16,v)                  _BFSET_(r16,15, 0,v)

    #define     w32Semaphore_CFG                               {\
            UNSG32 uCFG_DEPTH                                  : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32Semaphore_CFG;
            struct w32Semaphore_CFG;
          };
    ///////////////////////////////////////////////////////////
              SIE_SemaINTR                                     ie_INTR[3];
    ///////////////////////////////////////////////////////////
    #define   GET32Semaphore_mask_full(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32Semaphore_mask_full(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16Semaphore_mask_full(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16Semaphore_mask_full(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32Semaphore_mask_emp(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32Semaphore_mask_emp(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16Semaphore_mask_emp(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16Semaphore_mask_emp(r16,v)                   _BFSET_(r16, 1, 1,v)

    #define     w32Semaphore_mask                              {\
            UNSG32 umask_full                                  :  1;\
            UNSG32 umask_emp                                   :  1;\
            UNSG32 RSVDx10_b2                                  : 30;\
          }
    union { UNSG32 u32Semaphore_mask;
            struct w32Semaphore_mask;
          };
    ///////////////////////////////////////////////////////////
    } SIE_Semaphore;

    typedef union  T32Semaphore_CFG
          { UNSG32 u32;
            struct w32Semaphore_CFG;
                 } T32Semaphore_CFG;
    typedef union  T32Semaphore_mask
          { UNSG32 u32;
            struct w32Semaphore_mask;
                 } T32Semaphore_mask;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaphore_CFG
          { UNSG32 u32[1];
            struct {
            struct w32Semaphore_CFG;
                   };
                 } TSemaphore_CFG;
    typedef union  TSemaphore_mask
          { UNSG32 u32[1];
            struct {
            struct w32Semaphore_mask;
                   };
                 } TSemaphore_mask;

    ///////////////////////////////////////////////////////////
     SIGN32 Semaphore_drvrd(SIE_Semaphore *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 Semaphore_drvwr(SIE_Semaphore *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void Semaphore_reset(SIE_Semaphore *p);
     SIGN32 Semaphore_cmp  (SIE_Semaphore *p, SIE_Semaphore *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define Semaphore_check(p,pie,pfx,hLOG) Semaphore_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define Semaphore_print(p,    pfx,hLOG) Semaphore_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: Semaphore
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaQuery                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 RESP                 (R-)
///               %unsigned 16 CNT                       
///                                    ###
///                                    * Semaphore counter level
///                                    ###
///               %unsigned 16 PTR                       
///                                    ###
///                                    * Semaphore pointer:
///                                    * producer-wptr or consumer-rptr
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaQuery
#define h_SemaQuery (){}

    #define     RA_SemaQuery_RESP                              0x0000

    #define     BA_SemaQuery_RESP_CNT                          0x0000
    #define     B16SemaQuery_RESP_CNT                          0x0000
    #define   LSb32SemaQuery_RESP_CNT                             0
    #define   LSb16SemaQuery_RESP_CNT                             0
    #define       bSemaQuery_RESP_CNT                          16
    #define   MSK32SemaQuery_RESP_CNT                             0x0000FFFF

    #define     BA_SemaQuery_RESP_PTR                          0x0002
    #define     B16SemaQuery_RESP_PTR                          0x0002
    #define   LSb32SemaQuery_RESP_PTR                             16
    #define   LSb16SemaQuery_RESP_PTR                             0
    #define       bSemaQuery_RESP_PTR                          16
    #define   MSK32SemaQuery_RESP_PTR                             0xFFFF0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaQuery {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaQuery_RESP_CNT(r32)                     _BFGET_(r32,15, 0)
    #define   SET32SemaQuery_RESP_CNT(r32,v)                   _BFSET_(r32,15, 0,v)
    #define   GET16SemaQuery_RESP_CNT(r16)                     _BFGET_(r16,15, 0)
    #define   SET16SemaQuery_RESP_CNT(r16,v)                   _BFSET_(r16,15, 0,v)

    #define   GET32SemaQuery_RESP_PTR(r32)                     _BFGET_(r32,31,16)
    #define   SET32SemaQuery_RESP_PTR(r32,v)                   _BFSET_(r32,31,16,v)
    #define   GET16SemaQuery_RESP_PTR(r16)                     _BFGET_(r16,15, 0)
    #define   SET16SemaQuery_RESP_PTR(r16,v)                   _BFSET_(r16,15, 0,v)

    #define     w32SemaQuery_RESP                              {\
            UNSG32 uRESP_CNT                                   : 16;\
            UNSG32 uRESP_PTR                                   : 16;\
          }
    union { UNSG32 u32SemaQuery_RESP;
            struct w32SemaQuery_RESP;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaQuery;

    typedef union  T32SemaQuery_RESP
          { UNSG32 u32;
            struct w32SemaQuery_RESP;
                 } T32SemaQuery_RESP;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaQuery_RESP
          { UNSG32 u32[1];
            struct {
            struct w32SemaQuery_RESP;
                   };
                 } TSemaQuery_RESP;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaQuery_drvrd(SIE_SemaQuery *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaQuery_drvwr(SIE_SemaQuery *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaQuery_reset(SIE_SemaQuery *p);
     SIGN32 SemaQuery_cmp  (SIE_SemaQuery *p, SIE_SemaQuery *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaQuery_check(p,pie,pfx,hLOG) SemaQuery_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaQuery_print(p,    pfx,hLOG) SemaQuery_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaQuery
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaQueryMap                             (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 ADDR                 (P)
///               %unsigned 2  byte                      
///               %unsigned 5  ID                        
///                                    ###
///                                    * Semaphore cell index
///                                    ###
///               %unsigned 1  master                    
///                                    : producer                  0x0
///                                    : consumer                  0x1
///                                                 ###
///                                                 * Select which counter to read
///                                                 ###
///               %%        24         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       8b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaQueryMap
#define h_SemaQueryMap (){}

    #define     RA_SemaQueryMap_ADDR                           0x0000

    #define     BA_SemaQueryMap_ADDR_byte                      0x0000
    #define     B16SemaQueryMap_ADDR_byte                      0x0000
    #define   LSb32SemaQueryMap_ADDR_byte                         0
    #define   LSb16SemaQueryMap_ADDR_byte                         0
    #define       bSemaQueryMap_ADDR_byte                      2
    #define   MSK32SemaQueryMap_ADDR_byte                         0x00000003

    #define     BA_SemaQueryMap_ADDR_ID                        0x0000
    #define     B16SemaQueryMap_ADDR_ID                        0x0000
    #define   LSb32SemaQueryMap_ADDR_ID                           2
    #define   LSb16SemaQueryMap_ADDR_ID                           2
    #define       bSemaQueryMap_ADDR_ID                        5
    #define   MSK32SemaQueryMap_ADDR_ID                           0x0000007C

    #define     BA_SemaQueryMap_ADDR_master                    0x0000
    #define     B16SemaQueryMap_ADDR_master                    0x0000
    #define   LSb32SemaQueryMap_ADDR_master                       7
    #define   LSb16SemaQueryMap_ADDR_master                       7
    #define       bSemaQueryMap_ADDR_master                    1
    #define   MSK32SemaQueryMap_ADDR_master                       0x00000080
    #define        SemaQueryMap_ADDR_master_producer                        0x0
    #define        SemaQueryMap_ADDR_master_consumer                        0x1
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaQueryMap {
    ///////////////////////////////////////////////////////////
    #define   GET32SemaQueryMap_ADDR_byte(r32)                 _BFGET_(r32, 1, 0)
    #define   SET32SemaQueryMap_ADDR_byte(r32,v)               _BFSET_(r32, 1, 0,v)
    #define   GET16SemaQueryMap_ADDR_byte(r16)                 _BFGET_(r16, 1, 0)
    #define   SET16SemaQueryMap_ADDR_byte(r16,v)               _BFSET_(r16, 1, 0,v)

    #define   GET32SemaQueryMap_ADDR_ID(r32)                   _BFGET_(r32, 6, 2)
    #define   SET32SemaQueryMap_ADDR_ID(r32,v)                 _BFSET_(r32, 6, 2,v)
    #define   GET16SemaQueryMap_ADDR_ID(r16)                   _BFGET_(r16, 6, 2)
    #define   SET16SemaQueryMap_ADDR_ID(r16,v)                 _BFSET_(r16, 6, 2,v)

    #define   GET32SemaQueryMap_ADDR_master(r32)               _BFGET_(r32, 7, 7)
    #define   SET32SemaQueryMap_ADDR_master(r32,v)             _BFSET_(r32, 7, 7,v)
    #define   GET16SemaQueryMap_ADDR_master(r16)               _BFGET_(r16, 7, 7)
    #define   SET16SemaQueryMap_ADDR_master(r16,v)             _BFSET_(r16, 7, 7,v)

    #define     w32SemaQueryMap_ADDR                           {\
            UNSG32 uADDR_byte                                  :  2;\
            UNSG32 uADDR_ID                                    :  5;\
            UNSG32 uADDR_master                                :  1;\
            UNSG32 RSVDx0_b8                                   : 24;\
          }
    union { UNSG32 u32SemaQueryMap_ADDR;
            struct w32SemaQueryMap_ADDR;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SemaQueryMap;

    typedef union  T32SemaQueryMap_ADDR
          { UNSG32 u32;
            struct w32SemaQueryMap_ADDR;
                 } T32SemaQueryMap_ADDR;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaQueryMap_ADDR
          { UNSG32 u32[1];
            struct {
            struct w32SemaQueryMap_ADDR;
                   };
                 } TSemaQueryMap_ADDR;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaQueryMap_drvrd(SIE_SemaQueryMap *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaQueryMap_drvwr(SIE_SemaQueryMap *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaQueryMap_reset(SIE_SemaQueryMap *p);
     SIGN32 SemaQueryMap_cmp  (SIE_SemaQueryMap *p, SIE_SemaQueryMap *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaQueryMap_check(p,pie,pfx,hLOG) SemaQueryMap_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaQueryMap_print(p,    pfx,hLOG) SemaQueryMap_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaQueryMap
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SemaHub                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 Query                (R-)
///     # 0x00000 counter              
///               $SemaQuery           counter           MEM      [64]
///                                    ###
///                                    * Access address as defined above
///                                    ###
///     @ 0x00100 ARR                  (P)
///     # 0x00100 cell                 
///               $Semaphore           cell              REG      [32]
///                                    ###
///                                    * Up-to 32 semaphore cells
///                                    ###
///     @ 0x00380 PUSH                 (W-)
///               %unsigned 8  ID                        
///               %unsigned 8  delta                     
///                                    ###
///                                    * CPU increases PCounter by delta (0 as push 256)
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00384 POP                  (W-)
///               %unsigned 8  ID                        
///               %unsigned 8  delta                     
///                                    ###
///                                    * CPU decreases CCounter by delta (0 as pop 256)
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00388 empty                (WOC-)
///               %unsigned 1  ST_0i                     0x0
///               %unsigned 1  ST_1i                     0x0
///               %unsigned 1  ST_2i                     0x0
///               %unsigned 1  ST_3i                     0x0
///               %unsigned 1  ST_4i                     0x0
///               %unsigned 1  ST_5i                     0x0
///               %unsigned 1  ST_6i                     0x0
///               %unsigned 1  ST_7i                     0x0
///               %unsigned 1  ST_8i                     0x0
///               %unsigned 1  ST_9i                     0x0
///               %unsigned 1  ST_10i                    0x0
///               %unsigned 1  ST_11i                    0x0
///               %unsigned 1  ST_12i                    0x0
///               %unsigned 1  ST_13i                    0x0
///               %unsigned 1  ST_14i                    0x0
///               %unsigned 1  ST_15i                    0x0
///               %unsigned 1  ST_16i                    0x0
///               %unsigned 1  ST_17i                    0x0
///               %unsigned 1  ST_18i                    0x0
///               %unsigned 1  ST_19i                    0x0
///               %unsigned 1  ST_20i                    0x0
///               %unsigned 1  ST_21i                    0x0
///               %unsigned 1  ST_22i                    0x0
///               %unsigned 1  ST_23i                    0x0
///               %unsigned 1  ST_24i                    0x0
///               %unsigned 1  ST_25i                    0x0
///               %unsigned 1  ST_26i                    0x0
///               %unsigned 1  ST_27i                    0x0
///               %unsigned 1  ST_28i                    0x0
///               %unsigned 1  ST_29i                    0x0
///               %unsigned 1  ST_30i                    0x0
///               %unsigned 1  ST_31i                    0x0
///                                    ###
///                                    * All cell 'empty' status
///                                    ###
///     @ 0x0038C full                 (WOC-)
///               %unsigned 1  ST_0i                     0x0
///               %unsigned 1  ST_1i                     0x0
///               %unsigned 1  ST_2i                     0x0
///               %unsigned 1  ST_3i                     0x0
///               %unsigned 1  ST_4i                     0x0
///               %unsigned 1  ST_5i                     0x0
///               %unsigned 1  ST_6i                     0x0
///               %unsigned 1  ST_7i                     0x0
///               %unsigned 1  ST_8i                     0x0
///               %unsigned 1  ST_9i                     0x0
///               %unsigned 1  ST_10i                    0x0
///               %unsigned 1  ST_11i                    0x0
///               %unsigned 1  ST_12i                    0x0
///               %unsigned 1  ST_13i                    0x0
///               %unsigned 1  ST_14i                    0x0
///               %unsigned 1  ST_15i                    0x0
///               %unsigned 1  ST_16i                    0x0
///               %unsigned 1  ST_17i                    0x0
///               %unsigned 1  ST_18i                    0x0
///               %unsigned 1  ST_19i                    0x0
///               %unsigned 1  ST_20i                    0x0
///               %unsigned 1  ST_21i                    0x0
///               %unsigned 1  ST_22i                    0x0
///               %unsigned 1  ST_23i                    0x0
///               %unsigned 1  ST_24i                    0x0
///               %unsigned 1  ST_25i                    0x0
///               %unsigned 1  ST_26i                    0x0
///               %unsigned 1  ST_27i                    0x0
///               %unsigned 1  ST_28i                    0x0
///               %unsigned 1  ST_29i                    0x0
///               %unsigned 1  ST_30i                    0x0
///               %unsigned 1  ST_31i                    0x0
///                                    ###
///                                    * All cell 'full' status
///                                    ###
///     @ 0x00390 almostEmpty          (WOC-)
///               %unsigned 1  ST_0i                     0x0
///               %unsigned 1  ST_1i                     0x0
///               %unsigned 1  ST_2i                     0x0
///               %unsigned 1  ST_3i                     0x0
///               %unsigned 1  ST_4i                     0x0
///               %unsigned 1  ST_5i                     0x0
///               %unsigned 1  ST_6i                     0x0
///               %unsigned 1  ST_7i                     0x0
///               %unsigned 1  ST_8i                     0x0
///               %unsigned 1  ST_9i                     0x0
///               %unsigned 1  ST_10i                    0x0
///               %unsigned 1  ST_11i                    0x0
///               %unsigned 1  ST_12i                    0x0
///               %unsigned 1  ST_13i                    0x0
///               %unsigned 1  ST_14i                    0x0
///               %unsigned 1  ST_15i                    0x0
///               %unsigned 1  ST_16i                    0x0
///               %unsigned 1  ST_17i                    0x0
///               %unsigned 1  ST_18i                    0x0
///               %unsigned 1  ST_19i                    0x0
///               %unsigned 1  ST_20i                    0x0
///               %unsigned 1  ST_21i                    0x0
///               %unsigned 1  ST_22i                    0x0
///               %unsigned 1  ST_23i                    0x0
///               %unsigned 1  ST_24i                    0x0
///               %unsigned 1  ST_25i                    0x0
///               %unsigned 1  ST_26i                    0x0
///               %unsigned 1  ST_27i                    0x0
///               %unsigned 1  ST_28i                    0x0
///               %unsigned 1  ST_29i                    0x0
///               %unsigned 1  ST_30i                    0x0
///               %unsigned 1  ST_31i                    0x0
///                                    ###
///                                    * All cell 'almostEmpty' status
///                                    ###
///     @ 0x00394 almostFull           (WOC-)
///               %unsigned 1  ST_0i                     0x0
///               %unsigned 1  ST_1i                     0x0
///               %unsigned 1  ST_2i                     0x0
///               %unsigned 1  ST_3i                     0x0
///               %unsigned 1  ST_4i                     0x0
///               %unsigned 1  ST_5i                     0x0
///               %unsigned 1  ST_6i                     0x0
///               %unsigned 1  ST_7i                     0x0
///               %unsigned 1  ST_8i                     0x0
///               %unsigned 1  ST_9i                     0x0
///               %unsigned 1  ST_10i                    0x0
///               %unsigned 1  ST_11i                    0x0
///               %unsigned 1  ST_12i                    0x0
///               %unsigned 1  ST_13i                    0x0
///               %unsigned 1  ST_14i                    0x0
///               %unsigned 1  ST_15i                    0x0
///               %unsigned 1  ST_16i                    0x0
///               %unsigned 1  ST_17i                    0x0
///               %unsigned 1  ST_18i                    0x0
///               %unsigned 1  ST_19i                    0x0
///               %unsigned 1  ST_20i                    0x0
///               %unsigned 1  ST_21i                    0x0
///               %unsigned 1  ST_22i                    0x0
///               %unsigned 1  ST_23i                    0x0
///               %unsigned 1  ST_24i                    0x0
///               %unsigned 1  ST_25i                    0x0
///               %unsigned 1  ST_26i                    0x0
///               %unsigned 1  ST_27i                    0x0
///               %unsigned 1  ST_28i                    0x0
///               %unsigned 1  ST_29i                    0x0
///               %unsigned 1  ST_30i                    0x0
///               %unsigned 1  ST_31i                    0x0
///                                    ###
///                                    * All cell 'almostFull' status
///                                    ###
///     @ 0x00398                      (W-)
///     #         # Stuffing bytes...
///               %% 832
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    1024B, bits:    1152b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SemaHub
#define h_SemaHub (){}

    #define     RA_SemaHub_Query                               0x0000
    #define     RA_SemaHub_counter                             0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_ARR                                 0x0100
    #define     RA_SemaHub_cell                                0x0100
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_PUSH                                0x0380

    #define     BA_SemaHub_PUSH_ID                             0x0380
    #define     B16SemaHub_PUSH_ID                             0x0380
    #define   LSb32SemaHub_PUSH_ID                                0
    #define   LSb16SemaHub_PUSH_ID                                0
    #define       bSemaHub_PUSH_ID                             8
    #define   MSK32SemaHub_PUSH_ID                                0x000000FF

    #define     BA_SemaHub_PUSH_delta                          0x0381
    #define     B16SemaHub_PUSH_delta                          0x0380
    #define   LSb32SemaHub_PUSH_delta                             8
    #define   LSb16SemaHub_PUSH_delta                             8
    #define       bSemaHub_PUSH_delta                          8
    #define   MSK32SemaHub_PUSH_delta                             0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_POP                                 0x0384

    #define     BA_SemaHub_POP_ID                              0x0384
    #define     B16SemaHub_POP_ID                              0x0384
    #define   LSb32SemaHub_POP_ID                                 0
    #define   LSb16SemaHub_POP_ID                                 0
    #define       bSemaHub_POP_ID                              8
    #define   MSK32SemaHub_POP_ID                                 0x000000FF

    #define     BA_SemaHub_POP_delta                           0x0385
    #define     B16SemaHub_POP_delta                           0x0384
    #define   LSb32SemaHub_POP_delta                              8
    #define   LSb16SemaHub_POP_delta                              8
    #define       bSemaHub_POP_delta                           8
    #define   MSK32SemaHub_POP_delta                              0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_empty                               0x0388

    #define     BA_SemaHub_empty_ST_0i                         0x0388
    #define     B16SemaHub_empty_ST_0i                         0x0388
    #define   LSb32SemaHub_empty_ST_0i                            0
    #define   LSb16SemaHub_empty_ST_0i                            0
    #define       bSemaHub_empty_ST_0i                         1
    #define   MSK32SemaHub_empty_ST_0i                            0x00000001

    #define     BA_SemaHub_empty_ST_1i                         0x0388
    #define     B16SemaHub_empty_ST_1i                         0x0388
    #define   LSb32SemaHub_empty_ST_1i                            1
    #define   LSb16SemaHub_empty_ST_1i                            1
    #define       bSemaHub_empty_ST_1i                         1
    #define   MSK32SemaHub_empty_ST_1i                            0x00000002

    #define     BA_SemaHub_empty_ST_2i                         0x0388
    #define     B16SemaHub_empty_ST_2i                         0x0388
    #define   LSb32SemaHub_empty_ST_2i                            2
    #define   LSb16SemaHub_empty_ST_2i                            2
    #define       bSemaHub_empty_ST_2i                         1
    #define   MSK32SemaHub_empty_ST_2i                            0x00000004

    #define     BA_SemaHub_empty_ST_3i                         0x0388
    #define     B16SemaHub_empty_ST_3i                         0x0388
    #define   LSb32SemaHub_empty_ST_3i                            3
    #define   LSb16SemaHub_empty_ST_3i                            3
    #define       bSemaHub_empty_ST_3i                         1
    #define   MSK32SemaHub_empty_ST_3i                            0x00000008

    #define     BA_SemaHub_empty_ST_4i                         0x0388
    #define     B16SemaHub_empty_ST_4i                         0x0388
    #define   LSb32SemaHub_empty_ST_4i                            4
    #define   LSb16SemaHub_empty_ST_4i                            4
    #define       bSemaHub_empty_ST_4i                         1
    #define   MSK32SemaHub_empty_ST_4i                            0x00000010

    #define     BA_SemaHub_empty_ST_5i                         0x0388
    #define     B16SemaHub_empty_ST_5i                         0x0388
    #define   LSb32SemaHub_empty_ST_5i                            5
    #define   LSb16SemaHub_empty_ST_5i                            5
    #define       bSemaHub_empty_ST_5i                         1
    #define   MSK32SemaHub_empty_ST_5i                            0x00000020

    #define     BA_SemaHub_empty_ST_6i                         0x0388
    #define     B16SemaHub_empty_ST_6i                         0x0388
    #define   LSb32SemaHub_empty_ST_6i                            6
    #define   LSb16SemaHub_empty_ST_6i                            6
    #define       bSemaHub_empty_ST_6i                         1
    #define   MSK32SemaHub_empty_ST_6i                            0x00000040

    #define     BA_SemaHub_empty_ST_7i                         0x0388
    #define     B16SemaHub_empty_ST_7i                         0x0388
    #define   LSb32SemaHub_empty_ST_7i                            7
    #define   LSb16SemaHub_empty_ST_7i                            7
    #define       bSemaHub_empty_ST_7i                         1
    #define   MSK32SemaHub_empty_ST_7i                            0x00000080

    #define     BA_SemaHub_empty_ST_8i                         0x0389
    #define     B16SemaHub_empty_ST_8i                         0x0388
    #define   LSb32SemaHub_empty_ST_8i                            8
    #define   LSb16SemaHub_empty_ST_8i                            8
    #define       bSemaHub_empty_ST_8i                         1
    #define   MSK32SemaHub_empty_ST_8i                            0x00000100

    #define     BA_SemaHub_empty_ST_9i                         0x0389
    #define     B16SemaHub_empty_ST_9i                         0x0388
    #define   LSb32SemaHub_empty_ST_9i                            9
    #define   LSb16SemaHub_empty_ST_9i                            9
    #define       bSemaHub_empty_ST_9i                         1
    #define   MSK32SemaHub_empty_ST_9i                            0x00000200

    #define     BA_SemaHub_empty_ST_10i                        0x0389
    #define     B16SemaHub_empty_ST_10i                        0x0388
    #define   LSb32SemaHub_empty_ST_10i                           10
    #define   LSb16SemaHub_empty_ST_10i                           10
    #define       bSemaHub_empty_ST_10i                        1
    #define   MSK32SemaHub_empty_ST_10i                           0x00000400

    #define     BA_SemaHub_empty_ST_11i                        0x0389
    #define     B16SemaHub_empty_ST_11i                        0x0388
    #define   LSb32SemaHub_empty_ST_11i                           11
    #define   LSb16SemaHub_empty_ST_11i                           11
    #define       bSemaHub_empty_ST_11i                        1
    #define   MSK32SemaHub_empty_ST_11i                           0x00000800

    #define     BA_SemaHub_empty_ST_12i                        0x0389
    #define     B16SemaHub_empty_ST_12i                        0x0388
    #define   LSb32SemaHub_empty_ST_12i                           12
    #define   LSb16SemaHub_empty_ST_12i                           12
    #define       bSemaHub_empty_ST_12i                        1
    #define   MSK32SemaHub_empty_ST_12i                           0x00001000

    #define     BA_SemaHub_empty_ST_13i                        0x0389
    #define     B16SemaHub_empty_ST_13i                        0x0388
    #define   LSb32SemaHub_empty_ST_13i                           13
    #define   LSb16SemaHub_empty_ST_13i                           13
    #define       bSemaHub_empty_ST_13i                        1
    #define   MSK32SemaHub_empty_ST_13i                           0x00002000

    #define     BA_SemaHub_empty_ST_14i                        0x0389
    #define     B16SemaHub_empty_ST_14i                        0x0388
    #define   LSb32SemaHub_empty_ST_14i                           14
    #define   LSb16SemaHub_empty_ST_14i                           14
    #define       bSemaHub_empty_ST_14i                        1
    #define   MSK32SemaHub_empty_ST_14i                           0x00004000

    #define     BA_SemaHub_empty_ST_15i                        0x0389
    #define     B16SemaHub_empty_ST_15i                        0x0388
    #define   LSb32SemaHub_empty_ST_15i                           15
    #define   LSb16SemaHub_empty_ST_15i                           15
    #define       bSemaHub_empty_ST_15i                        1
    #define   MSK32SemaHub_empty_ST_15i                           0x00008000

    #define     BA_SemaHub_empty_ST_16i                        0x038A
    #define     B16SemaHub_empty_ST_16i                        0x038A
    #define   LSb32SemaHub_empty_ST_16i                           16
    #define   LSb16SemaHub_empty_ST_16i                           0
    #define       bSemaHub_empty_ST_16i                        1
    #define   MSK32SemaHub_empty_ST_16i                           0x00010000

    #define     BA_SemaHub_empty_ST_17i                        0x038A
    #define     B16SemaHub_empty_ST_17i                        0x038A
    #define   LSb32SemaHub_empty_ST_17i                           17
    #define   LSb16SemaHub_empty_ST_17i                           1
    #define       bSemaHub_empty_ST_17i                        1
    #define   MSK32SemaHub_empty_ST_17i                           0x00020000

    #define     BA_SemaHub_empty_ST_18i                        0x038A
    #define     B16SemaHub_empty_ST_18i                        0x038A
    #define   LSb32SemaHub_empty_ST_18i                           18
    #define   LSb16SemaHub_empty_ST_18i                           2
    #define       bSemaHub_empty_ST_18i                        1
    #define   MSK32SemaHub_empty_ST_18i                           0x00040000

    #define     BA_SemaHub_empty_ST_19i                        0x038A
    #define     B16SemaHub_empty_ST_19i                        0x038A
    #define   LSb32SemaHub_empty_ST_19i                           19
    #define   LSb16SemaHub_empty_ST_19i                           3
    #define       bSemaHub_empty_ST_19i                        1
    #define   MSK32SemaHub_empty_ST_19i                           0x00080000

    #define     BA_SemaHub_empty_ST_20i                        0x038A
    #define     B16SemaHub_empty_ST_20i                        0x038A
    #define   LSb32SemaHub_empty_ST_20i                           20
    #define   LSb16SemaHub_empty_ST_20i                           4
    #define       bSemaHub_empty_ST_20i                        1
    #define   MSK32SemaHub_empty_ST_20i                           0x00100000

    #define     BA_SemaHub_empty_ST_21i                        0x038A
    #define     B16SemaHub_empty_ST_21i                        0x038A
    #define   LSb32SemaHub_empty_ST_21i                           21
    #define   LSb16SemaHub_empty_ST_21i                           5
    #define       bSemaHub_empty_ST_21i                        1
    #define   MSK32SemaHub_empty_ST_21i                           0x00200000

    #define     BA_SemaHub_empty_ST_22i                        0x038A
    #define     B16SemaHub_empty_ST_22i                        0x038A
    #define   LSb32SemaHub_empty_ST_22i                           22
    #define   LSb16SemaHub_empty_ST_22i                           6
    #define       bSemaHub_empty_ST_22i                        1
    #define   MSK32SemaHub_empty_ST_22i                           0x00400000

    #define     BA_SemaHub_empty_ST_23i                        0x038A
    #define     B16SemaHub_empty_ST_23i                        0x038A
    #define   LSb32SemaHub_empty_ST_23i                           23
    #define   LSb16SemaHub_empty_ST_23i                           7
    #define       bSemaHub_empty_ST_23i                        1
    #define   MSK32SemaHub_empty_ST_23i                           0x00800000

    #define     BA_SemaHub_empty_ST_24i                        0x038B
    #define     B16SemaHub_empty_ST_24i                        0x038A
    #define   LSb32SemaHub_empty_ST_24i                           24
    #define   LSb16SemaHub_empty_ST_24i                           8
    #define       bSemaHub_empty_ST_24i                        1
    #define   MSK32SemaHub_empty_ST_24i                           0x01000000

    #define     BA_SemaHub_empty_ST_25i                        0x038B
    #define     B16SemaHub_empty_ST_25i                        0x038A
    #define   LSb32SemaHub_empty_ST_25i                           25
    #define   LSb16SemaHub_empty_ST_25i                           9
    #define       bSemaHub_empty_ST_25i                        1
    #define   MSK32SemaHub_empty_ST_25i                           0x02000000

    #define     BA_SemaHub_empty_ST_26i                        0x038B
    #define     B16SemaHub_empty_ST_26i                        0x038A
    #define   LSb32SemaHub_empty_ST_26i                           26
    #define   LSb16SemaHub_empty_ST_26i                           10
    #define       bSemaHub_empty_ST_26i                        1
    #define   MSK32SemaHub_empty_ST_26i                           0x04000000

    #define     BA_SemaHub_empty_ST_27i                        0x038B
    #define     B16SemaHub_empty_ST_27i                        0x038A
    #define   LSb32SemaHub_empty_ST_27i                           27
    #define   LSb16SemaHub_empty_ST_27i                           11
    #define       bSemaHub_empty_ST_27i                        1
    #define   MSK32SemaHub_empty_ST_27i                           0x08000000

    #define     BA_SemaHub_empty_ST_28i                        0x038B
    #define     B16SemaHub_empty_ST_28i                        0x038A
    #define   LSb32SemaHub_empty_ST_28i                           28
    #define   LSb16SemaHub_empty_ST_28i                           12
    #define       bSemaHub_empty_ST_28i                        1
    #define   MSK32SemaHub_empty_ST_28i                           0x10000000

    #define     BA_SemaHub_empty_ST_29i                        0x038B
    #define     B16SemaHub_empty_ST_29i                        0x038A
    #define   LSb32SemaHub_empty_ST_29i                           29
    #define   LSb16SemaHub_empty_ST_29i                           13
    #define       bSemaHub_empty_ST_29i                        1
    #define   MSK32SemaHub_empty_ST_29i                           0x20000000

    #define     BA_SemaHub_empty_ST_30i                        0x038B
    #define     B16SemaHub_empty_ST_30i                        0x038A
    #define   LSb32SemaHub_empty_ST_30i                           30
    #define   LSb16SemaHub_empty_ST_30i                           14
    #define       bSemaHub_empty_ST_30i                        1
    #define   MSK32SemaHub_empty_ST_30i                           0x40000000

    #define     BA_SemaHub_empty_ST_31i                        0x038B
    #define     B16SemaHub_empty_ST_31i                        0x038A
    #define   LSb32SemaHub_empty_ST_31i                           31
    #define   LSb16SemaHub_empty_ST_31i                           15
    #define       bSemaHub_empty_ST_31i                        1
    #define   MSK32SemaHub_empty_ST_31i                           0x80000000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_full                                0x038C

    #define     BA_SemaHub_full_ST_0i                          0x038C
    #define     B16SemaHub_full_ST_0i                          0x038C
    #define   LSb32SemaHub_full_ST_0i                             0
    #define   LSb16SemaHub_full_ST_0i                             0
    #define       bSemaHub_full_ST_0i                          1
    #define   MSK32SemaHub_full_ST_0i                             0x00000001

    #define     BA_SemaHub_full_ST_1i                          0x038C
    #define     B16SemaHub_full_ST_1i                          0x038C
    #define   LSb32SemaHub_full_ST_1i                             1
    #define   LSb16SemaHub_full_ST_1i                             1
    #define       bSemaHub_full_ST_1i                          1
    #define   MSK32SemaHub_full_ST_1i                             0x00000002

    #define     BA_SemaHub_full_ST_2i                          0x038C
    #define     B16SemaHub_full_ST_2i                          0x038C
    #define   LSb32SemaHub_full_ST_2i                             2
    #define   LSb16SemaHub_full_ST_2i                             2
    #define       bSemaHub_full_ST_2i                          1
    #define   MSK32SemaHub_full_ST_2i                             0x00000004

    #define     BA_SemaHub_full_ST_3i                          0x038C
    #define     B16SemaHub_full_ST_3i                          0x038C
    #define   LSb32SemaHub_full_ST_3i                             3
    #define   LSb16SemaHub_full_ST_3i                             3
    #define       bSemaHub_full_ST_3i                          1
    #define   MSK32SemaHub_full_ST_3i                             0x00000008

    #define     BA_SemaHub_full_ST_4i                          0x038C
    #define     B16SemaHub_full_ST_4i                          0x038C
    #define   LSb32SemaHub_full_ST_4i                             4
    #define   LSb16SemaHub_full_ST_4i                             4
    #define       bSemaHub_full_ST_4i                          1
    #define   MSK32SemaHub_full_ST_4i                             0x00000010

    #define     BA_SemaHub_full_ST_5i                          0x038C
    #define     B16SemaHub_full_ST_5i                          0x038C
    #define   LSb32SemaHub_full_ST_5i                             5
    #define   LSb16SemaHub_full_ST_5i                             5
    #define       bSemaHub_full_ST_5i                          1
    #define   MSK32SemaHub_full_ST_5i                             0x00000020

    #define     BA_SemaHub_full_ST_6i                          0x038C
    #define     B16SemaHub_full_ST_6i                          0x038C
    #define   LSb32SemaHub_full_ST_6i                             6
    #define   LSb16SemaHub_full_ST_6i                             6
    #define       bSemaHub_full_ST_6i                          1
    #define   MSK32SemaHub_full_ST_6i                             0x00000040

    #define     BA_SemaHub_full_ST_7i                          0x038C
    #define     B16SemaHub_full_ST_7i                          0x038C
    #define   LSb32SemaHub_full_ST_7i                             7
    #define   LSb16SemaHub_full_ST_7i                             7
    #define       bSemaHub_full_ST_7i                          1
    #define   MSK32SemaHub_full_ST_7i                             0x00000080

    #define     BA_SemaHub_full_ST_8i                          0x038D
    #define     B16SemaHub_full_ST_8i                          0x038C
    #define   LSb32SemaHub_full_ST_8i                             8
    #define   LSb16SemaHub_full_ST_8i                             8
    #define       bSemaHub_full_ST_8i                          1
    #define   MSK32SemaHub_full_ST_8i                             0x00000100

    #define     BA_SemaHub_full_ST_9i                          0x038D
    #define     B16SemaHub_full_ST_9i                          0x038C
    #define   LSb32SemaHub_full_ST_9i                             9
    #define   LSb16SemaHub_full_ST_9i                             9
    #define       bSemaHub_full_ST_9i                          1
    #define   MSK32SemaHub_full_ST_9i                             0x00000200

    #define     BA_SemaHub_full_ST_10i                         0x038D
    #define     B16SemaHub_full_ST_10i                         0x038C
    #define   LSb32SemaHub_full_ST_10i                            10
    #define   LSb16SemaHub_full_ST_10i                            10
    #define       bSemaHub_full_ST_10i                         1
    #define   MSK32SemaHub_full_ST_10i                            0x00000400

    #define     BA_SemaHub_full_ST_11i                         0x038D
    #define     B16SemaHub_full_ST_11i                         0x038C
    #define   LSb32SemaHub_full_ST_11i                            11
    #define   LSb16SemaHub_full_ST_11i                            11
    #define       bSemaHub_full_ST_11i                         1
    #define   MSK32SemaHub_full_ST_11i                            0x00000800

    #define     BA_SemaHub_full_ST_12i                         0x038D
    #define     B16SemaHub_full_ST_12i                         0x038C
    #define   LSb32SemaHub_full_ST_12i                            12
    #define   LSb16SemaHub_full_ST_12i                            12
    #define       bSemaHub_full_ST_12i                         1
    #define   MSK32SemaHub_full_ST_12i                            0x00001000

    #define     BA_SemaHub_full_ST_13i                         0x038D
    #define     B16SemaHub_full_ST_13i                         0x038C
    #define   LSb32SemaHub_full_ST_13i                            13
    #define   LSb16SemaHub_full_ST_13i                            13
    #define       bSemaHub_full_ST_13i                         1
    #define   MSK32SemaHub_full_ST_13i                            0x00002000

    #define     BA_SemaHub_full_ST_14i                         0x038D
    #define     B16SemaHub_full_ST_14i                         0x038C
    #define   LSb32SemaHub_full_ST_14i                            14
    #define   LSb16SemaHub_full_ST_14i                            14
    #define       bSemaHub_full_ST_14i                         1
    #define   MSK32SemaHub_full_ST_14i                            0x00004000

    #define     BA_SemaHub_full_ST_15i                         0x038D
    #define     B16SemaHub_full_ST_15i                         0x038C
    #define   LSb32SemaHub_full_ST_15i                            15
    #define   LSb16SemaHub_full_ST_15i                            15
    #define       bSemaHub_full_ST_15i                         1
    #define   MSK32SemaHub_full_ST_15i                            0x00008000

    #define     BA_SemaHub_full_ST_16i                         0x038E
    #define     B16SemaHub_full_ST_16i                         0x038E
    #define   LSb32SemaHub_full_ST_16i                            16
    #define   LSb16SemaHub_full_ST_16i                            0
    #define       bSemaHub_full_ST_16i                         1
    #define   MSK32SemaHub_full_ST_16i                            0x00010000

    #define     BA_SemaHub_full_ST_17i                         0x038E
    #define     B16SemaHub_full_ST_17i                         0x038E
    #define   LSb32SemaHub_full_ST_17i                            17
    #define   LSb16SemaHub_full_ST_17i                            1
    #define       bSemaHub_full_ST_17i                         1
    #define   MSK32SemaHub_full_ST_17i                            0x00020000

    #define     BA_SemaHub_full_ST_18i                         0x038E
    #define     B16SemaHub_full_ST_18i                         0x038E
    #define   LSb32SemaHub_full_ST_18i                            18
    #define   LSb16SemaHub_full_ST_18i                            2
    #define       bSemaHub_full_ST_18i                         1
    #define   MSK32SemaHub_full_ST_18i                            0x00040000

    #define     BA_SemaHub_full_ST_19i                         0x038E
    #define     B16SemaHub_full_ST_19i                         0x038E
    #define   LSb32SemaHub_full_ST_19i                            19
    #define   LSb16SemaHub_full_ST_19i                            3
    #define       bSemaHub_full_ST_19i                         1
    #define   MSK32SemaHub_full_ST_19i                            0x00080000

    #define     BA_SemaHub_full_ST_20i                         0x038E
    #define     B16SemaHub_full_ST_20i                         0x038E
    #define   LSb32SemaHub_full_ST_20i                            20
    #define   LSb16SemaHub_full_ST_20i                            4
    #define       bSemaHub_full_ST_20i                         1
    #define   MSK32SemaHub_full_ST_20i                            0x00100000

    #define     BA_SemaHub_full_ST_21i                         0x038E
    #define     B16SemaHub_full_ST_21i                         0x038E
    #define   LSb32SemaHub_full_ST_21i                            21
    #define   LSb16SemaHub_full_ST_21i                            5
    #define       bSemaHub_full_ST_21i                         1
    #define   MSK32SemaHub_full_ST_21i                            0x00200000

    #define     BA_SemaHub_full_ST_22i                         0x038E
    #define     B16SemaHub_full_ST_22i                         0x038E
    #define   LSb32SemaHub_full_ST_22i                            22
    #define   LSb16SemaHub_full_ST_22i                            6
    #define       bSemaHub_full_ST_22i                         1
    #define   MSK32SemaHub_full_ST_22i                            0x00400000

    #define     BA_SemaHub_full_ST_23i                         0x038E
    #define     B16SemaHub_full_ST_23i                         0x038E
    #define   LSb32SemaHub_full_ST_23i                            23
    #define   LSb16SemaHub_full_ST_23i                            7
    #define       bSemaHub_full_ST_23i                         1
    #define   MSK32SemaHub_full_ST_23i                            0x00800000

    #define     BA_SemaHub_full_ST_24i                         0x038F
    #define     B16SemaHub_full_ST_24i                         0x038E
    #define   LSb32SemaHub_full_ST_24i                            24
    #define   LSb16SemaHub_full_ST_24i                            8
    #define       bSemaHub_full_ST_24i                         1
    #define   MSK32SemaHub_full_ST_24i                            0x01000000

    #define     BA_SemaHub_full_ST_25i                         0x038F
    #define     B16SemaHub_full_ST_25i                         0x038E
    #define   LSb32SemaHub_full_ST_25i                            25
    #define   LSb16SemaHub_full_ST_25i                            9
    #define       bSemaHub_full_ST_25i                         1
    #define   MSK32SemaHub_full_ST_25i                            0x02000000

    #define     BA_SemaHub_full_ST_26i                         0x038F
    #define     B16SemaHub_full_ST_26i                         0x038E
    #define   LSb32SemaHub_full_ST_26i                            26
    #define   LSb16SemaHub_full_ST_26i                            10
    #define       bSemaHub_full_ST_26i                         1
    #define   MSK32SemaHub_full_ST_26i                            0x04000000

    #define     BA_SemaHub_full_ST_27i                         0x038F
    #define     B16SemaHub_full_ST_27i                         0x038E
    #define   LSb32SemaHub_full_ST_27i                            27
    #define   LSb16SemaHub_full_ST_27i                            11
    #define       bSemaHub_full_ST_27i                         1
    #define   MSK32SemaHub_full_ST_27i                            0x08000000

    #define     BA_SemaHub_full_ST_28i                         0x038F
    #define     B16SemaHub_full_ST_28i                         0x038E
    #define   LSb32SemaHub_full_ST_28i                            28
    #define   LSb16SemaHub_full_ST_28i                            12
    #define       bSemaHub_full_ST_28i                         1
    #define   MSK32SemaHub_full_ST_28i                            0x10000000

    #define     BA_SemaHub_full_ST_29i                         0x038F
    #define     B16SemaHub_full_ST_29i                         0x038E
    #define   LSb32SemaHub_full_ST_29i                            29
    #define   LSb16SemaHub_full_ST_29i                            13
    #define       bSemaHub_full_ST_29i                         1
    #define   MSK32SemaHub_full_ST_29i                            0x20000000

    #define     BA_SemaHub_full_ST_30i                         0x038F
    #define     B16SemaHub_full_ST_30i                         0x038E
    #define   LSb32SemaHub_full_ST_30i                            30
    #define   LSb16SemaHub_full_ST_30i                            14
    #define       bSemaHub_full_ST_30i                         1
    #define   MSK32SemaHub_full_ST_30i                            0x40000000

    #define     BA_SemaHub_full_ST_31i                         0x038F
    #define     B16SemaHub_full_ST_31i                         0x038E
    #define   LSb32SemaHub_full_ST_31i                            31
    #define   LSb16SemaHub_full_ST_31i                            15
    #define       bSemaHub_full_ST_31i                         1
    #define   MSK32SemaHub_full_ST_31i                            0x80000000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_almostEmpty                         0x0390

    #define     BA_SemaHub_almostEmpty_ST_0i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_0i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_0i                      0
    #define   LSb16SemaHub_almostEmpty_ST_0i                      0
    #define       bSemaHub_almostEmpty_ST_0i                   1
    #define   MSK32SemaHub_almostEmpty_ST_0i                      0x00000001

    #define     BA_SemaHub_almostEmpty_ST_1i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_1i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_1i                      1
    #define   LSb16SemaHub_almostEmpty_ST_1i                      1
    #define       bSemaHub_almostEmpty_ST_1i                   1
    #define   MSK32SemaHub_almostEmpty_ST_1i                      0x00000002

    #define     BA_SemaHub_almostEmpty_ST_2i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_2i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_2i                      2
    #define   LSb16SemaHub_almostEmpty_ST_2i                      2
    #define       bSemaHub_almostEmpty_ST_2i                   1
    #define   MSK32SemaHub_almostEmpty_ST_2i                      0x00000004

    #define     BA_SemaHub_almostEmpty_ST_3i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_3i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_3i                      3
    #define   LSb16SemaHub_almostEmpty_ST_3i                      3
    #define       bSemaHub_almostEmpty_ST_3i                   1
    #define   MSK32SemaHub_almostEmpty_ST_3i                      0x00000008

    #define     BA_SemaHub_almostEmpty_ST_4i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_4i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_4i                      4
    #define   LSb16SemaHub_almostEmpty_ST_4i                      4
    #define       bSemaHub_almostEmpty_ST_4i                   1
    #define   MSK32SemaHub_almostEmpty_ST_4i                      0x00000010

    #define     BA_SemaHub_almostEmpty_ST_5i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_5i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_5i                      5
    #define   LSb16SemaHub_almostEmpty_ST_5i                      5
    #define       bSemaHub_almostEmpty_ST_5i                   1
    #define   MSK32SemaHub_almostEmpty_ST_5i                      0x00000020

    #define     BA_SemaHub_almostEmpty_ST_6i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_6i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_6i                      6
    #define   LSb16SemaHub_almostEmpty_ST_6i                      6
    #define       bSemaHub_almostEmpty_ST_6i                   1
    #define   MSK32SemaHub_almostEmpty_ST_6i                      0x00000040

    #define     BA_SemaHub_almostEmpty_ST_7i                   0x0390
    #define     B16SemaHub_almostEmpty_ST_7i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_7i                      7
    #define   LSb16SemaHub_almostEmpty_ST_7i                      7
    #define       bSemaHub_almostEmpty_ST_7i                   1
    #define   MSK32SemaHub_almostEmpty_ST_7i                      0x00000080

    #define     BA_SemaHub_almostEmpty_ST_8i                   0x0391
    #define     B16SemaHub_almostEmpty_ST_8i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_8i                      8
    #define   LSb16SemaHub_almostEmpty_ST_8i                      8
    #define       bSemaHub_almostEmpty_ST_8i                   1
    #define   MSK32SemaHub_almostEmpty_ST_8i                      0x00000100

    #define     BA_SemaHub_almostEmpty_ST_9i                   0x0391
    #define     B16SemaHub_almostEmpty_ST_9i                   0x0390
    #define   LSb32SemaHub_almostEmpty_ST_9i                      9
    #define   LSb16SemaHub_almostEmpty_ST_9i                      9
    #define       bSemaHub_almostEmpty_ST_9i                   1
    #define   MSK32SemaHub_almostEmpty_ST_9i                      0x00000200

    #define     BA_SemaHub_almostEmpty_ST_10i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_10i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_10i                     10
    #define   LSb16SemaHub_almostEmpty_ST_10i                     10
    #define       bSemaHub_almostEmpty_ST_10i                  1
    #define   MSK32SemaHub_almostEmpty_ST_10i                     0x00000400

    #define     BA_SemaHub_almostEmpty_ST_11i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_11i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_11i                     11
    #define   LSb16SemaHub_almostEmpty_ST_11i                     11
    #define       bSemaHub_almostEmpty_ST_11i                  1
    #define   MSK32SemaHub_almostEmpty_ST_11i                     0x00000800

    #define     BA_SemaHub_almostEmpty_ST_12i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_12i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_12i                     12
    #define   LSb16SemaHub_almostEmpty_ST_12i                     12
    #define       bSemaHub_almostEmpty_ST_12i                  1
    #define   MSK32SemaHub_almostEmpty_ST_12i                     0x00001000

    #define     BA_SemaHub_almostEmpty_ST_13i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_13i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_13i                     13
    #define   LSb16SemaHub_almostEmpty_ST_13i                     13
    #define       bSemaHub_almostEmpty_ST_13i                  1
    #define   MSK32SemaHub_almostEmpty_ST_13i                     0x00002000

    #define     BA_SemaHub_almostEmpty_ST_14i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_14i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_14i                     14
    #define   LSb16SemaHub_almostEmpty_ST_14i                     14
    #define       bSemaHub_almostEmpty_ST_14i                  1
    #define   MSK32SemaHub_almostEmpty_ST_14i                     0x00004000

    #define     BA_SemaHub_almostEmpty_ST_15i                  0x0391
    #define     B16SemaHub_almostEmpty_ST_15i                  0x0390
    #define   LSb32SemaHub_almostEmpty_ST_15i                     15
    #define   LSb16SemaHub_almostEmpty_ST_15i                     15
    #define       bSemaHub_almostEmpty_ST_15i                  1
    #define   MSK32SemaHub_almostEmpty_ST_15i                     0x00008000

    #define     BA_SemaHub_almostEmpty_ST_16i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_16i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_16i                     16
    #define   LSb16SemaHub_almostEmpty_ST_16i                     0
    #define       bSemaHub_almostEmpty_ST_16i                  1
    #define   MSK32SemaHub_almostEmpty_ST_16i                     0x00010000

    #define     BA_SemaHub_almostEmpty_ST_17i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_17i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_17i                     17
    #define   LSb16SemaHub_almostEmpty_ST_17i                     1
    #define       bSemaHub_almostEmpty_ST_17i                  1
    #define   MSK32SemaHub_almostEmpty_ST_17i                     0x00020000

    #define     BA_SemaHub_almostEmpty_ST_18i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_18i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_18i                     18
    #define   LSb16SemaHub_almostEmpty_ST_18i                     2
    #define       bSemaHub_almostEmpty_ST_18i                  1
    #define   MSK32SemaHub_almostEmpty_ST_18i                     0x00040000

    #define     BA_SemaHub_almostEmpty_ST_19i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_19i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_19i                     19
    #define   LSb16SemaHub_almostEmpty_ST_19i                     3
    #define       bSemaHub_almostEmpty_ST_19i                  1
    #define   MSK32SemaHub_almostEmpty_ST_19i                     0x00080000

    #define     BA_SemaHub_almostEmpty_ST_20i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_20i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_20i                     20
    #define   LSb16SemaHub_almostEmpty_ST_20i                     4
    #define       bSemaHub_almostEmpty_ST_20i                  1
    #define   MSK32SemaHub_almostEmpty_ST_20i                     0x00100000

    #define     BA_SemaHub_almostEmpty_ST_21i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_21i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_21i                     21
    #define   LSb16SemaHub_almostEmpty_ST_21i                     5
    #define       bSemaHub_almostEmpty_ST_21i                  1
    #define   MSK32SemaHub_almostEmpty_ST_21i                     0x00200000

    #define     BA_SemaHub_almostEmpty_ST_22i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_22i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_22i                     22
    #define   LSb16SemaHub_almostEmpty_ST_22i                     6
    #define       bSemaHub_almostEmpty_ST_22i                  1
    #define   MSK32SemaHub_almostEmpty_ST_22i                     0x00400000

    #define     BA_SemaHub_almostEmpty_ST_23i                  0x0392
    #define     B16SemaHub_almostEmpty_ST_23i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_23i                     23
    #define   LSb16SemaHub_almostEmpty_ST_23i                     7
    #define       bSemaHub_almostEmpty_ST_23i                  1
    #define   MSK32SemaHub_almostEmpty_ST_23i                     0x00800000

    #define     BA_SemaHub_almostEmpty_ST_24i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_24i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_24i                     24
    #define   LSb16SemaHub_almostEmpty_ST_24i                     8
    #define       bSemaHub_almostEmpty_ST_24i                  1
    #define   MSK32SemaHub_almostEmpty_ST_24i                     0x01000000

    #define     BA_SemaHub_almostEmpty_ST_25i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_25i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_25i                     25
    #define   LSb16SemaHub_almostEmpty_ST_25i                     9
    #define       bSemaHub_almostEmpty_ST_25i                  1
    #define   MSK32SemaHub_almostEmpty_ST_25i                     0x02000000

    #define     BA_SemaHub_almostEmpty_ST_26i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_26i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_26i                     26
    #define   LSb16SemaHub_almostEmpty_ST_26i                     10
    #define       bSemaHub_almostEmpty_ST_26i                  1
    #define   MSK32SemaHub_almostEmpty_ST_26i                     0x04000000

    #define     BA_SemaHub_almostEmpty_ST_27i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_27i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_27i                     27
    #define   LSb16SemaHub_almostEmpty_ST_27i                     11
    #define       bSemaHub_almostEmpty_ST_27i                  1
    #define   MSK32SemaHub_almostEmpty_ST_27i                     0x08000000

    #define     BA_SemaHub_almostEmpty_ST_28i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_28i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_28i                     28
    #define   LSb16SemaHub_almostEmpty_ST_28i                     12
    #define       bSemaHub_almostEmpty_ST_28i                  1
    #define   MSK32SemaHub_almostEmpty_ST_28i                     0x10000000

    #define     BA_SemaHub_almostEmpty_ST_29i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_29i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_29i                     29
    #define   LSb16SemaHub_almostEmpty_ST_29i                     13
    #define       bSemaHub_almostEmpty_ST_29i                  1
    #define   MSK32SemaHub_almostEmpty_ST_29i                     0x20000000

    #define     BA_SemaHub_almostEmpty_ST_30i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_30i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_30i                     30
    #define   LSb16SemaHub_almostEmpty_ST_30i                     14
    #define       bSemaHub_almostEmpty_ST_30i                  1
    #define   MSK32SemaHub_almostEmpty_ST_30i                     0x40000000

    #define     BA_SemaHub_almostEmpty_ST_31i                  0x0393
    #define     B16SemaHub_almostEmpty_ST_31i                  0x0392
    #define   LSb32SemaHub_almostEmpty_ST_31i                     31
    #define   LSb16SemaHub_almostEmpty_ST_31i                     15
    #define       bSemaHub_almostEmpty_ST_31i                  1
    #define   MSK32SemaHub_almostEmpty_ST_31i                     0x80000000
    ///////////////////////////////////////////////////////////
    #define     RA_SemaHub_almostFull                          0x0394

    #define     BA_SemaHub_almostFull_ST_0i                    0x0394
    #define     B16SemaHub_almostFull_ST_0i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_0i                       0
    #define   LSb16SemaHub_almostFull_ST_0i                       0
    #define       bSemaHub_almostFull_ST_0i                    1
    #define   MSK32SemaHub_almostFull_ST_0i                       0x00000001

    #define     BA_SemaHub_almostFull_ST_1i                    0x0394
    #define     B16SemaHub_almostFull_ST_1i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_1i                       1
    #define   LSb16SemaHub_almostFull_ST_1i                       1
    #define       bSemaHub_almostFull_ST_1i                    1
    #define   MSK32SemaHub_almostFull_ST_1i                       0x00000002

    #define     BA_SemaHub_almostFull_ST_2i                    0x0394
    #define     B16SemaHub_almostFull_ST_2i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_2i                       2
    #define   LSb16SemaHub_almostFull_ST_2i                       2
    #define       bSemaHub_almostFull_ST_2i                    1
    #define   MSK32SemaHub_almostFull_ST_2i                       0x00000004

    #define     BA_SemaHub_almostFull_ST_3i                    0x0394
    #define     B16SemaHub_almostFull_ST_3i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_3i                       3
    #define   LSb16SemaHub_almostFull_ST_3i                       3
    #define       bSemaHub_almostFull_ST_3i                    1
    #define   MSK32SemaHub_almostFull_ST_3i                       0x00000008

    #define     BA_SemaHub_almostFull_ST_4i                    0x0394
    #define     B16SemaHub_almostFull_ST_4i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_4i                       4
    #define   LSb16SemaHub_almostFull_ST_4i                       4
    #define       bSemaHub_almostFull_ST_4i                    1
    #define   MSK32SemaHub_almostFull_ST_4i                       0x00000010

    #define     BA_SemaHub_almostFull_ST_5i                    0x0394
    #define     B16SemaHub_almostFull_ST_5i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_5i                       5
    #define   LSb16SemaHub_almostFull_ST_5i                       5
    #define       bSemaHub_almostFull_ST_5i                    1
    #define   MSK32SemaHub_almostFull_ST_5i                       0x00000020

    #define     BA_SemaHub_almostFull_ST_6i                    0x0394
    #define     B16SemaHub_almostFull_ST_6i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_6i                       6
    #define   LSb16SemaHub_almostFull_ST_6i                       6
    #define       bSemaHub_almostFull_ST_6i                    1
    #define   MSK32SemaHub_almostFull_ST_6i                       0x00000040

    #define     BA_SemaHub_almostFull_ST_7i                    0x0394
    #define     B16SemaHub_almostFull_ST_7i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_7i                       7
    #define   LSb16SemaHub_almostFull_ST_7i                       7
    #define       bSemaHub_almostFull_ST_7i                    1
    #define   MSK32SemaHub_almostFull_ST_7i                       0x00000080

    #define     BA_SemaHub_almostFull_ST_8i                    0x0395
    #define     B16SemaHub_almostFull_ST_8i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_8i                       8
    #define   LSb16SemaHub_almostFull_ST_8i                       8
    #define       bSemaHub_almostFull_ST_8i                    1
    #define   MSK32SemaHub_almostFull_ST_8i                       0x00000100

    #define     BA_SemaHub_almostFull_ST_9i                    0x0395
    #define     B16SemaHub_almostFull_ST_9i                    0x0394
    #define   LSb32SemaHub_almostFull_ST_9i                       9
    #define   LSb16SemaHub_almostFull_ST_9i                       9
    #define       bSemaHub_almostFull_ST_9i                    1
    #define   MSK32SemaHub_almostFull_ST_9i                       0x00000200

    #define     BA_SemaHub_almostFull_ST_10i                   0x0395
    #define     B16SemaHub_almostFull_ST_10i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_10i                      10
    #define   LSb16SemaHub_almostFull_ST_10i                      10
    #define       bSemaHub_almostFull_ST_10i                   1
    #define   MSK32SemaHub_almostFull_ST_10i                      0x00000400

    #define     BA_SemaHub_almostFull_ST_11i                   0x0395
    #define     B16SemaHub_almostFull_ST_11i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_11i                      11
    #define   LSb16SemaHub_almostFull_ST_11i                      11
    #define       bSemaHub_almostFull_ST_11i                   1
    #define   MSK32SemaHub_almostFull_ST_11i                      0x00000800

    #define     BA_SemaHub_almostFull_ST_12i                   0x0395
    #define     B16SemaHub_almostFull_ST_12i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_12i                      12
    #define   LSb16SemaHub_almostFull_ST_12i                      12
    #define       bSemaHub_almostFull_ST_12i                   1
    #define   MSK32SemaHub_almostFull_ST_12i                      0x00001000

    #define     BA_SemaHub_almostFull_ST_13i                   0x0395
    #define     B16SemaHub_almostFull_ST_13i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_13i                      13
    #define   LSb16SemaHub_almostFull_ST_13i                      13
    #define       bSemaHub_almostFull_ST_13i                   1
    #define   MSK32SemaHub_almostFull_ST_13i                      0x00002000

    #define     BA_SemaHub_almostFull_ST_14i                   0x0395
    #define     B16SemaHub_almostFull_ST_14i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_14i                      14
    #define   LSb16SemaHub_almostFull_ST_14i                      14
    #define       bSemaHub_almostFull_ST_14i                   1
    #define   MSK32SemaHub_almostFull_ST_14i                      0x00004000

    #define     BA_SemaHub_almostFull_ST_15i                   0x0395
    #define     B16SemaHub_almostFull_ST_15i                   0x0394
    #define   LSb32SemaHub_almostFull_ST_15i                      15
    #define   LSb16SemaHub_almostFull_ST_15i                      15
    #define       bSemaHub_almostFull_ST_15i                   1
    #define   MSK32SemaHub_almostFull_ST_15i                      0x00008000

    #define     BA_SemaHub_almostFull_ST_16i                   0x0396
    #define     B16SemaHub_almostFull_ST_16i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_16i                      16
    #define   LSb16SemaHub_almostFull_ST_16i                      0
    #define       bSemaHub_almostFull_ST_16i                   1
    #define   MSK32SemaHub_almostFull_ST_16i                      0x00010000

    #define     BA_SemaHub_almostFull_ST_17i                   0x0396
    #define     B16SemaHub_almostFull_ST_17i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_17i                      17
    #define   LSb16SemaHub_almostFull_ST_17i                      1
    #define       bSemaHub_almostFull_ST_17i                   1
    #define   MSK32SemaHub_almostFull_ST_17i                      0x00020000

    #define     BA_SemaHub_almostFull_ST_18i                   0x0396
    #define     B16SemaHub_almostFull_ST_18i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_18i                      18
    #define   LSb16SemaHub_almostFull_ST_18i                      2
    #define       bSemaHub_almostFull_ST_18i                   1
    #define   MSK32SemaHub_almostFull_ST_18i                      0x00040000

    #define     BA_SemaHub_almostFull_ST_19i                   0x0396
    #define     B16SemaHub_almostFull_ST_19i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_19i                      19
    #define   LSb16SemaHub_almostFull_ST_19i                      3
    #define       bSemaHub_almostFull_ST_19i                   1
    #define   MSK32SemaHub_almostFull_ST_19i                      0x00080000

    #define     BA_SemaHub_almostFull_ST_20i                   0x0396
    #define     B16SemaHub_almostFull_ST_20i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_20i                      20
    #define   LSb16SemaHub_almostFull_ST_20i                      4
    #define       bSemaHub_almostFull_ST_20i                   1
    #define   MSK32SemaHub_almostFull_ST_20i                      0x00100000

    #define     BA_SemaHub_almostFull_ST_21i                   0x0396
    #define     B16SemaHub_almostFull_ST_21i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_21i                      21
    #define   LSb16SemaHub_almostFull_ST_21i                      5
    #define       bSemaHub_almostFull_ST_21i                   1
    #define   MSK32SemaHub_almostFull_ST_21i                      0x00200000

    #define     BA_SemaHub_almostFull_ST_22i                   0x0396
    #define     B16SemaHub_almostFull_ST_22i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_22i                      22
    #define   LSb16SemaHub_almostFull_ST_22i                      6
    #define       bSemaHub_almostFull_ST_22i                   1
    #define   MSK32SemaHub_almostFull_ST_22i                      0x00400000

    #define     BA_SemaHub_almostFull_ST_23i                   0x0396
    #define     B16SemaHub_almostFull_ST_23i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_23i                      23
    #define   LSb16SemaHub_almostFull_ST_23i                      7
    #define       bSemaHub_almostFull_ST_23i                   1
    #define   MSK32SemaHub_almostFull_ST_23i                      0x00800000

    #define     BA_SemaHub_almostFull_ST_24i                   0x0397
    #define     B16SemaHub_almostFull_ST_24i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_24i                      24
    #define   LSb16SemaHub_almostFull_ST_24i                      8
    #define       bSemaHub_almostFull_ST_24i                   1
    #define   MSK32SemaHub_almostFull_ST_24i                      0x01000000

    #define     BA_SemaHub_almostFull_ST_25i                   0x0397
    #define     B16SemaHub_almostFull_ST_25i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_25i                      25
    #define   LSb16SemaHub_almostFull_ST_25i                      9
    #define       bSemaHub_almostFull_ST_25i                   1
    #define   MSK32SemaHub_almostFull_ST_25i                      0x02000000

    #define     BA_SemaHub_almostFull_ST_26i                   0x0397
    #define     B16SemaHub_almostFull_ST_26i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_26i                      26
    #define   LSb16SemaHub_almostFull_ST_26i                      10
    #define       bSemaHub_almostFull_ST_26i                   1
    #define   MSK32SemaHub_almostFull_ST_26i                      0x04000000

    #define     BA_SemaHub_almostFull_ST_27i                   0x0397
    #define     B16SemaHub_almostFull_ST_27i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_27i                      27
    #define   LSb16SemaHub_almostFull_ST_27i                      11
    #define       bSemaHub_almostFull_ST_27i                   1
    #define   MSK32SemaHub_almostFull_ST_27i                      0x08000000

    #define     BA_SemaHub_almostFull_ST_28i                   0x0397
    #define     B16SemaHub_almostFull_ST_28i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_28i                      28
    #define   LSb16SemaHub_almostFull_ST_28i                      12
    #define       bSemaHub_almostFull_ST_28i                   1
    #define   MSK32SemaHub_almostFull_ST_28i                      0x10000000

    #define     BA_SemaHub_almostFull_ST_29i                   0x0397
    #define     B16SemaHub_almostFull_ST_29i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_29i                      29
    #define   LSb16SemaHub_almostFull_ST_29i                      13
    #define       bSemaHub_almostFull_ST_29i                   1
    #define   MSK32SemaHub_almostFull_ST_29i                      0x20000000

    #define     BA_SemaHub_almostFull_ST_30i                   0x0397
    #define     B16SemaHub_almostFull_ST_30i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_30i                      30
    #define   LSb16SemaHub_almostFull_ST_30i                      14
    #define       bSemaHub_almostFull_ST_30i                   1
    #define   MSK32SemaHub_almostFull_ST_30i                      0x40000000

    #define     BA_SemaHub_almostFull_ST_31i                   0x0397
    #define     B16SemaHub_almostFull_ST_31i                   0x0396
    #define   LSb32SemaHub_almostFull_ST_31i                      31
    #define   LSb16SemaHub_almostFull_ST_31i                      15
    #define       bSemaHub_almostFull_ST_31i                   1
    #define   MSK32SemaHub_almostFull_ST_31i                      0x80000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SemaHub {
    ///////////////////////////////////////////////////////////
              SIE_SemaQuery                                    ie_counter[64];
    ///////////////////////////////////////////////////////////
              SIE_Semaphore                                    ie_cell[32];
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_PUSH_ID(r32)                        _BFGET_(r32, 7, 0)
    #define   SET32SemaHub_PUSH_ID(r32,v)                      _BFSET_(r32, 7, 0,v)
    #define   GET16SemaHub_PUSH_ID(r16)                        _BFGET_(r16, 7, 0)
    #define   SET16SemaHub_PUSH_ID(r16,v)                      _BFSET_(r16, 7, 0,v)

    #define   GET32SemaHub_PUSH_delta(r32)                     _BFGET_(r32,15, 8)
    #define   SET32SemaHub_PUSH_delta(r32,v)                   _BFSET_(r32,15, 8,v)
    #define   GET16SemaHub_PUSH_delta(r16)                     _BFGET_(r16,15, 8)
    #define   SET16SemaHub_PUSH_delta(r16,v)                   _BFSET_(r16,15, 8,v)

    #define     w32SemaHub_PUSH                                {\
            UNSG32 uPUSH_ID                                    :  8;\
            UNSG32 uPUSH_delta                                 :  8;\
            UNSG32 RSVDx380_b16                                : 16;\
          }
    union { UNSG32 u32SemaHub_PUSH;
            struct w32SemaHub_PUSH;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_POP_ID(r32)                         _BFGET_(r32, 7, 0)
    #define   SET32SemaHub_POP_ID(r32,v)                       _BFSET_(r32, 7, 0,v)
    #define   GET16SemaHub_POP_ID(r16)                         _BFGET_(r16, 7, 0)
    #define   SET16SemaHub_POP_ID(r16,v)                       _BFSET_(r16, 7, 0,v)

    #define   GET32SemaHub_POP_delta(r32)                      _BFGET_(r32,15, 8)
    #define   SET32SemaHub_POP_delta(r32,v)                    _BFSET_(r32,15, 8,v)
    #define   GET16SemaHub_POP_delta(r16)                      _BFGET_(r16,15, 8)
    #define   SET16SemaHub_POP_delta(r16,v)                    _BFSET_(r16,15, 8,v)

    #define     w32SemaHub_POP                                 {\
            UNSG32 uPOP_ID                                     :  8;\
            UNSG32 uPOP_delta                                  :  8;\
            UNSG32 RSVDx384_b16                                : 16;\
          }
    union { UNSG32 u32SemaHub_POP;
            struct w32SemaHub_POP;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_empty_ST_0i(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32SemaHub_empty_ST_0i(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16SemaHub_empty_ST_0i(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_empty_ST_0i(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_empty_ST_1i(r32)                    _BFGET_(r32, 1, 1)
    #define   SET32SemaHub_empty_ST_1i(r32,v)                  _BFSET_(r32, 1, 1,v)
    #define   GET16SemaHub_empty_ST_1i(r16)                    _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_empty_ST_1i(r16,v)                  _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_empty_ST_2i(r32)                    _BFGET_(r32, 2, 2)
    #define   SET32SemaHub_empty_ST_2i(r32,v)                  _BFSET_(r32, 2, 2,v)
    #define   GET16SemaHub_empty_ST_2i(r16)                    _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_empty_ST_2i(r16,v)                  _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_empty_ST_3i(r32)                    _BFGET_(r32, 3, 3)
    #define   SET32SemaHub_empty_ST_3i(r32,v)                  _BFSET_(r32, 3, 3,v)
    #define   GET16SemaHub_empty_ST_3i(r16)                    _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_empty_ST_3i(r16,v)                  _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_empty_ST_4i(r32)                    _BFGET_(r32, 4, 4)
    #define   SET32SemaHub_empty_ST_4i(r32,v)                  _BFSET_(r32, 4, 4,v)
    #define   GET16SemaHub_empty_ST_4i(r16)                    _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_empty_ST_4i(r16,v)                  _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_empty_ST_5i(r32)                    _BFGET_(r32, 5, 5)
    #define   SET32SemaHub_empty_ST_5i(r32,v)                  _BFSET_(r32, 5, 5,v)
    #define   GET16SemaHub_empty_ST_5i(r16)                    _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_empty_ST_5i(r16,v)                  _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_empty_ST_6i(r32)                    _BFGET_(r32, 6, 6)
    #define   SET32SemaHub_empty_ST_6i(r32,v)                  _BFSET_(r32, 6, 6,v)
    #define   GET16SemaHub_empty_ST_6i(r16)                    _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_empty_ST_6i(r16,v)                  _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_empty_ST_7i(r32)                    _BFGET_(r32, 7, 7)
    #define   SET32SemaHub_empty_ST_7i(r32,v)                  _BFSET_(r32, 7, 7,v)
    #define   GET16SemaHub_empty_ST_7i(r16)                    _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_empty_ST_7i(r16,v)                  _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_empty_ST_8i(r32)                    _BFGET_(r32, 8, 8)
    #define   SET32SemaHub_empty_ST_8i(r32,v)                  _BFSET_(r32, 8, 8,v)
    #define   GET16SemaHub_empty_ST_8i(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_empty_ST_8i(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_empty_ST_9i(r32)                    _BFGET_(r32, 9, 9)
    #define   SET32SemaHub_empty_ST_9i(r32,v)                  _BFSET_(r32, 9, 9,v)
    #define   GET16SemaHub_empty_ST_9i(r16)                    _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_empty_ST_9i(r16,v)                  _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_empty_ST_10i(r32)                   _BFGET_(r32,10,10)
    #define   SET32SemaHub_empty_ST_10i(r32,v)                 _BFSET_(r32,10,10,v)
    #define   GET16SemaHub_empty_ST_10i(r16)                   _BFGET_(r16,10,10)
    #define   SET16SemaHub_empty_ST_10i(r16,v)                 _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_empty_ST_11i(r32)                   _BFGET_(r32,11,11)
    #define   SET32SemaHub_empty_ST_11i(r32,v)                 _BFSET_(r32,11,11,v)
    #define   GET16SemaHub_empty_ST_11i(r16)                   _BFGET_(r16,11,11)
    #define   SET16SemaHub_empty_ST_11i(r16,v)                 _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_empty_ST_12i(r32)                   _BFGET_(r32,12,12)
    #define   SET32SemaHub_empty_ST_12i(r32,v)                 _BFSET_(r32,12,12,v)
    #define   GET16SemaHub_empty_ST_12i(r16)                   _BFGET_(r16,12,12)
    #define   SET16SemaHub_empty_ST_12i(r16,v)                 _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_empty_ST_13i(r32)                   _BFGET_(r32,13,13)
    #define   SET32SemaHub_empty_ST_13i(r32,v)                 _BFSET_(r32,13,13,v)
    #define   GET16SemaHub_empty_ST_13i(r16)                   _BFGET_(r16,13,13)
    #define   SET16SemaHub_empty_ST_13i(r16,v)                 _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_empty_ST_14i(r32)                   _BFGET_(r32,14,14)
    #define   SET32SemaHub_empty_ST_14i(r32,v)                 _BFSET_(r32,14,14,v)
    #define   GET16SemaHub_empty_ST_14i(r16)                   _BFGET_(r16,14,14)
    #define   SET16SemaHub_empty_ST_14i(r16,v)                 _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_empty_ST_15i(r32)                   _BFGET_(r32,15,15)
    #define   SET32SemaHub_empty_ST_15i(r32,v)                 _BFSET_(r32,15,15,v)
    #define   GET16SemaHub_empty_ST_15i(r16)                   _BFGET_(r16,15,15)
    #define   SET16SemaHub_empty_ST_15i(r16,v)                 _BFSET_(r16,15,15,v)

    #define   GET32SemaHub_empty_ST_16i(r32)                   _BFGET_(r32,16,16)
    #define   SET32SemaHub_empty_ST_16i(r32,v)                 _BFSET_(r32,16,16,v)
    #define   GET16SemaHub_empty_ST_16i(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_empty_ST_16i(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_empty_ST_17i(r32)                   _BFGET_(r32,17,17)
    #define   SET32SemaHub_empty_ST_17i(r32,v)                 _BFSET_(r32,17,17,v)
    #define   GET16SemaHub_empty_ST_17i(r16)                   _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_empty_ST_17i(r16,v)                 _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_empty_ST_18i(r32)                   _BFGET_(r32,18,18)
    #define   SET32SemaHub_empty_ST_18i(r32,v)                 _BFSET_(r32,18,18,v)
    #define   GET16SemaHub_empty_ST_18i(r16)                   _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_empty_ST_18i(r16,v)                 _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_empty_ST_19i(r32)                   _BFGET_(r32,19,19)
    #define   SET32SemaHub_empty_ST_19i(r32,v)                 _BFSET_(r32,19,19,v)
    #define   GET16SemaHub_empty_ST_19i(r16)                   _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_empty_ST_19i(r16,v)                 _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_empty_ST_20i(r32)                   _BFGET_(r32,20,20)
    #define   SET32SemaHub_empty_ST_20i(r32,v)                 _BFSET_(r32,20,20,v)
    #define   GET16SemaHub_empty_ST_20i(r16)                   _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_empty_ST_20i(r16,v)                 _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_empty_ST_21i(r32)                   _BFGET_(r32,21,21)
    #define   SET32SemaHub_empty_ST_21i(r32,v)                 _BFSET_(r32,21,21,v)
    #define   GET16SemaHub_empty_ST_21i(r16)                   _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_empty_ST_21i(r16,v)                 _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_empty_ST_22i(r32)                   _BFGET_(r32,22,22)
    #define   SET32SemaHub_empty_ST_22i(r32,v)                 _BFSET_(r32,22,22,v)
    #define   GET16SemaHub_empty_ST_22i(r16)                   _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_empty_ST_22i(r16,v)                 _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_empty_ST_23i(r32)                   _BFGET_(r32,23,23)
    #define   SET32SemaHub_empty_ST_23i(r32,v)                 _BFSET_(r32,23,23,v)
    #define   GET16SemaHub_empty_ST_23i(r16)                   _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_empty_ST_23i(r16,v)                 _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_empty_ST_24i(r32)                   _BFGET_(r32,24,24)
    #define   SET32SemaHub_empty_ST_24i(r32,v)                 _BFSET_(r32,24,24,v)
    #define   GET16SemaHub_empty_ST_24i(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_empty_ST_24i(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_empty_ST_25i(r32)                   _BFGET_(r32,25,25)
    #define   SET32SemaHub_empty_ST_25i(r32,v)                 _BFSET_(r32,25,25,v)
    #define   GET16SemaHub_empty_ST_25i(r16)                   _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_empty_ST_25i(r16,v)                 _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_empty_ST_26i(r32)                   _BFGET_(r32,26,26)
    #define   SET32SemaHub_empty_ST_26i(r32,v)                 _BFSET_(r32,26,26,v)
    #define   GET16SemaHub_empty_ST_26i(r16)                   _BFGET_(r16,10,10)
    #define   SET16SemaHub_empty_ST_26i(r16,v)                 _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_empty_ST_27i(r32)                   _BFGET_(r32,27,27)
    #define   SET32SemaHub_empty_ST_27i(r32,v)                 _BFSET_(r32,27,27,v)
    #define   GET16SemaHub_empty_ST_27i(r16)                   _BFGET_(r16,11,11)
    #define   SET16SemaHub_empty_ST_27i(r16,v)                 _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_empty_ST_28i(r32)                   _BFGET_(r32,28,28)
    #define   SET32SemaHub_empty_ST_28i(r32,v)                 _BFSET_(r32,28,28,v)
    #define   GET16SemaHub_empty_ST_28i(r16)                   _BFGET_(r16,12,12)
    #define   SET16SemaHub_empty_ST_28i(r16,v)                 _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_empty_ST_29i(r32)                   _BFGET_(r32,29,29)
    #define   SET32SemaHub_empty_ST_29i(r32,v)                 _BFSET_(r32,29,29,v)
    #define   GET16SemaHub_empty_ST_29i(r16)                   _BFGET_(r16,13,13)
    #define   SET16SemaHub_empty_ST_29i(r16,v)                 _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_empty_ST_30i(r32)                   _BFGET_(r32,30,30)
    #define   SET32SemaHub_empty_ST_30i(r32,v)                 _BFSET_(r32,30,30,v)
    #define   GET16SemaHub_empty_ST_30i(r16)                   _BFGET_(r16,14,14)
    #define   SET16SemaHub_empty_ST_30i(r16,v)                 _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_empty_ST_31i(r32)                   _BFGET_(r32,31,31)
    #define   SET32SemaHub_empty_ST_31i(r32,v)                 _BFSET_(r32,31,31,v)
    #define   GET16SemaHub_empty_ST_31i(r16)                   _BFGET_(r16,15,15)
    #define   SET16SemaHub_empty_ST_31i(r16,v)                 _BFSET_(r16,15,15,v)

    #define     w32SemaHub_empty                               {\
            UNSG32 uempty_ST_0i                                :  1;\
            UNSG32 uempty_ST_1i                                :  1;\
            UNSG32 uempty_ST_2i                                :  1;\
            UNSG32 uempty_ST_3i                                :  1;\
            UNSG32 uempty_ST_4i                                :  1;\
            UNSG32 uempty_ST_5i                                :  1;\
            UNSG32 uempty_ST_6i                                :  1;\
            UNSG32 uempty_ST_7i                                :  1;\
            UNSG32 uempty_ST_8i                                :  1;\
            UNSG32 uempty_ST_9i                                :  1;\
            UNSG32 uempty_ST_10i                               :  1;\
            UNSG32 uempty_ST_11i                               :  1;\
            UNSG32 uempty_ST_12i                               :  1;\
            UNSG32 uempty_ST_13i                               :  1;\
            UNSG32 uempty_ST_14i                               :  1;\
            UNSG32 uempty_ST_15i                               :  1;\
            UNSG32 uempty_ST_16i                               :  1;\
            UNSG32 uempty_ST_17i                               :  1;\
            UNSG32 uempty_ST_18i                               :  1;\
            UNSG32 uempty_ST_19i                               :  1;\
            UNSG32 uempty_ST_20i                               :  1;\
            UNSG32 uempty_ST_21i                               :  1;\
            UNSG32 uempty_ST_22i                               :  1;\
            UNSG32 uempty_ST_23i                               :  1;\
            UNSG32 uempty_ST_24i                               :  1;\
            UNSG32 uempty_ST_25i                               :  1;\
            UNSG32 uempty_ST_26i                               :  1;\
            UNSG32 uempty_ST_27i                               :  1;\
            UNSG32 uempty_ST_28i                               :  1;\
            UNSG32 uempty_ST_29i                               :  1;\
            UNSG32 uempty_ST_30i                               :  1;\
            UNSG32 uempty_ST_31i                               :  1;\
          }
    union { UNSG32 u32SemaHub_empty;
            struct w32SemaHub_empty;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_full_ST_0i(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32SemaHub_full_ST_0i(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16SemaHub_full_ST_0i(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_full_ST_0i(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_full_ST_1i(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32SemaHub_full_ST_1i(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16SemaHub_full_ST_1i(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_full_ST_1i(r16,v)                   _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_full_ST_2i(r32)                     _BFGET_(r32, 2, 2)
    #define   SET32SemaHub_full_ST_2i(r32,v)                   _BFSET_(r32, 2, 2,v)
    #define   GET16SemaHub_full_ST_2i(r16)                     _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_full_ST_2i(r16,v)                   _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_full_ST_3i(r32)                     _BFGET_(r32, 3, 3)
    #define   SET32SemaHub_full_ST_3i(r32,v)                   _BFSET_(r32, 3, 3,v)
    #define   GET16SemaHub_full_ST_3i(r16)                     _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_full_ST_3i(r16,v)                   _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_full_ST_4i(r32)                     _BFGET_(r32, 4, 4)
    #define   SET32SemaHub_full_ST_4i(r32,v)                   _BFSET_(r32, 4, 4,v)
    #define   GET16SemaHub_full_ST_4i(r16)                     _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_full_ST_4i(r16,v)                   _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_full_ST_5i(r32)                     _BFGET_(r32, 5, 5)
    #define   SET32SemaHub_full_ST_5i(r32,v)                   _BFSET_(r32, 5, 5,v)
    #define   GET16SemaHub_full_ST_5i(r16)                     _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_full_ST_5i(r16,v)                   _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_full_ST_6i(r32)                     _BFGET_(r32, 6, 6)
    #define   SET32SemaHub_full_ST_6i(r32,v)                   _BFSET_(r32, 6, 6,v)
    #define   GET16SemaHub_full_ST_6i(r16)                     _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_full_ST_6i(r16,v)                   _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_full_ST_7i(r32)                     _BFGET_(r32, 7, 7)
    #define   SET32SemaHub_full_ST_7i(r32,v)                   _BFSET_(r32, 7, 7,v)
    #define   GET16SemaHub_full_ST_7i(r16)                     _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_full_ST_7i(r16,v)                   _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_full_ST_8i(r32)                     _BFGET_(r32, 8, 8)
    #define   SET32SemaHub_full_ST_8i(r32,v)                   _BFSET_(r32, 8, 8,v)
    #define   GET16SemaHub_full_ST_8i(r16)                     _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_full_ST_8i(r16,v)                   _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_full_ST_9i(r32)                     _BFGET_(r32, 9, 9)
    #define   SET32SemaHub_full_ST_9i(r32,v)                   _BFSET_(r32, 9, 9,v)
    #define   GET16SemaHub_full_ST_9i(r16)                     _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_full_ST_9i(r16,v)                   _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_full_ST_10i(r32)                    _BFGET_(r32,10,10)
    #define   SET32SemaHub_full_ST_10i(r32,v)                  _BFSET_(r32,10,10,v)
    #define   GET16SemaHub_full_ST_10i(r16)                    _BFGET_(r16,10,10)
    #define   SET16SemaHub_full_ST_10i(r16,v)                  _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_full_ST_11i(r32)                    _BFGET_(r32,11,11)
    #define   SET32SemaHub_full_ST_11i(r32,v)                  _BFSET_(r32,11,11,v)
    #define   GET16SemaHub_full_ST_11i(r16)                    _BFGET_(r16,11,11)
    #define   SET16SemaHub_full_ST_11i(r16,v)                  _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_full_ST_12i(r32)                    _BFGET_(r32,12,12)
    #define   SET32SemaHub_full_ST_12i(r32,v)                  _BFSET_(r32,12,12,v)
    #define   GET16SemaHub_full_ST_12i(r16)                    _BFGET_(r16,12,12)
    #define   SET16SemaHub_full_ST_12i(r16,v)                  _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_full_ST_13i(r32)                    _BFGET_(r32,13,13)
    #define   SET32SemaHub_full_ST_13i(r32,v)                  _BFSET_(r32,13,13,v)
    #define   GET16SemaHub_full_ST_13i(r16)                    _BFGET_(r16,13,13)
    #define   SET16SemaHub_full_ST_13i(r16,v)                  _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_full_ST_14i(r32)                    _BFGET_(r32,14,14)
    #define   SET32SemaHub_full_ST_14i(r32,v)                  _BFSET_(r32,14,14,v)
    #define   GET16SemaHub_full_ST_14i(r16)                    _BFGET_(r16,14,14)
    #define   SET16SemaHub_full_ST_14i(r16,v)                  _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_full_ST_15i(r32)                    _BFGET_(r32,15,15)
    #define   SET32SemaHub_full_ST_15i(r32,v)                  _BFSET_(r32,15,15,v)
    #define   GET16SemaHub_full_ST_15i(r16)                    _BFGET_(r16,15,15)
    #define   SET16SemaHub_full_ST_15i(r16,v)                  _BFSET_(r16,15,15,v)

    #define   GET32SemaHub_full_ST_16i(r32)                    _BFGET_(r32,16,16)
    #define   SET32SemaHub_full_ST_16i(r32,v)                  _BFSET_(r32,16,16,v)
    #define   GET16SemaHub_full_ST_16i(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_full_ST_16i(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_full_ST_17i(r32)                    _BFGET_(r32,17,17)
    #define   SET32SemaHub_full_ST_17i(r32,v)                  _BFSET_(r32,17,17,v)
    #define   GET16SemaHub_full_ST_17i(r16)                    _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_full_ST_17i(r16,v)                  _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_full_ST_18i(r32)                    _BFGET_(r32,18,18)
    #define   SET32SemaHub_full_ST_18i(r32,v)                  _BFSET_(r32,18,18,v)
    #define   GET16SemaHub_full_ST_18i(r16)                    _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_full_ST_18i(r16,v)                  _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_full_ST_19i(r32)                    _BFGET_(r32,19,19)
    #define   SET32SemaHub_full_ST_19i(r32,v)                  _BFSET_(r32,19,19,v)
    #define   GET16SemaHub_full_ST_19i(r16)                    _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_full_ST_19i(r16,v)                  _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_full_ST_20i(r32)                    _BFGET_(r32,20,20)
    #define   SET32SemaHub_full_ST_20i(r32,v)                  _BFSET_(r32,20,20,v)
    #define   GET16SemaHub_full_ST_20i(r16)                    _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_full_ST_20i(r16,v)                  _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_full_ST_21i(r32)                    _BFGET_(r32,21,21)
    #define   SET32SemaHub_full_ST_21i(r32,v)                  _BFSET_(r32,21,21,v)
    #define   GET16SemaHub_full_ST_21i(r16)                    _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_full_ST_21i(r16,v)                  _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_full_ST_22i(r32)                    _BFGET_(r32,22,22)
    #define   SET32SemaHub_full_ST_22i(r32,v)                  _BFSET_(r32,22,22,v)
    #define   GET16SemaHub_full_ST_22i(r16)                    _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_full_ST_22i(r16,v)                  _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_full_ST_23i(r32)                    _BFGET_(r32,23,23)
    #define   SET32SemaHub_full_ST_23i(r32,v)                  _BFSET_(r32,23,23,v)
    #define   GET16SemaHub_full_ST_23i(r16)                    _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_full_ST_23i(r16,v)                  _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_full_ST_24i(r32)                    _BFGET_(r32,24,24)
    #define   SET32SemaHub_full_ST_24i(r32,v)                  _BFSET_(r32,24,24,v)
    #define   GET16SemaHub_full_ST_24i(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_full_ST_24i(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_full_ST_25i(r32)                    _BFGET_(r32,25,25)
    #define   SET32SemaHub_full_ST_25i(r32,v)                  _BFSET_(r32,25,25,v)
    #define   GET16SemaHub_full_ST_25i(r16)                    _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_full_ST_25i(r16,v)                  _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_full_ST_26i(r32)                    _BFGET_(r32,26,26)
    #define   SET32SemaHub_full_ST_26i(r32,v)                  _BFSET_(r32,26,26,v)
    #define   GET16SemaHub_full_ST_26i(r16)                    _BFGET_(r16,10,10)
    #define   SET16SemaHub_full_ST_26i(r16,v)                  _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_full_ST_27i(r32)                    _BFGET_(r32,27,27)
    #define   SET32SemaHub_full_ST_27i(r32,v)                  _BFSET_(r32,27,27,v)
    #define   GET16SemaHub_full_ST_27i(r16)                    _BFGET_(r16,11,11)
    #define   SET16SemaHub_full_ST_27i(r16,v)                  _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_full_ST_28i(r32)                    _BFGET_(r32,28,28)
    #define   SET32SemaHub_full_ST_28i(r32,v)                  _BFSET_(r32,28,28,v)
    #define   GET16SemaHub_full_ST_28i(r16)                    _BFGET_(r16,12,12)
    #define   SET16SemaHub_full_ST_28i(r16,v)                  _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_full_ST_29i(r32)                    _BFGET_(r32,29,29)
    #define   SET32SemaHub_full_ST_29i(r32,v)                  _BFSET_(r32,29,29,v)
    #define   GET16SemaHub_full_ST_29i(r16)                    _BFGET_(r16,13,13)
    #define   SET16SemaHub_full_ST_29i(r16,v)                  _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_full_ST_30i(r32)                    _BFGET_(r32,30,30)
    #define   SET32SemaHub_full_ST_30i(r32,v)                  _BFSET_(r32,30,30,v)
    #define   GET16SemaHub_full_ST_30i(r16)                    _BFGET_(r16,14,14)
    #define   SET16SemaHub_full_ST_30i(r16,v)                  _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_full_ST_31i(r32)                    _BFGET_(r32,31,31)
    #define   SET32SemaHub_full_ST_31i(r32,v)                  _BFSET_(r32,31,31,v)
    #define   GET16SemaHub_full_ST_31i(r16)                    _BFGET_(r16,15,15)
    #define   SET16SemaHub_full_ST_31i(r16,v)                  _BFSET_(r16,15,15,v)

    #define     w32SemaHub_full                                {\
            UNSG32 ufull_ST_0i                                 :  1;\
            UNSG32 ufull_ST_1i                                 :  1;\
            UNSG32 ufull_ST_2i                                 :  1;\
            UNSG32 ufull_ST_3i                                 :  1;\
            UNSG32 ufull_ST_4i                                 :  1;\
            UNSG32 ufull_ST_5i                                 :  1;\
            UNSG32 ufull_ST_6i                                 :  1;\
            UNSG32 ufull_ST_7i                                 :  1;\
            UNSG32 ufull_ST_8i                                 :  1;\
            UNSG32 ufull_ST_9i                                 :  1;\
            UNSG32 ufull_ST_10i                                :  1;\
            UNSG32 ufull_ST_11i                                :  1;\
            UNSG32 ufull_ST_12i                                :  1;\
            UNSG32 ufull_ST_13i                                :  1;\
            UNSG32 ufull_ST_14i                                :  1;\
            UNSG32 ufull_ST_15i                                :  1;\
            UNSG32 ufull_ST_16i                                :  1;\
            UNSG32 ufull_ST_17i                                :  1;\
            UNSG32 ufull_ST_18i                                :  1;\
            UNSG32 ufull_ST_19i                                :  1;\
            UNSG32 ufull_ST_20i                                :  1;\
            UNSG32 ufull_ST_21i                                :  1;\
            UNSG32 ufull_ST_22i                                :  1;\
            UNSG32 ufull_ST_23i                                :  1;\
            UNSG32 ufull_ST_24i                                :  1;\
            UNSG32 ufull_ST_25i                                :  1;\
            UNSG32 ufull_ST_26i                                :  1;\
            UNSG32 ufull_ST_27i                                :  1;\
            UNSG32 ufull_ST_28i                                :  1;\
            UNSG32 ufull_ST_29i                                :  1;\
            UNSG32 ufull_ST_30i                                :  1;\
            UNSG32 ufull_ST_31i                                :  1;\
          }
    union { UNSG32 u32SemaHub_full;
            struct w32SemaHub_full;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_almostEmpty_ST_0i(r32)              _BFGET_(r32, 0, 0)
    #define   SET32SemaHub_almostEmpty_ST_0i(r32,v)            _BFSET_(r32, 0, 0,v)
    #define   GET16SemaHub_almostEmpty_ST_0i(r16)              _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_almostEmpty_ST_0i(r16,v)            _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_almostEmpty_ST_1i(r32)              _BFGET_(r32, 1, 1)
    #define   SET32SemaHub_almostEmpty_ST_1i(r32,v)            _BFSET_(r32, 1, 1,v)
    #define   GET16SemaHub_almostEmpty_ST_1i(r16)              _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_almostEmpty_ST_1i(r16,v)            _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_almostEmpty_ST_2i(r32)              _BFGET_(r32, 2, 2)
    #define   SET32SemaHub_almostEmpty_ST_2i(r32,v)            _BFSET_(r32, 2, 2,v)
    #define   GET16SemaHub_almostEmpty_ST_2i(r16)              _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_almostEmpty_ST_2i(r16,v)            _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_almostEmpty_ST_3i(r32)              _BFGET_(r32, 3, 3)
    #define   SET32SemaHub_almostEmpty_ST_3i(r32,v)            _BFSET_(r32, 3, 3,v)
    #define   GET16SemaHub_almostEmpty_ST_3i(r16)              _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_almostEmpty_ST_3i(r16,v)            _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_almostEmpty_ST_4i(r32)              _BFGET_(r32, 4, 4)
    #define   SET32SemaHub_almostEmpty_ST_4i(r32,v)            _BFSET_(r32, 4, 4,v)
    #define   GET16SemaHub_almostEmpty_ST_4i(r16)              _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_almostEmpty_ST_4i(r16,v)            _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_almostEmpty_ST_5i(r32)              _BFGET_(r32, 5, 5)
    #define   SET32SemaHub_almostEmpty_ST_5i(r32,v)            _BFSET_(r32, 5, 5,v)
    #define   GET16SemaHub_almostEmpty_ST_5i(r16)              _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_almostEmpty_ST_5i(r16,v)            _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_almostEmpty_ST_6i(r32)              _BFGET_(r32, 6, 6)
    #define   SET32SemaHub_almostEmpty_ST_6i(r32,v)            _BFSET_(r32, 6, 6,v)
    #define   GET16SemaHub_almostEmpty_ST_6i(r16)              _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_almostEmpty_ST_6i(r16,v)            _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_almostEmpty_ST_7i(r32)              _BFGET_(r32, 7, 7)
    #define   SET32SemaHub_almostEmpty_ST_7i(r32,v)            _BFSET_(r32, 7, 7,v)
    #define   GET16SemaHub_almostEmpty_ST_7i(r16)              _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_almostEmpty_ST_7i(r16,v)            _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_almostEmpty_ST_8i(r32)              _BFGET_(r32, 8, 8)
    #define   SET32SemaHub_almostEmpty_ST_8i(r32,v)            _BFSET_(r32, 8, 8,v)
    #define   GET16SemaHub_almostEmpty_ST_8i(r16)              _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_almostEmpty_ST_8i(r16,v)            _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_almostEmpty_ST_9i(r32)              _BFGET_(r32, 9, 9)
    #define   SET32SemaHub_almostEmpty_ST_9i(r32,v)            _BFSET_(r32, 9, 9,v)
    #define   GET16SemaHub_almostEmpty_ST_9i(r16)              _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_almostEmpty_ST_9i(r16,v)            _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_almostEmpty_ST_10i(r32)             _BFGET_(r32,10,10)
    #define   SET32SemaHub_almostEmpty_ST_10i(r32,v)           _BFSET_(r32,10,10,v)
    #define   GET16SemaHub_almostEmpty_ST_10i(r16)             _BFGET_(r16,10,10)
    #define   SET16SemaHub_almostEmpty_ST_10i(r16,v)           _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_almostEmpty_ST_11i(r32)             _BFGET_(r32,11,11)
    #define   SET32SemaHub_almostEmpty_ST_11i(r32,v)           _BFSET_(r32,11,11,v)
    #define   GET16SemaHub_almostEmpty_ST_11i(r16)             _BFGET_(r16,11,11)
    #define   SET16SemaHub_almostEmpty_ST_11i(r16,v)           _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_almostEmpty_ST_12i(r32)             _BFGET_(r32,12,12)
    #define   SET32SemaHub_almostEmpty_ST_12i(r32,v)           _BFSET_(r32,12,12,v)
    #define   GET16SemaHub_almostEmpty_ST_12i(r16)             _BFGET_(r16,12,12)
    #define   SET16SemaHub_almostEmpty_ST_12i(r16,v)           _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_almostEmpty_ST_13i(r32)             _BFGET_(r32,13,13)
    #define   SET32SemaHub_almostEmpty_ST_13i(r32,v)           _BFSET_(r32,13,13,v)
    #define   GET16SemaHub_almostEmpty_ST_13i(r16)             _BFGET_(r16,13,13)
    #define   SET16SemaHub_almostEmpty_ST_13i(r16,v)           _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_almostEmpty_ST_14i(r32)             _BFGET_(r32,14,14)
    #define   SET32SemaHub_almostEmpty_ST_14i(r32,v)           _BFSET_(r32,14,14,v)
    #define   GET16SemaHub_almostEmpty_ST_14i(r16)             _BFGET_(r16,14,14)
    #define   SET16SemaHub_almostEmpty_ST_14i(r16,v)           _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_almostEmpty_ST_15i(r32)             _BFGET_(r32,15,15)
    #define   SET32SemaHub_almostEmpty_ST_15i(r32,v)           _BFSET_(r32,15,15,v)
    #define   GET16SemaHub_almostEmpty_ST_15i(r16)             _BFGET_(r16,15,15)
    #define   SET16SemaHub_almostEmpty_ST_15i(r16,v)           _BFSET_(r16,15,15,v)

    #define   GET32SemaHub_almostEmpty_ST_16i(r32)             _BFGET_(r32,16,16)
    #define   SET32SemaHub_almostEmpty_ST_16i(r32,v)           _BFSET_(r32,16,16,v)
    #define   GET16SemaHub_almostEmpty_ST_16i(r16)             _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_almostEmpty_ST_16i(r16,v)           _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_almostEmpty_ST_17i(r32)             _BFGET_(r32,17,17)
    #define   SET32SemaHub_almostEmpty_ST_17i(r32,v)           _BFSET_(r32,17,17,v)
    #define   GET16SemaHub_almostEmpty_ST_17i(r16)             _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_almostEmpty_ST_17i(r16,v)           _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_almostEmpty_ST_18i(r32)             _BFGET_(r32,18,18)
    #define   SET32SemaHub_almostEmpty_ST_18i(r32,v)           _BFSET_(r32,18,18,v)
    #define   GET16SemaHub_almostEmpty_ST_18i(r16)             _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_almostEmpty_ST_18i(r16,v)           _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_almostEmpty_ST_19i(r32)             _BFGET_(r32,19,19)
    #define   SET32SemaHub_almostEmpty_ST_19i(r32,v)           _BFSET_(r32,19,19,v)
    #define   GET16SemaHub_almostEmpty_ST_19i(r16)             _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_almostEmpty_ST_19i(r16,v)           _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_almostEmpty_ST_20i(r32)             _BFGET_(r32,20,20)
    #define   SET32SemaHub_almostEmpty_ST_20i(r32,v)           _BFSET_(r32,20,20,v)
    #define   GET16SemaHub_almostEmpty_ST_20i(r16)             _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_almostEmpty_ST_20i(r16,v)           _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_almostEmpty_ST_21i(r32)             _BFGET_(r32,21,21)
    #define   SET32SemaHub_almostEmpty_ST_21i(r32,v)           _BFSET_(r32,21,21,v)
    #define   GET16SemaHub_almostEmpty_ST_21i(r16)             _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_almostEmpty_ST_21i(r16,v)           _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_almostEmpty_ST_22i(r32)             _BFGET_(r32,22,22)
    #define   SET32SemaHub_almostEmpty_ST_22i(r32,v)           _BFSET_(r32,22,22,v)
    #define   GET16SemaHub_almostEmpty_ST_22i(r16)             _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_almostEmpty_ST_22i(r16,v)           _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_almostEmpty_ST_23i(r32)             _BFGET_(r32,23,23)
    #define   SET32SemaHub_almostEmpty_ST_23i(r32,v)           _BFSET_(r32,23,23,v)
    #define   GET16SemaHub_almostEmpty_ST_23i(r16)             _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_almostEmpty_ST_23i(r16,v)           _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_almostEmpty_ST_24i(r32)             _BFGET_(r32,24,24)
    #define   SET32SemaHub_almostEmpty_ST_24i(r32,v)           _BFSET_(r32,24,24,v)
    #define   GET16SemaHub_almostEmpty_ST_24i(r16)             _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_almostEmpty_ST_24i(r16,v)           _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_almostEmpty_ST_25i(r32)             _BFGET_(r32,25,25)
    #define   SET32SemaHub_almostEmpty_ST_25i(r32,v)           _BFSET_(r32,25,25,v)
    #define   GET16SemaHub_almostEmpty_ST_25i(r16)             _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_almostEmpty_ST_25i(r16,v)           _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_almostEmpty_ST_26i(r32)             _BFGET_(r32,26,26)
    #define   SET32SemaHub_almostEmpty_ST_26i(r32,v)           _BFSET_(r32,26,26,v)
    #define   GET16SemaHub_almostEmpty_ST_26i(r16)             _BFGET_(r16,10,10)
    #define   SET16SemaHub_almostEmpty_ST_26i(r16,v)           _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_almostEmpty_ST_27i(r32)             _BFGET_(r32,27,27)
    #define   SET32SemaHub_almostEmpty_ST_27i(r32,v)           _BFSET_(r32,27,27,v)
    #define   GET16SemaHub_almostEmpty_ST_27i(r16)             _BFGET_(r16,11,11)
    #define   SET16SemaHub_almostEmpty_ST_27i(r16,v)           _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_almostEmpty_ST_28i(r32)             _BFGET_(r32,28,28)
    #define   SET32SemaHub_almostEmpty_ST_28i(r32,v)           _BFSET_(r32,28,28,v)
    #define   GET16SemaHub_almostEmpty_ST_28i(r16)             _BFGET_(r16,12,12)
    #define   SET16SemaHub_almostEmpty_ST_28i(r16,v)           _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_almostEmpty_ST_29i(r32)             _BFGET_(r32,29,29)
    #define   SET32SemaHub_almostEmpty_ST_29i(r32,v)           _BFSET_(r32,29,29,v)
    #define   GET16SemaHub_almostEmpty_ST_29i(r16)             _BFGET_(r16,13,13)
    #define   SET16SemaHub_almostEmpty_ST_29i(r16,v)           _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_almostEmpty_ST_30i(r32)             _BFGET_(r32,30,30)
    #define   SET32SemaHub_almostEmpty_ST_30i(r32,v)           _BFSET_(r32,30,30,v)
    #define   GET16SemaHub_almostEmpty_ST_30i(r16)             _BFGET_(r16,14,14)
    #define   SET16SemaHub_almostEmpty_ST_30i(r16,v)           _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_almostEmpty_ST_31i(r32)             _BFGET_(r32,31,31)
    #define   SET32SemaHub_almostEmpty_ST_31i(r32,v)           _BFSET_(r32,31,31,v)
    #define   GET16SemaHub_almostEmpty_ST_31i(r16)             _BFGET_(r16,15,15)
    #define   SET16SemaHub_almostEmpty_ST_31i(r16,v)           _BFSET_(r16,15,15,v)

    #define     w32SemaHub_almostEmpty                         {\
            UNSG32 ualmostEmpty_ST_0i                          :  1;\
            UNSG32 ualmostEmpty_ST_1i                          :  1;\
            UNSG32 ualmostEmpty_ST_2i                          :  1;\
            UNSG32 ualmostEmpty_ST_3i                          :  1;\
            UNSG32 ualmostEmpty_ST_4i                          :  1;\
            UNSG32 ualmostEmpty_ST_5i                          :  1;\
            UNSG32 ualmostEmpty_ST_6i                          :  1;\
            UNSG32 ualmostEmpty_ST_7i                          :  1;\
            UNSG32 ualmostEmpty_ST_8i                          :  1;\
            UNSG32 ualmostEmpty_ST_9i                          :  1;\
            UNSG32 ualmostEmpty_ST_10i                         :  1;\
            UNSG32 ualmostEmpty_ST_11i                         :  1;\
            UNSG32 ualmostEmpty_ST_12i                         :  1;\
            UNSG32 ualmostEmpty_ST_13i                         :  1;\
            UNSG32 ualmostEmpty_ST_14i                         :  1;\
            UNSG32 ualmostEmpty_ST_15i                         :  1;\
            UNSG32 ualmostEmpty_ST_16i                         :  1;\
            UNSG32 ualmostEmpty_ST_17i                         :  1;\
            UNSG32 ualmostEmpty_ST_18i                         :  1;\
            UNSG32 ualmostEmpty_ST_19i                         :  1;\
            UNSG32 ualmostEmpty_ST_20i                         :  1;\
            UNSG32 ualmostEmpty_ST_21i                         :  1;\
            UNSG32 ualmostEmpty_ST_22i                         :  1;\
            UNSG32 ualmostEmpty_ST_23i                         :  1;\
            UNSG32 ualmostEmpty_ST_24i                         :  1;\
            UNSG32 ualmostEmpty_ST_25i                         :  1;\
            UNSG32 ualmostEmpty_ST_26i                         :  1;\
            UNSG32 ualmostEmpty_ST_27i                         :  1;\
            UNSG32 ualmostEmpty_ST_28i                         :  1;\
            UNSG32 ualmostEmpty_ST_29i                         :  1;\
            UNSG32 ualmostEmpty_ST_30i                         :  1;\
            UNSG32 ualmostEmpty_ST_31i                         :  1;\
          }
    union { UNSG32 u32SemaHub_almostEmpty;
            struct w32SemaHub_almostEmpty;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SemaHub_almostFull_ST_0i(r32)               _BFGET_(r32, 0, 0)
    #define   SET32SemaHub_almostFull_ST_0i(r32,v)             _BFSET_(r32, 0, 0,v)
    #define   GET16SemaHub_almostFull_ST_0i(r16)               _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_almostFull_ST_0i(r16,v)             _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_almostFull_ST_1i(r32)               _BFGET_(r32, 1, 1)
    #define   SET32SemaHub_almostFull_ST_1i(r32,v)             _BFSET_(r32, 1, 1,v)
    #define   GET16SemaHub_almostFull_ST_1i(r16)               _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_almostFull_ST_1i(r16,v)             _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_almostFull_ST_2i(r32)               _BFGET_(r32, 2, 2)
    #define   SET32SemaHub_almostFull_ST_2i(r32,v)             _BFSET_(r32, 2, 2,v)
    #define   GET16SemaHub_almostFull_ST_2i(r16)               _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_almostFull_ST_2i(r16,v)             _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_almostFull_ST_3i(r32)               _BFGET_(r32, 3, 3)
    #define   SET32SemaHub_almostFull_ST_3i(r32,v)             _BFSET_(r32, 3, 3,v)
    #define   GET16SemaHub_almostFull_ST_3i(r16)               _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_almostFull_ST_3i(r16,v)             _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_almostFull_ST_4i(r32)               _BFGET_(r32, 4, 4)
    #define   SET32SemaHub_almostFull_ST_4i(r32,v)             _BFSET_(r32, 4, 4,v)
    #define   GET16SemaHub_almostFull_ST_4i(r16)               _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_almostFull_ST_4i(r16,v)             _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_almostFull_ST_5i(r32)               _BFGET_(r32, 5, 5)
    #define   SET32SemaHub_almostFull_ST_5i(r32,v)             _BFSET_(r32, 5, 5,v)
    #define   GET16SemaHub_almostFull_ST_5i(r16)               _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_almostFull_ST_5i(r16,v)             _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_almostFull_ST_6i(r32)               _BFGET_(r32, 6, 6)
    #define   SET32SemaHub_almostFull_ST_6i(r32,v)             _BFSET_(r32, 6, 6,v)
    #define   GET16SemaHub_almostFull_ST_6i(r16)               _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_almostFull_ST_6i(r16,v)             _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_almostFull_ST_7i(r32)               _BFGET_(r32, 7, 7)
    #define   SET32SemaHub_almostFull_ST_7i(r32,v)             _BFSET_(r32, 7, 7,v)
    #define   GET16SemaHub_almostFull_ST_7i(r16)               _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_almostFull_ST_7i(r16,v)             _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_almostFull_ST_8i(r32)               _BFGET_(r32, 8, 8)
    #define   SET32SemaHub_almostFull_ST_8i(r32,v)             _BFSET_(r32, 8, 8,v)
    #define   GET16SemaHub_almostFull_ST_8i(r16)               _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_almostFull_ST_8i(r16,v)             _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_almostFull_ST_9i(r32)               _BFGET_(r32, 9, 9)
    #define   SET32SemaHub_almostFull_ST_9i(r32,v)             _BFSET_(r32, 9, 9,v)
    #define   GET16SemaHub_almostFull_ST_9i(r16)               _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_almostFull_ST_9i(r16,v)             _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_almostFull_ST_10i(r32)              _BFGET_(r32,10,10)
    #define   SET32SemaHub_almostFull_ST_10i(r32,v)            _BFSET_(r32,10,10,v)
    #define   GET16SemaHub_almostFull_ST_10i(r16)              _BFGET_(r16,10,10)
    #define   SET16SemaHub_almostFull_ST_10i(r16,v)            _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_almostFull_ST_11i(r32)              _BFGET_(r32,11,11)
    #define   SET32SemaHub_almostFull_ST_11i(r32,v)            _BFSET_(r32,11,11,v)
    #define   GET16SemaHub_almostFull_ST_11i(r16)              _BFGET_(r16,11,11)
    #define   SET16SemaHub_almostFull_ST_11i(r16,v)            _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_almostFull_ST_12i(r32)              _BFGET_(r32,12,12)
    #define   SET32SemaHub_almostFull_ST_12i(r32,v)            _BFSET_(r32,12,12,v)
    #define   GET16SemaHub_almostFull_ST_12i(r16)              _BFGET_(r16,12,12)
    #define   SET16SemaHub_almostFull_ST_12i(r16,v)            _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_almostFull_ST_13i(r32)              _BFGET_(r32,13,13)
    #define   SET32SemaHub_almostFull_ST_13i(r32,v)            _BFSET_(r32,13,13,v)
    #define   GET16SemaHub_almostFull_ST_13i(r16)              _BFGET_(r16,13,13)
    #define   SET16SemaHub_almostFull_ST_13i(r16,v)            _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_almostFull_ST_14i(r32)              _BFGET_(r32,14,14)
    #define   SET32SemaHub_almostFull_ST_14i(r32,v)            _BFSET_(r32,14,14,v)
    #define   GET16SemaHub_almostFull_ST_14i(r16)              _BFGET_(r16,14,14)
    #define   SET16SemaHub_almostFull_ST_14i(r16,v)            _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_almostFull_ST_15i(r32)              _BFGET_(r32,15,15)
    #define   SET32SemaHub_almostFull_ST_15i(r32,v)            _BFSET_(r32,15,15,v)
    #define   GET16SemaHub_almostFull_ST_15i(r16)              _BFGET_(r16,15,15)
    #define   SET16SemaHub_almostFull_ST_15i(r16,v)            _BFSET_(r16,15,15,v)

    #define   GET32SemaHub_almostFull_ST_16i(r32)              _BFGET_(r32,16,16)
    #define   SET32SemaHub_almostFull_ST_16i(r32,v)            _BFSET_(r32,16,16,v)
    #define   GET16SemaHub_almostFull_ST_16i(r16)              _BFGET_(r16, 0, 0)
    #define   SET16SemaHub_almostFull_ST_16i(r16,v)            _BFSET_(r16, 0, 0,v)

    #define   GET32SemaHub_almostFull_ST_17i(r32)              _BFGET_(r32,17,17)
    #define   SET32SemaHub_almostFull_ST_17i(r32,v)            _BFSET_(r32,17,17,v)
    #define   GET16SemaHub_almostFull_ST_17i(r16)              _BFGET_(r16, 1, 1)
    #define   SET16SemaHub_almostFull_ST_17i(r16,v)            _BFSET_(r16, 1, 1,v)

    #define   GET32SemaHub_almostFull_ST_18i(r32)              _BFGET_(r32,18,18)
    #define   SET32SemaHub_almostFull_ST_18i(r32,v)            _BFSET_(r32,18,18,v)
    #define   GET16SemaHub_almostFull_ST_18i(r16)              _BFGET_(r16, 2, 2)
    #define   SET16SemaHub_almostFull_ST_18i(r16,v)            _BFSET_(r16, 2, 2,v)

    #define   GET32SemaHub_almostFull_ST_19i(r32)              _BFGET_(r32,19,19)
    #define   SET32SemaHub_almostFull_ST_19i(r32,v)            _BFSET_(r32,19,19,v)
    #define   GET16SemaHub_almostFull_ST_19i(r16)              _BFGET_(r16, 3, 3)
    #define   SET16SemaHub_almostFull_ST_19i(r16,v)            _BFSET_(r16, 3, 3,v)

    #define   GET32SemaHub_almostFull_ST_20i(r32)              _BFGET_(r32,20,20)
    #define   SET32SemaHub_almostFull_ST_20i(r32,v)            _BFSET_(r32,20,20,v)
    #define   GET16SemaHub_almostFull_ST_20i(r16)              _BFGET_(r16, 4, 4)
    #define   SET16SemaHub_almostFull_ST_20i(r16,v)            _BFSET_(r16, 4, 4,v)

    #define   GET32SemaHub_almostFull_ST_21i(r32)              _BFGET_(r32,21,21)
    #define   SET32SemaHub_almostFull_ST_21i(r32,v)            _BFSET_(r32,21,21,v)
    #define   GET16SemaHub_almostFull_ST_21i(r16)              _BFGET_(r16, 5, 5)
    #define   SET16SemaHub_almostFull_ST_21i(r16,v)            _BFSET_(r16, 5, 5,v)

    #define   GET32SemaHub_almostFull_ST_22i(r32)              _BFGET_(r32,22,22)
    #define   SET32SemaHub_almostFull_ST_22i(r32,v)            _BFSET_(r32,22,22,v)
    #define   GET16SemaHub_almostFull_ST_22i(r16)              _BFGET_(r16, 6, 6)
    #define   SET16SemaHub_almostFull_ST_22i(r16,v)            _BFSET_(r16, 6, 6,v)

    #define   GET32SemaHub_almostFull_ST_23i(r32)              _BFGET_(r32,23,23)
    #define   SET32SemaHub_almostFull_ST_23i(r32,v)            _BFSET_(r32,23,23,v)
    #define   GET16SemaHub_almostFull_ST_23i(r16)              _BFGET_(r16, 7, 7)
    #define   SET16SemaHub_almostFull_ST_23i(r16,v)            _BFSET_(r16, 7, 7,v)

    #define   GET32SemaHub_almostFull_ST_24i(r32)              _BFGET_(r32,24,24)
    #define   SET32SemaHub_almostFull_ST_24i(r32,v)            _BFSET_(r32,24,24,v)
    #define   GET16SemaHub_almostFull_ST_24i(r16)              _BFGET_(r16, 8, 8)
    #define   SET16SemaHub_almostFull_ST_24i(r16,v)            _BFSET_(r16, 8, 8,v)

    #define   GET32SemaHub_almostFull_ST_25i(r32)              _BFGET_(r32,25,25)
    #define   SET32SemaHub_almostFull_ST_25i(r32,v)            _BFSET_(r32,25,25,v)
    #define   GET16SemaHub_almostFull_ST_25i(r16)              _BFGET_(r16, 9, 9)
    #define   SET16SemaHub_almostFull_ST_25i(r16,v)            _BFSET_(r16, 9, 9,v)

    #define   GET32SemaHub_almostFull_ST_26i(r32)              _BFGET_(r32,26,26)
    #define   SET32SemaHub_almostFull_ST_26i(r32,v)            _BFSET_(r32,26,26,v)
    #define   GET16SemaHub_almostFull_ST_26i(r16)              _BFGET_(r16,10,10)
    #define   SET16SemaHub_almostFull_ST_26i(r16,v)            _BFSET_(r16,10,10,v)

    #define   GET32SemaHub_almostFull_ST_27i(r32)              _BFGET_(r32,27,27)
    #define   SET32SemaHub_almostFull_ST_27i(r32,v)            _BFSET_(r32,27,27,v)
    #define   GET16SemaHub_almostFull_ST_27i(r16)              _BFGET_(r16,11,11)
    #define   SET16SemaHub_almostFull_ST_27i(r16,v)            _BFSET_(r16,11,11,v)

    #define   GET32SemaHub_almostFull_ST_28i(r32)              _BFGET_(r32,28,28)
    #define   SET32SemaHub_almostFull_ST_28i(r32,v)            _BFSET_(r32,28,28,v)
    #define   GET16SemaHub_almostFull_ST_28i(r16)              _BFGET_(r16,12,12)
    #define   SET16SemaHub_almostFull_ST_28i(r16,v)            _BFSET_(r16,12,12,v)

    #define   GET32SemaHub_almostFull_ST_29i(r32)              _BFGET_(r32,29,29)
    #define   SET32SemaHub_almostFull_ST_29i(r32,v)            _BFSET_(r32,29,29,v)
    #define   GET16SemaHub_almostFull_ST_29i(r16)              _BFGET_(r16,13,13)
    #define   SET16SemaHub_almostFull_ST_29i(r16,v)            _BFSET_(r16,13,13,v)

    #define   GET32SemaHub_almostFull_ST_30i(r32)              _BFGET_(r32,30,30)
    #define   SET32SemaHub_almostFull_ST_30i(r32,v)            _BFSET_(r32,30,30,v)
    #define   GET16SemaHub_almostFull_ST_30i(r16)              _BFGET_(r16,14,14)
    #define   SET16SemaHub_almostFull_ST_30i(r16,v)            _BFSET_(r16,14,14,v)

    #define   GET32SemaHub_almostFull_ST_31i(r32)              _BFGET_(r32,31,31)
    #define   SET32SemaHub_almostFull_ST_31i(r32,v)            _BFSET_(r32,31,31,v)
    #define   GET16SemaHub_almostFull_ST_31i(r16)              _BFGET_(r16,15,15)
    #define   SET16SemaHub_almostFull_ST_31i(r16,v)            _BFSET_(r16,15,15,v)

    #define     w32SemaHub_almostFull                          {\
            UNSG32 ualmostFull_ST_0i                           :  1;\
            UNSG32 ualmostFull_ST_1i                           :  1;\
            UNSG32 ualmostFull_ST_2i                           :  1;\
            UNSG32 ualmostFull_ST_3i                           :  1;\
            UNSG32 ualmostFull_ST_4i                           :  1;\
            UNSG32 ualmostFull_ST_5i                           :  1;\
            UNSG32 ualmostFull_ST_6i                           :  1;\
            UNSG32 ualmostFull_ST_7i                           :  1;\
            UNSG32 ualmostFull_ST_8i                           :  1;\
            UNSG32 ualmostFull_ST_9i                           :  1;\
            UNSG32 ualmostFull_ST_10i                          :  1;\
            UNSG32 ualmostFull_ST_11i                          :  1;\
            UNSG32 ualmostFull_ST_12i                          :  1;\
            UNSG32 ualmostFull_ST_13i                          :  1;\
            UNSG32 ualmostFull_ST_14i                          :  1;\
            UNSG32 ualmostFull_ST_15i                          :  1;\
            UNSG32 ualmostFull_ST_16i                          :  1;\
            UNSG32 ualmostFull_ST_17i                          :  1;\
            UNSG32 ualmostFull_ST_18i                          :  1;\
            UNSG32 ualmostFull_ST_19i                          :  1;\
            UNSG32 ualmostFull_ST_20i                          :  1;\
            UNSG32 ualmostFull_ST_21i                          :  1;\
            UNSG32 ualmostFull_ST_22i                          :  1;\
            UNSG32 ualmostFull_ST_23i                          :  1;\
            UNSG32 ualmostFull_ST_24i                          :  1;\
            UNSG32 ualmostFull_ST_25i                          :  1;\
            UNSG32 ualmostFull_ST_26i                          :  1;\
            UNSG32 ualmostFull_ST_27i                          :  1;\
            UNSG32 ualmostFull_ST_28i                          :  1;\
            UNSG32 ualmostFull_ST_29i                          :  1;\
            UNSG32 ualmostFull_ST_30i                          :  1;\
            UNSG32 ualmostFull_ST_31i                          :  1;\
          }
    union { UNSG32 u32SemaHub_almostFull;
            struct w32SemaHub_almostFull;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx398                                    [104];
    ///////////////////////////////////////////////////////////
    } SIE_SemaHub;

    typedef union  T32SemaHub_PUSH
          { UNSG32 u32;
            struct w32SemaHub_PUSH;
                 } T32SemaHub_PUSH;
    typedef union  T32SemaHub_POP
          { UNSG32 u32;
            struct w32SemaHub_POP;
                 } T32SemaHub_POP;
    typedef union  T32SemaHub_empty
          { UNSG32 u32;
            struct w32SemaHub_empty;
                 } T32SemaHub_empty;
    typedef union  T32SemaHub_full
          { UNSG32 u32;
            struct w32SemaHub_full;
                 } T32SemaHub_full;
    typedef union  T32SemaHub_almostEmpty
          { UNSG32 u32;
            struct w32SemaHub_almostEmpty;
                 } T32SemaHub_almostEmpty;
    typedef union  T32SemaHub_almostFull
          { UNSG32 u32;
            struct w32SemaHub_almostFull;
                 } T32SemaHub_almostFull;
    ///////////////////////////////////////////////////////////

    typedef union  TSemaHub_PUSH
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_PUSH;
                   };
                 } TSemaHub_PUSH;
    typedef union  TSemaHub_POP
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_POP;
                   };
                 } TSemaHub_POP;
    typedef union  TSemaHub_empty
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_empty;
                   };
                 } TSemaHub_empty;
    typedef union  TSemaHub_full
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_full;
                   };
                 } TSemaHub_full;
    typedef union  TSemaHub_almostEmpty
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_almostEmpty;
                   };
                 } TSemaHub_almostEmpty;
    typedef union  TSemaHub_almostFull
          { UNSG32 u32[1];
            struct {
            struct w32SemaHub_almostFull;
                   };
                 } TSemaHub_almostFull;

    ///////////////////////////////////////////////////////////
     SIGN32 SemaHub_drvrd(SIE_SemaHub *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SemaHub_drvwr(SIE_SemaHub *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SemaHub_reset(SIE_SemaHub *p);
     SIGN32 SemaHub_cmp  (SIE_SemaHub *p, SIE_SemaHub *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SemaHub_check(p,pie,pfx,hLOG) SemaHub_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SemaHub_print(p,    pfx,hLOG) SemaHub_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SemaHub
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FiFo                    biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (W-)
///               %unsigned 20 BASE                      
///                                    ###
///                                    * Base address (byte-address) of a FIFO in the shared SRAM. A channel's read/write pointers will be added to this “BASE” to get exact location of shared SRAM.
///                                    * Note: aligned with base SRAM data bus.
///                                    * For example, if SRAM data is 64-bit, then base[2:0] should be 3'b0;
///                                    ###
///               %%        12         # Stuffing bits...
///     @ 0x00004 START                (W-)
///               %unsigned 1  EN                        0x0
///                                    ###
///                                    * Write 1 to this register will enable this channel, or 0 to this register will disable this channel.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00008 CLEAR                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * Write anything to clear FIFO pointers to 0.
///                                    * Note :
///                                    * CPU should make sure to disabled the channel (write 0 to START_EN register) before issue clear command, otherwise the clear request will be ignored.
///                                    * Do not restart the channel when clear operation is in process.
///                                    * HW will make sure there is no pending transactions before execute the clear operation.
///                                    * Associated semaphore cell needs reset separately by re-write “CFG_DEPTH”
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0000C FLUSH                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * No support for now
///                                    ###
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      16B, bits:      23b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FiFo
#define h_FiFo (){}

    #define     RA_FiFo_CFG                                    0x0000

    #define     BA_FiFo_CFG_BASE                               0x0000
    #define     B16FiFo_CFG_BASE                               0x0000
    #define   LSb32FiFo_CFG_BASE                                  0
    #define   LSb16FiFo_CFG_BASE                                  0
    #define       bFiFo_CFG_BASE                               20
    #define   MSK32FiFo_CFG_BASE                                  0x000FFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FiFo_START                                  0x0004

    #define     BA_FiFo_START_EN                               0x0004
    #define     B16FiFo_START_EN                               0x0004
    #define   LSb32FiFo_START_EN                                  0
    #define   LSb16FiFo_START_EN                                  0
    #define       bFiFo_START_EN                               1
    #define   MSK32FiFo_START_EN                                  0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FiFo_CLEAR                                  0x0008

    #define     BA_FiFo_CLEAR_EN                               0x0008
    #define     B16FiFo_CLEAR_EN                               0x0008
    #define   LSb32FiFo_CLEAR_EN                                  0
    #define   LSb16FiFo_CLEAR_EN                                  0
    #define       bFiFo_CLEAR_EN                               1
    #define   MSK32FiFo_CLEAR_EN                                  0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FiFo_FLUSH                                  0x000C

    #define     BA_FiFo_FLUSH_EN                               0x000C
    #define     B16FiFo_FLUSH_EN                               0x000C
    #define   LSb32FiFo_FLUSH_EN                                  0
    #define   LSb16FiFo_FLUSH_EN                                  0
    #define       bFiFo_FLUSH_EN                               1
    #define   MSK32FiFo_FLUSH_EN                                  0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FiFo {
    ///////////////////////////////////////////////////////////
    #define   GET32FiFo_CFG_BASE(r32)                          _BFGET_(r32,19, 0)
    #define   SET32FiFo_CFG_BASE(r32,v)                        _BFSET_(r32,19, 0,v)

    #define     w32FiFo_CFG                                    {\
            UNSG32 uCFG_BASE                                   : 20;\
            UNSG32 RSVDx0_b20                                  : 12;\
          }
    union { UNSG32 u32FiFo_CFG;
            struct w32FiFo_CFG;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FiFo_START_EN(r32)                          _BFGET_(r32, 0, 0)
    #define   SET32FiFo_START_EN(r32,v)                        _BFSET_(r32, 0, 0,v)
    #define   GET16FiFo_START_EN(r16)                          _BFGET_(r16, 0, 0)
    #define   SET16FiFo_START_EN(r16,v)                        _BFSET_(r16, 0, 0,v)

    #define     w32FiFo_START                                  {\
            UNSG32 uSTART_EN                                   :  1;\
            UNSG32 RSVDx4_b1                                   : 31;\
          }
    union { UNSG32 u32FiFo_START;
            struct w32FiFo_START;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FiFo_CLEAR_EN(r32)                          _BFGET_(r32, 0, 0)
    #define   SET32FiFo_CLEAR_EN(r32,v)                        _BFSET_(r32, 0, 0,v)
    #define   GET16FiFo_CLEAR_EN(r16)                          _BFGET_(r16, 0, 0)
    #define   SET16FiFo_CLEAR_EN(r16,v)                        _BFSET_(r16, 0, 0,v)

    #define     w32FiFo_CLEAR                                  {\
            UNSG32 uCLEAR_EN                                   :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32FiFo_CLEAR;
            struct w32FiFo_CLEAR;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FiFo_FLUSH_EN(r32)                          _BFGET_(r32, 0, 0)
    #define   SET32FiFo_FLUSH_EN(r32,v)                        _BFSET_(r32, 0, 0,v)
    #define   GET16FiFo_FLUSH_EN(r16)                          _BFGET_(r16, 0, 0)
    #define   SET16FiFo_FLUSH_EN(r16,v)                        _BFSET_(r16, 0, 0,v)

    #define     w32FiFo_FLUSH                                  {\
            UNSG32 uFLUSH_EN                                   :  1;\
            UNSG32 RSVDxC_b1                                   : 31;\
          }
    union { UNSG32 u32FiFo_FLUSH;
            struct w32FiFo_FLUSH;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FiFo;

    typedef union  T32FiFo_CFG
          { UNSG32 u32;
            struct w32FiFo_CFG;
                 } T32FiFo_CFG;
    typedef union  T32FiFo_START
          { UNSG32 u32;
            struct w32FiFo_START;
                 } T32FiFo_START;
    typedef union  T32FiFo_CLEAR
          { UNSG32 u32;
            struct w32FiFo_CLEAR;
                 } T32FiFo_CLEAR;
    typedef union  T32FiFo_FLUSH
          { UNSG32 u32;
            struct w32FiFo_FLUSH;
                 } T32FiFo_FLUSH;
    ///////////////////////////////////////////////////////////

    typedef union  TFiFo_CFG
          { UNSG32 u32[1];
            struct {
            struct w32FiFo_CFG;
                   };
                 } TFiFo_CFG;
    typedef union  TFiFo_START
          { UNSG32 u32[1];
            struct {
            struct w32FiFo_START;
                   };
                 } TFiFo_START;
    typedef union  TFiFo_CLEAR
          { UNSG32 u32[1];
            struct {
            struct w32FiFo_CLEAR;
                   };
                 } TFiFo_CLEAR;
    typedef union  TFiFo_FLUSH
          { UNSG32 u32[1];
            struct {
            struct w32FiFo_FLUSH;
                   };
                 } TFiFo_FLUSH;

    ///////////////////////////////////////////////////////////
     SIGN32 FiFo_drvrd(SIE_FiFo *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FiFo_drvwr(SIE_FiFo *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FiFo_reset(SIE_FiFo *p);
     SIGN32 FiFo_cmp  (SIE_FiFo *p, SIE_FiFo *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FiFo_check(p,pie,pfx,hLOG) FiFo_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FiFo_print(p,    pfx,hLOG) FiFo_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FiFo
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE HBO                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 FiFoCtl              
///               $SemaHub             FiFoCtl           REG          
///     @ 0x00400 ARR                  (P)
///     # 0x00400 FiFo                 
///               $FiFo                FiFo              REG      [32]
///                                    ###
///                                    * Up-to 32 FIFO channels
///                                    * FiFo[N] is controlled by HBO.FiFoCtl.Channel[N]
///                                    ###
///     @ 0x00600 BUSY                 (R-)
///               %unsigned 32 ST                        
///                                    ###
///                                    * Per channel status
///                                    * Indicate the clear operation status.
///                                    * 1: clear is in process.
///                                    * 0 : clear is done.
///                                    ###
///     @ 0x00604                      (W-)
///     #         # Stuffing bytes...
///               %% 2016
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    1792B, bits:    1920b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_HBO
#define h_HBO (){}

    #define     RA_HBO_FiFoCtl                                 0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_HBO_ARR                                     0x0400
    #define     RA_HBO_FiFo                                    0x0400
    ///////////////////////////////////////////////////////////
    #define     RA_HBO_BUSY                                    0x0600

    #define     BA_HBO_BUSY_ST                                 0x0600
    #define     B16HBO_BUSY_ST                                 0x0600
    #define   LSb32HBO_BUSY_ST                                    0
    #define   LSb16HBO_BUSY_ST                                    0
    #define       bHBO_BUSY_ST                                 32
    #define   MSK32HBO_BUSY_ST                                    0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_HBO {
    ///////////////////////////////////////////////////////////
              SIE_SemaHub                                      ie_FiFoCtl;
    ///////////////////////////////////////////////////////////
              SIE_FiFo                                         ie_FiFo[32];
    ///////////////////////////////////////////////////////////
    #define   GET32HBO_BUSY_ST(r32)                            _BFGET_(r32,31, 0)
    #define   SET32HBO_BUSY_ST(r32,v)                          _BFSET_(r32,31, 0,v)

    #define     w32HBO_BUSY                                    {\
            UNSG32 uBUSY_ST                                    : 32;\
          }
    union { UNSG32 u32HBO_BUSY;
            struct w32HBO_BUSY;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx604                                    [252];
    ///////////////////////////////////////////////////////////
    } SIE_HBO;

    typedef union  T32HBO_BUSY
          { UNSG32 u32;
            struct w32HBO_BUSY;
                 } T32HBO_BUSY;
    ///////////////////////////////////////////////////////////

    typedef union  THBO_BUSY
          { UNSG32 u32[1];
            struct {
            struct w32HBO_BUSY;
                   };
                 } THBO_BUSY;

    ///////////////////////////////////////////////////////////
     SIGN32 HBO_drvrd(SIE_HBO *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 HBO_drvwr(SIE_HBO *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void HBO_reset(SIE_HBO *p);
     SIGN32 HBO_cmp  (SIE_HBO *p, SIE_HBO *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define HBO_check(p,pie,pfx,hLOG) HBO_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define HBO_print(p,    pfx,hLOG) HBO_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: HBO
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE LLDesFmt                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 mem                  (P)
///               %unsigned 16 size                      
///                                    ###
///                                    * The size of one piece of scattered memory.
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_LLDesFmt
#define h_LLDesFmt (){}

    #define     RA_LLDesFmt_mem                                0x0000

    #define     BA_LLDesFmt_mem_size                           0x0000
    #define     B16LLDesFmt_mem_size                           0x0000
    #define   LSb32LLDesFmt_mem_size                              0
    #define   LSb16LLDesFmt_mem_size                              0
    #define       bLLDesFmt_mem_size                           16
    #define   MSK32LLDesFmt_mem_size                              0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_LLDesFmt {
    ///////////////////////////////////////////////////////////
    #define   GET32LLDesFmt_mem_size(r32)                      _BFGET_(r32,15, 0)
    #define   SET32LLDesFmt_mem_size(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16LLDesFmt_mem_size(r16)                      _BFGET_(r16,15, 0)
    #define   SET16LLDesFmt_mem_size(r16,v)                    _BFSET_(r16,15, 0,v)

    #define     w32LLDesFmt_mem                                {\
            UNSG32 umem_size                                   : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32LLDesFmt_mem;
            struct w32LLDesFmt_mem;
          };
    ///////////////////////////////////////////////////////////
    } SIE_LLDesFmt;

    typedef union  T32LLDesFmt_mem
          { UNSG32 u32;
            struct w32LLDesFmt_mem;
                 } T32LLDesFmt_mem;
    ///////////////////////////////////////////////////////////

    typedef union  TLLDesFmt_mem
          { UNSG32 u32[1];
            struct {
            struct w32LLDesFmt_mem;
                   };
                 } TLLDesFmt_mem;

    ///////////////////////////////////////////////////////////
     SIGN32 LLDesFmt_drvrd(SIE_LLDesFmt *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 LLDesFmt_drvwr(SIE_LLDesFmt *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void LLDesFmt_reset(SIE_LLDesFmt *p);
     SIGN32 LLDesFmt_cmp  (SIE_LLDesFmt *p, SIE_LLDesFmt *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define LLDesFmt_check(p,pie,pfx,hLOG) LLDesFmt_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define LLDesFmt_print(p,    pfx,hLOG) LLDesFmt_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: LLDesFmt
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubCmdHDR                               (4,4)
///     ###
///     * 32-bit dHub command header
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 DESC                 (W-)
///               %unsigned 16 size                      
///                                    ###
///                                    * amount of data to be transferred, in bytes or MTU.
///                                    * Size of 0 is forbidden.
///                                    ###
///               %unsigned 1  sizeMTU                   
///                                    ###
///                                    * 0: size given in bytes;
///                                    * 1: size given in MTU (see dHubChCtl.CFG.MTU for MTU size definition)
///                                    ###
///               %unsigned 1  semOpMTU                  
///                                    ###
///                                    * 0: semaphore operations applied on dHubCmd level
///                                    * 1: semaphore operations applied on MTU level
///                                    ###
///               %unsigned 5  chkSemId                  
///                                    ###
///                                    * ID of semaphore to check before cmd / MTU;
///                                    * 0 indicates semaphore check is disabled
///                                    ###
///               %unsigned 5  updSemId                  
///                                    ###
///                                    * ID of semaphore to update after cmd / MTU;
///                                    * 0 indicates semaphore update is disabled
///                                    ###
///               %unsigned 1  interrupt                 
///                                    ###
///                                    * 1: raise interrupt upon command finish
///                                    * end dHubCmdHDR
///                                    ###
///               %%        3          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      29b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubCmdHDR
#define h_dHubCmdHDR (){}

    #define     RA_dHubCmdHDR_DESC                             0x0000

    #define     BA_dHubCmdHDR_DESC_size                        0x0000
    #define     B16dHubCmdHDR_DESC_size                        0x0000
    #define   LSb32dHubCmdHDR_DESC_size                           0
    #define   LSb16dHubCmdHDR_DESC_size                           0
    #define       bdHubCmdHDR_DESC_size                        16
    #define   MSK32dHubCmdHDR_DESC_size                           0x0000FFFF

    #define     BA_dHubCmdHDR_DESC_sizeMTU                     0x0002
    #define     B16dHubCmdHDR_DESC_sizeMTU                     0x0002
    #define   LSb32dHubCmdHDR_DESC_sizeMTU                        16
    #define   LSb16dHubCmdHDR_DESC_sizeMTU                        0
    #define       bdHubCmdHDR_DESC_sizeMTU                     1
    #define   MSK32dHubCmdHDR_DESC_sizeMTU                        0x00010000

    #define     BA_dHubCmdHDR_DESC_semOpMTU                    0x0002
    #define     B16dHubCmdHDR_DESC_semOpMTU                    0x0002
    #define   LSb32dHubCmdHDR_DESC_semOpMTU                       17
    #define   LSb16dHubCmdHDR_DESC_semOpMTU                       1
    #define       bdHubCmdHDR_DESC_semOpMTU                    1
    #define   MSK32dHubCmdHDR_DESC_semOpMTU                       0x00020000

    #define     BA_dHubCmdHDR_DESC_chkSemId                    0x0002
    #define     B16dHubCmdHDR_DESC_chkSemId                    0x0002
    #define   LSb32dHubCmdHDR_DESC_chkSemId                       18
    #define   LSb16dHubCmdHDR_DESC_chkSemId                       2
    #define       bdHubCmdHDR_DESC_chkSemId                    5
    #define   MSK32dHubCmdHDR_DESC_chkSemId                       0x007C0000

    #define     BA_dHubCmdHDR_DESC_updSemId                    0x0002
    #define     B16dHubCmdHDR_DESC_updSemId                    0x0002
    #define   LSb32dHubCmdHDR_DESC_updSemId                       23
    #define   LSb16dHubCmdHDR_DESC_updSemId                       7
    #define       bdHubCmdHDR_DESC_updSemId                    5
    #define   MSK32dHubCmdHDR_DESC_updSemId                       0x0F800000

    #define     BA_dHubCmdHDR_DESC_interrupt                   0x0003
    #define     B16dHubCmdHDR_DESC_interrupt                   0x0002
    #define   LSb32dHubCmdHDR_DESC_interrupt                      28
    #define   LSb16dHubCmdHDR_DESC_interrupt                      12
    #define       bdHubCmdHDR_DESC_interrupt                   1
    #define   MSK32dHubCmdHDR_DESC_interrupt                      0x10000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubCmdHDR {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmdHDR_DESC_size(r32)                   _BFGET_(r32,15, 0)
    #define   SET32dHubCmdHDR_DESC_size(r32,v)                 _BFSET_(r32,15, 0,v)
    #define   GET16dHubCmdHDR_DESC_size(r16)                   _BFGET_(r16,15, 0)
    #define   SET16dHubCmdHDR_DESC_size(r16,v)                 _BFSET_(r16,15, 0,v)

    #define   GET32dHubCmdHDR_DESC_sizeMTU(r32)                _BFGET_(r32,16,16)
    #define   SET32dHubCmdHDR_DESC_sizeMTU(r32,v)              _BFSET_(r32,16,16,v)
    #define   GET16dHubCmdHDR_DESC_sizeMTU(r16)                _BFGET_(r16, 0, 0)
    #define   SET16dHubCmdHDR_DESC_sizeMTU(r16,v)              _BFSET_(r16, 0, 0,v)

    #define   GET32dHubCmdHDR_DESC_semOpMTU(r32)               _BFGET_(r32,17,17)
    #define   SET32dHubCmdHDR_DESC_semOpMTU(r32,v)             _BFSET_(r32,17,17,v)
    #define   GET16dHubCmdHDR_DESC_semOpMTU(r16)               _BFGET_(r16, 1, 1)
    #define   SET16dHubCmdHDR_DESC_semOpMTU(r16,v)             _BFSET_(r16, 1, 1,v)

    #define   GET32dHubCmdHDR_DESC_chkSemId(r32)               _BFGET_(r32,22,18)
    #define   SET32dHubCmdHDR_DESC_chkSemId(r32,v)             _BFSET_(r32,22,18,v)
    #define   GET16dHubCmdHDR_DESC_chkSemId(r16)               _BFGET_(r16, 6, 2)
    #define   SET16dHubCmdHDR_DESC_chkSemId(r16,v)             _BFSET_(r16, 6, 2,v)

    #define   GET32dHubCmdHDR_DESC_updSemId(r32)               _BFGET_(r32,27,23)
    #define   SET32dHubCmdHDR_DESC_updSemId(r32,v)             _BFSET_(r32,27,23,v)
    #define   GET16dHubCmdHDR_DESC_updSemId(r16)               _BFGET_(r16,11, 7)
    #define   SET16dHubCmdHDR_DESC_updSemId(r16,v)             _BFSET_(r16,11, 7,v)

    #define   GET32dHubCmdHDR_DESC_interrupt(r32)              _BFGET_(r32,28,28)
    #define   SET32dHubCmdHDR_DESC_interrupt(r32,v)            _BFSET_(r32,28,28,v)
    #define   GET16dHubCmdHDR_DESC_interrupt(r16)              _BFGET_(r16,12,12)
    #define   SET16dHubCmdHDR_DESC_interrupt(r16,v)            _BFSET_(r16,12,12,v)

    #define     w32dHubCmdHDR_DESC                             {\
            UNSG32 uDESC_size                                  : 16;\
            UNSG32 uDESC_sizeMTU                               :  1;\
            UNSG32 uDESC_semOpMTU                              :  1;\
            UNSG32 uDESC_chkSemId                              :  5;\
            UNSG32 uDESC_updSemId                              :  5;\
            UNSG32 uDESC_interrupt                             :  1;\
            UNSG32 RSVDx0_b29                                  :  3;\
          }
    union { UNSG32 u32dHubCmdHDR_DESC;
            struct w32dHubCmdHDR_DESC;
          };
    ///////////////////////////////////////////////////////////
    } SIE_dHubCmdHDR;

    typedef union  T32dHubCmdHDR_DESC
          { UNSG32 u32;
            struct w32dHubCmdHDR_DESC;
                 } T32dHubCmdHDR_DESC;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubCmdHDR_DESC
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmdHDR_DESC;
                   };
                 } TdHubCmdHDR_DESC;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubCmdHDR_drvrd(SIE_dHubCmdHDR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubCmdHDR_drvwr(SIE_dHubCmdHDR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubCmdHDR_reset(SIE_dHubCmdHDR *p);
     SIGN32 dHubCmdHDR_cmp  (SIE_dHubCmdHDR *p, SIE_dHubCmdHDR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubCmdHDR_check(p,pie,pfx,hLOG) dHubCmdHDR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubCmdHDR_print(p,    pfx,hLOG) dHubCmdHDR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubCmdHDR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubCmd                 biu              (4,4)
///     ###
///     * 64-bit dHub command issued by read/write masters
///     * [0:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 MEM                  (W-)
///               %unsigned 32 addr                      
///                                    ###
///                                    * DRAM data address, in bytes; not necessarily MTU aligned.
///                                    * [32:63]
///                                    ###
///     @ 0x00004                      (P)
///     # 0x00004 HDR                  
///               $dHubCmdHDR          HDR               REG          
///                                    ###
///                                    * end dHubCmd
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      61b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubCmd
#define h_dHubCmd (){}

    #define     RA_dHubCmd_MEM                                 0x0000

    #define     BA_dHubCmd_MEM_addr                            0x0000
    #define     B16dHubCmd_MEM_addr                            0x0000
    #define   LSb32dHubCmd_MEM_addr                               0
    #define   LSb16dHubCmd_MEM_addr                               0
    #define       bdHubCmd_MEM_addr                            32
    #define   MSK32dHubCmd_MEM_addr                               0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd_HDR                                 0x0004
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubCmd {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd_MEM_addr(r32)                       _BFGET_(r32,31, 0)
    #define   SET32dHubCmd_MEM_addr(r32,v)                     _BFSET_(r32,31, 0,v)

    #define     w32dHubCmd_MEM                                 {\
            UNSG32 uMEM_addr                                   : 32;\
          }
    union { UNSG32 u32dHubCmd_MEM;
            struct w32dHubCmd_MEM;
          };
    ///////////////////////////////////////////////////////////
              SIE_dHubCmdHDR                                   ie_HDR;
    ///////////////////////////////////////////////////////////
    } SIE_dHubCmd;

    typedef union  T32dHubCmd_MEM
          { UNSG32 u32;
            struct w32dHubCmd_MEM;
                 } T32dHubCmd_MEM;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubCmd_MEM
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd_MEM;
                   };
                 } TdHubCmd_MEM;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubCmd_drvrd(SIE_dHubCmd *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubCmd_drvwr(SIE_dHubCmd *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubCmd_reset(SIE_dHubCmd *p);
     SIGN32 dHubCmd_cmp  (SIE_dHubCmd *p, SIE_dHubCmd *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubCmd_check(p,pie,pfx,hLOG) dHubCmd_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubCmd_print(p,    pfx,hLOG) dHubCmd_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubCmd
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubChannel             biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (W-)
///               %unsigned 2  MTU                       
///                                    : 8byte                     0x0
///                                    : 32byte                    0x1
///                                    : 128byte                   0x2
///                                    : 1024byte                  0x3
///                                                 ###
///                                                 * Minimum transfer unit of the channel
///                                                 ###
///               %unsigned 1  QoS                       
///                                    ###
///                                    * Write 1 to turn on QoS detection
///                                    ###
///               %unsigned 1  selfLoop                  
///                                    ###
///                                    * Write 1 to enable cmd looping support; 0 to turn off
///                                    ###
///               %unsigned 1  intrCtl                   0x0
///                                    : cmdDone                   0x0
///                                    : chIdle                    0x1
///                                                 ###
///                                                 * 0 : default vlaue, the interrupt is triggered by the finish of the dHub command if the interrupt bit is defined in the dHub command.
///                                                 * 1 : The interrupt is triggered if the dHub channel is idle ( no busy and no pending and the corresponding dHub command Q is empty).
///                                                 ###
///               %unsigned 1  hScan                     0x0
///                                    : rastScan                  0x0
///                                    : invScan                   0x1
///                                                 ###
///                                                 * This parameter will only apply to read channels.
///                                                 * It will affect 1D dHub command for the channel.
///                                                 * When scan is set to 1 (invScan), the data (beat) inside the dHub command will be fetched in the inverse order. ie. The data from the last address will come first and the data (beat) from the first address will come lastly.
///                                                 ###
///               %unsigned 1  vScan                     0x0
///                                    : rastScan                  0x0
///                                    : invScan                   0x1
///                                                 ###
///                                                 * This parameter will only apply to read channels.
///                                                 * It will affect 2D channels.
///                                                 * When scan is set to 1 (invScan),
///                                                 * The last address line (1D command) will be fetched first, and the first address line will be fetched lastly.
///                                                 ###
///               %%        25         # Stuffing bits...
///     @ 0x00004 START                (W-)
///               %unsigned 1  EN                        0x0
///                                    ###
///                                    * Write 1 to enable the channel; 0 to pause the channel
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00008 CLEAR                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * Write anything to reset the channel controller state
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0000C FLUSH                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * Write anything to start the data flushing process. Invalid for read (M2H) channels
///                                    * end dHubChannel
///                                    ###
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      16B, bits:      10b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubChannel
#define h_dHubChannel (){}

    #define     RA_dHubChannel_CFG                             0x0000

    #define     BA_dHubChannel_CFG_MTU                         0x0000
    #define     B16dHubChannel_CFG_MTU                         0x0000
    #define   LSb32dHubChannel_CFG_MTU                            0
    #define   LSb16dHubChannel_CFG_MTU                            0
    #define       bdHubChannel_CFG_MTU                         2
    #define   MSK32dHubChannel_CFG_MTU                            0x00000003
    #define        dHubChannel_CFG_MTU_8byte                                0x0
    #define        dHubChannel_CFG_MTU_32byte                               0x1
    #define        dHubChannel_CFG_MTU_128byte                              0x2
    #define        dHubChannel_CFG_MTU_1024byte                             0x3

    #define     BA_dHubChannel_CFG_QoS                         0x0000
    #define     B16dHubChannel_CFG_QoS                         0x0000
    #define   LSb32dHubChannel_CFG_QoS                            2
    #define   LSb16dHubChannel_CFG_QoS                            2
    #define       bdHubChannel_CFG_QoS                         1
    #define   MSK32dHubChannel_CFG_QoS                            0x00000004

    #define     BA_dHubChannel_CFG_selfLoop                    0x0000
    #define     B16dHubChannel_CFG_selfLoop                    0x0000
    #define   LSb32dHubChannel_CFG_selfLoop                       3
    #define   LSb16dHubChannel_CFG_selfLoop                       3
    #define       bdHubChannel_CFG_selfLoop                    1
    #define   MSK32dHubChannel_CFG_selfLoop                       0x00000008

    #define     BA_dHubChannel_CFG_intrCtl                     0x0000
    #define     B16dHubChannel_CFG_intrCtl                     0x0000
    #define   LSb32dHubChannel_CFG_intrCtl                        4
    #define   LSb16dHubChannel_CFG_intrCtl                        4
    #define       bdHubChannel_CFG_intrCtl                     1
    #define   MSK32dHubChannel_CFG_intrCtl                        0x00000010
    #define        dHubChannel_CFG_intrCtl_cmdDone                          0x0
    #define        dHubChannel_CFG_intrCtl_chIdle                           0x1

    #define     BA_dHubChannel_CFG_hScan                       0x0000
    #define     B16dHubChannel_CFG_hScan                       0x0000
    #define   LSb32dHubChannel_CFG_hScan                          5
    #define   LSb16dHubChannel_CFG_hScan                          5
    #define       bdHubChannel_CFG_hScan                       1
    #define   MSK32dHubChannel_CFG_hScan                          0x00000020
    #define        dHubChannel_CFG_hScan_rastScan                           0x0
    #define        dHubChannel_CFG_hScan_invScan                            0x1

    #define     BA_dHubChannel_CFG_vScan                       0x0000
    #define     B16dHubChannel_CFG_vScan                       0x0000
    #define   LSb32dHubChannel_CFG_vScan                          6
    #define   LSb16dHubChannel_CFG_vScan                          6
    #define       bdHubChannel_CFG_vScan                       1
    #define   MSK32dHubChannel_CFG_vScan                          0x00000040
    #define        dHubChannel_CFG_vScan_rastScan                           0x0
    #define        dHubChannel_CFG_vScan_invScan                            0x1
    ///////////////////////////////////////////////////////////
    #define     RA_dHubChannel_START                           0x0004

    #define     BA_dHubChannel_START_EN                        0x0004
    #define     B16dHubChannel_START_EN                        0x0004
    #define   LSb32dHubChannel_START_EN                           0
    #define   LSb16dHubChannel_START_EN                           0
    #define       bdHubChannel_START_EN                        1
    #define   MSK32dHubChannel_START_EN                           0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubChannel_CLEAR                           0x0008

    #define     BA_dHubChannel_CLEAR_EN                        0x0008
    #define     B16dHubChannel_CLEAR_EN                        0x0008
    #define   LSb32dHubChannel_CLEAR_EN                           0
    #define   LSb16dHubChannel_CLEAR_EN                           0
    #define       bdHubChannel_CLEAR_EN                        1
    #define   MSK32dHubChannel_CLEAR_EN                           0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubChannel_FLUSH                           0x000C

    #define     BA_dHubChannel_FLUSH_EN                        0x000C
    #define     B16dHubChannel_FLUSH_EN                        0x000C
    #define   LSb32dHubChannel_FLUSH_EN                           0
    #define   LSb16dHubChannel_FLUSH_EN                           0
    #define       bdHubChannel_FLUSH_EN                        1
    #define   MSK32dHubChannel_FLUSH_EN                           0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubChannel {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubChannel_CFG_MTU(r32)                    _BFGET_(r32, 1, 0)
    #define   SET32dHubChannel_CFG_MTU(r32,v)                  _BFSET_(r32, 1, 0,v)
    #define   GET16dHubChannel_CFG_MTU(r16)                    _BFGET_(r16, 1, 0)
    #define   SET16dHubChannel_CFG_MTU(r16,v)                  _BFSET_(r16, 1, 0,v)

    #define   GET32dHubChannel_CFG_QoS(r32)                    _BFGET_(r32, 2, 2)
    #define   SET32dHubChannel_CFG_QoS(r32,v)                  _BFSET_(r32, 2, 2,v)
    #define   GET16dHubChannel_CFG_QoS(r16)                    _BFGET_(r16, 2, 2)
    #define   SET16dHubChannel_CFG_QoS(r16,v)                  _BFSET_(r16, 2, 2,v)

    #define   GET32dHubChannel_CFG_selfLoop(r32)               _BFGET_(r32, 3, 3)
    #define   SET32dHubChannel_CFG_selfLoop(r32,v)             _BFSET_(r32, 3, 3,v)
    #define   GET16dHubChannel_CFG_selfLoop(r16)               _BFGET_(r16, 3, 3)
    #define   SET16dHubChannel_CFG_selfLoop(r16,v)             _BFSET_(r16, 3, 3,v)

    #define   GET32dHubChannel_CFG_intrCtl(r32)                _BFGET_(r32, 4, 4)
    #define   SET32dHubChannel_CFG_intrCtl(r32,v)              _BFSET_(r32, 4, 4,v)
    #define   GET16dHubChannel_CFG_intrCtl(r16)                _BFGET_(r16, 4, 4)
    #define   SET16dHubChannel_CFG_intrCtl(r16,v)              _BFSET_(r16, 4, 4,v)

    #define   GET32dHubChannel_CFG_hScan(r32)                  _BFGET_(r32, 5, 5)
    #define   SET32dHubChannel_CFG_hScan(r32,v)                _BFSET_(r32, 5, 5,v)
    #define   GET16dHubChannel_CFG_hScan(r16)                  _BFGET_(r16, 5, 5)
    #define   SET16dHubChannel_CFG_hScan(r16,v)                _BFSET_(r16, 5, 5,v)

    #define   GET32dHubChannel_CFG_vScan(r32)                  _BFGET_(r32, 6, 6)
    #define   SET32dHubChannel_CFG_vScan(r32,v)                _BFSET_(r32, 6, 6,v)
    #define   GET16dHubChannel_CFG_vScan(r16)                  _BFGET_(r16, 6, 6)
    #define   SET16dHubChannel_CFG_vScan(r16,v)                _BFSET_(r16, 6, 6,v)

    #define     w32dHubChannel_CFG                             {\
            UNSG32 uCFG_MTU                                    :  2;\
            UNSG32 uCFG_QoS                                    :  1;\
            UNSG32 uCFG_selfLoop                               :  1;\
            UNSG32 uCFG_intrCtl                                :  1;\
            UNSG32 uCFG_hScan                                  :  1;\
            UNSG32 uCFG_vScan                                  :  1;\
            UNSG32 RSVDx0_b7                                   : 25;\
          }
    union { UNSG32 u32dHubChannel_CFG;
            struct w32dHubChannel_CFG;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubChannel_START_EN(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32dHubChannel_START_EN(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16dHubChannel_START_EN(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16dHubChannel_START_EN(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32dHubChannel_START                           {\
            UNSG32 uSTART_EN                                   :  1;\
            UNSG32 RSVDx4_b1                                   : 31;\
          }
    union { UNSG32 u32dHubChannel_START;
            struct w32dHubChannel_START;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubChannel_CLEAR_EN(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32dHubChannel_CLEAR_EN(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16dHubChannel_CLEAR_EN(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16dHubChannel_CLEAR_EN(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32dHubChannel_CLEAR                           {\
            UNSG32 uCLEAR_EN                                   :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32dHubChannel_CLEAR;
            struct w32dHubChannel_CLEAR;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubChannel_FLUSH_EN(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32dHubChannel_FLUSH_EN(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16dHubChannel_FLUSH_EN(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16dHubChannel_FLUSH_EN(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32dHubChannel_FLUSH                           {\
            UNSG32 uFLUSH_EN                                   :  1;\
            UNSG32 RSVDxC_b1                                   : 31;\
          }
    union { UNSG32 u32dHubChannel_FLUSH;
            struct w32dHubChannel_FLUSH;
          };
    ///////////////////////////////////////////////////////////
    } SIE_dHubChannel;

    typedef union  T32dHubChannel_CFG
          { UNSG32 u32;
            struct w32dHubChannel_CFG;
                 } T32dHubChannel_CFG;
    typedef union  T32dHubChannel_START
          { UNSG32 u32;
            struct w32dHubChannel_START;
                 } T32dHubChannel_START;
    typedef union  T32dHubChannel_CLEAR
          { UNSG32 u32;
            struct w32dHubChannel_CLEAR;
                 } T32dHubChannel_CLEAR;
    typedef union  T32dHubChannel_FLUSH
          { UNSG32 u32;
            struct w32dHubChannel_FLUSH;
                 } T32dHubChannel_FLUSH;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubChannel_CFG
          { UNSG32 u32[1];
            struct {
            struct w32dHubChannel_CFG;
                   };
                 } TdHubChannel_CFG;
    typedef union  TdHubChannel_START
          { UNSG32 u32[1];
            struct {
            struct w32dHubChannel_START;
                   };
                 } TdHubChannel_START;
    typedef union  TdHubChannel_CLEAR
          { UNSG32 u32[1];
            struct {
            struct w32dHubChannel_CLEAR;
                   };
                 } TdHubChannel_CLEAR;
    typedef union  TdHubChannel_FLUSH
          { UNSG32 u32[1];
            struct {
            struct w32dHubChannel_FLUSH;
                   };
                 } TdHubChannel_FLUSH;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubChannel_drvrd(SIE_dHubChannel *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubChannel_drvwr(SIE_dHubChannel *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubChannel_reset(SIE_dHubChannel *p);
     SIGN32 dHubChannel_cmp  (SIE_dHubChannel *p, SIE_dHubChannel *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubChannel_check(p,pie,pfx,hLOG) dHubChannel_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubChannel_print(p,    pfx,hLOG) dHubChannel_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubChannel
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubReg                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 SemaHub              
///               $SemaHub             SemaHub           REG          
///                                    ###
///                                    * For dHub internal interrupts, also provide semaphore service for external (all channels will be opened to external to access).
///                                    * Channel 0 is used for dHub.HBO interrupt.
///                                    * Channel N+1 is used for dHub.Channel[N] interrupt.
///                                    ###
///     @ 0x00400                      (P)
///     # 0x00400 HBO                  
///               $HBO                 HBO               REG          
///                                    ###
///                                    * For dHub channels (command/data queues), also provide (unused) FIFO service for external.
///                                    * Channel 2N is used for dHub.Channel[N] command.
///                                    * Channel 2N+1 is used for dHub.Channel[N] data.
///                                    ###
///     @ 0x00B00 ARR                  (P)
///     # 0x00B00 channelCtl           
///               $dHubChannel         channelCtl        REG      [16]
///                                    ###
///                                    * Up-to 16 channels
///                                    ###
///     @ 0x00C00 BUSY                 (R-)
///               %unsigned 16 ST                        
///                                    ###
///                                    * Per channel status
///                                    * 0: no ongoing command is being processed, and no flushing is taking place
///                                    * 1: channel controller is busy
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00C04 PENDING              (R-)
///               %unsigned 16 ST                        
///                                    ###
///                                    * Per channel status
///                                    * 0: Response queue is empty, meaning no outstanding AXI transactions
///                                    * 1: there exist some outstanding AXI transactions
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00C08 busRstEn             (RW-)
///               %unsigned 1  reg                       0x0
///                                    ###
///                                    * Write one to this register will trigger gate-keeper to take over the AXI bus.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00C0C busRstDone           (R-)
///               %unsigned 1  reg                       0x1
///                                    ###
///                                    * After gate-keeper take over the AXI bus, it will assert this bit once there is no outstanding transactions on AXI bus.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00C10 flowCtl              (P)
///               %unsigned 8  rAlpha                    0x0
///               %unsigned 8  wAlpha                    0x0
///                                    ###
///                                    * Flow control parameter for read and write axi master.
///                                    * clkCnt=(alpha*bstLen)>>4.
///                                    * This # of clock cycles will be blocked for the axi master after an axi command with the burst length of “bstLen”.
///                                    * When set alpha to be 0, the master will never be blocked.
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00C14 axiCmdCol            (P)
///               %unsigned 16 rCnt                      0x0
///               %unsigned 16 wCnt                      0x0
///                                    ###
///                                    * Axi command collection. The counter value indicate read/write do the command collection for # of clock cycles, start from the first command pushed to an empty command Q. Here are the conditions that will trigger the Axi master to send out command.
///                                    * Cmd Q full or the counter count down to “0” from the programmed value.
///                                    * Set the counter to 0 will disable the command collection.
///                                    * end dHubReg
///                                    ###
///     @ 0x00C18                      (W-)
///     #         # Stuffing bytes...
///               %% 1856
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    3328B, bits:    3314b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubReg
#define h_dHubReg (){}

    #define     RA_dHubReg_SemaHub                             0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_HBO                                 0x0400
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_ARR                                 0x0B00
    #define     RA_dHubReg_channelCtl                          0x0B00
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_BUSY                                0x0C00

    #define     BA_dHubReg_BUSY_ST                             0x0C00
    #define     B16dHubReg_BUSY_ST                             0x0C00
    #define   LSb32dHubReg_BUSY_ST                                0
    #define   LSb16dHubReg_BUSY_ST                                0
    #define       bdHubReg_BUSY_ST                             16
    #define   MSK32dHubReg_BUSY_ST                                0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_PENDING                             0x0C04

    #define     BA_dHubReg_PENDING_ST                          0x0C04
    #define     B16dHubReg_PENDING_ST                          0x0C04
    #define   LSb32dHubReg_PENDING_ST                             0
    #define   LSb16dHubReg_PENDING_ST                             0
    #define       bdHubReg_PENDING_ST                          16
    #define   MSK32dHubReg_PENDING_ST                             0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_busRstEn                            0x0C08

    #define     BA_dHubReg_busRstEn_reg                        0x0C08
    #define     B16dHubReg_busRstEn_reg                        0x0C08
    #define   LSb32dHubReg_busRstEn_reg                           0
    #define   LSb16dHubReg_busRstEn_reg                           0
    #define       bdHubReg_busRstEn_reg                        1
    #define   MSK32dHubReg_busRstEn_reg                           0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_busRstDone                          0x0C0C

    #define     BA_dHubReg_busRstDone_reg                      0x0C0C
    #define     B16dHubReg_busRstDone_reg                      0x0C0C
    #define   LSb32dHubReg_busRstDone_reg                         0
    #define   LSb16dHubReg_busRstDone_reg                         0
    #define       bdHubReg_busRstDone_reg                      1
    #define   MSK32dHubReg_busRstDone_reg                         0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_flowCtl                             0x0C10

    #define     BA_dHubReg_flowCtl_rAlpha                      0x0C10
    #define     B16dHubReg_flowCtl_rAlpha                      0x0C10
    #define   LSb32dHubReg_flowCtl_rAlpha                         0
    #define   LSb16dHubReg_flowCtl_rAlpha                         0
    #define       bdHubReg_flowCtl_rAlpha                      8
    #define   MSK32dHubReg_flowCtl_rAlpha                         0x000000FF

    #define     BA_dHubReg_flowCtl_wAlpha                      0x0C11
    #define     B16dHubReg_flowCtl_wAlpha                      0x0C10
    #define   LSb32dHubReg_flowCtl_wAlpha                         8
    #define   LSb16dHubReg_flowCtl_wAlpha                         8
    #define       bdHubReg_flowCtl_wAlpha                      8
    #define   MSK32dHubReg_flowCtl_wAlpha                         0x0000FF00
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg_axiCmdCol                           0x0C14

    #define     BA_dHubReg_axiCmdCol_rCnt                      0x0C14
    #define     B16dHubReg_axiCmdCol_rCnt                      0x0C14
    #define   LSb32dHubReg_axiCmdCol_rCnt                         0
    #define   LSb16dHubReg_axiCmdCol_rCnt                         0
    #define       bdHubReg_axiCmdCol_rCnt                      16
    #define   MSK32dHubReg_axiCmdCol_rCnt                         0x0000FFFF

    #define     BA_dHubReg_axiCmdCol_wCnt                      0x0C16
    #define     B16dHubReg_axiCmdCol_wCnt                      0x0C16
    #define   LSb32dHubReg_axiCmdCol_wCnt                         16
    #define   LSb16dHubReg_axiCmdCol_wCnt                         0
    #define       bdHubReg_axiCmdCol_wCnt                      16
    #define   MSK32dHubReg_axiCmdCol_wCnt                         0xFFFF0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubReg {
    ///////////////////////////////////////////////////////////
              SIE_SemaHub                                      ie_SemaHub;
    ///////////////////////////////////////////////////////////
              SIE_HBO                                          ie_HBO;
    ///////////////////////////////////////////////////////////
              SIE_dHubChannel                                  ie_channelCtl[16];
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_BUSY_ST(r32)                        _BFGET_(r32,15, 0)
    #define   SET32dHubReg_BUSY_ST(r32,v)                      _BFSET_(r32,15, 0,v)
    #define   GET16dHubReg_BUSY_ST(r16)                        _BFGET_(r16,15, 0)
    #define   SET16dHubReg_BUSY_ST(r16,v)                      _BFSET_(r16,15, 0,v)

    #define     w32dHubReg_BUSY                                {\
            UNSG32 uBUSY_ST                                    : 16;\
            UNSG32 RSVDxC00_b16                                : 16;\
          }
    union { UNSG32 u32dHubReg_BUSY;
            struct w32dHubReg_BUSY;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_PENDING_ST(r32)                     _BFGET_(r32,15, 0)
    #define   SET32dHubReg_PENDING_ST(r32,v)                   _BFSET_(r32,15, 0,v)
    #define   GET16dHubReg_PENDING_ST(r16)                     _BFGET_(r16,15, 0)
    #define   SET16dHubReg_PENDING_ST(r16,v)                   _BFSET_(r16,15, 0,v)

    #define     w32dHubReg_PENDING                             {\
            UNSG32 uPENDING_ST                                 : 16;\
            UNSG32 RSVDxC04_b16                                : 16;\
          }
    union { UNSG32 u32dHubReg_PENDING;
            struct w32dHubReg_PENDING;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_busRstEn_reg(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32dHubReg_busRstEn_reg(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16dHubReg_busRstEn_reg(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16dHubReg_busRstEn_reg(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32dHubReg_busRstEn                            {\
            UNSG32 ubusRstEn_reg                               :  1;\
            UNSG32 RSVDxC08_b1                                 : 31;\
          }
    union { UNSG32 u32dHubReg_busRstEn;
            struct w32dHubReg_busRstEn;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_busRstDone_reg(r32)                 _BFGET_(r32, 0, 0)
    #define   SET32dHubReg_busRstDone_reg(r32,v)               _BFSET_(r32, 0, 0,v)
    #define   GET16dHubReg_busRstDone_reg(r16)                 _BFGET_(r16, 0, 0)
    #define   SET16dHubReg_busRstDone_reg(r16,v)               _BFSET_(r16, 0, 0,v)

    #define     w32dHubReg_busRstDone                          {\
            UNSG32 ubusRstDone_reg                             :  1;\
            UNSG32 RSVDxC0C_b1                                 : 31;\
          }
    union { UNSG32 u32dHubReg_busRstDone;
            struct w32dHubReg_busRstDone;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_flowCtl_rAlpha(r32)                 _BFGET_(r32, 7, 0)
    #define   SET32dHubReg_flowCtl_rAlpha(r32,v)               _BFSET_(r32, 7, 0,v)
    #define   GET16dHubReg_flowCtl_rAlpha(r16)                 _BFGET_(r16, 7, 0)
    #define   SET16dHubReg_flowCtl_rAlpha(r16,v)               _BFSET_(r16, 7, 0,v)

    #define   GET32dHubReg_flowCtl_wAlpha(r32)                 _BFGET_(r32,15, 8)
    #define   SET32dHubReg_flowCtl_wAlpha(r32,v)               _BFSET_(r32,15, 8,v)
    #define   GET16dHubReg_flowCtl_wAlpha(r16)                 _BFGET_(r16,15, 8)
    #define   SET16dHubReg_flowCtl_wAlpha(r16,v)               _BFSET_(r16,15, 8,v)

    #define     w32dHubReg_flowCtl                             {\
            UNSG32 uflowCtl_rAlpha                             :  8;\
            UNSG32 uflowCtl_wAlpha                             :  8;\
            UNSG32 RSVDxC10_b16                                : 16;\
          }
    union { UNSG32 u32dHubReg_flowCtl;
            struct w32dHubReg_flowCtl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg_axiCmdCol_rCnt(r32)                 _BFGET_(r32,15, 0)
    #define   SET32dHubReg_axiCmdCol_rCnt(r32,v)               _BFSET_(r32,15, 0,v)
    #define   GET16dHubReg_axiCmdCol_rCnt(r16)                 _BFGET_(r16,15, 0)
    #define   SET16dHubReg_axiCmdCol_rCnt(r16,v)               _BFSET_(r16,15, 0,v)

    #define   GET32dHubReg_axiCmdCol_wCnt(r32)                 _BFGET_(r32,31,16)
    #define   SET32dHubReg_axiCmdCol_wCnt(r32,v)               _BFSET_(r32,31,16,v)
    #define   GET16dHubReg_axiCmdCol_wCnt(r16)                 _BFGET_(r16,15, 0)
    #define   SET16dHubReg_axiCmdCol_wCnt(r16,v)               _BFSET_(r16,15, 0,v)

    #define     w32dHubReg_axiCmdCol                           {\
            UNSG32 uaxiCmdCol_rCnt                             : 16;\
            UNSG32 uaxiCmdCol_wCnt                             : 16;\
          }
    union { UNSG32 u32dHubReg_axiCmdCol;
            struct w32dHubReg_axiCmdCol;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxC18                                    [232];
    ///////////////////////////////////////////////////////////
    } SIE_dHubReg;

    typedef union  T32dHubReg_BUSY
          { UNSG32 u32;
            struct w32dHubReg_BUSY;
                 } T32dHubReg_BUSY;
    typedef union  T32dHubReg_PENDING
          { UNSG32 u32;
            struct w32dHubReg_PENDING;
                 } T32dHubReg_PENDING;
    typedef union  T32dHubReg_busRstEn
          { UNSG32 u32;
            struct w32dHubReg_busRstEn;
                 } T32dHubReg_busRstEn;
    typedef union  T32dHubReg_busRstDone
          { UNSG32 u32;
            struct w32dHubReg_busRstDone;
                 } T32dHubReg_busRstDone;
    typedef union  T32dHubReg_flowCtl
          { UNSG32 u32;
            struct w32dHubReg_flowCtl;
                 } T32dHubReg_flowCtl;
    typedef union  T32dHubReg_axiCmdCol
          { UNSG32 u32;
            struct w32dHubReg_axiCmdCol;
                 } T32dHubReg_axiCmdCol;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubReg_BUSY
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_BUSY;
                   };
                 } TdHubReg_BUSY;
    typedef union  TdHubReg_PENDING
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_PENDING;
                   };
                 } TdHubReg_PENDING;
    typedef union  TdHubReg_busRstEn
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_busRstEn;
                   };
                 } TdHubReg_busRstEn;
    typedef union  TdHubReg_busRstDone
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_busRstDone;
                   };
                 } TdHubReg_busRstDone;
    typedef union  TdHubReg_flowCtl
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_flowCtl;
                   };
                 } TdHubReg_flowCtl;
    typedef union  TdHubReg_axiCmdCol
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg_axiCmdCol;
                   };
                 } TdHubReg_axiCmdCol;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubReg_drvrd(SIE_dHubReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubReg_drvwr(SIE_dHubReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubReg_reset(SIE_dHubReg *p);
     SIGN32 dHubReg_cmp  (SIE_dHubReg *p, SIE_dHubReg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubReg_check(p,pie,pfx,hLOG) dHubReg_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubReg_print(p,    pfx,hLOG) dHubReg_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubReg
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubCmd2D               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 MEM                  (W-)
///               %unsigned 32 addr                      
///                                    ###
///                                    * DRAM data address of the 2D buffer, in bytes.
///                                    ###
///     @ 0x00004 DESC                 (W-)
///               %unsigned 16 stride                    
///                                    ###
///                                    * Line stride size in bytes
///                                    ###
///               %unsigned 13 numLine                   
///                                    ###
///                                    * Number of lines in buffer. Size of 0 is forbidden.
///                                    ###
///               %unsigned 2  hdrLoop                   
///                                    ###
///                                    * Size of line-loop for choosing dHubCmdHDR
///                                    * 0 is treated as 4
///                                    ###
///               %unsigned 1  interrupt                 
///                                    ###
///                                    * 1: raise interrupt upon whole 2D command finish.
///                                    * 1: set the last 1D command interrupt bit.
///                                    * 0 : use the default 1D command interrupt bit.
///                                    ###
///     @ 0x00008 START                (W-)
///               %unsigned 1  EN                        0x0
///                                    ###
///                                    * Write 1 to enable the channel; 0 to pause the channel
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0000C CLEAR                (W-)
///               %unsigned 1  EN                        
///                                    ###
///                                    * Write anything to reset the 2D engine.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00010                      (P)
///     # 0x00010 HDR                  
///               $dHubCmdHDR          HDR               REG       [4]
///                                    ###
///                                    * Headers used in generating dHubCmd for each line in looping order, loop size (1,2,3,4) specified by DESC_hdrLoop
///                                    * end dHubCmd2D
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      32B, bits:     182b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubCmd2D
#define h_dHubCmd2D (){}

    #define     RA_dHubCmd2D_MEM                               0x0000

    #define     BA_dHubCmd2D_MEM_addr                          0x0000
    #define     B16dHubCmd2D_MEM_addr                          0x0000
    #define   LSb32dHubCmd2D_MEM_addr                             0
    #define   LSb16dHubCmd2D_MEM_addr                             0
    #define       bdHubCmd2D_MEM_addr                          32
    #define   MSK32dHubCmd2D_MEM_addr                             0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd2D_DESC                              0x0004

    #define     BA_dHubCmd2D_DESC_stride                       0x0004
    #define     B16dHubCmd2D_DESC_stride                       0x0004
    #define   LSb32dHubCmd2D_DESC_stride                          0
    #define   LSb16dHubCmd2D_DESC_stride                          0
    #define       bdHubCmd2D_DESC_stride                       16
    #define   MSK32dHubCmd2D_DESC_stride                          0x0000FFFF

    #define     BA_dHubCmd2D_DESC_numLine                      0x0006
    #define     B16dHubCmd2D_DESC_numLine                      0x0006
    #define   LSb32dHubCmd2D_DESC_numLine                         16
    #define   LSb16dHubCmd2D_DESC_numLine                         0
    #define       bdHubCmd2D_DESC_numLine                      13
    #define   MSK32dHubCmd2D_DESC_numLine                         0x1FFF0000

    #define     BA_dHubCmd2D_DESC_hdrLoop                      0x0007
    #define     B16dHubCmd2D_DESC_hdrLoop                      0x0006
    #define   LSb32dHubCmd2D_DESC_hdrLoop                         29
    #define   LSb16dHubCmd2D_DESC_hdrLoop                         13
    #define       bdHubCmd2D_DESC_hdrLoop                      2
    #define   MSK32dHubCmd2D_DESC_hdrLoop                         0x60000000

    #define     BA_dHubCmd2D_DESC_interrupt                    0x0007
    #define     B16dHubCmd2D_DESC_interrupt                    0x0006
    #define   LSb32dHubCmd2D_DESC_interrupt                       31
    #define   LSb16dHubCmd2D_DESC_interrupt                       15
    #define       bdHubCmd2D_DESC_interrupt                    1
    #define   MSK32dHubCmd2D_DESC_interrupt                       0x80000000
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd2D_START                             0x0008

    #define     BA_dHubCmd2D_START_EN                          0x0008
    #define     B16dHubCmd2D_START_EN                          0x0008
    #define   LSb32dHubCmd2D_START_EN                             0
    #define   LSb16dHubCmd2D_START_EN                             0
    #define       bdHubCmd2D_START_EN                          1
    #define   MSK32dHubCmd2D_START_EN                             0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd2D_CLEAR                             0x000C

    #define     BA_dHubCmd2D_CLEAR_EN                          0x000C
    #define     B16dHubCmd2D_CLEAR_EN                          0x000C
    #define   LSb32dHubCmd2D_CLEAR_EN                             0
    #define   LSb16dHubCmd2D_CLEAR_EN                             0
    #define       bdHubCmd2D_CLEAR_EN                          1
    #define   MSK32dHubCmd2D_CLEAR_EN                             0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_dHubCmd2D_HDR                               0x0010
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubCmd2D {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd2D_MEM_addr(r32)                     _BFGET_(r32,31, 0)
    #define   SET32dHubCmd2D_MEM_addr(r32,v)                   _BFSET_(r32,31, 0,v)

    #define     w32dHubCmd2D_MEM                               {\
            UNSG32 uMEM_addr                                   : 32;\
          }
    union { UNSG32 u32dHubCmd2D_MEM;
            struct w32dHubCmd2D_MEM;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd2D_DESC_stride(r32)                  _BFGET_(r32,15, 0)
    #define   SET32dHubCmd2D_DESC_stride(r32,v)                _BFSET_(r32,15, 0,v)
    #define   GET16dHubCmd2D_DESC_stride(r16)                  _BFGET_(r16,15, 0)
    #define   SET16dHubCmd2D_DESC_stride(r16,v)                _BFSET_(r16,15, 0,v)

    #define   GET32dHubCmd2D_DESC_numLine(r32)                 _BFGET_(r32,28,16)
    #define   SET32dHubCmd2D_DESC_numLine(r32,v)               _BFSET_(r32,28,16,v)
    #define   GET16dHubCmd2D_DESC_numLine(r16)                 _BFGET_(r16,12, 0)
    #define   SET16dHubCmd2D_DESC_numLine(r16,v)               _BFSET_(r16,12, 0,v)

    #define   GET32dHubCmd2D_DESC_hdrLoop(r32)                 _BFGET_(r32,30,29)
    #define   SET32dHubCmd2D_DESC_hdrLoop(r32,v)               _BFSET_(r32,30,29,v)
    #define   GET16dHubCmd2D_DESC_hdrLoop(r16)                 _BFGET_(r16,14,13)
    #define   SET16dHubCmd2D_DESC_hdrLoop(r16,v)               _BFSET_(r16,14,13,v)

    #define   GET32dHubCmd2D_DESC_interrupt(r32)               _BFGET_(r32,31,31)
    #define   SET32dHubCmd2D_DESC_interrupt(r32,v)             _BFSET_(r32,31,31,v)
    #define   GET16dHubCmd2D_DESC_interrupt(r16)               _BFGET_(r16,15,15)
    #define   SET16dHubCmd2D_DESC_interrupt(r16,v)             _BFSET_(r16,15,15,v)

    #define     w32dHubCmd2D_DESC                              {\
            UNSG32 uDESC_stride                                : 16;\
            UNSG32 uDESC_numLine                               : 13;\
            UNSG32 uDESC_hdrLoop                               :  2;\
            UNSG32 uDESC_interrupt                             :  1;\
          }
    union { UNSG32 u32dHubCmd2D_DESC;
            struct w32dHubCmd2D_DESC;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd2D_START_EN(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32dHubCmd2D_START_EN(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16dHubCmd2D_START_EN(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16dHubCmd2D_START_EN(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define     w32dHubCmd2D_START                             {\
            UNSG32 uSTART_EN                                   :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32dHubCmd2D_START;
            struct w32dHubCmd2D_START;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dHubCmd2D_CLEAR_EN(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32dHubCmd2D_CLEAR_EN(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16dHubCmd2D_CLEAR_EN(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16dHubCmd2D_CLEAR_EN(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define     w32dHubCmd2D_CLEAR                             {\
            UNSG32 uCLEAR_EN                                   :  1;\
            UNSG32 RSVDxC_b1                                   : 31;\
          }
    union { UNSG32 u32dHubCmd2D_CLEAR;
            struct w32dHubCmd2D_CLEAR;
          };
    ///////////////////////////////////////////////////////////
              SIE_dHubCmdHDR                                   ie_HDR[4];
    ///////////////////////////////////////////////////////////
    } SIE_dHubCmd2D;

    typedef union  T32dHubCmd2D_MEM
          { UNSG32 u32;
            struct w32dHubCmd2D_MEM;
                 } T32dHubCmd2D_MEM;
    typedef union  T32dHubCmd2D_DESC
          { UNSG32 u32;
            struct w32dHubCmd2D_DESC;
                 } T32dHubCmd2D_DESC;
    typedef union  T32dHubCmd2D_START
          { UNSG32 u32;
            struct w32dHubCmd2D_START;
                 } T32dHubCmd2D_START;
    typedef union  T32dHubCmd2D_CLEAR
          { UNSG32 u32;
            struct w32dHubCmd2D_CLEAR;
                 } T32dHubCmd2D_CLEAR;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubCmd2D_MEM
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd2D_MEM;
                   };
                 } TdHubCmd2D_MEM;
    typedef union  TdHubCmd2D_DESC
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd2D_DESC;
                   };
                 } TdHubCmd2D_DESC;
    typedef union  TdHubCmd2D_START
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd2D_START;
                   };
                 } TdHubCmd2D_START;
    typedef union  TdHubCmd2D_CLEAR
          { UNSG32 u32[1];
            struct {
            struct w32dHubCmd2D_CLEAR;
                   };
                 } TdHubCmd2D_CLEAR;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubCmd2D_drvrd(SIE_dHubCmd2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubCmd2D_drvwr(SIE_dHubCmd2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubCmd2D_reset(SIE_dHubCmd2D *p);
     SIGN32 dHubCmd2D_cmp  (SIE_dHubCmd2D *p, SIE_dHubCmd2D *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubCmd2D_check(p,pie,pfx,hLOG) dHubCmd2D_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubCmd2D_print(p,    pfx,hLOG) dHubCmd2D_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubCmd2D
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubQuery                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 RESP                 (R-)
///               %unsigned 16 ST                        
///                                    ###
///                                    * Dhub channel state machine status.
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubQuery
#define h_dHubQuery (){}

    #define     RA_dHubQuery_RESP                              0x0000

    #define     BA_dHubQuery_RESP_ST                           0x0000
    #define     B16dHubQuery_RESP_ST                           0x0000
    #define   LSb32dHubQuery_RESP_ST                              0
    #define   LSb16dHubQuery_RESP_ST                              0
    #define       bdHubQuery_RESP_ST                           16
    #define   MSK32dHubQuery_RESP_ST                              0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubQuery {
    ///////////////////////////////////////////////////////////
    #define   GET32dHubQuery_RESP_ST(r32)                      _BFGET_(r32,15, 0)
    #define   SET32dHubQuery_RESP_ST(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16dHubQuery_RESP_ST(r16)                      _BFGET_(r16,15, 0)
    #define   SET16dHubQuery_RESP_ST(r16,v)                    _BFSET_(r16,15, 0,v)

    #define     w32dHubQuery_RESP                              {\
            UNSG32 uRESP_ST                                    : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32dHubQuery_RESP;
            struct w32dHubQuery_RESP;
          };
    ///////////////////////////////////////////////////////////
    } SIE_dHubQuery;

    typedef union  T32dHubQuery_RESP
          { UNSG32 u32;
            struct w32dHubQuery_RESP;
                 } T32dHubQuery_RESP;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubQuery_RESP
          { UNSG32 u32[1];
            struct {
            struct w32dHubQuery_RESP;
                   };
                 } TdHubQuery_RESP;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubQuery_drvrd(SIE_dHubQuery *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubQuery_drvwr(SIE_dHubQuery *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubQuery_reset(SIE_dHubQuery *p);
     SIGN32 dHubQuery_cmp  (SIE_dHubQuery *p, SIE_dHubQuery *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubQuery_check(p,pie,pfx,hLOG) dHubQuery_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubQuery_print(p,    pfx,hLOG) dHubQuery_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubQuery
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dHubReg2D               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 dHub                 
///               $dHubReg             dHub              REG          
///     @ 0x00D00 ARR                  (P)
///     # 0x00D00 Cmd2D                
///               $dHubCmd2D           Cmd2D             REG      [16]
///                                    ###
///                                    * Up-to 16 2D channels.
///                                    * 2D Channel[N] is connected to dHub.Channel[N] command queue, that is, dHub.HBO.Channel[2N]
///                                    * Note: Number of 2D channels could be less than dHub channels (rest of are 1D only)
///                                    ###
///     @ 0x00F00 BUSY                 (R-)
///               %unsigned 16 ST                        
///                                    ###
///                                    * Per channel status
///                                    * 0: no ongoing command is being processed
///                                    * 1: channel controller is busy
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00F04                      (W-)
///     #         # Stuffing bytes...
///               %% 480
///     @ 0x00F40                      (P)
///     # 0x00F40 CH_ST                
///               $dHubQuery           CH_ST             MEM      [16]
///                                    ###
///                                    * end dHubReg2D
///                                    ###
///     @ 0x00F80                      (W-)
///     #         # Stuffing bytes...
///               %% 1024
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    4096B, bits:    6274b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dHubReg2D
#define h_dHubReg2D (){}

    #define     RA_dHubReg2D_dHub                              0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg2D_ARR                               0x0D00
    #define     RA_dHubReg2D_Cmd2D                             0x0D00
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg2D_BUSY                              0x0F00

    #define     BA_dHubReg2D_BUSY_ST                           0x0F00
    #define     B16dHubReg2D_BUSY_ST                           0x0F00
    #define   LSb32dHubReg2D_BUSY_ST                              0
    #define   LSb16dHubReg2D_BUSY_ST                              0
    #define       bdHubReg2D_BUSY_ST                           16
    #define   MSK32dHubReg2D_BUSY_ST                              0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dHubReg2D_CH_ST                             0x0F40
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dHubReg2D {
    ///////////////////////////////////////////////////////////
              SIE_dHubReg                                      ie_dHub;
    ///////////////////////////////////////////////////////////
              SIE_dHubCmd2D                                    ie_Cmd2D[16];
    ///////////////////////////////////////////////////////////
    #define   GET32dHubReg2D_BUSY_ST(r32)                      _BFGET_(r32,15, 0)
    #define   SET32dHubReg2D_BUSY_ST(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16dHubReg2D_BUSY_ST(r16)                      _BFGET_(r16,15, 0)
    #define   SET16dHubReg2D_BUSY_ST(r16,v)                    _BFSET_(r16,15, 0,v)

    #define     w32dHubReg2D_BUSY                              {\
            UNSG32 uBUSY_ST                                    : 16;\
            UNSG32 RSVDxF00_b16                                : 16;\
          }
    union { UNSG32 u32dHubReg2D_BUSY;
            struct w32dHubReg2D_BUSY;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxF04                                    [60];
    ///////////////////////////////////////////////////////////
              SIE_dHubQuery                                    ie_CH_ST[16];
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxF80                                    [128];
    ///////////////////////////////////////////////////////////
    } SIE_dHubReg2D;

    typedef union  T32dHubReg2D_BUSY
          { UNSG32 u32;
            struct w32dHubReg2D_BUSY;
                 } T32dHubReg2D_BUSY;
    ///////////////////////////////////////////////////////////

    typedef union  TdHubReg2D_BUSY
          { UNSG32 u32[1];
            struct {
            struct w32dHubReg2D_BUSY;
                   };
                 } TdHubReg2D_BUSY;

    ///////////////////////////////////////////////////////////
     SIGN32 dHubReg2D_drvrd(SIE_dHubReg2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dHubReg2D_drvwr(SIE_dHubReg2D *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dHubReg2D_reset(SIE_dHubReg2D *p);
     SIGN32 dHubReg2D_cmp  (SIE_dHubReg2D *p, SIE_dHubReg2D *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dHubReg2D_check(p,pie,pfx,hLOG) dHubReg2D_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dHubReg2D_print(p,    pfx,hLOG) dHubReg2D_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dHubReg2D
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DSmsg                   biu              (4,4)
///     ###
///     * Data Streamer message format
///     * [00:31]
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 count                     
///                                    ###
///                                    * number of bytes to transfer, the starting address is byte aligned.
///                                    ###
///               %unsigned 1  NOS                       
///                                    ###
///                                    * No outstanding
///                                    * 1: this command will not be executed until the completion of all the previous command.
///                                    * 0: This command can be executed without checking the previous command completion status.
///                                    ###
///               %unsigned 1  dir                       
///                                    : m2h                       0x0
///                                                 ###
///                                                 * Data transfer from external memory to HBO
///                                                 ###
///                                    : h2m                       0x1
///                                                 ###
///                                                 * Data transfer from HBO to external memory
///                                                 ###
///               %unsigned 1  intr                      
///                                    ###
///                                    * Setting to 1 forces Data Streamer to raise interrupt after command completion
///                                    ###
///               %unsigned 16 hboAdr                    
///                                    ###
///                                    * HBO byte address for data transfer
///                                    * [32:63]
///                                    ###
///     @ 0x00004                      (P)
///               %unsigned 32 memAdr                    
///                                    ###
///                                    * Memory address equivalent to DDR addr [31:0];
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DSmsg
#define h_DSmsg (){}

    #define     BA_DSmsg_count                                 0x0000
    #define     B16DSmsg_count                                 0x0000
    #define   LSb32DSmsg_count                                    0
    #define   LSb16DSmsg_count                                    0
    #define       bDSmsg_count                                 13
    #define   MSK32DSmsg_count                                    0x00001FFF

    #define     BA_DSmsg_NOS                                   0x0001
    #define     B16DSmsg_NOS                                   0x0000
    #define   LSb32DSmsg_NOS                                      13
    #define   LSb16DSmsg_NOS                                      13
    #define       bDSmsg_NOS                                   1
    #define   MSK32DSmsg_NOS                                      0x00002000

    #define     BA_DSmsg_dir                                   0x0001
    #define     B16DSmsg_dir                                   0x0000
    #define   LSb32DSmsg_dir                                      14
    #define   LSb16DSmsg_dir                                      14
    #define       bDSmsg_dir                                   1
    #define   MSK32DSmsg_dir                                      0x00004000
    #define        DSmsg_dir_m2h                                            0x0
    #define        DSmsg_dir_h2m                                            0x1

    #define     BA_DSmsg_intr                                  0x0001
    #define     B16DSmsg_intr                                  0x0000
    #define   LSb32DSmsg_intr                                     15
    #define   LSb16DSmsg_intr                                     15
    #define       bDSmsg_intr                                  1
    #define   MSK32DSmsg_intr                                     0x00008000

    #define     BA_DSmsg_hboAdr                                0x0002
    #define     B16DSmsg_hboAdr                                0x0002
    #define   LSb32DSmsg_hboAdr                                   16
    #define   LSb16DSmsg_hboAdr                                   0
    #define       bDSmsg_hboAdr                                16
    #define   MSK32DSmsg_hboAdr                                   0xFFFF0000
    ///////////////////////////////////////////////////////////

    #define     BA_DSmsg_memAdr                                0x0004
    #define     B16DSmsg_memAdr                                0x0004
    #define   LSb32DSmsg_memAdr                                   0
    #define   LSb16DSmsg_memAdr                                   0
    #define       bDSmsg_memAdr                                32
    #define   MSK32DSmsg_memAdr                                   0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DSmsg {
    ///////////////////////////////////////////////////////////
    #define   GET32DSmsg_count(r32)                            _BFGET_(r32,12, 0)
    #define   SET32DSmsg_count(r32,v)                          _BFSET_(r32,12, 0,v)
    #define   GET16DSmsg_count(r16)                            _BFGET_(r16,12, 0)
    #define   SET16DSmsg_count(r16,v)                          _BFSET_(r16,12, 0,v)

    #define   GET32DSmsg_NOS(r32)                              _BFGET_(r32,13,13)
    #define   SET32DSmsg_NOS(r32,v)                            _BFSET_(r32,13,13,v)
    #define   GET16DSmsg_NOS(r16)                              _BFGET_(r16,13,13)
    #define   SET16DSmsg_NOS(r16,v)                            _BFSET_(r16,13,13,v)

    #define   GET32DSmsg_dir(r32)                              _BFGET_(r32,14,14)
    #define   SET32DSmsg_dir(r32,v)                            _BFSET_(r32,14,14,v)
    #define   GET16DSmsg_dir(r16)                              _BFGET_(r16,14,14)
    #define   SET16DSmsg_dir(r16,v)                            _BFSET_(r16,14,14,v)

    #define   GET32DSmsg_intr(r32)                             _BFGET_(r32,15,15)
    #define   SET32DSmsg_intr(r32,v)                           _BFSET_(r32,15,15,v)
    #define   GET16DSmsg_intr(r16)                             _BFGET_(r16,15,15)
    #define   SET16DSmsg_intr(r16,v)                           _BFSET_(r16,15,15,v)

    #define   GET32DSmsg_hboAdr(r32)                           _BFGET_(r32,31,16)
    #define   SET32DSmsg_hboAdr(r32,v)                         _BFSET_(r32,31,16,v)
    #define   GET16DSmsg_hboAdr(r16)                           _BFGET_(r16,15, 0)
    #define   SET16DSmsg_hboAdr(r16,v)                         _BFSET_(r16,15, 0,v)

            UNSG32 u_count                                     : 13;
            UNSG32 u_NOS                                       :  1;
            UNSG32 u_dir                                       :  1;
            UNSG32 u_intr                                      :  1;
            UNSG32 u_hboAdr                                    : 16;
    ///////////////////////////////////////////////////////////
    #define   GET32DSmsg_memAdr(r32)                           _BFGET_(r32,31, 0)
    #define   SET32DSmsg_memAdr(r32,v)                         _BFSET_(r32,31, 0,v)

            UNSG32 u_memAdr                                    : 32;
    ///////////////////////////////////////////////////////////
    } SIE_DSmsg;

    ///////////////////////////////////////////////////////////
     SIGN32 DSmsg_drvrd(SIE_DSmsg *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DSmsg_drvwr(SIE_DSmsg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DSmsg_reset(SIE_DSmsg *p);
     SIGN32 DSmsg_cmp  (SIE_DSmsg *p, SIE_DSmsg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DSmsg_check(p,pie,pfx,hLOG) DSmsg_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DSmsg_print(p,    pfx,hLOG) DSmsg_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DSmsg
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE dsCh                    biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 retID                (P)
///               %unsigned 16 addr                      0x0
///                                    ###
///                                    * The HBO address of the memory location at which the retired command ID is stored
///                                    * Note : the addr should be 64-bit aligned. Nor the RTL implementation will always put the 16-bit ID to lower 16-bit of the DTCM entry.
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00004 initID               (P)
///               %unsigned 16 Val                       0x0
///                                    ###
///                                    * Initial retire id value
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_dsCh
#define h_dsCh (){}

    #define     RA_dsCh_retID                                  0x0000

    #define     BA_dsCh_retID_addr                             0x0000
    #define     B16dsCh_retID_addr                             0x0000
    #define   LSb32dsCh_retID_addr                                0
    #define   LSb16dsCh_retID_addr                                0
    #define       bdsCh_retID_addr                             16
    #define   MSK32dsCh_retID_addr                                0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_dsCh_initID                                 0x0004

    #define     BA_dsCh_initID_Val                             0x0004
    #define     B16dsCh_initID_Val                             0x0004
    #define   LSb32dsCh_initID_Val                                0
    #define   LSb16dsCh_initID_Val                                0
    #define       bdsCh_initID_Val                             16
    #define   MSK32dsCh_initID_Val                                0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_dsCh {
    ///////////////////////////////////////////////////////////
    #define   GET32dsCh_retID_addr(r32)                        _BFGET_(r32,15, 0)
    #define   SET32dsCh_retID_addr(r32,v)                      _BFSET_(r32,15, 0,v)
    #define   GET16dsCh_retID_addr(r16)                        _BFGET_(r16,15, 0)
    #define   SET16dsCh_retID_addr(r16,v)                      _BFSET_(r16,15, 0,v)

    #define     w32dsCh_retID                                  {\
            UNSG32 uretID_addr                                 : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32dsCh_retID;
            struct w32dsCh_retID;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32dsCh_initID_Val(r32)                        _BFGET_(r32,15, 0)
    #define   SET32dsCh_initID_Val(r32,v)                      _BFSET_(r32,15, 0,v)
    #define   GET16dsCh_initID_Val(r16)                        _BFGET_(r16,15, 0)
    #define   SET16dsCh_initID_Val(r16,v)                      _BFSET_(r16,15, 0,v)

    #define     w32dsCh_initID                                 {\
            UNSG32 uinitID_Val                                 : 16;\
            UNSG32 RSVDx4_b16                                  : 16;\
          }
    union { UNSG32 u32dsCh_initID;
            struct w32dsCh_initID;
          };
    ///////////////////////////////////////////////////////////
    } SIE_dsCh;

    typedef union  T32dsCh_retID
          { UNSG32 u32;
            struct w32dsCh_retID;
                 } T32dsCh_retID;
    typedef union  T32dsCh_initID
          { UNSG32 u32;
            struct w32dsCh_initID;
                 } T32dsCh_initID;
    ///////////////////////////////////////////////////////////

    typedef union  TdsCh_retID
          { UNSG32 u32[1];
            struct {
            struct w32dsCh_retID;
                   };
                 } TdsCh_retID;
    typedef union  TdsCh_initID
          { UNSG32 u32[1];
            struct {
            struct w32dsCh_initID;
                   };
                 } TdsCh_initID;

    ///////////////////////////////////////////////////////////
     SIGN32 dsCh_drvrd(SIE_dsCh *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 dsCh_drvwr(SIE_dsCh *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void dsCh_reset(SIE_dsCh *p);
     SIGN32 dsCh_cmp  (SIE_dsCh *p, SIE_dsCh *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define dsCh_check(p,pie,pfx,hLOG) dsCh_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define dsCh_print(p,    pfx,hLOG) dsCh_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: dsCh
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DataStreamer            biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 dsCh                 (P)
///     # 0x00000 dsCh                 
///               $dsCh                dsCh              REG       [4]
///                                    ###
///                                    * The command that was just finished by Data Streamer generated interrupt; write 1 to clear
///                                    ###
///     @ 0x00020 intr                 (WOC-)
///               %unsigned 1  st_0i                     
///               %unsigned 1  st_1i                     
///               %unsigned 1  st_2i                     
///               %unsigned 1  st_3i                     
///                                    ###
///                                    * Interrupt status
///                                    ###
///               %%        28         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      36B, bits:     132b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DataStreamer
#define h_DataStreamer (){}

    #define     RA_DataStreamer_dsCh                           0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_DataStreamer_intr                           0x0020

    #define     BA_DataStreamer_intr_st_0i                     0x0020
    #define     B16DataStreamer_intr_st_0i                     0x0020
    #define   LSb32DataStreamer_intr_st_0i                        0
    #define   LSb16DataStreamer_intr_st_0i                        0
    #define       bDataStreamer_intr_st_0i                     1
    #define   MSK32DataStreamer_intr_st_0i                        0x00000001

    #define     BA_DataStreamer_intr_st_1i                     0x0020
    #define     B16DataStreamer_intr_st_1i                     0x0020
    #define   LSb32DataStreamer_intr_st_1i                        1
    #define   LSb16DataStreamer_intr_st_1i                        1
    #define       bDataStreamer_intr_st_1i                     1
    #define   MSK32DataStreamer_intr_st_1i                        0x00000002

    #define     BA_DataStreamer_intr_st_2i                     0x0020
    #define     B16DataStreamer_intr_st_2i                     0x0020
    #define   LSb32DataStreamer_intr_st_2i                        2
    #define   LSb16DataStreamer_intr_st_2i                        2
    #define       bDataStreamer_intr_st_2i                     1
    #define   MSK32DataStreamer_intr_st_2i                        0x00000004

    #define     BA_DataStreamer_intr_st_3i                     0x0020
    #define     B16DataStreamer_intr_st_3i                     0x0020
    #define   LSb32DataStreamer_intr_st_3i                        3
    #define   LSb16DataStreamer_intr_st_3i                        3
    #define       bDataStreamer_intr_st_3i                     1
    #define   MSK32DataStreamer_intr_st_3i                        0x00000008
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DataStreamer {
    ///////////////////////////////////////////////////////////
              SIE_dsCh                                         ie_dsCh[4];
    ///////////////////////////////////////////////////////////
    #define   GET32DataStreamer_intr_st_0i(r32)                _BFGET_(r32, 0, 0)
    #define   SET32DataStreamer_intr_st_0i(r32,v)              _BFSET_(r32, 0, 0,v)
    #define   GET16DataStreamer_intr_st_0i(r16)                _BFGET_(r16, 0, 0)
    #define   SET16DataStreamer_intr_st_0i(r16,v)              _BFSET_(r16, 0, 0,v)

    #define   GET32DataStreamer_intr_st_1i(r32)                _BFGET_(r32, 1, 1)
    #define   SET32DataStreamer_intr_st_1i(r32,v)              _BFSET_(r32, 1, 1,v)
    #define   GET16DataStreamer_intr_st_1i(r16)                _BFGET_(r16, 1, 1)
    #define   SET16DataStreamer_intr_st_1i(r16,v)              _BFSET_(r16, 1, 1,v)

    #define   GET32DataStreamer_intr_st_2i(r32)                _BFGET_(r32, 2, 2)
    #define   SET32DataStreamer_intr_st_2i(r32,v)              _BFSET_(r32, 2, 2,v)
    #define   GET16DataStreamer_intr_st_2i(r16)                _BFGET_(r16, 2, 2)
    #define   SET16DataStreamer_intr_st_2i(r16,v)              _BFSET_(r16, 2, 2,v)

    #define   GET32DataStreamer_intr_st_3i(r32)                _BFGET_(r32, 3, 3)
    #define   SET32DataStreamer_intr_st_3i(r32,v)              _BFSET_(r32, 3, 3,v)
    #define   GET16DataStreamer_intr_st_3i(r16)                _BFGET_(r16, 3, 3)
    #define   SET16DataStreamer_intr_st_3i(r16,v)              _BFSET_(r16, 3, 3,v)

    #define     w32DataStreamer_intr                           {\
            UNSG32 uintr_st_0i                                 :  1;\
            UNSG32 uintr_st_1i                                 :  1;\
            UNSG32 uintr_st_2i                                 :  1;\
            UNSG32 uintr_st_3i                                 :  1;\
            UNSG32 RSVDx20_b4                                  : 28;\
          }
    union { UNSG32 u32DataStreamer_intr;
            struct w32DataStreamer_intr;
          };
    ///////////////////////////////////////////////////////////
    } SIE_DataStreamer;

    typedef union  T32DataStreamer_intr
          { UNSG32 u32;
            struct w32DataStreamer_intr;
                 } T32DataStreamer_intr;
    ///////////////////////////////////////////////////////////

    typedef union  TDataStreamer_intr
          { UNSG32 u32[1];
            struct {
            struct w32DataStreamer_intr;
                   };
                 } TDataStreamer_intr;

    ///////////////////////////////////////////////////////////
     SIGN32 DataStreamer_drvrd(SIE_DataStreamer *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DataStreamer_drvwr(SIE_DataStreamer *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DataStreamer_reset(SIE_DataStreamer *p);
     SIGN32 DataStreamer_cmp  (SIE_DataStreamer *p, SIE_DataStreamer *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DataStreamer_check(p,pie,pfx,hLOG) DataStreamer_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DataStreamer_print(p,    pfx,hLOG) DataStreamer_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DataStreamer
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ALU64CMD                                 (4,4)
///     ###
///     * 16-bit + 6-bit parameters for A64CMD
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 par                  (W-)
///               %unsigned 16 rS                        
///                                    ###
///                                    * rS register for A64CMD
///                                    ###
///               %unsigned 6  q6                        
///                                    ###
///                                    * q6 parameter for A64CMD
///                                    * end ALU64CMD
///                                    ###
///               %%        10         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      22b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ALU64CMD
#define h_ALU64CMD (){}

    #define     RA_ALU64CMD_par                                0x0000

    #define     BA_ALU64CMD_par_rS                             0x0000
    #define     B16ALU64CMD_par_rS                             0x0000
    #define   LSb32ALU64CMD_par_rS                                0
    #define   LSb16ALU64CMD_par_rS                                0
    #define       bALU64CMD_par_rS                             16
    #define   MSK32ALU64CMD_par_rS                                0x0000FFFF

    #define     BA_ALU64CMD_par_q6                             0x0002
    #define     B16ALU64CMD_par_q6                             0x0002
    #define   LSb32ALU64CMD_par_q6                                16
    #define   LSb16ALU64CMD_par_q6                                0
    #define       bALU64CMD_par_q6                             6
    #define   MSK32ALU64CMD_par_q6                                0x003F0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ALU64CMD {
    ///////////////////////////////////////////////////////////
    #define   GET32ALU64CMD_par_rS(r32)                        _BFGET_(r32,15, 0)
    #define   SET32ALU64CMD_par_rS(r32,v)                      _BFSET_(r32,15, 0,v)
    #define   GET16ALU64CMD_par_rS(r16)                        _BFGET_(r16,15, 0)
    #define   SET16ALU64CMD_par_rS(r16,v)                      _BFSET_(r16,15, 0,v)

    #define   GET32ALU64CMD_par_q6(r32)                        _BFGET_(r32,21,16)
    #define   SET32ALU64CMD_par_q6(r32,v)                      _BFSET_(r32,21,16,v)
    #define   GET16ALU64CMD_par_q6(r16)                        _BFGET_(r16, 5, 0)
    #define   SET16ALU64CMD_par_q6(r16,v)                      _BFSET_(r16, 5, 0,v)

    #define     w32ALU64CMD_par                                {\
            UNSG32 upar_rS                                     : 16;\
            UNSG32 upar_q6                                     :  6;\
            UNSG32 RSVDx0_b22                                  : 10;\
          }
    union { UNSG32 u32ALU64CMD_par;
            struct w32ALU64CMD_par;
          };
    ///////////////////////////////////////////////////////////
    } SIE_ALU64CMD;

    typedef union  T32ALU64CMD_par
          { UNSG32 u32;
            struct w32ALU64CMD_par;
                 } T32ALU64CMD_par;
    ///////////////////////////////////////////////////////////

    typedef union  TALU64CMD_par
          { UNSG32 u32[1];
            struct {
            struct w32ALU64CMD_par;
                   };
                 } TALU64CMD_par;

    ///////////////////////////////////////////////////////////
     SIGN32 ALU64CMD_drvrd(SIE_ALU64CMD *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ALU64CMD_drvwr(SIE_ALU64CMD *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ALU64CMD_reset(SIE_ALU64CMD *p);
     SIGN32 ALU64CMD_cmp  (SIE_ALU64CMD *p, SIE_ALU64CMD *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ALU64CMD_check(p,pie,pfx,hLOG) ALU64CMD_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ALU64CMD_print(p,    pfx,hLOG) ALU64CMD_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ALU64CMD
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE A64CmdAll                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 ext                  (P)
///     # 0x00000 ext                  
///               $ALU64CMD            ext               REG     [256]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    1024B, bits:    5632b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_A64CmdAll
#define h_A64CmdAll (){}

    #define     RA_A64CmdAll_ext                               0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_A64CmdAll {
    ///////////////////////////////////////////////////////////
              SIE_ALU64CMD                                     ie_ext[256];
    ///////////////////////////////////////////////////////////
    } SIE_A64CmdAll;

    ///////////////////////////////////////////////////////////
     SIGN32 A64CmdAll_drvrd(SIE_A64CmdAll *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 A64CmdAll_drvwr(SIE_A64CmdAll *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void A64CmdAll_reset(SIE_A64CmdAll *p);
     SIGN32 A64CmdAll_cmp  (SIE_A64CmdAll *p, SIE_A64CmdAll *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define A64CmdAll_check(p,pie,pfx,hLOG) A64CmdAll_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define A64CmdAll_print(p,    pfx,hLOG) A64CmdAll_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: A64CmdAll
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ALU64DAT                                 (4,4)
///     ###
///     * 64-bit return data from ALU64 extensions
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 low                  (R-)
///               %unsigned 32 val                       
///                                    ###
///                                    * Lower 32-bit of the ALU64 return value; read triggers ALU64 extension pop
///                                    ###
///     @ 0x00004 high                 (R-)
///               %unsigned 32 val                       
///                                    ###
///                                    * Higher 32-bit of the ALU64 return value
///                                    * end ALU64DAT
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ALU64DAT
#define h_ALU64DAT (){}

    #define     RA_ALU64DAT_low                                0x0000

    #define     BA_ALU64DAT_low_val                            0x0000
    #define     B16ALU64DAT_low_val                            0x0000
    #define   LSb32ALU64DAT_low_val                               0
    #define   LSb16ALU64DAT_low_val                               0
    #define       bALU64DAT_low_val                            32
    #define   MSK32ALU64DAT_low_val                               0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_ALU64DAT_high                               0x0004

    #define     BA_ALU64DAT_high_val                           0x0004
    #define     B16ALU64DAT_high_val                           0x0004
    #define   LSb32ALU64DAT_high_val                              0
    #define   LSb16ALU64DAT_high_val                              0
    #define       bALU64DAT_high_val                           32
    #define   MSK32ALU64DAT_high_val                              0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ALU64DAT {
    ///////////////////////////////////////////////////////////
    #define   GET32ALU64DAT_low_val(r32)                       _BFGET_(r32,31, 0)
    #define   SET32ALU64DAT_low_val(r32,v)                     _BFSET_(r32,31, 0,v)

    #define     w32ALU64DAT_low                                {\
            UNSG32 ulow_val                                    : 32;\
          }
    union { UNSG32 u32ALU64DAT_low;
            struct w32ALU64DAT_low;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32ALU64DAT_high_val(r32)                      _BFGET_(r32,31, 0)
    #define   SET32ALU64DAT_high_val(r32,v)                    _BFSET_(r32,31, 0,v)

    #define     w32ALU64DAT_high                               {\
            UNSG32 uhigh_val                                   : 32;\
          }
    union { UNSG32 u32ALU64DAT_high;
            struct w32ALU64DAT_high;
          };
    ///////////////////////////////////////////////////////////
    } SIE_ALU64DAT;

    typedef union  T32ALU64DAT_low
          { UNSG32 u32;
            struct w32ALU64DAT_low;
                 } T32ALU64DAT_low;
    typedef union  T32ALU64DAT_high
          { UNSG32 u32;
            struct w32ALU64DAT_high;
                 } T32ALU64DAT_high;
    ///////////////////////////////////////////////////////////

    typedef union  TALU64DAT_low
          { UNSG32 u32[1];
            struct {
            struct w32ALU64DAT_low;
                   };
                 } TALU64DAT_low;
    typedef union  TALU64DAT_high
          { UNSG32 u32[1];
            struct {
            struct w32ALU64DAT_high;
                   };
                 } TALU64DAT_high;

    ///////////////////////////////////////////////////////////
     SIGN32 ALU64DAT_drvrd(SIE_ALU64DAT *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ALU64DAT_drvwr(SIE_ALU64DAT *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ALU64DAT_reset(SIE_ALU64DAT *p);
     SIGN32 ALU64DAT_cmp  (SIE_ALU64DAT *p, SIE_ALU64DAT *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ALU64DAT_check(p,pie,pfx,hLOG) ALU64DAT_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ALU64DAT_print(p,    pfx,hLOG) ALU64DAT_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ALU64DAT
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE A64DatAll                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 ext                  (P)
///     # 0x00000 ext                  
///               $ALU64DAT            ext               REG     [256]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    2048B, bits:   16384b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_A64DatAll
#define h_A64DatAll (){}

    #define     RA_A64DatAll_ext                               0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_A64DatAll {
    ///////////////////////////////////////////////////////////
              SIE_ALU64DAT                                     ie_ext[256];
    ///////////////////////////////////////////////////////////
    } SIE_A64DatAll;

    ///////////////////////////////////////////////////////////
     SIGN32 A64DatAll_drvrd(SIE_A64DatAll *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 A64DatAll_drvwr(SIE_A64DatAll *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void A64DatAll_reset(SIE_A64DatAll *p);
     SIGN32 A64DatAll_cmp  (SIE_A64DatAll *p, SIE_A64DatAll *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define A64DatAll_check(p,pie,pfx,hLOG) A64DatAll_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define A64DatAll_print(p,    pfx,hLOG) A64DatAll_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: A64DatAll
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ALU64                   biu              (4,4)
///     ###
///     * Registers ports for CPU to access FIGO ALU64 extensions
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 xT_l                 (P)
///               %unsigned 32 val                       
///                                    ###
///                                    * Higher 32-bit of the FIGO xT register
///                                    ###
///     @ 0x00004 xT_h                 (P)
///               %unsigned 32 val                       
///                                    ###
///                                    * Lower 32-bit of the FIGO xT register
///                                    ###
///     @ 0x00008 X2Q                  (RW-)
///               %unsigned 6  adr                       
///                                    ###
///                                    * Write triggers a transfer from {xt_H, xt_L} to RF64 selected by the address
///                                    ###
///               %%        26         # Stuffing bits...
///     @ 0x0000C PopParam             (P)
///               %unsigned 16 rS                        
///                                    ###
///                                    * rS register for A64LD
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00010                      (W-)
///     #         # Stuffing bytes...
///               %% 8064
///     @ 0x00400 Push                 (P)
///     # 0x00400 a64CmdAll            
///               $A64CmdAll           a64CmdAll         MEM          
///                                    ###
///                                    * Write triggers A64CMD
///                                    ###
///     @ 0x00800 Pop                  (P)
///     # 0x00800 a64DatAll            
///               $A64DatAll           a64DatAll         MEM          
///                                    ###
///                                    * Read triggers A64LD
///                                    * ALU64 interface
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    4096B, bits:     150b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ALU64
#define h_ALU64 (){}

    #define     RA_ALU64_xT_l                                  0x0000

    #define     BA_ALU64_xT_l_val                              0x0000
    #define     B16ALU64_xT_l_val                              0x0000
    #define   LSb32ALU64_xT_l_val                                 0
    #define   LSb16ALU64_xT_l_val                                 0
    #define       bALU64_xT_l_val                              32
    #define   MSK32ALU64_xT_l_val                                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_ALU64_xT_h                                  0x0004

    #define     BA_ALU64_xT_h_val                              0x0004
    #define     B16ALU64_xT_h_val                              0x0004
    #define   LSb32ALU64_xT_h_val                                 0
    #define   LSb16ALU64_xT_h_val                                 0
    #define       bALU64_xT_h_val                              32
    #define   MSK32ALU64_xT_h_val                                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_ALU64_X2Q                                   0x0008

    #define     BA_ALU64_X2Q_adr                               0x0008
    #define     B16ALU64_X2Q_adr                               0x0008
    #define   LSb32ALU64_X2Q_adr                                  0
    #define   LSb16ALU64_X2Q_adr                                  0
    #define       bALU64_X2Q_adr                               6
    #define   MSK32ALU64_X2Q_adr                                  0x0000003F
    ///////////////////////////////////////////////////////////
    #define     RA_ALU64_PopParam                              0x000C

    #define     BA_ALU64_PopParam_rS                           0x000C
    #define     B16ALU64_PopParam_rS                           0x000C
    #define   LSb32ALU64_PopParam_rS                              0
    #define   LSb16ALU64_PopParam_rS                              0
    #define       bALU64_PopParam_rS                           16
    #define   MSK32ALU64_PopParam_rS                              0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_ALU64_Push                                  0x0400
    #define     RA_ALU64_a64CmdAll                             0x0400
    ///////////////////////////////////////////////////////////
    #define     RA_ALU64_Pop                                   0x0800
    #define     RA_ALU64_a64DatAll                             0x0800
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ALU64 {
    ///////////////////////////////////////////////////////////
    #define   GET32ALU64_xT_l_val(r32)                         _BFGET_(r32,31, 0)
    #define   SET32ALU64_xT_l_val(r32,v)                       _BFSET_(r32,31, 0,v)

    #define     w32ALU64_xT_l                                  {\
            UNSG32 uxT_l_val                                   : 32;\
          }
    union { UNSG32 u32ALU64_xT_l;
            struct w32ALU64_xT_l;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32ALU64_xT_h_val(r32)                         _BFGET_(r32,31, 0)
    #define   SET32ALU64_xT_h_val(r32,v)                       _BFSET_(r32,31, 0,v)

    #define     w32ALU64_xT_h                                  {\
            UNSG32 uxT_h_val                                   : 32;\
          }
    union { UNSG32 u32ALU64_xT_h;
            struct w32ALU64_xT_h;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32ALU64_X2Q_adr(r32)                          _BFGET_(r32, 5, 0)
    #define   SET32ALU64_X2Q_adr(r32,v)                        _BFSET_(r32, 5, 0,v)
    #define   GET16ALU64_X2Q_adr(r16)                          _BFGET_(r16, 5, 0)
    #define   SET16ALU64_X2Q_adr(r16,v)                        _BFSET_(r16, 5, 0,v)

    #define     w32ALU64_X2Q                                   {\
            UNSG32 uX2Q_adr                                    :  6;\
            UNSG32 RSVDx8_b6                                   : 26;\
          }
    union { UNSG32 u32ALU64_X2Q;
            struct w32ALU64_X2Q;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32ALU64_PopParam_rS(r32)                      _BFGET_(r32,15, 0)
    #define   SET32ALU64_PopParam_rS(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16ALU64_PopParam_rS(r16)                      _BFGET_(r16,15, 0)
    #define   SET16ALU64_PopParam_rS(r16,v)                    _BFSET_(r16,15, 0,v)

    #define     w32ALU64_PopParam                              {\
            UNSG32 uPopParam_rS                                : 16;\
            UNSG32 RSVDxC_b16                                  : 16;\
          }
    union { UNSG32 u32ALU64_PopParam;
            struct w32ALU64_PopParam;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx10                                     [1008];
    ///////////////////////////////////////////////////////////
              SIE_A64CmdAll                                    ie_a64CmdAll;
    ///////////////////////////////////////////////////////////
              SIE_A64DatAll                                    ie_a64DatAll;
    ///////////////////////////////////////////////////////////
    } SIE_ALU64;

    typedef union  T32ALU64_xT_l
          { UNSG32 u32;
            struct w32ALU64_xT_l;
                 } T32ALU64_xT_l;
    typedef union  T32ALU64_xT_h
          { UNSG32 u32;
            struct w32ALU64_xT_h;
                 } T32ALU64_xT_h;
    typedef union  T32ALU64_X2Q
          { UNSG32 u32;
            struct w32ALU64_X2Q;
                 } T32ALU64_X2Q;
    typedef union  T32ALU64_PopParam
          { UNSG32 u32;
            struct w32ALU64_PopParam;
                 } T32ALU64_PopParam;
    ///////////////////////////////////////////////////////////

    typedef union  TALU64_xT_l
          { UNSG32 u32[1];
            struct {
            struct w32ALU64_xT_l;
                   };
                 } TALU64_xT_l;
    typedef union  TALU64_xT_h
          { UNSG32 u32[1];
            struct {
            struct w32ALU64_xT_h;
                   };
                 } TALU64_xT_h;
    typedef union  TALU64_X2Q
          { UNSG32 u32[1];
            struct {
            struct w32ALU64_X2Q;
                   };
                 } TALU64_X2Q;
    typedef union  TALU64_PopParam
          { UNSG32 u32[1];
            struct {
            struct w32ALU64_PopParam;
                   };
                 } TALU64_PopParam;

    ///////////////////////////////////////////////////////////
     SIGN32 ALU64_drvrd(SIE_ALU64 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ALU64_drvwr(SIE_ALU64 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ALU64_reset(SIE_ALU64 *p);
     SIGN32 ALU64_cmp  (SIE_ALU64 *p, SIE_ALU64 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ALU64_check(p,pie,pfx,hLOG) ALU64_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ALU64_print(p,    pfx,hLOG) ALU64_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ALU64
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoTraceBuf            biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 entry                (P)
///               %unsigned 32 val                       
///                                    ###
///                                    * Register window for the trace buffer
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoTraceBuf
#define h_FigoTraceBuf (){}

    #define     RA_FigoTraceBuf_entry                          0x0000

    #define     BA_FigoTraceBuf_entry_val                      0x0000
    #define     B16FigoTraceBuf_entry_val                      0x0000
    #define   LSb32FigoTraceBuf_entry_val                         0
    #define   LSb16FigoTraceBuf_entry_val                         0
    #define       bFigoTraceBuf_entry_val                      32
    #define   MSK32FigoTraceBuf_entry_val                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoTraceBuf {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoTraceBuf_entry_val(r32)                 _BFGET_(r32,31, 0)
    #define   SET32FigoTraceBuf_entry_val(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32FigoTraceBuf_entry                          {\
            UNSG32 uentry_val                                  : 32;\
          }
    union { UNSG32 u32FigoTraceBuf_entry;
            struct w32FigoTraceBuf_entry;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FigoTraceBuf;

    typedef union  T32FigoTraceBuf_entry
          { UNSG32 u32;
            struct w32FigoTraceBuf_entry;
                 } T32FigoTraceBuf_entry;
    ///////////////////////////////////////////////////////////

    typedef union  TFigoTraceBuf_entry
          { UNSG32 u32[1];
            struct {
            struct w32FigoTraceBuf_entry;
                   };
                 } TFigoTraceBuf_entry;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoTraceBuf_drvrd(SIE_FigoTraceBuf *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoTraceBuf_drvwr(SIE_FigoTraceBuf *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoTraceBuf_reset(SIE_FigoTraceBuf *p);
     SIGN32 FigoTraceBuf_cmp  (SIE_FigoTraceBuf *p, SIE_FigoTraceBuf *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoTraceBuf_check(p,pie,pfx,hLOG) FigoTraceBuf_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoTraceBuf_print(p,    pfx,hLOG) FigoTraceBuf_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoTraceBuf
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoReg16               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 entry                (P)
///               %unsigned 16 val                       
///                                    ###
///                                    * Register window for the trace buffer
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoReg16
#define h_FigoReg16 (){}

    #define     RA_FigoReg16_entry                             0x0000

    #define     BA_FigoReg16_entry_val                         0x0000
    #define     B16FigoReg16_entry_val                         0x0000
    #define   LSb32FigoReg16_entry_val                            0
    #define   LSb16FigoReg16_entry_val                            0
    #define       bFigoReg16_entry_val                         16
    #define   MSK32FigoReg16_entry_val                            0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoReg16 {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg16_entry_val(r32)                    _BFGET_(r32,15, 0)
    #define   SET32FigoReg16_entry_val(r32,v)                  _BFSET_(r32,15, 0,v)
    #define   GET16FigoReg16_entry_val(r16)                    _BFGET_(r16,15, 0)
    #define   SET16FigoReg16_entry_val(r16,v)                  _BFSET_(r16,15, 0,v)

    #define     w32FigoReg16_entry                             {\
            UNSG32 uentry_val                                  : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32FigoReg16_entry;
            struct w32FigoReg16_entry;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FigoReg16;

    typedef union  T32FigoReg16_entry
          { UNSG32 u32;
            struct w32FigoReg16_entry;
                 } T32FigoReg16_entry;
    ///////////////////////////////////////////////////////////

    typedef union  TFigoReg16_entry
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg16_entry;
                   };
                 } TFigoReg16_entry;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoReg16_drvrd(SIE_FigoReg16 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoReg16_drvwr(SIE_FigoReg16 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoReg16_reset(SIE_FigoReg16 *p);
     SIGN32 FigoReg16_cmp  (SIE_FigoReg16 *p, SIE_FigoReg16 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoReg16_check(p,pie,pfx,hLOG) FigoReg16_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoReg16_print(p,    pfx,hLOG) FigoReg16_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoReg16
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoRF16Reg             biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 entry                (RW)
///               %unsigned 16 val                       0x0
///                                    ###
///                                    * Register window for the RF16 access in debug mode
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoRF16Reg
#define h_FigoRF16Reg (){}

    #define     RA_FigoRF16Reg_entry                           0x0000

    #define     BA_FigoRF16Reg_entry_val                       0x0000
    #define     B16FigoRF16Reg_entry_val                       0x0000
    #define   LSb32FigoRF16Reg_entry_val                          0
    #define   LSb16FigoRF16Reg_entry_val                          0
    #define       bFigoRF16Reg_entry_val                       16
    #define   MSK32FigoRF16Reg_entry_val                          0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoRF16Reg {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoRF16Reg_entry_val(r32)                  _BFGET_(r32,15, 0)
    #define   SET32FigoRF16Reg_entry_val(r32,v)                _BFSET_(r32,15, 0,v)
    #define   GET16FigoRF16Reg_entry_val(r16)                  _BFGET_(r16,15, 0)
    #define   SET16FigoRF16Reg_entry_val(r16,v)                _BFSET_(r16,15, 0,v)

    #define     w32FigoRF16Reg_entry                           {\
            UNSG32 uentry_val                                  : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32FigoRF16Reg_entry;
            struct w32FigoRF16Reg_entry;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FigoRF16Reg;

    typedef union  T32FigoRF16Reg_entry
          { UNSG32 u32;
            struct w32FigoRF16Reg_entry;
                 } T32FigoRF16Reg_entry;
    ///////////////////////////////////////////////////////////

    typedef union  TFigoRF16Reg_entry
          { UNSG32 u32[1];
            struct {
            struct w32FigoRF16Reg_entry;
                   };
                 } TFigoRF16Reg_entry;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoRF16Reg_drvrd(SIE_FigoRF16Reg *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoRF16Reg_drvwr(SIE_FigoRF16Reg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoRF16Reg_reset(SIE_FigoRF16Reg *p);
     SIGN32 FigoRF16Reg_cmp  (SIE_FigoRF16Reg *p, SIE_FigoRF16Reg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoRF16Reg_check(p,pie,pfx,hLOG) FigoRF16Reg_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoRF16Reg_print(p,    pfx,hLOG) FigoRF16Reg_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoRF16Reg
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoMem16                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 entry                (RW-)
///               %unsigned 16 val                       
///                                    ###
///                                    * Register window for the Jump Stack access in debug mode
///                                    ###
///               %%        16         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      16b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoMem16
#define h_FigoMem16 (){}

    #define     RA_FigoMem16_entry                             0x0000

    #define     BA_FigoMem16_entry_val                         0x0000
    #define     B16FigoMem16_entry_val                         0x0000
    #define   LSb32FigoMem16_entry_val                            0
    #define   LSb16FigoMem16_entry_val                            0
    #define       bFigoMem16_entry_val                         16
    #define   MSK32FigoMem16_entry_val                            0x0000FFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoMem16 {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoMem16_entry_val(r32)                    _BFGET_(r32,15, 0)
    #define   SET32FigoMem16_entry_val(r32,v)                  _BFSET_(r32,15, 0,v)
    #define   GET16FigoMem16_entry_val(r16)                    _BFGET_(r16,15, 0)
    #define   SET16FigoMem16_entry_val(r16,v)                  _BFSET_(r16,15, 0,v)

    #define     w32FigoMem16_entry                             {\
            UNSG32 uentry_val                                  : 16;\
            UNSG32 RSVDx0_b16                                  : 16;\
          }
    union { UNSG32 u32FigoMem16_entry;
            struct w32FigoMem16_entry;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FigoMem16;

    typedef union  T32FigoMem16_entry
          { UNSG32 u32;
            struct w32FigoMem16_entry;
                 } T32FigoMem16_entry;
    ///////////////////////////////////////////////////////////

    typedef union  TFigoMem16_entry
          { UNSG32 u32[1];
            struct {
            struct w32FigoMem16_entry;
                   };
                 } TFigoMem16_entry;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoMem16_drvrd(SIE_FigoMem16 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoMem16_drvwr(SIE_FigoMem16 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoMem16_reset(SIE_FigoMem16 *p);
     SIGN32 FigoMem16_cmp  (SIE_FigoMem16 *p, SIE_FigoMem16 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoMem16_check(p,pie,pfx,hLOG) FigoMem16_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoMem16_print(p,    pfx,hLOG) FigoMem16_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoMem16
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoMem32                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 entry                (RW-)
///               %unsigned 32 val                       
///                                    ###
///                                    * Register window for the Jump Stack access in debug mode
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoMem32
#define h_FigoMem32 (){}

    #define     RA_FigoMem32_entry                             0x0000

    #define     BA_FigoMem32_entry_val                         0x0000
    #define     B16FigoMem32_entry_val                         0x0000
    #define   LSb32FigoMem32_entry_val                            0
    #define   LSb16FigoMem32_entry_val                            0
    #define       bFigoMem32_entry_val                         32
    #define   MSK32FigoMem32_entry_val                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoMem32 {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoMem32_entry_val(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FigoMem32_entry_val(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FigoMem32_entry                             {\
            UNSG32 uentry_val                                  : 32;\
          }
    union { UNSG32 u32FigoMem32_entry;
            struct w32FigoMem32_entry;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FigoMem32;

    typedef union  T32FigoMem32_entry
          { UNSG32 u32;
            struct w32FigoMem32_entry;
                 } T32FigoMem32_entry;
    ///////////////////////////////////////////////////////////

    typedef union  TFigoMem32_entry
          { UNSG32 u32[1];
            struct {
            struct w32FigoMem32_entry;
                   };
                 } TFigoMem32_entry;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoMem32_drvrd(SIE_FigoMem32 *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoMem32_drvwr(SIE_FigoMem32 *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoMem32_reset(SIE_FigoMem32 *p);
     SIGN32 FigoMem32_cmp  (SIE_FigoMem32 *p, SIE_FigoMem32 *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoMem32_check(p,pie,pfx,hLOG) FigoMem32_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoMem32_print(p,    pfx,hLOG) FigoMem32_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoMem32
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoDebug               biu              (4,4)
///     ###
///     * FIGO debug mode related registers and signals
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 figoDbg              (RW-)
///               ###
///               * Puts FIGO in debug mode
///               ###
///               %unsigned 1  on                        0x0
///               %%        31         # Stuffing bits...
///     @ 0x00004 figoDbgMode          (P)
///               ###
///               * Determines FIGO's behavior in debug mode
///               ###
///               %unsigned 2  mode                      0x0
///                                    : stop                      0x0
///                                                 ###
///                                                 * FIGO flushes and stalls its pipeline
///                                                 ###
///                                    : step                      0x1
///                                                 ###
///                                                 * FIGO executes one instruction at a time. Repeat to execute the next instruction.
///                                                 ###
///                                    : slow_run                  0x2
///                                                 ###
///                                                 * FIGO inserts sufficient bubbles between each instruction to bypass all forwarding logic
///                                                 ###
///                                    : fast_run                  0x3
///                                                 ###
///                                                 * FIGO resumes full-speed operation. Feature has been disabled due to timing impact.
///                                                 ###
///               %%        30         # Stuffing bits...
///     @ 0x00008 figoDbgModeStatus    (R-)
///               ###
///               * Similar to figoDbgMode, but read-only. Shows the actual status of FIGO, as it may be different from what is set in figoDbgMode.
///               ###
///               %unsigned 2  mode                      0x0
///                                    : stop                      0x0
///                                    : step                      0x1
///                                    : slow_run                  0x2
///                                    : fast_run                  0x3
///                                                 ###
///                                                 * Same enumerations
///                                                 ###
///               %%        30         # Stuffing bits...
///     @ 0x0000C figoDbgTrigInMask    (P)
///               ###
///               * 4 mask bits for trigger-in signals from up to 4 other FIGOs hitting breakpoints.
///               ###
///               %unsigned 4  on                        0xF
///                                    ###
///                                    * On by default, all trigger-ins are blocked.
///                                    ###
///               %%        28         # Stuffing bits...
///     @ 0x00010                      (W-)
///     #         # Stuffing bytes...
///               %% 384
///     @ 0x00040 figoDbgRF16          (RW-)
///               ###
///               * BIU access to RF16
///               ###
///     # 0x00040 rf16                 
///               $FigoMem16           rf16              MEM      [16]
///                                    ###
///                                    * Register mapping
///                                    * x0 = {d0,c0,b0,a0} = MEM[3:0]
///                                    * x1 = {d1,c1,b1,a1} = MEM[7:4]
///                                    * x2 = {d2,c2,b2,a2} = MEM[11:8]
///                                    * x3 = {d3,c3,b3,a3} = MEM[15:12]
///                                    ###
///     @ 0x00080 figoDbgRB            (RW-)
///               ###
///               * BIU access to RB register
///               ###
///               %unsigned 16 rb                        0x0
///               %%        16         # Stuffing bits...
///     @ 0x00084 figoDbgPCAtFetch     (R-)
///               ###
///               * BIU access to PC register at Fetch stage
///               ###
///               %unsigned 16 pc                        0x0
///               %%        16         # Stuffing bits...
///     @ 0x00088                      (W-)
///     #         # Stuffing bytes...
///               %% 64
///     @ 0x00090 figoDbgJumpStack     (RW-)
///               ###
///               * BIU access to jump stack
///               ###
///     # 0x00090 stack                
///               $FigoMem32           stack             MEM       [4]
///                                    ###
///                                    * Register mapping
///                                    * MEM[0] = {branchPos[0],jumpDest[0]}
///                                    * MEM[1] = {branchPos[1],jumpDest[1]}
///                                    * MEM[2] = {branchPos[2],jumpDest[2]}
///                                    * MEM[3] = {branchPos[3],jumpDest[3]}
///                                    ###
///     @ 0x000A0 figoDbgStackDepth    (R-)
///               ###
///               * BIU access to number of current jump stack entries
///               ###
///               %unsigned 5  depth                     0x0
///                                    ###
///                                    * Values are one-hot. Following actual stack pointer implementation inside FIGO so that no additional logic is required.
///                                    * 00001 = 0 valid entries (stack empty)
///                                    * 00010 = 1 valid entry
///                                    * 00100 = 2 valid entries
///                                    * 01000 = 3 valid entries
///                                    * 10000 = 4 valid entries (stack full)
///                                    ###
///               %%        27         # Stuffing bits...
///     @ 0x000A4 figoDbgFlags         (R-)
///               ###
///               * BIU access to flags register
///               ###
///               %unsigned 16 flags                     0x0
///                                    ###
///                                    * flags[15:0] = {LSj, Lj, GSj, Gj, LS, L, GS, G, 1, 0, Cj, Zj, V, N, C, Z}
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x000A8 figoDbgBreak         (WOC-)
///               ###
///               * Bit that indicates FIGO entered debug mode due to breakpoint
///               ###
///               %unsigned 1  up                        0x0
///                                    ###
///                                    * Write one to clear
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x000AC figoDbgBkBitWen      (P)
///               ###
///               * Enable bit to allow breakpoint bits to be written into ITCM by BIU.
///               ###
///               %unsigned 1  en                        0x0
///                                    ###
///                                    * Additional enable bit to safeguard against accidentally writing ones into the breakpoint fields of the ITCM.
///                                    * Register window for the trace buffer
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x000B0                      (W-)
///     #         # Stuffing bytes...
///               %% 128
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     192B, bits:     128b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoDebug
#define h_FigoDebug (){}

    #define     RA_FigoDebug_figoDbg                           0x0000

    #define     BA_FigoDebug_figoDbg_on                        0x0000
    #define     B16FigoDebug_figoDbg_on                        0x0000
    #define   LSb32FigoDebug_figoDbg_on                           0
    #define   LSb16FigoDebug_figoDbg_on                           0
    #define       bFigoDebug_figoDbg_on                        1
    #define   MSK32FigoDebug_figoDbg_on                           0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgMode                       0x0004

    #define     BA_FigoDebug_figoDbgMode_mode                  0x0004
    #define     B16FigoDebug_figoDbgMode_mode                  0x0004
    #define   LSb32FigoDebug_figoDbgMode_mode                     0
    #define   LSb16FigoDebug_figoDbgMode_mode                     0
    #define       bFigoDebug_figoDbgMode_mode                  2
    #define   MSK32FigoDebug_figoDbgMode_mode                     0x00000003
    #define        FigoDebug_figoDbgMode_mode_stop                          0x0
    #define        FigoDebug_figoDbgMode_mode_step                          0x1
    #define        FigoDebug_figoDbgMode_mode_slow_run                      0x2
    #define        FigoDebug_figoDbgMode_mode_fast_run                      0x3
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgModeStatus                 0x0008

    #define     BA_FigoDebug_figoDbgModeStatus_mode            0x0008
    #define     B16FigoDebug_figoDbgModeStatus_mode            0x0008
    #define   LSb32FigoDebug_figoDbgModeStatus_mode               0
    #define   LSb16FigoDebug_figoDbgModeStatus_mode               0
    #define       bFigoDebug_figoDbgModeStatus_mode            2
    #define   MSK32FigoDebug_figoDbgModeStatus_mode               0x00000003
    #define        FigoDebug_figoDbgModeStatus_mode_stop                    0x0
    #define        FigoDebug_figoDbgModeStatus_mode_step                    0x1
    #define        FigoDebug_figoDbgModeStatus_mode_slow_run                0x2
    #define        FigoDebug_figoDbgModeStatus_mode_fast_run                0x3
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgTrigInMask                 0x000C

    #define     BA_FigoDebug_figoDbgTrigInMask_on              0x000C
    #define     B16FigoDebug_figoDbgTrigInMask_on              0x000C
    #define   LSb32FigoDebug_figoDbgTrigInMask_on                 0
    #define   LSb16FigoDebug_figoDbgTrigInMask_on                 0
    #define       bFigoDebug_figoDbgTrigInMask_on              4
    #define   MSK32FigoDebug_figoDbgTrigInMask_on                 0x0000000F
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgRF16                       0x0040
    #define     RA_FigoDebug_rf16                              0x0040
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgRB                         0x0080

    #define     BA_FigoDebug_figoDbgRB_rb                      0x0080
    #define     B16FigoDebug_figoDbgRB_rb                      0x0080
    #define   LSb32FigoDebug_figoDbgRB_rb                         0
    #define   LSb16FigoDebug_figoDbgRB_rb                         0
    #define       bFigoDebug_figoDbgRB_rb                      16
    #define   MSK32FigoDebug_figoDbgRB_rb                         0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgPCAtFetch                  0x0084

    #define     BA_FigoDebug_figoDbgPCAtFetch_pc               0x0084
    #define     B16FigoDebug_figoDbgPCAtFetch_pc               0x0084
    #define   LSb32FigoDebug_figoDbgPCAtFetch_pc                  0
    #define   LSb16FigoDebug_figoDbgPCAtFetch_pc                  0
    #define       bFigoDebug_figoDbgPCAtFetch_pc               16
    #define   MSK32FigoDebug_figoDbgPCAtFetch_pc                  0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgJumpStack                  0x0090
    #define     RA_FigoDebug_stack                             0x0090
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgStackDepth                 0x00A0

    #define     BA_FigoDebug_figoDbgStackDepth_depth           0x00A0
    #define     B16FigoDebug_figoDbgStackDepth_depth           0x00A0
    #define   LSb32FigoDebug_figoDbgStackDepth_depth              0
    #define   LSb16FigoDebug_figoDbgStackDepth_depth              0
    #define       bFigoDebug_figoDbgStackDepth_depth           5
    #define   MSK32FigoDebug_figoDbgStackDepth_depth              0x0000001F
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgFlags                      0x00A4

    #define     BA_FigoDebug_figoDbgFlags_flags                0x00A4
    #define     B16FigoDebug_figoDbgFlags_flags                0x00A4
    #define   LSb32FigoDebug_figoDbgFlags_flags                   0
    #define   LSb16FigoDebug_figoDbgFlags_flags                   0
    #define       bFigoDebug_figoDbgFlags_flags                16
    #define   MSK32FigoDebug_figoDbgFlags_flags                   0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgBreak                      0x00A8

    #define     BA_FigoDebug_figoDbgBreak_up                   0x00A8
    #define     B16FigoDebug_figoDbgBreak_up                   0x00A8
    #define   LSb32FigoDebug_figoDbgBreak_up                      0
    #define   LSb16FigoDebug_figoDbgBreak_up                      0
    #define       bFigoDebug_figoDbgBreak_up                   1
    #define   MSK32FigoDebug_figoDbgBreak_up                      0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FigoDebug_figoDbgBkBitWen                   0x00AC

    #define     BA_FigoDebug_figoDbgBkBitWen_en                0x00AC
    #define     B16FigoDebug_figoDbgBkBitWen_en                0x00AC
    #define   LSb32FigoDebug_figoDbgBkBitWen_en                   0
    #define   LSb16FigoDebug_figoDbgBkBitWen_en                   0
    #define       bFigoDebug_figoDbgBkBitWen_en                1
    #define   MSK32FigoDebug_figoDbgBkBitWen_en                   0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoDebug {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbg_on(r32)                   _BFGET_(r32, 0, 0)
    #define   SET32FigoDebug_figoDbg_on(r32,v)                 _BFSET_(r32, 0, 0,v)
    #define   GET16FigoDebug_figoDbg_on(r16)                   _BFGET_(r16, 0, 0)
    #define   SET16FigoDebug_figoDbg_on(r16,v)                 _BFSET_(r16, 0, 0,v)

    #define     w32FigoDebug_figoDbg                           {\
            UNSG32 ufigoDbg_on                                 :  1;\
            UNSG32 RSVDx0_b1                                   : 31;\
          }
    union { UNSG32 u32FigoDebug_figoDbg;
            struct w32FigoDebug_figoDbg;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgMode_mode(r32)             _BFGET_(r32, 1, 0)
    #define   SET32FigoDebug_figoDbgMode_mode(r32,v)           _BFSET_(r32, 1, 0,v)
    #define   GET16FigoDebug_figoDbgMode_mode(r16)             _BFGET_(r16, 1, 0)
    #define   SET16FigoDebug_figoDbgMode_mode(r16,v)           _BFSET_(r16, 1, 0,v)

    #define     w32FigoDebug_figoDbgMode                       {\
            UNSG32 ufigoDbgMode_mode                           :  2;\
            UNSG32 RSVDx4_b2                                   : 30;\
          }
    union { UNSG32 u32FigoDebug_figoDbgMode;
            struct w32FigoDebug_figoDbgMode;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgModeStatus_mode(r32)       _BFGET_(r32, 1, 0)
    #define   SET32FigoDebug_figoDbgModeStatus_mode(r32,v)     _BFSET_(r32, 1, 0,v)
    #define   GET16FigoDebug_figoDbgModeStatus_mode(r16)       _BFGET_(r16, 1, 0)
    #define   SET16FigoDebug_figoDbgModeStatus_mode(r16,v)     _BFSET_(r16, 1, 0,v)

    #define     w32FigoDebug_figoDbgModeStatus                 {\
            UNSG32 ufigoDbgModeStatus_mode                     :  2;\
            UNSG32 RSVDx8_b2                                   : 30;\
          }
    union { UNSG32 u32FigoDebug_figoDbgModeStatus;
            struct w32FigoDebug_figoDbgModeStatus;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgTrigInMask_on(r32)         _BFGET_(r32, 3, 0)
    #define   SET32FigoDebug_figoDbgTrigInMask_on(r32,v)       _BFSET_(r32, 3, 0,v)
    #define   GET16FigoDebug_figoDbgTrigInMask_on(r16)         _BFGET_(r16, 3, 0)
    #define   SET16FigoDebug_figoDbgTrigInMask_on(r16,v)       _BFSET_(r16, 3, 0,v)

    #define     w32FigoDebug_figoDbgTrigInMask                 {\
            UNSG32 ufigoDbgTrigInMask_on                       :  4;\
            UNSG32 RSVDxC_b4                                   : 28;\
          }
    union { UNSG32 u32FigoDebug_figoDbgTrigInMask;
            struct w32FigoDebug_figoDbgTrigInMask;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx10                                     [48];
    ///////////////////////////////////////////////////////////
              SIE_FigoMem16                                    ie_rf16[16];
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgRB_rb(r32)                 _BFGET_(r32,15, 0)
    #define   SET32FigoDebug_figoDbgRB_rb(r32,v)               _BFSET_(r32,15, 0,v)
    #define   GET16FigoDebug_figoDbgRB_rb(r16)                 _BFGET_(r16,15, 0)
    #define   SET16FigoDebug_figoDbgRB_rb(r16,v)               _BFSET_(r16,15, 0,v)

    #define     w32FigoDebug_figoDbgRB                         {\
            UNSG32 ufigoDbgRB_rb                               : 16;\
            UNSG32 RSVDx80_b16                                 : 16;\
          }
    union { UNSG32 u32FigoDebug_figoDbgRB;
            struct w32FigoDebug_figoDbgRB;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgPCAtFetch_pc(r32)          _BFGET_(r32,15, 0)
    #define   SET32FigoDebug_figoDbgPCAtFetch_pc(r32,v)        _BFSET_(r32,15, 0,v)
    #define   GET16FigoDebug_figoDbgPCAtFetch_pc(r16)          _BFGET_(r16,15, 0)
    #define   SET16FigoDebug_figoDbgPCAtFetch_pc(r16,v)        _BFSET_(r16,15, 0,v)

    #define     w32FigoDebug_figoDbgPCAtFetch                  {\
            UNSG32 ufigoDbgPCAtFetch_pc                        : 16;\
            UNSG32 RSVDx84_b16                                 : 16;\
          }
    union { UNSG32 u32FigoDebug_figoDbgPCAtFetch;
            struct w32FigoDebug_figoDbgPCAtFetch;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx88                                     [8];
    ///////////////////////////////////////////////////////////
              SIE_FigoMem32                                    ie_stack[4];
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgStackDepth_depth(r32)      _BFGET_(r32, 4, 0)
    #define   SET32FigoDebug_figoDbgStackDepth_depth(r32,v)    _BFSET_(r32, 4, 0,v)
    #define   GET16FigoDebug_figoDbgStackDepth_depth(r16)      _BFGET_(r16, 4, 0)
    #define   SET16FigoDebug_figoDbgStackDepth_depth(r16,v)    _BFSET_(r16, 4, 0,v)

    #define     w32FigoDebug_figoDbgStackDepth                 {\
            UNSG32 ufigoDbgStackDepth_depth                    :  5;\
            UNSG32 RSVDxA0_b5                                  : 27;\
          }
    union { UNSG32 u32FigoDebug_figoDbgStackDepth;
            struct w32FigoDebug_figoDbgStackDepth;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgFlags_flags(r32)           _BFGET_(r32,15, 0)
    #define   SET32FigoDebug_figoDbgFlags_flags(r32,v)         _BFSET_(r32,15, 0,v)
    #define   GET16FigoDebug_figoDbgFlags_flags(r16)           _BFGET_(r16,15, 0)
    #define   SET16FigoDebug_figoDbgFlags_flags(r16,v)         _BFSET_(r16,15, 0,v)

    #define     w32FigoDebug_figoDbgFlags                      {\
            UNSG32 ufigoDbgFlags_flags                         : 16;\
            UNSG32 RSVDxA4_b16                                 : 16;\
          }
    union { UNSG32 u32FigoDebug_figoDbgFlags;
            struct w32FigoDebug_figoDbgFlags;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgBreak_up(r32)              _BFGET_(r32, 0, 0)
    #define   SET32FigoDebug_figoDbgBreak_up(r32,v)            _BFSET_(r32, 0, 0,v)
    #define   GET16FigoDebug_figoDbgBreak_up(r16)              _BFGET_(r16, 0, 0)
    #define   SET16FigoDebug_figoDbgBreak_up(r16,v)            _BFSET_(r16, 0, 0,v)

    #define     w32FigoDebug_figoDbgBreak                      {\
            UNSG32 ufigoDbgBreak_up                            :  1;\
            UNSG32 RSVDxA8_b1                                  : 31;\
          }
    union { UNSG32 u32FigoDebug_figoDbgBreak;
            struct w32FigoDebug_figoDbgBreak;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoDebug_figoDbgBkBitWen_en(r32)           _BFGET_(r32, 0, 0)
    #define   SET32FigoDebug_figoDbgBkBitWen_en(r32,v)         _BFSET_(r32, 0, 0,v)
    #define   GET16FigoDebug_figoDbgBkBitWen_en(r16)           _BFGET_(r16, 0, 0)
    #define   SET16FigoDebug_figoDbgBkBitWen_en(r16,v)         _BFSET_(r16, 0, 0,v)

    #define     w32FigoDebug_figoDbgBkBitWen                   {\
            UNSG32 ufigoDbgBkBitWen_en                         :  1;\
            UNSG32 RSVDxAC_b1                                  : 31;\
          }
    union { UNSG32 u32FigoDebug_figoDbgBkBitWen;
            struct w32FigoDebug_figoDbgBkBitWen;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxB0                                     [16];
    ///////////////////////////////////////////////////////////
    } SIE_FigoDebug;

    typedef union  T32FigoDebug_figoDbg
          { UNSG32 u32;
            struct w32FigoDebug_figoDbg;
                 } T32FigoDebug_figoDbg;
    typedef union  T32FigoDebug_figoDbgMode
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgMode;
                 } T32FigoDebug_figoDbgMode;
    typedef union  T32FigoDebug_figoDbgModeStatus
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgModeStatus;
                 } T32FigoDebug_figoDbgModeStatus;
    typedef union  T32FigoDebug_figoDbgTrigInMask
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgTrigInMask;
                 } T32FigoDebug_figoDbgTrigInMask;
    typedef union  T32FigoDebug_figoDbgRB
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgRB;
                 } T32FigoDebug_figoDbgRB;
    typedef union  T32FigoDebug_figoDbgPCAtFetch
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgPCAtFetch;
                 } T32FigoDebug_figoDbgPCAtFetch;
    typedef union  T32FigoDebug_figoDbgStackDepth
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgStackDepth;
                 } T32FigoDebug_figoDbgStackDepth;
    typedef union  T32FigoDebug_figoDbgFlags
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgFlags;
                 } T32FigoDebug_figoDbgFlags;
    typedef union  T32FigoDebug_figoDbgBreak
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgBreak;
                 } T32FigoDebug_figoDbgBreak;
    typedef union  T32FigoDebug_figoDbgBkBitWen
          { UNSG32 u32;
            struct w32FigoDebug_figoDbgBkBitWen;
                 } T32FigoDebug_figoDbgBkBitWen;
    ///////////////////////////////////////////////////////////

    typedef union  TFigoDebug_figoDbg
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbg;
                   };
                 } TFigoDebug_figoDbg;
    typedef union  TFigoDebug_figoDbgMode
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgMode;
                   };
                 } TFigoDebug_figoDbgMode;
    typedef union  TFigoDebug_figoDbgModeStatus
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgModeStatus;
                   };
                 } TFigoDebug_figoDbgModeStatus;
    typedef union  TFigoDebug_figoDbgTrigInMask
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgTrigInMask;
                   };
                 } TFigoDebug_figoDbgTrigInMask;
    typedef union  TFigoDebug_figoDbgRB
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgRB;
                   };
                 } TFigoDebug_figoDbgRB;
    typedef union  TFigoDebug_figoDbgPCAtFetch
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgPCAtFetch;
                   };
                 } TFigoDebug_figoDbgPCAtFetch;
    typedef union  TFigoDebug_figoDbgStackDepth
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgStackDepth;
                   };
                 } TFigoDebug_figoDbgStackDepth;
    typedef union  TFigoDebug_figoDbgFlags
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgFlags;
                   };
                 } TFigoDebug_figoDbgFlags;
    typedef union  TFigoDebug_figoDbgBreak
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgBreak;
                   };
                 } TFigoDebug_figoDbgBreak;
    typedef union  TFigoDebug_figoDbgBkBitWen
          { UNSG32 u32[1];
            struct {
            struct w32FigoDebug_figoDbgBkBitWen;
                   };
                 } TFigoDebug_figoDbgBkBitWen;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoDebug_drvrd(SIE_FigoDebug *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoDebug_drvwr(SIE_FigoDebug *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoDebug_reset(SIE_FigoDebug *p);
     SIGN32 FigoDebug_cmp  (SIE_FigoDebug *p, SIE_FigoDebug *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoDebug_check(p,pie,pfx,hLOG) FigoDebug_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoDebug_print(p,    pfx,hLOG) FigoDebug_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoDebug
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoReg                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 figoCtrl             (P)
///               %unsigned 16 pcStartLoc                0x0
///               %unsigned 1  tBufMode                  0x0
///                                    : freeRun                   0x0
///                                                 ###
///                                                 * Trace buffer operating as ring buffer
///                                                 ###
///                                    : fifoMode                  0x1
///                                                 ###
///                                                 * Trace buffer operating as FIFO; FIGO stalls when full
///                                                 ###
///               %%        15         # Stuffing bits...
///     @ 0x00004 figoID               (R-)
///               ###
///               * Processor ID, unique for each FIGO
///               ###
///               %unsigned 16 ID                        0x0
///                                    ###
///                                    * Processor ID. Specified in FIGO baseline subsystem configuration file.
///                                    ###
///               %unsigned 16 REV                       0x0
///                                    ###
///                                    * Revision ID. Hard-coded in FIGO core RTL.
///                                    ###
///     @ 0x00008 figoMaxAdr           (P)
///               ###
///               * Max address for ITCM and DTCM, used to detect addr out-of-bound
///               ###
///               %unsigned 16 itcm                      0xFFFF
///               %unsigned 16 dtcm                      0xFFFF
///     @ 0x0000C figoFlags            (WOC-)
///               ###
///               * Exception flags; FIGO halts when unmasked exception happens; write one to clear
///               ###
///               %unsigned 1  itcmAdrOOB                0x0
///                                    ###
///                                    * ITCM address > figoMaxAdr.itcm
///                                    ###
///               %unsigned 1  dtcmAdrOOB                0x0
///                                    ###
///                                    * DTCM address > figoMaxAdr.dtcm
///                                    ###
///               %unsigned 1  divideBy0                 0x0
///                                    ###
///                                    * MDU divide by 0 detected
///                                    ###
///               %unsigned 1  traceBufFull              0x0
///                                    ###
///                                    * Trace buffer is full. Only valid when figoCtrl.tBufMode = fifoMode
///                                    ###
///               %unsigned 1  illegalIns                0x0
///                                    ###
///                                    * Illegal instruction detected at ID stage
///                                    ###
///               %unsigned 1  ALU64Overflow             0x0
///                                    ###
///                                    * One of the ALU64 extensions asserted a command push overflow.
///                                    ###
///               %unsigned 1  JTInvdPush                0x0
///                                    ###
///                                    * Detected a jump table push when it's already full.
///                                    ###
///               %%        25         # Stuffing bits...
///     @ 0x00010 figoFlagsMask        (P)
///               ###
///               * Mask bits for FIGO exception flags. Does not block exception flags from asserting, instead, it prevents FIGO from halting when the masked exception occurs.
///               ###
///               %unsigned 1  itcmAdrOOBMask            0x0
///               %unsigned 1  dtcmAdrOOBMask            0x0
///               %unsigned 1  divideBy0Mask             0x0
///               %unsigned 1  traceBufFullMask          0x0
///               %unsigned 1  illegalInsMask            0x0
///               %unsigned 1  ALU64OverflowMask         0x0
///               %unsigned 1  JTInvdPushMask            0x0
///               %%        25         # Stuffing bits...
///     @ 0x00014 figoLastPC           (R-)
///               ###
///               * Last PC value before exception occurred
///               ###
///               %unsigned 16 val                       0x0
///               %%        16         # Stuffing bits...
///     @ 0x00018 figoCurrPC           (R-)
///     # 0x00018 pc                   
///               $FigoReg16           pc                MEM          
///                                    ###
///                                    * Current PC value @ ID stage
///                                    ###
///     @ 0x0001C figoTraceBuf         (RW-)
///     # 0x0001C tbuf                 
///               $FigoTraceBuf        tbuf              MEM          
///                                    ###
///                                    * Register window for the trace buffer
///                                    ###
///     @ 0x00020 figoIntr             (W-)
///               ###
///               * Special register for FIGO to raise interrupt to CPU via vPro semaphore; write to raise interrupt; no status
///               ###
///               %unsigned 1  up                        0x0
///               %%        31         # Stuffing bits...
///     @ 0x00024 figoIntrLvl          (WOC-)
///               ###
///               * Special register to record that interrupt has occurred; to be used as level interrupt; cleared by writing 1
///               ###
///               %unsigned 1  st                        0x0
///               %%        31         # Stuffing bits...
///     @ 0x00028 figoRstn             (RW-)
///               ###
///               * Special register to stop / reset FIGO execution; write 1 to release FIGO, write 0 to reset FIGO (sticky)
///               ###
///               %unsigned 1  up                        0x0
///               %%        31         # Stuffing bits...
///     @ 0x0002C figoCnt              (RW-)
///               ###
///               * Controls the FIGO counter behavior
///               ###
///               %unsigned 1  en                        0x0
///               %%        31         # Stuffing bits...
///     @ 0x00030 figoCntClr           (W-)
///               ###
///               * Clear FIGO counters; write 1 to clear specific counters
///               ###
///               %unsigned 1  run                       
///               %unsigned 1  stall                     
///               %%        30         # Stuffing bits...
///     @ 0x00034 figoRun              (R-)
///               %unsigned 32 Cnt                       0x0
///     @ 0x00038 figoStall            (R-)
///               %unsigned 32 Cnt                       0x0
///     @ 0x0003C                      (W-)
///     #         # Stuffing bytes...
///               %% 15904
///     @ 0x00800 ALU64                (P)
///     # 0x00800 alu64                
///               $ALU64               alu64             REG          
///                                    ###
///                                    * **DONT_EXPAND_BELOW**
///                                    * ALU64 extensions access via AHB
///                                    ###
///     @ 0x01800 FIGODBG              (P)
///     # 0x01800 debug                
///               $FigoDebug           debug             REG          
///                                    ###
///                                    * **DONT_EXPAND_BELOW**
///                                    * Debug mode related registers
///                                    ###
///     @ 0x018C0                      (W-)
///     #         # Stuffing bytes...
///               %% 14848
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    8192B, bits:     523b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoReg
#define h_FigoReg (){}

    #define     RA_FigoReg_figoCtrl                            0x0000

    #define     BA_FigoReg_figoCtrl_pcStartLoc                 0x0000
    #define     B16FigoReg_figoCtrl_pcStartLoc                 0x0000
    #define   LSb32FigoReg_figoCtrl_pcStartLoc                    0
    #define   LSb16FigoReg_figoCtrl_pcStartLoc                    0
    #define       bFigoReg_figoCtrl_pcStartLoc                 16
    #define   MSK32FigoReg_figoCtrl_pcStartLoc                    0x0000FFFF

    #define     BA_FigoReg_figoCtrl_tBufMode                   0x0002
    #define     B16FigoReg_figoCtrl_tBufMode                   0x0002
    #define   LSb32FigoReg_figoCtrl_tBufMode                      16
    #define   LSb16FigoReg_figoCtrl_tBufMode                      0
    #define       bFigoReg_figoCtrl_tBufMode                   1
    #define   MSK32FigoReg_figoCtrl_tBufMode                      0x00010000
    #define        FigoReg_figoCtrl_tBufMode_freeRun                        0x0
    #define        FigoReg_figoCtrl_tBufMode_fifoMode                       0x1
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoID                              0x0004

    #define     BA_FigoReg_figoID_ID                           0x0004
    #define     B16FigoReg_figoID_ID                           0x0004
    #define   LSb32FigoReg_figoID_ID                              0
    #define   LSb16FigoReg_figoID_ID                              0
    #define       bFigoReg_figoID_ID                           16
    #define   MSK32FigoReg_figoID_ID                              0x0000FFFF

    #define     BA_FigoReg_figoID_REV                          0x0006
    #define     B16FigoReg_figoID_REV                          0x0006
    #define   LSb32FigoReg_figoID_REV                             16
    #define   LSb16FigoReg_figoID_REV                             0
    #define       bFigoReg_figoID_REV                          16
    #define   MSK32FigoReg_figoID_REV                             0xFFFF0000
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoMaxAdr                          0x0008

    #define     BA_FigoReg_figoMaxAdr_itcm                     0x0008
    #define     B16FigoReg_figoMaxAdr_itcm                     0x0008
    #define   LSb32FigoReg_figoMaxAdr_itcm                        0
    #define   LSb16FigoReg_figoMaxAdr_itcm                        0
    #define       bFigoReg_figoMaxAdr_itcm                     16
    #define   MSK32FigoReg_figoMaxAdr_itcm                        0x0000FFFF

    #define     BA_FigoReg_figoMaxAdr_dtcm                     0x000A
    #define     B16FigoReg_figoMaxAdr_dtcm                     0x000A
    #define   LSb32FigoReg_figoMaxAdr_dtcm                        16
    #define   LSb16FigoReg_figoMaxAdr_dtcm                        0
    #define       bFigoReg_figoMaxAdr_dtcm                     16
    #define   MSK32FigoReg_figoMaxAdr_dtcm                        0xFFFF0000
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoFlags                           0x000C

    #define     BA_FigoReg_figoFlags_itcmAdrOOB                0x000C
    #define     B16FigoReg_figoFlags_itcmAdrOOB                0x000C
    #define   LSb32FigoReg_figoFlags_itcmAdrOOB                   0
    #define   LSb16FigoReg_figoFlags_itcmAdrOOB                   0
    #define       bFigoReg_figoFlags_itcmAdrOOB                1
    #define   MSK32FigoReg_figoFlags_itcmAdrOOB                   0x00000001

    #define     BA_FigoReg_figoFlags_dtcmAdrOOB                0x000C
    #define     B16FigoReg_figoFlags_dtcmAdrOOB                0x000C
    #define   LSb32FigoReg_figoFlags_dtcmAdrOOB                   1
    #define   LSb16FigoReg_figoFlags_dtcmAdrOOB                   1
    #define       bFigoReg_figoFlags_dtcmAdrOOB                1
    #define   MSK32FigoReg_figoFlags_dtcmAdrOOB                   0x00000002

    #define     BA_FigoReg_figoFlags_divideBy0                 0x000C
    #define     B16FigoReg_figoFlags_divideBy0                 0x000C
    #define   LSb32FigoReg_figoFlags_divideBy0                    2
    #define   LSb16FigoReg_figoFlags_divideBy0                    2
    #define       bFigoReg_figoFlags_divideBy0                 1
    #define   MSK32FigoReg_figoFlags_divideBy0                    0x00000004

    #define     BA_FigoReg_figoFlags_traceBufFull              0x000C
    #define     B16FigoReg_figoFlags_traceBufFull              0x000C
    #define   LSb32FigoReg_figoFlags_traceBufFull                 3
    #define   LSb16FigoReg_figoFlags_traceBufFull                 3
    #define       bFigoReg_figoFlags_traceBufFull              1
    #define   MSK32FigoReg_figoFlags_traceBufFull                 0x00000008

    #define     BA_FigoReg_figoFlags_illegalIns                0x000C
    #define     B16FigoReg_figoFlags_illegalIns                0x000C
    #define   LSb32FigoReg_figoFlags_illegalIns                   4
    #define   LSb16FigoReg_figoFlags_illegalIns                   4
    #define       bFigoReg_figoFlags_illegalIns                1
    #define   MSK32FigoReg_figoFlags_illegalIns                   0x00000010

    #define     BA_FigoReg_figoFlags_ALU64Overflow             0x000C
    #define     B16FigoReg_figoFlags_ALU64Overflow             0x000C
    #define   LSb32FigoReg_figoFlags_ALU64Overflow                5
    #define   LSb16FigoReg_figoFlags_ALU64Overflow                5
    #define       bFigoReg_figoFlags_ALU64Overflow             1
    #define   MSK32FigoReg_figoFlags_ALU64Overflow                0x00000020

    #define     BA_FigoReg_figoFlags_JTInvdPush                0x000C
    #define     B16FigoReg_figoFlags_JTInvdPush                0x000C
    #define   LSb32FigoReg_figoFlags_JTInvdPush                   6
    #define   LSb16FigoReg_figoFlags_JTInvdPush                   6
    #define       bFigoReg_figoFlags_JTInvdPush                1
    #define   MSK32FigoReg_figoFlags_JTInvdPush                   0x00000040
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoFlagsMask                       0x0010

    #define     BA_FigoReg_figoFlagsMask_itcmAdrOOBMask        0x0010
    #define     B16FigoReg_figoFlagsMask_itcmAdrOOBMask        0x0010
    #define   LSb32FigoReg_figoFlagsMask_itcmAdrOOBMask           0
    #define   LSb16FigoReg_figoFlagsMask_itcmAdrOOBMask           0
    #define       bFigoReg_figoFlagsMask_itcmAdrOOBMask        1
    #define   MSK32FigoReg_figoFlagsMask_itcmAdrOOBMask           0x00000001

    #define     BA_FigoReg_figoFlagsMask_dtcmAdrOOBMask        0x0010
    #define     B16FigoReg_figoFlagsMask_dtcmAdrOOBMask        0x0010
    #define   LSb32FigoReg_figoFlagsMask_dtcmAdrOOBMask           1
    #define   LSb16FigoReg_figoFlagsMask_dtcmAdrOOBMask           1
    #define       bFigoReg_figoFlagsMask_dtcmAdrOOBMask        1
    #define   MSK32FigoReg_figoFlagsMask_dtcmAdrOOBMask           0x00000002

    #define     BA_FigoReg_figoFlagsMask_divideBy0Mask         0x0010
    #define     B16FigoReg_figoFlagsMask_divideBy0Mask         0x0010
    #define   LSb32FigoReg_figoFlagsMask_divideBy0Mask            2
    #define   LSb16FigoReg_figoFlagsMask_divideBy0Mask            2
    #define       bFigoReg_figoFlagsMask_divideBy0Mask         1
    #define   MSK32FigoReg_figoFlagsMask_divideBy0Mask            0x00000004

    #define     BA_FigoReg_figoFlagsMask_traceBufFullMask      0x0010
    #define     B16FigoReg_figoFlagsMask_traceBufFullMask      0x0010
    #define   LSb32FigoReg_figoFlagsMask_traceBufFullMask         3
    #define   LSb16FigoReg_figoFlagsMask_traceBufFullMask         3
    #define       bFigoReg_figoFlagsMask_traceBufFullMask      1
    #define   MSK32FigoReg_figoFlagsMask_traceBufFullMask         0x00000008

    #define     BA_FigoReg_figoFlagsMask_illegalInsMask        0x0010
    #define     B16FigoReg_figoFlagsMask_illegalInsMask        0x0010
    #define   LSb32FigoReg_figoFlagsMask_illegalInsMask           4
    #define   LSb16FigoReg_figoFlagsMask_illegalInsMask           4
    #define       bFigoReg_figoFlagsMask_illegalInsMask        1
    #define   MSK32FigoReg_figoFlagsMask_illegalInsMask           0x00000010

    #define     BA_FigoReg_figoFlagsMask_ALU64OverflowMask     0x0010
    #define     B16FigoReg_figoFlagsMask_ALU64OverflowMask     0x0010
    #define   LSb32FigoReg_figoFlagsMask_ALU64OverflowMask        5
    #define   LSb16FigoReg_figoFlagsMask_ALU64OverflowMask        5
    #define       bFigoReg_figoFlagsMask_ALU64OverflowMask     1
    #define   MSK32FigoReg_figoFlagsMask_ALU64OverflowMask        0x00000020

    #define     BA_FigoReg_figoFlagsMask_JTInvdPushMask        0x0010
    #define     B16FigoReg_figoFlagsMask_JTInvdPushMask        0x0010
    #define   LSb32FigoReg_figoFlagsMask_JTInvdPushMask           6
    #define   LSb16FigoReg_figoFlagsMask_JTInvdPushMask           6
    #define       bFigoReg_figoFlagsMask_JTInvdPushMask        1
    #define   MSK32FigoReg_figoFlagsMask_JTInvdPushMask           0x00000040
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoLastPC                          0x0014

    #define     BA_FigoReg_figoLastPC_val                      0x0014
    #define     B16FigoReg_figoLastPC_val                      0x0014
    #define   LSb32FigoReg_figoLastPC_val                         0
    #define   LSb16FigoReg_figoLastPC_val                         0
    #define       bFigoReg_figoLastPC_val                      16
    #define   MSK32FigoReg_figoLastPC_val                         0x0000FFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoCurrPC                          0x0018
    #define     RA_FigoReg_pc                                  0x0018
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoTraceBuf                        0x001C
    #define     RA_FigoReg_tbuf                                0x001C
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoIntr                            0x0020

    #define     BA_FigoReg_figoIntr_up                         0x0020
    #define     B16FigoReg_figoIntr_up                         0x0020
    #define   LSb32FigoReg_figoIntr_up                            0
    #define   LSb16FigoReg_figoIntr_up                            0
    #define       bFigoReg_figoIntr_up                         1
    #define   MSK32FigoReg_figoIntr_up                            0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoIntrLvl                         0x0024

    #define     BA_FigoReg_figoIntrLvl_st                      0x0024
    #define     B16FigoReg_figoIntrLvl_st                      0x0024
    #define   LSb32FigoReg_figoIntrLvl_st                         0
    #define   LSb16FigoReg_figoIntrLvl_st                         0
    #define       bFigoReg_figoIntrLvl_st                      1
    #define   MSK32FigoReg_figoIntrLvl_st                         0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoRstn                            0x0028

    #define     BA_FigoReg_figoRstn_up                         0x0028
    #define     B16FigoReg_figoRstn_up                         0x0028
    #define   LSb32FigoReg_figoRstn_up                            0
    #define   LSb16FigoReg_figoRstn_up                            0
    #define       bFigoReg_figoRstn_up                         1
    #define   MSK32FigoReg_figoRstn_up                            0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoCnt                             0x002C

    #define     BA_FigoReg_figoCnt_en                          0x002C
    #define     B16FigoReg_figoCnt_en                          0x002C
    #define   LSb32FigoReg_figoCnt_en                             0
    #define   LSb16FigoReg_figoCnt_en                             0
    #define       bFigoReg_figoCnt_en                          1
    #define   MSK32FigoReg_figoCnt_en                             0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoCntClr                          0x0030

    #define     BA_FigoReg_figoCntClr_run                      0x0030
    #define     B16FigoReg_figoCntClr_run                      0x0030
    #define   LSb32FigoReg_figoCntClr_run                         0
    #define   LSb16FigoReg_figoCntClr_run                         0
    #define       bFigoReg_figoCntClr_run                      1
    #define   MSK32FigoReg_figoCntClr_run                         0x00000001

    #define     BA_FigoReg_figoCntClr_stall                    0x0030
    #define     B16FigoReg_figoCntClr_stall                    0x0030
    #define   LSb32FigoReg_figoCntClr_stall                       1
    #define   LSb16FigoReg_figoCntClr_stall                       1
    #define       bFigoReg_figoCntClr_stall                    1
    #define   MSK32FigoReg_figoCntClr_stall                       0x00000002
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoRun                             0x0034

    #define     BA_FigoReg_figoRun_Cnt                         0x0034
    #define     B16FigoReg_figoRun_Cnt                         0x0034
    #define   LSb32FigoReg_figoRun_Cnt                            0
    #define   LSb16FigoReg_figoRun_Cnt                            0
    #define       bFigoReg_figoRun_Cnt                         32
    #define   MSK32FigoReg_figoRun_Cnt                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_figoStall                           0x0038

    #define     BA_FigoReg_figoStall_Cnt                       0x0038
    #define     B16FigoReg_figoStall_Cnt                       0x0038
    #define   LSb32FigoReg_figoStall_Cnt                          0
    #define   LSb16FigoReg_figoStall_Cnt                          0
    #define       bFigoReg_figoStall_Cnt                       32
    #define   MSK32FigoReg_figoStall_Cnt                          0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_ALU64                               0x0800
    #define     RA_FigoReg_alu64                               0x0800
    ///////////////////////////////////////////////////////////
    #define     RA_FigoReg_FIGODBG                             0x1800
    #define     RA_FigoReg_debug                               0x1800
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoReg {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoCtrl_pcStartLoc(r32)            _BFGET_(r32,15, 0)
    #define   SET32FigoReg_figoCtrl_pcStartLoc(r32,v)          _BFSET_(r32,15, 0,v)
    #define   GET16FigoReg_figoCtrl_pcStartLoc(r16)            _BFGET_(r16,15, 0)
    #define   SET16FigoReg_figoCtrl_pcStartLoc(r16,v)          _BFSET_(r16,15, 0,v)

    #define   GET32FigoReg_figoCtrl_tBufMode(r32)              _BFGET_(r32,16,16)
    #define   SET32FigoReg_figoCtrl_tBufMode(r32,v)            _BFSET_(r32,16,16,v)
    #define   GET16FigoReg_figoCtrl_tBufMode(r16)              _BFGET_(r16, 0, 0)
    #define   SET16FigoReg_figoCtrl_tBufMode(r16,v)            _BFSET_(r16, 0, 0,v)

    #define     w32FigoReg_figoCtrl                            {\
            UNSG32 ufigoCtrl_pcStartLoc                        : 16;\
            UNSG32 ufigoCtrl_tBufMode                          :  1;\
            UNSG32 RSVDx0_b17                                  : 15;\
          }
    union { UNSG32 u32FigoReg_figoCtrl;
            struct w32FigoReg_figoCtrl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoID_ID(r32)                      _BFGET_(r32,15, 0)
    #define   SET32FigoReg_figoID_ID(r32,v)                    _BFSET_(r32,15, 0,v)
    #define   GET16FigoReg_figoID_ID(r16)                      _BFGET_(r16,15, 0)
    #define   SET16FigoReg_figoID_ID(r16,v)                    _BFSET_(r16,15, 0,v)

    #define   GET32FigoReg_figoID_REV(r32)                     _BFGET_(r32,31,16)
    #define   SET32FigoReg_figoID_REV(r32,v)                   _BFSET_(r32,31,16,v)
    #define   GET16FigoReg_figoID_REV(r16)                     _BFGET_(r16,15, 0)
    #define   SET16FigoReg_figoID_REV(r16,v)                   _BFSET_(r16,15, 0,v)

    #define     w32FigoReg_figoID                              {\
            UNSG32 ufigoID_ID                                  : 16;\
            UNSG32 ufigoID_REV                                 : 16;\
          }
    union { UNSG32 u32FigoReg_figoID;
            struct w32FigoReg_figoID;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoMaxAdr_itcm(r32)                _BFGET_(r32,15, 0)
    #define   SET32FigoReg_figoMaxAdr_itcm(r32,v)              _BFSET_(r32,15, 0,v)
    #define   GET16FigoReg_figoMaxAdr_itcm(r16)                _BFGET_(r16,15, 0)
    #define   SET16FigoReg_figoMaxAdr_itcm(r16,v)              _BFSET_(r16,15, 0,v)

    #define   GET32FigoReg_figoMaxAdr_dtcm(r32)                _BFGET_(r32,31,16)
    #define   SET32FigoReg_figoMaxAdr_dtcm(r32,v)              _BFSET_(r32,31,16,v)
    #define   GET16FigoReg_figoMaxAdr_dtcm(r16)                _BFGET_(r16,15, 0)
    #define   SET16FigoReg_figoMaxAdr_dtcm(r16,v)              _BFSET_(r16,15, 0,v)

    #define     w32FigoReg_figoMaxAdr                          {\
            UNSG32 ufigoMaxAdr_itcm                            : 16;\
            UNSG32 ufigoMaxAdr_dtcm                            : 16;\
          }
    union { UNSG32 u32FigoReg_figoMaxAdr;
            struct w32FigoReg_figoMaxAdr;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoFlags_itcmAdrOOB(r32)           _BFGET_(r32, 0, 0)
    #define   SET32FigoReg_figoFlags_itcmAdrOOB(r32,v)         _BFSET_(r32, 0, 0,v)
    #define   GET16FigoReg_figoFlags_itcmAdrOOB(r16)           _BFGET_(r16, 0, 0)
    #define   SET16FigoReg_figoFlags_itcmAdrOOB(r16,v)         _BFSET_(r16, 0, 0,v)

    #define   GET32FigoReg_figoFlags_dtcmAdrOOB(r32)           _BFGET_(r32, 1, 1)
    #define   SET32FigoReg_figoFlags_dtcmAdrOOB(r32,v)         _BFSET_(r32, 1, 1,v)
    #define   GET16FigoReg_figoFlags_dtcmAdrOOB(r16)           _BFGET_(r16, 1, 1)
    #define   SET16FigoReg_figoFlags_dtcmAdrOOB(r16,v)         _BFSET_(r16, 1, 1,v)

    #define   GET32FigoReg_figoFlags_divideBy0(r32)            _BFGET_(r32, 2, 2)
    #define   SET32FigoReg_figoFlags_divideBy0(r32,v)          _BFSET_(r32, 2, 2,v)
    #define   GET16FigoReg_figoFlags_divideBy0(r16)            _BFGET_(r16, 2, 2)
    #define   SET16FigoReg_figoFlags_divideBy0(r16,v)          _BFSET_(r16, 2, 2,v)

    #define   GET32FigoReg_figoFlags_traceBufFull(r32)         _BFGET_(r32, 3, 3)
    #define   SET32FigoReg_figoFlags_traceBufFull(r32,v)       _BFSET_(r32, 3, 3,v)
    #define   GET16FigoReg_figoFlags_traceBufFull(r16)         _BFGET_(r16, 3, 3)
    #define   SET16FigoReg_figoFlags_traceBufFull(r16,v)       _BFSET_(r16, 3, 3,v)

    #define   GET32FigoReg_figoFlags_illegalIns(r32)           _BFGET_(r32, 4, 4)
    #define   SET32FigoReg_figoFlags_illegalIns(r32,v)         _BFSET_(r32, 4, 4,v)
    #define   GET16FigoReg_figoFlags_illegalIns(r16)           _BFGET_(r16, 4, 4)
    #define   SET16FigoReg_figoFlags_illegalIns(r16,v)         _BFSET_(r16, 4, 4,v)

    #define   GET32FigoReg_figoFlags_ALU64Overflow(r32)        _BFGET_(r32, 5, 5)
    #define   SET32FigoReg_figoFlags_ALU64Overflow(r32,v)      _BFSET_(r32, 5, 5,v)
    #define   GET16FigoReg_figoFlags_ALU64Overflow(r16)        _BFGET_(r16, 5, 5)
    #define   SET16FigoReg_figoFlags_ALU64Overflow(r16,v)      _BFSET_(r16, 5, 5,v)

    #define   GET32FigoReg_figoFlags_JTInvdPush(r32)           _BFGET_(r32, 6, 6)
    #define   SET32FigoReg_figoFlags_JTInvdPush(r32,v)         _BFSET_(r32, 6, 6,v)
    #define   GET16FigoReg_figoFlags_JTInvdPush(r16)           _BFGET_(r16, 6, 6)
    #define   SET16FigoReg_figoFlags_JTInvdPush(r16,v)         _BFSET_(r16, 6, 6,v)

    #define     w32FigoReg_figoFlags                           {\
            UNSG32 ufigoFlags_itcmAdrOOB                       :  1;\
            UNSG32 ufigoFlags_dtcmAdrOOB                       :  1;\
            UNSG32 ufigoFlags_divideBy0                        :  1;\
            UNSG32 ufigoFlags_traceBufFull                     :  1;\
            UNSG32 ufigoFlags_illegalIns                       :  1;\
            UNSG32 ufigoFlags_ALU64Overflow                    :  1;\
            UNSG32 ufigoFlags_JTInvdPush                       :  1;\
            UNSG32 RSVDxC_b7                                   : 25;\
          }
    union { UNSG32 u32FigoReg_figoFlags;
            struct w32FigoReg_figoFlags;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoFlagsMask_itcmAdrOOBMask(r32)   _BFGET_(r32, 0, 0)
    #define   SET32FigoReg_figoFlagsMask_itcmAdrOOBMask(r32,v) _BFSET_(r32, 0, 0,v)
    #define   GET16FigoReg_figoFlagsMask_itcmAdrOOBMask(r16)   _BFGET_(r16, 0, 0)
    #define   SET16FigoReg_figoFlagsMask_itcmAdrOOBMask(r16,v) _BFSET_(r16, 0, 0,v)

    #define   GET32FigoReg_figoFlagsMask_dtcmAdrOOBMask(r32)   _BFGET_(r32, 1, 1)
    #define   SET32FigoReg_figoFlagsMask_dtcmAdrOOBMask(r32,v) _BFSET_(r32, 1, 1,v)
    #define   GET16FigoReg_figoFlagsMask_dtcmAdrOOBMask(r16)   _BFGET_(r16, 1, 1)
    #define   SET16FigoReg_figoFlagsMask_dtcmAdrOOBMask(r16,v) _BFSET_(r16, 1, 1,v)

    #define   GET32FigoReg_figoFlagsMask_divideBy0Mask(r32)    _BFGET_(r32, 2, 2)
    #define   SET32FigoReg_figoFlagsMask_divideBy0Mask(r32,v)  _BFSET_(r32, 2, 2,v)
    #define   GET16FigoReg_figoFlagsMask_divideBy0Mask(r16)    _BFGET_(r16, 2, 2)
    #define   SET16FigoReg_figoFlagsMask_divideBy0Mask(r16,v)  _BFSET_(r16, 2, 2,v)

    #define   GET32FigoReg_figoFlagsMask_traceBufFullMask(r32) _BFGET_(r32, 3, 3)
    #define   SET32FigoReg_figoFlagsMask_traceBufFullMask(r32,v) _BFSET_(r32, 3, 3,v)
    #define   GET16FigoReg_figoFlagsMask_traceBufFullMask(r16) _BFGET_(r16, 3, 3)
    #define   SET16FigoReg_figoFlagsMask_traceBufFullMask(r16,v) _BFSET_(r16, 3, 3,v)

    #define   GET32FigoReg_figoFlagsMask_illegalInsMask(r32)   _BFGET_(r32, 4, 4)
    #define   SET32FigoReg_figoFlagsMask_illegalInsMask(r32,v) _BFSET_(r32, 4, 4,v)
    #define   GET16FigoReg_figoFlagsMask_illegalInsMask(r16)   _BFGET_(r16, 4, 4)
    #define   SET16FigoReg_figoFlagsMask_illegalInsMask(r16,v) _BFSET_(r16, 4, 4,v)

    #define   GET32FigoReg_figoFlagsMask_ALU64OverflowMask(r32) _BFGET_(r32, 5, 5)
    #define   SET32FigoReg_figoFlagsMask_ALU64OverflowMask(r32,v) _BFSET_(r32, 5, 5,v)
    #define   GET16FigoReg_figoFlagsMask_ALU64OverflowMask(r16) _BFGET_(r16, 5, 5)
    #define   SET16FigoReg_figoFlagsMask_ALU64OverflowMask(r16,v) _BFSET_(r16, 5, 5,v)

    #define   GET32FigoReg_figoFlagsMask_JTInvdPushMask(r32)   _BFGET_(r32, 6, 6)
    #define   SET32FigoReg_figoFlagsMask_JTInvdPushMask(r32,v) _BFSET_(r32, 6, 6,v)
    #define   GET16FigoReg_figoFlagsMask_JTInvdPushMask(r16)   _BFGET_(r16, 6, 6)
    #define   SET16FigoReg_figoFlagsMask_JTInvdPushMask(r16,v) _BFSET_(r16, 6, 6,v)

    #define     w32FigoReg_figoFlagsMask                       {\
            UNSG32 ufigoFlagsMask_itcmAdrOOBMask               :  1;\
            UNSG32 ufigoFlagsMask_dtcmAdrOOBMask               :  1;\
            UNSG32 ufigoFlagsMask_divideBy0Mask                :  1;\
            UNSG32 ufigoFlagsMask_traceBufFullMask             :  1;\
            UNSG32 ufigoFlagsMask_illegalInsMask               :  1;\
            UNSG32 ufigoFlagsMask_ALU64OverflowMask            :  1;\
            UNSG32 ufigoFlagsMask_JTInvdPushMask               :  1;\
            UNSG32 RSVDx10_b7                                  : 25;\
          }
    union { UNSG32 u32FigoReg_figoFlagsMask;
            struct w32FigoReg_figoFlagsMask;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoLastPC_val(r32)                 _BFGET_(r32,15, 0)
    #define   SET32FigoReg_figoLastPC_val(r32,v)               _BFSET_(r32,15, 0,v)
    #define   GET16FigoReg_figoLastPC_val(r16)                 _BFGET_(r16,15, 0)
    #define   SET16FigoReg_figoLastPC_val(r16,v)               _BFSET_(r16,15, 0,v)

    #define     w32FigoReg_figoLastPC                          {\
            UNSG32 ufigoLastPC_val                             : 16;\
            UNSG32 RSVDx14_b16                                 : 16;\
          }
    union { UNSG32 u32FigoReg_figoLastPC;
            struct w32FigoReg_figoLastPC;
          };
    ///////////////////////////////////////////////////////////
              SIE_FigoReg16                                    ie_pc;
    ///////////////////////////////////////////////////////////
              SIE_FigoTraceBuf                                 ie_tbuf;
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoIntr_up(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32FigoReg_figoIntr_up(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16FigoReg_figoIntr_up(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16FigoReg_figoIntr_up(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define     w32FigoReg_figoIntr                            {\
            UNSG32 ufigoIntr_up                                :  1;\
            UNSG32 RSVDx20_b1                                  : 31;\
          }
    union { UNSG32 u32FigoReg_figoIntr;
            struct w32FigoReg_figoIntr;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoIntrLvl_st(r32)                 _BFGET_(r32, 0, 0)
    #define   SET32FigoReg_figoIntrLvl_st(r32,v)               _BFSET_(r32, 0, 0,v)
    #define   GET16FigoReg_figoIntrLvl_st(r16)                 _BFGET_(r16, 0, 0)
    #define   SET16FigoReg_figoIntrLvl_st(r16,v)               _BFSET_(r16, 0, 0,v)

    #define     w32FigoReg_figoIntrLvl                         {\
            UNSG32 ufigoIntrLvl_st                             :  1;\
            UNSG32 RSVDx24_b1                                  : 31;\
          }
    union { UNSG32 u32FigoReg_figoIntrLvl;
            struct w32FigoReg_figoIntrLvl;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoRstn_up(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32FigoReg_figoRstn_up(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16FigoReg_figoRstn_up(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16FigoReg_figoRstn_up(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define     w32FigoReg_figoRstn                            {\
            UNSG32 ufigoRstn_up                                :  1;\
            UNSG32 RSVDx28_b1                                  : 31;\
          }
    union { UNSG32 u32FigoReg_figoRstn;
            struct w32FigoReg_figoRstn;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoCnt_en(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32FigoReg_figoCnt_en(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16FigoReg_figoCnt_en(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16FigoReg_figoCnt_en(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define     w32FigoReg_figoCnt                             {\
            UNSG32 ufigoCnt_en                                 :  1;\
            UNSG32 RSVDx2C_b1                                  : 31;\
          }
    union { UNSG32 u32FigoReg_figoCnt;
            struct w32FigoReg_figoCnt;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoCntClr_run(r32)                 _BFGET_(r32, 0, 0)
    #define   SET32FigoReg_figoCntClr_run(r32,v)               _BFSET_(r32, 0, 0,v)
    #define   GET16FigoReg_figoCntClr_run(r16)                 _BFGET_(r16, 0, 0)
    #define   SET16FigoReg_figoCntClr_run(r16,v)               _BFSET_(r16, 0, 0,v)

    #define   GET32FigoReg_figoCntClr_stall(r32)               _BFGET_(r32, 1, 1)
    #define   SET32FigoReg_figoCntClr_stall(r32,v)             _BFSET_(r32, 1, 1,v)
    #define   GET16FigoReg_figoCntClr_stall(r16)               _BFGET_(r16, 1, 1)
    #define   SET16FigoReg_figoCntClr_stall(r16,v)             _BFSET_(r16, 1, 1,v)

    #define     w32FigoReg_figoCntClr                          {\
            UNSG32 ufigoCntClr_run                             :  1;\
            UNSG32 ufigoCntClr_stall                           :  1;\
            UNSG32 RSVDx30_b2                                  : 30;\
          }
    union { UNSG32 u32FigoReg_figoCntClr;
            struct w32FigoReg_figoCntClr;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoRun_Cnt(r32)                    _BFGET_(r32,31, 0)
    #define   SET32FigoReg_figoRun_Cnt(r32,v)                  _BFSET_(r32,31, 0,v)

    #define     w32FigoReg_figoRun                             {\
            UNSG32 ufigoRun_Cnt                                : 32;\
          }
    union { UNSG32 u32FigoReg_figoRun;
            struct w32FigoReg_figoRun;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FigoReg_figoStall_Cnt(r32)                  _BFGET_(r32,31, 0)
    #define   SET32FigoReg_figoStall_Cnt(r32,v)                _BFSET_(r32,31, 0,v)

    #define     w32FigoReg_figoStall                           {\
            UNSG32 ufigoStall_Cnt                              : 32;\
          }
    union { UNSG32 u32FigoReg_figoStall;
            struct w32FigoReg_figoStall;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx3C                                     [1988];
    ///////////////////////////////////////////////////////////
              SIE_ALU64                                        ie_alu64;
    ///////////////////////////////////////////////////////////
              SIE_FigoDebug                                    ie_debug;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx18C0                                   [1856];
    ///////////////////////////////////////////////////////////
    } SIE_FigoReg;

    typedef union  T32FigoReg_figoCtrl
          { UNSG32 u32;
            struct w32FigoReg_figoCtrl;
                 } T32FigoReg_figoCtrl;
    typedef union  T32FigoReg_figoID
          { UNSG32 u32;
            struct w32FigoReg_figoID;
                 } T32FigoReg_figoID;
    typedef union  T32FigoReg_figoMaxAdr
          { UNSG32 u32;
            struct w32FigoReg_figoMaxAdr;
                 } T32FigoReg_figoMaxAdr;
    typedef union  T32FigoReg_figoFlags
          { UNSG32 u32;
            struct w32FigoReg_figoFlags;
                 } T32FigoReg_figoFlags;
    typedef union  T32FigoReg_figoFlagsMask
          { UNSG32 u32;
            struct w32FigoReg_figoFlagsMask;
                 } T32FigoReg_figoFlagsMask;
    typedef union  T32FigoReg_figoLastPC
          { UNSG32 u32;
            struct w32FigoReg_figoLastPC;
                 } T32FigoReg_figoLastPC;
    typedef union  T32FigoReg_figoIntr
          { UNSG32 u32;
            struct w32FigoReg_figoIntr;
                 } T32FigoReg_figoIntr;
    typedef union  T32FigoReg_figoIntrLvl
          { UNSG32 u32;
            struct w32FigoReg_figoIntrLvl;
                 } T32FigoReg_figoIntrLvl;
    typedef union  T32FigoReg_figoRstn
          { UNSG32 u32;
            struct w32FigoReg_figoRstn;
                 } T32FigoReg_figoRstn;
    typedef union  T32FigoReg_figoCnt
          { UNSG32 u32;
            struct w32FigoReg_figoCnt;
                 } T32FigoReg_figoCnt;
    typedef union  T32FigoReg_figoCntClr
          { UNSG32 u32;
            struct w32FigoReg_figoCntClr;
                 } T32FigoReg_figoCntClr;
    typedef union  T32FigoReg_figoRun
          { UNSG32 u32;
            struct w32FigoReg_figoRun;
                 } T32FigoReg_figoRun;
    typedef union  T32FigoReg_figoStall
          { UNSG32 u32;
            struct w32FigoReg_figoStall;
                 } T32FigoReg_figoStall;
    ///////////////////////////////////////////////////////////

    typedef union  TFigoReg_figoCtrl
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoCtrl;
                   };
                 } TFigoReg_figoCtrl;
    typedef union  TFigoReg_figoID
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoID;
                   };
                 } TFigoReg_figoID;
    typedef union  TFigoReg_figoMaxAdr
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoMaxAdr;
                   };
                 } TFigoReg_figoMaxAdr;
    typedef union  TFigoReg_figoFlags
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoFlags;
                   };
                 } TFigoReg_figoFlags;
    typedef union  TFigoReg_figoFlagsMask
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoFlagsMask;
                   };
                 } TFigoReg_figoFlagsMask;
    typedef union  TFigoReg_figoLastPC
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoLastPC;
                   };
                 } TFigoReg_figoLastPC;
    typedef union  TFigoReg_figoIntr
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoIntr;
                   };
                 } TFigoReg_figoIntr;
    typedef union  TFigoReg_figoIntrLvl
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoIntrLvl;
                   };
                 } TFigoReg_figoIntrLvl;
    typedef union  TFigoReg_figoRstn
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoRstn;
                   };
                 } TFigoReg_figoRstn;
    typedef union  TFigoReg_figoCnt
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoCnt;
                   };
                 } TFigoReg_figoCnt;
    typedef union  TFigoReg_figoCntClr
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoCntClr;
                   };
                 } TFigoReg_figoCntClr;
    typedef union  TFigoReg_figoRun
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoRun;
                   };
                 } TFigoReg_figoRun;
    typedef union  TFigoReg_figoStall
          { UNSG32 u32[1];
            struct {
            struct w32FigoReg_figoStall;
                   };
                 } TFigoReg_figoStall;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoReg_drvrd(SIE_FigoReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoReg_drvwr(SIE_FigoReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoReg_reset(SIE_FigoReg *p);
     SIGN32 FigoReg_cmp  (SIE_FigoReg *p, SIE_FigoReg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoReg_check(p,pie,pfx,hLOG) FigoReg_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoReg_print(p,    pfx,hLOG) FigoReg_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoReg
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoInst                                 (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (RW)
///               ###
///               * Instruction opcode, 24-bit word
///               ###
///               %unsigned 24 opcode                    0x0
///               %%        8          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      24b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoInst
#define h_FigoInst (){}

    #define     BA_FigoInst_opcode                             0x0000
    #define     B16FigoInst_opcode                             0x0000
    #define   LSb32FigoInst_opcode                                0
    #define   LSb16FigoInst_opcode                                0
    #define       bFigoInst_opcode                             24
    #define   MSK32FigoInst_opcode                                0x00FFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoInst {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoInst_opcode(r32)                        _BFGET_(r32,23, 0)
    #define   SET32FigoInst_opcode(r32,v)                      _BFSET_(r32,23, 0,v)

            UNSG32 u_opcode                                    : 24;
            UNSG32 RSVDx0_b24                                  :  8;
    ///////////////////////////////////////////////////////////
    } SIE_FigoInst;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoInst_drvrd(SIE_FigoInst *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoInst_drvwr(SIE_FigoInst *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoInst_reset(SIE_FigoInst *p);
     SIGN32 FigoInst_cmp  (SIE_FigoInst *p, SIE_FigoInst *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoInst_check(p,pie,pfx,hLOG) FigoInst_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoInst_print(p,    pfx,hLOG) FigoInst_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoInst
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE ITCM                                     (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 figoItcm             (P)
///     # 0x00000 inst                 
///               $FigoInst            inst              REG    [2048]
///                                    ###
///                                    * Instruction memory, 8K word each maximum
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    8192B, bits:   49152b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_ITCM
#define h_ITCM (){}

    #define     RA_ITCM_figoItcm                               0x0000
    #define     RA_ITCM_inst                                   0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_ITCM {
    ///////////////////////////////////////////////////////////
              SIE_FigoInst                                     ie_inst[2048];
    ///////////////////////////////////////////////////////////
    } SIE_ITCM;

    ///////////////////////////////////////////////////////////
     SIGN32 ITCM_drvrd(SIE_ITCM *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 ITCM_drvwr(SIE_ITCM *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void ITCM_reset(SIE_ITCM *p);
     SIGN32 ITCM_cmp  (SIE_ITCM *p, SIE_ITCM *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define ITCM_check(p,pie,pfx,hLOG) ITCM_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define ITCM_print(p,    pfx,hLOG) ITCM_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: ITCM
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoData                                 (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (RW)
///               ###
///               * 32-bit data
///               ###
///               %unsigned 32 data_0i                   
///               %unsigned 32 data_1i                   
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoData
#define h_FigoData (){}

    #define     BA_FigoData_data_0i                            0x0000
    #define     B16FigoData_data_0i                            0x0000
    #define   LSb32FigoData_data_0i                               0
    #define   LSb16FigoData_data_0i                               0
    #define       bFigoData_data_0i                            32
    #define   MSK32FigoData_data_0i                               0xFFFFFFFF

    #define     BA_FigoData_data_1i                            0x0004
    #define     B16FigoData_data_1i                            0x0004
    #define   LSb32FigoData_data_1i                               0
    #define   LSb16FigoData_data_1i                               0
    #define       bFigoData_data_1i                            32
    #define   MSK32FigoData_data_1i                               0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoData {
    ///////////////////////////////////////////////////////////
    #define   GET32FigoData_data_0i(r32)                       _BFGET_(r32,31, 0)
    #define   SET32FigoData_data_0i(r32,v)                     _BFSET_(r32,31, 0,v)

            UNSG32 u_data_0i                                   : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32FigoData_data_1i(r32)                       _BFGET_(r32,31, 0)
    #define   SET32FigoData_data_1i(r32,v)                     _BFSET_(r32,31, 0,v)

            UNSG32 u_data_1i                                   : 32;
    ///////////////////////////////////////////////////////////
    } SIE_FigoData;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoData_drvrd(SIE_FigoData *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoData_drvwr(SIE_FigoData *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoData_reset(SIE_FigoData *p);
     SIGN32 FigoData_cmp  (SIE_FigoData *p, SIE_FigoData *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoData_check(p,pie,pfx,hLOG) FigoData_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoData_print(p,    pfx,hLOG) FigoData_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoData
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoSys                 biu              (4,4)
///     ###
///     * FigoSys registers
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 HBO0                 (P)
///     # 0x00000 hbo0                 
///               $HBO                 hbo0              REG          
///                                    ###
///                                    * **DONT_EXPAND_BELOW** HBO IP
///                                    ###
///     @ 0x00700 HBO1                 (P)
///     # 0x00700 hbo1                 
///               $HBO                 hbo1              REG          
///                                    ###
///                                    * **DONT_EXPAND_BELOW** HBO IP
///                                    ###
///     @ 0x00E00                      (W-)
///     #         # Stuffing bytes...
///               %% 4096
///     @ 0x01000 FIGO0                (P)
///     # 0x01000 figo0                
///               $FigoReg             figo0             REG          
///     @ 0x03000 FIGO1                (P)
///     # 0x03000 figo1                
///               $FigoReg             figo1             REG          
///     @ 0x05000 DS                   (P)
///     # 0x05000 ds                   
///               $DataStreamer        ds                REG          
///     @ 0x05024                      (W-)
///     #         # Stuffing bytes...
///               %% 16096
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:   22528B, bits:    5018b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoSys
#define h_FigoSys (){}

    #define     RA_FigoSys_HBO0                                0x0000
    #define     RA_FigoSys_hbo0                                0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_FigoSys_HBO1                                0x0700
    #define     RA_FigoSys_hbo1                                0x0700
    ///////////////////////////////////////////////////////////
    #define     RA_FigoSys_FIGO0                               0x1000
    #define     RA_FigoSys_figo0                               0x1000
    ///////////////////////////////////////////////////////////
    #define     RA_FigoSys_FIGO1                               0x3000
    #define     RA_FigoSys_figo1                               0x3000
    ///////////////////////////////////////////////////////////
    #define     RA_FigoSys_DS                                  0x5000
    #define     RA_FigoSys_ds                                  0x5000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoSys {
    ///////////////////////////////////////////////////////////
              SIE_HBO                                          ie_hbo0;
    ///////////////////////////////////////////////////////////
              SIE_HBO                                          ie_hbo1;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxE00                                    [512];
    ///////////////////////////////////////////////////////////
              SIE_FigoReg                                      ie_figo0;
    ///////////////////////////////////////////////////////////
              SIE_FigoReg                                      ie_figo1;
    ///////////////////////////////////////////////////////////
              SIE_DataStreamer                                 ie_ds;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx5024                                   [2012];
    ///////////////////////////////////////////////////////////
    } SIE_FigoSys;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoSys_drvrd(SIE_FigoSys *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoSys_drvwr(SIE_FigoSys *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoSys_reset(SIE_FigoSys *p);
     SIGN32 FigoSys_cmp  (SIE_FigoSys *p, SIE_FigoSys *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoSys_check(p,pie,pfx,hLOG) FigoSys_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoSys_print(p,    pfx,hLOG) FigoSys_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoSys
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FigoSysBasic            biu              (4,4)
///     ###
///     * FigoSys registers
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 HBO0                 (P)
///     # 0x00000 hbo0                 
///               $HBO                 hbo0              REG          
///     @ 0x00700                      (W-)
///     #         # Stuffing bytes...
///               %% 2048
///     @ 0x00800 FIGO0                (P)
///     # 0x00800 figo0                
///               $FigoReg             figo0             REG          
///     @ 0x02800 DS                   (P)
///     # 0x02800 ds                   
///               $DataStreamer        ds                REG          
///     @ 0x02824                      (W-)
///     #         # Stuffing bytes...
///               %% 16096
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:   12288B, bits:    2575b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FigoSysBasic
#define h_FigoSysBasic (){}

    #define     RA_FigoSysBasic_HBO0                           0x0000
    #define     RA_FigoSysBasic_hbo0                           0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_FigoSysBasic_FIGO0                          0x0800
    #define     RA_FigoSysBasic_figo0                          0x0800
    ///////////////////////////////////////////////////////////
    #define     RA_FigoSysBasic_DS                             0x2800
    #define     RA_FigoSysBasic_ds                             0x2800
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FigoSysBasic {
    ///////////////////////////////////////////////////////////
              SIE_HBO                                          ie_hbo0;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx700                                    [256];
    ///////////////////////////////////////////////////////////
              SIE_FigoReg                                      ie_figo0;
    ///////////////////////////////////////////////////////////
              SIE_DataStreamer                                 ie_ds;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx2824                                   [2012];
    ///////////////////////////////////////////////////////////
    } SIE_FigoSysBasic;

    ///////////////////////////////////////////////////////////
     SIGN32 FigoSysBasic_drvrd(SIE_FigoSysBasic *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FigoSysBasic_drvwr(SIE_FigoSysBasic *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FigoSysBasic_reset(SIE_FigoSysBasic *p);
     SIGN32 FigoSysBasic_cmp  (SIE_FigoSysBasic *p, SIE_FigoSysBasic *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FigoSysBasic_check(p,pie,pfx,hLOG) FigoSysBasic_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FigoSysBasic_print(p,    pfx,hLOG) FigoSysBasic_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FigoSysBasic
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE PIDWord                                  (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 N                         0x0
///                                    ###
///                                    * value to match
///                                    * DV-FR-CNR
///                                    ###
///               %unsigned 8  LTSID                     
///                                    ###
///                                    * local TSID for opencable
///                                    ###
///               %unsigned 1  FLT                       0x0
///                                    ###
///                                    * indicates packets matching this ID is for PSI
///                                    * DV-FR-CNR
///                                    ###
///               %unsigned 1  V                         0x0
///                                    ###
///                                    * 1 = enable this PID match ;
///                                    * DV-FR-CNR
///                                    ###
///               %unsigned 1  STCSEL                    0x0
///                                    ###
///                                    * To select the clock source of STC. 0 for VCLK0, 1 for VCLK1.
///                                    * DV-FR-CNR
///                                    ###
///               %%        8          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      24b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_PIDWord
#define h_PIDWord (){}

    #define     BA_PIDWord_N                                   0x0000
    #define     B16PIDWord_N                                   0x0000
    #define   LSb32PIDWord_N                                      0
    #define   LSb16PIDWord_N                                      0
    #define       bPIDWord_N                                   13
    #define   MSK32PIDWord_N                                      0x00001FFF

    #define     BA_PIDWord_LTSID                               0x0001
    #define     B16PIDWord_LTSID                               0x0000
    #define   LSb32PIDWord_LTSID                                  13
    #define   LSb16PIDWord_LTSID                                  13
    #define       bPIDWord_LTSID                               8
    #define   MSK32PIDWord_LTSID                                  0x001FE000

    #define     BA_PIDWord_FLT                                 0x0002
    #define     B16PIDWord_FLT                                 0x0002
    #define   LSb32PIDWord_FLT                                    21
    #define   LSb16PIDWord_FLT                                    5
    #define       bPIDWord_FLT                                 1
    #define   MSK32PIDWord_FLT                                    0x00200000

    #define     BA_PIDWord_V                                   0x0002
    #define     B16PIDWord_V                                   0x0002
    #define   LSb32PIDWord_V                                      22
    #define   LSb16PIDWord_V                                      6
    #define       bPIDWord_V                                   1
    #define   MSK32PIDWord_V                                      0x00400000

    #define     BA_PIDWord_STCSEL                              0x0002
    #define     B16PIDWord_STCSEL                              0x0002
    #define   LSb32PIDWord_STCSEL                                 23
    #define   LSb16PIDWord_STCSEL                                 7
    #define       bPIDWord_STCSEL                              1
    #define   MSK32PIDWord_STCSEL                                 0x00800000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_PIDWord {
    ///////////////////////////////////////////////////////////
    #define   GET32PIDWord_N(r32)                              _BFGET_(r32,12, 0)
    #define   SET32PIDWord_N(r32,v)                            _BFSET_(r32,12, 0,v)
    #define   GET16PIDWord_N(r16)                              _BFGET_(r16,12, 0)
    #define   SET16PIDWord_N(r16,v)                            _BFSET_(r16,12, 0,v)

    #define   GET32PIDWord_LTSID(r32)                          _BFGET_(r32,20,13)
    #define   SET32PIDWord_LTSID(r32,v)                        _BFSET_(r32,20,13,v)

    #define   GET32PIDWord_FLT(r32)                            _BFGET_(r32,21,21)
    #define   SET32PIDWord_FLT(r32,v)                          _BFSET_(r32,21,21,v)
    #define   GET16PIDWord_FLT(r16)                            _BFGET_(r16, 5, 5)
    #define   SET16PIDWord_FLT(r16,v)                          _BFSET_(r16, 5, 5,v)

    #define   GET32PIDWord_V(r32)                              _BFGET_(r32,22,22)
    #define   SET32PIDWord_V(r32,v)                            _BFSET_(r32,22,22,v)
    #define   GET16PIDWord_V(r16)                              _BFGET_(r16, 6, 6)
    #define   SET16PIDWord_V(r16,v)                            _BFSET_(r16, 6, 6,v)

    #define   GET32PIDWord_STCSEL(r32)                         _BFGET_(r32,23,23)
    #define   SET32PIDWord_STCSEL(r32,v)                       _BFSET_(r32,23,23,v)
    #define   GET16PIDWord_STCSEL(r16)                         _BFGET_(r16, 7, 7)
    #define   SET16PIDWord_STCSEL(r16,v)                       _BFSET_(r16, 7, 7,v)

            UNSG32 u_N                                         : 13;
            UNSG32 u_LTSID                                     :  8;
            UNSG32 u_FLT                                       :  1;
            UNSG32 u_V                                         :  1;
            UNSG32 u_STCSEL                                    :  1;
            UNSG32 RSVDx0_b24                                  :  8;
    ///////////////////////////////////////////////////////////
    } SIE_PIDWord;

    ///////////////////////////////////////////////////////////
     SIGN32 PIDWord_drvrd(SIE_PIDWord *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 PIDWord_drvwr(SIE_PIDWord *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void PIDWord_reset(SIE_PIDWord *p);
     SIGN32 PIDWord_cmp  (SIE_PIDWord *p, SIE_PIDWord *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define PIDWord_check(p,pie,pfx,hLOG) PIDWord_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define PIDWord_print(p,    pfx,hLOG) PIDWord_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: PIDWord
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE PID                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 PID                  
///               $PIDWord             PID               REG      [32]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     128B, bits:     768b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_PID
#define h_PID (){}

    #define     RA_PID_PID                                     0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_PID {
    ///////////////////////////////////////////////////////////
              SIE_PIDWord                                      ie_PID[32];
    ///////////////////////////////////////////////////////////
    } SIE_PID;

    ///////////////////////////////////////////////////////////
     SIGN32 PID_drvrd(SIE_PID *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 PID_drvwr(SIE_PID *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void PID_reset(SIE_PID *p);
     SIGN32 PID_cmp  (SIE_PID *p, SIE_PID *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define PID_check(p,pie,pfx,hLOG) PID_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define PID_print(p,    pfx,hLOG) PID_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: PID
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSCmd                   biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 PID                       0x0
///               %unsigned 2  TSID                      0x0
///               %unsigned 1  cascade                   0x0
///                                    ###
///                                    * 1: indicates this packet needs to go through a cascaded section filter
///                                    ###
///               %unsigned 5  PIDIDX                    0x0
///               %unsigned 1  TSERR                     0x0
///               %unsigned 1  MATCH                     
///                                    ###
///                                    * not used in TSC, will be set by section filter
///                                    ###
///               %unsigned 7  FLTID                     0x0
///                                    ###
///                                    * indicates the ID of matched section filter ; when multiple section filter are linked, the FLTID for last section filter is returned
///                                    ###
///               %%        2          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      30b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSCmd
#define h_TSCmd (){}

    #define     BA_TSCmd_PID                                   0x0000
    #define     B16TSCmd_PID                                   0x0000
    #define   LSb32TSCmd_PID                                      0
    #define   LSb16TSCmd_PID                                      0
    #define       bTSCmd_PID                                   13
    #define   MSK32TSCmd_PID                                      0x00001FFF

    #define     BA_TSCmd_TSID                                  0x0001
    #define     B16TSCmd_TSID                                  0x0000
    #define   LSb32TSCmd_TSID                                     13
    #define   LSb16TSCmd_TSID                                     13
    #define       bTSCmd_TSID                                  2
    #define   MSK32TSCmd_TSID                                     0x00006000

    #define     BA_TSCmd_cascade                               0x0001
    #define     B16TSCmd_cascade                               0x0000
    #define   LSb32TSCmd_cascade                                  15
    #define   LSb16TSCmd_cascade                                  15
    #define       bTSCmd_cascade                               1
    #define   MSK32TSCmd_cascade                                  0x00008000

    #define     BA_TSCmd_PIDIDX                                0x0002
    #define     B16TSCmd_PIDIDX                                0x0002
    #define   LSb32TSCmd_PIDIDX                                   16
    #define   LSb16TSCmd_PIDIDX                                   0
    #define       bTSCmd_PIDIDX                                5
    #define   MSK32TSCmd_PIDIDX                                   0x001F0000

    #define     BA_TSCmd_TSERR                                 0x0002
    #define     B16TSCmd_TSERR                                 0x0002
    #define   LSb32TSCmd_TSERR                                    21
    #define   LSb16TSCmd_TSERR                                    5
    #define       bTSCmd_TSERR                                 1
    #define   MSK32TSCmd_TSERR                                    0x00200000

    #define     BA_TSCmd_MATCH                                 0x0002
    #define     B16TSCmd_MATCH                                 0x0002
    #define   LSb32TSCmd_MATCH                                    22
    #define   LSb16TSCmd_MATCH                                    6
    #define       bTSCmd_MATCH                                 1
    #define   MSK32TSCmd_MATCH                                    0x00400000

    #define     BA_TSCmd_FLTID                                 0x0002
    #define     B16TSCmd_FLTID                                 0x0002
    #define   LSb32TSCmd_FLTID                                    23
    #define   LSb16TSCmd_FLTID                                    7
    #define       bTSCmd_FLTID                                 7
    #define   MSK32TSCmd_FLTID                                    0x3F800000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSCmd {
    ///////////////////////////////////////////////////////////
    #define   GET32TSCmd_PID(r32)                              _BFGET_(r32,12, 0)
    #define   SET32TSCmd_PID(r32,v)                            _BFSET_(r32,12, 0,v)
    #define   GET16TSCmd_PID(r16)                              _BFGET_(r16,12, 0)
    #define   SET16TSCmd_PID(r16,v)                            _BFSET_(r16,12, 0,v)

    #define   GET32TSCmd_TSID(r32)                             _BFGET_(r32,14,13)
    #define   SET32TSCmd_TSID(r32,v)                           _BFSET_(r32,14,13,v)
    #define   GET16TSCmd_TSID(r16)                             _BFGET_(r16,14,13)
    #define   SET16TSCmd_TSID(r16,v)                           _BFSET_(r16,14,13,v)

    #define   GET32TSCmd_cascade(r32)                          _BFGET_(r32,15,15)
    #define   SET32TSCmd_cascade(r32,v)                        _BFSET_(r32,15,15,v)
    #define   GET16TSCmd_cascade(r16)                          _BFGET_(r16,15,15)
    #define   SET16TSCmd_cascade(r16,v)                        _BFSET_(r16,15,15,v)

    #define   GET32TSCmd_PIDIDX(r32)                           _BFGET_(r32,20,16)
    #define   SET32TSCmd_PIDIDX(r32,v)                         _BFSET_(r32,20,16,v)
    #define   GET16TSCmd_PIDIDX(r16)                           _BFGET_(r16, 4, 0)
    #define   SET16TSCmd_PIDIDX(r16,v)                         _BFSET_(r16, 4, 0,v)

    #define   GET32TSCmd_TSERR(r32)                            _BFGET_(r32,21,21)
    #define   SET32TSCmd_TSERR(r32,v)                          _BFSET_(r32,21,21,v)
    #define   GET16TSCmd_TSERR(r16)                            _BFGET_(r16, 5, 5)
    #define   SET16TSCmd_TSERR(r16,v)                          _BFSET_(r16, 5, 5,v)

    #define   GET32TSCmd_MATCH(r32)                            _BFGET_(r32,22,22)
    #define   SET32TSCmd_MATCH(r32,v)                          _BFSET_(r32,22,22,v)
    #define   GET16TSCmd_MATCH(r16)                            _BFGET_(r16, 6, 6)
    #define   SET16TSCmd_MATCH(r16,v)                          _BFSET_(r16, 6, 6,v)

    #define   GET32TSCmd_FLTID(r32)                            _BFGET_(r32,29,23)
    #define   SET32TSCmd_FLTID(r32,v)                          _BFSET_(r32,29,23,v)
    #define   GET16TSCmd_FLTID(r16)                            _BFGET_(r16,13, 7)
    #define   SET16TSCmd_FLTID(r16,v)                          _BFSET_(r16,13, 7,v)

            UNSG32 u_PID                                       : 13;
            UNSG32 u_TSID                                      :  2;
            UNSG32 u_cascade                                   :  1;
            UNSG32 u_PIDIDX                                    :  5;
            UNSG32 u_TSERR                                     :  1;
            UNSG32 u_MATCH                                     :  1;
            UNSG32 u_FLTID                                     :  7;
            UNSG32 RSVDx0_b30                                  :  2;
    ///////////////////////////////////////////////////////////
    } SIE_TSCmd;

    ///////////////////////////////////////////////////////////
     SIGN32 TSCmd_drvrd(SIE_TSCmd *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSCmd_drvwr(SIE_TSCmd *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSCmd_reset(SIE_TSCmd *p);
     SIGN32 TSCmd_cmp  (SIE_TSCmd *p, SIE_TSCmd *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSCmd_check(p,pie,pfx,hLOG) TSCmd_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSCmd_print(p,    pfx,hLOG) TSCmd_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSCmd
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSCmdTSC                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 PID                       0x0
///               %unsigned 2  TSID                      0x0
///               %unsigned 1  PUS                       0x0
///                                    ###
///                                    * 1: indicates this packet have payload_unit_start =1
///                                    ###
///               %unsigned 5  PIDIDX                    0x0
///               %unsigned 1  TSERR                     0x0
///                                    ###
///                                    * value of TSTAMPL and TSTAMPH will only valid when TSERR =0 ; when TSERR =1, TSTAMPL will content error information.
///                                    ###
///               %unsigned 10 TSTAMPL                   
///                                    ###
///                                    * low 10 bits of timestamp,
///                                    ###
///               %unsigned 32 TSTAMPH                   0x0
///                                    ###
///                                    * high 32 bit of timestamp
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSCmdTSC
#define h_TSCmdTSC (){}

    #define     BA_TSCmdTSC_PID                                0x0000
    #define     B16TSCmdTSC_PID                                0x0000
    #define   LSb32TSCmdTSC_PID                                   0
    #define   LSb16TSCmdTSC_PID                                   0
    #define       bTSCmdTSC_PID                                13
    #define   MSK32TSCmdTSC_PID                                   0x00001FFF

    #define     BA_TSCmdTSC_TSID                               0x0001
    #define     B16TSCmdTSC_TSID                               0x0000
    #define   LSb32TSCmdTSC_TSID                                  13
    #define   LSb16TSCmdTSC_TSID                                  13
    #define       bTSCmdTSC_TSID                               2
    #define   MSK32TSCmdTSC_TSID                                  0x00006000

    #define     BA_TSCmdTSC_PUS                                0x0001
    #define     B16TSCmdTSC_PUS                                0x0000
    #define   LSb32TSCmdTSC_PUS                                   15
    #define   LSb16TSCmdTSC_PUS                                   15
    #define       bTSCmdTSC_PUS                                1
    #define   MSK32TSCmdTSC_PUS                                   0x00008000

    #define     BA_TSCmdTSC_PIDIDX                             0x0002
    #define     B16TSCmdTSC_PIDIDX                             0x0002
    #define   LSb32TSCmdTSC_PIDIDX                                16
    #define   LSb16TSCmdTSC_PIDIDX                                0
    #define       bTSCmdTSC_PIDIDX                             5
    #define   MSK32TSCmdTSC_PIDIDX                                0x001F0000

    #define     BA_TSCmdTSC_TSERR                              0x0002
    #define     B16TSCmdTSC_TSERR                              0x0002
    #define   LSb32TSCmdTSC_TSERR                                 21
    #define   LSb16TSCmdTSC_TSERR                                 5
    #define       bTSCmdTSC_TSERR                              1
    #define   MSK32TSCmdTSC_TSERR                                 0x00200000

    #define     BA_TSCmdTSC_TSTAMPL                            0x0002
    #define     B16TSCmdTSC_TSTAMPL                            0x0002
    #define   LSb32TSCmdTSC_TSTAMPL                               22
    #define   LSb16TSCmdTSC_TSTAMPL                               6
    #define       bTSCmdTSC_TSTAMPL                            10
    #define   MSK32TSCmdTSC_TSTAMPL                               0xFFC00000

    #define     BA_TSCmdTSC_TSTAMPH                            0x0004
    #define     B16TSCmdTSC_TSTAMPH                            0x0004
    #define   LSb32TSCmdTSC_TSTAMPH                               0
    #define   LSb16TSCmdTSC_TSTAMPH                               0
    #define       bTSCmdTSC_TSTAMPH                            32
    #define   MSK32TSCmdTSC_TSTAMPH                               0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSCmdTSC {
    ///////////////////////////////////////////////////////////
    #define   GET32TSCmdTSC_PID(r32)                           _BFGET_(r32,12, 0)
    #define   SET32TSCmdTSC_PID(r32,v)                         _BFSET_(r32,12, 0,v)
    #define   GET16TSCmdTSC_PID(r16)                           _BFGET_(r16,12, 0)
    #define   SET16TSCmdTSC_PID(r16,v)                         _BFSET_(r16,12, 0,v)

    #define   GET32TSCmdTSC_TSID(r32)                          _BFGET_(r32,14,13)
    #define   SET32TSCmdTSC_TSID(r32,v)                        _BFSET_(r32,14,13,v)
    #define   GET16TSCmdTSC_TSID(r16)                          _BFGET_(r16,14,13)
    #define   SET16TSCmdTSC_TSID(r16,v)                        _BFSET_(r16,14,13,v)

    #define   GET32TSCmdTSC_PUS(r32)                           _BFGET_(r32,15,15)
    #define   SET32TSCmdTSC_PUS(r32,v)                         _BFSET_(r32,15,15,v)
    #define   GET16TSCmdTSC_PUS(r16)                           _BFGET_(r16,15,15)
    #define   SET16TSCmdTSC_PUS(r16,v)                         _BFSET_(r16,15,15,v)

    #define   GET32TSCmdTSC_PIDIDX(r32)                        _BFGET_(r32,20,16)
    #define   SET32TSCmdTSC_PIDIDX(r32,v)                      _BFSET_(r32,20,16,v)
    #define   GET16TSCmdTSC_PIDIDX(r16)                        _BFGET_(r16, 4, 0)
    #define   SET16TSCmdTSC_PIDIDX(r16,v)                      _BFSET_(r16, 4, 0,v)

    #define   GET32TSCmdTSC_TSERR(r32)                         _BFGET_(r32,21,21)
    #define   SET32TSCmdTSC_TSERR(r32,v)                       _BFSET_(r32,21,21,v)
    #define   GET16TSCmdTSC_TSERR(r16)                         _BFGET_(r16, 5, 5)
    #define   SET16TSCmdTSC_TSERR(r16,v)                       _BFSET_(r16, 5, 5,v)

    #define   GET32TSCmdTSC_TSTAMPL(r32)                       _BFGET_(r32,31,22)
    #define   SET32TSCmdTSC_TSTAMPL(r32,v)                     _BFSET_(r32,31,22,v)
    #define   GET16TSCmdTSC_TSTAMPL(r16)                       _BFGET_(r16,15, 6)
    #define   SET16TSCmdTSC_TSTAMPL(r16,v)                     _BFSET_(r16,15, 6,v)

            UNSG32 u_PID                                       : 13;
            UNSG32 u_TSID                                      :  2;
            UNSG32 u_PUS                                       :  1;
            UNSG32 u_PIDIDX                                    :  5;
            UNSG32 u_TSERR                                     :  1;
            UNSG32 u_TSTAMPL                                   : 10;
    ///////////////////////////////////////////////////////////

    #define   GET32TSCmdTSC_TSTAMPH(r32)                       _BFGET_(r32,31, 0)
    #define   SET32TSCmdTSC_TSTAMPH(r32,v)                     _BFSET_(r32,31, 0,v)

            UNSG32 u_TSTAMPH                                   : 32;
    ///////////////////////////////////////////////////////////
    } SIE_TSCmdTSC;

    ///////////////////////////////////////////////////////////
     SIGN32 TSCmdTSC_drvrd(SIE_TSCmdTSC *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSCmdTSC_drvwr(SIE_TSCmdTSC *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSCmdTSC_reset(SIE_TSCmdTSC *p);
     SIGN32 TSCmdTSC_cmp  (SIE_TSCmdTSC *p, SIE_TSCmdTSC *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSCmdTSC_check(p,pie,pfx,hLOG) TSCmdTSC_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSCmdTSC_print(p,    pfx,hLOG) TSCmdTSC_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSCmdTSC
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSCmdTSCERR             biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 PID                       0x0
///               %unsigned 2  TSID                      0x0
///               %unsigned 1  PUS                       0x0
///                                    ###
///                                    * 1: indicates this packet have payload_unit_start =1
///                                    ###
///               %unsigned 5  PIDIDX                    0x0
///               %unsigned 1  TSERR                     0x0
///                                    ###
///                                    * value of TSTAMPL and TSTAMPH will only valid when TSERR =0 ; when TSERR =1, TSTAMPL will content error information.
///                                    ###
///               %unsigned 1  COR                       
///                                    ###
///                                    * packet have uncorrectable error
///                                    ###
///               %unsigned 1  SYNC                      
///                                    ###
///                                    * sync word is not as defined
///                                    ###
///               %unsigned 1  INCMPLT                   
///                                    ###
///                                    * a TS Sync happened before packet finishes
///                                    ###
///               %unsigned 1  OVERFLOW                  
///                                    ###
///                                    * overflow happened during the capture of the packet
///                                    ###
///               %%        6          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      26b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSCmdTSCERR
#define h_TSCmdTSCERR (){}

    #define     BA_TSCmdTSCERR_PID                             0x0000
    #define     B16TSCmdTSCERR_PID                             0x0000
    #define   LSb32TSCmdTSCERR_PID                                0
    #define   LSb16TSCmdTSCERR_PID                                0
    #define       bTSCmdTSCERR_PID                             13
    #define   MSK32TSCmdTSCERR_PID                                0x00001FFF

    #define     BA_TSCmdTSCERR_TSID                            0x0001
    #define     B16TSCmdTSCERR_TSID                            0x0000
    #define   LSb32TSCmdTSCERR_TSID                               13
    #define   LSb16TSCmdTSCERR_TSID                               13
    #define       bTSCmdTSCERR_TSID                            2
    #define   MSK32TSCmdTSCERR_TSID                               0x00006000

    #define     BA_TSCmdTSCERR_PUS                             0x0001
    #define     B16TSCmdTSCERR_PUS                             0x0000
    #define   LSb32TSCmdTSCERR_PUS                                15
    #define   LSb16TSCmdTSCERR_PUS                                15
    #define       bTSCmdTSCERR_PUS                             1
    #define   MSK32TSCmdTSCERR_PUS                                0x00008000

    #define     BA_TSCmdTSCERR_PIDIDX                          0x0002
    #define     B16TSCmdTSCERR_PIDIDX                          0x0002
    #define   LSb32TSCmdTSCERR_PIDIDX                             16
    #define   LSb16TSCmdTSCERR_PIDIDX                             0
    #define       bTSCmdTSCERR_PIDIDX                          5
    #define   MSK32TSCmdTSCERR_PIDIDX                             0x001F0000

    #define     BA_TSCmdTSCERR_TSERR                           0x0002
    #define     B16TSCmdTSCERR_TSERR                           0x0002
    #define   LSb32TSCmdTSCERR_TSERR                              21
    #define   LSb16TSCmdTSCERR_TSERR                              5
    #define       bTSCmdTSCERR_TSERR                           1
    #define   MSK32TSCmdTSCERR_TSERR                              0x00200000

    #define     BA_TSCmdTSCERR_COR                             0x0002
    #define     B16TSCmdTSCERR_COR                             0x0002
    #define   LSb32TSCmdTSCERR_COR                                22
    #define   LSb16TSCmdTSCERR_COR                                6
    #define       bTSCmdTSCERR_COR                             1
    #define   MSK32TSCmdTSCERR_COR                                0x00400000

    #define     BA_TSCmdTSCERR_SYNC                            0x0002
    #define     B16TSCmdTSCERR_SYNC                            0x0002
    #define   LSb32TSCmdTSCERR_SYNC                               23
    #define   LSb16TSCmdTSCERR_SYNC                               7
    #define       bTSCmdTSCERR_SYNC                            1
    #define   MSK32TSCmdTSCERR_SYNC                               0x00800000

    #define     BA_TSCmdTSCERR_INCMPLT                         0x0003
    #define     B16TSCmdTSCERR_INCMPLT                         0x0002
    #define   LSb32TSCmdTSCERR_INCMPLT                            24
    #define   LSb16TSCmdTSCERR_INCMPLT                            8
    #define       bTSCmdTSCERR_INCMPLT                         1
    #define   MSK32TSCmdTSCERR_INCMPLT                            0x01000000

    #define     BA_TSCmdTSCERR_OVERFLOW                        0x0003
    #define     B16TSCmdTSCERR_OVERFLOW                        0x0002
    #define   LSb32TSCmdTSCERR_OVERFLOW                           25
    #define   LSb16TSCmdTSCERR_OVERFLOW                           9
    #define       bTSCmdTSCERR_OVERFLOW                        1
    #define   MSK32TSCmdTSCERR_OVERFLOW                           0x02000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSCmdTSCERR {
    ///////////////////////////////////////////////////////////
    #define   GET32TSCmdTSCERR_PID(r32)                        _BFGET_(r32,12, 0)
    #define   SET32TSCmdTSCERR_PID(r32,v)                      _BFSET_(r32,12, 0,v)
    #define   GET16TSCmdTSCERR_PID(r16)                        _BFGET_(r16,12, 0)
    #define   SET16TSCmdTSCERR_PID(r16,v)                      _BFSET_(r16,12, 0,v)

    #define   GET32TSCmdTSCERR_TSID(r32)                       _BFGET_(r32,14,13)
    #define   SET32TSCmdTSCERR_TSID(r32,v)                     _BFSET_(r32,14,13,v)
    #define   GET16TSCmdTSCERR_TSID(r16)                       _BFGET_(r16,14,13)
    #define   SET16TSCmdTSCERR_TSID(r16,v)                     _BFSET_(r16,14,13,v)

    #define   GET32TSCmdTSCERR_PUS(r32)                        _BFGET_(r32,15,15)
    #define   SET32TSCmdTSCERR_PUS(r32,v)                      _BFSET_(r32,15,15,v)
    #define   GET16TSCmdTSCERR_PUS(r16)                        _BFGET_(r16,15,15)
    #define   SET16TSCmdTSCERR_PUS(r16,v)                      _BFSET_(r16,15,15,v)

    #define   GET32TSCmdTSCERR_PIDIDX(r32)                     _BFGET_(r32,20,16)
    #define   SET32TSCmdTSCERR_PIDIDX(r32,v)                   _BFSET_(r32,20,16,v)
    #define   GET16TSCmdTSCERR_PIDIDX(r16)                     _BFGET_(r16, 4, 0)
    #define   SET16TSCmdTSCERR_PIDIDX(r16,v)                   _BFSET_(r16, 4, 0,v)

    #define   GET32TSCmdTSCERR_TSERR(r32)                      _BFGET_(r32,21,21)
    #define   SET32TSCmdTSCERR_TSERR(r32,v)                    _BFSET_(r32,21,21,v)
    #define   GET16TSCmdTSCERR_TSERR(r16)                      _BFGET_(r16, 5, 5)
    #define   SET16TSCmdTSCERR_TSERR(r16,v)                    _BFSET_(r16, 5, 5,v)

    #define   GET32TSCmdTSCERR_COR(r32)                        _BFGET_(r32,22,22)
    #define   SET32TSCmdTSCERR_COR(r32,v)                      _BFSET_(r32,22,22,v)
    #define   GET16TSCmdTSCERR_COR(r16)                        _BFGET_(r16, 6, 6)
    #define   SET16TSCmdTSCERR_COR(r16,v)                      _BFSET_(r16, 6, 6,v)

    #define   GET32TSCmdTSCERR_SYNC(r32)                       _BFGET_(r32,23,23)
    #define   SET32TSCmdTSCERR_SYNC(r32,v)                     _BFSET_(r32,23,23,v)
    #define   GET16TSCmdTSCERR_SYNC(r16)                       _BFGET_(r16, 7, 7)
    #define   SET16TSCmdTSCERR_SYNC(r16,v)                     _BFSET_(r16, 7, 7,v)

    #define   GET32TSCmdTSCERR_INCMPLT(r32)                    _BFGET_(r32,24,24)
    #define   SET32TSCmdTSCERR_INCMPLT(r32,v)                  _BFSET_(r32,24,24,v)
    #define   GET16TSCmdTSCERR_INCMPLT(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16TSCmdTSCERR_INCMPLT(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32TSCmdTSCERR_OVERFLOW(r32)                   _BFGET_(r32,25,25)
    #define   SET32TSCmdTSCERR_OVERFLOW(r32,v)                 _BFSET_(r32,25,25,v)
    #define   GET16TSCmdTSCERR_OVERFLOW(r16)                   _BFGET_(r16, 9, 9)
    #define   SET16TSCmdTSCERR_OVERFLOW(r16,v)                 _BFSET_(r16, 9, 9,v)

            UNSG32 u_PID                                       : 13;
            UNSG32 u_TSID                                      :  2;
            UNSG32 u_PUS                                       :  1;
            UNSG32 u_PIDIDX                                    :  5;
            UNSG32 u_TSERR                                     :  1;
            UNSG32 u_COR                                       :  1;
            UNSG32 u_SYNC                                      :  1;
            UNSG32 u_INCMPLT                                   :  1;
            UNSG32 u_OVERFLOW                                  :  1;
            UNSG32 RSVDx0_b26                                  :  6;
    ///////////////////////////////////////////////////////////
    } SIE_TSCmdTSCERR;

    ///////////////////////////////////////////////////////////
     SIGN32 TSCmdTSCERR_drvrd(SIE_TSCmdTSCERR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSCmdTSCERR_drvwr(SIE_TSCmdTSCERR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSCmdTSCERR_reset(SIE_TSCmdTSCERR *p);
     SIGN32 TSCmdTSCERR_cmp  (SIE_TSCmdTSCERR *p, SIE_TSCmdTSCERR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSCmdTSCERR_check(p,pie,pfx,hLOG) TSCmdTSCERR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSCmdTSCERR_print(p,    pfx,hLOG) TSCmdTSCERR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSCmdTSCERR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE MCARDHDR                biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 8  LTSID                     0x0
///                                    ###
///                                    * local TS id for openCable M-Card,
///                                    * refer to cableCARD2.0 sepc, this field not exist in when tsc.CFG.mcard=0 ,
///                                    ###
///               %unsigned 8  RES1                      0x0
///                                    ###
///                                    * Mcard reserved byte 1, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 16 HOSTres                   0x0
///                                    ###
///                                    * reserved field to be set by Host , refer to cableCARD2.0 specification
///                                    ###
///               %unsigned 32 LTS                       0x0
///                                    ###
///                                    * local timestamp for opencable M-Card, this field not exist in when tsc.CFG.mcard=0
///                                    ###
///               %unsigned 16 CABLECARDRES              0x0
///                                    ###
///                                    * field reserved to use by card, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 8  RES2                      0x0
///                                    ###
///                                    * Mcard resverved byte 2, refer to cableCARD2.0 spec
///                                    ###
///               %unsigned 8  CRC                       0x0
///                                    ###
///                                    * CRC for the 11bytes mcard preheader,
///                                    * CRC-8= x8+x7+x6+x4+x2+1
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      12B, bits:      96b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_MCARDHDR
#define h_MCARDHDR (){}

    #define     BA_MCARDHDR_LTSID                              0x0000
    #define     B16MCARDHDR_LTSID                              0x0000
    #define   LSb32MCARDHDR_LTSID                                 0
    #define   LSb16MCARDHDR_LTSID                                 0
    #define       bMCARDHDR_LTSID                              8
    #define   MSK32MCARDHDR_LTSID                                 0x000000FF

    #define     BA_MCARDHDR_RES1                               0x0001
    #define     B16MCARDHDR_RES1                               0x0000
    #define   LSb32MCARDHDR_RES1                                  8
    #define   LSb16MCARDHDR_RES1                                  8
    #define       bMCARDHDR_RES1                               8
    #define   MSK32MCARDHDR_RES1                                  0x0000FF00

    #define     BA_MCARDHDR_HOSTres                            0x0002
    #define     B16MCARDHDR_HOSTres                            0x0002
    #define   LSb32MCARDHDR_HOSTres                               16
    #define   LSb16MCARDHDR_HOSTres                               0
    #define       bMCARDHDR_HOSTres                            16
    #define   MSK32MCARDHDR_HOSTres                               0xFFFF0000

    #define     BA_MCARDHDR_LTS                                0x0004
    #define     B16MCARDHDR_LTS                                0x0004
    #define   LSb32MCARDHDR_LTS                                   0
    #define   LSb16MCARDHDR_LTS                                   0
    #define       bMCARDHDR_LTS                                32
    #define   MSK32MCARDHDR_LTS                                   0xFFFFFFFF

    #define     BA_MCARDHDR_CABLECARDRES                       0x0008
    #define     B16MCARDHDR_CABLECARDRES                       0x0008
    #define   LSb32MCARDHDR_CABLECARDRES                          0
    #define   LSb16MCARDHDR_CABLECARDRES                          0
    #define       bMCARDHDR_CABLECARDRES                       16
    #define   MSK32MCARDHDR_CABLECARDRES                          0x0000FFFF

    #define     BA_MCARDHDR_RES2                               0x000A
    #define     B16MCARDHDR_RES2                               0x000A
    #define   LSb32MCARDHDR_RES2                                  16
    #define   LSb16MCARDHDR_RES2                                  0
    #define       bMCARDHDR_RES2                               8
    #define   MSK32MCARDHDR_RES2                                  0x00FF0000

    #define     BA_MCARDHDR_CRC                                0x000B
    #define     B16MCARDHDR_CRC                                0x000A
    #define   LSb32MCARDHDR_CRC                                   24
    #define   LSb16MCARDHDR_CRC                                   8
    #define       bMCARDHDR_CRC                                8
    #define   MSK32MCARDHDR_CRC                                   0xFF000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_MCARDHDR {
    ///////////////////////////////////////////////////////////
    #define   GET32MCARDHDR_LTSID(r32)                         _BFGET_(r32, 7, 0)
    #define   SET32MCARDHDR_LTSID(r32,v)                       _BFSET_(r32, 7, 0,v)
    #define   GET16MCARDHDR_LTSID(r16)                         _BFGET_(r16, 7, 0)
    #define   SET16MCARDHDR_LTSID(r16,v)                       _BFSET_(r16, 7, 0,v)

    #define   GET32MCARDHDR_RES1(r32)                          _BFGET_(r32,15, 8)
    #define   SET32MCARDHDR_RES1(r32,v)                        _BFSET_(r32,15, 8,v)
    #define   GET16MCARDHDR_RES1(r16)                          _BFGET_(r16,15, 8)
    #define   SET16MCARDHDR_RES1(r16,v)                        _BFSET_(r16,15, 8,v)

    #define   GET32MCARDHDR_HOSTres(r32)                       _BFGET_(r32,31,16)
    #define   SET32MCARDHDR_HOSTres(r32,v)                     _BFSET_(r32,31,16,v)
    #define   GET16MCARDHDR_HOSTres(r16)                       _BFGET_(r16,15, 0)
    #define   SET16MCARDHDR_HOSTres(r16,v)                     _BFSET_(r16,15, 0,v)

            UNSG32 u_LTSID                                     :  8;
            UNSG32 u_RES1                                      :  8;
            UNSG32 u_HOSTres                                   : 16;
    ///////////////////////////////////////////////////////////

    #define   GET32MCARDHDR_LTS(r32)                           _BFGET_(r32,31, 0)
    #define   SET32MCARDHDR_LTS(r32,v)                         _BFSET_(r32,31, 0,v)

            UNSG32 u_LTS                                       : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32MCARDHDR_CABLECARDRES(r32)                  _BFGET_(r32,15, 0)
    #define   SET32MCARDHDR_CABLECARDRES(r32,v)                _BFSET_(r32,15, 0,v)
    #define   GET16MCARDHDR_CABLECARDRES(r16)                  _BFGET_(r16,15, 0)
    #define   SET16MCARDHDR_CABLECARDRES(r16,v)                _BFSET_(r16,15, 0,v)

    #define   GET32MCARDHDR_RES2(r32)                          _BFGET_(r32,23,16)
    #define   SET32MCARDHDR_RES2(r32,v)                        _BFSET_(r32,23,16,v)
    #define   GET16MCARDHDR_RES2(r16)                          _BFGET_(r16, 7, 0)
    #define   SET16MCARDHDR_RES2(r16,v)                        _BFSET_(r16, 7, 0,v)

    #define   GET32MCARDHDR_CRC(r32)                           _BFGET_(r32,31,24)
    #define   SET32MCARDHDR_CRC(r32,v)                         _BFSET_(r32,31,24,v)
    #define   GET16MCARDHDR_CRC(r16)                           _BFGET_(r16,15, 8)
    #define   SET16MCARDHDR_CRC(r16,v)                         _BFSET_(r16,15, 8,v)

            UNSG32 u_CABLECARDRES                              : 16;
            UNSG32 u_RES2                                      :  8;
            UNSG32 u_CRC                                       :  8;
    ///////////////////////////////////////////////////////////
    } SIE_MCARDHDR;

    ///////////////////////////////////////////////////////////
     SIGN32 MCARDHDR_drvrd(SIE_MCARDHDR *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 MCARDHDR_drvwr(SIE_MCARDHDR *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void MCARDHDR_reset(SIE_MCARDHDR *p);
     SIGN32 MCARDHDR_cmp  (SIE_MCARDHDR *p, SIE_MCARDHDR *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define MCARDHDR_check(p,pie,pfx,hLOG) MCARDHDR_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define MCARDHDR_print(p,    pfx,hLOG) MCARDHDR_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: MCARDHDR
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSC                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (P)
///               %unsigned 31 STCINITH                  0x0
///                                    ###
///                                    * DV-FR-CNR
///                                    ###
///               %unsigned 1  STCSEL                    0x0
///                                    ###
///                                    * Obsolete, replaced by PIDWord.STCSEL
///                                    * DV-FR-CR
///                                    ###
///     # 0x00004 CFG1                 
///               %unsigned 32 STCINITL                  0x0
///                                    ###
///                                    * DV-FR-CNR
///                                    ###
///     # 0x00008 CFG2                 
///               %unsigned 1  STCLOAD                   0x0
///                                    ###
///                                    * write 1'b1 means load {STCINITH,STCINITL} to STC counter 1, write 1'b0 means load to STC counter 0
///                                    * DV-FCR
///                                    ###
///               %unsigned 3  PORTSEL                   0x0
///                                    ###
///                                    * 3'b1xx: from TSOFifo0
///                                    * 3'b1xx: from TSOFifo1
///                                    * 3'b0b1b0: from TSI port {b1,b0}
///                                    * DV-FCR
///                                    ###
///               %unsigned 4  LATPHASE                  0x0
///                                    ###
///                                    * DV-FR-CR ( TCQ from 0 to
///                                    * 0.8 tsClk cycle)
///                                    ###
///               %unsigned 1  SERIAL                    0x0
///                                    ###
///                                    * 0: parallel mode 1: serial mode
///                                    * DV-FCR
///                                    ###
///               %unsigned 8  PACKSIZE                  0xBB
///                                    ###
///                                    * packet size -1
///                                    * DV-FR-CNR(150-250)
///                                    ###
///               %unsigned 8  PIDOFFSET                 0xB
///                                    ###
///                                    * pidoffset -1
///                                    * DV-FR-CNR(1-4)
///                                    ###
///               %%        7          # Stuffing bits...
///     # 0x0000C CFG3                 
///               %unsigned 8  PCROFFSET                 0xC
///                                    ###
///                                    * pcr offset -1
///                                    * DV-FR-CNR(5-64)
///                                    ###
///               %unsigned 16 SYNCTHD                   0x0
///                                    ###
///                                    * DV-FR-CNR(1-100 when SYNCOPT=auto)
///                                    ###
///               %unsigned 2  SYNCOPT                   0x0
///                                    ###
///                                    * 2'b1x: auto
///                                    * 2'b00: no capture
///                                    * 2'b01: capture
///                                    * DV-FC
///                                    ###
///               %%        6          # Stuffing bits...
///     # 0x00010 CFG4                 
///               %unsigned 8  SYNCBYTE                  0x47
///               %unsigned 1  USESYNCBYTE               0x1
///                                    ###
///                                    * when this bit is set to 1, tsc will only capture the ts packets with sync byte equals to TSC.CFG.SYNCBYTE;
///                                    * when this bit is set to 0, tsc will capture the T/S packet when detects sync signal on interface, it will set the sync error bit in TSCmd when if sync byte in T/S packets is not equal to TSC.CFG.SYNCBYTE
///                                    ###
///               %unsigned 1  MCARD                     0x0
///                                    ###
///                                    * 1: enable mcard model for opencable
///                                    ###
///               %unsigned 1  BYPASS                    0x0
///                                    ###
///                                    * 1: disable PID filtering, capture all the packets from the port
///                                    ###
///               %%        21         # Stuffing bits...
///     @ 0x00014 STS                  (R-)
///               %unsigned 16 SYNCCNT                   0x0
///               %%        16         # Stuffing bits...
///     # 0x00018 STS1                 
///               %unsigned 32 HDRCNT                    0x0
///                                    ###
///                                    * processed headers
///                                    ###
///     # 0x0001C STS2                 
///               %unsigned 32 RESERVED                  0x0
///     @ 0x00020                      (P)
///     # 0x00020 PID                  
///               $PID                 PID               REG          
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:     160B, bits:     974b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSC
#define h_TSC (){}

    #define     RA_TSC_CFG                                     0x0000

    #define     BA_TSC_CFG_STCINITH                            0x0000
    #define     B16TSC_CFG_STCINITH                            0x0000
    #define   LSb32TSC_CFG_STCINITH                               0
    #define   LSb16TSC_CFG_STCINITH                               0
    #define       bTSC_CFG_STCINITH                            31
    #define   MSK32TSC_CFG_STCINITH                               0x7FFFFFFF

    #define     BA_TSC_CFG_STCSEL                              0x0003
    #define     B16TSC_CFG_STCSEL                              0x0002
    #define   LSb32TSC_CFG_STCSEL                                 31
    #define   LSb16TSC_CFG_STCSEL                                 15
    #define       bTSC_CFG_STCSEL                              1
    #define   MSK32TSC_CFG_STCSEL                                 0x80000000

    #define     RA_TSC_CFG1                                    0x0004

    #define     BA_TSC_CFG_STCINITL                            0x0004
    #define     B16TSC_CFG_STCINITL                            0x0004
    #define   LSb32TSC_CFG_STCINITL                               0
    #define   LSb16TSC_CFG_STCINITL                               0
    #define       bTSC_CFG_STCINITL                            32
    #define   MSK32TSC_CFG_STCINITL                               0xFFFFFFFF

    #define     RA_TSC_CFG2                                    0x0008

    #define     BA_TSC_CFG_STCLOAD                             0x0008
    #define     B16TSC_CFG_STCLOAD                             0x0008
    #define   LSb32TSC_CFG_STCLOAD                                0
    #define   LSb16TSC_CFG_STCLOAD                                0
    #define       bTSC_CFG_STCLOAD                             1
    #define   MSK32TSC_CFG_STCLOAD                                0x00000001

    #define     BA_TSC_CFG_PORTSEL                             0x0008
    #define     B16TSC_CFG_PORTSEL                             0x0008
    #define   LSb32TSC_CFG_PORTSEL                                1
    #define   LSb16TSC_CFG_PORTSEL                                1
    #define       bTSC_CFG_PORTSEL                             3
    #define   MSK32TSC_CFG_PORTSEL                                0x0000000E

    #define     BA_TSC_CFG_LATPHASE                            0x0008
    #define     B16TSC_CFG_LATPHASE                            0x0008
    #define   LSb32TSC_CFG_LATPHASE                               4
    #define   LSb16TSC_CFG_LATPHASE                               4
    #define       bTSC_CFG_LATPHASE                            4
    #define   MSK32TSC_CFG_LATPHASE                               0x000000F0

    #define     BA_TSC_CFG_SERIAL                              0x0009
    #define     B16TSC_CFG_SERIAL                              0x0008
    #define   LSb32TSC_CFG_SERIAL                                 8
    #define   LSb16TSC_CFG_SERIAL                                 8
    #define       bTSC_CFG_SERIAL                              1
    #define   MSK32TSC_CFG_SERIAL                                 0x00000100

    #define     BA_TSC_CFG_PACKSIZE                            0x0009
    #define     B16TSC_CFG_PACKSIZE                            0x0008
    #define   LSb32TSC_CFG_PACKSIZE                               9
    #define   LSb16TSC_CFG_PACKSIZE                               9
    #define       bTSC_CFG_PACKSIZE                            8
    #define   MSK32TSC_CFG_PACKSIZE                               0x0001FE00

    #define     BA_TSC_CFG_PIDOFFSET                           0x000A
    #define     B16TSC_CFG_PIDOFFSET                           0x000A
    #define   LSb32TSC_CFG_PIDOFFSET                              17
    #define   LSb16TSC_CFG_PIDOFFSET                              1
    #define       bTSC_CFG_PIDOFFSET                           8
    #define   MSK32TSC_CFG_PIDOFFSET                              0x01FE0000

    #define     RA_TSC_CFG3                                    0x000C

    #define     BA_TSC_CFG_PCROFFSET                           0x000C
    #define     B16TSC_CFG_PCROFFSET                           0x000C
    #define   LSb32TSC_CFG_PCROFFSET                              0
    #define   LSb16TSC_CFG_PCROFFSET                              0
    #define       bTSC_CFG_PCROFFSET                           8
    #define   MSK32TSC_CFG_PCROFFSET                              0x000000FF

    #define     BA_TSC_CFG_SYNCTHD                             0x000D
    #define     B16TSC_CFG_SYNCTHD                             0x000C
    #define   LSb32TSC_CFG_SYNCTHD                                8
    #define   LSb16TSC_CFG_SYNCTHD                                8
    #define       bTSC_CFG_SYNCTHD                             16
    #define   MSK32TSC_CFG_SYNCTHD                                0x00FFFF00

    #define     BA_TSC_CFG_SYNCOPT                             0x000F
    #define     B16TSC_CFG_SYNCOPT                             0x000E
    #define   LSb32TSC_CFG_SYNCOPT                                24
    #define   LSb16TSC_CFG_SYNCOPT                                8
    #define       bTSC_CFG_SYNCOPT                             2
    #define   MSK32TSC_CFG_SYNCOPT                                0x03000000

    #define     RA_TSC_CFG4                                    0x0010

    #define     BA_TSC_CFG_SYNCBYTE                            0x0010
    #define     B16TSC_CFG_SYNCBYTE                            0x0010
    #define   LSb32TSC_CFG_SYNCBYTE                               0
    #define   LSb16TSC_CFG_SYNCBYTE                               0
    #define       bTSC_CFG_SYNCBYTE                            8
    #define   MSK32TSC_CFG_SYNCBYTE                               0x000000FF

    #define     BA_TSC_CFG_USESYNCBYTE                         0x0011
    #define     B16TSC_CFG_USESYNCBYTE                         0x0010
    #define   LSb32TSC_CFG_USESYNCBYTE                            8
    #define   LSb16TSC_CFG_USESYNCBYTE                            8
    #define       bTSC_CFG_USESYNCBYTE                         1
    #define   MSK32TSC_CFG_USESYNCBYTE                            0x00000100

    #define     BA_TSC_CFG_MCARD                               0x0011
    #define     B16TSC_CFG_MCARD                               0x0010
    #define   LSb32TSC_CFG_MCARD                                  9
    #define   LSb16TSC_CFG_MCARD                                  9
    #define       bTSC_CFG_MCARD                               1
    #define   MSK32TSC_CFG_MCARD                                  0x00000200

    #define     BA_TSC_CFG_BYPASS                              0x0011
    #define     B16TSC_CFG_BYPASS                              0x0010
    #define   LSb32TSC_CFG_BYPASS                                 10
    #define   LSb16TSC_CFG_BYPASS                                 10
    #define       bTSC_CFG_BYPASS                              1
    #define   MSK32TSC_CFG_BYPASS                                 0x00000400
    ///////////////////////////////////////////////////////////
    #define     RA_TSC_STS                                     0x0014

    #define     BA_TSC_STS_SYNCCNT                             0x0014
    #define     B16TSC_STS_SYNCCNT                             0x0014
    #define   LSb32TSC_STS_SYNCCNT                                0
    #define   LSb16TSC_STS_SYNCCNT                                0
    #define       bTSC_STS_SYNCCNT                             16
    #define   MSK32TSC_STS_SYNCCNT                                0x0000FFFF

    #define     RA_TSC_STS1                                    0x0018

    #define     BA_TSC_STS_HDRCNT                              0x0018
    #define     B16TSC_STS_HDRCNT                              0x0018
    #define   LSb32TSC_STS_HDRCNT                                 0
    #define   LSb16TSC_STS_HDRCNT                                 0
    #define       bTSC_STS_HDRCNT                              32
    #define   MSK32TSC_STS_HDRCNT                                 0xFFFFFFFF

    #define     RA_TSC_STS2                                    0x001C

    #define     BA_TSC_STS_RESERVED                            0x001C
    #define     B16TSC_STS_RESERVED                            0x001C
    #define   LSb32TSC_STS_RESERVED                               0
    #define   LSb16TSC_STS_RESERVED                               0
    #define       bTSC_STS_RESERVED                            32
    #define   MSK32TSC_STS_RESERVED                               0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_TSC_PID                                     0x0020
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSC {
    ///////////////////////////////////////////////////////////
    #define   GET32TSC_CFG_STCINITH(r32)                       _BFGET_(r32,30, 0)
    #define   SET32TSC_CFG_STCINITH(r32,v)                     _BFSET_(r32,30, 0,v)

    #define   GET32TSC_CFG_STCSEL(r32)                         _BFGET_(r32,31,31)
    #define   SET32TSC_CFG_STCSEL(r32,v)                       _BFSET_(r32,31,31,v)
    #define   GET16TSC_CFG_STCSEL(r16)                         _BFGET_(r16,15,15)
    #define   SET16TSC_CFG_STCSEL(r16,v)                       _BFSET_(r16,15,15,v)

    #define     w32TSC_CFG                                     {\
            UNSG32 uCFG_STCINITH                               : 31;\
            UNSG32 uCFG_STCSEL                                 :  1;\
          }
    union { UNSG32 u32TSC_CFG;
            struct w32TSC_CFG;
          };
    #define   GET32TSC_CFG_STCINITL(r32)                       _BFGET_(r32,31, 0)
    #define   SET32TSC_CFG_STCINITL(r32,v)                     _BFSET_(r32,31, 0,v)

    #define     w32TSC_CFG1                                    {\
            UNSG32 uCFG_STCINITL                               : 32;\
          }
    union { UNSG32 u32TSC_CFG1;
            struct w32TSC_CFG1;
          };
    #define   GET32TSC_CFG_STCLOAD(r32)                        _BFGET_(r32, 0, 0)
    #define   SET32TSC_CFG_STCLOAD(r32,v)                      _BFSET_(r32, 0, 0,v)
    #define   GET16TSC_CFG_STCLOAD(r16)                        _BFGET_(r16, 0, 0)
    #define   SET16TSC_CFG_STCLOAD(r16,v)                      _BFSET_(r16, 0, 0,v)

    #define   GET32TSC_CFG_PORTSEL(r32)                        _BFGET_(r32, 3, 1)
    #define   SET32TSC_CFG_PORTSEL(r32,v)                      _BFSET_(r32, 3, 1,v)
    #define   GET16TSC_CFG_PORTSEL(r16)                        _BFGET_(r16, 3, 1)
    #define   SET16TSC_CFG_PORTSEL(r16,v)                      _BFSET_(r16, 3, 1,v)

    #define   GET32TSC_CFG_LATPHASE(r32)                       _BFGET_(r32, 7, 4)
    #define   SET32TSC_CFG_LATPHASE(r32,v)                     _BFSET_(r32, 7, 4,v)
    #define   GET16TSC_CFG_LATPHASE(r16)                       _BFGET_(r16, 7, 4)
    #define   SET16TSC_CFG_LATPHASE(r16,v)                     _BFSET_(r16, 7, 4,v)

    #define   GET32TSC_CFG_SERIAL(r32)                         _BFGET_(r32, 8, 8)
    #define   SET32TSC_CFG_SERIAL(r32,v)                       _BFSET_(r32, 8, 8,v)
    #define   GET16TSC_CFG_SERIAL(r16)                         _BFGET_(r16, 8, 8)
    #define   SET16TSC_CFG_SERIAL(r16,v)                       _BFSET_(r16, 8, 8,v)

    #define   GET32TSC_CFG_PACKSIZE(r32)                       _BFGET_(r32,16, 9)
    #define   SET32TSC_CFG_PACKSIZE(r32,v)                     _BFSET_(r32,16, 9,v)

    #define   GET32TSC_CFG_PIDOFFSET(r32)                      _BFGET_(r32,24,17)
    #define   SET32TSC_CFG_PIDOFFSET(r32,v)                    _BFSET_(r32,24,17,v)
    #define   GET16TSC_CFG_PIDOFFSET(r16)                      _BFGET_(r16, 8, 1)
    #define   SET16TSC_CFG_PIDOFFSET(r16,v)                    _BFSET_(r16, 8, 1,v)

    #define     w32TSC_CFG2                                    {\
            UNSG32 uCFG_STCLOAD                                :  1;\
            UNSG32 uCFG_PORTSEL                                :  3;\
            UNSG32 uCFG_LATPHASE                               :  4;\
            UNSG32 uCFG_SERIAL                                 :  1;\
            UNSG32 uCFG_PACKSIZE                               :  8;\
            UNSG32 uCFG_PIDOFFSET                              :  8;\
            UNSG32 RSVDx8_b25                                  :  7;\
          }
    union { UNSG32 u32TSC_CFG2;
            struct w32TSC_CFG2;
          };
    #define   GET32TSC_CFG_PCROFFSET(r32)                      _BFGET_(r32, 7, 0)
    #define   SET32TSC_CFG_PCROFFSET(r32,v)                    _BFSET_(r32, 7, 0,v)
    #define   GET16TSC_CFG_PCROFFSET(r16)                      _BFGET_(r16, 7, 0)
    #define   SET16TSC_CFG_PCROFFSET(r16,v)                    _BFSET_(r16, 7, 0,v)

    #define   GET32TSC_CFG_SYNCTHD(r32)                        _BFGET_(r32,23, 8)
    #define   SET32TSC_CFG_SYNCTHD(r32,v)                      _BFSET_(r32,23, 8,v)

    #define   GET32TSC_CFG_SYNCOPT(r32)                        _BFGET_(r32,25,24)
    #define   SET32TSC_CFG_SYNCOPT(r32,v)                      _BFSET_(r32,25,24,v)
    #define   GET16TSC_CFG_SYNCOPT(r16)                        _BFGET_(r16, 9, 8)
    #define   SET16TSC_CFG_SYNCOPT(r16,v)                      _BFSET_(r16, 9, 8,v)

    #define     w32TSC_CFG3                                    {\
            UNSG32 uCFG_PCROFFSET                              :  8;\
            UNSG32 uCFG_SYNCTHD                                : 16;\
            UNSG32 uCFG_SYNCOPT                                :  2;\
            UNSG32 RSVDxC_b26                                  :  6;\
          }
    union { UNSG32 u32TSC_CFG3;
            struct w32TSC_CFG3;
          };
    #define   GET32TSC_CFG_SYNCBYTE(r32)                       _BFGET_(r32, 7, 0)
    #define   SET32TSC_CFG_SYNCBYTE(r32,v)                     _BFSET_(r32, 7, 0,v)
    #define   GET16TSC_CFG_SYNCBYTE(r16)                       _BFGET_(r16, 7, 0)
    #define   SET16TSC_CFG_SYNCBYTE(r16,v)                     _BFSET_(r16, 7, 0,v)

    #define   GET32TSC_CFG_USESYNCBYTE(r32)                    _BFGET_(r32, 8, 8)
    #define   SET32TSC_CFG_USESYNCBYTE(r32,v)                  _BFSET_(r32, 8, 8,v)
    #define   GET16TSC_CFG_USESYNCBYTE(r16)                    _BFGET_(r16, 8, 8)
    #define   SET16TSC_CFG_USESYNCBYTE(r16,v)                  _BFSET_(r16, 8, 8,v)

    #define   GET32TSC_CFG_MCARD(r32)                          _BFGET_(r32, 9, 9)
    #define   SET32TSC_CFG_MCARD(r32,v)                        _BFSET_(r32, 9, 9,v)
    #define   GET16TSC_CFG_MCARD(r16)                          _BFGET_(r16, 9, 9)
    #define   SET16TSC_CFG_MCARD(r16,v)                        _BFSET_(r16, 9, 9,v)

    #define   GET32TSC_CFG_BYPASS(r32)                         _BFGET_(r32,10,10)
    #define   SET32TSC_CFG_BYPASS(r32,v)                       _BFSET_(r32,10,10,v)
    #define   GET16TSC_CFG_BYPASS(r16)                         _BFGET_(r16,10,10)
    #define   SET16TSC_CFG_BYPASS(r16,v)                       _BFSET_(r16,10,10,v)

    #define     w32TSC_CFG4                                    {\
            UNSG32 uCFG_SYNCBYTE                               :  8;\
            UNSG32 uCFG_USESYNCBYTE                            :  1;\
            UNSG32 uCFG_MCARD                                  :  1;\
            UNSG32 uCFG_BYPASS                                 :  1;\
            UNSG32 RSVDx10_b11                                 : 21;\
          }
    union { UNSG32 u32TSC_CFG4;
            struct w32TSC_CFG4;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32TSC_STS_SYNCCNT(r32)                        _BFGET_(r32,15, 0)
    #define   SET32TSC_STS_SYNCCNT(r32,v)                      _BFSET_(r32,15, 0,v)
    #define   GET16TSC_STS_SYNCCNT(r16)                        _BFGET_(r16,15, 0)
    #define   SET16TSC_STS_SYNCCNT(r16,v)                      _BFSET_(r16,15, 0,v)

    #define     w32TSC_STS                                     {\
            UNSG32 uSTS_SYNCCNT                                : 16;\
            UNSG32 RSVDx14_b16                                 : 16;\
          }
    union { UNSG32 u32TSC_STS;
            struct w32TSC_STS;
          };
    #define   GET32TSC_STS_HDRCNT(r32)                         _BFGET_(r32,31, 0)
    #define   SET32TSC_STS_HDRCNT(r32,v)                       _BFSET_(r32,31, 0,v)

    #define     w32TSC_STS1                                    {\
            UNSG32 uSTS_HDRCNT                                 : 32;\
          }
    union { UNSG32 u32TSC_STS1;
            struct w32TSC_STS1;
          };
    #define   GET32TSC_STS_RESERVED(r32)                       _BFGET_(r32,31, 0)
    #define   SET32TSC_STS_RESERVED(r32,v)                     _BFSET_(r32,31, 0,v)

    #define     w32TSC_STS2                                    {\
            UNSG32 uSTS_RESERVED                               : 32;\
          }
    union { UNSG32 u32TSC_STS2;
            struct w32TSC_STS2;
          };
    ///////////////////////////////////////////////////////////
              SIE_PID                                          ie_PID;
    ///////////////////////////////////////////////////////////
    } SIE_TSC;

    typedef union  T32TSC_CFG
          { UNSG32 u32;
            struct w32TSC_CFG;
                 } T32TSC_CFG;
    typedef union  T32TSC_CFG1
          { UNSG32 u32;
            struct w32TSC_CFG1;
                 } T32TSC_CFG1;
    typedef union  T32TSC_CFG2
          { UNSG32 u32;
            struct w32TSC_CFG2;
                 } T32TSC_CFG2;
    typedef union  T32TSC_CFG3
          { UNSG32 u32;
            struct w32TSC_CFG3;
                 } T32TSC_CFG3;
    typedef union  T32TSC_CFG4
          { UNSG32 u32;
            struct w32TSC_CFG4;
                 } T32TSC_CFG4;
    typedef union  T32TSC_STS
          { UNSG32 u32;
            struct w32TSC_STS;
                 } T32TSC_STS;
    typedef union  T32TSC_STS1
          { UNSG32 u32;
            struct w32TSC_STS1;
                 } T32TSC_STS1;
    typedef union  T32TSC_STS2
          { UNSG32 u32;
            struct w32TSC_STS2;
                 } T32TSC_STS2;
    ///////////////////////////////////////////////////////////

    typedef union  TTSC_CFG
          { UNSG32 u32[5];
            struct {
            struct w32TSC_CFG;
            struct w32TSC_CFG1;
            struct w32TSC_CFG2;
            struct w32TSC_CFG3;
            struct w32TSC_CFG4;
                   };
                 } TTSC_CFG;
    typedef union  TTSC_STS
          { UNSG32 u32[3];
            struct {
            struct w32TSC_STS;
            struct w32TSC_STS1;
            struct w32TSC_STS2;
                   };
                 } TTSC_STS;

    ///////////////////////////////////////////////////////////
     SIGN32 TSC_drvrd(SIE_TSC *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSC_drvwr(SIE_TSC *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSC_reset(SIE_TSC *p);
     SIGN32 TSC_cmp  (SIE_TSC *p, SIE_TSC *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSC_check(p,pie,pfx,hLOG) TSC_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSC_print(p,    pfx,hLOG) TSC_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSC
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE TSCmdF                  biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 13 PID                       0x0
///               %unsigned 2  TSID                      0x0
///               %unsigned 8  TID                       0x0
///               %unsigned 1  MATCH                     0x0
///                                    ###
///                                    * not used in TSC, will be set by section filter
///                                    ###
///               %unsigned 7  FLTID                     0x0
///                                    ###
///                                    * indicates the ID of matched section filter ID
///                                    ###
///               %%        1          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      31b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_TSCmdF
#define h_TSCmdF (){}

    #define     BA_TSCmdF_PID                                  0x0000
    #define     B16TSCmdF_PID                                  0x0000
    #define   LSb32TSCmdF_PID                                     0
    #define   LSb16TSCmdF_PID                                     0
    #define       bTSCmdF_PID                                  13
    #define   MSK32TSCmdF_PID                                     0x00001FFF

    #define     BA_TSCmdF_TSID                                 0x0001
    #define     B16TSCmdF_TSID                                 0x0000
    #define   LSb32TSCmdF_TSID                                    13
    #define   LSb16TSCmdF_TSID                                    13
    #define       bTSCmdF_TSID                                 2
    #define   MSK32TSCmdF_TSID                                    0x00006000

    #define     BA_TSCmdF_TID                                  0x0001
    #define     B16TSCmdF_TID                                  0x0000
    #define   LSb32TSCmdF_TID                                     15
    #define   LSb16TSCmdF_TID                                     15
    #define       bTSCmdF_TID                                  8
    #define   MSK32TSCmdF_TID                                     0x007F8000

    #define     BA_TSCmdF_MATCH                                0x0002
    #define     B16TSCmdF_MATCH                                0x0002
    #define   LSb32TSCmdF_MATCH                                   23
    #define   LSb16TSCmdF_MATCH                                   7
    #define       bTSCmdF_MATCH                                1
    #define   MSK32TSCmdF_MATCH                                   0x00800000

    #define     BA_TSCmdF_FLTID                                0x0003
    #define     B16TSCmdF_FLTID                                0x0002
    #define   LSb32TSCmdF_FLTID                                   24
    #define   LSb16TSCmdF_FLTID                                   8
    #define       bTSCmdF_FLTID                                7
    #define   MSK32TSCmdF_FLTID                                   0x7F000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_TSCmdF {
    ///////////////////////////////////////////////////////////
    #define   GET32TSCmdF_PID(r32)                             _BFGET_(r32,12, 0)
    #define   SET32TSCmdF_PID(r32,v)                           _BFSET_(r32,12, 0,v)
    #define   GET16TSCmdF_PID(r16)                             _BFGET_(r16,12, 0)
    #define   SET16TSCmdF_PID(r16,v)                           _BFSET_(r16,12, 0,v)

    #define   GET32TSCmdF_TSID(r32)                            _BFGET_(r32,14,13)
    #define   SET32TSCmdF_TSID(r32,v)                          _BFSET_(r32,14,13,v)
    #define   GET16TSCmdF_TSID(r16)                            _BFGET_(r16,14,13)
    #define   SET16TSCmdF_TSID(r16,v)                          _BFSET_(r16,14,13,v)

    #define   GET32TSCmdF_TID(r32)                             _BFGET_(r32,22,15)
    #define   SET32TSCmdF_TID(r32,v)                           _BFSET_(r32,22,15,v)

    #define   GET32TSCmdF_MATCH(r32)                           _BFGET_(r32,23,23)
    #define   SET32TSCmdF_MATCH(r32,v)                         _BFSET_(r32,23,23,v)
    #define   GET16TSCmdF_MATCH(r16)                           _BFGET_(r16, 7, 7)
    #define   SET16TSCmdF_MATCH(r16,v)                         _BFSET_(r16, 7, 7,v)

    #define   GET32TSCmdF_FLTID(r32)                           _BFGET_(r32,30,24)
    #define   SET32TSCmdF_FLTID(r32,v)                         _BFSET_(r32,30,24,v)
    #define   GET16TSCmdF_FLTID(r16)                           _BFGET_(r16,14, 8)
    #define   SET16TSCmdF_FLTID(r16,v)                         _BFSET_(r16,14, 8,v)

            UNSG32 u_PID                                       : 13;
            UNSG32 u_TSID                                      :  2;
            UNSG32 u_TID                                       :  8;
            UNSG32 u_MATCH                                     :  1;
            UNSG32 u_FLTID                                     :  7;
            UNSG32 RSVDx0_b31                                  :  1;
    ///////////////////////////////////////////////////////////
    } SIE_TSCmdF;

    ///////////////////////////////////////////////////////////
     SIGN32 TSCmdF_drvrd(SIE_TSCmdF *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 TSCmdF_drvwr(SIE_TSCmdF *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void TSCmdF_reset(SIE_TSCmdF *p);
     SIGN32 TSCmdF_cmp  (SIE_TSCmdF *p, SIE_TSCmdF *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define TSCmdF_check(p,pie,pfx,hLOG) TSCmdF_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define TSCmdF_print(p,    pfx,hLOG) TSCmdF_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: TSCmdF
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SFCONTROL               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 ENB                  (RW)
///               %unsigned 32 RULE31                    0x0
///                                    ###
///                                    * bit31...bit0 enables section filter 31, ...0;
///                                    * if a section filter is one-shot mode, it's corresponding bit will be cleared after a match
///                                    ###
///     # 0x00004 ENB1                 
///               %unsigned 32 RULE63                    0x0
///     # 0x00008 ENB2                 
///               %unsigned 32 RULE95                    0x0
///     # 0x0000C ENB3                 
///               %unsigned 32 RULE127                   0x0
///     @ 0x00010 RESET                (P)
///               %unsigned 1  ALL                       0x0
///                                    ###
///                                    * This bit will reset the section filter match engine
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00014 STATUS               (R-)
///               %unsigned 16 RULEADDR                  0x0
///                                    ###
///                                    * current section filter rule pointer
///                                    ###
///               %unsigned 8  FLTID                     0x0
///                                    ###
///                                    * current section filter ID the engine is matching on
///                                    ###
///               %unsigned 8  RESERVED                  0x0
///                                    ###
///                                    * Internal Debug only, reflects the filter machine status
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      24B, bits:     161b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SFCONTROL
#define h_SFCONTROL (){}

    #define     RA_SFCONTROL_ENB                               0x0000

    #define     BA_SFCONTROL_ENB_RULE31                        0x0000
    #define     B16SFCONTROL_ENB_RULE31                        0x0000
    #define   LSb32SFCONTROL_ENB_RULE31                           0
    #define   LSb16SFCONTROL_ENB_RULE31                           0
    #define       bSFCONTROL_ENB_RULE31                        32
    #define   MSK32SFCONTROL_ENB_RULE31                           0xFFFFFFFF

    #define     RA_SFCONTROL_ENB1                              0x0004

    #define     BA_SFCONTROL_ENB_RULE63                        0x0004
    #define     B16SFCONTROL_ENB_RULE63                        0x0004
    #define   LSb32SFCONTROL_ENB_RULE63                           0
    #define   LSb16SFCONTROL_ENB_RULE63                           0
    #define       bSFCONTROL_ENB_RULE63                        32
    #define   MSK32SFCONTROL_ENB_RULE63                           0xFFFFFFFF

    #define     RA_SFCONTROL_ENB2                              0x0008

    #define     BA_SFCONTROL_ENB_RULE95                        0x0008
    #define     B16SFCONTROL_ENB_RULE95                        0x0008
    #define   LSb32SFCONTROL_ENB_RULE95                           0
    #define   LSb16SFCONTROL_ENB_RULE95                           0
    #define       bSFCONTROL_ENB_RULE95                        32
    #define   MSK32SFCONTROL_ENB_RULE95                           0xFFFFFFFF

    #define     RA_SFCONTROL_ENB3                              0x000C

    #define     BA_SFCONTROL_ENB_RULE127                       0x000C
    #define     B16SFCONTROL_ENB_RULE127                       0x000C
    #define   LSb32SFCONTROL_ENB_RULE127                          0
    #define   LSb16SFCONTROL_ENB_RULE127                          0
    #define       bSFCONTROL_ENB_RULE127                       32
    #define   MSK32SFCONTROL_ENB_RULE127                          0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_SFCONTROL_RESET                             0x0010

    #define     BA_SFCONTROL_RESET_ALL                         0x0010
    #define     B16SFCONTROL_RESET_ALL                         0x0010
    #define   LSb32SFCONTROL_RESET_ALL                            0
    #define   LSb16SFCONTROL_RESET_ALL                            0
    #define       bSFCONTROL_RESET_ALL                         1
    #define   MSK32SFCONTROL_RESET_ALL                            0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_SFCONTROL_STATUS                            0x0014

    #define     BA_SFCONTROL_STATUS_RULEADDR                   0x0014
    #define     B16SFCONTROL_STATUS_RULEADDR                   0x0014
    #define   LSb32SFCONTROL_STATUS_RULEADDR                      0
    #define   LSb16SFCONTROL_STATUS_RULEADDR                      0
    #define       bSFCONTROL_STATUS_RULEADDR                   16
    #define   MSK32SFCONTROL_STATUS_RULEADDR                      0x0000FFFF

    #define     BA_SFCONTROL_STATUS_FLTID                      0x0016
    #define     B16SFCONTROL_STATUS_FLTID                      0x0016
    #define   LSb32SFCONTROL_STATUS_FLTID                         16
    #define   LSb16SFCONTROL_STATUS_FLTID                         0
    #define       bSFCONTROL_STATUS_FLTID                      8
    #define   MSK32SFCONTROL_STATUS_FLTID                         0x00FF0000

    #define     BA_SFCONTROL_STATUS_RESERVED                   0x0017
    #define     B16SFCONTROL_STATUS_RESERVED                   0x0016
    #define   LSb32SFCONTROL_STATUS_RESERVED                      24
    #define   LSb16SFCONTROL_STATUS_RESERVED                      8
    #define       bSFCONTROL_STATUS_RESERVED                   8
    #define   MSK32SFCONTROL_STATUS_RESERVED                      0xFF000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SFCONTROL {
    ///////////////////////////////////////////////////////////
    #define   GET32SFCONTROL_ENB_RULE31(r32)                   _BFGET_(r32,31, 0)
    #define   SET32SFCONTROL_ENB_RULE31(r32,v)                 _BFSET_(r32,31, 0,v)

    #define     w32SFCONTROL_ENB                               {\
            UNSG32 uENB_RULE31                                 : 32;\
          }
    union { UNSG32 u32SFCONTROL_ENB;
            struct w32SFCONTROL_ENB;
          };
    #define   GET32SFCONTROL_ENB_RULE63(r32)                   _BFGET_(r32,31, 0)
    #define   SET32SFCONTROL_ENB_RULE63(r32,v)                 _BFSET_(r32,31, 0,v)

    #define     w32SFCONTROL_ENB1                              {\
            UNSG32 uENB_RULE63                                 : 32;\
          }
    union { UNSG32 u32SFCONTROL_ENB1;
            struct w32SFCONTROL_ENB1;
          };
    #define   GET32SFCONTROL_ENB_RULE95(r32)                   _BFGET_(r32,31, 0)
    #define   SET32SFCONTROL_ENB_RULE95(r32,v)                 _BFSET_(r32,31, 0,v)

    #define     w32SFCONTROL_ENB2                              {\
            UNSG32 uENB_RULE95                                 : 32;\
          }
    union { UNSG32 u32SFCONTROL_ENB2;
            struct w32SFCONTROL_ENB2;
          };
    #define   GET32SFCONTROL_ENB_RULE127(r32)                  _BFGET_(r32,31, 0)
    #define   SET32SFCONTROL_ENB_RULE127(r32,v)                _BFSET_(r32,31, 0,v)

    #define     w32SFCONTROL_ENB3                              {\
            UNSG32 uENB_RULE127                                : 32;\
          }
    union { UNSG32 u32SFCONTROL_ENB3;
            struct w32SFCONTROL_ENB3;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SFCONTROL_RESET_ALL(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32SFCONTROL_RESET_ALL(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16SFCONTROL_RESET_ALL(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SFCONTROL_RESET_ALL(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define     w32SFCONTROL_RESET                             {\
            UNSG32 uRESET_ALL                                  :  1;\
            UNSG32 RSVDx10_b1                                  : 31;\
          }
    union { UNSG32 u32SFCONTROL_RESET;
            struct w32SFCONTROL_RESET;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SFCONTROL_STATUS_RULEADDR(r32)              _BFGET_(r32,15, 0)
    #define   SET32SFCONTROL_STATUS_RULEADDR(r32,v)            _BFSET_(r32,15, 0,v)
    #define   GET16SFCONTROL_STATUS_RULEADDR(r16)              _BFGET_(r16,15, 0)
    #define   SET16SFCONTROL_STATUS_RULEADDR(r16,v)            _BFSET_(r16,15, 0,v)

    #define   GET32SFCONTROL_STATUS_FLTID(r32)                 _BFGET_(r32,23,16)
    #define   SET32SFCONTROL_STATUS_FLTID(r32,v)               _BFSET_(r32,23,16,v)
    #define   GET16SFCONTROL_STATUS_FLTID(r16)                 _BFGET_(r16, 7, 0)
    #define   SET16SFCONTROL_STATUS_FLTID(r16,v)               _BFSET_(r16, 7, 0,v)

    #define   GET32SFCONTROL_STATUS_RESERVED(r32)              _BFGET_(r32,31,24)
    #define   SET32SFCONTROL_STATUS_RESERVED(r32,v)            _BFSET_(r32,31,24,v)
    #define   GET16SFCONTROL_STATUS_RESERVED(r16)              _BFGET_(r16,15, 8)
    #define   SET16SFCONTROL_STATUS_RESERVED(r16,v)            _BFSET_(r16,15, 8,v)

    #define     w32SFCONTROL_STATUS                            {\
            UNSG32 uSTATUS_RULEADDR                            : 16;\
            UNSG32 uSTATUS_FLTID                               :  8;\
            UNSG32 uSTATUS_RESERVED                            :  8;\
          }
    union { UNSG32 u32SFCONTROL_STATUS;
            struct w32SFCONTROL_STATUS;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SFCONTROL;

    typedef union  T32SFCONTROL_ENB
          { UNSG32 u32;
            struct w32SFCONTROL_ENB;
                 } T32SFCONTROL_ENB;
    typedef union  T32SFCONTROL_ENB1
          { UNSG32 u32;
            struct w32SFCONTROL_ENB1;
                 } T32SFCONTROL_ENB1;
    typedef union  T32SFCONTROL_ENB2
          { UNSG32 u32;
            struct w32SFCONTROL_ENB2;
                 } T32SFCONTROL_ENB2;
    typedef union  T32SFCONTROL_ENB3
          { UNSG32 u32;
            struct w32SFCONTROL_ENB3;
                 } T32SFCONTROL_ENB3;
    typedef union  T32SFCONTROL_RESET
          { UNSG32 u32;
            struct w32SFCONTROL_RESET;
                 } T32SFCONTROL_RESET;
    typedef union  T32SFCONTROL_STATUS
          { UNSG32 u32;
            struct w32SFCONTROL_STATUS;
                 } T32SFCONTROL_STATUS;
    ///////////////////////////////////////////////////////////

    typedef union  TSFCONTROL_ENB
          { UNSG32 u32[4];
            struct {
            struct w32SFCONTROL_ENB;
            struct w32SFCONTROL_ENB1;
            struct w32SFCONTROL_ENB2;
            struct w32SFCONTROL_ENB3;
                   };
                 } TSFCONTROL_ENB;
    typedef union  TSFCONTROL_RESET
          { UNSG32 u32[1];
            struct {
            struct w32SFCONTROL_RESET;
                   };
                 } TSFCONTROL_RESET;
    typedef union  TSFCONTROL_STATUS
          { UNSG32 u32[1];
            struct {
            struct w32SFCONTROL_STATUS;
                   };
                 } TSFCONTROL_STATUS;

    ///////////////////////////////////////////////////////////
     SIGN32 SFCONTROL_drvrd(SIE_SFCONTROL *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SFCONTROL_drvwr(SIE_SFCONTROL *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SFCONTROL_reset(SIE_SFCONTROL *p);
     SIGN32 SFCONTROL_cmp  (SIE_SFCONTROL *p, SIE_SFCONTROL *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SFCONTROL_check(p,pie,pfx,hLOG) SFCONTROL_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SFCONTROL_print(p,    pfx,hLOG) SFCONTROL_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SFCONTROL
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FILTER                                   (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 HDR0                 (P)
///               %unsigned 1  ONESHOT                   0x0
///                                    ###
///                                    * enable one shot filtering.
///                                    * One shot mode means a rule will be automatically disabled after a match. The enable bit should be automatically cleared to 0. To enable it again, CPU need to write 1 to it.
///                                    ###
///               %unsigned 1  PIDCHECKEN                0x0
///                                    ###
///                                    * match {TSID, PID} before section filter
///                                    ###
///               %unsigned 1  TIDCHECKEN                0x0
///                                    ###
///                                    * match the TID before section filter
///                                    ###
///               %unsigned 11 RULEID                    0x0
///                                    ###
///                                    * pointer to the next RULE
///                                    ###
///               %%        18         # Stuffing bits...
///     @ 0x00004 HDR1                 (P)
///               %unsigned 15 EXTPID                    0x0
///                                    ###
///                                    * This bit field is used to match with the incoming
///                                    * TSCmdTSC.{TSID,PID}, section filter will only active when EXTPID matches
///                                    * DV-FR-CNR(PID from 0 to 0x1fff, TSID from 0,1,2,3}
///                                    ###
///               %unsigned 1  RESERVED                  
///               %unsigned 8  TID                       0x0
///                                    ###
///                                    * table ID to be matched
///                                    ###
///               %%        8          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      38b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FILTER
#define h_FILTER (){}

    #define     RA_FILTER_HDR0                                 0x0000

    #define     BA_FILTER_HDR0_ONESHOT                         0x0000
    #define     B16FILTER_HDR0_ONESHOT                         0x0000
    #define   LSb32FILTER_HDR0_ONESHOT                            0
    #define   LSb16FILTER_HDR0_ONESHOT                            0
    #define       bFILTER_HDR0_ONESHOT                         1
    #define   MSK32FILTER_HDR0_ONESHOT                            0x00000001

    #define     BA_FILTER_HDR0_PIDCHECKEN                      0x0000
    #define     B16FILTER_HDR0_PIDCHECKEN                      0x0000
    #define   LSb32FILTER_HDR0_PIDCHECKEN                         1
    #define   LSb16FILTER_HDR0_PIDCHECKEN                         1
    #define       bFILTER_HDR0_PIDCHECKEN                      1
    #define   MSK32FILTER_HDR0_PIDCHECKEN                         0x00000002

    #define     BA_FILTER_HDR0_TIDCHECKEN                      0x0000
    #define     B16FILTER_HDR0_TIDCHECKEN                      0x0000
    #define   LSb32FILTER_HDR0_TIDCHECKEN                         2
    #define   LSb16FILTER_HDR0_TIDCHECKEN                         2
    #define       bFILTER_HDR0_TIDCHECKEN                      1
    #define   MSK32FILTER_HDR0_TIDCHECKEN                         0x00000004

    #define     BA_FILTER_HDR0_RULEID                          0x0000
    #define     B16FILTER_HDR0_RULEID                          0x0000
    #define   LSb32FILTER_HDR0_RULEID                             3
    #define   LSb16FILTER_HDR0_RULEID                             3
    #define       bFILTER_HDR0_RULEID                          11
    #define   MSK32FILTER_HDR0_RULEID                             0x00003FF8
    ///////////////////////////////////////////////////////////
    #define     RA_FILTER_HDR1                                 0x0004

    #define     BA_FILTER_HDR1_EXTPID                          0x0004
    #define     B16FILTER_HDR1_EXTPID                          0x0004
    #define   LSb32FILTER_HDR1_EXTPID                             0
    #define   LSb16FILTER_HDR1_EXTPID                             0
    #define       bFILTER_HDR1_EXTPID                          15
    #define   MSK32FILTER_HDR1_EXTPID                             0x00007FFF

    #define     BA_FILTER_HDR1_RESERVED                        0x0005
    #define     B16FILTER_HDR1_RESERVED                        0x0004
    #define   LSb32FILTER_HDR1_RESERVED                           15
    #define   LSb16FILTER_HDR1_RESERVED                           15
    #define       bFILTER_HDR1_RESERVED                        1
    #define   MSK32FILTER_HDR1_RESERVED                           0x00008000

    #define     BA_FILTER_HDR1_TID                             0x0006
    #define     B16FILTER_HDR1_TID                             0x0006
    #define   LSb32FILTER_HDR1_TID                                16
    #define   LSb16FILTER_HDR1_TID                                0
    #define       bFILTER_HDR1_TID                             8
    #define   MSK32FILTER_HDR1_TID                                0x00FF0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FILTER {
    ///////////////////////////////////////////////////////////
    #define   GET32FILTER_HDR0_ONESHOT(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32FILTER_HDR0_ONESHOT(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16FILTER_HDR0_ONESHOT(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16FILTER_HDR0_ONESHOT(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32FILTER_HDR0_PIDCHECKEN(r32)                 _BFGET_(r32, 1, 1)
    #define   SET32FILTER_HDR0_PIDCHECKEN(r32,v)               _BFSET_(r32, 1, 1,v)
    #define   GET16FILTER_HDR0_PIDCHECKEN(r16)                 _BFGET_(r16, 1, 1)
    #define   SET16FILTER_HDR0_PIDCHECKEN(r16,v)               _BFSET_(r16, 1, 1,v)

    #define   GET32FILTER_HDR0_TIDCHECKEN(r32)                 _BFGET_(r32, 2, 2)
    #define   SET32FILTER_HDR0_TIDCHECKEN(r32,v)               _BFSET_(r32, 2, 2,v)
    #define   GET16FILTER_HDR0_TIDCHECKEN(r16)                 _BFGET_(r16, 2, 2)
    #define   SET16FILTER_HDR0_TIDCHECKEN(r16,v)               _BFSET_(r16, 2, 2,v)

    #define   GET32FILTER_HDR0_RULEID(r32)                     _BFGET_(r32,13, 3)
    #define   SET32FILTER_HDR0_RULEID(r32,v)                   _BFSET_(r32,13, 3,v)
    #define   GET16FILTER_HDR0_RULEID(r16)                     _BFGET_(r16,13, 3)
    #define   SET16FILTER_HDR0_RULEID(r16,v)                   _BFSET_(r16,13, 3,v)

    #define     w32FILTER_HDR0                                 {\
            UNSG32 uHDR0_ONESHOT                               :  1;\
            UNSG32 uHDR0_PIDCHECKEN                            :  1;\
            UNSG32 uHDR0_TIDCHECKEN                            :  1;\
            UNSG32 uHDR0_RULEID                                : 11;\
            UNSG32 RSVDx0_b14                                  : 18;\
          }
    union { UNSG32 u32FILTER_HDR0;
            struct w32FILTER_HDR0;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32FILTER_HDR1_EXTPID(r32)                     _BFGET_(r32,14, 0)
    #define   SET32FILTER_HDR1_EXTPID(r32,v)                   _BFSET_(r32,14, 0,v)
    #define   GET16FILTER_HDR1_EXTPID(r16)                     _BFGET_(r16,14, 0)
    #define   SET16FILTER_HDR1_EXTPID(r16,v)                   _BFSET_(r16,14, 0,v)

    #define   GET32FILTER_HDR1_RESERVED(r32)                   _BFGET_(r32,15,15)
    #define   SET32FILTER_HDR1_RESERVED(r32,v)                 _BFSET_(r32,15,15,v)
    #define   GET16FILTER_HDR1_RESERVED(r16)                   _BFGET_(r16,15,15)
    #define   SET16FILTER_HDR1_RESERVED(r16,v)                 _BFSET_(r16,15,15,v)

    #define   GET32FILTER_HDR1_TID(r32)                        _BFGET_(r32,23,16)
    #define   SET32FILTER_HDR1_TID(r32,v)                      _BFSET_(r32,23,16,v)
    #define   GET16FILTER_HDR1_TID(r16)                        _BFGET_(r16, 7, 0)
    #define   SET16FILTER_HDR1_TID(r16,v)                      _BFSET_(r16, 7, 0,v)

    #define     w32FILTER_HDR1                                 {\
            UNSG32 uHDR1_EXTPID                                : 15;\
            UNSG32 uHDR1_RESERVED                              :  1;\
            UNSG32 uHDR1_TID                                   :  8;\
            UNSG32 RSVDx4_b24                                  :  8;\
          }
    union { UNSG32 u32FILTER_HDR1;
            struct w32FILTER_HDR1;
          };
    ///////////////////////////////////////////////////////////
    } SIE_FILTER;

    typedef union  T32FILTER_HDR0
          { UNSG32 u32;
            struct w32FILTER_HDR0;
                 } T32FILTER_HDR0;
    typedef union  T32FILTER_HDR1
          { UNSG32 u32;
            struct w32FILTER_HDR1;
                 } T32FILTER_HDR1;
    ///////////////////////////////////////////////////////////

    typedef union  TFILTER_HDR0
          { UNSG32 u32[1];
            struct {
            struct w32FILTER_HDR0;
                   };
                 } TFILTER_HDR0;
    typedef union  TFILTER_HDR1
          { UNSG32 u32[1];
            struct {
            struct w32FILTER_HDR1;
                   };
                 } TFILTER_HDR1;

    ///////////////////////////////////////////////////////////
     SIGN32 FILTER_drvrd(SIE_FILTER *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FILTER_drvwr(SIE_FILTER *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FILTER_reset(SIE_FILTER *p);
     SIGN32 FILTER_cmp  (SIE_FILTER *p, SIE_FILTER *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FILTER_check(p,pie,pfx,hLOG) FILTER_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FILTER_print(p,    pfx,hLOG) FILTER_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FILTER
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RULE                                     (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CTRL                 (P)
///               %unsigned 5  BYTEOFFSET                
///                                    ###
///                                    * byte offset into the section data the exact and range match is applied to
///                                    ###
///               %unsigned 3  BITOFFSET                 
///                                    ###
///                                    * bit offset within first byte the range comparison is applied, this field is ignored when MODE!=RANGE
///                                    ###
///               %unsigned 1  STOPONMISS                
///               %unsigned 1  LAST                      
///               %unsigned 11 NXT                       
///               %unsigned 2  MODE                      
///                                    : INRANGE                   0x0
///                                    : OUTRANGE                  0x1
///                                    : PMATCH                    0x2
///                                    : NMATCH                    0x3
///               %unsigned 4  LEN                       
///                                    ###
///                                    * if mode = RANGE, this field is ignored ;
///                                    * else, it indicates the number of bit-mask/pattern pair in current rule
///                                    ###
///               %%        5          # Stuffing bits...
///     @ 0x00004 MINMASK              (P)
///               %unsigned 32 VALUE                     
///     @ 0x00008 MAXCOEFF1DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x0000C MAXCOEFF2DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x00010 MAXCOEFF3DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x00014 MAXCOEFF4DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x00018 MAXCOEFF5DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x0001C MAXCOEFF6DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x00020 MAXCOEFF7DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x00024 MAXCOEFF8DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x00028 MAXCOEFF9DW          (P)
///               %unsigned 32 VALUE                     
///     @ 0x0002C MAXCOEFF10DW         (P)
///               %unsigned 32 VALUE                     
///     @ 0x00030 MAXCOEFF11DW         (P)
///               %unsigned 32 VALUE                     
///     @ 0x00034 MAXCOEFF12DW         (P)
///               %unsigned 32 VALUE                     
///     @ 0x00038 MAXCOEFF13DW         (P)
///               %unsigned 32 VALUE                     
///     @ 0x0003C MAXCOEFF14DW         (P)
///               %unsigned 32 VALUE                     
///     @ 0x00040 MAXCOEFF15DW         (P)
///               %unsigned 32 VALUE                     
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      68B, bits:     539b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RULE
#define h_RULE (){}

    #define     RA_RULE_CTRL                                   0x0000

    #define     BA_RULE_CTRL_BYTEOFFSET                        0x0000
    #define     B16RULE_CTRL_BYTEOFFSET                        0x0000
    #define   LSb32RULE_CTRL_BYTEOFFSET                           0
    #define   LSb16RULE_CTRL_BYTEOFFSET                           0
    #define       bRULE_CTRL_BYTEOFFSET                        5
    #define   MSK32RULE_CTRL_BYTEOFFSET                           0x0000001F

    #define     BA_RULE_CTRL_BITOFFSET                         0x0000
    #define     B16RULE_CTRL_BITOFFSET                         0x0000
    #define   LSb32RULE_CTRL_BITOFFSET                            5
    #define   LSb16RULE_CTRL_BITOFFSET                            5
    #define       bRULE_CTRL_BITOFFSET                         3
    #define   MSK32RULE_CTRL_BITOFFSET                            0x000000E0

    #define     BA_RULE_CTRL_STOPONMISS                        0x0001
    #define     B16RULE_CTRL_STOPONMISS                        0x0000
    #define   LSb32RULE_CTRL_STOPONMISS                           8
    #define   LSb16RULE_CTRL_STOPONMISS                           8
    #define       bRULE_CTRL_STOPONMISS                        1
    #define   MSK32RULE_CTRL_STOPONMISS                           0x00000100

    #define     BA_RULE_CTRL_LAST                              0x0001
    #define     B16RULE_CTRL_LAST                              0x0000
    #define   LSb32RULE_CTRL_LAST                                 9
    #define   LSb16RULE_CTRL_LAST                                 9
    #define       bRULE_CTRL_LAST                              1
    #define   MSK32RULE_CTRL_LAST                                 0x00000200

    #define     BA_RULE_CTRL_NXT                               0x0001
    #define     B16RULE_CTRL_NXT                               0x0000
    #define   LSb32RULE_CTRL_NXT                                  10
    #define   LSb16RULE_CTRL_NXT                                  10
    #define       bRULE_CTRL_NXT                               11
    #define   MSK32RULE_CTRL_NXT                                  0x001FFC00

    #define     BA_RULE_CTRL_MODE                              0x0002
    #define     B16RULE_CTRL_MODE                              0x0002
    #define   LSb32RULE_CTRL_MODE                                 21
    #define   LSb16RULE_CTRL_MODE                                 5
    #define       bRULE_CTRL_MODE                              2
    #define   MSK32RULE_CTRL_MODE                                 0x00600000
    #define        RULE_CTRL_MODE_INRANGE                                   0x0
    #define        RULE_CTRL_MODE_OUTRANGE                                  0x1
    #define        RULE_CTRL_MODE_PMATCH                                    0x2
    #define        RULE_CTRL_MODE_NMATCH                                    0x3

    #define     BA_RULE_CTRL_LEN                               0x0002
    #define     B16RULE_CTRL_LEN                               0x0002
    #define   LSb32RULE_CTRL_LEN                                  23
    #define   LSb16RULE_CTRL_LEN                                  7
    #define       bRULE_CTRL_LEN                               4
    #define   MSK32RULE_CTRL_LEN                                  0x07800000
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MINMASK                                0x0004

    #define     BA_RULE_MINMASK_VALUE                          0x0004
    #define     B16RULE_MINMASK_VALUE                          0x0004
    #define   LSb32RULE_MINMASK_VALUE                             0
    #define   LSb16RULE_MINMASK_VALUE                             0
    #define       bRULE_MINMASK_VALUE                          32
    #define   MSK32RULE_MINMASK_VALUE                             0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF1DW                            0x0008

    #define     BA_RULE_MAXCOEFF1DW_VALUE                      0x0008
    #define     B16RULE_MAXCOEFF1DW_VALUE                      0x0008
    #define   LSb32RULE_MAXCOEFF1DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF1DW_VALUE                         0
    #define       bRULE_MAXCOEFF1DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF1DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF2DW                            0x000C

    #define     BA_RULE_MAXCOEFF2DW_VALUE                      0x000C
    #define     B16RULE_MAXCOEFF2DW_VALUE                      0x000C
    #define   LSb32RULE_MAXCOEFF2DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF2DW_VALUE                         0
    #define       bRULE_MAXCOEFF2DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF2DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF3DW                            0x0010

    #define     BA_RULE_MAXCOEFF3DW_VALUE                      0x0010
    #define     B16RULE_MAXCOEFF3DW_VALUE                      0x0010
    #define   LSb32RULE_MAXCOEFF3DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF3DW_VALUE                         0
    #define       bRULE_MAXCOEFF3DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF3DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF4DW                            0x0014

    #define     BA_RULE_MAXCOEFF4DW_VALUE                      0x0014
    #define     B16RULE_MAXCOEFF4DW_VALUE                      0x0014
    #define   LSb32RULE_MAXCOEFF4DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF4DW_VALUE                         0
    #define       bRULE_MAXCOEFF4DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF4DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF5DW                            0x0018

    #define     BA_RULE_MAXCOEFF5DW_VALUE                      0x0018
    #define     B16RULE_MAXCOEFF5DW_VALUE                      0x0018
    #define   LSb32RULE_MAXCOEFF5DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF5DW_VALUE                         0
    #define       bRULE_MAXCOEFF5DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF5DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF6DW                            0x001C

    #define     BA_RULE_MAXCOEFF6DW_VALUE                      0x001C
    #define     B16RULE_MAXCOEFF6DW_VALUE                      0x001C
    #define   LSb32RULE_MAXCOEFF6DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF6DW_VALUE                         0
    #define       bRULE_MAXCOEFF6DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF6DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF7DW                            0x0020

    #define     BA_RULE_MAXCOEFF7DW_VALUE                      0x0020
    #define     B16RULE_MAXCOEFF7DW_VALUE                      0x0020
    #define   LSb32RULE_MAXCOEFF7DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF7DW_VALUE                         0
    #define       bRULE_MAXCOEFF7DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF7DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF8DW                            0x0024

    #define     BA_RULE_MAXCOEFF8DW_VALUE                      0x0024
    #define     B16RULE_MAXCOEFF8DW_VALUE                      0x0024
    #define   LSb32RULE_MAXCOEFF8DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF8DW_VALUE                         0
    #define       bRULE_MAXCOEFF8DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF8DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF9DW                            0x0028

    #define     BA_RULE_MAXCOEFF9DW_VALUE                      0x0028
    #define     B16RULE_MAXCOEFF9DW_VALUE                      0x0028
    #define   LSb32RULE_MAXCOEFF9DW_VALUE                         0
    #define   LSb16RULE_MAXCOEFF9DW_VALUE                         0
    #define       bRULE_MAXCOEFF9DW_VALUE                      32
    #define   MSK32RULE_MAXCOEFF9DW_VALUE                         0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF10DW                           0x002C

    #define     BA_RULE_MAXCOEFF10DW_VALUE                     0x002C
    #define     B16RULE_MAXCOEFF10DW_VALUE                     0x002C
    #define   LSb32RULE_MAXCOEFF10DW_VALUE                        0
    #define   LSb16RULE_MAXCOEFF10DW_VALUE                        0
    #define       bRULE_MAXCOEFF10DW_VALUE                     32
    #define   MSK32RULE_MAXCOEFF10DW_VALUE                        0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF11DW                           0x0030

    #define     BA_RULE_MAXCOEFF11DW_VALUE                     0x0030
    #define     B16RULE_MAXCOEFF11DW_VALUE                     0x0030
    #define   LSb32RULE_MAXCOEFF11DW_VALUE                        0
    #define   LSb16RULE_MAXCOEFF11DW_VALUE                        0
    #define       bRULE_MAXCOEFF11DW_VALUE                     32
    #define   MSK32RULE_MAXCOEFF11DW_VALUE                        0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF12DW                           0x0034

    #define     BA_RULE_MAXCOEFF12DW_VALUE                     0x0034
    #define     B16RULE_MAXCOEFF12DW_VALUE                     0x0034
    #define   LSb32RULE_MAXCOEFF12DW_VALUE                        0
    #define   LSb16RULE_MAXCOEFF12DW_VALUE                        0
    #define       bRULE_MAXCOEFF12DW_VALUE                     32
    #define   MSK32RULE_MAXCOEFF12DW_VALUE                        0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF13DW                           0x0038

    #define     BA_RULE_MAXCOEFF13DW_VALUE                     0x0038
    #define     B16RULE_MAXCOEFF13DW_VALUE                     0x0038
    #define   LSb32RULE_MAXCOEFF13DW_VALUE                        0
    #define   LSb16RULE_MAXCOEFF13DW_VALUE                        0
    #define       bRULE_MAXCOEFF13DW_VALUE                     32
    #define   MSK32RULE_MAXCOEFF13DW_VALUE                        0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF14DW                           0x003C

    #define     BA_RULE_MAXCOEFF14DW_VALUE                     0x003C
    #define     B16RULE_MAXCOEFF14DW_VALUE                     0x003C
    #define   LSb32RULE_MAXCOEFF14DW_VALUE                        0
    #define   LSb16RULE_MAXCOEFF14DW_VALUE                        0
    #define       bRULE_MAXCOEFF14DW_VALUE                     32
    #define   MSK32RULE_MAXCOEFF14DW_VALUE                        0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_RULE_MAXCOEFF15DW                           0x0040

    #define     BA_RULE_MAXCOEFF15DW_VALUE                     0x0040
    #define     B16RULE_MAXCOEFF15DW_VALUE                     0x0040
    #define   LSb32RULE_MAXCOEFF15DW_VALUE                        0
    #define   LSb16RULE_MAXCOEFF15DW_VALUE                        0
    #define       bRULE_MAXCOEFF15DW_VALUE                     32
    #define   MSK32RULE_MAXCOEFF15DW_VALUE                        0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RULE {
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_CTRL_BYTEOFFSET(r32)                   _BFGET_(r32, 4, 0)
    #define   SET32RULE_CTRL_BYTEOFFSET(r32,v)                 _BFSET_(r32, 4, 0,v)
    #define   GET16RULE_CTRL_BYTEOFFSET(r16)                   _BFGET_(r16, 4, 0)
    #define   SET16RULE_CTRL_BYTEOFFSET(r16,v)                 _BFSET_(r16, 4, 0,v)

    #define   GET32RULE_CTRL_BITOFFSET(r32)                    _BFGET_(r32, 7, 5)
    #define   SET32RULE_CTRL_BITOFFSET(r32,v)                  _BFSET_(r32, 7, 5,v)
    #define   GET16RULE_CTRL_BITOFFSET(r16)                    _BFGET_(r16, 7, 5)
    #define   SET16RULE_CTRL_BITOFFSET(r16,v)                  _BFSET_(r16, 7, 5,v)

    #define   GET32RULE_CTRL_STOPONMISS(r32)                   _BFGET_(r32, 8, 8)
    #define   SET32RULE_CTRL_STOPONMISS(r32,v)                 _BFSET_(r32, 8, 8,v)
    #define   GET16RULE_CTRL_STOPONMISS(r16)                   _BFGET_(r16, 8, 8)
    #define   SET16RULE_CTRL_STOPONMISS(r16,v)                 _BFSET_(r16, 8, 8,v)

    #define   GET32RULE_CTRL_LAST(r32)                         _BFGET_(r32, 9, 9)
    #define   SET32RULE_CTRL_LAST(r32,v)                       _BFSET_(r32, 9, 9,v)
    #define   GET16RULE_CTRL_LAST(r16)                         _BFGET_(r16, 9, 9)
    #define   SET16RULE_CTRL_LAST(r16,v)                       _BFSET_(r16, 9, 9,v)

    #define   GET32RULE_CTRL_NXT(r32)                          _BFGET_(r32,20,10)
    #define   SET32RULE_CTRL_NXT(r32,v)                        _BFSET_(r32,20,10,v)

    #define   GET32RULE_CTRL_MODE(r32)                         _BFGET_(r32,22,21)
    #define   SET32RULE_CTRL_MODE(r32,v)                       _BFSET_(r32,22,21,v)
    #define   GET16RULE_CTRL_MODE(r16)                         _BFGET_(r16, 6, 5)
    #define   SET16RULE_CTRL_MODE(r16,v)                       _BFSET_(r16, 6, 5,v)

    #define   GET32RULE_CTRL_LEN(r32)                          _BFGET_(r32,26,23)
    #define   SET32RULE_CTRL_LEN(r32,v)                        _BFSET_(r32,26,23,v)
    #define   GET16RULE_CTRL_LEN(r16)                          _BFGET_(r16,10, 7)
    #define   SET16RULE_CTRL_LEN(r16,v)                        _BFSET_(r16,10, 7,v)

    #define     w32RULE_CTRL                                   {\
            UNSG32 uCTRL_BYTEOFFSET                            :  5;\
            UNSG32 uCTRL_BITOFFSET                             :  3;\
            UNSG32 uCTRL_STOPONMISS                            :  1;\
            UNSG32 uCTRL_LAST                                  :  1;\
            UNSG32 uCTRL_NXT                                   : 11;\
            UNSG32 uCTRL_MODE                                  :  2;\
            UNSG32 uCTRL_LEN                                   :  4;\
            UNSG32 RSVDx0_b27                                  :  5;\
          }
    union { UNSG32 u32RULE_CTRL;
            struct w32RULE_CTRL;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MINMASK_VALUE(r32)                     _BFGET_(r32,31, 0)
    #define   SET32RULE_MINMASK_VALUE(r32,v)                   _BFSET_(r32,31, 0,v)

    #define     w32RULE_MINMASK                                {\
            UNSG32 uMINMASK_VALUE                              : 32;\
          }
    union { UNSG32 u32RULE_MINMASK;
            struct w32RULE_MINMASK;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF1DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF1DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF1DW                            {\
            UNSG32 uMAXCOEFF1DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF1DW;
            struct w32RULE_MAXCOEFF1DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF2DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF2DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF2DW                            {\
            UNSG32 uMAXCOEFF2DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF2DW;
            struct w32RULE_MAXCOEFF2DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF3DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF3DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF3DW                            {\
            UNSG32 uMAXCOEFF3DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF3DW;
            struct w32RULE_MAXCOEFF3DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF4DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF4DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF4DW                            {\
            UNSG32 uMAXCOEFF4DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF4DW;
            struct w32RULE_MAXCOEFF4DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF5DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF5DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF5DW                            {\
            UNSG32 uMAXCOEFF5DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF5DW;
            struct w32RULE_MAXCOEFF5DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF6DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF6DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF6DW                            {\
            UNSG32 uMAXCOEFF6DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF6DW;
            struct w32RULE_MAXCOEFF6DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF7DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF7DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF7DW                            {\
            UNSG32 uMAXCOEFF7DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF7DW;
            struct w32RULE_MAXCOEFF7DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF8DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF8DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF8DW                            {\
            UNSG32 uMAXCOEFF8DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF8DW;
            struct w32RULE_MAXCOEFF8DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF9DW_VALUE(r32)                 _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF9DW_VALUE(r32,v)               _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF9DW                            {\
            UNSG32 uMAXCOEFF9DW_VALUE                          : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF9DW;
            struct w32RULE_MAXCOEFF9DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF10DW_VALUE(r32)                _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF10DW_VALUE(r32,v)              _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF10DW                           {\
            UNSG32 uMAXCOEFF10DW_VALUE                         : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF10DW;
            struct w32RULE_MAXCOEFF10DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF11DW_VALUE(r32)                _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF11DW_VALUE(r32,v)              _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF11DW                           {\
            UNSG32 uMAXCOEFF11DW_VALUE                         : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF11DW;
            struct w32RULE_MAXCOEFF11DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF12DW_VALUE(r32)                _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF12DW_VALUE(r32,v)              _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF12DW                           {\
            UNSG32 uMAXCOEFF12DW_VALUE                         : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF12DW;
            struct w32RULE_MAXCOEFF12DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF13DW_VALUE(r32)                _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF13DW_VALUE(r32,v)              _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF13DW                           {\
            UNSG32 uMAXCOEFF13DW_VALUE                         : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF13DW;
            struct w32RULE_MAXCOEFF13DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF14DW_VALUE(r32)                _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF14DW_VALUE(r32,v)              _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF14DW                           {\
            UNSG32 uMAXCOEFF14DW_VALUE                         : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF14DW;
            struct w32RULE_MAXCOEFF14DW;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32RULE_MAXCOEFF15DW_VALUE(r32)                _BFGET_(r32,31, 0)
    #define   SET32RULE_MAXCOEFF15DW_VALUE(r32,v)              _BFSET_(r32,31, 0,v)

    #define     w32RULE_MAXCOEFF15DW                           {\
            UNSG32 uMAXCOEFF15DW_VALUE                         : 32;\
          }
    union { UNSG32 u32RULE_MAXCOEFF15DW;
            struct w32RULE_MAXCOEFF15DW;
          };
    ///////////////////////////////////////////////////////////
    } SIE_RULE;

    typedef union  T32RULE_CTRL
          { UNSG32 u32;
            struct w32RULE_CTRL;
                 } T32RULE_CTRL;
    typedef union  T32RULE_MINMASK
          { UNSG32 u32;
            struct w32RULE_MINMASK;
                 } T32RULE_MINMASK;
    typedef union  T32RULE_MAXCOEFF1DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF1DW;
                 } T32RULE_MAXCOEFF1DW;
    typedef union  T32RULE_MAXCOEFF2DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF2DW;
                 } T32RULE_MAXCOEFF2DW;
    typedef union  T32RULE_MAXCOEFF3DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF3DW;
                 } T32RULE_MAXCOEFF3DW;
    typedef union  T32RULE_MAXCOEFF4DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF4DW;
                 } T32RULE_MAXCOEFF4DW;
    typedef union  T32RULE_MAXCOEFF5DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF5DW;
                 } T32RULE_MAXCOEFF5DW;
    typedef union  T32RULE_MAXCOEFF6DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF6DW;
                 } T32RULE_MAXCOEFF6DW;
    typedef union  T32RULE_MAXCOEFF7DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF7DW;
                 } T32RULE_MAXCOEFF7DW;
    typedef union  T32RULE_MAXCOEFF8DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF8DW;
                 } T32RULE_MAXCOEFF8DW;
    typedef union  T32RULE_MAXCOEFF9DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF9DW;
                 } T32RULE_MAXCOEFF9DW;
    typedef union  T32RULE_MAXCOEFF10DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF10DW;
                 } T32RULE_MAXCOEFF10DW;
    typedef union  T32RULE_MAXCOEFF11DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF11DW;
                 } T32RULE_MAXCOEFF11DW;
    typedef union  T32RULE_MAXCOEFF12DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF12DW;
                 } T32RULE_MAXCOEFF12DW;
    typedef union  T32RULE_MAXCOEFF13DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF13DW;
                 } T32RULE_MAXCOEFF13DW;
    typedef union  T32RULE_MAXCOEFF14DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF14DW;
                 } T32RULE_MAXCOEFF14DW;
    typedef union  T32RULE_MAXCOEFF15DW
          { UNSG32 u32;
            struct w32RULE_MAXCOEFF15DW;
                 } T32RULE_MAXCOEFF15DW;
    ///////////////////////////////////////////////////////////

    typedef union  TRULE_CTRL
          { UNSG32 u32[1];
            struct {
            struct w32RULE_CTRL;
                   };
                 } TRULE_CTRL;
    typedef union  TRULE_MINMASK
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MINMASK;
                   };
                 } TRULE_MINMASK;
    typedef union  TRULE_MAXCOEFF1DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF1DW;
                   };
                 } TRULE_MAXCOEFF1DW;
    typedef union  TRULE_MAXCOEFF2DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF2DW;
                   };
                 } TRULE_MAXCOEFF2DW;
    typedef union  TRULE_MAXCOEFF3DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF3DW;
                   };
                 } TRULE_MAXCOEFF3DW;
    typedef union  TRULE_MAXCOEFF4DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF4DW;
                   };
                 } TRULE_MAXCOEFF4DW;
    typedef union  TRULE_MAXCOEFF5DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF5DW;
                   };
                 } TRULE_MAXCOEFF5DW;
    typedef union  TRULE_MAXCOEFF6DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF6DW;
                   };
                 } TRULE_MAXCOEFF6DW;
    typedef union  TRULE_MAXCOEFF7DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF7DW;
                   };
                 } TRULE_MAXCOEFF7DW;
    typedef union  TRULE_MAXCOEFF8DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF8DW;
                   };
                 } TRULE_MAXCOEFF8DW;
    typedef union  TRULE_MAXCOEFF9DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF9DW;
                   };
                 } TRULE_MAXCOEFF9DW;
    typedef union  TRULE_MAXCOEFF10DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF10DW;
                   };
                 } TRULE_MAXCOEFF10DW;
    typedef union  TRULE_MAXCOEFF11DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF11DW;
                   };
                 } TRULE_MAXCOEFF11DW;
    typedef union  TRULE_MAXCOEFF12DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF12DW;
                   };
                 } TRULE_MAXCOEFF12DW;
    typedef union  TRULE_MAXCOEFF13DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF13DW;
                   };
                 } TRULE_MAXCOEFF13DW;
    typedef union  TRULE_MAXCOEFF14DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF14DW;
                   };
                 } TRULE_MAXCOEFF14DW;
    typedef union  TRULE_MAXCOEFF15DW
          { UNSG32 u32[1];
            struct {
            struct w32RULE_MAXCOEFF15DW;
                   };
                 } TRULE_MAXCOEFF15DW;

    ///////////////////////////////////////////////////////////
     SIGN32 RULE_drvrd(SIE_RULE *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RULE_drvwr(SIE_RULE *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RULE_reset(SIE_RULE *p);
     SIGN32 RULE_cmp  (SIE_RULE *p, SIE_RULE *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RULE_check(p,pie,pfx,hLOG) RULE_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RULE_print(p,    pfx,hLOG) RULE_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RULE
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RAM1WORD                                 (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 32 word                      
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RAM1WORD
#define h_RAM1WORD (){}

    #define     BA_RAM1WORD_word                               0x0000
    #define     B16RAM1WORD_word                               0x0000
    #define   LSb32RAM1WORD_word                                  0
    #define   LSb16RAM1WORD_word                                  0
    #define       bRAM1WORD_word                               32
    #define   MSK32RAM1WORD_word                                  0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RAM1WORD {
    ///////////////////////////////////////////////////////////
    #define   GET32RAM1WORD_word(r32)                          _BFGET_(r32,31, 0)
    #define   SET32RAM1WORD_word(r32,v)                        _BFSET_(r32,31, 0,v)

            UNSG32 u_word                                      : 32;
    ///////////////////////////////////////////////////////////
    } SIE_RAM1WORD;

    ///////////////////////////////////////////////////////////
     SIGN32 RAM1WORD_drvrd(SIE_RAM1WORD *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RAM1WORD_drvwr(SIE_RAM1WORD *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RAM1WORD_reset(SIE_RAM1WORD *p);
     SIGN32 RAM1WORD_cmp  (SIE_RAM1WORD *p, SIE_RAM1WORD *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RAM1WORD_check(p,pie,pfx,hLOG) RAM1WORD_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RAM1WORD_print(p,    pfx,hLOG) RAM1WORD_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RAM1WORD
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SFRAM                                    (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 word                 
///               $RAM1WORD            word              REG    [2048]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:    8192B, bits:   65536b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SFRAM
#define h_SFRAM (){}

    #define     RA_SFRAM_word                                  0x0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SFRAM {
    ///////////////////////////////////////////////////////////
              SIE_RAM1WORD                                     ie_word[2048];
    ///////////////////////////////////////////////////////////
    } SIE_SFRAM;

    ///////////////////////////////////////////////////////////
     SIGN32 SFRAM_drvrd(SIE_SFRAM *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SFRAM_drvwr(SIE_SFRAM *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SFRAM_reset(SIE_SFRAM *p);
     SIGN32 SFRAM_cmp  (SIE_SFRAM *p, SIE_SFRAM *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SFRAM_check(p,pie,pfx,hLOG) SFRAM_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SFRAM_print(p,    pfx,hLOG) SFRAM_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SFRAM
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE OTP                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (RW)
///               %unsigned 4  test                      0x5
///               %unsigned 1  rstb                      0x1
///               %unsigned 1  csb                       0x1
///               %unsigned 1  pgmb                      0x1
///               %unsigned 1  sclk                      0x0
///               %unsigned 1  load                      0x1
///               %unsigned 1  pdwn                      0x0
///               %unsigned 13 addr                      0x0
///                                    ###
///                                    * select the OTP cells to be programmed; only 0~2699 are valid numbers
///                                    ###
///               %unsigned 8  crcchk                    0x0
///               %%        1          # Stuffing bits...
///     @ 0x00004                      (RW)
///               %unsigned 1  progseqcode               0x0
///               %unsigned 1  progseqcodeclk            0x0
///               %%        30         # Stuffing bits...
///     @ 0x00008                      (R-)
///               %unsigned 32 data0                     0x1
///               %unsigned 32 data1                     0x1
///               %unsigned 2  data2                     0x1
///               %unsigned 1  security                  0x1
///               %unsigned 1  rddone                    0x0
///                                    ###
///                                    * please refer to OTP Macro Document regarding to definition and programming timing about these bits.
///                                    ###
///               %%        28         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      20B, bits:     101b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_OTP
#define h_OTP (){}

    #define     BA_OTP_test                                    0x0000
    #define     B16OTP_test                                    0x0000
    #define   LSb32OTP_test                                       0
    #define   LSb16OTP_test                                       0
    #define       bOTP_test                                    4
    #define   MSK32OTP_test                                       0x0000000F

    #define     BA_OTP_rstb                                    0x0000
    #define     B16OTP_rstb                                    0x0000
    #define   LSb32OTP_rstb                                       4
    #define   LSb16OTP_rstb                                       4
    #define       bOTP_rstb                                    1
    #define   MSK32OTP_rstb                                       0x00000010

    #define     BA_OTP_csb                                     0x0000
    #define     B16OTP_csb                                     0x0000
    #define   LSb32OTP_csb                                        5
    #define   LSb16OTP_csb                                        5
    #define       bOTP_csb                                     1
    #define   MSK32OTP_csb                                        0x00000020

    #define     BA_OTP_pgmb                                    0x0000
    #define     B16OTP_pgmb                                    0x0000
    #define   LSb32OTP_pgmb                                       6
    #define   LSb16OTP_pgmb                                       6
    #define       bOTP_pgmb                                    1
    #define   MSK32OTP_pgmb                                       0x00000040

    #define     BA_OTP_sclk                                    0x0000
    #define     B16OTP_sclk                                    0x0000
    #define   LSb32OTP_sclk                                       7
    #define   LSb16OTP_sclk                                       7
    #define       bOTP_sclk                                    1
    #define   MSK32OTP_sclk                                       0x00000080

    #define     BA_OTP_load                                    0x0001
    #define     B16OTP_load                                    0x0000
    #define   LSb32OTP_load                                       8
    #define   LSb16OTP_load                                       8
    #define       bOTP_load                                    1
    #define   MSK32OTP_load                                       0x00000100

    #define     BA_OTP_pdwn                                    0x0001
    #define     B16OTP_pdwn                                    0x0000
    #define   LSb32OTP_pdwn                                       9
    #define   LSb16OTP_pdwn                                       9
    #define       bOTP_pdwn                                    1
    #define   MSK32OTP_pdwn                                       0x00000200

    #define     BA_OTP_addr                                    0x0001
    #define     B16OTP_addr                                    0x0000
    #define   LSb32OTP_addr                                       10
    #define   LSb16OTP_addr                                       10
    #define       bOTP_addr                                    13
    #define   MSK32OTP_addr                                       0x007FFC00

    #define     BA_OTP_crcchk                                  0x0002
    #define     B16OTP_crcchk                                  0x0002
    #define   LSb32OTP_crcchk                                     23
    #define   LSb16OTP_crcchk                                     7
    #define       bOTP_crcchk                                  8
    #define   MSK32OTP_crcchk                                     0x7F800000
    ///////////////////////////////////////////////////////////

    #define     BA_OTP_progseqcode                             0x0004
    #define     B16OTP_progseqcode                             0x0004
    #define   LSb32OTP_progseqcode                                0
    #define   LSb16OTP_progseqcode                                0
    #define       bOTP_progseqcode                             1
    #define   MSK32OTP_progseqcode                                0x00000001

    #define     BA_OTP_progseqcodeclk                          0x0004
    #define     B16OTP_progseqcodeclk                          0x0004
    #define   LSb32OTP_progseqcodeclk                             1
    #define   LSb16OTP_progseqcodeclk                             1
    #define       bOTP_progseqcodeclk                          1
    #define   MSK32OTP_progseqcodeclk                             0x00000002
    ///////////////////////////////////////////////////////////

    #define     BA_OTP_data0                                   0x0008
    #define     B16OTP_data0                                   0x0008
    #define   LSb32OTP_data0                                      0
    #define   LSb16OTP_data0                                      0
    #define       bOTP_data0                                   32
    #define   MSK32OTP_data0                                      0xFFFFFFFF

    #define     BA_OTP_data1                                   0x000C
    #define     B16OTP_data1                                   0x000C
    #define   LSb32OTP_data1                                      0
    #define   LSb16OTP_data1                                      0
    #define       bOTP_data1                                   32
    #define   MSK32OTP_data1                                      0xFFFFFFFF

    #define     BA_OTP_data2                                   0x0010
    #define     B16OTP_data2                                   0x0010
    #define   LSb32OTP_data2                                      0
    #define   LSb16OTP_data2                                      0
    #define       bOTP_data2                                   2
    #define   MSK32OTP_data2                                      0x00000003

    #define     BA_OTP_security                                0x0010
    #define     B16OTP_security                                0x0010
    #define   LSb32OTP_security                                   2
    #define   LSb16OTP_security                                   2
    #define       bOTP_security                                1
    #define   MSK32OTP_security                                   0x00000004

    #define     BA_OTP_rddone                                  0x0010
    #define     B16OTP_rddone                                  0x0010
    #define   LSb32OTP_rddone                                     3
    #define   LSb16OTP_rddone                                     3
    #define       bOTP_rddone                                  1
    #define   MSK32OTP_rddone                                     0x00000008
    ///////////////////////////////////////////////////////////

    typedef struct SIE_OTP {
    ///////////////////////////////////////////////////////////
    #define   GET32OTP_test(r32)                               _BFGET_(r32, 3, 0)
    #define   SET32OTP_test(r32,v)                             _BFSET_(r32, 3, 0,v)
    #define   GET16OTP_test(r16)                               _BFGET_(r16, 3, 0)
    #define   SET16OTP_test(r16,v)                             _BFSET_(r16, 3, 0,v)

    #define   GET32OTP_rstb(r32)                               _BFGET_(r32, 4, 4)
    #define   SET32OTP_rstb(r32,v)                             _BFSET_(r32, 4, 4,v)
    #define   GET16OTP_rstb(r16)                               _BFGET_(r16, 4, 4)
    #define   SET16OTP_rstb(r16,v)                             _BFSET_(r16, 4, 4,v)

    #define   GET32OTP_csb(r32)                                _BFGET_(r32, 5, 5)
    #define   SET32OTP_csb(r32,v)                              _BFSET_(r32, 5, 5,v)
    #define   GET16OTP_csb(r16)                                _BFGET_(r16, 5, 5)
    #define   SET16OTP_csb(r16,v)                              _BFSET_(r16, 5, 5,v)

    #define   GET32OTP_pgmb(r32)                               _BFGET_(r32, 6, 6)
    #define   SET32OTP_pgmb(r32,v)                             _BFSET_(r32, 6, 6,v)
    #define   GET16OTP_pgmb(r16)                               _BFGET_(r16, 6, 6)
    #define   SET16OTP_pgmb(r16,v)                             _BFSET_(r16, 6, 6,v)

    #define   GET32OTP_sclk(r32)                               _BFGET_(r32, 7, 7)
    #define   SET32OTP_sclk(r32,v)                             _BFSET_(r32, 7, 7,v)
    #define   GET16OTP_sclk(r16)                               _BFGET_(r16, 7, 7)
    #define   SET16OTP_sclk(r16,v)                             _BFSET_(r16, 7, 7,v)

    #define   GET32OTP_load(r32)                               _BFGET_(r32, 8, 8)
    #define   SET32OTP_load(r32,v)                             _BFSET_(r32, 8, 8,v)
    #define   GET16OTP_load(r16)                               _BFGET_(r16, 8, 8)
    #define   SET16OTP_load(r16,v)                             _BFSET_(r16, 8, 8,v)

    #define   GET32OTP_pdwn(r32)                               _BFGET_(r32, 9, 9)
    #define   SET32OTP_pdwn(r32,v)                             _BFSET_(r32, 9, 9,v)
    #define   GET16OTP_pdwn(r16)                               _BFGET_(r16, 9, 9)
    #define   SET16OTP_pdwn(r16,v)                             _BFSET_(r16, 9, 9,v)

    #define   GET32OTP_addr(r32)                               _BFGET_(r32,22,10)
    #define   SET32OTP_addr(r32,v)                             _BFSET_(r32,22,10,v)

    #define   GET32OTP_crcchk(r32)                             _BFGET_(r32,30,23)
    #define   SET32OTP_crcchk(r32,v)                           _BFSET_(r32,30,23,v)
    #define   GET16OTP_crcchk(r16)                             _BFGET_(r16,14, 7)
    #define   SET16OTP_crcchk(r16,v)                           _BFSET_(r16,14, 7,v)

            UNSG32 u_test                                      :  4;
            UNSG32 u_rstb                                      :  1;
            UNSG32 u_csb                                       :  1;
            UNSG32 u_pgmb                                      :  1;
            UNSG32 u_sclk                                      :  1;
            UNSG32 u_load                                      :  1;
            UNSG32 u_pdwn                                      :  1;
            UNSG32 u_addr                                      : 13;
            UNSG32 u_crcchk                                    :  8;
            UNSG32 RSVDx0_b31                                  :  1;
    ///////////////////////////////////////////////////////////
    #define   GET32OTP_progseqcode(r32)                        _BFGET_(r32, 0, 0)
    #define   SET32OTP_progseqcode(r32,v)                      _BFSET_(r32, 0, 0,v)
    #define   GET16OTP_progseqcode(r16)                        _BFGET_(r16, 0, 0)
    #define   SET16OTP_progseqcode(r16,v)                      _BFSET_(r16, 0, 0,v)

    #define   GET32OTP_progseqcodeclk(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32OTP_progseqcodeclk(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16OTP_progseqcodeclk(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16OTP_progseqcodeclk(r16,v)                   _BFSET_(r16, 1, 1,v)

            UNSG32 u_progseqcode                               :  1;
            UNSG32 u_progseqcodeclk                            :  1;
            UNSG32 RSVDx4_b2                                   : 30;
    ///////////////////////////////////////////////////////////
    #define   GET32OTP_data0(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data0(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data0                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data1(r32)                              _BFGET_(r32,31, 0)
    #define   SET32OTP_data1(r32,v)                            _BFSET_(r32,31, 0,v)

            UNSG32 u_data1                                     : 32;
    ///////////////////////////////////////////////////////////

    #define   GET32OTP_data2(r32)                              _BFGET_(r32, 1, 0)
    #define   SET32OTP_data2(r32,v)                            _BFSET_(r32, 1, 0,v)
    #define   GET16OTP_data2(r16)                              _BFGET_(r16, 1, 0)
    #define   SET16OTP_data2(r16,v)                            _BFSET_(r16, 1, 0,v)

    #define   GET32OTP_security(r32)                           _BFGET_(r32, 2, 2)
    #define   SET32OTP_security(r32,v)                         _BFSET_(r32, 2, 2,v)
    #define   GET16OTP_security(r16)                           _BFGET_(r16, 2, 2)
    #define   SET16OTP_security(r16,v)                         _BFSET_(r16, 2, 2,v)

    #define   GET32OTP_rddone(r32)                             _BFGET_(r32, 3, 3)
    #define   SET32OTP_rddone(r32,v)                           _BFSET_(r32, 3, 3,v)
    #define   GET16OTP_rddone(r16)                             _BFGET_(r16, 3, 3)
    #define   SET16OTP_rddone(r16,v)                           _BFSET_(r16, 3, 3,v)

            UNSG32 u_data2                                     :  2;
            UNSG32 u_security                                  :  1;
            UNSG32 u_rddone                                    :  1;
            UNSG32 RSVDx10_b4                                  : 28;
    ///////////////////////////////////////////////////////////
    } SIE_OTP;

    ///////////////////////////////////////////////////////////
     SIGN32 OTP_drvrd(SIE_OTP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 OTP_drvwr(SIE_OTP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void OTP_reset(SIE_OTP *p);
     SIGN32 OTP_cmp  (SIE_OTP *p, SIE_OTP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define OTP_check(p,pie,pfx,hLOG) OTP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define OTP_print(p,    pfx,hLOG) OTP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: OTP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE RNG                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 8  rate                      0x1
///                                    ###
///                                    * RNG bitrate = 12.5 * rate Kbps; this is assuming the system clock is @400MHz.
///                                    ###
///               %unsigned 1  crc                       0x1
///                                    ###
///                                    * 1: enable CRC
///                                    * 0: disable CRC for testing; this will expose the raw random bits sampled
///                                    ###
///               %unsigned 1  oscEnb                    0x0
///                                    ###
///                                    * 1: enable the internal ring oscillator;
///                                    * 0: disable the internal ring oscillator. When internal ring oscillator is disabled, another external PLL clock source will be used instead.
///                                    ###
///               %%        22         # Stuffing bits...
///     @ 0x00004                      (RW-)
///               %unsigned 1  ready                     0x0
///                                    ###
///                                    * H/W indicates random data ready by set ready to 1
///                                    * S/W write 0 to it after read the random data
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00008                      (R-)
///               %unsigned 32 data                      0x0
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      12B, bits:      43b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_RNG
#define h_RNG (){}

    #define     BA_RNG_rate                                    0x0000
    #define     B16RNG_rate                                    0x0000
    #define   LSb32RNG_rate                                       0
    #define   LSb16RNG_rate                                       0
    #define       bRNG_rate                                    8
    #define   MSK32RNG_rate                                       0x000000FF

    #define     BA_RNG_crc                                     0x0001
    #define     B16RNG_crc                                     0x0000
    #define   LSb32RNG_crc                                        8
    #define   LSb16RNG_crc                                        8
    #define       bRNG_crc                                     1
    #define   MSK32RNG_crc                                        0x00000100

    #define     BA_RNG_oscEnb                                  0x0001
    #define     B16RNG_oscEnb                                  0x0000
    #define   LSb32RNG_oscEnb                                     9
    #define   LSb16RNG_oscEnb                                     9
    #define       bRNG_oscEnb                                  1
    #define   MSK32RNG_oscEnb                                     0x00000200
    ///////////////////////////////////////////////////////////

    #define     BA_RNG_ready                                   0x0004
    #define     B16RNG_ready                                   0x0004
    #define   LSb32RNG_ready                                      0
    #define   LSb16RNG_ready                                      0
    #define       bRNG_ready                                   1
    #define   MSK32RNG_ready                                      0x00000001
    ///////////////////////////////////////////////////////////

    #define     BA_RNG_data                                    0x0008
    #define     B16RNG_data                                    0x0008
    #define   LSb32RNG_data                                       0
    #define   LSb16RNG_data                                       0
    #define       bRNG_data                                    32
    #define   MSK32RNG_data                                       0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_RNG {
    ///////////////////////////////////////////////////////////
    #define   GET32RNG_rate(r32)                               _BFGET_(r32, 7, 0)
    #define   SET32RNG_rate(r32,v)                             _BFSET_(r32, 7, 0,v)
    #define   GET16RNG_rate(r16)                               _BFGET_(r16, 7, 0)
    #define   SET16RNG_rate(r16,v)                             _BFSET_(r16, 7, 0,v)

    #define   GET32RNG_crc(r32)                                _BFGET_(r32, 8, 8)
    #define   SET32RNG_crc(r32,v)                              _BFSET_(r32, 8, 8,v)
    #define   GET16RNG_crc(r16)                                _BFGET_(r16, 8, 8)
    #define   SET16RNG_crc(r16,v)                              _BFSET_(r16, 8, 8,v)

    #define   GET32RNG_oscEnb(r32)                             _BFGET_(r32, 9, 9)
    #define   SET32RNG_oscEnb(r32,v)                           _BFSET_(r32, 9, 9,v)
    #define   GET16RNG_oscEnb(r16)                             _BFGET_(r16, 9, 9)
    #define   SET16RNG_oscEnb(r16,v)                           _BFSET_(r16, 9, 9,v)

            UNSG32 u_rate                                      :  8;
            UNSG32 u_crc                                       :  1;
            UNSG32 u_oscEnb                                    :  1;
            UNSG32 RSVDx0_b10                                  : 22;
    ///////////////////////////////////////////////////////////
    #define   GET32RNG_ready(r32)                              _BFGET_(r32, 0, 0)
    #define   SET32RNG_ready(r32,v)                            _BFSET_(r32, 0, 0,v)
    #define   GET16RNG_ready(r16)                              _BFGET_(r16, 0, 0)
    #define   SET16RNG_ready(r16,v)                            _BFSET_(r16, 0, 0,v)

            UNSG32 u_ready                                     :  1;
            UNSG32 RSVDx4_b1                                   : 31;
    ///////////////////////////////////////////////////////////
    #define   GET32RNG_data(r32)                               _BFGET_(r32,31, 0)
    #define   SET32RNG_data(r32,v)                             _BFSET_(r32,31, 0,v)

            UNSG32 u_data                                      : 32;
    ///////////////////////////////////////////////////////////
    } SIE_RNG;

    ///////////////////////////////////////////////////////////
     SIGN32 RNG_drvrd(SIE_RNG *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 RNG_drvwr(SIE_RNG *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void RNG_reset(SIE_RNG *p);
     SIGN32 RNG_cmp  (SIE_RNG *p, SIE_RNG *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define RNG_check(p,pie,pfx,hLOG) RNG_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define RNG_print(p,    pfx,hLOG) RNG_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: RNG
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SECHF_ENTRY                              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P-)
///               %unsigned 2  flag                      0x0
///                                    : DISABLED                  0x0
///                                                 ###
///                                                 * This entry is disabled
///                                                 ###
///                                    : RO                        0x1
///                                                 ###
///                                                 * The entry indicate a BIU register space range which is ready only for ARM
///                                                 ###
///                                    : WO                        0x2
///                                                 ###
///                                                 * The entry indicate a BIU register space range which is write only for ARM
///                                                 ###
///                                    : RW                        0x3
///                                                 ###
///                                                 * The entry indicate a BIU register space range which can be read and written by ARM
///                                                 ###
///               %unsigned 14 reserved                  
///                                    ###
///                                    * Reserved bits
///                                    ###
///               %unsigned 16 regSize                   0x0
///                                    ###
///                                    * The size of the register spaces   in bytes to be configured
///                                    ###
///     @ 0x00004                      (RW-)
///               %unsigned 32 regAddr                   0x0
///                                    ###
///                                    * Start offset of the register spaces within the secure processor BIU to be configured
///                                    * 0
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       8B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SECHF_ENTRY
#define h_SECHF_ENTRY (){}

    #define     BA_SECHF_ENTRY_flag                            0x0000
    #define     B16SECHF_ENTRY_flag                            0x0000
    #define   LSb32SECHF_ENTRY_flag                               0
    #define   LSb16SECHF_ENTRY_flag                               0
    #define       bSECHF_ENTRY_flag                            2
    #define   MSK32SECHF_ENTRY_flag                               0x00000003
    #define        SECHF_ENTRY_flag_DISABLED                                0x0
    #define        SECHF_ENTRY_flag_RO                                      0x1
    #define        SECHF_ENTRY_flag_WO                                      0x2
    #define        SECHF_ENTRY_flag_RW                                      0x3

    #define     BA_SECHF_ENTRY_reserved                        0x0000
    #define     B16SECHF_ENTRY_reserved                        0x0000
    #define   LSb32SECHF_ENTRY_reserved                           2
    #define   LSb16SECHF_ENTRY_reserved                           2
    #define       bSECHF_ENTRY_reserved                        14
    #define   MSK32SECHF_ENTRY_reserved                           0x0000FFFC

    #define     BA_SECHF_ENTRY_regSize                         0x0002
    #define     B16SECHF_ENTRY_regSize                         0x0002
    #define   LSb32SECHF_ENTRY_regSize                            16
    #define   LSb16SECHF_ENTRY_regSize                            0
    #define       bSECHF_ENTRY_regSize                         16
    #define   MSK32SECHF_ENTRY_regSize                            0xFFFF0000
    ///////////////////////////////////////////////////////////

    #define     BA_SECHF_ENTRY_regAddr                         0x0004
    #define     B16SECHF_ENTRY_regAddr                         0x0004
    #define   LSb32SECHF_ENTRY_regAddr                            0
    #define   LSb16SECHF_ENTRY_regAddr                            0
    #define       bSECHF_ENTRY_regAddr                         32
    #define   MSK32SECHF_ENTRY_regAddr                            0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SECHF_ENTRY {
    ///////////////////////////////////////////////////////////
    #define   GET32SECHF_ENTRY_flag(r32)                       _BFGET_(r32, 1, 0)
    #define   SET32SECHF_ENTRY_flag(r32,v)                     _BFSET_(r32, 1, 0,v)
    #define   GET16SECHF_ENTRY_flag(r16)                       _BFGET_(r16, 1, 0)
    #define   SET16SECHF_ENTRY_flag(r16,v)                     _BFSET_(r16, 1, 0,v)

    #define   GET32SECHF_ENTRY_reserved(r32)                   _BFGET_(r32,15, 2)
    #define   SET32SECHF_ENTRY_reserved(r32,v)                 _BFSET_(r32,15, 2,v)
    #define   GET16SECHF_ENTRY_reserved(r16)                   _BFGET_(r16,15, 2)
    #define   SET16SECHF_ENTRY_reserved(r16,v)                 _BFSET_(r16,15, 2,v)

    #define   GET32SECHF_ENTRY_regSize(r32)                    _BFGET_(r32,31,16)
    #define   SET32SECHF_ENTRY_regSize(r32,v)                  _BFSET_(r32,31,16,v)
    #define   GET16SECHF_ENTRY_regSize(r16)                    _BFGET_(r16,15, 0)
    #define   SET16SECHF_ENTRY_regSize(r16,v)                  _BFSET_(r16,15, 0,v)

            UNSG32 u_flag                                      :  2;
            UNSG32 u_reserved                                  : 14;
            UNSG32 u_regSize                                   : 16;
    ///////////////////////////////////////////////////////////
    #define   GET32SECHF_ENTRY_regAddr(r32)                    _BFGET_(r32,31, 0)
    #define   SET32SECHF_ENTRY_regAddr(r32,v)                  _BFSET_(r32,31, 0,v)

            UNSG32 u_regAddr                                   : 32;
    ///////////////////////////////////////////////////////////
    } SIE_SECHF_ENTRY;

    ///////////////////////////////////////////////////////////
     SIGN32 SECHF_ENTRY_drvrd(SIE_SECHF_ENTRY *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SECHF_ENTRY_drvwr(SIE_SECHF_ENTRY *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SECHF_ENTRY_reset(SIE_SECHF_ENTRY *p);
     SIGN32 SECHF_ENTRY_cmp  (SIE_SECHF_ENTRY *p, SIE_SECHF_ENTRY *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SECHF_ENTRY_check(p,pie,pfx,hLOG) SECHF_ENTRY_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SECHF_ENTRY_print(p,    pfx,hLOG) SECHF_ENTRY_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SECHF_ENTRY
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SECHF                   biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 secEntries           
///               $SECHF_ENTRY         secEntries        REG       [8]
///                                    ###
///                                    * The entries to define accessible range of the secure processor of the BIU
///                                    ###
///     @ 0x00040                      (RW)
///               %unsigned 32 counter                   0x0
///                                    ###
///                                    * Number of times that the firewall successfully block the illegal access from AHB.
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      68B, bits:     544b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SECHF
#define h_SECHF (){}

    #define     RA_SECHF_secEntries                            0x0000
    ///////////////////////////////////////////////////////////

    #define     BA_SECHF_counter                               0x0040
    #define     B16SECHF_counter                               0x0040
    #define   LSb32SECHF_counter                                  0
    #define   LSb16SECHF_counter                                  0
    #define       bSECHF_counter                               32
    #define   MSK32SECHF_counter                                  0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SECHF {
    ///////////////////////////////////////////////////////////
              SIE_SECHF_ENTRY                                  ie_secEntries[8];
    ///////////////////////////////////////////////////////////
    #define   GET32SECHF_counter(r32)                          _BFGET_(r32,31, 0)
    #define   SET32SECHF_counter(r32,v)                        _BFSET_(r32,31, 0,v)

            UNSG32 u_counter                                   : 32;
    ///////////////////////////////////////////////////////////
    } SIE_SECHF;

    ///////////////////////////////////////////////////////////
     SIGN32 SECHF_drvrd(SIE_SECHF *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SECHF_drvwr(SIE_SECHF *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SECHF_reset(SIE_SECHF *p);
     SIGN32 SECHF_cmp  (SIE_SECHF *p, SIE_SECHF *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SECHF_check(p,pie,pfx,hLOG) SECHF_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SECHF_print(p,    pfx,hLOG) SECHF_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SECHF
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE JTAGCTL                 biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (RW-)
///               %unsigned 3  EN                        0x0
///                                    ###
///                                    * 0 to disable Jtag
///                                    * 1 to enable Jtag
///                                    * EN[0] is used to control cpu0
///                                    * EN[1] is used to control cpu1
///                                    * EN[2] is used to control VPRO
///                                    ###
///               %%        29         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       3b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_JTAGCTL
#define h_JTAGCTL (){}

    #define     BA_JTAGCTL_EN                                  0x0000
    #define     B16JTAGCTL_EN                                  0x0000
    #define   LSb32JTAGCTL_EN                                     0
    #define   LSb16JTAGCTL_EN                                     0
    #define       bJTAGCTL_EN                                  3
    #define   MSK32JTAGCTL_EN                                     0x00000007
    ///////////////////////////////////////////////////////////

    typedef struct SIE_JTAGCTL {
    ///////////////////////////////////////////////////////////
    #define   GET32JTAGCTL_EN(r32)                             _BFGET_(r32, 2, 0)
    #define   SET32JTAGCTL_EN(r32,v)                           _BFSET_(r32, 2, 0,v)
    #define   GET16JTAGCTL_EN(r16)                             _BFGET_(r16, 2, 0)
    #define   SET16JTAGCTL_EN(r16,v)                           _BFSET_(r16, 2, 0,v)

            UNSG32 u_EN                                        :  3;
            UNSG32 RSVDx0_b3                                   : 29;
    ///////////////////////////////////////////////////////////
    } SIE_JTAGCTL;

    ///////////////////////////////////////////////////////////
     SIGN32 JTAGCTL_drvrd(SIE_JTAGCTL *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 JTAGCTL_drvwr(SIE_JTAGCTL *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void JTAGCTL_reset(SIE_JTAGCTL *p);
     SIGN32 JTAGCTL_cmp  (SIE_JTAGCTL *p, SIE_JTAGCTL *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define JTAGCTL_check(p,pie,pfx,hLOG) JTAGCTL_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define JTAGCTL_print(p,    pfx,hLOG) JTAGCTL_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: JTAGCTL
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE SECSTATUS               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 CFG                  (RW-)
///               %unsigned 2  flag                      0x0
///                                    : DISABLED                  0x0
///                                                 ###
///                                                 * The secure processor is not valid so far
///                                                 ###
///                                    : ENABLED                   0x1
///                                                 ###
///                                                 * The secure processor is valid now
///                                                 ###
///                                    : FAILED                    0x2
///                                                 ###
///                                                 * The secure processor failed to check the hardware status. The error code is given by errCode. Whenever this flag is specified by 'FAILED', a fatal hardware defection is detected by FIGO. All the BIU firewall will be disabled by ARM.
///                                                 ###
///               %unsigned 14 Reserved                  
///               %unsigned 16 errCode                   
///                                    ###
///                                    * If flag is FAILED, this field will indicate the error NO
///                                    ###
///     @ 0x00004 SECLEV               (RW-)
///               %unsigned 1  en                        0x0
///                                    ###
///                                    * Flag to indicate whether the security level bits are available or not.
///                                    ###
///               %unsigned 15 dat                       0x0
///                                    ###
///                                    * Current security level bits specified by ARM
///                                    ###
///               %%        16         # Stuffing bits...
///     @ 0x00008 ENG_EN               (R-)
///               %unsigned 1  en                        
///                                    ###
///                                    * Flag to indicate that this is a testing chip and the firewall is always off.
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0000C OTPCRC               (RW-)
///               %unsigned 32 region0                   0x1234567
///                                    ###
///                                    * CRC result of OPT content in region 0
///                                    ###
///     # 0x00010 OTPCRC1              
///               %unsigned 32 region1                   0x89ABCDEF
///                                    ###
///                                    * CRC result of OPT content in region 1
///                                    ###
///     @ 0x00014 OTPINFO              (RW-)
///               ###
///               * Generic registers used to store OTP unsecured information.
///               ###
///               %unsigned 32 DW0                       0xA0000000
///     # 0x00018 OTPINFO1             
///               %unsigned 32 DW1                       0xA0000004
///     # 0x0001C OTPINFO2             
///               %unsigned 32 DW2                       0xA0000008
///     # 0x00020 OTPINFO3             
///               %unsigned 32 DW3                       0xA000000C
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      36B, bits:     241b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_SECSTATUS
#define h_SECSTATUS (){}

    #define     RA_SECSTATUS_CFG                               0x0000

    #define     BA_SECSTATUS_CFG_flag                          0x0000
    #define     B16SECSTATUS_CFG_flag                          0x0000
    #define   LSb32SECSTATUS_CFG_flag                             0
    #define   LSb16SECSTATUS_CFG_flag                             0
    #define       bSECSTATUS_CFG_flag                          2
    #define   MSK32SECSTATUS_CFG_flag                             0x00000003
    #define        SECSTATUS_CFG_flag_DISABLED                              0x0
    #define        SECSTATUS_CFG_flag_ENABLED                               0x1
    #define        SECSTATUS_CFG_flag_FAILED                                0x2

    #define     BA_SECSTATUS_CFG_Reserved                      0x0000
    #define     B16SECSTATUS_CFG_Reserved                      0x0000
    #define   LSb32SECSTATUS_CFG_Reserved                         2
    #define   LSb16SECSTATUS_CFG_Reserved                         2
    #define       bSECSTATUS_CFG_Reserved                      14
    #define   MSK32SECSTATUS_CFG_Reserved                         0x0000FFFC

    #define     BA_SECSTATUS_CFG_errCode                       0x0002
    #define     B16SECSTATUS_CFG_errCode                       0x0002
    #define   LSb32SECSTATUS_CFG_errCode                          16
    #define   LSb16SECSTATUS_CFG_errCode                          0
    #define       bSECSTATUS_CFG_errCode                       16
    #define   MSK32SECSTATUS_CFG_errCode                          0xFFFF0000
    ///////////////////////////////////////////////////////////
    #define     RA_SECSTATUS_SECLEV                            0x0004

    #define     BA_SECSTATUS_SECLEV_en                         0x0004
    #define     B16SECSTATUS_SECLEV_en                         0x0004
    #define   LSb32SECSTATUS_SECLEV_en                            0
    #define   LSb16SECSTATUS_SECLEV_en                            0
    #define       bSECSTATUS_SECLEV_en                         1
    #define   MSK32SECSTATUS_SECLEV_en                            0x00000001

    #define     BA_SECSTATUS_SECLEV_dat                        0x0004
    #define     B16SECSTATUS_SECLEV_dat                        0x0004
    #define   LSb32SECSTATUS_SECLEV_dat                           1
    #define   LSb16SECSTATUS_SECLEV_dat                           1
    #define       bSECSTATUS_SECLEV_dat                        15
    #define   MSK32SECSTATUS_SECLEV_dat                           0x0000FFFE
    ///////////////////////////////////////////////////////////
    #define     RA_SECSTATUS_ENG_EN                            0x0008

    #define     BA_SECSTATUS_ENG_EN_en                         0x0008
    #define     B16SECSTATUS_ENG_EN_en                         0x0008
    #define   LSb32SECSTATUS_ENG_EN_en                            0
    #define   LSb16SECSTATUS_ENG_EN_en                            0
    #define       bSECSTATUS_ENG_EN_en                         1
    #define   MSK32SECSTATUS_ENG_EN_en                            0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_SECSTATUS_OTPCRC                            0x000C

    #define     BA_SECSTATUS_OTPCRC_region0                    0x000C
    #define     B16SECSTATUS_OTPCRC_region0                    0x000C
    #define   LSb32SECSTATUS_OTPCRC_region0                       0
    #define   LSb16SECSTATUS_OTPCRC_region0                       0
    #define       bSECSTATUS_OTPCRC_region0                    32
    #define   MSK32SECSTATUS_OTPCRC_region0                       0xFFFFFFFF

    #define     RA_SECSTATUS_OTPCRC1                           0x0010

    #define     BA_SECSTATUS_OTPCRC_region1                    0x0010
    #define     B16SECSTATUS_OTPCRC_region1                    0x0010
    #define   LSb32SECSTATUS_OTPCRC_region1                       0
    #define   LSb16SECSTATUS_OTPCRC_region1                       0
    #define       bSECSTATUS_OTPCRC_region1                    32
    #define   MSK32SECSTATUS_OTPCRC_region1                       0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_SECSTATUS_OTPINFO                           0x0014

    #define     BA_SECSTATUS_OTPINFO_DW0                       0x0014
    #define     B16SECSTATUS_OTPINFO_DW0                       0x0014
    #define   LSb32SECSTATUS_OTPINFO_DW0                          0
    #define   LSb16SECSTATUS_OTPINFO_DW0                          0
    #define       bSECSTATUS_OTPINFO_DW0                       32
    #define   MSK32SECSTATUS_OTPINFO_DW0                          0xFFFFFFFF

    #define     RA_SECSTATUS_OTPINFO1                          0x0018

    #define     BA_SECSTATUS_OTPINFO_DW1                       0x0018
    #define     B16SECSTATUS_OTPINFO_DW1                       0x0018
    #define   LSb32SECSTATUS_OTPINFO_DW1                          0
    #define   LSb16SECSTATUS_OTPINFO_DW1                          0
    #define       bSECSTATUS_OTPINFO_DW1                       32
    #define   MSK32SECSTATUS_OTPINFO_DW1                          0xFFFFFFFF

    #define     RA_SECSTATUS_OTPINFO2                          0x001C

    #define     BA_SECSTATUS_OTPINFO_DW2                       0x001C
    #define     B16SECSTATUS_OTPINFO_DW2                       0x001C
    #define   LSb32SECSTATUS_OTPINFO_DW2                          0
    #define   LSb16SECSTATUS_OTPINFO_DW2                          0
    #define       bSECSTATUS_OTPINFO_DW2                       32
    #define   MSK32SECSTATUS_OTPINFO_DW2                          0xFFFFFFFF

    #define     RA_SECSTATUS_OTPINFO3                          0x0020

    #define     BA_SECSTATUS_OTPINFO_DW3                       0x0020
    #define     B16SECSTATUS_OTPINFO_DW3                       0x0020
    #define   LSb32SECSTATUS_OTPINFO_DW3                          0
    #define   LSb16SECSTATUS_OTPINFO_DW3                          0
    #define       bSECSTATUS_OTPINFO_DW3                       32
    #define   MSK32SECSTATUS_OTPINFO_DW3                          0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_SECSTATUS {
    ///////////////////////////////////////////////////////////
    #define   GET32SECSTATUS_CFG_flag(r32)                     _BFGET_(r32, 1, 0)
    #define   SET32SECSTATUS_CFG_flag(r32,v)                   _BFSET_(r32, 1, 0,v)
    #define   GET16SECSTATUS_CFG_flag(r16)                     _BFGET_(r16, 1, 0)
    #define   SET16SECSTATUS_CFG_flag(r16,v)                   _BFSET_(r16, 1, 0,v)

    #define   GET32SECSTATUS_CFG_Reserved(r32)                 _BFGET_(r32,15, 2)
    #define   SET32SECSTATUS_CFG_Reserved(r32,v)               _BFSET_(r32,15, 2,v)
    #define   GET16SECSTATUS_CFG_Reserved(r16)                 _BFGET_(r16,15, 2)
    #define   SET16SECSTATUS_CFG_Reserved(r16,v)               _BFSET_(r16,15, 2,v)

    #define   GET32SECSTATUS_CFG_errCode(r32)                  _BFGET_(r32,31,16)
    #define   SET32SECSTATUS_CFG_errCode(r32,v)                _BFSET_(r32,31,16,v)
    #define   GET16SECSTATUS_CFG_errCode(r16)                  _BFGET_(r16,15, 0)
    #define   SET16SECSTATUS_CFG_errCode(r16,v)                _BFSET_(r16,15, 0,v)

    #define     w32SECSTATUS_CFG                               {\
            UNSG32 uCFG_flag                                   :  2;\
            UNSG32 uCFG_Reserved                               : 14;\
            UNSG32 uCFG_errCode                                : 16;\
          }
    union { UNSG32 u32SECSTATUS_CFG;
            struct w32SECSTATUS_CFG;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SECSTATUS_SECLEV_en(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32SECSTATUS_SECLEV_en(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16SECSTATUS_SECLEV_en(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SECSTATUS_SECLEV_en(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define   GET32SECSTATUS_SECLEV_dat(r32)                   _BFGET_(r32,15, 1)
    #define   SET32SECSTATUS_SECLEV_dat(r32,v)                 _BFSET_(r32,15, 1,v)
    #define   GET16SECSTATUS_SECLEV_dat(r16)                   _BFGET_(r16,15, 1)
    #define   SET16SECSTATUS_SECLEV_dat(r16,v)                 _BFSET_(r16,15, 1,v)

    #define     w32SECSTATUS_SECLEV                            {\
            UNSG32 uSECLEV_en                                  :  1;\
            UNSG32 uSECLEV_dat                                 : 15;\
            UNSG32 RSVDx4_b16                                  : 16;\
          }
    union { UNSG32 u32SECSTATUS_SECLEV;
            struct w32SECSTATUS_SECLEV;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SECSTATUS_ENG_EN_en(r32)                    _BFGET_(r32, 0, 0)
    #define   SET32SECSTATUS_ENG_EN_en(r32,v)                  _BFSET_(r32, 0, 0,v)
    #define   GET16SECSTATUS_ENG_EN_en(r16)                    _BFGET_(r16, 0, 0)
    #define   SET16SECSTATUS_ENG_EN_en(r16,v)                  _BFSET_(r16, 0, 0,v)

    #define     w32SECSTATUS_ENG_EN                            {\
            UNSG32 uENG_EN_en                                  :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32SECSTATUS_ENG_EN;
            struct w32SECSTATUS_ENG_EN;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SECSTATUS_OTPCRC_region0(r32)               _BFGET_(r32,31, 0)
    #define   SET32SECSTATUS_OTPCRC_region0(r32,v)             _BFSET_(r32,31, 0,v)

    #define     w32SECSTATUS_OTPCRC                            {\
            UNSG32 uOTPCRC_region0                             : 32;\
          }
    union { UNSG32 u32SECSTATUS_OTPCRC;
            struct w32SECSTATUS_OTPCRC;
          };
    #define   GET32SECSTATUS_OTPCRC_region1(r32)               _BFGET_(r32,31, 0)
    #define   SET32SECSTATUS_OTPCRC_region1(r32,v)             _BFSET_(r32,31, 0,v)

    #define     w32SECSTATUS_OTPCRC1                           {\
            UNSG32 uOTPCRC_region1                             : 32;\
          }
    union { UNSG32 u32SECSTATUS_OTPCRC1;
            struct w32SECSTATUS_OTPCRC1;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32SECSTATUS_OTPINFO_DW0(r32)                  _BFGET_(r32,31, 0)
    #define   SET32SECSTATUS_OTPINFO_DW0(r32,v)                _BFSET_(r32,31, 0,v)

    #define     w32SECSTATUS_OTPINFO                           {\
            UNSG32 uOTPINFO_DW0                                : 32;\
          }
    union { UNSG32 u32SECSTATUS_OTPINFO;
            struct w32SECSTATUS_OTPINFO;
          };
    #define   GET32SECSTATUS_OTPINFO_DW1(r32)                  _BFGET_(r32,31, 0)
    #define   SET32SECSTATUS_OTPINFO_DW1(r32,v)                _BFSET_(r32,31, 0,v)

    #define     w32SECSTATUS_OTPINFO1                          {\
            UNSG32 uOTPINFO_DW1                                : 32;\
          }
    union { UNSG32 u32SECSTATUS_OTPINFO1;
            struct w32SECSTATUS_OTPINFO1;
          };
    #define   GET32SECSTATUS_OTPINFO_DW2(r32)                  _BFGET_(r32,31, 0)
    #define   SET32SECSTATUS_OTPINFO_DW2(r32,v)                _BFSET_(r32,31, 0,v)

    #define     w32SECSTATUS_OTPINFO2                          {\
            UNSG32 uOTPINFO_DW2                                : 32;\
          }
    union { UNSG32 u32SECSTATUS_OTPINFO2;
            struct w32SECSTATUS_OTPINFO2;
          };
    #define   GET32SECSTATUS_OTPINFO_DW3(r32)                  _BFGET_(r32,31, 0)
    #define   SET32SECSTATUS_OTPINFO_DW3(r32,v)                _BFSET_(r32,31, 0,v)

    #define     w32SECSTATUS_OTPINFO3                          {\
            UNSG32 uOTPINFO_DW3                                : 32;\
          }
    union { UNSG32 u32SECSTATUS_OTPINFO3;
            struct w32SECSTATUS_OTPINFO3;
          };
    ///////////////////////////////////////////////////////////
    } SIE_SECSTATUS;

    typedef union  T32SECSTATUS_CFG
          { UNSG32 u32;
            struct w32SECSTATUS_CFG;
                 } T32SECSTATUS_CFG;
    typedef union  T32SECSTATUS_SECLEV
          { UNSG32 u32;
            struct w32SECSTATUS_SECLEV;
                 } T32SECSTATUS_SECLEV;
    typedef union  T32SECSTATUS_ENG_EN
          { UNSG32 u32;
            struct w32SECSTATUS_ENG_EN;
                 } T32SECSTATUS_ENG_EN;
    typedef union  T32SECSTATUS_OTPCRC
          { UNSG32 u32;
            struct w32SECSTATUS_OTPCRC;
                 } T32SECSTATUS_OTPCRC;
    typedef union  T32SECSTATUS_OTPCRC1
          { UNSG32 u32;
            struct w32SECSTATUS_OTPCRC1;
                 } T32SECSTATUS_OTPCRC1;
    typedef union  T32SECSTATUS_OTPINFO
          { UNSG32 u32;
            struct w32SECSTATUS_OTPINFO;
                 } T32SECSTATUS_OTPINFO;
    typedef union  T32SECSTATUS_OTPINFO1
          { UNSG32 u32;
            struct w32SECSTATUS_OTPINFO1;
                 } T32SECSTATUS_OTPINFO1;
    typedef union  T32SECSTATUS_OTPINFO2
          { UNSG32 u32;
            struct w32SECSTATUS_OTPINFO2;
                 } T32SECSTATUS_OTPINFO2;
    typedef union  T32SECSTATUS_OTPINFO3
          { UNSG32 u32;
            struct w32SECSTATUS_OTPINFO3;
                 } T32SECSTATUS_OTPINFO3;
    ///////////////////////////////////////////////////////////

    typedef union  TSECSTATUS_CFG
          { UNSG32 u32[1];
            struct {
            struct w32SECSTATUS_CFG;
                   };
                 } TSECSTATUS_CFG;
    typedef union  TSECSTATUS_SECLEV
          { UNSG32 u32[1];
            struct {
            struct w32SECSTATUS_SECLEV;
                   };
                 } TSECSTATUS_SECLEV;
    typedef union  TSECSTATUS_ENG_EN
          { UNSG32 u32[1];
            struct {
            struct w32SECSTATUS_ENG_EN;
                   };
                 } TSECSTATUS_ENG_EN;
    typedef union  TSECSTATUS_OTPCRC
          { UNSG32 u32[2];
            struct {
            struct w32SECSTATUS_OTPCRC;
            struct w32SECSTATUS_OTPCRC1;
                   };
                 } TSECSTATUS_OTPCRC;
    typedef union  TSECSTATUS_OTPINFO
          { UNSG32 u32[4];
            struct {
            struct w32SECSTATUS_OTPINFO;
            struct w32SECSTATUS_OTPINFO1;
            struct w32SECSTATUS_OTPINFO2;
            struct w32SECSTATUS_OTPINFO3;
                   };
                 } TSECSTATUS_OTPINFO;

    ///////////////////////////////////////////////////////////
     SIGN32 SECSTATUS_drvrd(SIE_SECSTATUS *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 SECSTATUS_drvwr(SIE_SECSTATUS *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void SECSTATUS_reset(SIE_SECSTATUS *p);
     SIGN32 SECSTATUS_cmp  (SIE_SECSTATUS *p, SIE_SECSTATUS *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define SECSTATUS_check(p,pie,pfx,hLOG) SECSTATUS_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define SECSTATUS_print(p,    pfx,hLOG) SECSTATUS_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: SECSTATUS
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DRMA64CTL               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 1  s0selLUT                  0x0
///                                    ###
///                                    * 0: RF, 1: {LUT1:LUT0}
///                                    ###
///               %unsigned 1  s1selLUT                  0x0
///                                    ###
///                                    * 0:RF, 1: LUT
///                                    ###
///               %unsigned 2  s1LUTsrc                  
///                                    ###
///                                    * select 1 of 4 LUT data
///                                    * 0: {LUT1,0}
///                                    * 1:{LUT0,1}
///                                    * 2:{LUT3,2}
///                                    * 3:{LUT2,3}
///                                    ###
///               %unsigned 8  OPC                       0x0
///                                    : RESERVED                  0x0
///                                    : XORQ                      0x1
///                                    : ORQ                       0x2
///                                    : ANDQ                      0x3
///                                    : PUNPCKL8                  0x4
///                                    : PUNPCKH8                  0x5
///                                    : SWPQ32                    0x6
///                                    : ROLQ32_1                  0x7
///                                    : ROLQ32_2                  0x8
///                                    : DESIP                     0x9
///                                    : DESKIP                    0xA
///                                    : DESDFIP                   0xB
///                                    : DESKP                     0xC
///                                    : XORDESDP                  0xD
///                                    : LSRXORQ32_1               0xE
///                                    : LSRXORQ32_3               0xF
///                                    : ROLXORQ32_8              0x10
///                                    : PUNPCKH16                0x11
///                                    : PUNPCKL32                0x12
///                                    : PUNPCKH32                0x13
///                                    : ROLXORQ32_9              0x14
///                                    : ROLXORQ32_16             0x15
///                                    : ROLXORQ32_22             0x16
///                                    : ROLXORQ32_30             0x17
///                                    : LSRXORQ32_7              0x18
///                                    : LSRXORQ32_8              0x19
///                                    : RORQ28_1                 0x1A
///                                    : RORQ28_2                 0x1B
///                                    : RORQ56_17                0x1C
///                                    : ROLQ32_3                 0x1D
///                                    : ROLXORQ32_4              0x1E
///                                    : SLQ32_24                 0x1F
///                                    : AESTS                    0x20
///                                    : ROLQ32_5                 0x21
///                                    : MP2CRC                   0x22
///                                                 ###
///                                                 * MPEG-2 CRC, generation function:
///                                                 * x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 +x5 +x4 +x2 +x +1
///                                                 ###
///                                    : ROLQ32_30                0x23
///                                    : C2PERM                   0x24
///                                    : ADDQ32                   0x25
///                                    : SUBQ32                   0x26
///                                    : MULQ32L                  0x27
///                                    : MULQ32H                  0x28
///                                    : ADDQ64C1                 0x29
///                                    : SUBQ64C1                 0x2A
///                                    : ADDQ64C2                 0x2B
///                                    : SUBQ64C2                 0x2C
///                                    : PLUTXOR32H               0x48
///                                    : PLUTXOR32L               0x40
///                                    : LUTXOR32_0               0x41
///                                    : LUTXOR32_1               0x42
///                                    : LUTXOR32_2               0x43
///                                    : LUTXOR32_3               0x44
///               %unsigned 8  latency                   0x0
///                                    ###
///                                    * latency of current instruction
///                                    ###
///               %unsigned 1  WB                        0x0
///                                    ###
///                                    * write back enable
///                                    ###
///               %unsigned 1  LUTASelP16                0x0
///                                    ###
///                                    * 0: from S1
///                                    * 1: from p16
///                                    ###
///               %unsigned 4  LUTWE                     0x0
///                                    ###
///                                    * write enable for LUT
///                                    ###
///               %unsigned 3  MCPSEL                    0x0
///                                    ###
///                                    * selects which multi-cycle path for ALU64 Data
///                                    ###
///               %%        3          # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      29b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DRMA64CTL
#define h_DRMA64CTL (){}

    #define     BA_DRMA64CTL_s0selLUT                          0x0000
    #define     B16DRMA64CTL_s0selLUT                          0x0000
    #define   LSb32DRMA64CTL_s0selLUT                             0
    #define   LSb16DRMA64CTL_s0selLUT                             0
    #define       bDRMA64CTL_s0selLUT                          1
    #define   MSK32DRMA64CTL_s0selLUT                             0x00000001

    #define     BA_DRMA64CTL_s1selLUT                          0x0000
    #define     B16DRMA64CTL_s1selLUT                          0x0000
    #define   LSb32DRMA64CTL_s1selLUT                             1
    #define   LSb16DRMA64CTL_s1selLUT                             1
    #define       bDRMA64CTL_s1selLUT                          1
    #define   MSK32DRMA64CTL_s1selLUT                             0x00000002

    #define     BA_DRMA64CTL_s1LUTsrc                          0x0000
    #define     B16DRMA64CTL_s1LUTsrc                          0x0000
    #define   LSb32DRMA64CTL_s1LUTsrc                             2
    #define   LSb16DRMA64CTL_s1LUTsrc                             2
    #define       bDRMA64CTL_s1LUTsrc                          2
    #define   MSK32DRMA64CTL_s1LUTsrc                             0x0000000C

    #define     BA_DRMA64CTL_OPC                               0x0000
    #define     B16DRMA64CTL_OPC                               0x0000
    #define   LSb32DRMA64CTL_OPC                                  4
    #define   LSb16DRMA64CTL_OPC                                  4
    #define       bDRMA64CTL_OPC                               8
    #define   MSK32DRMA64CTL_OPC                                  0x00000FF0
    #define        DRMA64CTL_OPC_RESERVED                                   0x0
    #define        DRMA64CTL_OPC_XORQ                                       0x1
    #define        DRMA64CTL_OPC_ORQ                                        0x2
    #define        DRMA64CTL_OPC_ANDQ                                       0x3
    #define        DRMA64CTL_OPC_PUNPCKL8                                   0x4
    #define        DRMA64CTL_OPC_PUNPCKH8                                   0x5
    #define        DRMA64CTL_OPC_SWPQ32                                     0x6
    #define        DRMA64CTL_OPC_ROLQ32_1                                   0x7
    #define        DRMA64CTL_OPC_ROLQ32_2                                   0x8
    #define        DRMA64CTL_OPC_DESIP                                      0x9
    #define        DRMA64CTL_OPC_DESKIP                                     0xA
    #define        DRMA64CTL_OPC_DESDFIP                                    0xB
    #define        DRMA64CTL_OPC_DESKP                                      0xC
    #define        DRMA64CTL_OPC_XORDESDP                                   0xD
    #define        DRMA64CTL_OPC_LSRXORQ32_1                                0xE
    #define        DRMA64CTL_OPC_LSRXORQ32_3                                0xF
    #define        DRMA64CTL_OPC_ROLXORQ32_8                                0x10
    #define        DRMA64CTL_OPC_PUNPCKH16                                  0x11
    #define        DRMA64CTL_OPC_PUNPCKL32                                  0x12
    #define        DRMA64CTL_OPC_PUNPCKH32                                  0x13
    #define        DRMA64CTL_OPC_ROLXORQ32_9                                0x14
    #define        DRMA64CTL_OPC_ROLXORQ32_16                               0x15
    #define        DRMA64CTL_OPC_ROLXORQ32_22                               0x16
    #define        DRMA64CTL_OPC_ROLXORQ32_30                               0x17
    #define        DRMA64CTL_OPC_LSRXORQ32_7                                0x18
    #define        DRMA64CTL_OPC_LSRXORQ32_8                                0x19
    #define        DRMA64CTL_OPC_RORQ28_1                                   0x1A
    #define        DRMA64CTL_OPC_RORQ28_2                                   0x1B
    #define        DRMA64CTL_OPC_RORQ56_17                                  0x1C
    #define        DRMA64CTL_OPC_ROLQ32_3                                   0x1D
    #define        DRMA64CTL_OPC_ROLXORQ32_4                                0x1E
    #define        DRMA64CTL_OPC_SLQ32_24                                   0x1F
    #define        DRMA64CTL_OPC_AESTS                                      0x20
    #define        DRMA64CTL_OPC_ROLQ32_5                                   0x21
    #define        DRMA64CTL_OPC_MP2CRC                                     0x22
    #define        DRMA64CTL_OPC_ROLQ32_30                                  0x23
    #define        DRMA64CTL_OPC_C2PERM                                     0x24
    #define        DRMA64CTL_OPC_ADDQ32                                     0x25
    #define        DRMA64CTL_OPC_SUBQ32                                     0x26
    #define        DRMA64CTL_OPC_MULQ32L                                    0x27
    #define        DRMA64CTL_OPC_MULQ32H                                    0x28
    #define        DRMA64CTL_OPC_ADDQ64C1                                   0x29
    #define        DRMA64CTL_OPC_SUBQ64C1                                   0x2A
    #define        DRMA64CTL_OPC_ADDQ64C2                                   0x2B
    #define        DRMA64CTL_OPC_SUBQ64C2                                   0x2C
    #define        DRMA64CTL_OPC_PLUTXOR32H                                 0x48
    #define        DRMA64CTL_OPC_PLUTXOR32L                                 0x40
    #define        DRMA64CTL_OPC_LUTXOR32_0                                 0x41
    #define        DRMA64CTL_OPC_LUTXOR32_1                                 0x42
    #define        DRMA64CTL_OPC_LUTXOR32_2                                 0x43
    #define        DRMA64CTL_OPC_LUTXOR32_3                                 0x44

    #define     BA_DRMA64CTL_latency                           0x0001
    #define     B16DRMA64CTL_latency                           0x0000
    #define   LSb32DRMA64CTL_latency                              12
    #define   LSb16DRMA64CTL_latency                              12
    #define       bDRMA64CTL_latency                           8
    #define   MSK32DRMA64CTL_latency                              0x000FF000

    #define     BA_DRMA64CTL_WB                                0x0002
    #define     B16DRMA64CTL_WB                                0x0002
    #define   LSb32DRMA64CTL_WB                                   20
    #define   LSb16DRMA64CTL_WB                                   4
    #define       bDRMA64CTL_WB                                1
    #define   MSK32DRMA64CTL_WB                                   0x00100000

    #define     BA_DRMA64CTL_LUTASelP16                        0x0002
    #define     B16DRMA64CTL_LUTASelP16                        0x0002
    #define   LSb32DRMA64CTL_LUTASelP16                           21
    #define   LSb16DRMA64CTL_LUTASelP16                           5
    #define       bDRMA64CTL_LUTASelP16                        1
    #define   MSK32DRMA64CTL_LUTASelP16                           0x00200000

    #define     BA_DRMA64CTL_LUTWE                             0x0002
    #define     B16DRMA64CTL_LUTWE                             0x0002
    #define   LSb32DRMA64CTL_LUTWE                                22
    #define   LSb16DRMA64CTL_LUTWE                                6
    #define       bDRMA64CTL_LUTWE                             4
    #define   MSK32DRMA64CTL_LUTWE                                0x03C00000

    #define     BA_DRMA64CTL_MCPSEL                            0x0003
    #define     B16DRMA64CTL_MCPSEL                            0x0002
    #define   LSb32DRMA64CTL_MCPSEL                               26
    #define   LSb16DRMA64CTL_MCPSEL                               10
    #define       bDRMA64CTL_MCPSEL                            3
    #define   MSK32DRMA64CTL_MCPSEL                               0x1C000000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DRMA64CTL {
    ///////////////////////////////////////////////////////////
    #define   GET32DRMA64CTL_s0selLUT(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32DRMA64CTL_s0selLUT(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16DRMA64CTL_s0selLUT(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16DRMA64CTL_s0selLUT(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define   GET32DRMA64CTL_s1selLUT(r32)                     _BFGET_(r32, 1, 1)
    #define   SET32DRMA64CTL_s1selLUT(r32,v)                   _BFSET_(r32, 1, 1,v)
    #define   GET16DRMA64CTL_s1selLUT(r16)                     _BFGET_(r16, 1, 1)
    #define   SET16DRMA64CTL_s1selLUT(r16,v)                   _BFSET_(r16, 1, 1,v)

    #define   GET32DRMA64CTL_s1LUTsrc(r32)                     _BFGET_(r32, 3, 2)
    #define   SET32DRMA64CTL_s1LUTsrc(r32,v)                   _BFSET_(r32, 3, 2,v)
    #define   GET16DRMA64CTL_s1LUTsrc(r16)                     _BFGET_(r16, 3, 2)
    #define   SET16DRMA64CTL_s1LUTsrc(r16,v)                   _BFSET_(r16, 3, 2,v)

    #define   GET32DRMA64CTL_OPC(r32)                          _BFGET_(r32,11, 4)
    #define   SET32DRMA64CTL_OPC(r32,v)                        _BFSET_(r32,11, 4,v)
    #define   GET16DRMA64CTL_OPC(r16)                          _BFGET_(r16,11, 4)
    #define   SET16DRMA64CTL_OPC(r16,v)                        _BFSET_(r16,11, 4,v)

    #define   GET32DRMA64CTL_latency(r32)                      _BFGET_(r32,19,12)
    #define   SET32DRMA64CTL_latency(r32,v)                    _BFSET_(r32,19,12,v)

    #define   GET32DRMA64CTL_WB(r32)                           _BFGET_(r32,20,20)
    #define   SET32DRMA64CTL_WB(r32,v)                         _BFSET_(r32,20,20,v)
    #define   GET16DRMA64CTL_WB(r16)                           _BFGET_(r16, 4, 4)
    #define   SET16DRMA64CTL_WB(r16,v)                         _BFSET_(r16, 4, 4,v)

    #define   GET32DRMA64CTL_LUTASelP16(r32)                   _BFGET_(r32,21,21)
    #define   SET32DRMA64CTL_LUTASelP16(r32,v)                 _BFSET_(r32,21,21,v)
    #define   GET16DRMA64CTL_LUTASelP16(r16)                   _BFGET_(r16, 5, 5)
    #define   SET16DRMA64CTL_LUTASelP16(r16,v)                 _BFSET_(r16, 5, 5,v)

    #define   GET32DRMA64CTL_LUTWE(r32)                        _BFGET_(r32,25,22)
    #define   SET32DRMA64CTL_LUTWE(r32,v)                      _BFSET_(r32,25,22,v)
    #define   GET16DRMA64CTL_LUTWE(r16)                        _BFGET_(r16, 9, 6)
    #define   SET16DRMA64CTL_LUTWE(r16,v)                      _BFSET_(r16, 9, 6,v)

    #define   GET32DRMA64CTL_MCPSEL(r32)                       _BFGET_(r32,28,26)
    #define   SET32DRMA64CTL_MCPSEL(r32,v)                     _BFSET_(r32,28,26,v)
    #define   GET16DRMA64CTL_MCPSEL(r16)                       _BFGET_(r16,12,10)
    #define   SET16DRMA64CTL_MCPSEL(r16,v)                     _BFSET_(r16,12,10,v)

            UNSG32 u_s0selLUT                                  :  1;
            UNSG32 u_s1selLUT                                  :  1;
            UNSG32 u_s1LUTsrc                                  :  2;
            UNSG32 u_OPC                                       :  8;
            UNSG32 u_latency                                   :  8;
            UNSG32 u_WB                                        :  1;
            UNSG32 u_LUTASelP16                                :  1;
            UNSG32 u_LUTWE                                     :  4;
            UNSG32 u_MCPSEL                                    :  3;
            UNSG32 RSVDx0_b29                                  :  3;
    ///////////////////////////////////////////////////////////
    } SIE_DRMA64CTL;

    ///////////////////////////////////////////////////////////
     SIGN32 DRMA64CTL_drvrd(SIE_DRMA64CTL *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DRMA64CTL_drvwr(SIE_DRMA64CTL *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DRMA64CTL_reset(SIE_DRMA64CTL *p);
     SIGN32 DRMA64CTL_cmp  (SIE_DRMA64CTL *p, SIE_DRMA64CTL *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DRMA64CTL_check(p,pie,pfx,hLOG) DRMA64CTL_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DRMA64CTL_print(p,    pfx,hLOG) DRMA64CTL_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DRMA64CTL
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE a64Par                  biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 4  s0                        0x0
///                                    ###
///                                    * address for source operand 0
///                                    * 4
///                                    * s1
///                                    * 0
///                                    * address for source operand 1
///                                    * 4
///                                    * s2
///                                    * 0
///                                    * for DRM A64 Instructions, operand2 is not used, this field is used for SIMD pipeline enable & table address base
///                                    * S2[1:0] = tableAddress[9:8];
///                                    * S2[3:2]=0: SIMD pipeline 1 enbled
///                                    * S2[3:2]=1: SIMD pipeline 2 enbled
///                                    * S2[3:2]=2: SIMD pipeline 3 enbled
///                                    * S2[3:2]=3: SIMD pipeline 4 enbled
///                                    * Currently only SIMP pipeline 1 and 2 are implemented
///                                    * 4
///                                    * d0
///                                    * 0
///                                    * address for destination operand 1
///                                    ###
///               %%        28         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       4b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_a64Par
#define h_a64Par (){}

    #define     BA_a64Par_s0                                   0x0000
    #define     B16a64Par_s0                                   0x0000
    #define   LSb32a64Par_s0                                      0
    #define   LSb16a64Par_s0                                      0
    #define       ba64Par_s0                                   4
    #define   MSK32a64Par_s0                                      0x0000000F
    ///////////////////////////////////////////////////////////

    typedef struct SIE_a64Par {
    ///////////////////////////////////////////////////////////
    #define   GET32a64Par_s0(r32)                              _BFGET_(r32, 3, 0)
    #define   SET32a64Par_s0(r32,v)                            _BFSET_(r32, 3, 0,v)
    #define   GET16a64Par_s0(r16)                              _BFGET_(r16, 3, 0)
    #define   SET16a64Par_s0(r16,v)                            _BFSET_(r16, 3, 0,v)

            UNSG32 u_s0                                        :  4;
            UNSG32 RSVDx0_b4                                   : 28;
    ///////////////////////////////////////////////////////////
    } SIE_a64Par;

    ///////////////////////////////////////////////////////////
     SIGN32 a64Par_drvrd(SIE_a64Par *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 a64Par_drvwr(SIE_a64Par *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void a64Par_reset(SIE_a64Par *p);
     SIGN32 a64Par_cmp  (SIE_a64Par *p, SIE_a64Par *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define a64Par_check(p,pie,pfx,hLOG) a64Par_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define a64Par_print(p,    pfx,hLOG) a64Par_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: a64Par
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DRMPUSHID               biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///               %unsigned 2  OP                        0x0
///                                    : PUSH                      0x0
///                                    : RSV                       0x1
///                                    : TBINIT                    0x2
///                                    : EXE0                      0x3
///               %unsigned 4  OPCSEL                    
///                                    ###
///                                    * for Exec instruction, which byte of the cmd64(“xT” register) to select as the opcode for the DRM instruction
///                                    * for TBINIT instruction, this is the write enable to 4 table SRAM3, 2, 1, 0
///                                    ###
///               %%        26         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       6b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DRMPUSHID
#define h_DRMPUSHID (){}

    #define     BA_DRMPUSHID_OP                                0x0000
    #define     B16DRMPUSHID_OP                                0x0000
    #define   LSb32DRMPUSHID_OP                                   0
    #define   LSb16DRMPUSHID_OP                                   0
    #define       bDRMPUSHID_OP                                2
    #define   MSK32DRMPUSHID_OP                                   0x00000003
    #define        DRMPUSHID_OP_PUSH                                        0x0
    #define        DRMPUSHID_OP_RSV                                         0x1
    #define        DRMPUSHID_OP_TBINIT                                      0x2
    #define        DRMPUSHID_OP_EXE0                                        0x3

    #define     BA_DRMPUSHID_OPCSEL                            0x0000
    #define     B16DRMPUSHID_OPCSEL                            0x0000
    #define   LSb32DRMPUSHID_OPCSEL                               2
    #define   LSb16DRMPUSHID_OPCSEL                               2
    #define       bDRMPUSHID_OPCSEL                            4
    #define   MSK32DRMPUSHID_OPCSEL                               0x0000003C
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DRMPUSHID {
    ///////////////////////////////////////////////////////////
    #define   GET32DRMPUSHID_OP(r32)                           _BFGET_(r32, 1, 0)
    #define   SET32DRMPUSHID_OP(r32,v)                         _BFSET_(r32, 1, 0,v)
    #define   GET16DRMPUSHID_OP(r16)                           _BFGET_(r16, 1, 0)
    #define   SET16DRMPUSHID_OP(r16,v)                         _BFSET_(r16, 1, 0,v)

    #define   GET32DRMPUSHID_OPCSEL(r32)                       _BFGET_(r32, 5, 2)
    #define   SET32DRMPUSHID_OPCSEL(r32,v)                     _BFSET_(r32, 5, 2,v)
    #define   GET16DRMPUSHID_OPCSEL(r16)                       _BFGET_(r16, 5, 2)
    #define   SET16DRMPUSHID_OPCSEL(r16,v)                     _BFSET_(r16, 5, 2,v)

            UNSG32 u_OP                                        :  2;
            UNSG32 u_OPCSEL                                    :  4;
            UNSG32 RSVDx0_b6                                   : 26;
    ///////////////////////////////////////////////////////////
    } SIE_DRMPUSHID;

    ///////////////////////////////////////////////////////////
     SIGN32 DRMPUSHID_drvrd(SIE_DRMPUSHID *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DRMPUSHID_drvwr(SIE_DRMPUSHID *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DRMPUSHID_reset(SIE_DRMPUSHID *p);
     SIGN32 DRMPUSHID_cmp  (SIE_DRMPUSHID *p, SIE_DRMPUSHID *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DRMPUSHID_check(p,pie,pfx,hLOG) DRMPUSHID_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DRMPUSHID_print(p,    pfx,hLOG) DRMPUSHID_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DRMPUSHID
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE INT                                      (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 ie                   (P)
///               %unsigned 32 bits                      0x0
///                                    ###
///                                    * mask bits for interrupt enable
///                                    ###
///                                    : ISRC_TEST                0x1F
///                                    : ISRC_RNG                  0x0
///     @ 0x00004 is                   (RW)
///               %unsigned 32 bits                      0x0
///                                    ###
///                                    * IS[31]: test interrupt, indicates the interrupt is triggered by setting the it bit
///                                    * IS[0]: RNG interrupt, indicates the RNG data is ready
///                                    * IS[1]: Figo interrupt; relays the interrupt from the Figo system
///                                    ###
///     @ 0x00008 it                   (P)
///               %unsigned 1  bits                      0x0
///                                    ###
///                                    * test bit, write 1 to this bit will trigger dmx interrupt and the IS[31] bit will be set
///                                    ###
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      12B, bits:      65b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_INT
#define h_INT (){}

    #define     RA_INT_ie                                      0x0000

    #define     BA_INT_ie_bits                                 0x0000
    #define     B16INT_ie_bits                                 0x0000
    #define   LSb32INT_ie_bits                                    0
    #define   LSb16INT_ie_bits                                    0
    #define       bINT_ie_bits                                 32
    #define   MSK32INT_ie_bits                                    0xFFFFFFFF
    #define        INT_ie_bits_ISRC_TEST                                    0x1F
    #define        INT_ie_bits_ISRC_RNG                                     0x0
    ///////////////////////////////////////////////////////////
    #define     RA_INT_is                                      0x0004

    #define     BA_INT_is_bits                                 0x0004
    #define     B16INT_is_bits                                 0x0004
    #define   LSb32INT_is_bits                                    0
    #define   LSb16INT_is_bits                                    0
    #define       bINT_is_bits                                 32
    #define   MSK32INT_is_bits                                    0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_INT_it                                      0x0008

    #define     BA_INT_it_bits                                 0x0008
    #define     B16INT_it_bits                                 0x0008
    #define   LSb32INT_it_bits                                    0
    #define   LSb16INT_it_bits                                    0
    #define       bINT_it_bits                                 1
    #define   MSK32INT_it_bits                                    0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_INT {
    ///////////////////////////////////////////////////////////
    #define   GET32INT_ie_bits(r32)                            _BFGET_(r32,31, 0)
    #define   SET32INT_ie_bits(r32,v)                          _BFSET_(r32,31, 0,v)

    #define     w32INT_ie                                      {\
            UNSG32 uie_bits                                    : 32;\
          }
    union { UNSG32 u32INT_ie;
            struct w32INT_ie;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32INT_is_bits(r32)                            _BFGET_(r32,31, 0)
    #define   SET32INT_is_bits(r32,v)                          _BFSET_(r32,31, 0,v)

    #define     w32INT_is                                      {\
            UNSG32 uis_bits                                    : 32;\
          }
    union { UNSG32 u32INT_is;
            struct w32INT_is;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32INT_it_bits(r32)                            _BFGET_(r32, 0, 0)
    #define   SET32INT_it_bits(r32,v)                          _BFSET_(r32, 0, 0,v)
    #define   GET16INT_it_bits(r16)                            _BFGET_(r16, 0, 0)
    #define   SET16INT_it_bits(r16,v)                          _BFSET_(r16, 0, 0,v)

    #define     w32INT_it                                      {\
            UNSG32 uit_bits                                    :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32INT_it;
            struct w32INT_it;
          };
    ///////////////////////////////////////////////////////////
    } SIE_INT;

    typedef union  T32INT_ie
          { UNSG32 u32;
            struct w32INT_ie;
                 } T32INT_ie;
    typedef union  T32INT_is
          { UNSG32 u32;
            struct w32INT_is;
                 } T32INT_is;
    typedef union  T32INT_it
          { UNSG32 u32;
            struct w32INT_it;
                 } T32INT_it;
    ///////////////////////////////////////////////////////////

    typedef union  TINT_ie
          { UNSG32 u32[1];
            struct {
            struct w32INT_ie;
                   };
                 } TINT_ie;
    typedef union  TINT_is
          { UNSG32 u32[1];
            struct {
            struct w32INT_is;
                   };
                 } TINT_is;
    typedef union  TINT_it
          { UNSG32 u32[1];
            struct {
            struct w32INT_it;
                   };
                 } TINT_it;

    ///////////////////////////////////////////////////////////
     SIGN32 INT_drvrd(SIE_INT *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 INT_drvwr(SIE_INT *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void INT_reset(SIE_INT *p);
     SIGN32 INT_cmp  (SIE_INT *p, SIE_INT *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define INT_check(p,pie,pfx,hLOG) INT_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define INT_print(p,    pfx,hLOG) INT_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: INT
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DRM                     biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 DTCM                 (P)
///     # 0x00000 dtcm                 
///               $FigoData            dtcm              MEM    [4096]
///     @ 0x08000                      (P)
///     # 0x08000 figoSys              
///               $FigoSysBasic        figoSys           REG          
///     @ 0x0B000 AHBFW                (P)
///     # 0x0B000 ahbFw                
///               $SECHF_ENTRY         ahbFw             REG       [8]
///     @ 0x0B040 JTAGEN               (P)
///     # 0x0B040 jtag                 
///               $JTAGCTL             jtag              REG          
///     @ 0x0B044                      (W-)
///     #         # Stuffing bytes...
///               %% 32224
///     @ 0x0C000 RNG                  (P)
///     # 0x0C000 rng                  
///               $RNG                 rng               REG          
///     @ 0x0C00C OTP                  (P)
///     # 0x0C00C otp                  
///               $OTP                 otp               REG          
///     @ 0x0C020 INT                  (P)
///     # 0x0C020 int                  
///               $INT                 int               REG          
///     @ 0x0C02C                      (W-)
///     #         # Stuffing bytes...
///               %% 130720
///     @ 0x10000 ITCM                 (P)
///     # 0x10000 itcm                 
///               $FigoInst            itcm              MEM    [4096]
///     @ 0x14000                      (W-)
///     #         # Stuffing bytes...
///               %% 131072
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:   98304B, bits:    3363b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DRM
#define h_DRM (){}

    #define     RA_DRM_DTCM                                    0x0000
    #define     RA_DRM_dtcm                                    0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_DRM_figoSys                                 0x8000
    ///////////////////////////////////////////////////////////
    #define     RA_DRM_AHBFW                                   0xB000
    #define     RA_DRM_ahbFw                                   0xB000
    ///////////////////////////////////////////////////////////
    #define     RA_DRM_JTAGEN                                  0xB040
    #define     RA_DRM_jtag                                    0xB040
    ///////////////////////////////////////////////////////////
    #define     RA_DRM_RNG                                     0xC000
    #define     RA_DRM_rng                                     0xC000
    ///////////////////////////////////////////////////////////
    #define     RA_DRM_OTP                                     0xC00C
    #define     RA_DRM_otp                                     0xC00C
    ///////////////////////////////////////////////////////////
    #define     RA_DRM_INT                                     0xC020
    #define     RA_DRM_int                                     0xC020
    ///////////////////////////////////////////////////////////
    #define     RA_DRM_ITCM                                    0x10000
    #define     RA_DRM_itcm                                    0x10000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DRM {
    ///////////////////////////////////////////////////////////
              SIE_FigoData                                     ie_dtcm[4096];
    ///////////////////////////////////////////////////////////
              SIE_FigoSysBasic                                 ie_figoSys;
    ///////////////////////////////////////////////////////////
              SIE_SECHF_ENTRY                                  ie_ahbFw[8];
    ///////////////////////////////////////////////////////////
              SIE_JTAGCTL                                      ie_jtag;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxB044                                   [4028];
    ///////////////////////////////////////////////////////////
              SIE_RNG                                          ie_rng;
    ///////////////////////////////////////////////////////////
              SIE_OTP                                          ie_otp;
    ///////////////////////////////////////////////////////////
              SIE_INT                                          ie_int;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxC02C                                   [16340];
    ///////////////////////////////////////////////////////////
              SIE_FigoInst                                     ie_itcm[4096];
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx14000                                  [16384];
    ///////////////////////////////////////////////////////////
    } SIE_DRM;

    ///////////////////////////////////////////////////////////
     SIGN32 DRM_drvrd(SIE_DRM *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DRM_drvwr(SIE_DRM *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DRM_reset(SIE_DRM *p);
     SIGN32 DRM_cmp  (SIE_DRM *p, SIE_DRM *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DRM_check(p,pie,pfx,hLOG) DRM_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DRM_print(p,    pfx,hLOG) DRM_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DRM
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DRMDMX_FIFOMAP                           (4,4)
///     # # ----------------------------------------------------------
///               : CHN_TSP0           0x0
///               : CHN_TSP1           0x1
///               : CHN_TSP2           0x2
///               : CHN_TSP3           0x3
///               : CHN_TSCMD          0x4
///               : CHN_DS0            0x5
///               : CHN_SFCMDQ         0x6
///               : CHN_SFEVENT        0x7
///               : CHN_TSO0           0x8
///               : TSCP0              0x0
///               : TSCP0SIZE          0x40
///               : TSCP1              0x40
///               : TSCP1SIZE          0x40
///               : TSCP2              0x80
///               : TSCP2SIZE          0x40
///               : TSCP3              0xC0
///               : TSCP3SIZE          0x40
///               : TSCMD              0x100
///               : TSCMDSIZE          0x10
///               : DS                 0x110
///               : DSSIZE             0x10
///               : SFEVENTQ           0x1A0
///               : SFEVENTQSIZE       0x20
///               : SFCMDQ             0x1E0
///               : SFCMDQSIZE         0x10
///               : TSO0               0x1F0
///               : TSO0SIZE           0x10
///     @ 0x00000 fifomap              (R-)
///               %unsigned 32 dummy                     0x0
///                                    ###
///                                    * TSO0
///                                    * TSO0SIZE
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:      32b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DRMDMX_FIFOMAP
#define h_DRMDMX_FIFOMAP (){}

    #define        DRMDMX_FIFOMAP_CHN_TSP0                     0x0
    #define        DRMDMX_FIFOMAP_CHN_TSP1                     0x1
    #define        DRMDMX_FIFOMAP_CHN_TSP2                     0x2
    #define        DRMDMX_FIFOMAP_CHN_TSP3                     0x3
    #define        DRMDMX_FIFOMAP_CHN_TSCMD                    0x4
    #define        DRMDMX_FIFOMAP_CHN_DS0                      0x5
    #define        DRMDMX_FIFOMAP_CHN_SFCMDQ                   0x6
    #define        DRMDMX_FIFOMAP_CHN_SFEVENT                  0x7
    #define        DRMDMX_FIFOMAP_CHN_TSO0                     0x8
    #define        DRMDMX_FIFOMAP_TSCP0                        0x0
    #define        DRMDMX_FIFOMAP_TSCP0SIZE                    0x40
    #define        DRMDMX_FIFOMAP_TSCP1                        0x40
    #define        DRMDMX_FIFOMAP_TSCP1SIZE                    0x40
    #define        DRMDMX_FIFOMAP_TSCP2                        0x80
    #define        DRMDMX_FIFOMAP_TSCP2SIZE                    0x40
    #define        DRMDMX_FIFOMAP_TSCP3                        0xC0
    #define        DRMDMX_FIFOMAP_TSCP3SIZE                    0x40
    #define        DRMDMX_FIFOMAP_TSCMD                        0x100
    #define        DRMDMX_FIFOMAP_TSCMDSIZE                    0x10
    #define        DRMDMX_FIFOMAP_DS                           0x110
    #define        DRMDMX_FIFOMAP_DSSIZE                       0x10
    #define        DRMDMX_FIFOMAP_SFEVENTQ                     0x1A0
    #define        DRMDMX_FIFOMAP_SFEVENTQSIZE                 0x20
    #define        DRMDMX_FIFOMAP_SFCMDQ                       0x1E0
    #define        DRMDMX_FIFOMAP_SFCMDQSIZE                   0x10
    #define        DRMDMX_FIFOMAP_TSO0                         0x1F0
    #define        DRMDMX_FIFOMAP_TSO0SIZE                     0x10
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_FIFOMAP_fifomap                      0x0000

    #define     BA_DRMDMX_FIFOMAP_fifomap_dummy                0x0000
    #define     B16DRMDMX_FIFOMAP_fifomap_dummy                0x0000
    #define   LSb32DRMDMX_FIFOMAP_fifomap_dummy                   0
    #define   LSb16DRMDMX_FIFOMAP_fifomap_dummy                   0
    #define       bDRMDMX_FIFOMAP_fifomap_dummy                32
    #define   MSK32DRMDMX_FIFOMAP_fifomap_dummy                   0xFFFFFFFF
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DRMDMX_FIFOMAP {
    ///////////////////////////////////////////////////////////
    #define   GET32DRMDMX_FIFOMAP_fifomap_dummy(r32)           _BFGET_(r32,31, 0)
    #define   SET32DRMDMX_FIFOMAP_fifomap_dummy(r32,v)         _BFSET_(r32,31, 0,v)

    #define     w32DRMDMX_FIFOMAP_fifomap                      {\
            UNSG32 ufifomap_dummy                              : 32;\
          }
    union { UNSG32 u32DRMDMX_FIFOMAP_fifomap;
            struct w32DRMDMX_FIFOMAP_fifomap;
          };
    ///////////////////////////////////////////////////////////
    } SIE_DRMDMX_FIFOMAP;

    typedef union  T32DRMDMX_FIFOMAP_fifomap
          { UNSG32 u32;
            struct w32DRMDMX_FIFOMAP_fifomap;
                 } T32DRMDMX_FIFOMAP_fifomap;
    ///////////////////////////////////////////////////////////

    typedef union  TDRMDMX_FIFOMAP_fifomap
          { UNSG32 u32[1];
            struct {
            struct w32DRMDMX_FIFOMAP_fifomap;
                   };
                 } TDRMDMX_FIFOMAP_fifomap;

    ///////////////////////////////////////////////////////////
     SIGN32 DRMDMX_FIFOMAP_drvrd(SIE_DRMDMX_FIFOMAP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DRMDMX_FIFOMAP_drvwr(SIE_DRMDMX_FIFOMAP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DRMDMX_FIFOMAP_reset(SIE_DRMDMX_FIFOMAP *p);
     SIGN32 DRMDMX_FIFOMAP_cmp  (SIE_DRMDMX_FIFOMAP *p, SIE_DRMDMX_FIFOMAP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DRMDMX_FIFOMAP_check(p,pie,pfx,hLOG) DRMDMX_FIFOMAP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DRMDMX_FIFOMAP_print(p,    pfx,hLOG) DRMDMX_FIFOMAP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DRMDMX_FIFOMAP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FIGODTCMMAP             biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 ram                  
///               $FigoData            ram               MEM    [2048]
///     @ 0x04000                      (P)
///     # 0x04000 rom0                 
///               $FigoData            rom0              MEM     [512]
///     @ 0x05000                      (P)
///     # 0x05000 rom1                 
///               $FigoData            rom1              MEM     [480]
///     @ 0x06000                      (W-)
///     #         # Stuffing bytes...
///               %% 65536
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:   32768B, bits:      96b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FIGODTCMMAP
#define h_FIGODTCMMAP (){}

    #define     RA_FIGODTCMMAP_ram                             0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_FIGODTCMMAP_rom0                            0x4000
    ///////////////////////////////////////////////////////////
    #define     RA_FIGODTCMMAP_rom1                            0x5000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FIGODTCMMAP {
    ///////////////////////////////////////////////////////////
              SIE_FigoData                                     ie_ram[2048];
    ///////////////////////////////////////////////////////////
              SIE_FigoData                                     ie_rom0[512];
    ///////////////////////////////////////////////////////////
              SIE_FigoData                                     ie_rom1[480];
             UNSG8 RSVD_rom1                                   [256];
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx6000                                   [8192];
    ///////////////////////////////////////////////////////////
    } SIE_FIGODTCMMAP;

    ///////////////////////////////////////////////////////////
     SIGN32 FIGODTCMMAP_drvrd(SIE_FIGODTCMMAP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FIGODTCMMAP_drvwr(SIE_FIGODTCMMAP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FIGODTCMMAP_reset(SIE_FIGODTCMMAP *p);
     SIGN32 FIGODTCMMAP_cmp  (SIE_FIGODTCMMAP *p, SIE_FIGODTCMMAP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FIGODTCMMAP_check(p,pie,pfx,hLOG) FIGODTCMMAP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FIGODTCMMAP_print(p,    pfx,hLOG) FIGODTCMMAP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FIGODTCMMAP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE FIGOITCMMAP             biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (P)
///     # 0x00000 ram                  
///               $FigoInst            ram               MEM    [4096]
///     @ 0x04000                      (W-)
///     #         # Stuffing bytes...
///               %% 131072
///     @ 0x08000                      (P)
///     # 0x08000 rom                  
///               $FigoInst            rom               MEM    [8192]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:   65536B, bits:      64b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_FIGOITCMMAP
#define h_FIGOITCMMAP (){}

    #define     RA_FIGOITCMMAP_ram                             0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_FIGOITCMMAP_rom                             0x8000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_FIGOITCMMAP {
    ///////////////////////////////////////////////////////////
              SIE_FigoInst                                     ie_ram[4096];
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx4000                                   [16384];
    ///////////////////////////////////////////////////////////
              SIE_FigoInst                                     ie_rom[8192];
    ///////////////////////////////////////////////////////////
    } SIE_FIGOITCMMAP;

    ///////////////////////////////////////////////////////////
     SIGN32 FIGOITCMMAP_drvrd(SIE_FIGOITCMMAP *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 FIGOITCMMAP_drvwr(SIE_FIGOITCMMAP *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void FIGOITCMMAP_reset(SIE_FIGOITCMMAP *p);
     SIGN32 FIGOITCMMAP_cmp  (SIE_FIGOITCMMAP *p, SIE_FIGOITCMMAP *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define FIGOITCMMAP_check(p,pie,pfx,hLOG) FIGOITCMMAP_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define FIGOITCMMAP_print(p,    pfx,hLOG) FIGOITCMMAP_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: FIGOITCMMAP
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DrmDmxDviReg                             (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 control              (P)
///               %unsigned 1  enable                    0x0
///                                    ###
///                                    * 1: normal operation
///                                    * 0: reset the block
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x00004 dvi_cfg              (P)
///               %unsigned 1  yc_interleaved            0x0
///                                    ###
///                                    * 1: Y can C channel are interleaved (8-bit input)
///                                    * 0: Y and C channel are separated (16-bit input)
///                                    ###
///               %unsigned 1  use_sav                   0x1
///                                    ###
///                                    * 1: Use the embedded SAV to detect the start of an active line; HSYNC, VSYNC and FID signals are ignored.
///                                    * 0: Use the HSYNC signal to detect the start of an active line
///                                    ###
///               %unsigned 1  swap_data_in              0x0
///                                    ###
///                                    * 1: Swap the two bytes of DviData
///                                    * 0: no swapping
///                                    ###
///               %unsigned 1  swap_data2mem             0x0
///                                    ###
///                                    * 1: Swap every two bytes of the data saved to DTCM
///                                    * 0: no swapping
///                                    ###
///               %unsigned 1  clock_polarity            0x0
///                                    ###
///                                    * 1: latch DVI signals at the positive edge of DVI clock
///                                    * 0: latch DVI signals at the negative edge of DVI clock
///                                    ###
///               %unsigned 1  hsync_polarity            0x1
///                                    ###
///                                    * 1: DVI HSYNC signal is active high
///                                    * 0: DVI HSYNC signal is active low
///                                    * only used when use_sav is 0
///                                    ###
///               %unsigned 1  vsync_polarity            0x1
///                                    ###
///                                    * 1: DVI VSYNC signal is active high
///                                    * 0: DVI VSYNC signal is active low
///                                    * only used when use_sav is 0
///                                    ###
///               %unsigned 1  fid_polarity              0x1
///                                    ###
///                                    * 1: DVI FID signal is active high
///                                    * 0: DVI FID signal is active low
///                                    * only used when use_sav is 0
///                                    ###
///               %unsigned 8  reserved0                 0x0
///               %unsigned 13 sample_per_active_line    0x780
///                                    ###
///                                    * Number of YC pairs per active line.
///                                    * This number must be a multiple of 4.
///                                    ###
///               %unsigned 3  reserved1                 0x0
///     @ 0x00008 status               (RW)
///               %unsigned 1  overflow                  0x0
///                                    ###
///                                    * Hardware will set this bit to one when overflow happens. Once set, only firmware can clear it.
///                                    * Overflow happens when HBO FIFO is full. DVI module will drop the incoming DVI data when overflow happens. It will keep the integrity of data line in HBO FIFO. It is possible that some lines are entirely missed during the overflow period. In that case, FIGO firmware needs to re-sync to frame/field boundary.
///                                    ###
///               %%        31         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      12B, bits:      34b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DrmDmxDviReg
#define h_DrmDmxDviReg (){}

    #define     RA_DrmDmxDviReg_control                        0x0000

    #define     BA_DrmDmxDviReg_control_enable                 0x0000
    #define     B16DrmDmxDviReg_control_enable                 0x0000
    #define   LSb32DrmDmxDviReg_control_enable                    0
    #define   LSb16DrmDmxDviReg_control_enable                    0
    #define       bDrmDmxDviReg_control_enable                 1
    #define   MSK32DrmDmxDviReg_control_enable                    0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_DrmDmxDviReg_dvi_cfg                        0x0004

    #define     BA_DrmDmxDviReg_dvi_cfg_yc_interleaved         0x0004
    #define     B16DrmDmxDviReg_dvi_cfg_yc_interleaved         0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_yc_interleaved            0
    #define   LSb16DrmDmxDviReg_dvi_cfg_yc_interleaved            0
    #define       bDrmDmxDviReg_dvi_cfg_yc_interleaved         1
    #define   MSK32DrmDmxDviReg_dvi_cfg_yc_interleaved            0x00000001

    #define     BA_DrmDmxDviReg_dvi_cfg_use_sav                0x0004
    #define     B16DrmDmxDviReg_dvi_cfg_use_sav                0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_use_sav                   1
    #define   LSb16DrmDmxDviReg_dvi_cfg_use_sav                   1
    #define       bDrmDmxDviReg_dvi_cfg_use_sav                1
    #define   MSK32DrmDmxDviReg_dvi_cfg_use_sav                   0x00000002

    #define     BA_DrmDmxDviReg_dvi_cfg_swap_data_in           0x0004
    #define     B16DrmDmxDviReg_dvi_cfg_swap_data_in           0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_swap_data_in              2
    #define   LSb16DrmDmxDviReg_dvi_cfg_swap_data_in              2
    #define       bDrmDmxDviReg_dvi_cfg_swap_data_in           1
    #define   MSK32DrmDmxDviReg_dvi_cfg_swap_data_in              0x00000004

    #define     BA_DrmDmxDviReg_dvi_cfg_swap_data2mem          0x0004
    #define     B16DrmDmxDviReg_dvi_cfg_swap_data2mem          0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_swap_data2mem             3
    #define   LSb16DrmDmxDviReg_dvi_cfg_swap_data2mem             3
    #define       bDrmDmxDviReg_dvi_cfg_swap_data2mem          1
    #define   MSK32DrmDmxDviReg_dvi_cfg_swap_data2mem             0x00000008

    #define     BA_DrmDmxDviReg_dvi_cfg_clock_polarity         0x0004
    #define     B16DrmDmxDviReg_dvi_cfg_clock_polarity         0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_clock_polarity            4
    #define   LSb16DrmDmxDviReg_dvi_cfg_clock_polarity            4
    #define       bDrmDmxDviReg_dvi_cfg_clock_polarity         1
    #define   MSK32DrmDmxDviReg_dvi_cfg_clock_polarity            0x00000010

    #define     BA_DrmDmxDviReg_dvi_cfg_hsync_polarity         0x0004
    #define     B16DrmDmxDviReg_dvi_cfg_hsync_polarity         0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_hsync_polarity            5
    #define   LSb16DrmDmxDviReg_dvi_cfg_hsync_polarity            5
    #define       bDrmDmxDviReg_dvi_cfg_hsync_polarity         1
    #define   MSK32DrmDmxDviReg_dvi_cfg_hsync_polarity            0x00000020

    #define     BA_DrmDmxDviReg_dvi_cfg_vsync_polarity         0x0004
    #define     B16DrmDmxDviReg_dvi_cfg_vsync_polarity         0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_vsync_polarity            6
    #define   LSb16DrmDmxDviReg_dvi_cfg_vsync_polarity            6
    #define       bDrmDmxDviReg_dvi_cfg_vsync_polarity         1
    #define   MSK32DrmDmxDviReg_dvi_cfg_vsync_polarity            0x00000040

    #define     BA_DrmDmxDviReg_dvi_cfg_fid_polarity           0x0004
    #define     B16DrmDmxDviReg_dvi_cfg_fid_polarity           0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_fid_polarity              7
    #define   LSb16DrmDmxDviReg_dvi_cfg_fid_polarity              7
    #define       bDrmDmxDviReg_dvi_cfg_fid_polarity           1
    #define   MSK32DrmDmxDviReg_dvi_cfg_fid_polarity              0x00000080

    #define     BA_DrmDmxDviReg_dvi_cfg_reserved0              0x0005
    #define     B16DrmDmxDviReg_dvi_cfg_reserved0              0x0004
    #define   LSb32DrmDmxDviReg_dvi_cfg_reserved0                 8
    #define   LSb16DrmDmxDviReg_dvi_cfg_reserved0                 8
    #define       bDrmDmxDviReg_dvi_cfg_reserved0              8
    #define   MSK32DrmDmxDviReg_dvi_cfg_reserved0                 0x0000FF00

    #define     BA_DrmDmxDviReg_dvi_cfg_sample_per_active_line 0x0006
    #define     B16DrmDmxDviReg_dvi_cfg_sample_per_active_line 0x0006
    #define   LSb32DrmDmxDviReg_dvi_cfg_sample_per_active_line    16
    #define   LSb16DrmDmxDviReg_dvi_cfg_sample_per_active_line    0
    #define       bDrmDmxDviReg_dvi_cfg_sample_per_active_line 13
    #define   MSK32DrmDmxDviReg_dvi_cfg_sample_per_active_line    0x1FFF0000

    #define     BA_DrmDmxDviReg_dvi_cfg_reserved1              0x0007
    #define     B16DrmDmxDviReg_dvi_cfg_reserved1              0x0006
    #define   LSb32DrmDmxDviReg_dvi_cfg_reserved1                 29
    #define   LSb16DrmDmxDviReg_dvi_cfg_reserved1                 13
    #define       bDrmDmxDviReg_dvi_cfg_reserved1              3
    #define   MSK32DrmDmxDviReg_dvi_cfg_reserved1                 0xE0000000
    ///////////////////////////////////////////////////////////
    #define     RA_DrmDmxDviReg_status                         0x0008

    #define     BA_DrmDmxDviReg_status_overflow                0x0008
    #define     B16DrmDmxDviReg_status_overflow                0x0008
    #define   LSb32DrmDmxDviReg_status_overflow                   0
    #define   LSb16DrmDmxDviReg_status_overflow                   0
    #define       bDrmDmxDviReg_status_overflow                1
    #define   MSK32DrmDmxDviReg_status_overflow                   0x00000001
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DrmDmxDviReg {
    ///////////////////////////////////////////////////////////
    #define   GET32DrmDmxDviReg_control_enable(r32)            _BFGET_(r32, 0, 0)
    #define   SET32DrmDmxDviReg_control_enable(r32,v)          _BFSET_(r32, 0, 0,v)
    #define   GET16DrmDmxDviReg_control_enable(r16)            _BFGET_(r16, 0, 0)
    #define   SET16DrmDmxDviReg_control_enable(r16,v)          _BFSET_(r16, 0, 0,v)

    #define     w32DrmDmxDviReg_control                        {\
            UNSG32 ucontrol_enable                             :  1;\
            UNSG32 RSVDx0_b1                                   : 31;\
          }
    union { UNSG32 u32DrmDmxDviReg_control;
            struct w32DrmDmxDviReg_control;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32DrmDmxDviReg_dvi_cfg_yc_interleaved(r32)    _BFGET_(r32, 0, 0)
    #define   SET32DrmDmxDviReg_dvi_cfg_yc_interleaved(r32,v)  _BFSET_(r32, 0, 0,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_yc_interleaved(r16)    _BFGET_(r16, 0, 0)
    #define   SET16DrmDmxDviReg_dvi_cfg_yc_interleaved(r16,v)  _BFSET_(r16, 0, 0,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_use_sav(r32)           _BFGET_(r32, 1, 1)
    #define   SET32DrmDmxDviReg_dvi_cfg_use_sav(r32,v)         _BFSET_(r32, 1, 1,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_use_sav(r16)           _BFGET_(r16, 1, 1)
    #define   SET16DrmDmxDviReg_dvi_cfg_use_sav(r16,v)         _BFSET_(r16, 1, 1,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_swap_data_in(r32)      _BFGET_(r32, 2, 2)
    #define   SET32DrmDmxDviReg_dvi_cfg_swap_data_in(r32,v)    _BFSET_(r32, 2, 2,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_swap_data_in(r16)      _BFGET_(r16, 2, 2)
    #define   SET16DrmDmxDviReg_dvi_cfg_swap_data_in(r16,v)    _BFSET_(r16, 2, 2,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_swap_data2mem(r32)     _BFGET_(r32, 3, 3)
    #define   SET32DrmDmxDviReg_dvi_cfg_swap_data2mem(r32,v)   _BFSET_(r32, 3, 3,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_swap_data2mem(r16)     _BFGET_(r16, 3, 3)
    #define   SET16DrmDmxDviReg_dvi_cfg_swap_data2mem(r16,v)   _BFSET_(r16, 3, 3,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_clock_polarity(r32)    _BFGET_(r32, 4, 4)
    #define   SET32DrmDmxDviReg_dvi_cfg_clock_polarity(r32,v)  _BFSET_(r32, 4, 4,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_clock_polarity(r16)    _BFGET_(r16, 4, 4)
    #define   SET16DrmDmxDviReg_dvi_cfg_clock_polarity(r16,v)  _BFSET_(r16, 4, 4,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_hsync_polarity(r32)    _BFGET_(r32, 5, 5)
    #define   SET32DrmDmxDviReg_dvi_cfg_hsync_polarity(r32,v)  _BFSET_(r32, 5, 5,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_hsync_polarity(r16)    _BFGET_(r16, 5, 5)
    #define   SET16DrmDmxDviReg_dvi_cfg_hsync_polarity(r16,v)  _BFSET_(r16, 5, 5,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_vsync_polarity(r32)    _BFGET_(r32, 6, 6)
    #define   SET32DrmDmxDviReg_dvi_cfg_vsync_polarity(r32,v)  _BFSET_(r32, 6, 6,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_vsync_polarity(r16)    _BFGET_(r16, 6, 6)
    #define   SET16DrmDmxDviReg_dvi_cfg_vsync_polarity(r16,v)  _BFSET_(r16, 6, 6,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_fid_polarity(r32)      _BFGET_(r32, 7, 7)
    #define   SET32DrmDmxDviReg_dvi_cfg_fid_polarity(r32,v)    _BFSET_(r32, 7, 7,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_fid_polarity(r16)      _BFGET_(r16, 7, 7)
    #define   SET16DrmDmxDviReg_dvi_cfg_fid_polarity(r16,v)    _BFSET_(r16, 7, 7,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_reserved0(r32)         _BFGET_(r32,15, 8)
    #define   SET32DrmDmxDviReg_dvi_cfg_reserved0(r32,v)       _BFSET_(r32,15, 8,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_reserved0(r16)         _BFGET_(r16,15, 8)
    #define   SET16DrmDmxDviReg_dvi_cfg_reserved0(r16,v)       _BFSET_(r16,15, 8,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_sample_per_active_line(r32) _BFGET_(r32,28,16)
    #define   SET32DrmDmxDviReg_dvi_cfg_sample_per_active_line(r32,v) _BFSET_(r32,28,16,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_sample_per_active_line(r16) _BFGET_(r16,12, 0)
    #define   SET16DrmDmxDviReg_dvi_cfg_sample_per_active_line(r16,v) _BFSET_(r16,12, 0,v)

    #define   GET32DrmDmxDviReg_dvi_cfg_reserved1(r32)         _BFGET_(r32,31,29)
    #define   SET32DrmDmxDviReg_dvi_cfg_reserved1(r32,v)       _BFSET_(r32,31,29,v)
    #define   GET16DrmDmxDviReg_dvi_cfg_reserved1(r16)         _BFGET_(r16,15,13)
    #define   SET16DrmDmxDviReg_dvi_cfg_reserved1(r16,v)       _BFSET_(r16,15,13,v)

    #define     w32DrmDmxDviReg_dvi_cfg                        {\
            UNSG32 udvi_cfg_yc_interleaved                     :  1;\
            UNSG32 udvi_cfg_use_sav                            :  1;\
            UNSG32 udvi_cfg_swap_data_in                       :  1;\
            UNSG32 udvi_cfg_swap_data2mem                      :  1;\
            UNSG32 udvi_cfg_clock_polarity                     :  1;\
            UNSG32 udvi_cfg_hsync_polarity                     :  1;\
            UNSG32 udvi_cfg_vsync_polarity                     :  1;\
            UNSG32 udvi_cfg_fid_polarity                       :  1;\
            UNSG32 udvi_cfg_reserved0                          :  8;\
            UNSG32 udvi_cfg_sample_per_active_line             : 13;\
            UNSG32 udvi_cfg_reserved1                          :  3;\
          }
    union { UNSG32 u32DrmDmxDviReg_dvi_cfg;
            struct w32DrmDmxDviReg_dvi_cfg;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32DrmDmxDviReg_status_overflow(r32)           _BFGET_(r32, 0, 0)
    #define   SET32DrmDmxDviReg_status_overflow(r32,v)         _BFSET_(r32, 0, 0,v)
    #define   GET16DrmDmxDviReg_status_overflow(r16)           _BFGET_(r16, 0, 0)
    #define   SET16DrmDmxDviReg_status_overflow(r16,v)         _BFSET_(r16, 0, 0,v)

    #define     w32DrmDmxDviReg_status                         {\
            UNSG32 ustatus_overflow                            :  1;\
            UNSG32 RSVDx8_b1                                   : 31;\
          }
    union { UNSG32 u32DrmDmxDviReg_status;
            struct w32DrmDmxDviReg_status;
          };
    ///////////////////////////////////////////////////////////
    } SIE_DrmDmxDviReg;

    typedef union  T32DrmDmxDviReg_control
          { UNSG32 u32;
            struct w32DrmDmxDviReg_control;
                 } T32DrmDmxDviReg_control;
    typedef union  T32DrmDmxDviReg_dvi_cfg
          { UNSG32 u32;
            struct w32DrmDmxDviReg_dvi_cfg;
                 } T32DrmDmxDviReg_dvi_cfg;
    typedef union  T32DrmDmxDviReg_status
          { UNSG32 u32;
            struct w32DrmDmxDviReg_status;
                 } T32DrmDmxDviReg_status;
    ///////////////////////////////////////////////////////////

    typedef union  TDrmDmxDviReg_control
          { UNSG32 u32[1];
            struct {
            struct w32DrmDmxDviReg_control;
                   };
                 } TDrmDmxDviReg_control;
    typedef union  TDrmDmxDviReg_dvi_cfg
          { UNSG32 u32[1];
            struct {
            struct w32DrmDmxDviReg_dvi_cfg;
                   };
                 } TDrmDmxDviReg_dvi_cfg;
    typedef union  TDrmDmxDviReg_status
          { UNSG32 u32[1];
            struct {
            struct w32DrmDmxDviReg_status;
                   };
                 } TDrmDmxDviReg_status;

    ///////////////////////////////////////////////////////////
     SIGN32 DrmDmxDviReg_drvrd(SIE_DrmDmxDviReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DrmDmxDviReg_drvwr(SIE_DrmDmxDviReg *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DrmDmxDviReg_reset(SIE_DrmDmxDviReg *p);
     SIGN32 DrmDmxDviReg_cmp  (SIE_DrmDmxDviReg *p, SIE_DrmDmxDviReg *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DrmDmxDviReg_check(p,pie,pfx,hLOG) DrmDmxDviReg_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DrmDmxDviReg_print(p,    pfx,hLOG) DrmDmxDviReg_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DrmDmxDviReg
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE VMETA_CTL                                (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000                      (RW-)
///               %unsigned 1  OTP_DISABLE_MPEG2_DEC     0x0
///                                    ###
///                                    * 1: Disable MPEG2 Decoder
///                                    * 0: Enable MPEG2 Decoder
///                                    ###
///               %unsigned 1  OTP_DISABLE_ENC           0x0
///                                    ###
///                                    * 1: Disable all encoders (H.264/H.263/MPEG4/JPEG)
///                                    * 0: Enable all encoders
///                                    ###
///               %%        30         # Stuffing bits...
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:       4B, bits:       2b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_VMETA_CTL
#define h_VMETA_CTL (){}

    #define     BA_VMETA_CTL_OTP_DISABLE_MPEG2_DEC             0x0000
    #define     B16VMETA_CTL_OTP_DISABLE_MPEG2_DEC             0x0000
    #define   LSb32VMETA_CTL_OTP_DISABLE_MPEG2_DEC                0
    #define   LSb16VMETA_CTL_OTP_DISABLE_MPEG2_DEC                0
    #define       bVMETA_CTL_OTP_DISABLE_MPEG2_DEC             1
    #define   MSK32VMETA_CTL_OTP_DISABLE_MPEG2_DEC                0x00000001

    #define     BA_VMETA_CTL_OTP_DISABLE_ENC                   0x0000
    #define     B16VMETA_CTL_OTP_DISABLE_ENC                   0x0000
    #define   LSb32VMETA_CTL_OTP_DISABLE_ENC                      1
    #define   LSb16VMETA_CTL_OTP_DISABLE_ENC                      1
    #define       bVMETA_CTL_OTP_DISABLE_ENC                   1
    #define   MSK32VMETA_CTL_OTP_DISABLE_ENC                      0x00000002
    ///////////////////////////////////////////////////////////

    typedef struct SIE_VMETA_CTL {
    ///////////////////////////////////////////////////////////
    #define   GET32VMETA_CTL_OTP_DISABLE_MPEG2_DEC(r32)        _BFGET_(r32, 0, 0)
    #define   SET32VMETA_CTL_OTP_DISABLE_MPEG2_DEC(r32,v)      _BFSET_(r32, 0, 0,v)
    #define   GET16VMETA_CTL_OTP_DISABLE_MPEG2_DEC(r16)        _BFGET_(r16, 0, 0)
    #define   SET16VMETA_CTL_OTP_DISABLE_MPEG2_DEC(r16,v)      _BFSET_(r16, 0, 0,v)

    #define   GET32VMETA_CTL_OTP_DISABLE_ENC(r32)              _BFGET_(r32, 1, 1)
    #define   SET32VMETA_CTL_OTP_DISABLE_ENC(r32,v)            _BFSET_(r32, 1, 1,v)
    #define   GET16VMETA_CTL_OTP_DISABLE_ENC(r16)              _BFGET_(r16, 1, 1)
    #define   SET16VMETA_CTL_OTP_DISABLE_ENC(r16,v)            _BFSET_(r16, 1, 1,v)

            UNSG32 u_OTP_DISABLE_MPEG2_DEC                     :  1;
            UNSG32 u_OTP_DISABLE_ENC                           :  1;
            UNSG32 RSVDx0_b2                                   : 30;
    ///////////////////////////////////////////////////////////
    } SIE_VMETA_CTL;

    ///////////////////////////////////////////////////////////
     SIGN32 VMETA_CTL_drvrd(SIE_VMETA_CTL *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 VMETA_CTL_drvwr(SIE_VMETA_CTL *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void VMETA_CTL_reset(SIE_VMETA_CTL *p);
     SIGN32 VMETA_CTL_cmp  (SIE_VMETA_CTL *p, SIE_VMETA_CTL *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define VMETA_CTL_check(p,pie,pfx,hLOG) VMETA_CTL_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define VMETA_CTL_print(p,    pfx,hLOG) VMETA_CTL_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: VMETA_CTL
////////////////////////////////////////////////////////////

//////
/// 
/// $INTERFACE DRMDMX                  biu              (4,4)
///     # # ----------------------------------------------------------
///     @ 0x00000 DTCM                 (P)
///     # 0x00000 dtcm                 
///               $FigoData            dtcm              MEM    [3072]
///     @ 0x08000                      (P)
///     # 0x08000 figoSys              
///               $FigoSys             figoSys           REG          
///     @ 0x0D800 AHBFW                (P)
///     # 0x0D800 ahbFw                
///               $SECHF_ENTRY         ahbFw             REG       [8]
///     @ 0x0D840 AHBFW_CNT            (RW-)
///               %unsigned 32 counter                   0x0
///     @ 0x0D844 JTAGEN               (P)
///     # 0x0D844 jtag                 
///               $JTAGCTL             jtag              REG          
///     @ 0x0D848 SECSAT               (P)
///     # 0x0D848 secStatus            
///               $SECSTATUS           secStatus         REG          
///     @ 0x0D86C OTP                  (P)
///     # 0x0D86C otp                  
///               $OTP                 otp               REG          
///     @ 0x0D880 RNG                  (P)
///     # 0x0D880 rng                  
///               $RNG                 rng               REG          
///     @ 0x0D88C it                   (P)
///               %unsigned 1  bits                      0x0
///                                    ###
///                                    * test bit, write 1 to this bit will trigger dmx interrupt
///                                    ###
///               %%        31         # Stuffing bits...
///     @ 0x0D890 ie                   (P)
///               %unsigned 32 bits                      0x0
///     @ 0x0D894 is                   (R-)
///               %unsigned 32 bits                      0x0
///                                    ###
///                                    * TBD
///                                    ###
///     @ 0x0D898                      (W-)
///     #         # Stuffing bytes...
///               %% 15168
///     @ 0x0E000 SECTION              (P)
///     # 0x0E000 section              
///               $SFRAM               section           MEM          
///     @ 0x10000                      (P)
///     # 0x10000 tsc0                 
///               $TSC                 tsc0              REG          
///     @ 0x100A0                      (P)
///     # 0x100A0 tsc1                 
///               $TSC                 tsc1              REG          
///     @ 0x10140                      (P)
///     # 0x10140 tsc2                 
///               $TSC                 tsc2              REG          
///     @ 0x101E0                      (P)
///     # 0x101E0 tsc3                 
///               $TSC                 tsc3              REG          
///     @ 0x10280 SFCONTROL            (P)
///     # 0x10280 sfc                  
///               $SFCONTROL           sfc               REG          
///     @ 0x10298                      (P)
///     # 0x10298 dvi                  
///               $DrmDmxDviReg        dvi               REG          
///     @ 0x102A4 VMETA_CTL            (P)
///     # 0x102A4 vMeta                
///               $VMETA_CTL           vMeta             REG          
///     @ 0x102A8                      (W-)
///     #         # Stuffing bytes...
///               %% 27328
///     @ 0x11000                      (P)
///     # 0x11000 TspKeyTbl            
///               $RAM1WORD            TspKeyTbl         MEM    [1024]
///     @ 0x12000                      (W-)
///     #         # Stuffing bytes...
///               %% 458752
///     @ 0x20000 ITCM                 (P)
///     # 0x20000 itcm                 
///               $FigoInst            itcm              MEM   [16384]
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:  196608B, bits:   10236b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_DRMDMX
#define h_DRMDMX (){}

    #define     RA_DRMDMX_DTCM                                 0x0000
    #define     RA_DRMDMX_dtcm                                 0x0000
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_figoSys                              0x8000
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_AHBFW                                0xD800
    #define     RA_DRMDMX_ahbFw                                0xD800
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_AHBFW_CNT                            0xD840

    #define     BA_DRMDMX_AHBFW_CNT_counter                    0xD840
    #define     B16DRMDMX_AHBFW_CNT_counter                    0xD840
    #define   LSb32DRMDMX_AHBFW_CNT_counter                       0
    #define   LSb16DRMDMX_AHBFW_CNT_counter                       0
    #define       bDRMDMX_AHBFW_CNT_counter                    32
    #define   MSK32DRMDMX_AHBFW_CNT_counter                       0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_JTAGEN                               0xD844
    #define     RA_DRMDMX_jtag                                 0xD844
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_SECSAT                               0xD848
    #define     RA_DRMDMX_secStatus                            0xD848
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_OTP                                  0xD86C
    #define     RA_DRMDMX_otp                                  0xD86C
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_RNG                                  0xD880
    #define     RA_DRMDMX_rng                                  0xD880
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_it                                   0xD88C

    #define     BA_DRMDMX_it_bits                              0xD88C
    #define     B16DRMDMX_it_bits                              0xD88C
    #define   LSb32DRMDMX_it_bits                                 0
    #define   LSb16DRMDMX_it_bits                                 0
    #define       bDRMDMX_it_bits                              1
    #define   MSK32DRMDMX_it_bits                                 0x00000001
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_ie                                   0xD890

    #define     BA_DRMDMX_ie_bits                              0xD890
    #define     B16DRMDMX_ie_bits                              0xD890
    #define   LSb32DRMDMX_ie_bits                                 0
    #define   LSb16DRMDMX_ie_bits                                 0
    #define       bDRMDMX_ie_bits                              32
    #define   MSK32DRMDMX_ie_bits                                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_is                                   0xD894

    #define     BA_DRMDMX_is_bits                              0xD894
    #define     B16DRMDMX_is_bits                              0xD894
    #define   LSb32DRMDMX_is_bits                                 0
    #define   LSb16DRMDMX_is_bits                                 0
    #define       bDRMDMX_is_bits                              32
    #define   MSK32DRMDMX_is_bits                                 0xFFFFFFFF
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_SECTION                              0xE000
    #define     RA_DRMDMX_section                              0xE000
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_tsc0                                 0x10000
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_tsc1                                 0x100A0
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_tsc2                                 0x10140
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_tsc3                                 0x101E0
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_SFCONTROL                            0x10280
    #define     RA_DRMDMX_sfc                                  0x10280
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_dvi                                  0x10298
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_VMETA_CTL                            0x102A4
    #define     RA_DRMDMX_vMeta                                0x102A4
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_TspKeyTbl                            0x11000
    ///////////////////////////////////////////////////////////
    #define     RA_DRMDMX_ITCM                                 0x20000
    #define     RA_DRMDMX_itcm                                 0x20000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_DRMDMX {
    ///////////////////////////////////////////////////////////
              SIE_FigoData                                     ie_dtcm[3072];
             UNSG8 RSVD_dtcm                                   [8192];
    ///////////////////////////////////////////////////////////
              SIE_FigoSys                                      ie_figoSys;
    ///////////////////////////////////////////////////////////
              SIE_SECHF_ENTRY                                  ie_ahbFw[8];
    ///////////////////////////////////////////////////////////
    #define   GET32DRMDMX_AHBFW_CNT_counter(r32)               _BFGET_(r32,31, 0)
    #define   SET32DRMDMX_AHBFW_CNT_counter(r32,v)             _BFSET_(r32,31, 0,v)

    #define     w32DRMDMX_AHBFW_CNT                            {\
            UNSG32 uAHBFW_CNT_counter                          : 32;\
          }
    union { UNSG32 u32DRMDMX_AHBFW_CNT;
            struct w32DRMDMX_AHBFW_CNT;
          };
    ///////////////////////////////////////////////////////////
              SIE_JTAGCTL                                      ie_jtag;
    ///////////////////////////////////////////////////////////
              SIE_SECSTATUS                                    ie_secStatus;
    ///////////////////////////////////////////////////////////
              SIE_OTP                                          ie_otp;
    ///////////////////////////////////////////////////////////
              SIE_RNG                                          ie_rng;
    ///////////////////////////////////////////////////////////
    #define   GET32DRMDMX_it_bits(r32)                         _BFGET_(r32, 0, 0)
    #define   SET32DRMDMX_it_bits(r32,v)                       _BFSET_(r32, 0, 0,v)
    #define   GET16DRMDMX_it_bits(r16)                         _BFGET_(r16, 0, 0)
    #define   SET16DRMDMX_it_bits(r16,v)                       _BFSET_(r16, 0, 0,v)

    #define     w32DRMDMX_it                                   {\
            UNSG32 uit_bits                                    :  1;\
            UNSG32 RSVDxD88C_b1                                : 31;\
          }
    union { UNSG32 u32DRMDMX_it;
            struct w32DRMDMX_it;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32DRMDMX_ie_bits(r32)                         _BFGET_(r32,31, 0)
    #define   SET32DRMDMX_ie_bits(r32,v)                       _BFSET_(r32,31, 0,v)

    #define     w32DRMDMX_ie                                   {\
            UNSG32 uie_bits                                    : 32;\
          }
    union { UNSG32 u32DRMDMX_ie;
            struct w32DRMDMX_ie;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32DRMDMX_is_bits(r32)                         _BFGET_(r32,31, 0)
    #define   SET32DRMDMX_is_bits(r32,v)                       _BFSET_(r32,31, 0,v)

    #define     w32DRMDMX_is                                   {\
            UNSG32 uis_bits                                    : 32;\
          }
    union { UNSG32 u32DRMDMX_is;
            struct w32DRMDMX_is;
          };
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDxD898                                   [1896];
    ///////////////////////////////////////////////////////////
              SIE_SFRAM                                        ie_section;
    ///////////////////////////////////////////////////////////
              SIE_TSC                                          ie_tsc0;
    ///////////////////////////////////////////////////////////
              SIE_TSC                                          ie_tsc1;
    ///////////////////////////////////////////////////////////
              SIE_TSC                                          ie_tsc2;
    ///////////////////////////////////////////////////////////
              SIE_TSC                                          ie_tsc3;
    ///////////////////////////////////////////////////////////
              SIE_SFCONTROL                                    ie_sfc;
    ///////////////////////////////////////////////////////////
              SIE_DrmDmxDviReg                                 ie_dvi;
    ///////////////////////////////////////////////////////////
              SIE_VMETA_CTL                                    ie_vMeta;
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx102A8                                  [3416];
    ///////////////////////////////////////////////////////////
              SIE_RAM1WORD                                     ie_TspKeyTbl[1024];
    ///////////////////////////////////////////////////////////
             UNSG8 RSVDx12000                                  [57344];
    ///////////////////////////////////////////////////////////
              SIE_FigoInst                                     ie_itcm[16384];
    ///////////////////////////////////////////////////////////
    } SIE_DRMDMX;

    typedef union  T32DRMDMX_AHBFW_CNT
          { UNSG32 u32;
            struct w32DRMDMX_AHBFW_CNT;
                 } T32DRMDMX_AHBFW_CNT;
    typedef union  T32DRMDMX_it
          { UNSG32 u32;
            struct w32DRMDMX_it;
                 } T32DRMDMX_it;
    typedef union  T32DRMDMX_ie
          { UNSG32 u32;
            struct w32DRMDMX_ie;
                 } T32DRMDMX_ie;
    typedef union  T32DRMDMX_is
          { UNSG32 u32;
            struct w32DRMDMX_is;
                 } T32DRMDMX_is;
    ///////////////////////////////////////////////////////////

    typedef union  TDRMDMX_AHBFW_CNT
          { UNSG32 u32[1];
            struct {
            struct w32DRMDMX_AHBFW_CNT;
                   };
                 } TDRMDMX_AHBFW_CNT;
    typedef union  TDRMDMX_it
          { UNSG32 u32[1];
            struct {
            struct w32DRMDMX_it;
                   };
                 } TDRMDMX_it;
    typedef union  TDRMDMX_ie
          { UNSG32 u32[1];
            struct {
            struct w32DRMDMX_ie;
                   };
                 } TDRMDMX_ie;
    typedef union  TDRMDMX_is
          { UNSG32 u32[1];
            struct {
            struct w32DRMDMX_is;
                   };
                 } TDRMDMX_is;

    ///////////////////////////////////////////////////////////
     SIGN32 DRMDMX_drvrd(SIE_DRMDMX *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 DRMDMX_drvwr(SIE_DRMDMX *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void DRMDMX_reset(SIE_DRMDMX *p);
     SIGN32 DRMDMX_cmp  (SIE_DRMDMX *p, SIE_DRMDMX *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define DRMDMX_check(p,pie,pfx,hLOG) DRMDMX_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define DRMDMX_print(p,    pfx,hLOG) DRMDMX_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: DRMDMX
////////////////////////////////////////////////////////////


#ifdef __cplusplus
  }
#endif
#pragma  pack()

#endif
//////
/// ENDOFFILE: drmdmx.h
////////////////////////////////////////////////////////////