/********************************************************************************
 * Marvell GPL License Option
 *
 * If you received this File from Marvell, you may opt to use, redistribute and/or
 * modify this File in accordance with the terms and conditions of the General
 * Public License Version 2, June 1991 (the "GPL License"), a copy of which is
 * available along with the File in the license.txt file or by writing to the Free
 * Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
 * on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
 * DISCLAIMED.  The GPL License provides additional details about this warranty
 * disclaimer.
 ******************************************************************************/

//////
/// don't edit! auto-generated by docc: usbHost.h
////////////////////////////////////////////////////////////
#ifndef usbHost_h
#define usbHost_h (){}


#include "ctypes.h"

#pragma pack(1)
#ifdef __cplusplus
  extern "C" {
#endif

#ifndef _DOCC_H_BITOPS_
#define _DOCC_H_BITOPS_ (){}

    #define _bSETMASK_(b)                                      ((b)<32 ? (1<<((b)&31)) : 0)
    #define _NSETMASK_(msb,lsb)                                (_bSETMASK_((msb)+1)-_bSETMASK_(lsb))
    #define _bCLRMASK_(b)                                      (~_bSETMASK_(b))
    #define _NCLRMASK_(msb,lsb)                                (~_NSETMASK_(msb,lsb))
    #define _BFGET_(r,msb,lsb)                                 (_NSETMASK_((msb)-(lsb),0)&((r)>>(lsb)))
    #define _BFSET_(r,msb,lsb,v)                               do{ (r)&=_NCLRMASK_(msb,lsb); (r)|=_NSETMASK_(msb,lsb)&((v)<<(lsb)); }while(0)

#endif


//////
/// 
/// $INTERFACE usbPhy                  biu              (4,4)
///     ###
///     * PHY Power Control
///     ###
///     # # ----------------------------------------------------------
///     @ 0x00000 PWR_CTRL             (P)
///               %unsigned 1  PU                        0x1
///                                    ###
///                                    * Power up USB XCVR and PLL
///                                    ###
///               %unsigned 1  PU_PLL                    0x1
///                                    ###
///                                    * Power up USB PLL
///                                    ###
///               %unsigned 1  SUSPENDM                  0x1
///                                    ###
///                                    * Turn on/off USB XCVR
///                                    * 0: off
///                                    * 1: on
///                                    ###
///               %unsigned 1  IDDQ_TEST                 0x0
///                                    ###
///                                    * Turn on/off IDDQ TEST
///                                    * 0: off
///                                    * 1: on
///                                    * TEST Group0
///                                    ###
///               %%        28         # Stuffing bits...
///     @ 0x00004 TestGrp_0            (RW)
///               %unsigned 1  REG_DISABLE_EL16          0x0
///                                    ###
///                                    * To disable EL16 compliance test enhancement.
///                                    ###
///               %unsigned 1  REG_VBUSDTC_OUT           0x0
///                                    ###
///                                    * VBUS Detect Signal.
///                                    * 1: VBUS > 0.8V
///                                    * 0: VBUS < 0.6V .
///                                    ###
///               %unsigned 1  REG_TX_BITSTUFF_EN        0x1
///                                    ###
///                                    * Control the TX_BITSTUFF_EN bit in USB PHY
///                                    ###
///               %unsigned 1  REG_TX_BITSTUFF_ENH       0x1
///                                    ###
///                                    * Control the TX_BITSTUFF_ENH bit in USB PHY (not used)
///                                    * *INTERNAL_ONLY**
///                                    * RESERVE Group
///                                    ###
///               %%        28         # Stuffing bits...
///     @ 0x00008 ReserveGrp           (RW)
///               %unsigned 8  PHY_RESERVE_IN            0x0
///                                    ###
///                                    * 8 reserved input pins
///                                    ###
///               %unsigned 8  PHY_RESERVE_OUT           0x0
///                                    ###
///                                    * 8 reserved output pins
///                                    ###
///               %unsigned 16 PHY_MON                   0x0
///                                    ###
///                                    * PHY monitor bus
///                                    ###
///     # # ----------------------------------------------------------
/// $ENDOFINTERFACE  # size:      12B, bits:      40b, padding:     0B
////////////////////////////////////////////////////////////
#ifndef h_usbPhy
#define h_usbPhy (){}

    #define     RA_usbPhy_PWR_CTRL                             0x0000

    #define     BA_usbPhy_PWR_CTRL_PU                          0x0000
    #define     B16usbPhy_PWR_CTRL_PU                          0x0000
    #define   LSb32usbPhy_PWR_CTRL_PU                             0
    #define   LSb16usbPhy_PWR_CTRL_PU                             0
    #define       busbPhy_PWR_CTRL_PU                          1
    #define   MSK32usbPhy_PWR_CTRL_PU                             0x00000001

    #define     BA_usbPhy_PWR_CTRL_PU_PLL                      0x0000
    #define     B16usbPhy_PWR_CTRL_PU_PLL                      0x0000
    #define   LSb32usbPhy_PWR_CTRL_PU_PLL                         1
    #define   LSb16usbPhy_PWR_CTRL_PU_PLL                         1
    #define       busbPhy_PWR_CTRL_PU_PLL                      1
    #define   MSK32usbPhy_PWR_CTRL_PU_PLL                         0x00000002

    #define     BA_usbPhy_PWR_CTRL_SUSPENDM                    0x0000
    #define     B16usbPhy_PWR_CTRL_SUSPENDM                    0x0000
    #define   LSb32usbPhy_PWR_CTRL_SUSPENDM                       2
    #define   LSb16usbPhy_PWR_CTRL_SUSPENDM                       2
    #define       busbPhy_PWR_CTRL_SUSPENDM                    1
    #define   MSK32usbPhy_PWR_CTRL_SUSPENDM                       0x00000004

    #define     BA_usbPhy_PWR_CTRL_IDDQ_TEST                   0x0000
    #define     B16usbPhy_PWR_CTRL_IDDQ_TEST                   0x0000
    #define   LSb32usbPhy_PWR_CTRL_IDDQ_TEST                      3
    #define   LSb16usbPhy_PWR_CTRL_IDDQ_TEST                      3
    #define       busbPhy_PWR_CTRL_IDDQ_TEST                   1
    #define   MSK32usbPhy_PWR_CTRL_IDDQ_TEST                      0x00000008
    ///////////////////////////////////////////////////////////
    #define     RA_usbPhy_TestGrp_0                            0x0004

    #define     BA_usbPhy_TestGrp_0_REG_DISABLE_EL16           0x0004
    #define     B16usbPhy_TestGrp_0_REG_DISABLE_EL16           0x0004
    #define   LSb32usbPhy_TestGrp_0_REG_DISABLE_EL16              0
    #define   LSb16usbPhy_TestGrp_0_REG_DISABLE_EL16              0
    #define       busbPhy_TestGrp_0_REG_DISABLE_EL16           1
    #define   MSK32usbPhy_TestGrp_0_REG_DISABLE_EL16              0x00000001

    #define     BA_usbPhy_TestGrp_0_REG_VBUSDTC_OUT            0x0004
    #define     B16usbPhy_TestGrp_0_REG_VBUSDTC_OUT            0x0004
    #define   LSb32usbPhy_TestGrp_0_REG_VBUSDTC_OUT               1
    #define   LSb16usbPhy_TestGrp_0_REG_VBUSDTC_OUT               1
    #define       busbPhy_TestGrp_0_REG_VBUSDTC_OUT            1
    #define   MSK32usbPhy_TestGrp_0_REG_VBUSDTC_OUT               0x00000002

    #define     BA_usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN         0x0004
    #define     B16usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN         0x0004
    #define   LSb32usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN            2
    #define   LSb16usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN            2
    #define       busbPhy_TestGrp_0_REG_TX_BITSTUFF_EN         1
    #define   MSK32usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN            0x00000004

    #define     BA_usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH        0x0004
    #define     B16usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH        0x0004
    #define   LSb32usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH           3
    #define   LSb16usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH           3
    #define       busbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH        1
    #define   MSK32usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH           0x00000008
    ///////////////////////////////////////////////////////////
    #define     RA_usbPhy_ReserveGrp                           0x0008

    #define     BA_usbPhy_ReserveGrp_PHY_RESERVE_IN            0x0008
    #define     B16usbPhy_ReserveGrp_PHY_RESERVE_IN            0x0008
    #define   LSb32usbPhy_ReserveGrp_PHY_RESERVE_IN               0
    #define   LSb16usbPhy_ReserveGrp_PHY_RESERVE_IN               0
    #define       busbPhy_ReserveGrp_PHY_RESERVE_IN            8
    #define   MSK32usbPhy_ReserveGrp_PHY_RESERVE_IN               0x000000FF

    #define     BA_usbPhy_ReserveGrp_PHY_RESERVE_OUT           0x0009
    #define     B16usbPhy_ReserveGrp_PHY_RESERVE_OUT           0x0008
    #define   LSb32usbPhy_ReserveGrp_PHY_RESERVE_OUT              8
    #define   LSb16usbPhy_ReserveGrp_PHY_RESERVE_OUT              8
    #define       busbPhy_ReserveGrp_PHY_RESERVE_OUT           8
    #define   MSK32usbPhy_ReserveGrp_PHY_RESERVE_OUT              0x0000FF00

    #define     BA_usbPhy_ReserveGrp_PHY_MON                   0x000A
    #define     B16usbPhy_ReserveGrp_PHY_MON                   0x000A
    #define   LSb32usbPhy_ReserveGrp_PHY_MON                      16
    #define   LSb16usbPhy_ReserveGrp_PHY_MON                      0
    #define       busbPhy_ReserveGrp_PHY_MON                   16
    #define   MSK32usbPhy_ReserveGrp_PHY_MON                      0xFFFF0000
    ///////////////////////////////////////////////////////////

    typedef struct SIE_usbPhy {
    ///////////////////////////////////////////////////////////
    #define   GET32usbPhy_PWR_CTRL_PU(r32)                     _BFGET_(r32, 0, 0)
    #define   SET32usbPhy_PWR_CTRL_PU(r32,v)                   _BFSET_(r32, 0, 0,v)
    #define   GET16usbPhy_PWR_CTRL_PU(r16)                     _BFGET_(r16, 0, 0)
    #define   SET16usbPhy_PWR_CTRL_PU(r16,v)                   _BFSET_(r16, 0, 0,v)

    #define   GET32usbPhy_PWR_CTRL_PU_PLL(r32)                 _BFGET_(r32, 1, 1)
    #define   SET32usbPhy_PWR_CTRL_PU_PLL(r32,v)               _BFSET_(r32, 1, 1,v)
    #define   GET16usbPhy_PWR_CTRL_PU_PLL(r16)                 _BFGET_(r16, 1, 1)
    #define   SET16usbPhy_PWR_CTRL_PU_PLL(r16,v)               _BFSET_(r16, 1, 1,v)

    #define   GET32usbPhy_PWR_CTRL_SUSPENDM(r32)               _BFGET_(r32, 2, 2)
    #define   SET32usbPhy_PWR_CTRL_SUSPENDM(r32,v)             _BFSET_(r32, 2, 2,v)
    #define   GET16usbPhy_PWR_CTRL_SUSPENDM(r16)               _BFGET_(r16, 2, 2)
    #define   SET16usbPhy_PWR_CTRL_SUSPENDM(r16,v)             _BFSET_(r16, 2, 2,v)

    #define   GET32usbPhy_PWR_CTRL_IDDQ_TEST(r32)              _BFGET_(r32, 3, 3)
    #define   SET32usbPhy_PWR_CTRL_IDDQ_TEST(r32,v)            _BFSET_(r32, 3, 3,v)
    #define   GET16usbPhy_PWR_CTRL_IDDQ_TEST(r16)              _BFGET_(r16, 3, 3)
    #define   SET16usbPhy_PWR_CTRL_IDDQ_TEST(r16,v)            _BFSET_(r16, 3, 3,v)

    #define     w32usbPhy_PWR_CTRL                             {\
            UNSG32 uPWR_CTRL_PU                                :  1;\
            UNSG32 uPWR_CTRL_PU_PLL                            :  1;\
            UNSG32 uPWR_CTRL_SUSPENDM                          :  1;\
            UNSG32 uPWR_CTRL_IDDQ_TEST                         :  1;\
            UNSG32 RSVDx0_b4                                   : 28;\
          }
    union { UNSG32 u32usbPhy_PWR_CTRL;
            struct w32usbPhy_PWR_CTRL;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32usbPhy_TestGrp_0_REG_DISABLE_EL16(r32)      _BFGET_(r32, 0, 0)
    #define   SET32usbPhy_TestGrp_0_REG_DISABLE_EL16(r32,v)    _BFSET_(r32, 0, 0,v)
    #define   GET16usbPhy_TestGrp_0_REG_DISABLE_EL16(r16)      _BFGET_(r16, 0, 0)
    #define   SET16usbPhy_TestGrp_0_REG_DISABLE_EL16(r16,v)    _BFSET_(r16, 0, 0,v)

    #define   GET32usbPhy_TestGrp_0_REG_VBUSDTC_OUT(r32)       _BFGET_(r32, 1, 1)
    #define   SET32usbPhy_TestGrp_0_REG_VBUSDTC_OUT(r32,v)     _BFSET_(r32, 1, 1,v)
    #define   GET16usbPhy_TestGrp_0_REG_VBUSDTC_OUT(r16)       _BFGET_(r16, 1, 1)
    #define   SET16usbPhy_TestGrp_0_REG_VBUSDTC_OUT(r16,v)     _BFSET_(r16, 1, 1,v)

    #define   GET32usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN(r32)    _BFGET_(r32, 2, 2)
    #define   SET32usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN(r32,v)  _BFSET_(r32, 2, 2,v)
    #define   GET16usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN(r16)    _BFGET_(r16, 2, 2)
    #define   SET16usbPhy_TestGrp_0_REG_TX_BITSTUFF_EN(r16,v)  _BFSET_(r16, 2, 2,v)

    #define   GET32usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH(r32)   _BFGET_(r32, 3, 3)
    #define   SET32usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH(r32,v) _BFSET_(r32, 3, 3,v)
    #define   GET16usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH(r16)   _BFGET_(r16, 3, 3)
    #define   SET16usbPhy_TestGrp_0_REG_TX_BITSTUFF_ENH(r16,v) _BFSET_(r16, 3, 3,v)

    #define     w32usbPhy_TestGrp_0                            {\
            UNSG32 uTestGrp_0_REG_DISABLE_EL16                 :  1;\
            UNSG32 uTestGrp_0_REG_VBUSDTC_OUT                  :  1;\
            UNSG32 uTestGrp_0_REG_TX_BITSTUFF_EN               :  1;\
            UNSG32 uTestGrp_0_REG_TX_BITSTUFF_ENH              :  1;\
            UNSG32 RSVDx4_b4                                   : 28;\
          }
    union { UNSG32 u32usbPhy_TestGrp_0;
            struct w32usbPhy_TestGrp_0;
          };
    ///////////////////////////////////////////////////////////
    #define   GET32usbPhy_ReserveGrp_PHY_RESERVE_IN(r32)       _BFGET_(r32, 7, 0)
    #define   SET32usbPhy_ReserveGrp_PHY_RESERVE_IN(r32,v)     _BFSET_(r32, 7, 0,v)
    #define   GET16usbPhy_ReserveGrp_PHY_RESERVE_IN(r16)       _BFGET_(r16, 7, 0)
    #define   SET16usbPhy_ReserveGrp_PHY_RESERVE_IN(r16,v)     _BFSET_(r16, 7, 0,v)

    #define   GET32usbPhy_ReserveGrp_PHY_RESERVE_OUT(r32)      _BFGET_(r32,15, 8)
    #define   SET32usbPhy_ReserveGrp_PHY_RESERVE_OUT(r32,v)    _BFSET_(r32,15, 8,v)
    #define   GET16usbPhy_ReserveGrp_PHY_RESERVE_OUT(r16)      _BFGET_(r16,15, 8)
    #define   SET16usbPhy_ReserveGrp_PHY_RESERVE_OUT(r16,v)    _BFSET_(r16,15, 8,v)

    #define   GET32usbPhy_ReserveGrp_PHY_MON(r32)              _BFGET_(r32,31,16)
    #define   SET32usbPhy_ReserveGrp_PHY_MON(r32,v)            _BFSET_(r32,31,16,v)
    #define   GET16usbPhy_ReserveGrp_PHY_MON(r16)              _BFGET_(r16,15, 0)
    #define   SET16usbPhy_ReserveGrp_PHY_MON(r16,v)            _BFSET_(r16,15, 0,v)

    #define     w32usbPhy_ReserveGrp                           {\
            UNSG32 uReserveGrp_PHY_RESERVE_IN                  :  8;\
            UNSG32 uReserveGrp_PHY_RESERVE_OUT                 :  8;\
            UNSG32 uReserveGrp_PHY_MON                         : 16;\
          }
    union { UNSG32 u32usbPhy_ReserveGrp;
            struct w32usbPhy_ReserveGrp;
          };
    ///////////////////////////////////////////////////////////
    } SIE_usbPhy;

    typedef union  T32usbPhy_PWR_CTRL
          { UNSG32 u32;
            struct w32usbPhy_PWR_CTRL;
                 } T32usbPhy_PWR_CTRL;
    typedef union  T32usbPhy_TestGrp_0
          { UNSG32 u32;
            struct w32usbPhy_TestGrp_0;
                 } T32usbPhy_TestGrp_0;
    typedef union  T32usbPhy_ReserveGrp
          { UNSG32 u32;
            struct w32usbPhy_ReserveGrp;
                 } T32usbPhy_ReserveGrp;
    ///////////////////////////////////////////////////////////

    typedef union  TusbPhy_PWR_CTRL
          { UNSG32 u32[1];
            struct {
            struct w32usbPhy_PWR_CTRL;
                   };
                 } TusbPhy_PWR_CTRL;
    typedef union  TusbPhy_TestGrp_0
          { UNSG32 u32[1];
            struct {
            struct w32usbPhy_TestGrp_0;
                   };
                 } TusbPhy_TestGrp_0;
    typedef union  TusbPhy_ReserveGrp
          { UNSG32 u32[1];
            struct {
            struct w32usbPhy_ReserveGrp;
                   };
                 } TusbPhy_ReserveGrp;

    ///////////////////////////////////////////////////////////
     SIGN32 usbPhy_drvrd(SIE_usbPhy *p, UNSG32 base, SIGN32 mem, SIGN32 tst);
     SIGN32 usbPhy_drvwr(SIE_usbPhy *p, UNSG32 base, SIGN32 mem, SIGN32 tst, UNSG32 *pcmd);
       void usbPhy_reset(SIE_usbPhy *p);
     SIGN32 usbPhy_cmp  (SIE_usbPhy *p, SIE_usbPhy *pie, char *pfx, void *hLOG, SIGN32 mem, SIGN32 tst);
    #define usbPhy_check(p,pie,pfx,hLOG) usbPhy_cmp(p,pie,pfx,(void*)(hLOG),0,0)
    #define usbPhy_print(p,    pfx,hLOG) usbPhy_cmp(p,0,  pfx,(void*)(hLOG),0,0)

#endif
//////
/// ENDOFINTERFACE: usbPhy
////////////////////////////////////////////////////////////


#ifdef __cplusplus
  }
#endif
#pragma  pack()

#endif
//////
/// ENDOFFILE: usbHost.h
////////////////////////////////////////////////////////////