/*
 * Copyright (C) 2018 Synaptics Incorporated. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND
 * SYNAPTICS EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES,
 * INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE, AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY
 * INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT SHALL SYNAPTICS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, OR
 * CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH THE USE
 * OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED AND
 * BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS
 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF
 * COMPETENT JURISDICTION DOES NOT PERMIT THE DISCLAIMER OF DIRECT
 * DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS' TOTAL CUMULATIVE LIABILITY
 * TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S. DOLLARS.
 */
#ifndef _DIAG_MISC_H_
#define _DIAG_MISC_H_

/************************************************************
    clock
************************************************************/
#define CPU_CLOCK_KHZ               A_F_V((1800*1000),  (1800*1000/100),  180)     // real test value for FPGA and Veloce
#define CPU_CLOCK_VIRTUAL_KHZ       1800000
// SM CLOCK for sm timer, sm cpu, sm uart
#define SM_CLOCK_KHZ                (25*1000)
#define SM_CLOCK_KHZ_REAL           A_F_V((25*1000),    (25*1000),  (9600*16/1000))
// apb core clock for soc timer, spi, i2c, ...
#define CONFIG_CLOCK_KHZ            (100*1000)
#define CONFIG_CLOCK_KHZ_REAL       A_F_V((100*1000),   (100*10),     10)      // real test value for FPGA and Veloce
#define GENERIC_TIMER_CLOCK_KHZ         (25*1000)
#define GENERIC_TIMER_CLOCK_KHZ_REAL    A_F_V((25*1000),    (25*10),  (3))

/************************************************************
    delay
************************************************************/
#define delay_1us(us)       diag_delay_us(us)
#define delay_1ms(ms)       diag_delay_us((ms)*1000)

/************************************************************
    Diag memory pool for NCNB
************************************************************/
#define BUFFPOOL_TAG_NNA       	1
#define BUFFPOOL_TAG_ETH        2
#define BUFFPOOL_TAG_USB2       3
#define BUFFPOOL_TAG_SATA       4
#define BUFFPOOL_TAG_USB3       5
#define BUFFPOOL_TAG_TSP        6
#define BUFFPOOL_TAG_I2S        7
#define BUFFPOOL_TAG_USIM       8
#define BUFFPOOL_TAG_OVP        9
#define BUFFPOOL_TAG_NVME       10
#define BUFFPOOL_TAG_PB         11
#define BUFFPOOL_TAG_CPUPI	12
#define BUFFPOOL_TAG_NAND       13

extern int diag_buffpool_init(unsigned int start, int size, int block_size);
extern unsigned int diag_buffpool_alloc(int size, unsigned char tag);
extern unsigned int diag_buffpool_free(unsigned int addr, unsigned char tag);
extern uint32_t getMPid(void);
extern void diag_delay_us(unsigned int);        // in vitual world

#endif // _DIAG_MISC_H_