/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

/dts-v1/;

#include "ipq5018.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. IPQ5018/SIROCCO-P0";
	compatible = "qcom,sirocco-p0", "qcom,ipq5018";

	aliases {
		serial0 = &blsp1_uart1;
		ethernet0 = "/soc/dp1";
		ethernet1 = "/soc/dp2";
	};

	chosen {
		bootargs-append = " swiotlb=1 coherent_pool=2M clk_ignore_unused";
	};

	reserved-memory {
		q6_mem_regions: q6_mem_regions@4B000000 {
			no-map;
			reg = <0x0 0x4B000000 0x0 0x5400000>;
		};

		q6_etr_region: q6_etr_dump@4D300000 {
			no-map;
			reg = <0x0 0x4D300000 0x0 0x100000>;
		};

		q6_caldb_region: q6_caldb_region@4D400000 {
			no-map;
			reg = <0x0 0x4D400000 0x0 0x200000>;
		};

		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
			no-map;
			reg = <0x0 0x4E700000 0x0 0x100000>;
		};

		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
			no-map;
			reg = <0x0 0x4FE00000 0x0 0x100000>;
		};
	};
};

&soc {
	dp1 {
		device_type = "network";
		compatible = "qcom,nss-dp";
		clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
		clock-names = "nss-snoc-gmac-axi-clk";
		qcom,id = <1>;
		reg = <0x39C00000 0x10000>;
		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
		qcom,mactype = <2>;
		qcom,link-poll = <1>;
		qcom,phy-mdio-addr = <7>;
		mdio-bus = <&mdio0>;
		local-mac-address = [000000000000];
		phy-mode = "sgmii";
		qcom,rx-page-mode = <0>;
	};

	dp2 {
		device_type = "network";
		compatible = "qcom,nss-dp";
		clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
		clock-names = "nss-snoc-gmac-axi-clk";
		qcom,id = <2>;
		reg = <0x39D00000 0x10000>;
		interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
		qcom,mactype = <2>;
		qcom,link-poll = <1>;
		qcom,phy-mdio-addr = <0>;
		mdio-bus = <&mdio1>;
		local-mac-address = [000000000000];
		phy-mode = "sgmii";
		qcom,rx-page-mode = <0>;
	};
};

&mdio0 {
	       status = "ok";

	       ethernet-phy@0 {
		       reg = <7>;
	       };
       };

&mdio1 {
	       status = "ok";
	       pinctrl-0 = <&mdio1_pins &phy_pins>;
	       pinctrl-names = "default";
	       phy-reset-gpio = <&tlmm 26 0>;

	       ethernet-phy@0 {
		       reg = <0>;
	       };
       };

&ess_instance {
	num_devices = <0x1>;
	ess-switch@0x39c00000 {
		switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
		cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
		qcom,port_phyinfo {
			port@0 {
				port_id = <1>;
				phy_address = <7>;
				mdiobus = <&mdio0>;
			};
			port@1 {
				port_id = <2>;
				phy_address = <0x0>;
				mdiobus = <&mdio1>;
			};
		};
	};
};

&blsp1_uart1 {
	pinctrl-0 = <&serial_1_pins>;
	pinctrl-names = "default";
	status = "ok";
};

&sdhc_1 {
	pinctrl-0 = <&sdc_pins>;
	pinctrl-names = "default";
	qcom,clk-rates = <400000 25000000 50000000 100000000 \
			  192000000>;
	qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
	qcom,nonremovable;
	status = "ok";
};

&tlmm {
	serial_1_pins: serial1-pinmux {
		pins = "gpio28", "gpio29";
		function = "blsp0_uart1";
		drive-strength = <8>;
		bias-pull-down;
	};

	sdc_pins: sdc_pins {
		sdc_clk {
			pins = "gpio9";
			function = "sdc1_clk";
			drive-strength = <8>;
			bias-disable;
		};
		sdc_cmd {
			pins = "gpio8";
			function = "sdc1_cmd";
			drive-strength = <8>;
			bias-pull-up;
		};
		sdc_data0 {
			pins = "gpio7";
			function = "sdc10";
			drive-strength = <8>;
			bias-disable;
		};
		sdc_data1 {
			pins = "gpio6";
			function = "sdc11";
			drive-strength = <8>;
			bias-disable;
		};
		sdc_data2 {
			pins = "gpio5";
			function = "sdc12";
			drive-strength = <8>;
			bias-disable;
		};
		sdc_data3 {
			pins = "gpio4";
			function = "sdc13";
			drive-strength = <8>;
			bias-disable;
		};
	};

	blsp0_spi_pins: blsp0_spi_pins {
		mux {
			pins = "gpio10", "gpio11", "gpio12", "gpio13";
			function = "blsp0_spi";
			drive-strength = <2>;
			bias-disable;
		};
	};

	i2c_pins: i2c_pins {
		i2c_scl {
			pins = "gpio33";
			function = "blsp2_i2c0";
			drive-strength = <8>;
			bias-disable;
		};

		i2c_sda {
			pins = "gpio34";
			function = "blsp2_i2c0";
			drive-strength = <8>;
			bias-disable;
		};
	};

	phy_pins: phy_pins {
			  phy_intr {
				  pins = "gpio46";
				  function = "gpio";
				  drive-strength = <8>;
				  bias-disable;
			  };
			  phy_reset {
				  pins = "gpio26";
				  function = "gpio";
				  drive-strength = <8>;
				  bias-pull-down;
				  output-low;
			  };
		  };

	mdio1_pins: mdio_pinmux {
			    mux_0 {
				    pins = "gpio36";
				    function = "mdc";
				    drive-strength = <8>;
				    bias-pull-up;
			    };

			    mux_1 {
				    pins = "gpio37";
				    function = "mdio";
				    drive-strength = <8>;
				    bias-pull-up;
			    };
		    };

	btss_pins: btss_pins {
		   mux_0 {
			   pins = "gpio23";
			   function = "btss";
			   bias-pull-down;
		   };

		   mux_1 {
			   pins = "gpio24";
			   function = "btss";
			   bias-pull-down;
		   };

		   mux_2 {
			   pins = "gpio25";
			   function = "btss";
			   bias-pull-down;
		   };

		   mux_3 {
			   pins = "gpio27";
			   function = "btss";
			   bias-pull-down;
		   };
	   };
};

&q6v5_wcss {
	compatible = "qcom,ipq5018-q6-mpd";
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;
	firmware = "IPQ5018/q6_fw.mdt";
	reg = <0x0cd00000 0x4040>,
		<0x1938000 0x8>,
		<0x193d204 0x4>;
	reg-names = "qdsp6",
			"tcsr-msip",
			"tcsr-q6";
	resets = <&gcc GCC_WCSSAON_RESET>,
			<&gcc GCC_WCSS_Q6_BCR>;

	reset-names = "wcss_aon_reset",
			"wcss_q6_reset";

	clocks = <&gcc GCC_Q6_AXIS_CLK>,
		<&gcc GCC_WCSS_ECAHB_CLK>,
		<&gcc GCC_Q6_AXIM_CLK>,
		<&gcc GCC_Q6_AXIM2_CLK>,
		<&gcc GCC_Q6_AHB_CLK>,
		<&gcc GCC_Q6_AHB_S_CLK>,
		<&gcc GCC_WCSS_AXI_S_CLK>;
	clock-names = "gcc_q6_axis_clk",
		"gcc_wcss_ecahb_clk",
		"gcc_q6_axim_clk",
		"gcc_q6_axim2_clk",
		"gcc_q6_ahb_clk",
		"gcc_q6_ahb_s_clk",
		"gcc_wcss_axi_s_clk";

	memory-region = <&q6_mem_regions>, <&q6_etr_region>, <&q6_caldb_region>,
			<&q6_qcn6122_etr_1>, <&q6_qcn6122_etr_2>;

	qcom,rproc = <&q6v5_wcss>;

	qcom,bootargs_smem = <507>;
	boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
			<0x2 0x4 0x2 0x12 0x0 0x0>;

	status = "ok";
	q6_wcss_pd1: remoteproc_pd1 {
		compatible = "qcom,ipq5018-wcss-ahb-mpd";
		reg = <0x4ab000 0x20>;
		reg-names = "rmb";
		firmware = "IPQ5018/q6_fw.mdt";
		m3_firmware = "IPQ5018/m3_fw.mdt";
		interrupts-extended = <&wcss_smp2p_in 8 0>,
					<&wcss_smp2p_in 9 0>,
					<&wcss_smp2p_in 12 0>,
					<&wcss_smp2p_in 11 0>;
		interrupt-names = "fatal",
					"ready",
					"spawn-ack",
					"stop-ack";

		resets = <&gcc GCC_WCSSAON_RESET>,
				<&gcc GCC_WCSS_BCR>,
				<&gcc GCC_CE_BCR>;
		reset-names = "wcss_aon_reset",
				"wcss_reset",
				"ce_reset";

		clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
				<&gcc GCC_WCSS_ACMT_CLK>,
				<&gcc GCC_WCSS_AXI_M_CLK>;
		clock-names = "gcc_wcss_ahb_s_clk",
					"gcc_wcss_acmt_clk",
					"gcc_wcss_axi_m_clk";

		qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;

		qcom,smem-states = <&wcss_smp2p_out 8>,
					<&wcss_smp2p_out 9>,
					<&wcss_smp2p_out 10>;
		qcom,smem-state-names = "shutdown",
					"stop",
					"spawn";
	};

	q6_wcss_pd2: remoteproc_pd2 {
		compatible = "qcom,ipq5018-wcss-pcie-mpd";
		firmware = "IPQ5018/q6_fw.mdt";
		m3_firmware = "qcn6122/m3_fw.mdt";
		interrupts-extended = <&wcss_smp2p_in 16 0>,
					<&wcss_smp2p_in 17 0>,
					<&wcss_smp2p_in 20 0>,
					<&wcss_smp2p_in 19 0>;
		interrupt-names = "fatal",
					"ready",
					"spawn-ack",
					"stop-ack";

		qcom,smem-states = <&wcss_smp2p_out 16>,
					<&wcss_smp2p_out 17>,
					<&wcss_smp2p_out 18>;
		qcom,smem-state-names = "shutdown",
					"stop",
					"spawn";
	};

	q6_wcss_pd3: remoteproc_pd3 {
		compatible = "qcom,ipq5018-wcss-pcie-mpd";
		firmware = "IPQ5018/q6_fw.mdt";
		interrupts-extended = <&wcss_smp2p_in 24 0>,
					<&wcss_smp2p_in 25 0>,
					<&wcss_smp2p_in 28 0>,
					<&wcss_smp2p_in 27 0>;
		interrupt-names = "fatal",
					"ready",
					"spawn-ack",
					"stop-ack";

		qcom,smem-states = <&wcss_smp2p_out 24>,
					<&wcss_smp2p_out 25>,
					<&wcss_smp2p_out 26>;
		qcom,smem-state-names = "shutdown",
					"stop",
					"spawn";
	};
};

&spi_0 {
	pinctrl-0 = <&blsp0_spi_pins>;
	pinctrl-names = "default";
	cs-select = <0>;
	status = "ok";

	spi@0 {
		compatible = "qti,spidev";
		reg = <0>;
		spi-max-frequency = <50000000>;
	};
};

&i2c_0 {
	pinctrl-0 = <&i2c_pins>;
	pinctrl-names = "default";
	status = "ok";

	ina231: ina231@40 {
		compatible = "ti,ina231";
		reg = <0x40>;
		shunt-resistor = <10000>;
	};

	tmp108@48 {
		compatible = "ti,tmp108";
		reg = <0x48>;
	};

	tmp108@49 {
		compatible = "ti,tmp108";
		reg = <0x49>;
	};

	tmp108@4a {
		compatible = "ti,tmp108";
		reg = <0x4a>;
	};

	tmp108@4b {
		compatible = "ti,tmp108";
		reg = <0x4b>;
	};
};

&dwc_0 {
	/delete-property/ #phy-cells;
	/delete-property/ phys;
	/delete-property/ phy-names;
};

&wifi0 {
	/* IPQ5018 */
	qcom,multipd_arch;
	qcom,btcoex;
	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
	qcom,rproc = <&q6_wcss_pd1>;
	qcom,tgt-mem-mode = <1>;
	qcom,board_id = <0x24>;
	qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
	qcom,caldb-addr = <0x4D400000>;
	m3-dump-addr = <0x4D200000>;
	qcom,caldb-size = <0x200000>;
	status = "ok";
};

&wifi1 {
	/* QCN6122 5G */
	qcom,multipd_arch;
	qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
	qcom,rproc = <&q6_wcss_pd2>;
	qcom,tgt-mem-mode = <1>;
	qcom,board_id = <0x60>;
	qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
	qcom,caldb-addr = <0x4E800000>;
	m3-dump-addr = <0x4E600000>;
	qcom,caldb-size = <0x500000>;
	status = "ok";
};

&wifi2 {
	/* QCN6122 6G */
	qcom,multipd_arch;
	qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
	qcom,rproc = <&q6_wcss_pd3>;
	qcom,tgt-mem-mode = <1>;
	qcom,board_id = <0xb0>;
	qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
	qcom,caldb-addr = <0x4FF00000>;
	m3-dump-addr = <0x4FD00000>;
	qcom,caldb-size = <0x500000>;
	status = "ok";
};

&bt {
	pinctrl-0 = <&btss_pins>;
	pinctrl-names = "default";
};