/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
 */

#ifndef _ATH11K_DEBUGFS_H_
#define _ATH11K_DEBUGFS_H_

#include "hal_tx.h"

#define ATH11K_TX_POWER_MAX_VAL	70
#define ATH11K_TX_POWER_MIN_VAL	0
#define ATH11K_DEBUG_ENABLE_MEMORY_STATS 1

/* htt_dbg_ext_stats_type */
enum ath11k_dbg_htt_ext_stats_type {
	ATH11K_DBG_HTT_EXT_STATS_RESET                      =  0,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_TX                    =  1,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_RX                    =  2,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_TX_HWQ                =  3,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_TX_SCHED              =  4,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_ERROR                 =  5,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_TQM                   =  6,
	ATH11K_DBG_HTT_EXT_STATS_TQM_CMDQ                   =  7,
	ATH11K_DBG_HTT_EXT_STATS_TX_DE_INFO                 =  8,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_TX_RATE               =  9,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_RX_RATE               =  10,
	ATH11K_DBG_HTT_EXT_STATS_PEER_INFO                  =  11,
	ATH11K_DBG_HTT_EXT_STATS_TX_SELFGEN_INFO            =  12,
	ATH11K_DBG_HTT_EXT_STATS_TX_MU_HWQ                  =  13,
	ATH11K_DBG_HTT_EXT_STATS_RING_IF_INFO               =  14,
	ATH11K_DBG_HTT_EXT_STATS_SRNG_INFO                  =  15,
	ATH11K_DBG_HTT_EXT_STATS_SFM_INFO                   =  16,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_TX_MU                 =  17,
	ATH11K_DBG_HTT_EXT_STATS_ACTIVE_PEERS_LIST          =  18,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_CCA_STATS             =  19,
	ATH11K_DBG_HTT_EXT_STATS_TWT_SESSIONS               =  20,
	ATH11K_DBG_HTT_EXT_STATS_REO_RESOURCE_STATS         =  21,
	ATH11K_DBG_HTT_EXT_STATS_TX_SOUNDING_INFO           =  22,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_OBSS_PD_STATS         =  23,
	ATH11K_DBG_HTT_EXT_STATS_RING_BACKPRESSURE_STATS    =  24,
	ATH11K_DBG_HTT_EXT_STATS_LATENCY_PROF_STATS         =  25,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_UL_TRIG_STATS         =  26,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS  =  27,
	ATH11K_DBG_HTT_EXT_STATS_FSE_RX                     =  28,
	ATH11K_DBG_HTT_EXT_STATS_PEER_CTRL_PATH_TXRX_STATS  =  29,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_RX_RATE_EXT           =  30,
	ATH11K_DBG_HTT_EXT_STATS_PDEV_TX_RATE_TXBF_STATS    =  31,
	ATH11K_DBG_HTT_EXT_STATS_TXBF_OFDMA		    =  32,
	ATH11K_DBG_HTT_EXT_STA_11AX_UL_STATS                =  33,
	ATH11K_DBG_HTT_EXT_VDEV_RTT_RESP_STATS              =  34,
	ATH11K_DBG_HTT_EXT_PKTLOG_AND_HTT_RING_STATS        =  35,
	ATH11K_DBG_HTT_EXT_DLPAGER_STATS                    =  36,
	ATH11K_DBG_HTT_EXT_PHY_COUNTERS_AND_PHY_STATS	    =  37,

	/* keep this last */
	ATH11K_DBG_HTT_NUM_EXT_STATS,
};

#define ATH11K_CCK_RATES			4
#define ATH11K_OFDM_RATES			8
#define AT11K_HT_RATES				8
/* VHT rates includes extra MCS. sent by FW */
#define ATH11K_VHT_RATES			12
#define ATH11K_HE_RATES				12
#define ATH11K_HE_RATES_WITH_EXTRA_MCS		14
#define ATH11K_NSS_1				1
#define ATH11K_NSS_4				4
#define ATH11K_NSS_8				8
#define TPC_STATS_WAIT_TIME			(1 * HZ)
#define MAX_TPC_PREAM_STR_LEN			7
/* Max negative power value to indicate error */
#define TPC_INVAL				-128
#define TPC_MAX					127
#define TPC_STATS_TOT_ROW			700
#define TPC_STATS_TOT_COLUMN			100
#define ATH11K_TPC_STATS_BUF_SIZE   (TPC_STATS_TOT_ROW * TPC_STATS_TOT_COLUMN)

#define ATH11K_DRV_TX_STATS_SIZE      1024

enum ath11k_debug_tpc_stats_type {
	ATH11K_DBG_TPC_STATS_SU,
	ATH11K_DBG_TPC_STATS_SU_WITH_TXBF,
	ATH11K_DBG_TPC_STATS_MU,
	ATH11K_DBG_TPC_STATS_MU_WITH_TXBF,
	/*last*/
	ATH11K_DBG_TPC_MAX_STATS,
};

enum ath11k_debug_tpc_stats_ctl_mode {
	ATH11K_TPC_STATS_CTL_MODE_CCK,
	ATH11K_TPC_STATS_CTL_MODE_OFDM,
	ATH11K_TPC_STATS_CTL_MODE_BW_20,
	ATH11K_TPC_STATS_CTL_MODE_BW_40,
	ATH11K_TPC_STATS_CTL_MODE_BW_80,
	ATH11K_TPC_STATS_CTL_MODE_BW_160,
};

#define ATH11K_DBR_DEUBG_ENTRIES_MAX 512

enum ath11k_db_ring_dbg_event {
	DBR_RING_DEBUG_EVENT_INVALID,
	DBR_RING_DEBUG_EVENT_RX,
	DBR_RING_DEBUG_EVENT_REPLENISH,
	DBR_RING_DEBUG_EVENT_MAX,
};

struct ath11k_db_ring_debug_entry {
	u32 hp;
	u32 tp;
	u64 timestamp;
	enum ath11k_db_ring_dbg_event event;
};

struct ath11k_db_ring_debug {
	struct ath11k_db_ring_debug_entry *entries;
	u32 db_ring_debug_idx;
	u32 num_ring_debug_entries;
};

struct ath11k_db_module_debug {
	struct ath11k_db_ring_debug db_ring_debug;
	struct dentry *module_debugfs;
	bool db_ring_debug_enabled;
};

struct debug_htt_stats_req {
	bool done;
	u8 pdev_id;
	u8 type;
	u8 peer_addr[ETH_ALEN];
	struct completion cmpln;
	u32 buf_len;
	u8 buf[];
};

struct ath_pktlog_hdr {
	u16 flags;
	u16 missed_cnt;
	u16 log_type;
	u16 size;
	u32 timestamp;
	u32 type_specific_data;
	u8 payload[];
};

#define ATH11K_HTT_PEER_STATS_RESET BIT(16)

#define ATH11K_HTT_STATS_BUF_SIZE (1024 * 512)
#define ATH11K_FW_STATS_BUF_SIZE (1024 * 1024)

enum ath11k_pktlog_filter {
	ATH11K_PKTLOG_RX		= 0x000000001,
	ATH11K_PKTLOG_TX		= 0x000000002,
	ATH11K_PKTLOG_RCFIND		= 0x000000004,
	ATH11K_PKTLOG_RCUPDATE		= 0x000000008,
	ATH11K_PKTLOG_EVENT_SMART_ANT	= 0x000000020,
	ATH11K_PKTLOG_EVENT_SW		= 0x000000040,
	ATH11K_PKTLOG_ANY		= 0x00000006f,
};

enum ath11k_pktlog_mode {
	ATH11K_PKTLOG_MODE_LITE = 1,
	ATH11K_PKTLOG_MODE_FULL = 2,
};

enum ath11k_pktlog_enum {
	ATH11K_PKTLOG_TYPE_TX_CTRL      = 1,
	ATH11K_PKTLOG_TYPE_TX_STAT      = 2,
	ATH11K_PKTLOG_TYPE_TX_MSDU_ID   = 3,
	ATH11K_PKTLOG_TYPE_RX_STAT      = 5,
	ATH11K_PKTLOG_TYPE_RC_FIND      = 6,
	ATH11K_PKTLOG_TYPE_RC_UPDATE    = 7,
	ATH11K_PKTLOG_TYPE_TX_VIRT_ADDR = 8,
	ATH11K_PKTLOG_TYPE_RX_CBF       = 10,
	ATH11K_PKTLOG_TYPE_RX_STATBUF   = 22,
	ATH11K_PKTLOG_TYPE_PPDU_STATS   = 23,
	ATH11K_PKTLOG_TYPE_LITE_RX      = 24,
};

enum ath11k_dbg_aggr_mode {
	ATH11K_DBG_AGGR_MODE_AUTO,
	ATH11K_DBG_AGGR_MODE_MANUAL,
	ATH11K_DBG_AGGR_MODE_MAX,
};

#ifdef CONFIG_MAC80211_DEBUGFS
void ath11k_debugfs_twt(struct ath11k_vif *arvif, bool enable);
void ath11k_debugfs_dbg_mac_filter(struct ath11k_vif *arvif);
#else
static inline void ath11k_debugfs_twt(struct ath11k_vif *arvif, bool enable)
{

}

static void ath11k_debugfs_dbg_mac_filter(struct ath11k_vif *arvif)
{
}
#endif

void ath11k_debugfs_wbm_tx_comp_stats(struct ath11k_vif *arvif);
void ath11k_debug_aggr_size_config_init(struct ath11k_vif *arvif);
void ath11k_debugfs_wmi_ctrl_stats(struct ath11k_vif *arvif);
void ath11k_wmi_crl_path_stats_list_free(struct list_head *head);

#ifdef CONFIG_ATH11K_DEBUGFS
#define ATH11K_MEMORY_STATS_INC(_struct, _field, _size)			\
do {									\
	if (ath11k_debug_is_memory_stats_enabled(_struct)) 		\
		atomic_add(_size, &_struct->memory_stats._field);	\
} while(0)

#define ATH11K_MEMORY_STATS_DEC(_struct, _field, _size)			\
do {									\
	if (ath11k_debug_is_memory_stats_enabled(_struct))		\
		atomic_sub(_size, &_struct->memory_stats._field);	\
} while(0)

#else
#define ATH11K_MEMORY_STATS_INC(_struct, _field, _size)
#define ATH11K_MEMORY_STATS_DEC(_struct, _field, _size)
#endif

#define ATH11K_ANI_LEVEL_MAX         30
#define ATH11K_ANI_LEVEL_MIN         -5
#define ATH11K_ANI_LEVEL_AUTO        0x80
#define ATH11K_ANI_POLL_PERIOD_MAX   3000
#define ATH11K_ANI_LISTEN_PERIOD_MAX 3000

#define ATH11K_AMPDU_SUBFRAME_COUNT_MAX 64
#define ATH11K_AMPDU_SUBFRAME_COUNT_MIN 1

#define ATH11K_AGGR_BURST_AC GENMASK(31, 24)
#define ATH11K_AGGR_BURST_DUR GENMASK(23, 0)

/* burst duration in usec */
#define MIN_BURST_DUR 0
#define MAX_BURST_DUR 8000

#define ATH11K_MAX_AGGR_RETRY_COUNT 255
#define ATH11K_AGGR_SW_RETRY_THRESHOLD 50

#ifdef CONFIG_ATH11K_DEBUGFS
int ath11k_debugfs_create(void);
void ath11k_debugfs_destroy(void);
int ath11k_debugfs_soc_create(struct ath11k_base *ab);
void ath11k_debugfs_soc_destroy(struct ath11k_base *ab);
int ath11k_debugfs_pdev_create(struct ath11k_base *ab);
void ath11k_debugfs_pdev_destroy(struct ath11k_base *ab);
int ath11k_debugfs_register(struct ath11k *ar);
void ath11k_debugfs_unregister(struct ath11k *ar);
void ath11k_debugfs_fw_stats_process(struct ath11k *ar, struct ath11k_fw_stats *stats);

void ath11k_debugfs_fw_stats_init(struct ath11k *ar);
void ath11k_init_tx_latency_stats(struct ath11k *ar);
void ath11k_smart_ant_debugfs_init(struct ath11k *ar);
ssize_t ath11k_debugfs_dump_soc_ring_bp_stats(struct ath11k_base *ab,
					    char *buf, int size);
void ath11k_dbring_add_debug_entry(struct ath11k *ar,
				   enum wmi_direct_buffer_module id,
				   enum ath11k_db_ring_dbg_event event,
				   struct hal_srng *srng);

static inline bool ath11k_debugfs_is_pktlog_lite_mode_enabled(struct ath11k *ar)
{
	return (ar->debug.pktlog_mode == ATH11K_PKTLOG_MODE_LITE);
}

static inline bool ath11k_debugfs_is_pktlog_rx_stats_enabled(struct ath11k *ar)
{
	return (!ar->debug.pktlog_peer_valid && ar->debug.pktlog_mode);
}

static inline bool ath11k_debugfs_is_pktlog_peer_valid(struct ath11k *ar, u8 *addr)
{
	return (ar->debug.pktlog_peer_valid && ar->debug.pktlog_mode &&
		ether_addr_equal(addr, ar->debug.pktlog_peer_addr));
}

static inline int ath11k_debugfs_is_extd_tx_stats_enabled(struct ath11k *ar)
{
	return ar->debug.extd_tx_stats;
}

static inline int ath11k_debugfs_is_extd_rx_stats_enabled(struct ath11k *ar)
{
	return ar->debug.extd_rx_stats;
}

static inline int ath11k_debugfs_rx_filter(struct ath11k *ar)
{
	return ar->debug.rx_filter;
}

static inline int ath11k_debug_is_memory_stats_enabled(struct ath11k_base *ab)
{
	return ab->enable_memory_stats;
}

#else
static inline int ath11k_debugfs_create(void)
{
	return 0;
}

static inline void ath11k_debugfs_destroy(void)
{
}

static inline ssize_t ath11k_debugfs_dump_soc_ring_bp_stats(struct ath11k_base *ab,
					      char *buf, int size)
{
	return 0;
}

static inline int ath11k_debugfs_soc_create(struct ath11k_base *ab)
{
	return 0;
}

static inline void ath11k_debugfs_soc_destroy(struct ath11k_base *ab)
{
}

static inline int ath11k_debugfs_pdev_create(struct ath11k_base *ab)
{
	return 0;
}

static inline void ath11k_debugfs_pdev_destroy(struct ath11k_base *ab)
{
}

static inline int ath11k_debugfs_register(struct ath11k *ar)
{
	return 0;
}

static inline void ath11k_debugfs_unregister(struct ath11k *ar)
{
}

static inline void ath11k_debugfs_fw_stats_process(struct ath11k *ar,
						   struct ath11k_fw_stats *stats)
{
}

static inline void ath11k_debugfs_fw_stats_init(struct ath11k *ar)
{
}

static inline void ath11k_init_tx_latency_stats(struct ath11k *ar)
{
}

static inline int ath11k_debugfs_is_extd_tx_stats_enabled(struct ath11k *ar)
{
	return 0;
}

static inline int ath11k_debugfs_is_extd_rx_stats_enabled(struct ath11k *ar)
{
	return 0;
}

static inline bool ath11k_debugfs_is_pktlog_lite_mode_enabled(struct ath11k *ar)
{
	return false;
}

static inline bool ath11k_debugfs_is_pktlog_rx_stats_enabled(struct ath11k *ar)
{
	return false;
}

static inline bool ath11k_debugfs_is_pktlog_peer_valid(struct ath11k *ar, u8 *addr)
{
	return false;
}

static inline int ath11k_debug_is_memory_stats_enabled(struct ath11k_base *ab)
{
	return 0;
}

static inline int ath11k_debugfs_rx_filter(struct ath11k *ar)
{
	return 0;
}
static inline void
ath11k_dbring_add_debug_entry(struct ath11k *ar,
			      enum wmi_direct_buffer_module id,
			      enum ath11k_db_ring_dbg_event event,
			      struct hal_srng *srng)
{
}
static inline void ath11k_smart_ant_debugfs_init(struct ath11k *ar)
{
}
#endif /* CONFIG_MAC80211_DEBUGFS*/

#ifdef CONFIG_ATH11K_PKTLOG
void ath11k_init_pktlog(struct ath11k *ar);
void ath11k_deinit_pktlog(struct ath11k *ar);
void ath11k_htt_pktlog_process(struct ath11k *ar, u8 *data);
void ath11k_htt_ppdu_pktlog_process(struct ath11k *ar, u8 *data, u32 len);
void ath11k_rx_stats_buf_pktlog_process(struct ath11k *ar, u8 *data, u16 log_type, u32 len);

#else /* CONFIG_ATH11K_PKTLOG */
static inline void ath11k_init_pktlog(struct ath11k *ar)
{
}

static inline void ath11k_deinit_pktlog(struct ath11k *ar)
{
}

static inline void ath11k_htt_pktlog_process(struct ath11k *ar,
					     u8 *data)
{
}

static inline void ath11k_htt_ppdu_pktlog_process(struct ath11k *ar,
						  u8 *data, u32 len)
{
}

static inline void ath11k_pktlog_rx(struct ath11k *ar, struct sk_buff_head *amsdu)
{
}
static inline void ath11k_rx_stats_buf_pktlog_process(struct ath11k *ar,
						       u8 *data, u16 log_type, u32 len)
{
}
#endif /* CONFIG_ATH11K_PKTLOG */
#endif /* _ATH11K_DEBUGFS_H_ */