| /* |
| * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC |
| * |
| * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| * |
| * Licensed under GPLv2 only. |
| */ |
| |
| /include/ "skeleton.dtsi" |
| |
| / { |
| model = "Atmel AT91SAM9263 family SoC"; |
| compatible = "atmel,at91sam9263"; |
| interrupt-parent = <&aic>; |
| |
| aliases { |
| serial0 = &dbgu; |
| serial1 = &usart0; |
| serial2 = &usart1; |
| serial3 = &usart2; |
| gpio0 = &pioA; |
| gpio1 = &pioB; |
| gpio2 = &pioC; |
| gpio3 = &pioD; |
| gpio4 = &pioE; |
| tcb0 = &tcb0; |
| i2c0 = &i2c0; |
| ssc0 = &ssc0; |
| ssc1 = &ssc1; |
| }; |
| cpus { |
| cpu@0 { |
| compatible = "arm,arm926ejs"; |
| }; |
| }; |
| |
| memory { |
| reg = <0x20000000 0x08000000>; |
| }; |
| |
| ahb { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| apb { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| aic: interrupt-controller@fffff000 { |
| #interrupt-cells = <3>; |
| compatible = "atmel,at91rm9200-aic"; |
| interrupt-controller; |
| reg = <0xfffff000 0x200>; |
| atmel,external-irqs = <30 31>; |
| }; |
| |
| pmc: pmc@fffffc00 { |
| compatible = "atmel,at91rm9200-pmc"; |
| reg = <0xfffffc00 0x100>; |
| }; |
| |
| ramc: ramc@ffffe200 { |
| compatible = "atmel,at91sam9260-sdramc"; |
| reg = <0xffffe200 0x200 |
| 0xffffe800 0x200>; |
| }; |
| |
| pit: timer@fffffd30 { |
| compatible = "atmel,at91sam9260-pit"; |
| reg = <0xfffffd30 0xf>; |
| interrupts = <1 4 7>; |
| }; |
| |
| tcb0: timer@fff7c000 { |
| compatible = "atmel,at91rm9200-tcb"; |
| reg = <0xfff7c000 0x100>; |
| interrupts = <19 4 0>; |
| }; |
| |
| rstc@fffffd00 { |
| compatible = "atmel,at91sam9260-rstc"; |
| reg = <0xfffffd00 0x10>; |
| }; |
| |
| shdwc@fffffd10 { |
| compatible = "atmel,at91sam9260-shdwc"; |
| reg = <0xfffffd10 0x10>; |
| }; |
| |
| pinctrl@fffff200 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
| ranges = <0xfffff200 0xfffff200 0xa00>; |
| |
| atmel,mux-mask = < |
| /* A B */ |
| 0xfffffffb 0xffffe07f /* pioA */ |
| 0x0007ffff 0x39072fff /* pioB */ |
| 0xffffffff 0x3ffffff8 /* pioC */ |
| 0xfffffbff 0xffffffff /* pioD */ |
| 0xffe00fff 0xfbfcff00 /* pioE */ |
| >; |
| |
| /* shared pinctrl settings */ |
| dbgu { |
| pinctrl_dbgu: dbgu-0 { |
| atmel,pins = |
| <2 30 0x1 0x0 /* PC30 periph A */ |
| 2 31 0x1 0x1>; /* PC31 periph with pullup */ |
| }; |
| }; |
| |
| usart0 { |
| pinctrl_usart0: usart0-0 { |
| atmel,pins = |
| <0 26 0x1 0x1 /* PA26 periph A with pullup */ |
| 0 27 0x1 0x0>; /* PA27 periph A */ |
| }; |
| |
| pinctrl_usart0_rts: usart0_rts-0 { |
| atmel,pins = |
| <0 28 0x1 0x0>; /* PA28 periph A */ |
| }; |
| |
| pinctrl_usart0_cts: usart0_cts-0 { |
| atmel,pins = |
| <0 29 0x1 0x0>; /* PA29 periph A */ |
| }; |
| }; |
| |
| usart1 { |
| pinctrl_usart1: usart1-0 { |
| atmel,pins = |
| <3 0 0x1 0x1 /* PD0 periph A with pullup */ |
| 3 1 0x1 0x0>; /* PD1 periph A */ |
| }; |
| |
| pinctrl_usart1_rts: usart1_rts-0 { |
| atmel,pins = |
| <3 7 0x2 0x0>; /* PD7 periph B */ |
| }; |
| |
| pinctrl_usart1_cts: usart1_cts-0 { |
| atmel,pins = |
| <3 8 0x2 0x0>; /* PD8 periph B */ |
| }; |
| }; |
| |
| usart2 { |
| pinctrl_usart2: usart2-0 { |
| atmel,pins = |
| <3 2 0x1 0x1 /* PD2 periph A with pullup */ |
| 3 3 0x1 0x0>; /* PD3 periph A */ |
| }; |
| |
| pinctrl_usart2_rts: usart2_rts-0 { |
| atmel,pins = |
| <3 5 0x2 0x0>; /* PD5 periph B */ |
| }; |
| |
| pinctrl_usart2_cts: usart2_cts-0 { |
| atmel,pins = |
| <4 6 0x2 0x0>; /* PD6 periph B */ |
| }; |
| }; |
| |
| nand { |
| pinctrl_nand: nand-0 { |
| atmel,pins = |
| <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/ |
| 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */ |
| }; |
| }; |
| |
| macb { |
| pinctrl_macb_rmii: macb_rmii-0 { |
| atmel,pins = |
| <2 25 0x2 0x0 /* PC25 periph B */ |
| 4 21 0x1 0x0 /* PE21 periph A */ |
| 4 23 0x1 0x0 /* PE23 periph A */ |
| 4 24 0x1 0x0 /* PE24 periph A */ |
| 4 25 0x1 0x0 /* PE25 periph A */ |
| 4 26 0x1 0x0 /* PE26 periph A */ |
| 4 27 0x1 0x0 /* PE27 periph A */ |
| 4 28 0x1 0x0 /* PE28 periph A */ |
| 4 29 0x1 0x0 /* PE29 periph A */ |
| 4 30 0x1 0x0>; /* PE30 periph A */ |
| }; |
| |
| pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| atmel,pins = |
| <2 20 0x2 0x0 /* PC20 periph B */ |
| 2 21 0x2 0x0 /* PC21 periph B */ |
| 2 22 0x2 0x0 /* PC22 periph B */ |
| 2 23 0x2 0x0 /* PC23 periph B */ |
| 2 24 0x2 0x0 /* PC24 periph B */ |
| 2 25 0x2 0x0 /* PC25 periph B */ |
| 2 27 0x2 0x0 /* PC27 periph B */ |
| 4 22 0x2 0x0>; /* PE22 periph B */ |
| }; |
| }; |
| |
| mmc0 { |
| pinctrl_mmc0_clk: mmc0_clk-0 { |
| atmel,pins = |
| <0 12 0x1 0x0>; /* PA12 periph A */ |
| }; |
| |
| pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { |
| atmel,pins = |
| <0 1 0x1 0x1 /* PA1 periph A with pullup */ |
| 0 0 0x1 0x1>; /* PA0 periph A with pullup */ |
| }; |
| |
| pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
| atmel,pins = |
| <0 3 0x1 0x1 /* PA3 periph A with pullup */ |
| 0 4 0x1 0x1 /* PA4 periph A with pullup */ |
| 0 5 0x1 0x1>; /* PA5 periph A with pullup */ |
| }; |
| |
| pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { |
| atmel,pins = |
| <0 16 0x1 0x1 /* PA16 periph A with pullup */ |
| 0 17 0x1 0x1>; /* PA17 periph A with pullup */ |
| }; |
| |
| pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { |
| atmel,pins = |
| <0 18 0x1 0x1 /* PA18 periph A with pullup */ |
| 0 19 0x1 0x1 /* PA19 periph A with pullup */ |
| 0 20 0x1 0x1>; /* PA20 periph A with pullup */ |
| }; |
| }; |
| |
| mmc1 { |
| pinctrl_mmc1_clk: mmc1_clk-0 { |
| atmel,pins = |
| <0 6 0x1 0x0>; /* PA6 periph A */ |
| }; |
| |
| pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { |
| atmel,pins = |
| <0 7 0x1 0x1 /* PA7 periph A with pullup */ |
| 0 8 0x1 0x1>; /* PA8 periph A with pullup */ |
| }; |
| |
| pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { |
| atmel,pins = |
| <0 9 0x1 0x1 /* PA9 periph A with pullup */ |
| 0 10 0x1 0x1 /* PA10 periph A with pullup */ |
| 0 11 0x1 0x1>; /* PA11 periph A with pullup */ |
| }; |
| |
| pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { |
| atmel,pins = |
| <0 21 0x1 0x1 /* PA21 periph A with pullup */ |
| 0 22 0x1 0x1>; /* PA22 periph A with pullup */ |
| }; |
| |
| pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { |
| atmel,pins = |
| <0 23 0x1 0x1 /* PA23 periph A with pullup */ |
| 0 24 0x1 0x1 /* PA24 periph A with pullup */ |
| 0 25 0x1 0x1>; /* PA25 periph A with pullup */ |
| }; |
| }; |
| |
| ssc0 { |
| pinctrl_ssc0_tx: ssc0_tx-0 { |
| atmel,pins = |
| <1 0 0x2 0x0 /* PB0 periph B */ |
| 1 1 0x2 0x0 /* PB1 periph B */ |
| 1 2 0x2 0x0>; /* PB2 periph B */ |
| }; |
| |
| pinctrl_ssc0_rx: ssc0_rx-0 { |
| atmel,pins = |
| <1 3 0x2 0x0 /* PB3 periph B */ |
| 1 4 0x2 0x0 /* PB4 periph B */ |
| 1 5 0x2 0x0>; /* PB5 periph B */ |
| }; |
| }; |
| |
| ssc1 { |
| pinctrl_ssc1_tx: ssc1_tx-0 { |
| atmel,pins = |
| <1 6 0x1 0x0 /* PB6 periph A */ |
| 1 7 0x1 0x0 /* PB7 periph A */ |
| 1 8 0x1 0x0>; /* PB8 periph A */ |
| }; |
| |
| pinctrl_ssc1_rx: ssc1_rx-0 { |
| atmel,pins = |
| <1 9 0x1 0x0 /* PB9 periph A */ |
| 1 10 0x1 0x0 /* PB10 periph A */ |
| 1 11 0x1 0x0>; /* PB11 periph A */ |
| }; |
| }; |
| |
| pioA: gpio@fffff200 { |
| compatible = "atmel,at91rm9200-gpio"; |
| reg = <0xfffff200 0x200>; |
| interrupts = <2 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioB: gpio@fffff400 { |
| compatible = "atmel,at91rm9200-gpio"; |
| reg = <0xfffff400 0x200>; |
| interrupts = <3 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioC: gpio@fffff600 { |
| compatible = "atmel,at91rm9200-gpio"; |
| reg = <0xfffff600 0x200>; |
| interrupts = <4 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioD: gpio@fffff800 { |
| compatible = "atmel,at91rm9200-gpio"; |
| reg = <0xfffff800 0x200>; |
| interrupts = <4 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioE: gpio@fffffa00 { |
| compatible = "atmel,at91rm9200-gpio"; |
| reg = <0xfffffa00 0x200>; |
| interrupts = <4 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| }; |
| |
| dbgu: serial@ffffee00 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xffffee00 0x200>; |
| interrupts = <1 4 7>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_dbgu>; |
| status = "disabled"; |
| }; |
| |
| usart0: serial@fff8c000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfff8c000 0x200>; |
| interrupts = <7 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usart0>; |
| status = "disabled"; |
| }; |
| |
| usart1: serial@fff90000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfff90000 0x200>; |
| interrupts = <8 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usart1>; |
| status = "disabled"; |
| }; |
| |
| usart2: serial@fff94000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfff94000 0x200>; |
| interrupts = <9 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usart2>; |
| status = "disabled"; |
| }; |
| |
| ssc0: ssc@fff98000 { |
| compatible = "atmel,at91rm9200-ssc"; |
| reg = <0xfff98000 0x4000>; |
| interrupts = <16 4 5>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
| status = "disabled"; |
| }; |
| |
| ssc1: ssc@fff9c000 { |
| compatible = "atmel,at91rm9200-ssc"; |
| reg = <0xfff9c000 0x4000>; |
| interrupts = <17 4 5>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; |
| status = "disabled"; |
| }; |
| |
| macb0: ethernet@fffbc000 { |
| compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| reg = <0xfffbc000 0x100>; |
| interrupts = <21 4 3>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_macb_rmii>; |
| status = "disabled"; |
| }; |
| |
| usb1: gadget@fff78000 { |
| compatible = "atmel,at91rm9200-udc"; |
| reg = <0xfff78000 0x4000>; |
| interrupts = <24 4 2>; |
| status = "disabled"; |
| }; |
| |
| i2c0: i2c@fff88000 { |
| compatible = "atmel,at91sam9263-i2c"; |
| reg = <0xfff88000 0x100>; |
| interrupts = <13 4 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| mmc0: mmc@fff80000 { |
| compatible = "atmel,hsmci"; |
| reg = <0xfff80000 0x600>; |
| interrupts = <10 4 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| mmc1: mmc@fff84000 { |
| compatible = "atmel,hsmci"; |
| reg = <0xfff84000 0x600>; |
| interrupts = <11 4 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| watchdog@fffffd40 { |
| compatible = "atmel,at91sam9260-wdt"; |
| reg = <0xfffffd40 0x10>; |
| status = "disabled"; |
| }; |
| }; |
| |
| nand0: nand@40000000 { |
| compatible = "atmel,at91rm9200-nand"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x40000000 0x10000000 |
| 0xffffe000 0x200 |
| >; |
| atmel,nand-addr-offset = <21>; |
| atmel,nand-cmd-offset = <22>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_nand>; |
| gpios = <&pioA 22 0 |
| &pioD 15 0 |
| 0 |
| >; |
| status = "disabled"; |
| }; |
| |
| usb0: ohci@00a00000 { |
| compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| reg = <0x00a00000 0x100000>; |
| interrupts = <29 4 2>; |
| status = "disabled"; |
| }; |
| }; |
| |
| i2c@0 { |
| compatible = "i2c-gpio"; |
| gpios = <&pioB 4 0 /* sda */ |
| &pioB 5 0 /* scl */ |
| >; |
| i2c-gpio,sda-open-drain; |
| i2c-gpio,scl-open-drain; |
| i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| }; |
