/*
 **************************************************************************
 * Copyright (c) 2016,2020 The Linux Foundation. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for
 * any purpose with or without fee is hereby granted, provided that the
 * above copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF0
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **************************************************************************
 */

#ifndef __QCOM_REG_H__
#define __QCOM_REG_H__

/* Register Offsets */
/* Offsets of GMAC config and status registers within NSS_GMAC_QCOM_MAC_BASE */
#define QCOM_MAC_ENABLE		0x0000
#define QCOM_MAC_SPEED		0x0004
#define QCOM_MAC_ADDR0		0x0008
#define QCOM_MAC_ADDR1		0x000c
#define QCOM_MAC_CTRL0		0x0010
#define QCOM_MAC_CTRL1		0x0014
#define QCOM_MAC_CTRL2		0x0018
#define QCOM_MAC_DBG_CTRL	0x001c
#define QCOM_MAC_DBG_ADDR	0x0020
#define QCOM_MAC_DBG_DATA	0x0024
#define QCOM_MAC_JMB_SIZE	0x0030
#define QCOM_MAC_MIB_CTRL	0x0034

/* RX stats */
#define QCOM_RXBROAD		0x0040
#define QCOM_RXPAUSE		0x0044
#define QCOM_RXMULTI		0x0048
#define QCOM_RXFCSERR		0x004c
#define QCOM_RXALIGNERR		0x0050
#define QCOM_RXRUNT		0x0054
#define QCOM_RXFRAG		0x0058
#define QCOM_RXJMBFCSERR	0x005c
#define QCOM_RXJMBALIGNERR	0x0060
#define QCOM_RXPKT64		0x0064
#define QCOM_RXPKT65TO127	0x0068
#define QCOM_RXPKT128TO255	0x006c
#define QCOM_RXPKT256TO511	0x0070
#define QCOM_RXPKT512TO1023	0x0074
#define QCOM_RXPKT1024TO1518	0x0078
#define QCOM_RXPKT1519TOX	0x007c
#define QCOM_RXPKTTOOLONG	0x0080
#define QCOM_RXPKTGOODBYTE_L	0x0084
#define QCOM_RXPKTGOODBYTE_H	0x0088
#define QCOM_RXPKTBADBYTE_L	0x008c
#define QCOM_RXPKTBADBYTE_H	0x0090
#define QCOM_RXUNI		0x0094

/* TX stats */
#define QCOM_TXBROAD		0x00a0
#define QCOM_TXPAUSE		0x00a4
#define QCOM_TXMULTI		0x00a8
#define QCOM_TXUNDERUN		0x00aC
#define QCOM_TXPKT64		0x00b0
#define QCOM_TXPKT65TO127	0x00b4
#define QCOM_TXPKT128TO255	0x00b8
#define QCOM_TXPKT256TO511	0x00bc
#define QCOM_TXPKT512TO1023	0x00c0
#define QCOM_TXPKT1024TO1518	0x00c4
#define QCOM_TXPKT1519TOX	0x00c8
#define QCOM_TXPKTBYTE_L	0x00cc
#define QCOM_TXPKTBYTE_H	0x00d0
#define QCOM_TXCOLLISIONS	0x00d4
#define QCOM_TXABORTCOL		0x00d8
#define QCOM_TXMULTICOL		0x00dc
#define QCOM_TXSINGLECOL	0x00e0
#define QCOM_TXEXCESSIVEDEFER	0x00e4
#define QCOM_TXDEFER		0x00e8
#define QCOM_TXLATECOL		0x00ec
#define QCOM_TXUNI		0x00f0

/* Bit Masks */
/* GMAC BITs */
#define QCOM_RX_MAC_ENABLE	1
#define QCOM_TX_MAC_ENABLE	0x2
#define QCOM_DUPLEX		0x10
#define QCOM_RX_FLOW_ENABLE	0x20
#define QCOM_TX_FLOW_ENABLE	0x40

#define QCOM_MAC_SPEED_10	0
#define QCOM_MAC_SPEED_100	1
#define QCOM_MAC_SPEED_1000	2

/* MAC CTRL0 */
#define QCOM_IPGT_POS		0x0000007f
#define QCOM_IPGT_LSB		0
#define QCOM_IPGR2_POS		0x00007f00
#define QCOM_IPGR2_LSB		8
#define QCOM_HALF_THDF_CTRL	0x8000
#define QCOM_HUGE_RECV		0x10000
#define QCOM_HUGE_TRANS		0x20000
#define QCOM_FLCHK		0x40000
#define QCOM_ABEBE		0x80000
#define QCOM_AMAXE		0x10000000
#define QCOM_BPNB		0x20000000
#define QCOM_NOBO		0x40000000
#define QCOM_DRBNIB_RXOK	0x80000000

/* MAC CTRL1 */
#define QCOM_JAM_IPG_POS	0x0000000f
#define QCOM_JAM_IPG_LSB	0
#define QCOM_TPAUSE		0x10
#define QCOM_TCTL		0x20
#define QCOM_SSTCT		0x40
#define QCOM_SIMR		0x80
#define QCOM_RETRY_POS		0x00000f00
#define QCOM_RETRY_LSB		8
#define QCOM_PRLEN_POS		0x0000f000
#define QCOM_PRLEN_LSB		8
#define QCOM_PPAD		0x10000
#define QCOM_POVR		0x20000
#define QCOM_PHUG		0x40000
#define QCOM_MBOF		0x80000
#define QCOM_LCOL_POS		0x0ff00000
#define QCOM_LCOL_LSB		20
#define QCOM_LONG_JAM		0x10000000

/* MAC CTRL2 */
#define QCOM_IPG_DEC_LEN	0x2
#define QCOM_TEST_PAUSE		0x4
#define QCOM_MAC_LPI_TX_IDLE	0x8
#define QCOM_MAC_LOOPBACK	0x10
#define QCOM_IPG_DEC		0x20
#define QCOM_SRS_SEL		0x40
#define QCOM_CRC_RSV		0x80
#define QCOM_MAXFR_POS		0x003fff00
#define QCOM_MAXFR_LSB		8

/* MAC DEBUG_CTRL */
#define QCOM_DBG_IPGR1_POS	0x0000007f
#define QCOM_DBG_IPGR1_LSB	0
#define QCOM_DBG_HIHG_IPG_POS	0x0000ff00
#define QCOM_DBG_HIHG_IPG_LSB	8
#define QCOM_DBG_MAC_IPG_CTRL_POS	0x0000ff00
#define QCOM_DBG_MAC_IPG_CTRL_LSB	20
#define QCOM_DBG_MAC_LEN_CTRL	0x40000000
#define QCOM_DBG_EDxSDFR_TRANS	0x80000000

/* MAC MIB-CTRL*/
#define QCOM_MIB_ENABLE		1
#define QCOM_MIB_RESET		0x2
#define QCOM_MIB_RD_CLR		0x4

#endif /*__QCOM_REG_H__*/