/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Intrinsic Function Source Fragment                                         *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

// Target mapping
#ifdef GET_INTRINSIC_TARGET_DATA
struct IntrinsicTargetInfo {
  llvm::StringLiteral Name;
  size_t Offset;
  size_t Count;
};
static constexpr IntrinsicTargetInfo TargetInfos[] = {
  {llvm::StringLiteral(""), 0, 300},
  {llvm::StringLiteral("aarch64"), 300, 837},
  {llvm::StringLiteral("amdgcn"), 1137, 695},
  {llvm::StringLiteral("arm"), 1832, 489},
  {llvm::StringLiteral("bpf"), 2321, 9},
  {llvm::StringLiteral("hexagon"), 2330, 1750},
  {llvm::StringLiteral("mips"), 4080, 671},
  {llvm::StringLiteral("nvvm"), 4751, 1296},
  {llvm::StringLiteral("ppc"), 6047, 450},
  {llvm::StringLiteral("r600"), 6497, 35},
  {llvm::StringLiteral("riscv"), 6532, 18},
  {llvm::StringLiteral("s390"), 6550, 228},
  {llvm::StringLiteral("wasm"), 6778, 51},
  {llvm::StringLiteral("x86"), 6829, 1198},
  {llvm::StringLiteral("xcore"), 8027, 53},
};
#endif

// Intrinsic ID to name table
#ifdef GET_INTRINSIC_NAME_TABLE
  // Note that entry #0 is the invalid intrinsic!
  "llvm.abs",
  "llvm.addressofreturnaddress",
  "llvm.adjust.trampoline",
  "llvm.annotation",
  "llvm.assume",
  "llvm.bitreverse",
  "llvm.bswap",
  "llvm.call.preallocated.arg",
  "llvm.call.preallocated.setup",
  "llvm.call.preallocated.teardown",
  "llvm.canonicalize",
  "llvm.ceil",
  "llvm.clear_cache",
  "llvm.codeview.annotation",
  "llvm.convert.from.fp16",
  "llvm.convert.to.fp16",
  "llvm.copysign",
  "llvm.coro.alloc",
  "llvm.coro.alloca.alloc",
  "llvm.coro.alloca.free",
  "llvm.coro.alloca.get",
  "llvm.coro.begin",
  "llvm.coro.destroy",
  "llvm.coro.done",
  "llvm.coro.end",
  "llvm.coro.frame",
  "llvm.coro.free",
  "llvm.coro.id",
  "llvm.coro.id.retcon",
  "llvm.coro.id.retcon.once",
  "llvm.coro.noop",
  "llvm.coro.param",
  "llvm.coro.prepare.retcon",
  "llvm.coro.promise",
  "llvm.coro.resume",
  "llvm.coro.save",
  "llvm.coro.size",
  "llvm.coro.subfn.addr",
  "llvm.coro.suspend",
  "llvm.coro.suspend.retcon",
  "llvm.cos",
  "llvm.ctlz",
  "llvm.ctpop",
  "llvm.cttz",
  "llvm.dbg.addr",
  "llvm.dbg.declare",
  "llvm.dbg.label",
  "llvm.dbg.value",
  "llvm.debugtrap",
  "llvm.donothing",
  "llvm.eh.dwarf.cfa",
  "llvm.eh.exceptioncode",
  "llvm.eh.exceptionpointer",
  "llvm.eh.recoverfp",
  "llvm.eh.return.i32",
  "llvm.eh.return.i64",
  "llvm.eh.sjlj.callsite",
  "llvm.eh.sjlj.functioncontext",
  "llvm.eh.sjlj.longjmp",
  "llvm.eh.sjlj.lsda",
  "llvm.eh.sjlj.setjmp",
  "llvm.eh.sjlj.setup.dispatch",
  "llvm.eh.typeid.for",
  "llvm.eh.unwind.init",
  "llvm.exp",
  "llvm.exp2",
  "llvm.expect",
  "llvm.expect.with.probability",
  "llvm.experimental.constrained.ceil",
  "llvm.experimental.constrained.cos",
  "llvm.experimental.constrained.exp",
  "llvm.experimental.constrained.exp2",
  "llvm.experimental.constrained.fadd",
  "llvm.experimental.constrained.fcmp",
  "llvm.experimental.constrained.fcmps",
  "llvm.experimental.constrained.fdiv",
  "llvm.experimental.constrained.floor",
  "llvm.experimental.constrained.fma",
  "llvm.experimental.constrained.fmul",
  "llvm.experimental.constrained.fmuladd",
  "llvm.experimental.constrained.fpext",
  "llvm.experimental.constrained.fptosi",
  "llvm.experimental.constrained.fptoui",
  "llvm.experimental.constrained.fptrunc",
  "llvm.experimental.constrained.frem",
  "llvm.experimental.constrained.fsub",
  "llvm.experimental.constrained.llrint",
  "llvm.experimental.constrained.llround",
  "llvm.experimental.constrained.log",
  "llvm.experimental.constrained.log10",
  "llvm.experimental.constrained.log2",
  "llvm.experimental.constrained.lrint",
  "llvm.experimental.constrained.lround",
  "llvm.experimental.constrained.maximum",
  "llvm.experimental.constrained.maxnum",
  "llvm.experimental.constrained.minimum",
  "llvm.experimental.constrained.minnum",
  "llvm.experimental.constrained.nearbyint",
  "llvm.experimental.constrained.pow",
  "llvm.experimental.constrained.powi",
  "llvm.experimental.constrained.rint",
  "llvm.experimental.constrained.round",
  "llvm.experimental.constrained.roundeven",
  "llvm.experimental.constrained.sin",
  "llvm.experimental.constrained.sitofp",
  "llvm.experimental.constrained.sqrt",
  "llvm.experimental.constrained.trunc",
  "llvm.experimental.constrained.uitofp",
  "llvm.experimental.deoptimize",
  "llvm.experimental.gc.relocate",
  "llvm.experimental.gc.result",
  "llvm.experimental.gc.statepoint",
  "llvm.experimental.guard",
  "llvm.experimental.patchpoint.i64",
  "llvm.experimental.patchpoint.void",
  "llvm.experimental.stackmap",
  "llvm.experimental.widenable.condition",
  "llvm.fabs",
  "llvm.floor",
  "llvm.flt.rounds",
  "llvm.fma",
  "llvm.fmuladd",
  "llvm.frameaddress",
  "llvm.fshl",
  "llvm.fshr",
  "llvm.gcread",
  "llvm.gcroot",
  "llvm.gcwrite",
  "llvm.get.active.lane.mask",
  "llvm.get.dynamic.area.offset",
  "llvm.hwasan.check.memaccess",
  "llvm.hwasan.check.memaccess.shortgranules",
  "llvm.icall.branch.funnel",
  "llvm.init.trampoline",
  "llvm.instrprof.increment",
  "llvm.instrprof.increment.step",
  "llvm.instrprof.value.profile",
  "llvm.invariant.end",
  "llvm.invariant.start",
  "llvm.is.constant",
  "llvm.launder.invariant.group",
  "llvm.lifetime.end",
  "llvm.lifetime.start",
  "llvm.llrint",
  "llvm.llround",
  "llvm.load.relative",
  "llvm.localaddress",
  "llvm.localescape",
  "llvm.localrecover",
  "llvm.log",
  "llvm.log10",
  "llvm.log2",
  "llvm.loop.decrement",
  "llvm.loop.decrement.reg",
  "llvm.lrint",
  "llvm.lround",
  "llvm.masked.compressstore",
  "llvm.masked.expandload",
  "llvm.masked.gather",
  "llvm.masked.load",
  "llvm.masked.scatter",
  "llvm.masked.store",
  "llvm.matrix.column.major.load",
  "llvm.matrix.column.major.store",
  "llvm.matrix.multiply",
  "llvm.matrix.transpose",
  "llvm.maximum",
  "llvm.maxnum",
  "llvm.memcpy",
  "llvm.memcpy.element.unordered.atomic",
  "llvm.memcpy.inline",
  "llvm.memmove",
  "llvm.memmove.element.unordered.atomic",
  "llvm.memset",
  "llvm.memset.element.unordered.atomic",
  "llvm.minimum",
  "llvm.minnum",
  "llvm.nearbyint",
  "llvm.objc.arc.annotation.bottomup.bbend",
  "llvm.objc.arc.annotation.bottomup.bbstart",
  "llvm.objc.arc.annotation.topdown.bbend",
  "llvm.objc.arc.annotation.topdown.bbstart",
  "llvm.objc.autorelease",
  "llvm.objc.autoreleasePoolPop",
  "llvm.objc.autoreleasePoolPush",
  "llvm.objc.autoreleaseReturnValue",
  "llvm.objc.clang.arc.use",
  "llvm.objc.copyWeak",
  "llvm.objc.destroyWeak",
  "llvm.objc.initWeak",
  "llvm.objc.loadWeak",
  "llvm.objc.loadWeakRetained",
  "llvm.objc.moveWeak",
  "llvm.objc.release",
  "llvm.objc.retain",
  "llvm.objc.retain.autorelease",
  "llvm.objc.retainAutorelease",
  "llvm.objc.retainAutoreleaseReturnValue",
  "llvm.objc.retainAutoreleasedReturnValue",
  "llvm.objc.retainBlock",
  "llvm.objc.retainedObject",
  "llvm.objc.storeStrong",
  "llvm.objc.storeWeak",
  "llvm.objc.sync.enter",
  "llvm.objc.sync.exit",
  "llvm.objc.unretainedObject",
  "llvm.objc.unretainedPointer",
  "llvm.objc.unsafeClaimAutoreleasedReturnValue",
  "llvm.objectsize",
  "llvm.pcmarker",
  "llvm.pow",
  "llvm.powi",
  "llvm.prefetch",
  "llvm.preserve.array.access.index",
  "llvm.preserve.struct.access.index",
  "llvm.preserve.union.access.index",
  "llvm.ptr.annotation",
  "llvm.ptrmask",
  "llvm.read_register",
  "llvm.read_volatile_register",
  "llvm.readcyclecounter",
  "llvm.returnaddress",
  "llvm.rint",
  "llvm.round",
  "llvm.roundeven",
  "llvm.sadd.sat",
  "llvm.sadd.with.overflow",
  "llvm.sdiv.fix",
  "llvm.sdiv.fix.sat",
  "llvm.set.loop.iterations",
  "llvm.sideeffect",
  "llvm.sin",
  "llvm.smax",
  "llvm.smin",
  "llvm.smul.fix",
  "llvm.smul.fix.sat",
  "llvm.smul.with.overflow",
  "llvm.sponentry",
  "llvm.sqrt",
  "llvm.ssa.copy",
  "llvm.sshl.sat",
  "llvm.ssub.sat",
  "llvm.ssub.with.overflow",
  "llvm.stackguard",
  "llvm.stackprotector",
  "llvm.stackrestore",
  "llvm.stacksave",
  "llvm.strip.invariant.group",
  "llvm.test.set.loop.iterations",
  "llvm.thread.pointer",
  "llvm.trap",
  "llvm.trunc",
  "llvm.type.checked.load",
  "llvm.type.test",
  "llvm.uadd.sat",
  "llvm.uadd.with.overflow",
  "llvm.udiv.fix",
  "llvm.udiv.fix.sat",
  "llvm.umax",
  "llvm.umin",
  "llvm.umul.fix",
  "llvm.umul.fix.sat",
  "llvm.umul.with.overflow",
  "llvm.ushl.sat",
  "llvm.usub.sat",
  "llvm.usub.with.overflow",
  "llvm.va_copy",
  "llvm.va_end",
  "llvm.va_start",
  "llvm.var.annotation",
  "llvm.vector.reduce.add",
  "llvm.vector.reduce.and",
  "llvm.vector.reduce.fadd",
  "llvm.vector.reduce.fmax",
  "llvm.vector.reduce.fmin",
  "llvm.vector.reduce.fmul",
  "llvm.vector.reduce.mul",
  "llvm.vector.reduce.or",
  "llvm.vector.reduce.smax",
  "llvm.vector.reduce.smin",
  "llvm.vector.reduce.umax",
  "llvm.vector.reduce.umin",
  "llvm.vector.reduce.xor",
  "llvm.vp.add",
  "llvm.vp.and",
  "llvm.vp.ashr",
  "llvm.vp.lshr",
  "llvm.vp.mul",
  "llvm.vp.or",
  "llvm.vp.sdiv",
  "llvm.vp.shl",
  "llvm.vp.srem",
  "llvm.vp.sub",
  "llvm.vp.udiv",
  "llvm.vp.urem",
  "llvm.vp.xor",
  "llvm.vscale",
  "llvm.write_register",
  "llvm.xray.customevent",
  "llvm.xray.typedevent",
  "llvm.aarch64.addg",
  "llvm.aarch64.clrex",
  "llvm.aarch64.cls",
  "llvm.aarch64.cls64",
  "llvm.aarch64.crc32b",
  "llvm.aarch64.crc32cb",
  "llvm.aarch64.crc32ch",
  "llvm.aarch64.crc32cw",
  "llvm.aarch64.crc32cx",
  "llvm.aarch64.crc32h",
  "llvm.aarch64.crc32w",
  "llvm.aarch64.crc32x",
  "llvm.aarch64.crypto.aesd",
  "llvm.aarch64.crypto.aese",
  "llvm.aarch64.crypto.aesimc",
  "llvm.aarch64.crypto.aesmc",
  "llvm.aarch64.crypto.sha1c",
  "llvm.aarch64.crypto.sha1h",
  "llvm.aarch64.crypto.sha1m",
  "llvm.aarch64.crypto.sha1p",
  "llvm.aarch64.crypto.sha1su0",
  "llvm.aarch64.crypto.sha1su1",
  "llvm.aarch64.crypto.sha256h",
  "llvm.aarch64.crypto.sha256h2",
  "llvm.aarch64.crypto.sha256su0",
  "llvm.aarch64.crypto.sha256su1",
  "llvm.aarch64.dmb",
  "llvm.aarch64.dsb",
  "llvm.aarch64.fjcvtzs",
  "llvm.aarch64.get.fpcr",
  "llvm.aarch64.gmi",
  "llvm.aarch64.hint",
  "llvm.aarch64.irg",
  "llvm.aarch64.irg.sp",
  "llvm.aarch64.isb",
  "llvm.aarch64.ldaxp",
  "llvm.aarch64.ldaxr",
  "llvm.aarch64.ldg",
  "llvm.aarch64.ldxp",
  "llvm.aarch64.ldxr",
  "llvm.aarch64.neon.abs",
  "llvm.aarch64.neon.addhn",
  "llvm.aarch64.neon.addp",
  "llvm.aarch64.neon.bfcvt",
  "llvm.aarch64.neon.bfcvtn",
  "llvm.aarch64.neon.bfcvtn2",
  "llvm.aarch64.neon.bfdot",
  "llvm.aarch64.neon.bfmlalb",
  "llvm.aarch64.neon.bfmlalt",
  "llvm.aarch64.neon.bfmmla",
  "llvm.aarch64.neon.cls",
  "llvm.aarch64.neon.fabd",
  "llvm.aarch64.neon.facge",
  "llvm.aarch64.neon.facgt",
  "llvm.aarch64.neon.faddp",
  "llvm.aarch64.neon.faddv",
  "llvm.aarch64.neon.fcvtas",
  "llvm.aarch64.neon.fcvtau",
  "llvm.aarch64.neon.fcvtms",
  "llvm.aarch64.neon.fcvtmu",
  "llvm.aarch64.neon.fcvtns",
  "llvm.aarch64.neon.fcvtnu",
  "llvm.aarch64.neon.fcvtps",
  "llvm.aarch64.neon.fcvtpu",
  "llvm.aarch64.neon.fcvtxn",
  "llvm.aarch64.neon.fcvtzs",
  "llvm.aarch64.neon.fcvtzu",
  "llvm.aarch64.neon.fmax",
  "llvm.aarch64.neon.fmaxnm",
  "llvm.aarch64.neon.fmaxnmp",
  "llvm.aarch64.neon.fmaxnmv",
  "llvm.aarch64.neon.fmaxp",
  "llvm.aarch64.neon.fmaxv",
  "llvm.aarch64.neon.fmin",
  "llvm.aarch64.neon.fminnm",
  "llvm.aarch64.neon.fminnmp",
  "llvm.aarch64.neon.fminnmv",
  "llvm.aarch64.neon.fminp",
  "llvm.aarch64.neon.fminv",
  "llvm.aarch64.neon.fmlal",
  "llvm.aarch64.neon.fmlal2",
  "llvm.aarch64.neon.fmlsl",
  "llvm.aarch64.neon.fmlsl2",
  "llvm.aarch64.neon.fmulx",
  "llvm.aarch64.neon.frecpe",
  "llvm.aarch64.neon.frecps",
  "llvm.aarch64.neon.frecpx",
  "llvm.aarch64.neon.frintn",
  "llvm.aarch64.neon.frsqrte",
  "llvm.aarch64.neon.frsqrts",
  "llvm.aarch64.neon.ld1x2",
  "llvm.aarch64.neon.ld1x3",
  "llvm.aarch64.neon.ld1x4",
  "llvm.aarch64.neon.ld2",
  "llvm.aarch64.neon.ld2lane",
  "llvm.aarch64.neon.ld2r",
  "llvm.aarch64.neon.ld3",
  "llvm.aarch64.neon.ld3lane",
  "llvm.aarch64.neon.ld3r",
  "llvm.aarch64.neon.ld4",
  "llvm.aarch64.neon.ld4lane",
  "llvm.aarch64.neon.ld4r",
  "llvm.aarch64.neon.pmul",
  "llvm.aarch64.neon.pmull",
  "llvm.aarch64.neon.pmull64",
  "llvm.aarch64.neon.raddhn",
  "llvm.aarch64.neon.rbit",
  "llvm.aarch64.neon.rshrn",
  "llvm.aarch64.neon.rsubhn",
  "llvm.aarch64.neon.sabd",
  "llvm.aarch64.neon.saddlp",
  "llvm.aarch64.neon.saddlv",
  "llvm.aarch64.neon.saddv",
  "llvm.aarch64.neon.scalar.sqxtn",
  "llvm.aarch64.neon.scalar.sqxtun",
  "llvm.aarch64.neon.scalar.uqxtn",
  "llvm.aarch64.neon.sdot",
  "llvm.aarch64.neon.shadd",
  "llvm.aarch64.neon.shll",
  "llvm.aarch64.neon.shsub",
  "llvm.aarch64.neon.smax",
  "llvm.aarch64.neon.smaxp",
  "llvm.aarch64.neon.smaxv",
  "llvm.aarch64.neon.smin",
  "llvm.aarch64.neon.sminp",
  "llvm.aarch64.neon.sminv",
  "llvm.aarch64.neon.smmla",
  "llvm.aarch64.neon.smull",
  "llvm.aarch64.neon.sqabs",
  "llvm.aarch64.neon.sqadd",
  "llvm.aarch64.neon.sqdmulh",
  "llvm.aarch64.neon.sqdmulh.lane",
  "llvm.aarch64.neon.sqdmulh.laneq",
  "llvm.aarch64.neon.sqdmull",
  "llvm.aarch64.neon.sqdmulls.scalar",
  "llvm.aarch64.neon.sqneg",
  "llvm.aarch64.neon.sqrdmulh",
  "llvm.aarch64.neon.sqrdmulh.lane",
  "llvm.aarch64.neon.sqrdmulh.laneq",
  "llvm.aarch64.neon.sqrshl",
  "llvm.aarch64.neon.sqrshrn",
  "llvm.aarch64.neon.sqrshrun",
  "llvm.aarch64.neon.sqshl",
  "llvm.aarch64.neon.sqshlu",
  "llvm.aarch64.neon.sqshrn",
  "llvm.aarch64.neon.sqshrun",
  "llvm.aarch64.neon.sqsub",
  "llvm.aarch64.neon.sqxtn",
  "llvm.aarch64.neon.sqxtun",
  "llvm.aarch64.neon.srhadd",
  "llvm.aarch64.neon.srshl",
  "llvm.aarch64.neon.sshl",
  "llvm.aarch64.neon.sshll",
  "llvm.aarch64.neon.st1x2",
  "llvm.aarch64.neon.st1x3",
  "llvm.aarch64.neon.st1x4",
  "llvm.aarch64.neon.st2",
  "llvm.aarch64.neon.st2lane",
  "llvm.aarch64.neon.st3",
  "llvm.aarch64.neon.st3lane",
  "llvm.aarch64.neon.st4",
  "llvm.aarch64.neon.st4lane",
  "llvm.aarch64.neon.subhn",
  "llvm.aarch64.neon.suqadd",
  "llvm.aarch64.neon.tbl1",
  "llvm.aarch64.neon.tbl2",
  "llvm.aarch64.neon.tbl3",
  "llvm.aarch64.neon.tbl4",
  "llvm.aarch64.neon.tbx1",
  "llvm.aarch64.neon.tbx2",
  "llvm.aarch64.neon.tbx3",
  "llvm.aarch64.neon.tbx4",
  "llvm.aarch64.neon.uabd",
  "llvm.aarch64.neon.uaddlp",
  "llvm.aarch64.neon.uaddlv",
  "llvm.aarch64.neon.uaddv",
  "llvm.aarch64.neon.udot",
  "llvm.aarch64.neon.uhadd",
  "llvm.aarch64.neon.uhsub",
  "llvm.aarch64.neon.umax",
  "llvm.aarch64.neon.umaxp",
  "llvm.aarch64.neon.umaxv",
  "llvm.aarch64.neon.umin",
  "llvm.aarch64.neon.uminp",
  "llvm.aarch64.neon.uminv",
  "llvm.aarch64.neon.ummla",
  "llvm.aarch64.neon.umull",
  "llvm.aarch64.neon.uqadd",
  "llvm.aarch64.neon.uqrshl",
  "llvm.aarch64.neon.uqrshrn",
  "llvm.aarch64.neon.uqshl",
  "llvm.aarch64.neon.uqshrn",
  "llvm.aarch64.neon.uqsub",
  "llvm.aarch64.neon.uqxtn",
  "llvm.aarch64.neon.urecpe",
  "llvm.aarch64.neon.urhadd",
  "llvm.aarch64.neon.urshl",
  "llvm.aarch64.neon.ursqrte",
  "llvm.aarch64.neon.usdot",
  "llvm.aarch64.neon.ushl",
  "llvm.aarch64.neon.ushll",
  "llvm.aarch64.neon.usmmla",
  "llvm.aarch64.neon.usqadd",
  "llvm.aarch64.neon.vcadd.rot270",
  "llvm.aarch64.neon.vcadd.rot90",
  "llvm.aarch64.neon.vcopy.lane",
  "llvm.aarch64.neon.vcvtfp2fxs",
  "llvm.aarch64.neon.vcvtfp2fxu",
  "llvm.aarch64.neon.vcvtfp2hf",
  "llvm.aarch64.neon.vcvtfxs2fp",
  "llvm.aarch64.neon.vcvtfxu2fp",
  "llvm.aarch64.neon.vcvthf2fp",
  "llvm.aarch64.neon.vsli",
  "llvm.aarch64.neon.vsri",
  "llvm.aarch64.sdiv",
  "llvm.aarch64.settag",
  "llvm.aarch64.settag.zero",
  "llvm.aarch64.sisd.fabd",
  "llvm.aarch64.sisd.fcvtxn",
  "llvm.aarch64.space",
  "llvm.aarch64.stg",
  "llvm.aarch64.stgp",
  "llvm.aarch64.stlxp",
  "llvm.aarch64.stlxr",
  "llvm.aarch64.stxp",
  "llvm.aarch64.stxr",
  "llvm.aarch64.subp",
  "llvm.aarch64.sve.abs",
  "llvm.aarch64.sve.adclb",
  "llvm.aarch64.sve.adclt",
  "llvm.aarch64.sve.add",
  "llvm.aarch64.sve.addhnb",
  "llvm.aarch64.sve.addhnt",
  "llvm.aarch64.sve.addp",
  "llvm.aarch64.sve.adrb",
  "llvm.aarch64.sve.adrd",
  "llvm.aarch64.sve.adrh",
  "llvm.aarch64.sve.adrw",
  "llvm.aarch64.sve.aesd",
  "llvm.aarch64.sve.aese",
  "llvm.aarch64.sve.aesimc",
  "llvm.aarch64.sve.aesmc",
  "llvm.aarch64.sve.and",
  "llvm.aarch64.sve.and.z",
  "llvm.aarch64.sve.andv",
  "llvm.aarch64.sve.asr",
  "llvm.aarch64.sve.asr.wide",
  "llvm.aarch64.sve.asrd",
  "llvm.aarch64.sve.bcax",
  "llvm.aarch64.sve.bdep.x",
  "llvm.aarch64.sve.bext.x",
  "llvm.aarch64.sve.bfdot",
  "llvm.aarch64.sve.bfdot.lane",
  "llvm.aarch64.sve.bfmlalb",
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  "llvm.amdgcn.image.msaa.load.cube",
  "llvm.amdgcn.image.sample.1d",
  "llvm.amdgcn.image.sample.1darray",
  "llvm.amdgcn.image.sample.2d",
  "llvm.amdgcn.image.sample.2darray",
  "llvm.amdgcn.image.sample.3d",
  "llvm.amdgcn.image.sample.b.1d",
  "llvm.amdgcn.image.sample.b.1darray",
  "llvm.amdgcn.image.sample.b.2d",
  "llvm.amdgcn.image.sample.b.2darray",
  "llvm.amdgcn.image.sample.b.3d",
  "llvm.amdgcn.image.sample.b.cl.1d",
  "llvm.amdgcn.image.sample.b.cl.1darray",
  "llvm.amdgcn.image.sample.b.cl.2d",
  "llvm.amdgcn.image.sample.b.cl.2darray",
  "llvm.amdgcn.image.sample.b.cl.3d",
  "llvm.amdgcn.image.sample.b.cl.cube",
  "llvm.amdgcn.image.sample.b.cl.o.1d",
  "llvm.amdgcn.image.sample.b.cl.o.1darray",
  "llvm.amdgcn.image.sample.b.cl.o.2d",
  "llvm.amdgcn.image.sample.b.cl.o.2darray",
  "llvm.amdgcn.image.sample.b.cl.o.3d",
  "llvm.amdgcn.image.sample.b.cl.o.cube",
  "llvm.amdgcn.image.sample.b.cube",
  "llvm.amdgcn.image.sample.b.o.1d",
  "llvm.amdgcn.image.sample.b.o.1darray",
  "llvm.amdgcn.image.sample.b.o.2d",
  "llvm.amdgcn.image.sample.b.o.2darray",
  "llvm.amdgcn.image.sample.b.o.3d",
  "llvm.amdgcn.image.sample.b.o.cube",
  "llvm.amdgcn.image.sample.c.1d",
  "llvm.amdgcn.image.sample.c.1darray",
  "llvm.amdgcn.image.sample.c.2d",
  "llvm.amdgcn.image.sample.c.2darray",
  "llvm.amdgcn.image.sample.c.3d",
  "llvm.amdgcn.image.sample.c.b.1d",
  "llvm.amdgcn.image.sample.c.b.1darray",
  "llvm.amdgcn.image.sample.c.b.2d",
  "llvm.amdgcn.image.sample.c.b.2darray",
  "llvm.amdgcn.image.sample.c.b.3d",
  "llvm.amdgcn.image.sample.c.b.cl.1d",
  "llvm.amdgcn.image.sample.c.b.cl.1darray",
  "llvm.amdgcn.image.sample.c.b.cl.2d",
  "llvm.amdgcn.image.sample.c.b.cl.2darray",
  "llvm.amdgcn.image.sample.c.b.cl.3d",
  "llvm.amdgcn.image.sample.c.b.cl.cube",
  "llvm.amdgcn.image.sample.c.b.cl.o.1d",
  "llvm.amdgcn.image.sample.c.b.cl.o.1darray",
  "llvm.amdgcn.image.sample.c.b.cl.o.2d",
  "llvm.amdgcn.image.sample.c.b.cl.o.2darray",
  "llvm.amdgcn.image.sample.c.b.cl.o.3d",
  "llvm.amdgcn.image.sample.c.b.cl.o.cube",
  "llvm.amdgcn.image.sample.c.b.cube",
  "llvm.amdgcn.image.sample.c.b.o.1d",
  "llvm.amdgcn.image.sample.c.b.o.1darray",
  "llvm.amdgcn.image.sample.c.b.o.2d",
  "llvm.amdgcn.image.sample.c.b.o.2darray",
  "llvm.amdgcn.image.sample.c.b.o.3d",
  "llvm.amdgcn.image.sample.c.b.o.cube",
  "llvm.amdgcn.image.sample.c.cd.1d",
  "llvm.amdgcn.image.sample.c.cd.1darray",
  "llvm.amdgcn.image.sample.c.cd.2d",
  "llvm.amdgcn.image.sample.c.cd.2darray",
  "llvm.amdgcn.image.sample.c.cd.3d",
  "llvm.amdgcn.image.sample.c.cd.cl.1d",
  "llvm.amdgcn.image.sample.c.cd.cl.1darray",
  "llvm.amdgcn.image.sample.c.cd.cl.2d",
  "llvm.amdgcn.image.sample.c.cd.cl.2darray",
  "llvm.amdgcn.image.sample.c.cd.cl.3d",
  "llvm.amdgcn.image.sample.c.cd.cl.cube",
  "llvm.amdgcn.image.sample.c.cd.cl.o.1d",
  "llvm.amdgcn.image.sample.c.cd.cl.o.1darray",
  "llvm.amdgcn.image.sample.c.cd.cl.o.2d",
  "llvm.amdgcn.image.sample.c.cd.cl.o.2darray",
  "llvm.amdgcn.image.sample.c.cd.cl.o.3d",
  "llvm.amdgcn.image.sample.c.cd.cl.o.cube",
  "llvm.amdgcn.image.sample.c.cd.cube",
  "llvm.amdgcn.image.sample.c.cd.o.1d",
  "llvm.amdgcn.image.sample.c.cd.o.1darray",
  "llvm.amdgcn.image.sample.c.cd.o.2d",
  "llvm.amdgcn.image.sample.c.cd.o.2darray",
  "llvm.amdgcn.image.sample.c.cd.o.3d",
  "llvm.amdgcn.image.sample.c.cd.o.cube",
  "llvm.amdgcn.image.sample.c.cl.1d",
  "llvm.amdgcn.image.sample.c.cl.1darray",
  "llvm.amdgcn.image.sample.c.cl.2d",
  "llvm.amdgcn.image.sample.c.cl.2darray",
  "llvm.amdgcn.image.sample.c.cl.3d",
  "llvm.amdgcn.image.sample.c.cl.cube",
  "llvm.amdgcn.image.sample.c.cl.o.1d",
  "llvm.amdgcn.image.sample.c.cl.o.1darray",
  "llvm.amdgcn.image.sample.c.cl.o.2d",
  "llvm.amdgcn.image.sample.c.cl.o.2darray",
  "llvm.amdgcn.image.sample.c.cl.o.3d",
  "llvm.amdgcn.image.sample.c.cl.o.cube",
  "llvm.amdgcn.image.sample.c.cube",
  "llvm.amdgcn.image.sample.c.d.1d",
  "llvm.amdgcn.image.sample.c.d.1darray",
  "llvm.amdgcn.image.sample.c.d.2d",
  "llvm.amdgcn.image.sample.c.d.2darray",
  "llvm.amdgcn.image.sample.c.d.3d",
  "llvm.amdgcn.image.sample.c.d.cl.1d",
  "llvm.amdgcn.image.sample.c.d.cl.1darray",
  "llvm.amdgcn.image.sample.c.d.cl.2d",
  "llvm.amdgcn.image.sample.c.d.cl.2darray",
  "llvm.amdgcn.image.sample.c.d.cl.3d",
  "llvm.amdgcn.image.sample.c.d.cl.cube",
  "llvm.amdgcn.image.sample.c.d.cl.o.1d",
  "llvm.amdgcn.image.sample.c.d.cl.o.1darray",
  "llvm.amdgcn.image.sample.c.d.cl.o.2d",
  "llvm.amdgcn.image.sample.c.d.cl.o.2darray",
  "llvm.amdgcn.image.sample.c.d.cl.o.3d",
  "llvm.amdgcn.image.sample.c.d.cl.o.cube",
  "llvm.amdgcn.image.sample.c.d.cube",
  "llvm.amdgcn.image.sample.c.d.o.1d",
  "llvm.amdgcn.image.sample.c.d.o.1darray",
  "llvm.amdgcn.image.sample.c.d.o.2d",
  "llvm.amdgcn.image.sample.c.d.o.2darray",
  "llvm.amdgcn.image.sample.c.d.o.3d",
  "llvm.amdgcn.image.sample.c.d.o.cube",
  "llvm.amdgcn.image.sample.c.l.1d",
  "llvm.amdgcn.image.sample.c.l.1darray",
  "llvm.amdgcn.image.sample.c.l.2d",
  "llvm.amdgcn.image.sample.c.l.2darray",
  "llvm.amdgcn.image.sample.c.l.3d",
  "llvm.amdgcn.image.sample.c.l.cube",
  "llvm.amdgcn.image.sample.c.l.o.1d",
  "llvm.amdgcn.image.sample.c.l.o.1darray",
  "llvm.amdgcn.image.sample.c.l.o.2d",
  "llvm.amdgcn.image.sample.c.l.o.2darray",
  "llvm.amdgcn.image.sample.c.l.o.3d",
  "llvm.amdgcn.image.sample.c.l.o.cube",
  "llvm.amdgcn.image.sample.c.lz.1d",
  "llvm.amdgcn.image.sample.c.lz.1darray",
  "llvm.amdgcn.image.sample.c.lz.2d",
  "llvm.amdgcn.image.sample.c.lz.2darray",
  "llvm.amdgcn.image.sample.c.lz.3d",
  "llvm.amdgcn.image.sample.c.lz.cube",
  "llvm.amdgcn.image.sample.c.lz.o.1d",
  "llvm.amdgcn.image.sample.c.lz.o.1darray",
  "llvm.amdgcn.image.sample.c.lz.o.2d",
  "llvm.amdgcn.image.sample.c.lz.o.2darray",
  "llvm.amdgcn.image.sample.c.lz.o.3d",
  "llvm.amdgcn.image.sample.c.lz.o.cube",
  "llvm.amdgcn.image.sample.c.o.1d",
  "llvm.amdgcn.image.sample.c.o.1darray",
  "llvm.amdgcn.image.sample.c.o.2d",
  "llvm.amdgcn.image.sample.c.o.2darray",
  "llvm.amdgcn.image.sample.c.o.3d",
  "llvm.amdgcn.image.sample.c.o.cube",
  "llvm.amdgcn.image.sample.cd.1d",
  "llvm.amdgcn.image.sample.cd.1darray",
  "llvm.amdgcn.image.sample.cd.2d",
  "llvm.amdgcn.image.sample.cd.2darray",
  "llvm.amdgcn.image.sample.cd.3d",
  "llvm.amdgcn.image.sample.cd.cl.1d",
  "llvm.amdgcn.image.sample.cd.cl.1darray",
  "llvm.amdgcn.image.sample.cd.cl.2d",
  "llvm.amdgcn.image.sample.cd.cl.2darray",
  "llvm.amdgcn.image.sample.cd.cl.3d",
  "llvm.amdgcn.image.sample.cd.cl.cube",
  "llvm.amdgcn.image.sample.cd.cl.o.1d",
  "llvm.amdgcn.image.sample.cd.cl.o.1darray",
  "llvm.amdgcn.image.sample.cd.cl.o.2d",
  "llvm.amdgcn.image.sample.cd.cl.o.2darray",
  "llvm.amdgcn.image.sample.cd.cl.o.3d",
  "llvm.amdgcn.image.sample.cd.cl.o.cube",
  "llvm.amdgcn.image.sample.cd.cube",
  "llvm.amdgcn.image.sample.cd.o.1d",
  "llvm.amdgcn.image.sample.cd.o.1darray",
  "llvm.amdgcn.image.sample.cd.o.2d",
  "llvm.amdgcn.image.sample.cd.o.2darray",
  "llvm.amdgcn.image.sample.cd.o.3d",
  "llvm.amdgcn.image.sample.cd.o.cube",
  "llvm.amdgcn.image.sample.cl.1d",
  "llvm.amdgcn.image.sample.cl.1darray",
  "llvm.amdgcn.image.sample.cl.2d",
  "llvm.amdgcn.image.sample.cl.2darray",
  "llvm.amdgcn.image.sample.cl.3d",
  "llvm.amdgcn.image.sample.cl.cube",
  "llvm.amdgcn.image.sample.cl.o.1d",
  "llvm.amdgcn.image.sample.cl.o.1darray",
  "llvm.amdgcn.image.sample.cl.o.2d",
  "llvm.amdgcn.image.sample.cl.o.2darray",
  "llvm.amdgcn.image.sample.cl.o.3d",
  "llvm.amdgcn.image.sample.cl.o.cube",
  "llvm.amdgcn.image.sample.cube",
  "llvm.amdgcn.image.sample.d.1d",
  "llvm.amdgcn.image.sample.d.1darray",
  "llvm.amdgcn.image.sample.d.2d",
  "llvm.amdgcn.image.sample.d.2darray",
  "llvm.amdgcn.image.sample.d.3d",
  "llvm.amdgcn.image.sample.d.cl.1d",
  "llvm.amdgcn.image.sample.d.cl.1darray",
  "llvm.amdgcn.image.sample.d.cl.2d",
  "llvm.amdgcn.image.sample.d.cl.2darray",
  "llvm.amdgcn.image.sample.d.cl.3d",
  "llvm.amdgcn.image.sample.d.cl.cube",
  "llvm.amdgcn.image.sample.d.cl.o.1d",
  "llvm.amdgcn.image.sample.d.cl.o.1darray",
  "llvm.amdgcn.image.sample.d.cl.o.2d",
  "llvm.amdgcn.image.sample.d.cl.o.2darray",
  "llvm.amdgcn.image.sample.d.cl.o.3d",
  "llvm.amdgcn.image.sample.d.cl.o.cube",
  "llvm.amdgcn.image.sample.d.cube",
  "llvm.amdgcn.image.sample.d.o.1d",
  "llvm.amdgcn.image.sample.d.o.1darray",
  "llvm.amdgcn.image.sample.d.o.2d",
  "llvm.amdgcn.image.sample.d.o.2darray",
  "llvm.amdgcn.image.sample.d.o.3d",
  "llvm.amdgcn.image.sample.d.o.cube",
  "llvm.amdgcn.image.sample.l.1d",
  "llvm.amdgcn.image.sample.l.1darray",
  "llvm.amdgcn.image.sample.l.2d",
  "llvm.amdgcn.image.sample.l.2darray",
  "llvm.amdgcn.image.sample.l.3d",
  "llvm.amdgcn.image.sample.l.cube",
  "llvm.amdgcn.image.sample.l.o.1d",
  "llvm.amdgcn.image.sample.l.o.1darray",
  "llvm.amdgcn.image.sample.l.o.2d",
  "llvm.amdgcn.image.sample.l.o.2darray",
  "llvm.amdgcn.image.sample.l.o.3d",
  "llvm.amdgcn.image.sample.l.o.cube",
  "llvm.amdgcn.image.sample.lz.1d",
  "llvm.amdgcn.image.sample.lz.1darray",
  "llvm.amdgcn.image.sample.lz.2d",
  "llvm.amdgcn.image.sample.lz.2darray",
  "llvm.amdgcn.image.sample.lz.3d",
  "llvm.amdgcn.image.sample.lz.cube",
  "llvm.amdgcn.image.sample.lz.o.1d",
  "llvm.amdgcn.image.sample.lz.o.1darray",
  "llvm.amdgcn.image.sample.lz.o.2d",
  "llvm.amdgcn.image.sample.lz.o.2darray",
  "llvm.amdgcn.image.sample.lz.o.3d",
  "llvm.amdgcn.image.sample.lz.o.cube",
  "llvm.amdgcn.image.sample.o.1d",
  "llvm.amdgcn.image.sample.o.1darray",
  "llvm.amdgcn.image.sample.o.2d",
  "llvm.amdgcn.image.sample.o.2darray",
  "llvm.amdgcn.image.sample.o.3d",
  "llvm.amdgcn.image.sample.o.cube",
  "llvm.amdgcn.image.store.1d",
  "llvm.amdgcn.image.store.1darray",
  "llvm.amdgcn.image.store.2d",
  "llvm.amdgcn.image.store.2darray",
  "llvm.amdgcn.image.store.2darraymsaa",
  "llvm.amdgcn.image.store.2dmsaa",
  "llvm.amdgcn.image.store.3d",
  "llvm.amdgcn.image.store.cube",
  "llvm.amdgcn.image.store.mip.1d",
  "llvm.amdgcn.image.store.mip.1darray",
  "llvm.amdgcn.image.store.mip.2d",
  "llvm.amdgcn.image.store.mip.2darray",
  "llvm.amdgcn.image.store.mip.3d",
  "llvm.amdgcn.image.store.mip.cube",
  "llvm.amdgcn.implicit.buffer.ptr",
  "llvm.amdgcn.implicitarg.ptr",
  "llvm.amdgcn.init.exec",
  "llvm.amdgcn.init.exec.from.input",
  "llvm.amdgcn.interp.mov",
  "llvm.amdgcn.interp.p1",
  "llvm.amdgcn.interp.p1.f16",
  "llvm.amdgcn.interp.p2",
  "llvm.amdgcn.interp.p2.f16",
  "llvm.amdgcn.is.private",
  "llvm.amdgcn.is.shared",
  "llvm.amdgcn.kernarg.segment.ptr",
  "llvm.amdgcn.kill",
  "llvm.amdgcn.ldexp",
  "llvm.amdgcn.lerp",
  "llvm.amdgcn.log.clamp",
  "llvm.amdgcn.loop",
  "llvm.amdgcn.mbcnt.hi",
  "llvm.amdgcn.mbcnt.lo",
  "llvm.amdgcn.mfma.f32.16x16x16f16",
  "llvm.amdgcn.mfma.f32.16x16x1f32",
  "llvm.amdgcn.mfma.f32.16x16x2bf16",
  "llvm.amdgcn.mfma.f32.16x16x4f16",
  "llvm.amdgcn.mfma.f32.16x16x4f32",
  "llvm.amdgcn.mfma.f32.16x16x8bf16",
  "llvm.amdgcn.mfma.f32.32x32x1f32",
  "llvm.amdgcn.mfma.f32.32x32x2bf16",
  "llvm.amdgcn.mfma.f32.32x32x2f32",
  "llvm.amdgcn.mfma.f32.32x32x4bf16",
  "llvm.amdgcn.mfma.f32.32x32x4f16",
  "llvm.amdgcn.mfma.f32.32x32x8f16",
  "llvm.amdgcn.mfma.f32.4x4x1f32",
  "llvm.amdgcn.mfma.f32.4x4x2bf16",
  "llvm.amdgcn.mfma.f32.4x4x4f16",
  "llvm.amdgcn.mfma.i32.16x16x16i8",
  "llvm.amdgcn.mfma.i32.16x16x4i8",
  "llvm.amdgcn.mfma.i32.32x32x4i8",
  "llvm.amdgcn.mfma.i32.32x32x8i8",
  "llvm.amdgcn.mfma.i32.4x4x4i8",
  "llvm.amdgcn.mov.dpp",
  "llvm.amdgcn.mov.dpp8",
  "llvm.amdgcn.mqsad.pk.u16.u8",
  "llvm.amdgcn.mqsad.u32.u8",
  "llvm.amdgcn.msad.u8",
  "llvm.amdgcn.mul.i24",
  "llvm.amdgcn.mul.u24",
  "llvm.amdgcn.permlane16",
  "llvm.amdgcn.permlanex16",
  "llvm.amdgcn.ps.live",
  "llvm.amdgcn.qsad.pk.u16.u8",
  "llvm.amdgcn.queue.ptr",
  "llvm.amdgcn.raw.buffer.atomic.add",
  "llvm.amdgcn.raw.buffer.atomic.and",
  "llvm.amdgcn.raw.buffer.atomic.cmpswap",
  "llvm.amdgcn.raw.buffer.atomic.dec",
  "llvm.amdgcn.raw.buffer.atomic.fadd",
  "llvm.amdgcn.raw.buffer.atomic.inc",
  "llvm.amdgcn.raw.buffer.atomic.or",
  "llvm.amdgcn.raw.buffer.atomic.smax",
  "llvm.amdgcn.raw.buffer.atomic.smin",
  "llvm.amdgcn.raw.buffer.atomic.sub",
  "llvm.amdgcn.raw.buffer.atomic.swap",
  "llvm.amdgcn.raw.buffer.atomic.umax",
  "llvm.amdgcn.raw.buffer.atomic.umin",
  "llvm.amdgcn.raw.buffer.atomic.xor",
  "llvm.amdgcn.raw.buffer.load",
  "llvm.amdgcn.raw.buffer.load.format",
  "llvm.amdgcn.raw.buffer.store",
  "llvm.amdgcn.raw.buffer.store.format",
  "llvm.amdgcn.raw.tbuffer.load",
  "llvm.amdgcn.raw.tbuffer.store",
  "llvm.amdgcn.rcp",
  "llvm.amdgcn.rcp.legacy",
  "llvm.amdgcn.readfirstlane",
  "llvm.amdgcn.readlane",
  "llvm.amdgcn.reloc.constant",
  "llvm.amdgcn.rsq",
  "llvm.amdgcn.rsq.clamp",
  "llvm.amdgcn.rsq.legacy",
  "llvm.amdgcn.s.barrier",
  "llvm.amdgcn.s.buffer.load",
  "llvm.amdgcn.s.dcache.inv",
  "llvm.amdgcn.s.dcache.inv.vol",
  "llvm.amdgcn.s.dcache.wb",
  "llvm.amdgcn.s.dcache.wb.vol",
  "llvm.amdgcn.s.decperflevel",
  "llvm.amdgcn.s.get.waveid.in.workgroup",
  "llvm.amdgcn.s.getpc",
  "llvm.amdgcn.s.getreg",
  "llvm.amdgcn.s.incperflevel",
  "llvm.amdgcn.s.memrealtime",
  "llvm.amdgcn.s.memtime",
  "llvm.amdgcn.s.sendmsg",
  "llvm.amdgcn.s.sendmsghalt",
  "llvm.amdgcn.s.setreg",
  "llvm.amdgcn.s.sleep",
  "llvm.amdgcn.s.waitcnt",
  "llvm.amdgcn.sad.hi.u8",
  "llvm.amdgcn.sad.u16",
  "llvm.amdgcn.sad.u8",
  "llvm.amdgcn.sbfe",
  "llvm.amdgcn.sdot2",
  "llvm.amdgcn.sdot4",
  "llvm.amdgcn.sdot8",
  "llvm.amdgcn.set.inactive",
  "llvm.amdgcn.sffbh",
  "llvm.amdgcn.sin",
  "llvm.amdgcn.softwqm",
  "llvm.amdgcn.sqrt",
  "llvm.amdgcn.struct.buffer.atomic.add",
  "llvm.amdgcn.struct.buffer.atomic.and",
  "llvm.amdgcn.struct.buffer.atomic.cmpswap",
  "llvm.amdgcn.struct.buffer.atomic.dec",
  "llvm.amdgcn.struct.buffer.atomic.fadd",
  "llvm.amdgcn.struct.buffer.atomic.inc",
  "llvm.amdgcn.struct.buffer.atomic.or",
  "llvm.amdgcn.struct.buffer.atomic.smax",
  "llvm.amdgcn.struct.buffer.atomic.smin",
  "llvm.amdgcn.struct.buffer.atomic.sub",
  "llvm.amdgcn.struct.buffer.atomic.swap",
  "llvm.amdgcn.struct.buffer.atomic.umax",
  "llvm.amdgcn.struct.buffer.atomic.umin",
  "llvm.amdgcn.struct.buffer.atomic.xor",
  "llvm.amdgcn.struct.buffer.load",
  "llvm.amdgcn.struct.buffer.load.format",
  "llvm.amdgcn.struct.buffer.store",
  "llvm.amdgcn.struct.buffer.store.format",
  "llvm.amdgcn.struct.tbuffer.load",
  "llvm.amdgcn.struct.tbuffer.store",
  "llvm.amdgcn.tbuffer.load",
  "llvm.amdgcn.tbuffer.store",
  "llvm.amdgcn.trig.preop",
  "llvm.amdgcn.ubfe",
  "llvm.amdgcn.udot2",
  "llvm.amdgcn.udot4",
  "llvm.amdgcn.udot8",
  "llvm.amdgcn.unreachable",
  "llvm.amdgcn.update.dpp",
  "llvm.amdgcn.wave.barrier",
  "llvm.amdgcn.wavefrontsize",
  "llvm.amdgcn.workgroup.id.x",
  "llvm.amdgcn.workgroup.id.y",
  "llvm.amdgcn.workgroup.id.z",
  "llvm.amdgcn.workitem.id.x",
  "llvm.amdgcn.workitem.id.y",
  "llvm.amdgcn.workitem.id.z",
  "llvm.amdgcn.wqm",
  "llvm.amdgcn.wqm.vote",
  "llvm.amdgcn.writelane",
  "llvm.amdgcn.wwm",
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  "llvm.hexagon.M4.cmpyr.whc",
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  "llvm.hexagon.M4.mpyrr.addi",
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  "llvm.hexagon.M4.or.xor",
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  "llvm.hexagon.S2.shuffeb",
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  "llvm.hexagon.S2.shuffob",
  "llvm.hexagon.S2.shuffoh",
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  "llvm.hexagon.S2.storerf.pbr",
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  "llvm.hexagon.S2.storerf.pcr",
  "llvm.hexagon.S2.storerh.pbr",
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  "llvm.hexagon.S2.storeri.pbr",
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  "llvm.hexagon.S2.storew.locked",
  "llvm.hexagon.S2.svsathb",
  "llvm.hexagon.S2.svsathub",
  "llvm.hexagon.S2.tableidxb.goodsyntax",
  "llvm.hexagon.S2.tableidxd.goodsyntax",
  "llvm.hexagon.S2.tableidxh.goodsyntax",
  "llvm.hexagon.S2.tableidxw.goodsyntax",
  "llvm.hexagon.S2.togglebit.i",
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  "llvm.hexagon.S2.tstbit.i",
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  "llvm.hexagon.S2.valignib",
  "llvm.hexagon.S2.valignrb",
  "llvm.hexagon.S2.vcnegh",
  "llvm.hexagon.S2.vcrotate",
  "llvm.hexagon.S2.vrcnegh",
  "llvm.hexagon.S2.vrndpackwh",
  "llvm.hexagon.S2.vrndpackwhs",
  "llvm.hexagon.S2.vsathb",
  "llvm.hexagon.S2.vsathb.nopack",
  "llvm.hexagon.S2.vsathub",
  "llvm.hexagon.S2.vsathub.nopack",
  "llvm.hexagon.S2.vsatwh",
  "llvm.hexagon.S2.vsatwh.nopack",
  "llvm.hexagon.S2.vsatwuh",
  "llvm.hexagon.S2.vsatwuh.nopack",
  "llvm.hexagon.S2.vsplatrb",
  "llvm.hexagon.S2.vsplatrh",
  "llvm.hexagon.S2.vspliceib",
  "llvm.hexagon.S2.vsplicerb",
  "llvm.hexagon.S2.vsxtbh",
  "llvm.hexagon.S2.vsxthw",
  "llvm.hexagon.S2.vtrunehb",
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  "llvm.hexagon.S2.vtrunowh",
  "llvm.hexagon.S2.vzxtbh",
  "llvm.hexagon.S2.vzxthw",
  "llvm.hexagon.S4.addaddi",
  "llvm.hexagon.S4.addi.asl.ri",
  "llvm.hexagon.S4.addi.lsr.ri",
  "llvm.hexagon.S4.andi.asl.ri",
  "llvm.hexagon.S4.andi.lsr.ri",
  "llvm.hexagon.S4.clbaddi",
  "llvm.hexagon.S4.clbpaddi",
  "llvm.hexagon.S4.clbpnorm",
  "llvm.hexagon.S4.extract",
  "llvm.hexagon.S4.extract.rp",
  "llvm.hexagon.S4.extractp",
  "llvm.hexagon.S4.extractp.rp",
  "llvm.hexagon.S4.lsli",
  "llvm.hexagon.S4.ntstbit.i",
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  "llvm.hexagon.S4.or.andi",
  "llvm.hexagon.S4.or.andix",
  "llvm.hexagon.S4.or.ori",
  "llvm.hexagon.S4.ori.asl.ri",
  "llvm.hexagon.S4.ori.lsr.ri",
  "llvm.hexagon.S4.parity",
  "llvm.hexagon.S4.stored.locked",
  "llvm.hexagon.S4.subaddi",
  "llvm.hexagon.S4.subi.asl.ri",
  "llvm.hexagon.S4.subi.lsr.ri",
  "llvm.hexagon.S4.vrcrotate",
  "llvm.hexagon.S4.vrcrotate.acc",
  "llvm.hexagon.S4.vxaddsubh",
  "llvm.hexagon.S4.vxaddsubhr",
  "llvm.hexagon.S4.vxaddsubw",
  "llvm.hexagon.S4.vxsubaddh",
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  "llvm.hexagon.V6.vlutvwh.oracci",
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  "llvm.hexagon.V6.vlutvwhi",
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  "llvm.hexagon.V6.vmaskedstorenq",
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  "llvm.hexagon.V6.vmpabus",
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  "llvm.hexagon.V6.vmpahhsat",
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  "llvm.hexagon.V6.vmpybus",
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  "llvm.hexagon.V6.vscattermhq",
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  "llvm.hexagon.V6.vsubb.128B",
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  "llvm.hexagon.V6.vsubhsat.dv.128B",
  "llvm.hexagon.V6.vsubhw",
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  "llvm.hexagon.V6.vsubuhw",
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  "llvm.hexagon.V6.vunpackuh",
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  "llvm.hexagon.Y2.dczeroa",
  "llvm.hexagon.Y4.l2fetch",
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  "llvm.hexagon.circ.ldb",
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  "llvm.hexagon.circ.sth",
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  "llvm.x86.sse41.dppd",
  "llvm.x86.sse41.dpps",
  "llvm.x86.sse41.insertps",
  "llvm.x86.sse41.mpsadbw",
  "llvm.x86.sse41.packusdw",
  "llvm.x86.sse41.pblendvb",
  "llvm.x86.sse41.phminposuw",
  "llvm.x86.sse41.ptestc",
  "llvm.x86.sse41.ptestnzc",
  "llvm.x86.sse41.ptestz",
  "llvm.x86.sse41.round.pd",
  "llvm.x86.sse41.round.ps",
  "llvm.x86.sse41.round.sd",
  "llvm.x86.sse41.round.ss",
  "llvm.x86.sse42.crc32.32.16",
  "llvm.x86.sse42.crc32.32.32",
  "llvm.x86.sse42.crc32.32.8",
  "llvm.x86.sse42.crc32.64.64",
  "llvm.x86.sse42.pcmpestri128",
  "llvm.x86.sse42.pcmpestria128",
  "llvm.x86.sse42.pcmpestric128",
  "llvm.x86.sse42.pcmpestrio128",
  "llvm.x86.sse42.pcmpestris128",
  "llvm.x86.sse42.pcmpestriz128",
  "llvm.x86.sse42.pcmpestrm128",
  "llvm.x86.sse42.pcmpistri128",
  "llvm.x86.sse42.pcmpistria128",
  "llvm.x86.sse42.pcmpistric128",
  "llvm.x86.sse42.pcmpistrio128",
  "llvm.x86.sse42.pcmpistris128",
  "llvm.x86.sse42.pcmpistriz128",
  "llvm.x86.sse42.pcmpistrm128",
  "llvm.x86.sse4a.extrq",
  "llvm.x86.sse4a.extrqi",
  "llvm.x86.sse4a.insertq",
  "llvm.x86.sse4a.insertqi",
  "llvm.x86.ssse3.pabs.b",
  "llvm.x86.ssse3.pabs.d",
  "llvm.x86.ssse3.pabs.w",
  "llvm.x86.ssse3.phadd.d",
  "llvm.x86.ssse3.phadd.d.128",
  "llvm.x86.ssse3.phadd.sw",
  "llvm.x86.ssse3.phadd.sw.128",
  "llvm.x86.ssse3.phadd.w",
  "llvm.x86.ssse3.phadd.w.128",
  "llvm.x86.ssse3.phsub.d",
  "llvm.x86.ssse3.phsub.d.128",
  "llvm.x86.ssse3.phsub.sw",
  "llvm.x86.ssse3.phsub.sw.128",
  "llvm.x86.ssse3.phsub.w",
  "llvm.x86.ssse3.phsub.w.128",
  "llvm.x86.ssse3.pmadd.ub.sw",
  "llvm.x86.ssse3.pmadd.ub.sw.128",
  "llvm.x86.ssse3.pmul.hr.sw",
  "llvm.x86.ssse3.pmul.hr.sw.128",
  "llvm.x86.ssse3.pshuf.b",
  "llvm.x86.ssse3.pshuf.b.128",
  "llvm.x86.ssse3.psign.b",
  "llvm.x86.ssse3.psign.b.128",
  "llvm.x86.ssse3.psign.d",
  "llvm.x86.ssse3.psign.d.128",
  "llvm.x86.ssse3.psign.w",
  "llvm.x86.ssse3.psign.w.128",
  "llvm.x86.sttilecfg",
  "llvm.x86.subborrow.32",
  "llvm.x86.subborrow.64",
  "llvm.x86.tbm.bextri.u32",
  "llvm.x86.tbm.bextri.u64",
  "llvm.x86.tdpbf16ps",
  "llvm.x86.tdpbssd",
  "llvm.x86.tdpbsud",
  "llvm.x86.tdpbusd",
  "llvm.x86.tdpbuud",
  "llvm.x86.tileloadd64",
  "llvm.x86.tileloaddt164",
  "llvm.x86.tilerelease",
  "llvm.x86.tilestored64",
  "llvm.x86.tilezero",
  "llvm.x86.tpause",
  "llvm.x86.umonitor",
  "llvm.x86.umwait",
  "llvm.x86.vcvtps2ph.128",
  "llvm.x86.vcvtps2ph.256",
  "llvm.x86.vgf2p8affineinvqb.128",
  "llvm.x86.vgf2p8affineinvqb.256",
  "llvm.x86.vgf2p8affineinvqb.512",
  "llvm.x86.vgf2p8affineqb.128",
  "llvm.x86.vgf2p8affineqb.256",
  "llvm.x86.vgf2p8affineqb.512",
  "llvm.x86.vgf2p8mulb.128",
  "llvm.x86.vgf2p8mulb.256",
  "llvm.x86.vgf2p8mulb.512",
  "llvm.x86.wbinvd",
  "llvm.x86.wbnoinvd",
  "llvm.x86.wrfsbase.32",
  "llvm.x86.wrfsbase.64",
  "llvm.x86.wrgsbase.32",
  "llvm.x86.wrgsbase.64",
  "llvm.x86.wrpkru",
  "llvm.x86.wrssd",
  "llvm.x86.wrssq",
  "llvm.x86.wrussd",
  "llvm.x86.wrussq",
  "llvm.x86.xabort",
  "llvm.x86.xbegin",
  "llvm.x86.xend",
  "llvm.x86.xgetbv",
  "llvm.x86.xop.vfrcz.pd",
  "llvm.x86.xop.vfrcz.pd.256",
  "llvm.x86.xop.vfrcz.ps",
  "llvm.x86.xop.vfrcz.ps.256",
  "llvm.x86.xop.vfrcz.sd",
  "llvm.x86.xop.vfrcz.ss",
  "llvm.x86.xop.vpermil2pd",
  "llvm.x86.xop.vpermil2pd.256",
  "llvm.x86.xop.vpermil2ps",
  "llvm.x86.xop.vpermil2ps.256",
  "llvm.x86.xop.vphaddbd",
  "llvm.x86.xop.vphaddbq",
  "llvm.x86.xop.vphaddbw",
  "llvm.x86.xop.vphadddq",
  "llvm.x86.xop.vphaddubd",
  "llvm.x86.xop.vphaddubq",
  "llvm.x86.xop.vphaddubw",
  "llvm.x86.xop.vphaddudq",
  "llvm.x86.xop.vphadduwd",
  "llvm.x86.xop.vphadduwq",
  "llvm.x86.xop.vphaddwd",
  "llvm.x86.xop.vphaddwq",
  "llvm.x86.xop.vphsubbw",
  "llvm.x86.xop.vphsubdq",
  "llvm.x86.xop.vphsubwd",
  "llvm.x86.xop.vpmacsdd",
  "llvm.x86.xop.vpmacsdqh",
  "llvm.x86.xop.vpmacsdql",
  "llvm.x86.xop.vpmacssdd",
  "llvm.x86.xop.vpmacssdqh",
  "llvm.x86.xop.vpmacssdql",
  "llvm.x86.xop.vpmacsswd",
  "llvm.x86.xop.vpmacssww",
  "llvm.x86.xop.vpmacswd",
  "llvm.x86.xop.vpmacsww",
  "llvm.x86.xop.vpmadcsswd",
  "llvm.x86.xop.vpmadcswd",
  "llvm.x86.xop.vpperm",
  "llvm.x86.xop.vpshab",
  "llvm.x86.xop.vpshad",
  "llvm.x86.xop.vpshaq",
  "llvm.x86.xop.vpshaw",
  "llvm.x86.xop.vpshlb",
  "llvm.x86.xop.vpshld",
  "llvm.x86.xop.vpshlq",
  "llvm.x86.xop.vpshlw",
  "llvm.x86.xresldtrk",
  "llvm.x86.xrstor",
  "llvm.x86.xrstor64",
  "llvm.x86.xrstors",
  "llvm.x86.xrstors64",
  "llvm.x86.xsave",
  "llvm.x86.xsave64",
  "llvm.x86.xsavec",
  "llvm.x86.xsavec64",
  "llvm.x86.xsaveopt",
  "llvm.x86.xsaveopt64",
  "llvm.x86.xsaves",
  "llvm.x86.xsaves64",
  "llvm.x86.xsetbv",
  "llvm.x86.xsusldtrk",
  "llvm.x86.xtest",
  "llvm.xcore.bitrev",
  "llvm.xcore.checkevent",
  "llvm.xcore.chkct",
  "llvm.xcore.clre",
  "llvm.xcore.clrpt",
  "llvm.xcore.clrsr",
  "llvm.xcore.crc32",
  "llvm.xcore.crc8",
  "llvm.xcore.edu",
  "llvm.xcore.eeu",
  "llvm.xcore.endin",
  "llvm.xcore.freer",
  "llvm.xcore.geted",
  "llvm.xcore.getet",
  "llvm.xcore.getid",
  "llvm.xcore.getps",
  "llvm.xcore.getr",
  "llvm.xcore.getst",
  "llvm.xcore.getts",
  "llvm.xcore.in",
  "llvm.xcore.inct",
  "llvm.xcore.initcp",
  "llvm.xcore.initdp",
  "llvm.xcore.initlr",
  "llvm.xcore.initpc",
  "llvm.xcore.initsp",
  "llvm.xcore.inshr",
  "llvm.xcore.int",
  "llvm.xcore.mjoin",
  "llvm.xcore.msync",
  "llvm.xcore.out",
  "llvm.xcore.outct",
  "llvm.xcore.outshr",
  "llvm.xcore.outt",
  "llvm.xcore.peek",
  "llvm.xcore.setc",
  "llvm.xcore.setclk",
  "llvm.xcore.setd",
  "llvm.xcore.setev",
  "llvm.xcore.setps",
  "llvm.xcore.setpsc",
  "llvm.xcore.setpt",
  "llvm.xcore.setrdy",
  "llvm.xcore.setsr",
  "llvm.xcore.settw",
  "llvm.xcore.setv",
  "llvm.xcore.sext",
  "llvm.xcore.ssync",
  "llvm.xcore.syncr",
  "llvm.xcore.testct",
  "llvm.xcore.testwct",
  "llvm.xcore.waitevent",
  "llvm.xcore.zext",
#endif

// Intrinsic ID to overload bitset
#ifdef GET_INTRINSIC_OVERLOAD_TABLE
static const uint8_t OTable[] = {
  0 | (1<<1) | (1<<2) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<3) | (1<<4) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<3),
  0,
  0 | (1<<5),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4),
  0 | (1<<5),
  0,
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<6) | (1<<7),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5),
  0 | (1<<1) | (1<<2),
  0 | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2),
  0,
  0,
  0,
  0 | (1<<1) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
  0 | (1<<0) | (1<<1) | (1<<4) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2),
  0,
  0,
  0,
  0,
  0 | (1<<1) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<3) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<6),
  0 | (1<<4) | (1<<6),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
  0,
  0 | (1<<2) | (1<<7),
  0 | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<5),
  0 | (1<<0) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<3) | (1<<6),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<7),
  0 | (1<<2) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<5),
  0 | (1<<0) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4),
  0 | (1<<1) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<3) | (1<<4),
  0,
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1),
  0 | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<4) | (1<<5) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2),
  0,
  0 | (1<<0) | (1<<2) | (1<<3),
  0,
  0,
  0 | (1<<2) | (1<<3),
  0 | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<7),
  0 | (1<<0) | (1<<3),
  0,
  0 | (1<<7),
  0 | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<4),
  0 | (1<<5),
  0 | (1<<0),
  0 | (1<<5) | (1<<6),
  0 | (1<<0) | (1<<2) | (1<<3) | (1<<4) | (1<<6),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<4) | (1<<6),
  0,
  0,
  0 | (1<<5),
  0 | (1<<3),
  0 | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
  0 | (1<<2),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
  0 | (1<<3) | (1<<4) | (1<<5),
  0 | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5),
  0 | (1<<2) | (1<<6),
  0,
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<1) | (1<<3),
  0,
  0,
  0,
  0 | (1<<0) | (1<<1) | (1<<6),
  0 | (1<<0),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<2) | (1<<3),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
  0,
  0 | (1<<5) | (1<<6),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
  0,
  0,
  0,
  0,
  0 | (1<<0),
  0,
  0 | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<4),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<2) | (1<<3),
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2),
  0,
  0,
  0,
  0,
  0,
  0 | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2),
  0,
  0,
  0,
  0,
  0,
  0 | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2),
  0,
  0,
  0,
  0,
  0,
  0 | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<2),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<1) | (1<<2),
  0 | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
  0,
  0 | (1<<1),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<3) | (1<<4),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<6),
  0,
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<2) | (1<<3),
  0 | (1<<2) | (1<<3) | (1<<6),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<6),
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<4),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<0) | (1<<5),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<6),
  0 | (1<<0) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<4) | (1<<5) | (1<<6),
  0 | (1<<0) | (1<<1) | (1<<4) | (1<<5) | (1<<6),
  0
};

return (OTable[id/8] & (1 << (id%8))) != 0;
#endif

// Global intrinsic function declaration type table.
#ifdef GET_INTRINSIC_GENERATOR_GLOBAL
static const unsigned IIT_Table[] = {
  0x17f1f, 0x4f, 0x2e2e, (1U<<31) | 1880, 0x10, 0x7f1f, 0x7f1f, 
  (1U<<31) | 5931, (1U<<31) | 5928, (1U<<31) | 8182, 0x7f2f, 0x7f2f, 0x2e2e0, (1U<<31) | 8203, 0x32f, 
  0x2f3, 0x7f7f2f, (1U<<31) | 8185, (1U<<31) | 1432, (1U<<31) | 8182, (1U<<31) | 8188, (1U<<31) | 968, 0x2e0, 
  0x2e1, 0x12e1, 0x2e, (1U<<31) | 968, (1U<<31) | 870, (1U<<31) | 858, (1U<<31) | 858, 0x2e, 
  0x2e2e1, 0x2e2e, 0x142e2e, 0x2e0, (1U<<31) | 970, 0x1f, 0x22e2e, (1U<<31) | 323, 
  (1U<<31) | 8443, 0x7f2f, 0x17f1f, 0x7f1f, 0x17f1f, (1U<<31) | 8414, (1U<<31) | 8414, (1U<<31) | 8203, 
  (1U<<31) | 8414, 0x0, 0x0, 0x42e, (1U<<31) | 8193, (1U<<31) | 8192, 0x2e2e2e, 0x2e40, 
  0x2e50, 0x40, 0x2e0, 0x2e0, 0x2e, 0x2e4, 0x0, 0x2e4, 
  0x0, 0x7f2f, 0x7f2f, 0x7f7f1f, 0x87f7f1f, (1U<<31) | 8224, (1U<<31) | 8366, (1U<<31) | 8366, 
  (1U<<31) | 8366, (1U<<31) | 8373, (1U<<31) | 8363, (1U<<31) | 8363, (1U<<31) | 8373, (1U<<31) | 8224, (1U<<31) | 8382, (1U<<31) | 8373, 
  (1U<<31) | 8382, (1U<<31) | 8244, (1U<<31) | 8238, (1U<<31) | 8238, (1U<<31) | 8407, (1U<<31) | 8373, (1U<<31) | 8373, (1U<<31) | 8400, 
  (1U<<31) | 8238, (1U<<31) | 8366, (1U<<31) | 8366, (1U<<31) | 8366, (1U<<31) | 8400, (1U<<31) | 8238, (1U<<31) | 8230, (1U<<31) | 8230, 
  (1U<<31) | 8230, (1U<<31) | 8230, (1U<<31) | 8366, (1U<<31) | 8373, (1U<<31) | 8355, (1U<<31) | 8366, (1U<<31) | 8224, (1U<<31) | 8224, 
  (1U<<31) | 8366, (1U<<31) | 8393, (1U<<31) | 8366, (1U<<31) | 8224, (1U<<31) | 8393, (1U<<31) | 8443, (1U<<31) | 4776, (1U<<31) | 8181, 
  (1U<<31) | 8467, (1U<<31) | 8447, (1U<<31) | 8459, (1U<<31) | 8451, (1U<<31) | 8476, 0x1, 0x7f2f, 0x7f2f, 
  0x4, 0x7f7f7f2f, 0x7f7f7f2f, 0x44f, 0x7f7f7f1f, 0x7f7f7f1f, 0x2ee2e2e, 0x2e2ee0, 
  0x2ee2e2e0, 0xff9f3f, 0x1f, 0x42e2e0, 0x42e2e0, (1U<<31) | 8444, 0x2e2e2e0, 0x4452e0, 
  0x54452e0, 0x44552e0, (1U<<31) | 5791, (1U<<31) | 5792, 0xf1, 0x7f4f, 0x4f50, 0x4f50, 
  0xaf1f, 0xaf1f, 0x1f2e2e, 0x2e, (1U<<31) | 8444, 0x42e2e2e, 0x7f2f, 0x7f2f, 
  0x7f2f, 0x1f1, 0x7f7f1f, 0xaf1f, 0xaf1f, (1U<<31) | 115, (1U<<31) | 7183, (1U<<31) | 7150, 
  (1U<<31) | 7162, (1U<<31) | 76, (1U<<31) | 87, (1U<<31) | 3414, (1U<<31) | 3413, (1U<<31) | 4223, 0x447f3f, 0x7f7f2f, 
  0x7f7f2f, (1U<<31) | 314, (1U<<31) | 5914, (1U<<31) | 314, (1U<<31) | 314, (1U<<31) | 5914, 0x19f24f0, 0x49f24f0, 
  0x7f7f2f, 0x7f7f2f, 0x7f2f, 0x2ee2ee0, 0x2ee2ee0, 0x2ee2ee0, 0x2ee2ee0, 0x2e2e, 
  0x2e0, 0x2e, 0x2e2e, (1U<<31) | 8444, 0x2ee2ee0, 0x2ee0, 0x2e2ee2e, 0x2ee2e, 
  0x2ee2e, 0x2ee2ee0, 0x2e0, 0x2e2e, 0x2e2e, 0x2e2e, 0x2e2e, 0x2e2e, 
  0x2e2e, 0x2e2e, 0x2e2ee0, 0x2e2ee2e, 0x2e4, 0x2e4, 0x2e2e, 0x2e2e, 
  0x2e2e, 0x111cf1f, 0x40, 0x7f7f2f, 0x47f2f, 0x4444f0, 0x44cf4f, 0x44cf4f, 
  0x4cf4f, (1U<<31) | 1890, 0x9f7f4f, (1U<<31) | 8206, (1U<<31) | 8206, 0x5, 0x42e, 0x7f2f, 
  0x7f2f, 0x7f2f, 0x7f7f1f, (1U<<31) | 7289, 0x47f7f1f, 0x47f7f1f, 0x1f0, 0x0, 
  0x7f2f, 0x7f7f1f, 0x7f7f1f, 0x47f7f1f, 0x47f7f1f, (1U<<31) | 7289, 0x4f, 0x7f2f, 
  0x7f0f, 0x7f7f1f, 0x7f7f1f, (1U<<31) | 7289, 0x2e, 0x2ee2e0, 0x2e0, 0x2e, 
  0x7f4f, 0x1f1, 0x2e, 0x0, 0x7f2f, (1U<<31) | 8215, (1U<<31) | 8210, 0x7f7f1f, 
  (1U<<31) | 7289, 0x47f7f1f, 0x47f7f1f, 0x7f7f1f, 0x7f7f1f, 0x47f7f1f, 0x47f7f1f, (1U<<31) | 7289, 
  0x7f7f1f, 0x7f7f1f, (1U<<31) | 7289, 0x2e2e0, 0x2e0, 0x2e0, 0x42e2e2e0, (1U<<31) | 1092, 
  (1U<<31) | 1092, (1U<<31) | 1097, (1U<<31) | 1092, (1U<<31) | 1092, (1U<<31) | 1097, (1U<<31) | 1092, (1U<<31) | 1092, (1U<<31) | 1092, 
  (1U<<31) | 1092, (1U<<31) | 1092, (1U<<31) | 1092, (1U<<31) | 1092, (1U<<31) | 1111, (1U<<31) | 1111, (1U<<31) | 1111, (1U<<31) | 1111, 
  (1U<<31) | 1111, (1U<<31) | 1111, (1U<<31) | 1111, (1U<<31) | 1111, (1U<<31) | 1111, (1U<<31) | 1111, (1U<<31) | 1111, (1U<<31) | 1111, 
  (1U<<31) | 1111, 0x1f, (1U<<31) | 275, 0x42e0, 0x42e30, 0x52e2e, 0x0, 0x44, 
  0x54, 0x444, 0x444, 0x444, 0x444, 0x544, 0x444, 0x444, 
  0x544, 0x2c2c2c, 0x2c2c2c, 0x2c2c, 0x2c2c, 0x4a44a4a, 0x44, 0x4a44a4a, 
  0x4a44a4a, 0x4a4a4a4a, 0x4a4a4a, 0x4a4a4a4a, 0x4a4a4a4a, 0x4a4a4a, 0x4a4a4a4a, 0x40, 
  0x40, 0x84, 0x5, 0x52e5, 0x40, 0x52e2e, 0x52e, 0x40, 
  (1U<<31) | 947, 0x4f5, 0x2e2e2e, (1U<<31) | 947, 0x4f5, 0x7f0f, (1U<<31) | 7458, 0x7f7f3f, 
  (1U<<31) | 7639, (1U<<31) | 7137, (1U<<31) | 7135, (1U<<31) | 8108, (1U<<31) | 8534, (1U<<31) | 8534, (1U<<31) | 8534, 0x7f3f, 
  0x7f7f3f, 0xffaf1f, 0xffaf1f, 0x7f7f3f, 0xbf2f, 0xaf1f, 0xaf1f, 0xaf1f, 
  0xaf1f, 0xaf1f, 0xaf1f, 0xaf1f, 0xaf1f, 0xbf3f, 0xaf1f, 0xaf1f, 
  0x7f7f2f, 0x7f7f2f, 0x7f7f3f, 0xbf2f, 0x7f7f3f, 0xbf2f, 0x7f7f2f, 0x7f7f2f, 
  0x7f7f3f, 0xbf2f, 0x7f7f3f, 0xbf2f, (1U<<31) | 8108, (1U<<31) | 8108, (1U<<31) | 8108, (1U<<31) | 8108, 
  0x7f7f2f, 0x7f2f, 0x7f7f2f, 0x7f2f, 0x7f2f, 0x7f2f, 0x7f7f2f, (1U<<31) | 7964, 
  (1U<<31) | 7954, (1U<<31) | 7942, (1U<<31) | 7964, (1U<<31) | 8010, (1U<<31) | 7964, (1U<<31) | 7954, (1U<<31) | 7993, (1U<<31) | 7954, 
  (1U<<31) | 7942, (1U<<31) | 7972, (1U<<31) | 7942, 0x7f7f3f, (1U<<31) | 7470, 0x552c, (1U<<31) | 7458, 0x7f3f, 
  (1U<<31) | 5259, (1U<<31) | 7458, 0x7f7f3f, 0xbf3f, 0xbf1f, 0xbf1f, 0x9f1f, 0x9f1f, 
  0x9f1f, (1U<<31) | 8108, 0x7f7f3f, (1U<<31) | 7465, 0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0xbf1f, 
  0x7f7f3f, 0x7f7f3f, 0xbf1f, (1U<<31) | 8108, (1U<<31) | 7470, 0x7f1f, 0x7f7f1f, 0x7f7f1f, 
  0x49f7f1f, 0x49f7f1f, (1U<<31) | 7470, 0x445, 0x7f1f, 0x7f7f1f, 0x49f7f1f, 0x49f7f1f, 
  0x7f7f1f, (1U<<31) | 5259, (1U<<31) | 5259, 0x7f7f1f, 0x7f7f1f, (1U<<31) | 5259, (1U<<31) | 5259, 0x7f7f1f, 
  (1U<<31) | 7448, (1U<<31) | 7448, 0x7f7f3f, 0x7f7f1f, 0x7f7f1f, (1U<<31) | 5265, 0xcf7f3f0, (1U<<31) | 8064, 
  (1U<<31) | 8084, 0xcf7f3f0, (1U<<31) | 8023, (1U<<31) | 8064, (1U<<31) | 8032, (1U<<31) | 8084, (1U<<31) | 8043, (1U<<31) | 7458, 
  0x7f7f1f, 0x7f2c3f, 0x7f2c2c3f, (1U<<31) | 7221, (1U<<31) | 7193, 0x7f2c7f3f, (1U<<31) | 7245, (1U<<31) | 7232, 
  (1U<<31) | 7206, 0x7f7f3f, 0xbf3f, 0xbf1f, 0xbf1f, (1U<<31) | 8108, 0x7f7f3f, 0x7f7f3f, 
  0x7f7f3f, 0x7f7f3f, 0xbf1f, 0x7f7f3f, 0x7f7f3f, 0xbf1f, (1U<<31) | 8108, (1U<<31) | 7470, 
  0x7f7f1f, 0x7f7f1f, (1U<<31) | 5259, 0x7f7f1f, (1U<<31) | 5259, 0x7f7f1f, (1U<<31) | 7448, 0x7f3f, 
  0x7f7f3f, 0x7f7f1f, 0x7f3f, (1U<<31) | 8108, 0x7f7f1f, (1U<<31) | 5265, (1U<<31) | 8108, 0x7f7f1f, 
  0x7f7f3f, 0x7f7f3f, 0x57f5bf3f, 0x4af1f, 0x4af1f, 0x7a3a, 0x49f2f, 0x49f2f, 
  0x3a7a, 0x47f7f3f, 0x47f7f3f, 0x7f7f1f, 0x52e0, 0x52e0, 0x7f7f2f, 0x87, 
  0x545, 0x2e2e0, 0x552e0, 0x2e554, 0x4f54, 0x2e554, 0x4f54, 0x2e2e5, 
  (1U<<31) | 7173, 0x7f7f7f3f, 0x7f7f7f3f, (1U<<31) | 7300, (1U<<31) | 7282, (1U<<31) | 7280, (1U<<31) | 7300, 0x7f7f3f, 
  0x7f7f3f, 0x7f7f3f, 0x7f7f3f, (1U<<31) | 848, (1U<<31) | 848, (1U<<31) | 851, (1U<<31) | 851, (1U<<31) | 7300, 
  (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7300, (1U<<31) | 6139, (1U<<31) | 5195, 0x7f7f7f3f, 0x7f7f3f, 0x7f7f3f, 
  (1U<<31) | 8521, (1U<<31) | 6188, (1U<<31) | 8521, (1U<<31) | 6188, (1U<<31) | 8521, (1U<<31) | 6188, (1U<<31) | 8521, 0x7f7f3f, 
  (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 7173, (1U<<31) | 7142, (1U<<31) | 7173, (1U<<31) | 7142, (1U<<31) | 7300, (1U<<31) | 7300, 
  (1U<<31) | 7300, 0x7f7f7f3f, 0x7f7f7f3f, 0x7f7f7f3f, 0x47f7f3f, (1U<<31) | 5295, (1U<<31) | 4400, (1U<<31) | 7300, 
  (1U<<31) | 1087, (1U<<31) | 7300, (1U<<31) | 1087, (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 4335, (1U<<31) | 5238, (1U<<31) | 7256, 
  (1U<<31) | 6117, (1U<<31) | 7256, (1U<<31) | 6117, (1U<<31) | 7256, (1U<<31) | 6117, (1U<<31) | 7256, (1U<<31) | 6117, (1U<<31) | 7256, 
  (1U<<31) | 6117, (1U<<31) | 6117, (1U<<31) | 6117, (1U<<31) | 6117, (1U<<31) | 6117, (1U<<31) | 7256, (1U<<31) | 6117, (1U<<31) | 7173, 
  (1U<<31) | 1066, 0x45, 0x45, 0x45, 0x7f3f5, 0x45, (1U<<31) | 7142, (1U<<31) | 269, 
  (1U<<31) | 1076, (1U<<31) | 7532, (1U<<31) | 7542, 0x57f3f, (1U<<31) | 7300, (1U<<31) | 7300, 0x7f7f7f3f, 0x7f7f7f3f, 
  0x7f7f7f3f, (1U<<31) | 1058, 0x47f7f3f, (1U<<31) | 7300, (1U<<31) | 7173, (1U<<31) | 7256, (1U<<31) | 7256, (1U<<31) | 7300, 
  (1U<<31) | 1087, (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 5204, (1U<<31) | 5225, (1U<<31) | 4335, (1U<<31) | 7256, (1U<<31) | 7256, 
  (1U<<31) | 7256, (1U<<31) | 7256, (1U<<31) | 7256, (1U<<31) | 7746, (1U<<31) | 7122, (1U<<31) | 7109, (1U<<31) | 7686, (1U<<31) | 6405, 
  (1U<<31) | 7699, (1U<<31) | 6379, (1U<<31) | 7096, (1U<<31) | 6405, (1U<<31) | 7096, (1U<<31) | 7122, (1U<<31) | 7109, (1U<<31) | 7699, 
  (1U<<31) | 7699, (1U<<31) | 7699, (1U<<31) | 7756, (1U<<31) | 6392, (1U<<31) | 7673, (1U<<31) | 6366, (1U<<31) | 7083, (1U<<31) | 7756, 
  (1U<<31) | 6392, (1U<<31) | 7673, (1U<<31) | 6366, (1U<<31) | 7083, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 7608, (1U<<31) | 1066, 
  (1U<<31) | 7310, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7300, 
  (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7310, (1U<<31) | 5238, (1U<<31) | 7590, 
  (1U<<31) | 5285, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7310, (1U<<31) | 5238, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7590, 
  (1U<<31) | 5285, 0x7f7f7f3f, (1U<<31) | 7310, (1U<<31) | 7300, 0x47f7f3f, (1U<<31) | 7300, (1U<<31) | 7173, (1U<<31) | 7310, 
  (1U<<31) | 7310, (1U<<31) | 7310, (1U<<31) | 7310, 0x7f3f, 0x7f7f3f, (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 7173, 
  (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 7173, 0x7f3f, 0x7f7f3f, (1U<<31) | 7613, 
  (1U<<31) | 7173, (1U<<31) | 7300, (1U<<31) | 7300, 0x47f7f3f, (1U<<31) | 7623, (1U<<31) | 7623, (1U<<31) | 7300, 0x7f7f3f, 
  (1U<<31) | 7554, (1U<<31) | 7547, (1U<<31) | 1058, (1U<<31) | 1058, (1U<<31) | 7478, (1U<<31) | 5942, (1U<<31) | 5942, (1U<<31) | 6171, 
  (1U<<31) | 2020, (1U<<31) | 2020, (1U<<31) | 2020, (1U<<31) | 2020, (1U<<31) | 7478, (1U<<31) | 7478, (1U<<31) | 7525, (1U<<31) | 7525, 
  (1U<<31) | 7525, (1U<<31) | 7478, (1U<<31) | 5942, (1U<<31) | 5942, (1U<<31) | 6171, (1U<<31) | 2020, (1U<<31) | 2020, (1U<<31) | 2020, 
  (1U<<31) | 2020, (1U<<31) | 7478, (1U<<31) | 7478, (1U<<31) | 5942, (1U<<31) | 5942, (1U<<31) | 6171, (1U<<31) | 2020, (1U<<31) | 7300, 
  (1U<<31) | 6139, (1U<<31) | 7300, (1U<<31) | 6139, (1U<<31) | 7310, (1U<<31) | 7256, (1U<<31) | 7310, (1U<<31) | 5238, (1U<<31) | 7310, 
  (1U<<31) | 5238, (1U<<31) | 7310, (1U<<31) | 7300, 0x47f7f3f, (1U<<31) | 7300, 0x7f7f7f3f, (1U<<31) | 7173, (1U<<31) | 7256, 
  (1U<<31) | 7300, (1U<<31) | 7173, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7142, 0x7f7f3f, 
  0x7f7f3f, 0x7f7f3f, (1U<<31) | 7142, 0x42e3f0, (1U<<31) | 1997, (1U<<31) | 4810, (1U<<31) | 1997, (1U<<31) | 1997, 
  (1U<<31) | 1997, (1U<<31) | 4810, (1U<<31) | 1997, (1U<<31) | 1997, (1U<<31) | 1997, (1U<<31) | 4810, (1U<<31) | 1997, (1U<<31) | 1997, 
  (1U<<31) | 1997, (1U<<31) | 4810, (1U<<31) | 1997, (1U<<31) | 1997, 0x7f3f1, 0x7f3f1, 0x7f3f1, 0x43f, 
  (1U<<31) | 1082, (1U<<31) | 1082, (1U<<31) | 7282, (1U<<31) | 7280, (1U<<31) | 6129, (1U<<31) | 7173, (1U<<31) | 258, (1U<<31) | 262, 
  0x7f3f, (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 2009, (1U<<31) | 2007, (1U<<31) | 7282, (1U<<31) | 7280, 
  0x7f7f7f3f, (1U<<31) | 7590, (1U<<31) | 7590, (1U<<31) | 7300, (1U<<31) | 7583, (1U<<31) | 7583, (1U<<31) | 7566, (1U<<31) | 7583, 
  (1U<<31) | 7583, (1U<<31) | 7583, (1U<<31) | 1051, (1U<<31) | 7576, (1U<<31) | 7576, 0x7f7f7f3f, 0x7f7f7f3f, (1U<<31) | 7746, 
  (1U<<31) | 5511, (1U<<31) | 6091, (1U<<31) | 6104, (1U<<31) | 5498, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 7599, (1U<<31) | 5295, 
  (1U<<31) | 7300, 0x0, (1U<<31) | 7300, (1U<<31) | 2009, (1U<<31) | 2007, (1U<<31) | 7300, (1U<<31) | 7300, 0x47f7f3f, 
  (1U<<31) | 5524, (1U<<31) | 5524, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 1058, 
  (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7590, (1U<<31) | 5285, 
  (1U<<31) | 7599, (1U<<31) | 7300, (1U<<31) | 7583, (1U<<31) | 5277, (1U<<31) | 7583, (1U<<31) | 5277, (1U<<31) | 7300, (1U<<31) | 7173, 
  (1U<<31) | 7300, 0x7f7f3f, 0x47f7f3f, 0x4444, 0x4455, 0x447f3f, 0x4444, 0x4455, 
  0x447f3f, 0x4444, 0x4455, (1U<<31) | 97, 0x3f44, 0x3f55, 0x447f3f, 0x4444, 
  0x4455, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7590, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7590, (1U<<31) | 5285, 
  (1U<<31) | 7590, (1U<<31) | 7590, (1U<<31) | 5285, 0x7f7f3f, 0x47f7f3f, (1U<<31) | 7583, (1U<<31) | 5277, (1U<<31) | 7583, 
  (1U<<31) | 5277, 0x4444, 0x4455, 0x447f3f, 0x4444, 0x4455, 0x447f3f, 0x4444, 
  0x4455, (1U<<31) | 97, 0x3f44, 0x3f55, 0x447f3f, 0x4444, 0x4455, (1U<<31) | 7173, 
  (1U<<31) | 4335, (1U<<31) | 5238, 0x7f7f7f3f, (1U<<31) | 5238, 0x7f7f7f3f, (1U<<31) | 5238, 0x7f7f3f, 0x47f7f3f, 
  (1U<<31) | 7300, (1U<<31) | 2009, (1U<<31) | 2007, (1U<<31) | 2009, (1U<<31) | 2007, (1U<<31) | 7300, (1U<<31) | 5195, (1U<<31) | 2009, 
  (1U<<31) | 2007, (1U<<31) | 2009, (1U<<31) | 2007, (1U<<31) | 7300, 0x7f7f3f, (1U<<31) | 7300, (1U<<31) | 1106, (1U<<31) | 1104, 
  (1U<<31) | 1106, (1U<<31) | 1104, (1U<<31) | 7300, 0x47f7f3f, (1U<<31) | 7300, (1U<<31) | 5195, 0x47f7f3f, (1U<<31) | 5271, 
  (1U<<31) | 5271, 0x47f7f3f, (1U<<31) | 7583, (1U<<31) | 7583, (1U<<31) | 7583, (1U<<31) | 7583, (1U<<31) | 7576, (1U<<31) | 7576, 
  (1U<<31) | 7477, (1U<<31) | 5941, (1U<<31) | 5941, (1U<<31) | 6170, (1U<<31) | 2019, (1U<<31) | 2019, (1U<<31) | 2019, (1U<<31) | 2019, 
  (1U<<31) | 7486, (1U<<31) | 7497, (1U<<31) | 7510, (1U<<31) | 7477, (1U<<31) | 5941, (1U<<31) | 5941, (1U<<31) | 6170, (1U<<31) | 2019, 
  (1U<<31) | 7300, (1U<<31) | 7282, (1U<<31) | 7280, (1U<<31) | 7300, (1U<<31) | 5295, (1U<<31) | 7561, (1U<<31) | 7561, (1U<<31) | 7300, 
  (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 7173, (1U<<31) | 7623, (1U<<31) | 7630, (1U<<31) | 7630, 0x7f7f3f, 0x7f7f3f, 
  0x7f7f3f, 0x7f7f3f, 0xffbf3f, (1U<<31) | 8117, (1U<<31) | 8136, 0x4bf3f, 0xbf47f3f, 0x7f7f7f3f, 
  (1U<<31) | 7590, (1U<<31) | 7590, (1U<<31) | 7300, (1U<<31) | 7583, (1U<<31) | 7583, (1U<<31) | 7566, (1U<<31) | 7583, (1U<<31) | 7583, 
  (1U<<31) | 1051, (1U<<31) | 7576, (1U<<31) | 7576, (1U<<31) | 7746, (1U<<31) | 5511, (1U<<31) | 6091, (1U<<31) | 6104, (1U<<31) | 5498, 
  (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 7599, (1U<<31) | 5295, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 7300, 
  (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 1058, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7590, 
  (1U<<31) | 5285, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7590, (1U<<31) | 5285, (1U<<31) | 7599, (1U<<31) | 7300, (1U<<31) | 7583, 
  (1U<<31) | 5277, (1U<<31) | 7583, (1U<<31) | 5277, (1U<<31) | 7300, 0x7f7f3f, 0x4444, 0x4455, 0x447f3f, 
  0x4444, 0x4455, 0x447f3f, 0x4444, 0x4455, (1U<<31) | 97, 0x3f44, 0x3f55, 
  0x447f3f, 0x4444, 0x4455, 0x4444, 0x4455, 0x447f3f, 0x4444, 0x4455, 
  0x447f3f, 0x4444, 0x4455, (1U<<31) | 97, 0x3f44, 0x3f55, 0x447f3f, 0x4444, 
  0x4455, (1U<<31) | 7300, (1U<<31) | 2009, (1U<<31) | 2007, (1U<<31) | 7300, (1U<<31) | 2009, (1U<<31) | 2007, (1U<<31) | 7300, 
  0x7f7f3f, (1U<<31) | 7300, (1U<<31) | 1106, (1U<<31) | 1104, (1U<<31) | 7173, (1U<<31) | 7300, (1U<<31) | 7300, (1U<<31) | 5195, 
  (1U<<31) | 7173, 0x47f7f3f, (1U<<31) | 7599, (1U<<31) | 5295, (1U<<31) | 5271, (1U<<31) | 5271, (1U<<31) | 7599, (1U<<31) | 7300, 
  0x47f7f3f, (1U<<31) | 7583, (1U<<31) | 7583, (1U<<31) | 7576, (1U<<31) | 7576, (1U<<31) | 7561, (1U<<31) | 7561, (1U<<31) | 7173, 
  (1U<<31) | 7173, (1U<<31) | 7173, 0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0xff9f3f, 0xff9f3f, 
  0xff9f3f, 0xff9f3f, 0xff9f3f, 0xff9f3f, 0xff9f3f, 0xff9f3f, 0xffcf3f, 0xffcf3f, 
  0xffcf3f, 0xffcf3f, 0xffcf3f, 0xffcf3f, 0xffcf3f, 0xffcf3f, (1U<<31) | 257, 0x47f7f3f, 
  0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x52e7f4f, 0x50, 0x0, 0x5, 
  0x5, 0x7f7f1f, 0x4444, 0x4444, (1U<<31) | 167, (1U<<31) | 167, 0x11f, (1U<<31) | 135, 
  (1U<<31) | 135, 0x1444a444, (1U<<31) | 135, (1U<<31) | 145, (1U<<31) | 135, (1U<<31) | 135, (1U<<31) | 135, (1U<<31) | 135, 
  (1U<<31) | 135, (1U<<31) | 135, (1U<<31) | 135, (1U<<31) | 135, 0x11444a0f, 0x11444a2f, (1U<<31) | 26, (1U<<31) | 36, 
  0x0, 0x0, 0x0, 0x42f1, 0x7f2f, 0x7777, 0x7777, 0x7777, 
  0x7777, 0x4439, 0x4439, 0x4474, 0x7739, 0x7739, 0x7769, 0x5, 
  (1U<<31) | 510, 0x7f7f7f2f, (1U<<31) | 187, (1U<<31) | 177, 0x14f4, 0x444, 0x14f4, (1U<<31) | 155, 
  (1U<<31) | 155, (1U<<31) | 155, 0x440, 0x440, 0x440, 0x40, 0x40, 0x40, 
  (1U<<31) | 0, (1U<<31) | 0, 0x444, 0x444, (1U<<31) | 7739, 0x1f0, (1U<<31) | 56, (1U<<31) | 46, 
  0x4ffaf1f, 0x777, 0x1769697, 0x7777, 0x7f7f7f2f, 0x7f7f7f2f, 0x777, 0x7f2f, 
  0xaf1f, 0x7f2f, 0x44f4, (1U<<31) | 8196, 0x4, 0x4ff9f1f, (1U<<31) | 70, 0x7f11f, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 4008, (1U<<31) | 4069, (1U<<31) | 4069, (1U<<31) | 4128, (1U<<31) | 4195, (1U<<31) | 4128, (1U<<31) | 4128, (1U<<31) | 4128, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 3997, (1U<<31) | 4056, (1U<<31) | 4056, (1U<<31) | 4113, (1U<<31) | 4178, (1U<<31) | 4113, (1U<<31) | 4113, (1U<<31) | 4113, 
  (1U<<31) | 5484, (1U<<31) | 2087, (1U<<31) | 2151, (1U<<31) | 2476, (1U<<31) | 2728, (1U<<31) | 2728, (1U<<31) | 3124, (1U<<31) | 3124, 
  (1U<<31) | 2747, (1U<<31) | 3145, (1U<<31) | 3145, (1U<<31) | 2728, (1U<<31) | 2493, (1U<<31) | 2747, (1U<<31) | 2747, (1U<<31) | 2118, 
  (1U<<31) | 2186, (1U<<31) | 2439, (1U<<31) | 2687, (1U<<31) | 2687, (1U<<31) | 3079, (1U<<31) | 3079, (1U<<31) | 2707, (1U<<31) | 3101, 
  (1U<<31) | 3101, (1U<<31) | 2687, (1U<<31) | 2457, (1U<<31) | 2707, (1U<<31) | 2707, (1U<<31) | 2186, (1U<<31) | 2262, (1U<<31) | 2262, 
  (1U<<31) | 2204, (1U<<31) | 2282, (1U<<31) | 2282, (1U<<31) | 2186, (1U<<31) | 2186, (1U<<31) | 2262, (1U<<31) | 2262, (1U<<31) | 2204, 
  (1U<<31) | 2282, (1U<<31) | 2282, (1U<<31) | 2118, (1U<<31) | 2186, (1U<<31) | 2186, (1U<<31) | 2134, (1U<<31) | 2204, (1U<<31) | 2204, 
  (1U<<31) | 2134, (1U<<31) | 2204, (1U<<31) | 2204, (1U<<31) | 2151, (1U<<31) | 2223, (1U<<31) | 2223, (1U<<31) | 2168, (1U<<31) | 2242, 
  (1U<<31) | 2242, (1U<<31) | 2151, (1U<<31) | 2151, (1U<<31) | 2223, (1U<<31) | 2223, (1U<<31) | 2168, (1U<<31) | 2242, (1U<<31) | 2242, 
  (1U<<31) | 2087, (1U<<31) | 2151, (1U<<31) | 2151, (1U<<31) | 2102, (1U<<31) | 2168, (1U<<31) | 2168, (1U<<31) | 2102, (1U<<31) | 2168, 
  (1U<<31) | 2168, (1U<<31) | 2031, (1U<<31) | 2087, (1U<<31) | 2087, (1U<<31) | 2151, (1U<<31) | 2151, (1U<<31) | 2151, (1U<<31) | 3987, 
  (1U<<31) | 3987, (1U<<31) | 3987, (1U<<31) | 3987, (1U<<31) | 3987, (1U<<31) | 3987, (1U<<31) | 3987, (1U<<31) | 3987, (1U<<31) | 3976, 
  (1U<<31) | 4031, (1U<<31) | 4031, (1U<<31) | 4084, (1U<<31) | 4145, (1U<<31) | 4084, (1U<<31) | 4084, (1U<<31) | 4084, (1U<<31) | 4031, 
  (1U<<31) | 4084, (1U<<31) | 4084, (1U<<31) | 4145, (1U<<31) | 4145, (1U<<31) | 4145, (1U<<31) | 3976, (1U<<31) | 4031, (1U<<31) | 4031, 
  (1U<<31) | 4084, (1U<<31) | 4145, (1U<<31) | 4084, (1U<<31) | 4084, (1U<<31) | 4084, (1U<<31) | 2031, (1U<<31) | 2087, (1U<<31) | 2087, 
  (1U<<31) | 2151, (1U<<31) | 2151, (1U<<31) | 2336, (1U<<31) | 2476, (1U<<31) | 2476, (1U<<31) | 2728, (1U<<31) | 2728, (1U<<31) | 2476, 
  (1U<<31) | 2728, (1U<<31) | 2728, (1U<<31) | 3124, (1U<<31) | 3124, (1U<<31) | 3124, (1U<<31) | 2493, (1U<<31) | 2747, (1U<<31) | 2747, 
  (1U<<31) | 3145, (1U<<31) | 3145, (1U<<31) | 3145, (1U<<31) | 2728, (1U<<31) | 2351, (1U<<31) | 2493, (1U<<31) | 2493, (1U<<31) | 2747, 
  (1U<<31) | 2747, (1U<<31) | 2747, (1U<<31) | 2058, (1U<<31) | 2118, (1U<<31) | 2118, (1U<<31) | 2186, (1U<<31) | 2186, (1U<<31) | 2303, 
  (1U<<31) | 2439, (1U<<31) | 2439, (1U<<31) | 2687, (1U<<31) | 2687, (1U<<31) | 2439, (1U<<31) | 2687, (1U<<31) | 2687, (1U<<31) | 3079, 
  (1U<<31) | 3079, (1U<<31) | 3079, (1U<<31) | 2457, (1U<<31) | 2707, (1U<<31) | 2707, (1U<<31) | 3101, (1U<<31) | 3101, (1U<<31) | 3101, 
  (1U<<31) | 2687, (1U<<31) | 2319, (1U<<31) | 2457, (1U<<31) | 2457, (1U<<31) | 2707, (1U<<31) | 2707, (1U<<31) | 2707, (1U<<31) | 2402, 
  (1U<<31) | 2550, (1U<<31) | 2638, (1U<<31) | 2906, (1U<<31) | 3018, (1U<<31) | 2550, (1U<<31) | 2810, (1U<<31) | 2906, (1U<<31) | 3222, 
  (1U<<31) | 3342, (1U<<31) | 3222, (1U<<31) | 2570, (1U<<31) | 2832, (1U<<31) | 2932, (1U<<31) | 3250, (1U<<31) | 3374, (1U<<31) | 3250, 
  (1U<<31) | 2906, (1U<<31) | 2420, (1U<<31) | 2570, (1U<<31) | 2662, (1U<<31) | 2932, (1U<<31) | 3048, (1U<<31) | 2932, (1U<<31) | 2118, 
  (1U<<31) | 2186, (1U<<31) | 2186, (1U<<31) | 2262, (1U<<31) | 2262, (1U<<31) | 2262, (1U<<31) | 2134, (1U<<31) | 2204, (1U<<31) | 2204, 
  (1U<<31) | 2282, (1U<<31) | 2282, (1U<<31) | 2282, (1U<<31) | 2186, (1U<<31) | 2402, (1U<<31) | 2550, (1U<<31) | 2638, (1U<<31) | 2906, 
  (1U<<31) | 3018, (1U<<31) | 2550, (1U<<31) | 2810, (1U<<31) | 2906, (1U<<31) | 3222, (1U<<31) | 3342, (1U<<31) | 3222, (1U<<31) | 2570, 
  (1U<<31) | 2832, (1U<<31) | 2932, (1U<<31) | 3250, (1U<<31) | 3374, (1U<<31) | 3250, (1U<<31) | 2906, (1U<<31) | 2420, (1U<<31) | 2570, 
  (1U<<31) | 2662, (1U<<31) | 2932, (1U<<31) | 3048, (1U<<31) | 2932, (1U<<31) | 2118, (1U<<31) | 2186, (1U<<31) | 2186, (1U<<31) | 2262, 
  (1U<<31) | 2262, (1U<<31) | 2262, (1U<<31) | 2134, (1U<<31) | 2204, (1U<<31) | 2204, (1U<<31) | 2282, (1U<<31) | 2282, (1U<<31) | 2282, 
  (1U<<31) | 2058, (1U<<31) | 2118, (1U<<31) | 2118, (1U<<31) | 2186, (1U<<31) | 2186, (1U<<31) | 2186, (1U<<31) | 2072, (1U<<31) | 2134, 
  (1U<<31) | 2134, (1U<<31) | 2204, (1U<<31) | 2204, (1U<<31) | 2204, (1U<<31) | 2072, (1U<<31) | 2134, (1U<<31) | 2134, (1U<<31) | 2204, 
  (1U<<31) | 2204, (1U<<31) | 2204, (1U<<31) | 2367, (1U<<31) | 2511, (1U<<31) | 2591, (1U<<31) | 2855, (1U<<31) | 2959, (1U<<31) | 2511, 
  (1U<<31) | 2767, (1U<<31) | 2855, (1U<<31) | 3167, (1U<<31) | 3279, (1U<<31) | 3167, (1U<<31) | 2530, (1U<<31) | 2788, (1U<<31) | 2880, 
  (1U<<31) | 3194, (1U<<31) | 3310, (1U<<31) | 3194, (1U<<31) | 2855, (1U<<31) | 2384, (1U<<31) | 2530, (1U<<31) | 2614, (1U<<31) | 2880, 
  (1U<<31) | 2988, (1U<<31) | 2880, (1U<<31) | 2087, (1U<<31) | 2151, (1U<<31) | 2151, (1U<<31) | 2223, (1U<<31) | 2223, (1U<<31) | 2223, 
  (1U<<31) | 2102, (1U<<31) | 2168, (1U<<31) | 2168, (1U<<31) | 2242, (1U<<31) | 2242, (1U<<31) | 2242, (1U<<31) | 2151, (1U<<31) | 2367, 
  (1U<<31) | 2511, (1U<<31) | 2591, (1U<<31) | 2855, (1U<<31) | 2959, (1U<<31) | 2511, (1U<<31) | 2767, (1U<<31) | 2855, (1U<<31) | 3167, 
  (1U<<31) | 3279, (1U<<31) | 3167, (1U<<31) | 2530, (1U<<31) | 2788, (1U<<31) | 2880, (1U<<31) | 3194, (1U<<31) | 3310, (1U<<31) | 3194, 
  (1U<<31) | 2855, (1U<<31) | 2384, (1U<<31) | 2530, (1U<<31) | 2614, (1U<<31) | 2880, (1U<<31) | 2988, (1U<<31) | 2880, (1U<<31) | 2087, 
  (1U<<31) | 2151, (1U<<31) | 2151, (1U<<31) | 2223, (1U<<31) | 2223, (1U<<31) | 2223, (1U<<31) | 2102, (1U<<31) | 2168, (1U<<31) | 2168, 
  (1U<<31) | 2242, (1U<<31) | 2242, (1U<<31) | 2242, (1U<<31) | 2031, (1U<<31) | 2087, (1U<<31) | 2087, (1U<<31) | 2151, (1U<<31) | 2151, 
  (1U<<31) | 2151, (1U<<31) | 2044, (1U<<31) | 2102, (1U<<31) | 2102, (1U<<31) | 2168, (1U<<31) | 2168, (1U<<31) | 2168, (1U<<31) | 2044, 
  (1U<<31) | 2102, (1U<<31) | 2102, (1U<<31) | 2168, (1U<<31) | 2168, (1U<<31) | 2168, (1U<<31) | 3986, (1U<<31) | 4043, (1U<<31) | 4043, 
  (1U<<31) | 4098, (1U<<31) | 4161, (1U<<31) | 4098, (1U<<31) | 4098, (1U<<31) | 4098, (1U<<31) | 4043, (1U<<31) | 4098, (1U<<31) | 4098, 
  (1U<<31) | 4161, (1U<<31) | 4161, (1U<<31) | 4161, (1U<<31) | 510, (1U<<31) | 510, 0x50, 0x440, 0x44447, 
  0x44477, 0x414477, 0x444777, 0x4144776, 0x2e1, 0x2e1, (1U<<31) | 510, 0x10, 
  0x47f2f, 0x4444, 0x7f2f, 0x1f1, 0x444, 0x444, (1U<<31) | 3874, (1U<<31) | 3920, 
  (1U<<31) | 3896, (1U<<31) | 3908, (1U<<31) | 3886, (1U<<31) | 3862, (1U<<31) | 3954, (1U<<31) | 3930, (1U<<31) | 3920, (1U<<31) | 3896, 
  (1U<<31) | 3942, (1U<<31) | 3908, (1U<<31) | 3886, (1U<<31) | 3862, (1U<<31) | 3874, (1U<<31) | 3718, (1U<<31) | 3760, (1U<<31) | 3770, 
  (1U<<31) | 3760, (1U<<31) | 3718, 0x14447f1f, 0x47f1f, 0x5455, 0x4a454a, 0x4444, 0x444, 
  0x444, 0x1144444, 0x1144444, 0x1, 0x5455, (1U<<31) | 510, (1U<<31) | 3728, (1U<<31) | 3728, 
  (1U<<31) | 3748, (1U<<31) | 3728, (1U<<31) | 3738, (1U<<31) | 3728, (1U<<31) | 3728, (1U<<31) | 3728, (1U<<31) | 3728, (1U<<31) | 3728, 
  (1U<<31) | 3728, (1U<<31) | 3728, (1U<<31) | 3728, (1U<<31) | 3728, 0x4444a0f, 0x4444a2f, 0x4444a0f0, 0x4444a2f0, 
  0x44444a0f, (1U<<31) | 3666, 0x7f2f, 0x77, 0x44, 0x444, (1U<<31) | 8221, 0x7f2f, 
  0x7f2f, 0x77, 0x0, 0x444a0f, 0x0, 0x0, 0x0, 0x0, 
  0x40, 0x4, 0x5, 0x44, 0x40, 0x5, 0x5, 0x440, 
  0x440, 0x440, 0x40, 0x40, 0x4444, 0x4444, 0x4444, 0x447f1f, 
  0x1439394, 0x14444, 0x14444, 0x7f7f1f, 0x7f1f, 0x7f2f, 0x7f0f, 0x7f2f, 
  (1U<<31) | 3676, (1U<<31) | 3676, (1U<<31) | 3698, (1U<<31) | 3676, (1U<<31) | 3687, (1U<<31) | 3676, (1U<<31) | 3676, (1U<<31) | 3676, 
  (1U<<31) | 3676, (1U<<31) | 3676, (1U<<31) | 3676, (1U<<31) | 3676, (1U<<31) | 3676, (1U<<31) | 3676, 0x44444a0f, 0x44444a0f, 
  (1U<<31) | 3666, (1U<<31) | 3666, (1U<<31) | 3635, (1U<<31) | 3634, (1U<<31) | 13, (1U<<31) | 12, 0x47f2f, 0x447f1f, 
  0x1439394, 0x14444, 0x14444, 0x0, (1U<<31) | 124, 0x0, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x7f0f, 0x11, 0x4444, 
  0x7f0f, 0x444, 0x4444, (1U<<31) | 3780, (1U<<31) | 3658, 0x4444, 0x44444, (1U<<31) | 3711, 
  (1U<<31) | 3625, 0x44444, 0x444444, (1U<<31) | 3658, (1U<<31) | 3605, 0x442f, 0x47f42f, 0x442c, 
  (1U<<31) | 7849, 0x42c42c, (1U<<31) | 7849, 0x47f42f, 0x47f7f42f, 0x42c42c, (1U<<31) | 7779, 0x42c2c42c, 
  (1U<<31) | 7779, 0x47f7f42f, (1U<<31) | 5248, 0x42c2c42c, (1U<<31) | 7766, (1U<<31) | 1833, (1U<<31) | 7766, 0x4444440, 
  0x4444440, 0x0, 0x44, 0x54, 0x2e4, 0x2e4, 0x2e4, 0x2e4, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x40, 0x40, 
  0x40, 0x4, 0x0, 0x40, 0x40, 0x4f4, (1U<<31) | 931, 0x2e440, 
  0x2e440, 0x2e440, 0x2e440, 0x4f4, (1U<<31) | 931, 0x4444440, 0x4444440, 0x444440, 
  0x444440, 0x444444, 0x444444, (1U<<31) | 3711, (1U<<31) | 3711, (1U<<31) | 7353, 0x7fbf7f3f, (1U<<31) | 7365, 
  0x43f5, 0xbf43f5, 0x43f4, 0xbf43f4, (1U<<31) | 7365, (1U<<31) | 3711, (1U<<31) | 7365, 0x7fbf7f3f, 
  0x7fbf7f3f, (1U<<31) | 7365, (1U<<31) | 7906, (1U<<31) | 7353, (1U<<31) | 7353, (1U<<31) | 3711, (1U<<31) | 7353, 0x3f44, 
  0xbf3f44, 0xbf7f2f, (1U<<31) | 8336, 0xbf7f2f, (1U<<31) | 8336, 0x43f44, 0xbf43f44, (1U<<31) | 7353, 
  0x3f44, 0xbf3f44, 0xbf7f2f, (1U<<31) | 8336, 0xbf7f2f, (1U<<31) | 8336, 0x43f44, 0xbf43f44, 
  (1U<<31) | 7365, (1U<<31) | 7353, (1U<<31) | 7413, (1U<<31) | 7436, 0x7fbf7f3f, 0x7fbf7f3f, (1U<<31) | 7365, (1U<<31) | 7365, 
  0x43f, 0x3f4, 0x7fbf7f3f, (1U<<31) | 7353, (1U<<31) | 7365, 0x7fbf7f3f, (1U<<31) | 7365, (1U<<31) | 7353, 
  (1U<<31) | 7353, (1U<<31) | 7353, (1U<<31) | 7343, (1U<<31) | 7332, 0x444, (1U<<31) | 3658, 0x444, (1U<<31) | 3711, 
  0x444, (1U<<31) | 3711, (1U<<31) | 7365, 0x444, (1U<<31) | 3658, 0x444, (1U<<31) | 3711, 0x444, 
  (1U<<31) | 3711, 0x7f3f444, (1U<<31) | 7887, 0x47f7f3f, (1U<<31) | 5215, (1U<<31) | 7868, 0x47f3f, (1U<<31) | 7858, 
  0x7f7f443f, (1U<<31) | 7929, 0x7f3f, (1U<<31) | 7322, (1U<<31) | 7917, 0x7f7f43f, (1U<<31) | 7917, 0x41b, 
  0x41a, 0x41a, 0x41c, 0x4bf43f, (1U<<31) | 8295, (1U<<31) | 7426, 0x47a6b6b, (1U<<31) | 217, 
  0x46b7a, (1U<<31) | 207, 0xbf43f, (1U<<31) | 8345, 0xbf43f, (1U<<31) | 8345, 0xbf43f, (1U<<31) | 8345, 
  0xbf43f, (1U<<31) | 8345, (1U<<31) | 3461, (1U<<31) | 7838, (1U<<31) | 3476, (1U<<31) | 7801, 0x47f7f3f, 0x47f7f3f, 
  (1U<<31) | 3461, (1U<<31) | 7838, (1U<<31) | 3476, (1U<<31) | 7801, (1U<<31) | 8056, (1U<<31) | 8096, 0x4bf3f, (1U<<31) | 8277, 
  (1U<<31) | 5842, (1U<<31) | 8306, (1U<<31) | 4233, (1U<<31) | 8419, (1U<<31) | 7897, (1U<<31) | 7897, (1U<<31) | 7897, (1U<<31) | 7897, 
  (1U<<31) | 7858, (1U<<31) | 7858, (1U<<31) | 7270, (1U<<31) | 7885, (1U<<31) | 7267, (1U<<31) | 7882, (1U<<31) | 7402, (1U<<31) | 8285, 
  0x47f7f3f, 0x44ffbf3f, 0x4ffbf3f, (1U<<31) | 3964, (1U<<31) | 7813, 0x47f7f3f, (1U<<31) | 7858, 0x47f7f3f, 
  (1U<<31) | 7858, 0x7f7f3f, 0x4ffbf3f, (1U<<31) | 7436, (1U<<31) | 4021, (1U<<31) | 8265, 0x47f7f3f, (1U<<31) | 7858, 
  0x47f7f3f, (1U<<31) | 7858, 0x7f7f3f, 0x447f3f, (1U<<31) | 7332, 0x47f3f, (1U<<31) | 7343, 0xbf3f, 
  (1U<<31) | 7343, 0x47f7f3f, 0x7fbf7f3f, 0x7fbf7f3f, 0x7f3f, 0x7fbf7f3f, 0x7fbf7f3f, 0x7fbf7f3f, 
  0x7fbf7f3f, (1U<<31) | 7267, (1U<<31) | 7882, 0x47f7f3f, 0x447f3f, (1U<<31) | 7332, (1U<<31) | 5215, (1U<<31) | 7868, 
  0x44447f3f, (1U<<31) | 7790, (1U<<31) | 4021, (1U<<31) | 7388, (1U<<31) | 4326, (1U<<31) | 7827, 0x444bf3f, (1U<<31) | 7376, 
  (1U<<31) | 3645, (1U<<31) | 8250, 0x47f7f3f, (1U<<31) | 7858, 0x47f7f3f, (1U<<31) | 7858, 0x4ffbf4f0, (1U<<31) | 5862, 
  0xbf43f0, (1U<<31) | 8317, 0xbf47f3f, (1U<<31) | 8326, (1U<<31) | 4782, (1U<<31) | 8431, 0x2c2c2c, 0x2c2c2c, 
  0x2c2c, 0x2c2c, (1U<<31) | 8108, (1U<<31) | 8534, (1U<<31) | 8534, (1U<<31) | 8534, (1U<<31) | 8108, 0x4a44a4a, 
  0x44, 0x4a44a4a, 0x4a44a4a, 0x4a4a4a4a, 0x4a4a4a, 0x4a4a4a4a, 0x4a4a4a4a, 0x4a4a4a, 
  0x4a4a4a4a, (1U<<31) | 8108, (1U<<31) | 8108, (1U<<31) | 8108, (1U<<31) | 8108, (1U<<31) | 8108, 0x7f7f3f, 0x7f7f3f, 
  0x7f3f, 0xffbf3f, 0xffbf3f, 0x7f7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x7f3f, 0xbf3f, 
  0xbf3f, (1U<<31) | 7639, 0x7a3f, 0x4af1f, 0x4af1f, 0x7a3a, 0x49f2f, 0x49f2f, 
  0x3a7a, 0xbf3f, 0xbf3f, 0xbf3f, 0xbf3f, 0xbf3f, 0xbf3f, 0x7f7f3f, 
  0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x4cf3f, (1U<<31) | 8056, (1U<<31) | 8074, (1U<<31) | 8096, (1U<<31) | 5626, 
  (1U<<31) | 5626, (1U<<31) | 4386, (1U<<31) | 5635, (1U<<31) | 5635, (1U<<31) | 4368, (1U<<31) | 5646, (1U<<31) | 5646, (1U<<31) | 4346, 
  0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x7f7f3f, (1U<<31) | 7470, (1U<<31) | 7470, 
  (1U<<31) | 7470, 0x7f7f3f, 0xbf7f3f, 0xbf7f3f, 0x7f7f3f, 0xbf3f, 0xbf3f, 0x7f7f3f, 
  0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x7f3f, 0x7f7f3f, (1U<<31) | 7470, (1U<<31) | 7453, (1U<<31) | 7453, 
  (1U<<31) | 7453, 0x7f3f, 0x7f7f3f, (1U<<31) | 7458, (1U<<31) | 7458, (1U<<31) | 7458, 0x7f7f3f, 0x7f7f3f, 
  (1U<<31) | 7458, (1U<<31) | 7458, (1U<<31) | 7458, 0x7f7f3f, 0x7f7f3f, 0x7f7f3f, (1U<<31) | 7458, 0x7f3f, 
  0x7f7f3f, 0x7f7f3f, 0x7f7f3f, 0x7f3f, 0x7f3f, 0x7f2f, 0x7f3f, 0x7f3f, 
  0x7f3f, (1U<<31) | 7458, 0x7f7f3f, 0x7f7f3f, 0x7f3f, 0x7f7f3f, (1U<<31) | 7458, 0x7f7f7f3f, 
  0x7f7f3f, 0x7f7f3f, 0x4bf4f0, 0xffbf4f0, (1U<<31) | 8126, (1U<<31) | 8147, 0x4ffbf4f0, (1U<<31) | 4719, 
  (1U<<31) | 5851, (1U<<31) | 4729, (1U<<31) | 5862, (1U<<31) | 4741, 0x2b2b2b, 0x2b2b2b2b, (1U<<31) | 770, (1U<<31) | 768, 
  0x2b2b2b2b, (1U<<31) | 770, (1U<<31) | 768, (1U<<31) | 766, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x40, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x5445, 0x5445, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x5445, 0x5445, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x2e440, 0x2e440, 0x2e440, 
  0x2e440, 0x4f44, 0x2e444, 0x4f44, 0x2e444, 0x444, 0x44, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x40, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x4444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x44, 
  0x2f7, 0x2f7, 0x544, 0x52e5, 0x52e5, 0x52e5, 0x8f40f, 0x52e45, 
  0x54f4, 0x544, 0x555, 0x44, 0x55, 0x44, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x555, 0x555, 0x444, 0x545, 
  0x444, 0x444, 0x555, 0x44, 0x44, 0x444, 0x444, 0x444, 
  0x444, 0x445, 0x445, 0x444, 0x555, 0x444, 0x555, 0x444, 
  0x555, 0x444, 0x555, 0x44, 0x55, 0x44, 0x44, 0x55, 
  0x444, 0x444, 0x555, 0x54, 0x54, 0x44, 0x44, 0x44, 
  0x44, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x555, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x44, 0x44, 0x44, 0x45, 0x44, 0x444, 
  0x444, 0x55, 0x45, 0x44, 0x55, 0x55, 0x55, 0x55, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x554, 0x554, 0x554, 0x554, 
  0x554, 0x554, 0x554, 0x554, 0x55, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x5555, 0x555, 0x5555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x444, 0x555, 0x44, 0x44, 0x444, 
  0x555, 0x445, 0x445, 0x544, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x445, 0x445, 0x444, 0x444, 0x444, 0x444, 0x555, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x454, 
  0x554, 0x454, 0x554, 0x454, 0x454, 0x454, 0x454, 0x454, 
  0x454, 0x454, 0x454, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 
  0x4555, 0x4555, 0x4555, 0x554, 0x554, 0x444, 0x455, 0x455, 
  0x455, 0x44, 0x444, 0x444, 0x44, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x554, 0x444, 0x444, 0x444, 0x444, 0x554, 
  0x444, 0x444, 0x554, 0x444, 0x444, 0x45, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x44, 0x444, 0x444, 0x44, 0x44, 0x44, 
  0x444, 0x5545, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x58, 0x57, 
  0x85, 0x85, 0x87, 0x85, 0x85, 0x84, 0x84, 0x84, 
  0x84, 0x75, 0x75, 0x78, 0x75, 0x75, 0x74, 0x74, 
  0x74, 0x74, 0x58, 0x57, 0x48, 0x47, 0x48, 0x47, 
  0x888, 0x484, 0x884, 0x884, 0x884, 0x884, 0x48, 0x48, 
  0x888, 0x888, 0x888, 0x8888, 0x8888, 0x888, 0x888, 0x777, 
  0x474, 0x774, 0x774, 0x774, 0x774, 0x777, 0x777, 0x77, 
  0x7777, 0x7777, 0x47777, 0x7777, 0x7777, 0x47, 0x47, 0x777, 
  0x777, 0x777, 0x777, (1U<<31) | 1864, (1U<<31) | 899, (1U<<31) | 879, (1U<<31) | 1872, (1U<<31) | 910, 
  (1U<<31) | 889, (1U<<31) | 1864, (1U<<31) | 899, (1U<<31) | 879, (1U<<31) | 1864, (1U<<31) | 899, (1U<<31) | 879, (1U<<31) | 1864, 
  (1U<<31) | 899, (1U<<31) | 879, (1U<<31) | 1864, (1U<<31) | 899, (1U<<31) | 879, 0x4e4, 0x5e5, 0x4444, 
  0x4444, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x445, 
  0x445, 0x444, 0x444, 0x444, 0x444, 0x445, 0x445, 0x445, 
  0x445, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x444, 
  0x445, 0x4455, 0x4455, 0x445, 0x444, 0x444, 0x444, 0x444, 
  0x4444, 0x4444, 0x4444, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 
  0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 
  0x5555, 0x5555, 0x5555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x445, 
  0x445, 0x445, 0x445, 0x445, 0x445, 0x445, 0x445, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x445, 
  0x445, 0x445, 0x445, 0x445, 0x445, 0x445, 0x445, 0x444, 
  0x444, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x444, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x445, 0x445, 0x445, 0x445, 0x445, 
  0x445, 0x445, 0x445, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x444, 0x4444, 0x4444, 0x4444, 0x555, 
  0x555, 0x5555, 0x5555, 0x555, 0x555, 0x555, 0x555, 0x5555, 
  0x5555, 0x554, 0x554, 0x555, 0x555, 0x4455, 0x5555, 0x5555, 
  0x5555, 0x4455, 0x4455, 0x4455, 0x4455, 0x555, 0x555, 0x445, 
  0x444, 0x445, 0x444, 0x445, 0x445, 0x554, 0x554, 0x5555, 
  0x5555, 0x5555, 0x5555, 0x555, 0x555, 0x555, 0x555, 0x4555, 
  0x455, 0x454, 0x5555, 0x555, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x454, 0x454, 0x454, 0x454, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x445, 0x4455, 0x445, 0x4455, 0x5555, 0x5555, 0x555, 0x555, 
  0x5555, 0x5555, 0x555, 0x555, 0x4444, 0x4444, 0x4444, 0x5555, 
  0x5555, 0x555, 0x4455, 0x4455, 0x445, 0x445, 0x5555, 0x5555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x5555, 0x555, 0x5555, 
  0x555, 0x5555, 0x555, 0x5555, 0x555, 0x5555, 0x554, 0x554, 
  0x554, 0x554, 0x554, 0x554, 0x554, 0x554, 0x4444, 0x455, 
  0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x444, 0x4444, 0x455, 0x455, 0x455, 0x4555, 
  0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x444, 0x455, 0x455, 0x455, 0x4555, 0x4555, 0x4555, 
  0x4555, 0x455, 0x455, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x444, 0x444, 0x454, 0x455, 0x455, 0x455, 0x4555, 0x4555, 
  0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x444, 0x454, 0x455, 0x455, 0x44, 0x55, 0x44, 0x54, 
  0x44, 0x54, 0x44, 0x44, 0x54, 0x444, 0x444, 0x44, 
  0x54, 0x44, 0x54, 0x55, 0x4444, 0x544, 0x4455, 0x555, 
  0x44444, 0x5444, 0x44555, 0x5555, 0x55, 0x555, 0x455, 0x4555, 
  0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x455, 0x455, 0x455, 0x4555, 0x4555, 0x4555, 0x4555, 
  0x4555, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x455, 
  0x455, 0x455, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x455, 0x455, 0x444, 0x445, 
  0x554, 0x444, 0x444, 0x555, 0x555, 0x555, 0x555, 0x442e2e, 
  (1U<<31) | 921, 0x2e442e2e, 0x452e2e, (1U<<31) | 937, 0x2e542e2e, 0x442e2e, (1U<<31) | 921, 0x2e442e2e, 
  0x442e2e, (1U<<31) | 921, 0x2e442e2e, 0x442e2e, (1U<<31) | 921, 0x2e442e2e, 0x44e4, 0x44, 
  0x44, 0x44444, 0x44444, 0x44444, 0x44444, 0x444, 0x444, 0x444, 
  0x444, 0x4555, 0x4555, 0x455, 0x455, 0x4555, 0x54, 0x54, 
  0x54, 0x55, 0x54, 0x55, 0x54, 0x55, 0x54, 0x55, 
  0x44, 0x45, 0x4555, 0x4555, 0x45, 0x45, 0x54, 0x555, 
  0x54, 0x555, 0x45, 0x45, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x444, 0x454, 0x54, 0x4444, 0x544, 0x4455, 0x555, 
  0x444, 0x444, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x444, 0x55e4, 0x4444, 0x4444, 0x4444, 0x4455, 0x44555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x454, 0x454, 0x54, 
  0x455, 0x455, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x45, 0x555, 0x555, 
  0x44c4, 0x44d4, 0x4d4c, (1U<<31) | 5898, 0x4d4c, (1U<<31) | 5898, 0x44c, 0x44d, 
  0x44c, 0x44d, 0x44c, 0x44d, (1U<<31) | 280, (1U<<31) | 344, (1U<<31) | 280, (1U<<31) | 344, 
  (1U<<31) | 282, (1U<<31) | 346, (1U<<31) | 280, (1U<<31) | 344, (1U<<31) | 280, (1U<<31) | 344, (1U<<31) | 1441, (1U<<31) | 1449, 
  (1U<<31) | 1441, (1U<<31) | 1449, 0xbf3f, 0xbf3f, (1U<<31) | 280, (1U<<31) | 344, (1U<<31) | 280, (1U<<31) | 344, 
  (1U<<31) | 280, (1U<<31) | 344, (1U<<31) | 5551, (1U<<31) | 5666, (1U<<31) | 5551, (1U<<31) | 5666, (1U<<31) | 5551, (1U<<31) | 5666, 
  (1U<<31) | 5551, (1U<<31) | 5666, 0x4c4c, 0x4d4d, 0x4c4c, 0x4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c, 0x4d4d, 
  0x4c4c, 0x4d4d, 0x4c4c, 0x4d4d, 0x4c4c, 0x4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 5588, (1U<<31) | 5703, (1U<<31) | 5588, (1U<<31) | 5703, 0x4c4c4c, 0x4d4d4d, 
  0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 293, (1U<<31) | 351, (1U<<31) | 305, (1U<<31) | 363, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 5588, (1U<<31) | 5703, 
  (1U<<31) | 5588, (1U<<31) | 5703, 0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, 0x4c4c4d, (1U<<31) | 5733, 
  0x4c4c4d4d, (1U<<31) | 5731, 0x4c4c4d, (1U<<31) | 5733, 0x4c4c4d4d, (1U<<31) | 5731, 0x4c4c4c, 0x4d4d4d, 
  0x4d4d4d, (1U<<31) | 5903, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, 
  0x4c4c4d, (1U<<31) | 5733, 0x4c4c4d4d, (1U<<31) | 5731, 0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, 
  0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 5588, (1U<<31) | 5703, (1U<<31) | 5588, (1U<<31) | 5703, 
  0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, 0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 
  0x4c4c4c, 0x4d4d4d, (1U<<31) | 1439, (1U<<31) | 1447, (1U<<31) | 1437, (1U<<31) | 1445, (1U<<31) | 1439, (1U<<31) | 1447, 
  (1U<<31) | 1437, (1U<<31) | 1445, (1U<<31) | 5544, (1U<<31) | 5659, (1U<<31) | 5544, (1U<<31) | 5659, (1U<<31) | 4560, (1U<<31) | 4609, 
  (1U<<31) | 4558, (1U<<31) | 4607, 0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4d4d, (1U<<31) | 5731, 
  0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 
  0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 0x4c4c4c, 0x4d4d4d, 0x44c4c4c, 0x44d4d4d, 
  0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c, 0x44d4d, 
  0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 
  0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c, 0x4d4d, 
  0x4d4d, (1U<<31) | 5905, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c, 0x4d4d, 0x4c4c, 0x4d4d, 0x4c4c4d, (1U<<31) | 5733, 
  0x4c, 0x4d, 0x4d, (1U<<31) | 5887, 0x4c4c, 0x4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c, 0x4d4d, 0x44c4c4d, (1U<<31) | 4627, 0x4c4c4c, 0x4d4d4d, 0x44c4c, 0x44d4d, 
  0x44c4c4c, 0x44d4d4d, 0x44d4d, (1U<<31) | 4765, 0x44d4d4d, (1U<<31) | 4763, 0x44c4c, 0x44d4d, 
  0x44c4c4c, 0x44d4d4d, 0x44d4d, (1U<<31) | 4765, 0x44d4d4d, (1U<<31) | 4763, 0x44d4c, (1U<<31) | 4757, 
  0x44d4c4c, (1U<<31) | 4755, 0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 0x44d4c, (1U<<31) | 4757, 
  0x44d4c4c, (1U<<31) | 4755, 0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c4c, 0x4d4d4d4d, 0x44d4d, (1U<<31) | 4765, 0x44d4d4d, (1U<<31) | 4763, (1U<<31) | 5581, (1U<<31) | 5696, 
  (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5581, (1U<<31) | 5696, 
  (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5581, (1U<<31) | 5696, 
  (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, 0x4c442e0, 0x4d442e0, 
  (1U<<31) | 5559, (1U<<31) | 5684, 0x4d442e0, (1U<<31) | 5890, (1U<<31) | 5674, (1U<<31) | 5880, 0x4c442e0, 0x4d442e0, 
  (1U<<31) | 5559, (1U<<31) | 5684, (1U<<31) | 5581, (1U<<31) | 5696, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, 
  (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5581, (1U<<31) | 5696, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, 
  (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5581, (1U<<31) | 5696, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, 
  (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5581, (1U<<31) | 5696, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, 
  (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5581, (1U<<31) | 5696, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, 
  (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5581, (1U<<31) | 5696, (1U<<31) | 5579, (1U<<31) | 5694, (1U<<31) | 5579, (1U<<31) | 5694, 
  (1U<<31) | 5579, (1U<<31) | 5694, 0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 
  0x44c4c, 0x44d4d, 0x44c4c, 0x44d4d, 0x4c4c4c, 0x4d4d4d, 0x44c4c, 0x44d4d, 
  0x4c4c4c, 0x4d4d4d, 0x54c4c, 0x54d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c4c, 0x44d4d4d, 
  (1U<<31) | 4587, (1U<<31) | 4615, (1U<<31) | 4587, (1U<<31) | 4615, 0x44c4c4c, 0x44d4d4d, 0x44c4c4d, (1U<<31) | 4627, 
  0x44c4c4d, (1U<<31) | 4627, (1U<<31) | 4597, (1U<<31) | 4625, (1U<<31) | 4597, (1U<<31) | 4625, 0x44c4c4d, (1U<<31) | 4627, 
  (1U<<31) | 5551, (1U<<31) | 5666, (1U<<31) | 5551, (1U<<31) | 5666, (1U<<31) | 5551, (1U<<31) | 5666, (1U<<31) | 5551, (1U<<31) | 5666, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x44d4d, (1U<<31) | 4765, 0x44d4d4d, (1U<<31) | 4763, 
  0x4d4d4d, (1U<<31) | 5903, 0x44d4d, (1U<<31) | 4765, 0x44d4d4d, (1U<<31) | 4763, 0x4d4d4d, (1U<<31) | 5903, 
  0x44d4d, (1U<<31) | 4765, 0x44d4d4d, (1U<<31) | 4763, 0x54c4c4c, 0x54d4d4d, 0x44d4d, (1U<<31) | 4765, 
  0x44d4d4d, (1U<<31) | 4763, 0x54c4c4c, 0x54d4d4d, 0x54c4c4c, 0x54d4d4d, 0x44c4d, (1U<<31) | 4637, 
  0x44c4d4d, (1U<<31) | 4635, 0x4c4c4d, (1U<<31) | 5733, 0x4c4c4d4d, (1U<<31) | 5731, 0x4c4c4d, (1U<<31) | 5733, 
  0x4c4c4d4d, (1U<<31) | 5731, 0x4c4c4c, 0x4d4d4d, 0x4c4c4d, (1U<<31) | 5733, 0x44c4d, (1U<<31) | 4637, 
  0x44c4d4d, (1U<<31) | 4635, 0x44c4d4d, (1U<<31) | 4635, 0x44c4c, 0x44d4d, 0x44c4c, 0x44d4d, 
  0x4c4c4d, (1U<<31) | 5733, 0x4c4c4d4d, (1U<<31) | 5731, 0x4c4c4d, (1U<<31) | 5733, 0x4c4c4d4d, (1U<<31) | 5731, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c4c, 0x4d4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c4c, 0x4d4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c4c, 0x4d4d4d4d, 0x44c4c, 0x44d4d, 
  0x44c4c4c, 0x44d4d4d, 0x4c4c4c, 0x4d4d4d, 0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 
  0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 0x44c4c, 0x44d4d, 0x44c4c4c, 0x44d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4d4d, (1U<<31) | 5731, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c4c, 0x4d4d4d4d, 
  0x4c4c4c4c, 0x4d4d4d4d, 0x44c4d, (1U<<31) | 4637, 0x44c4d4d, (1U<<31) | 4635, 0x4c4c4d, (1U<<31) | 5733, 
  0x4c4c4d4d, (1U<<31) | 5731, 0x44c4d, (1U<<31) | 4637, 0x44c4d4d, (1U<<31) | 4635, 0x44c4c, 0x44d4d, 
  0x44c4c4c, 0x44d4d4d, 0x4c4c4d, (1U<<31) | 5733, 0x4c4c4d4d, (1U<<31) | 5731, (1U<<31) | 5588, (1U<<31) | 5703, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c, 0x4d4d, 0x4c4c, 0x4d4d, 0x4c4c, 0x4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c, 0x4d4d, (1U<<31) | 300, (1U<<31) | 358, (1U<<31) | 300, (1U<<31) | 358, (1U<<31) | 300, (1U<<31) | 358, 
  0x4c4c4c, 0x4d4d4d, 0x54c4d, (1U<<31) | 5961, 0x54c4d4d, (1U<<31) | 5959, 0x44c4c, 0x44d4d, 
  0x44c4c4c, 0x44d4d4d, 0x444d4d, (1U<<31) | 4216, 0x444d4d4d, (1U<<31) | 4214, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c4c, 0x4d4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c4c, 0x4d4d4d4d, 0x44c4c, 0x44d4d, 
  0x44c4c4c, 0x44d4d4d, 0x54c4d, (1U<<31) | 5961, 0x54c4d4d, (1U<<31) | 5959, 0x444d4d, (1U<<31) | 4216, 
  0x444d4d4d, (1U<<31) | 4214, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c4c, 0x4d4d4d4d, 0x44c4c, 0x44d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x444d4d, (1U<<31) | 4216, 
  0x444d4d4d, (1U<<31) | 4214, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x4c4d, (1U<<31) | 5743, 0x4c4c440, 0x4d4d440, 0x4c4c440, 0x4d4d440, 
  (1U<<31) | 5606, (1U<<31) | 5721, 0x4c4d440, (1U<<31) | 5740, 0x4c4d440, (1U<<31) | 5740, (1U<<31) | 5616, (1U<<31) | 5748, 
  0x4c4c440, 0x4d4d440, 0x4c4c440, 0x4d4d440, (1U<<31) | 5606, (1U<<31) | 5721, 0x4c4d, (1U<<31) | 5743, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c, 0x4d4d, 0x4c4c4c, 0x4d4d4d, 0x4c4c, 0x4d4d, 
  0x4c4c4c, 0x4d4d4d, 0x44c4c4d, (1U<<31) | 4627, 0x4c4c4d, (1U<<31) | 5733, 0x4c4c4d, (1U<<31) | 5733, 
  0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 5588, (1U<<31) | 5703, 
  (1U<<31) | 5588, (1U<<31) | 5703, 0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 293, (1U<<31) | 351, 
  0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 5588, (1U<<31) | 5703, (1U<<31) | 5588, (1U<<31) | 5703, 
  0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, 0x4c4c4d, (1U<<31) | 5733, 0x4c4c4d, (1U<<31) | 5733, 
  0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, 0x4c4c4c, 0x4d4d4d, 0x4c4c4c, 0x4d4d4d, 
  0x4d4d4d, (1U<<31) | 5903, 0x4c4c4d, (1U<<31) | 5733, 0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, 
  0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 5588, (1U<<31) | 5703, (1U<<31) | 5588, (1U<<31) | 5703, 
  0x4c4c4c, 0x4d4d4d, 0x4d4d4d, (1U<<31) | 5903, (1U<<31) | 5597, (1U<<31) | 5712, 0x44d4d, (1U<<31) | 4765, 
  0x44d4d4d, (1U<<31) | 4763, 0x44d4d, (1U<<31) | 4765, 0x44d4d4d, (1U<<31) | 4763, 0x44d4d, (1U<<31) | 4765, 
  0x44d4d4d, (1U<<31) | 4763, 0x4c4d, (1U<<31) | 5743, 0x4c4d, (1U<<31) | 5743, 0x4c4d4d, (1U<<31) | 5758, 
  0x4c4d4d, (1U<<31) | 5758, 0x4c4d, (1U<<31) | 5743, 0x4c4d, (1U<<31) | 5743, 0x4c4c4c, 0x4d4d4d, 
  0x4c4d, (1U<<31) | 5743, 0x4c4d, (1U<<31) | 5743, 0x2e0, 0x2e0, 0x2e0, 0x2e0, 
  0x2e0, 0x42e0, 0x52e0, 0x442e2e2e, 0x442e2e2e, 0x442e2e2e, 0x442e2e2e, 0x442e2e2e, 
  0x442e2e2e, 0x4442e2e, 0x4452e2e, 0x4442e2e, 0x4442e2e, 0x4442e2e, 0x2e0, 0x42e2e0, 
  0x442e0, 0x3939, 0x2a2a, 0x44, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 
  0x393939, 0x393939, 0x444, 0x393939, 0x393939, 0x444, 0x444, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x444, 0x393939, 0x2a2a2a, 0x393939, 0x2a2a2a, 
  0x2a2a2a, 0x2a2a2a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 
  0x43b3b, 0x44a4a, 0x444, 0x2c2c2c, 0x42c2c, 0x4444, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x4444, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x2c2c2c2c, 
  0x59595959, 0x3b3b3b3b, 0x4a4a4a4a, 0x42c2c2c, 0x4595959, 0x43b3b3b, 0x44a4a4a, 0x2c2c2c2c, 
  0x59595959, 0x3b3b3b3b, 0x4a4a4a4a, 0x42c2c2c, 0x4595959, 0x43b3b3b, 0x44a4a4a, 0x44, 
  0x2c2c2c2c, 0x42c2c2c, 0x2c2c2c2c, 0x42c2c2c, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 
  0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x2c4, 0x594, 0x3b4, 0x2c4, 
  0x4a4, 0x4, 0x2c2c2c2c, 0x42c2c2c, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 
  0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x2c4, 0x594, 0x3b4, 0x2c4, 
  0x4a4, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 
  0x44a4a, 0x44, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x42c2c, 0x45959, 
  0x43b3b, 0x44a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x42c2c, 0x45959, 
  0x43b3b, 0x44a4a, 0x39390, 0x39390, 0x39390, 0x2a2a4, 0x2a2a4, 0x2a2a4, 
  0x2a2a4, 0x2a2a4, 0x2a2a4, 0x2a2a0, 0x2a2a0, 0x2a2a0, 0x42c4, 0x4595, 
  0x43b4, 0x44a4, 0x42c4, 0x4595, 0x43b4, 0x44a4, 0x440, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x4555, 
  0x4a4a59, 0x2c2c3b, 0x3b3b4a, 0x4a4a59, 0x2c2c3b, 0x3b3b4a, 0x393955, 0x4a4a5959, 
  0x2c2c3b3b, 0x3b3b4a4a, 0x4a4a5959, 0x2c2c3b3b, 0x3b3b4a4a, 0x393955, 0x4455, 0x393955, 
  0x393955, 0x2a2a55, 0x2a2a55, 0x393955, 0x393955, 0x393955, 0x4455, 0x393955, 
  0x393955, 0x2a2a55, 0x2a2a55, 0x4a4a5959, 0x2c2c3b3b, 0x3b3b4a4a, 0x4a4a5959, 0x2c2c3b3b, 
  0x3b3b4a4a, 0x393955, 0x454, 0x454, 0x454, 0x454, 0x454, 0x454, 
  0x898989, 0x7a7a7a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x8959, 0x7a4a, 
  0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 
  0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 
  0x898959, 0x7a7a4a, 0x898989, 0x7a7a7a, 0x7a7a6b, 0x89897a, 0x598989, 0x4a7a7a, 
  0x7a89, 0x6b7a, 0x7a89, 0x6b7a, 0x5989, 0x4a7a, 0x5989, 0x4a7a, 
  0x4a89, 0x3b7a, 0x4a89, 0x3b7a, 0x42c, 0x559, 0x43b, 0x44a, 
  0x8989, 0x7a7a, (1U<<31) | 7660, 0x7a7a7a7a, 0x898989, 0x7a7a7a, 0x898989, 0x7a7a7a, 
  0x898989, 0x7a7a7a, 0x898989, 0x7a7a7a, (1U<<31) | 7660, 0x7a7a7a7a, 0x898989, 0x7a7a7a, 
  0x8989, 0x7a7a, 0x8989, 0x7a7a, 0x8989, 0x7a7a, 0x898959, 0x7a7a4a, 
  0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 
  0x898959, 0x7a7a4a, 0x8989, 0x7a7a, 0x898989, 0x7a7a7a, 0x898959, 0x7a7a4a, 
  0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 0x898959, 0x7a7a4a, 
  0x8959, 0x7a4a, 0x8959, 0x7a4a, 0x7a7a3b, 0x89894a, 0x8959, 0x7a4a, 
  0x8959, 0x7a4a, 0x4a4a59, 0x2c2c3b, 0x3b3b4a, 0x4a4a59, 0x2c2c3b, 0x3b3b4a, 
  0x4a4a59, 0x2c2c3b, 0x3b3b4a, 0x4a4a59, 0x2c2c3b, 0x3b3b4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x442c2c, 0x545959, 
  0x443b3b, 0x444a4a, 0x444, 0x2c42c2c, 0x5945959, 0x3b43b3b, 0x4a44a4a, 0x42e4, 
  0x42e2c, 0x42e59, 0x42e3b, 0x42e4a, 0x42c, 0x459, 0x43b, 0x44a, 
  0x42e59, 0x42e4a, 0x42e4, 0x4444, 0x42e4, 0x4455, 0x3b3b3b3b, 0x4a4a4a4a, 
  0x3b3b3b3b, 0x4a4a4a4a, 0x4455, 0x2c2c2c2c, 0x59595959, 0x3b3b3b3b, 0x4a4a4a4a, 0x393955, 
  0x393955, 0x393955, 0x393955, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x42c2c, 
  0x45959, 0x43b3b, 0x44a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x42c2c, 
  0x45959, 0x43b3b, 0x44a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x444, 0x2c2c, 0x4455, 0x3b3b3b3b, 0x4a4a4a4a, 
  0x3b3b3b3b, 0x4a4a4a4a, 0x4455, 0x2c2c2c2c, 0x59595959, 0x3b3b3b3b, 0x4a4a4a4a, 0x455, 
  0x393939, 0x3b3b3b, 0x4a4a4a, 0x393939, 0x39394, 0x39394, 0x392a39, 0x392a39, 
  0x393939, 0x444, 0x393939, 0x444, 0x3b3b3b, 0x4a4a4a, 0x393955, 0x393955, 
  0x445, 0x445, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c, 0x5959, 
  0x3b3b, 0x4a4a, 0x2c2c, 0x5959, 0x3b3b, 0x4a4a, 0x2c2c2c, 0x42c2c, 
  0x2c2c2c, 0x42c2c, 0x393939, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c, 0x5959, 0x3b3b, 0x4a4a, 0x393939, 
  0x2a2a2a, 0x394, 0x394, 0x2a39, 0x2a39, 0x2a39, 0x2a39, 0x2a39, 
  0x2a39, 0x2a39, 0x2a39, 0x39392a, 0x44439, 0x44439, 0x4439, 0x39392a, 
  0x4439, 0x39392a, 0x4444, 0x2a4, 0x44, 0x439, 0x42a, 0x42c2c, 
  0x45959, 0x43b3b, 0x44a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x42c2c, 
  0x43b3b, 0x44a4a, 0x455, 0x43939, 0x42a2a, 0x43939, 0x444, 0x43939, 
  0x42a2a, 0x43939, 0x42a2a, 0x444, 0x43939, 0x42a2a, 0x42c2c2c, 0x4595959, 
  0x43b3b3b, 0x44a4a4a, 0x42c2c2c, 0x4595959, 0x43b3b3b, 0x44a4a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x42c2c, 0x45959, 
  0x43b3b, 0x44a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x42e2c0, 0x42e590, 
  0x42e3b0, 0x42e4a0, 0x42e590, 0x42e4a0, 0x393939, 0x393939, 0x444, 0x393939, 
  0x393939, 0x444, 0x444, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x393939, 0x2a2a2a, 0x393939, 0x2a2a2a, 0x2a2a2a, 
  0x2a2a2a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x42c2c, 0x45959, 0x43b3b, 
  0x44a4a, 0x2c2c2c2c, 0x59595959, 0x3b3b3b3b, 0x4a4a4a4a, 0x440, 0x2c2c2c, 0x42c2c, 
  0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x888, 0x777, 
  0x777, 0x888, 0x777, 0x777, 0x7fcf2f, 0x7fcf2f, 0x7fcf1f, 0x7fcf1f, 
  0x7fcf1f, 0x7fcf1f, 0x7f7fcf1f, 0x7f7fcf1f, 0x7fcf1f, 0x7fcf1f, 0x7fcf1f, 0x7fcf1f, 
  0x7fcf1f, 0x7fcf1f, 0x44f4, 0x44f4, 0x7fcf1f, 0x7fcf1f, 0x7fcf1f, 0x7fcf1f, 
  0x7fcf1f, 0x7fcf1f, 0x7fcf1f, 0x7fcf1f, 0x40, 0x40, 0x440, 0x40, 
  0x40, 0x440, 0x0, 0x44, 0x44, 0x44, 0x85, 0x74, 
  0x47, 0x58, 0x88, 0x77, 0x77, 0x4f0, 0x4f0, 0x77, 
  0x77, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 
  0x87, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x85, 
  0x85, 0x85, 0x85, 0x84, 0x84, 0x84, 0x84, 0x85, 
  0x85, 0x85, 0x85, 0x777, 0x777, 0x888, 0x777, 0x777, 
  0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x888, 0x777, 
  0x777, 0x88, 0x77, 0x77, 0x73, 0x73, 0x74, 0x74, 
  0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x75, 0x75, 
  0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x74, 0x74, 
  0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x75, 0x75, 
  0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x88, 0x77, 
  0x77, 0x88, 0x77, 0x77, 0x8888, 0x7777, 0x7777, 0x8888, 
  0x7777, 0x7777, 0x8888, 0x7777, 0x7777, 0x8888, 0x7777, 0x7777, 
  0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x4444, 0x48, 
  0x48, 0x48, 0x48, 0x47, 0x47, 0x47, 0x47, 0x2e1, 
  0x2e1, 0x2e1, 0x2e1, 0x51, 0x51, 0x51, 0x4cf2f, 0x4cf1f, 
  0x4cf4f, 0x4cf2f, 0x4cf1f, 0x4cf4f, 0x88, 0x77, 0x77, 0x58, 
  0x58, 0x58, 0x58, 0x57, 0x57, 0x57, 0x57, 0x448, 
  (1U<<31) | 3407, (1U<<31) | 5953, 0x444, 0x545, 0x0, 0x0, 0x0, (1U<<31) | 6314, 
  (1U<<31) | 6340, (1U<<31) | 6978, (1U<<31) | 6314, (1U<<31) | 6340, (1U<<31) | 6978, (1U<<31) | 6314, (1U<<31) | 6340, (1U<<31) | 6978, 
  (1U<<31) | 6314, (1U<<31) | 6340, (1U<<31) | 6978, 0x88, 0x77, 0x33, 0x44, 0x55, 
  0xcf4f, 0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x888, 
  0x777, 0x777, 0x888, 0x777, 0x777, 0x444, 0x444, 0x444, 
  0x555, 0x444, 0x555, 0x4444, 0xcf4f, 0xcf4f, 0xcf4f, 0xcf4f, 
  0xcf4f, 0xcf4f, 0xcf4f, 0xcf4f, 0xcf4f, 0x88, 0x88, 0x77, 
  0x77, 0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 0x88, 
  0x77, 0x77, 0x4, 0x5, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4f4, 0x444, 0x455, 0x455, 
  0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 0x4444, 0x4444, 
  0x88, 0x77, 0x77, 0x4477, (1U<<31) | 4311, 0x4444, (1U<<31) | 3454, 0x4477, 
  (1U<<31) | 4311, 0x4444, (1U<<31) | 3454, 0x4477, (1U<<31) | 4311, 0x4444, (1U<<31) | 3454, 0x44747, 
  (1U<<31) | 4318, 0x44444, (1U<<31) | 3468, 0x44747, (1U<<31) | 4318, 0x44444, (1U<<31) | 3468, 0x44747, 
  (1U<<31) | 4318, 0x44444, (1U<<31) | 3468, 0x44747, (1U<<31) | 4318, 0x44444, (1U<<31) | 3468, 0x4477, 
  (1U<<31) | 4311, 0x4444, (1U<<31) | 3454, 0x77, 0x77, 0x77, 0x77, 0x77, 
  0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 0x88, 0x77, 
  0x77, 0x88, 0x77, 0x77, 0x4453, 0x4453, 0x4453, 0x4454, 
  0x4454, 0x4454, 0x4455, 0x4455, 0x4455, 0x4453, 0x4453, 0x4453, 
  (1U<<31) | 4252, (1U<<31) | 4252, (1U<<31) | 4252, (1U<<31) | 4268, (1U<<31) | 4268, (1U<<31) | 4268, (1U<<31) | 4285, (1U<<31) | 4285, 
  (1U<<31) | 4285, (1U<<31) | 4252, (1U<<31) | 4252, (1U<<31) | 4252, (1U<<31) | 4243, (1U<<31) | 4243, (1U<<31) | 4243, (1U<<31) | 4259, 
  (1U<<31) | 4259, (1U<<31) | 4259, (1U<<31) | 4243, (1U<<31) | 4243, (1U<<31) | 4243, 0x453, 0x453, 0x453, 
  0x454, 0x454, 0x454, 0x455, 0x455, 0x455, 0x453, 0x453, 
  0x453, (1U<<31) | 4804, (1U<<31) | 4804, (1U<<31) | 4804, (1U<<31) | 4827, (1U<<31) | 4827, (1U<<31) | 4827, (1U<<31) | 4842, 
  (1U<<31) | 4842, (1U<<31) | 4842, (1U<<31) | 4804, (1U<<31) | 4804, (1U<<31) | 4804, (1U<<31) | 4796, (1U<<31) | 4796, (1U<<31) | 4796, 
  (1U<<31) | 4819, (1U<<31) | 4819, (1U<<31) | 4819, (1U<<31) | 4796, (1U<<31) | 4796, (1U<<31) | 4796, 0x44453, 0x44453, 
  0x44453, 0x44454, 0x44454, 0x44454, 0x44455, 0x44455, 0x44455, 0x44453, 
  0x44453, 0x44453, (1U<<31) | 3796, (1U<<31) | 3796, (1U<<31) | 3796, (1U<<31) | 3814, (1U<<31) | 3814, (1U<<31) | 3814, 
  (1U<<31) | 3833, (1U<<31) | 3833, (1U<<31) | 3833, (1U<<31) | 3796, (1U<<31) | 3796, (1U<<31) | 3796, (1U<<31) | 3786, (1U<<31) | 3786, 
  (1U<<31) | 3786, (1U<<31) | 3804, (1U<<31) | 3804, (1U<<31) | 3804, (1U<<31) | 3786, (1U<<31) | 3786, (1U<<31) | 3786, 0x4453, 
  0x4453, 0x4453, 0x4454, 0x4454, 0x4454, 0x4455, 0x4455, 0x4455, 
  0x4453, 0x4453, 0x4453, (1U<<31) | 4252, (1U<<31) | 4252, (1U<<31) | 4252, (1U<<31) | 4268, (1U<<31) | 4268, 
  (1U<<31) | 4268, (1U<<31) | 4285, (1U<<31) | 4285, (1U<<31) | 4285, (1U<<31) | 4252, (1U<<31) | 4252, (1U<<31) | 4252, (1U<<31) | 4243, 
  (1U<<31) | 4243, (1U<<31) | 4243, (1U<<31) | 4259, (1U<<31) | 4259, (1U<<31) | 4259, (1U<<31) | 4243, (1U<<31) | 4243, (1U<<31) | 4243, 
  0x44453, 0x44453, 0x44453, 0x44454, 0x44454, 0x44454, 0x44455, 0x44455, 
  0x44455, 0x44453, 0x44453, 0x44453, (1U<<31) | 3796, (1U<<31) | 3796, (1U<<31) | 3796, (1U<<31) | 3814, 
  (1U<<31) | 3814, (1U<<31) | 3814, (1U<<31) | 3833, (1U<<31) | 3833, (1U<<31) | 3833, (1U<<31) | 3796, (1U<<31) | 3796, (1U<<31) | 3796, 
  (1U<<31) | 3786, (1U<<31) | 3786, (1U<<31) | 3786, (1U<<31) | 3804, (1U<<31) | 3804, (1U<<31) | 3804, (1U<<31) | 3786, (1U<<31) | 3786, 
  (1U<<31) | 3786, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x34450, 
  0x34450, 0x34450, 0x44450, 0x44450, 0x44450, 0x54450, 0x54450, 0x54450, 
  0x34450, 0x34450, 0x34450, 0x334450, 0x334450, 0x334450, 0x444450, 0x444450, 
  0x444450, 0x554450, 0x554450, 0x554450, 0x334450, 0x334450, 0x334450, 0x33334450, 
  0x33334450, 0x33334450, 0x44444450, 0x44444450, 0x44444450, 0x33334450, 0x33334450, 0x33334450, 
  0x3450, 0x3450, 0x3450, 0x4450, 0x4450, 0x4450, 0x5450, 0x5450, 
  0x5450, 0x3450, 0x3450, 0x3450, 0x33450, 0x33450, 0x33450, 0x44450, 
  0x44450, 0x44450, 0x55450, 0x55450, 0x55450, 0x33450, 0x33450, 0x33450, 
  0x3333450, 0x3333450, 0x3333450, 0x4444450, 0x4444450, 0x4444450, 0x3333450, 0x3333450, 
  0x3333450, 0x344450, 0x344450, 0x344450, 0x444450, 0x444450, 0x444450, 0x544450, 
  0x544450, 0x544450, 0x344450, 0x344450, 0x344450, 0x3344450, 0x3344450, 0x3344450, 
  0x4444450, 0x4444450, 0x4444450, 0x5544450, 0x5544450, 0x5544450, 0x3344450, 0x3344450, 
  0x3344450, (1U<<31) | 1009, (1U<<31) | 1009, (1U<<31) | 1009, (1U<<31) | 3615, (1U<<31) | 3615, (1U<<31) | 3615, (1U<<31) | 1009, 
  (1U<<31) | 1009, (1U<<31) | 1009, 0x34450, 0x34450, 0x34450, 0x44450, 0x44450, 0x44450, 
  0x54450, 0x54450, 0x54450, 0x34450, 0x34450, 0x34450, 0x334450, 0x334450, 
  0x334450, 0x444450, 0x444450, 0x444450, 0x554450, 0x554450, 0x554450, 0x334450, 
  0x334450, 0x334450, 0x33334450, 0x33334450, 0x33334450, 0x44444450, 0x44444450, 0x44444450, 
  0x33334450, 0x33334450, 0x33334450, 0x344450, 0x344450, 0x344450, 0x444450, 0x444450, 
  0x444450, 0x544450, 0x544450, 0x544450, 0x344450, 0x344450, 0x344450, 0x3344450, 
  0x3344450, 0x3344450, 0x4444450, 0x4444450, 0x4444450, 0x5544450, 0x5544450, 0x5544450, 
  0x3344450, 0x3344450, 0x3344450, (1U<<31) | 1009, (1U<<31) | 1009, (1U<<31) | 1009, (1U<<31) | 3615, (1U<<31) | 3615, 
  (1U<<31) | 3615, (1U<<31) | 1009, (1U<<31) | 1009, (1U<<31) | 1009, 0x34450, 0x44450, 0x34450, 0x334450, 
  0x444450, 0x334450, 0x33334450, 0x44444450, 0x33334450, 0x3450, 0x4450, 0x3450, 
  0x33450, 0x44450, 0x33450, 0x3333450, 0x4444450, 0x3333450, 0x344450, 0x444450, 
  0x344450, 0x3344450, 0x4444450, 0x3344450, (1U<<31) | 1009, (1U<<31) | 3615, (1U<<31) | 1009, 0x34450, 
  0x44450, 0x34450, 0x334450, 0x444450, 0x334450, 0x33334450, 0x44444450, 0x33334450, 
  0x344450, 0x444450, 0x344450, 0x3344450, 0x4444450, 0x3344450, (1U<<31) | 1009, (1U<<31) | 3615, 
  (1U<<31) | 1009, 0x55, (1U<<31) | 6593, (1U<<31) | 6581, (1U<<31) | 6581, (1U<<31) | 6511, (1U<<31) | 6500, (1U<<31) | 6500, 
  (1U<<31) | 6437, (1U<<31) | 4292, (1U<<31) | 6427, (1U<<31) | 4275, (1U<<31) | 6427, (1U<<31) | 4275, (1U<<31) | 6637, (1U<<31) | 6626, 
  (1U<<31) | 6626, (1U<<31) | 6551, (1U<<31) | 6541, (1U<<31) | 6541, (1U<<31) | 6473, (1U<<31) | 4848, (1U<<31) | 6464, (1U<<31) | 4833, 
  (1U<<31) | 6464, (1U<<31) | 4833, (1U<<31) | 6783, (1U<<31) | 6768, (1U<<31) | 6768, (1U<<31) | 6593, (1U<<31) | 6581, (1U<<31) | 6581, 
  (1U<<31) | 6511, (1U<<31) | 3841, (1U<<31) | 6500, (1U<<31) | 3822, (1U<<31) | 6500, (1U<<31) | 3822, (1U<<31) | 6839, (1U<<31) | 6825, 
  (1U<<31) | 6825, (1U<<31) | 6637, (1U<<31) | 6626, (1U<<31) | 6626, (1U<<31) | 6551, (1U<<31) | 4292, (1U<<31) | 6541, (1U<<31) | 4275, 
  (1U<<31) | 6541, (1U<<31) | 4275, (1U<<31) | 7037, (1U<<31) | 7020, (1U<<31) | 7020, (1U<<31) | 6731, (1U<<31) | 6719, (1U<<31) | 6719, 
  (1U<<31) | 6637, (1U<<31) | 3841, (1U<<31) | 6626, (1U<<31) | 3822, (1U<<31) | 6626, (1U<<31) | 3822, (1U<<31) | 6683, (1U<<31) | 6670, 
  (1U<<31) | 6670, (1U<<31) | 6593, (1U<<31) | 6581, (1U<<31) | 6581, (1U<<31) | 6731, (1U<<31) | 6719, (1U<<31) | 6719, (1U<<31) | 6637, 
  (1U<<31) | 6626, (1U<<31) | 6626, (1U<<31) | 6605, (1U<<31) | 6570, (1U<<31) | 6570, (1U<<31) | 6522, (1U<<31) | 6490, (1U<<31) | 6490, 
  (1U<<31) | 6447, (1U<<31) | 4302, (1U<<31) | 6418, (1U<<31) | 4259, (1U<<31) | 6418, (1U<<31) | 4259, (1U<<31) | 6648, (1U<<31) | 6616, 
  (1U<<31) | 6616, (1U<<31) | 6561, (1U<<31) | 6532, (1U<<31) | 6532, (1U<<31) | 6482, (1U<<31) | 4857, (1U<<31) | 6456, (1U<<31) | 4819, 
  (1U<<31) | 6456, (1U<<31) | 4819, (1U<<31) | 6798, (1U<<31) | 6754, (1U<<31) | 6754, (1U<<31) | 6605, (1U<<31) | 6570, (1U<<31) | 6570, 
  (1U<<31) | 6522, (1U<<31) | 3852, (1U<<31) | 6490, (1U<<31) | 3804, (1U<<31) | 6490, (1U<<31) | 3804, (1U<<31) | 6853, (1U<<31) | 6812, 
  (1U<<31) | 6812, (1U<<31) | 6648, (1U<<31) | 6616, (1U<<31) | 6616, (1U<<31) | 6561, (1U<<31) | 4302, (1U<<31) | 6532, (1U<<31) | 4259, 
  (1U<<31) | 6532, (1U<<31) | 4259, (1U<<31) | 7054, (1U<<31) | 7004, (1U<<31) | 7004, (1U<<31) | 6743, (1U<<31) | 6708, (1U<<31) | 6708, 
  (1U<<31) | 6648, (1U<<31) | 3852, (1U<<31) | 6616, (1U<<31) | 3804, (1U<<31) | 6616, (1U<<31) | 3804, (1U<<31) | 6696, (1U<<31) | 6658, 
  (1U<<31) | 6658, (1U<<31) | 6605, (1U<<31) | 6570, (1U<<31) | 6570, (1U<<31) | 6743, (1U<<31) | 6708, (1U<<31) | 6708, (1U<<31) | 6648, 
  (1U<<31) | 6616, (1U<<31) | 6616, (1U<<31) | 5875, 0x4f5, (1U<<31) | 6551, (1U<<31) | 6541, (1U<<31) | 6541, (1U<<31) | 6551, 
  (1U<<31) | 6541, (1U<<31) | 6541, (1U<<31) | 6551, (1U<<31) | 6541, (1U<<31) | 6541, (1U<<31) | 6551, (1U<<31) | 6541, (1U<<31) | 6541, 
  (1U<<31) | 6561, (1U<<31) | 6532, (1U<<31) | 6532, (1U<<31) | 6561, (1U<<31) | 6532, (1U<<31) | 6532, (1U<<31) | 6561, (1U<<31) | 6532, 
  (1U<<31) | 6532, (1U<<31) | 6561, (1U<<31) | 6532, (1U<<31) | 6532, 0x88, 0x77, 0x77, 0x54, 
  0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x48, 
  0x48, 0x48, 0x48, 0x47, 0x47, 0x47, 0x47, 0x58, 
  0x58, 0x58, 0x58, 0x57, 0x57, 0x57, 0x57, 0x11, 
  0x141, 0x11, 0x141, 0x14, 0x144, 0x11, 0x141, (1U<<31) | 5798, 
  (1U<<31) | 5785, (1U<<31) | 4672, (1U<<31) | 4665, (1U<<31) | 4665, (1U<<31) | 5785, (1U<<31) | 5798, (1U<<31) | 5785, (1U<<31) | 4672, 
  (1U<<31) | 4665, (1U<<31) | 4665, (1U<<31) | 5785, (1U<<31) | 5798, (1U<<31) | 5785, (1U<<31) | 4672, (1U<<31) | 4665, (1U<<31) | 4665, 
  (1U<<31) | 5785, (1U<<31) | 5798, (1U<<31) | 5785, (1U<<31) | 4672, (1U<<31) | 4665, (1U<<31) | 4665, (1U<<31) | 5785, (1U<<31) | 5818, 
  (1U<<31) | 5830, (1U<<31) | 5765, (1U<<31) | 4693, (1U<<31) | 4706, (1U<<31) | 4643, (1U<<31) | 5818, (1U<<31) | 5830, (1U<<31) | 5765, 
  (1U<<31) | 4693, (1U<<31) | 4706, (1U<<31) | 4643, (1U<<31) | 6214, (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, 
  (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 6214, 
  (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3530, 
  (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 6214, (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, 
  (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 6214, 
  (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3530, 
  (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 3530, (1U<<31) | 6202, (1U<<31) | 6866, (1U<<31) | 3593, (1U<<31) | 5025, (1U<<31) | 5038, 
  (1U<<31) | 3566, (1U<<31) | 6202, (1U<<31) | 6866, (1U<<31) | 3593, (1U<<31) | 5025, (1U<<31) | 5038, (1U<<31) | 3566, (1U<<31) | 5798, 
  (1U<<31) | 5777, (1U<<31) | 4672, (1U<<31) | 4656, (1U<<31) | 4656, (1U<<31) | 5777, (1U<<31) | 5798, (1U<<31) | 5777, (1U<<31) | 4672, 
  (1U<<31) | 4656, (1U<<31) | 4656, (1U<<31) | 5777, (1U<<31) | 5798, 0x4f4, (1U<<31) | 4672, 0x44f4, 0x44f4, 
  0x4f4, (1U<<31) | 5798, 0x4f4, (1U<<31) | 4672, 0x44f4, 0x44f4, 0x4f4, (1U<<31) | 5818, 
  (1U<<31) | 5830, (1U<<31) | 5765, (1U<<31) | 4693, (1U<<31) | 4706, (1U<<31) | 4643, (1U<<31) | 5818, (1U<<31) | 5830, (1U<<31) | 5765, 
  (1U<<31) | 4693, (1U<<31) | 4706, (1U<<31) | 4643, (1U<<31) | 6214, (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, 
  (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 6214, 
  (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3507, 
  (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 6214, (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, 
  (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 6214, 
  (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3507, 
  (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 6202, (1U<<31) | 6866, (1U<<31) | 3593, (1U<<31) | 5025, (1U<<31) | 5038, 
  (1U<<31) | 3566, (1U<<31) | 6202, (1U<<31) | 6866, (1U<<31) | 3593, (1U<<31) | 5025, (1U<<31) | 5038, (1U<<31) | 3566, (1U<<31) | 5798, 
  0x4f4, (1U<<31) | 4672, 0x44f4, 0x44f4, 0x4f4, (1U<<31) | 5798, 0x4f4, (1U<<31) | 4672, 
  0x44f4, 0x44f4, 0x4f4, (1U<<31) | 5798, (1U<<31) | 5777, (1U<<31) | 4672, (1U<<31) | 4656, (1U<<31) | 4656, 
  (1U<<31) | 5777, (1U<<31) | 5798, (1U<<31) | 5777, (1U<<31) | 4672, (1U<<31) | 4656, (1U<<31) | 4656, (1U<<31) | 5777, (1U<<31) | 5818, 
  (1U<<31) | 5830, (1U<<31) | 5765, (1U<<31) | 4693, (1U<<31) | 4706, (1U<<31) | 4643, (1U<<31) | 5818, (1U<<31) | 5830, (1U<<31) | 5765, 
  (1U<<31) | 4693, (1U<<31) | 4706, (1U<<31) | 4643, (1U<<31) | 6214, (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, 
  (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 6214, 
  (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3507, 
  (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 6214, (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, 
  (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 6214, 
  (1U<<31) | 6214, (1U<<31) | 6878, (1U<<31) | 6878, (1U<<31) | 6264, (1U<<31) | 6264, (1U<<31) | 6928, (1U<<31) | 6928, (1U<<31) | 3507, 
  (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 3507, (1U<<31) | 6202, (1U<<31) | 6866, (1U<<31) | 3593, (1U<<31) | 5025, (1U<<31) | 5038, 
  (1U<<31) | 3566, (1U<<31) | 6202, (1U<<31) | 6866, (1U<<31) | 3593, (1U<<31) | 5025, (1U<<31) | 5038, (1U<<31) | 3566, 0x4f4, 
  0x44f4, 0x4f4, 0x44f4, (1U<<31) | 5785, (1U<<31) | 4665, (1U<<31) | 5785, (1U<<31) | 4665, (1U<<31) | 3658, 
  0x444f0, 0x4444f0, 0x444f0, 0x4444f0, 0x4f4, 0x44f4, 0x44f4, 0x4f4, 
  0x4f4, 0x44f4, 0x44f4, 0x4f4, (1U<<31) | 5785, (1U<<31) | 4665, (1U<<31) | 5785, (1U<<31) | 4665, 
  (1U<<31) | 3658, (1U<<31) | 3658, (1U<<31) | 3658, (1U<<31) | 3658, 0x444f0, 0x4444f0, 0x444f0, 0x4444f0, 
  (1U<<31) | 8517, 0x595959, 0x595959, 0x595959, 0x595959, 0x2c2c2c2c, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x5959, 0x445959, 0x444a4a, 0x40, 0x0, 0x442e0, 
  0x442e0, 0x442e0, 0x442e0, 0x2e2c, 0x2e3b, 0x2e4a, 0x2e2c, 0x2e2c, 
  0x2e4a, 0x2e4a, 0x3b, 0x4a0, 0x52c, 0x559, 0x53b, (1U<<31) | 6180, 
  0x54a, 0x2e2c0, 0x2e3b0, 0x2e4a0, 0x2e4a0, 0x2e4a0, 0x2c2c2c, 0x3b3b3b, 
  0x4a4a4a, (1U<<31) | 8503, 0x4a4a4a, (1U<<31) | 8501, (1U<<31) | 8501, 0x2c2c2c, 0x3b3b3b, 0x4a4a4a, 
  0x2c2c2c, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x3b3b3b, 
  0x4a4a4a, 0x2c2c59, 0x44a7a, 0x595959, 0x44a7a, 0x42c2c, 0x42c2c, 0x595959, 
  0x2c4, 0x7a7a4a, 0x7a7a44, 0x7a7a4a, 0x7a7a44, 0x2c2c2c, 0x2c2c44, 0x595959, 
  0x595944, 0x3b3b3b, 0x3b3b44, (1U<<31) | 8503, (1U<<31) | 8494, 0x4a4a4a, 0x4a4a44, 0x7a7a4a, 
  0x7a7a44, 0x7a7a4a, 0x7a7a44, 0x2c2c2c, 0x2c2c44, 0x595959, 0x595944, 0x3b3b3b, 
  0x3b3b44, (1U<<31) | 8503, (1U<<31) | 8494, 0x4a4a4a, 0x4a4a44, 0x2c2c2c, 0x2c2c44, 0x595959, 
  0x595944, 0x3b3b3b, 0x3b3b44, (1U<<31) | 8503, (1U<<31) | 8494, 0x4a4a4a, 0x4a4a44, 0x2c2c2c, 
  0x2c2c44, 0x3b3b3b, 0x3b3b44, 0x4a4a4a, 0x4a4a44, 0x2c2c2c, 0x2c2c44, 0x3b3b3b, 
  0x3b3b44, 0x4a4a4a, 0x4a4a44, 0x42c5, 0x4595, 0x43b5, 0x44a5, 0x47a4a, 
  0x47a4a, 0x595959, 0x2c4, 0x595959, (1U<<31) | 8503, 0x4a4a4a, 0x595959, (1U<<31) | 8503, 
  0x4a4a4a, 0x2c2c, 0x5959, 0x3b3b, (1U<<31) | 8496, 0x4a4a, 0x7a7a, 0x4595959, 
  0x4595959, 0x42c2c59, 0x42c2c59, 0x43b3b59, 0x43b3b59, 0x44a4a59, 0x44a4a59, 0x2c4, 
  0x594, 0x3b4, (1U<<31) | 8481, 0x4a4, 0x2c59, 0x2c4a, (1U<<31) | 6086, 0x3b59, 
  0x3b4a, 0x4a59, 0x2c2c, (1U<<31) | 5936, 0x442c2c, 0x442c2c, 0x2c42c2c, 0x2c42c2c, 
  0x455959, 0x555959, 0x555959, 0x443b3b, 0x443b3b, 0x3b43b3b, 0x3b43b3b, 0x444a4a, 
  0x444a4a, 0x444a4a, 0x4a44a4a, 0x4a44a4a, 0x7a7a, 0x7a7a7a7a, 0x7a7a7a, 0x2c2c2c, 
  0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x3b3b3b3b, 
  0x3b3b3b3b, 0x7a7a7a, 0x2c2c2c, 0x595959, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x595959, 
  0x3b3b3b, 0x4a4a4a, 0x3b3b3b3b, (1U<<31) | 8485, 0x4a2c2c4a, 0x4a3b3b4a, 0x4a3b3b4a, 0x4a2c2c4a, 
  (1U<<31) | 8485, 0x4a3b3b4a, 0x4a3b3b4a, 0x2c2c3b, (1U<<31) | 6079, 0x3b3b4a, 0x4a4a59, 0x2c2c3b, 
  (1U<<31) | 6079, 0x3b3b4a, 0x4a4a59, 0x595959, 0x4a4a4a, 0x595959, 0x4a4a4a, 0x2c2c3b, 
  (1U<<31) | 6079, 0x3b3b4a, 0x4a4a59, 0x2c2c3b, (1U<<31) | 6079, 0x3b3b4a, 0x4a4a59, 0x7a7a7a7a, 
  0x595959, 0x2c4a4a4a, 0x595959, 0x4a4a3b, 0x59594a, 0x59594a, 0x3b3b2c, 0x3b3b2c, 
  0x4a4a3b, 0x4a4a3b, 0x59594a, 0x3b3b2c, 0x4a4a3b, 0x5959, (1U<<31) | 8496, 0x4a4a, 
  0x7a7a, 0x7a7a, 0x7a7a, 0x7a7a, 0x7a7a, 0x2c2c2c, 0x595959, 0x59595959, 
  0x595959, 0x3b3b3b, (1U<<31) | 8501, (1U<<31) | 8503, 0x4a4a4a, 0x4a4a4a4a, 0x4a4a4a, 0x7a7a, 
  0x4a4a4a4a, 0x4a4a4a, 0x2c2c2c, 0x42c2c2c, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x4a4a4a, 
  0x4a4a4a, 0x2c2c2c, 0x3b3b3b, 0x4a4a4a, 0x2c2c2c, 0x42c2c2c, 0x3b3b3b, 0x4a4a4a, 
  0x2c2c2c, 0x4a4a4a, 0x2c2c, 0x2c44, 0x2c2c, 0x2c44, 0x3b3b, 0x3b44, 
  0x3b3b, 0x3b44, (1U<<31) | 8503, 0x4a4a4a, (1U<<31) | 8501, (1U<<31) | 8501, 0x2c2c2c, 0x3b3b3b, 
  0x4a4a4a, 0x2c2c2c, 0x3b3b3b, 0x4a4a4a, 0x4a4a4a, 0x4a2c4a, 0x4a3b4a, 0x4a2c4a, 
  0x4a4a4a, 0x3b4a, 0x2c3b, 0x3b4a, 0x4a59, 0x3b4a, 0x2c3b, 0x3b4a, 
  0x4a59, 0x555, 0x1f0, 0x555, 0x555, 0x555, 0x2e0, 0x2e0, 
  0x2e0, 0x2e0, 0x2e0, 0x2e0, 0x2e0, 0x42e0, 0x2e0, 0x42e0, 
  0x2e0, 0x2e0, 0x555, 0x555, (1U<<31) | 8517, 0x444, 0x444, 0x0, 
  (1U<<31) | 8516, 0x5, 0x5, 0x5, 0x5, 0x0, 0x0, (1U<<31) | 788, 
  (1U<<31) | 781, (1U<<31) | 332, (1U<<31) | 372, (1U<<31) | 327, (1U<<31) | 327, (1U<<31) | 329, (1U<<31) | 8517, 0x555, 
  0x555, 0x55, 0x8, (1U<<31) | 8510, (1U<<31) | 6184, 0x50, 0x50, 0x50, 
  0x50, 0x88, 0x48, (1U<<31) | 8518, (1U<<31) | 8517, 0x0, 0x44, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x44, 0x4, 0x44, 0x4, 0x4, 
  0x44, 0x4, (1U<<31) | 8513, 0x44, 0x4, 0x5, 0x2e89, 0x2e89, 
  0x52e4a, 0x52e4a, 0x2e4a, 0x2e4a, 0x2e890, 0x2e890, 0x52e4a0, 0x52e4a0, 
  0x2e4a0, 0x2e4a0, 0x888, 0x888, 0x898959, 0x898944, 0x7a7a4a, 0x7a7a44, 
  0x898959, 0x898944, 0x7a7a4a, 0x7a7a44, 0x898959, 0x898944, 0x7a7a4a, 0x7a7a44, 
  0x2c2c, 0x897a, 0x894a, 0x894a, 0x3b7a, 0x2c2c, 0x7a89, 0x7a7a, 
  0x597a, 0x4a89, 0x597a, 0x4a89, 0x898989, 0x7a7a7a, 0x595989, 0x4a4a7a, 
  0x898989, 0x7a7a7a, 0x898989, 0x7a7a7a, 0x8989, 0x8989, 0x7a7a, 0x7a7a, 
  0x8989, 0x7a7a, 0x89894, 0x7a7a4, 0x42c4, 0x894, 0x7a4, 0x48959, 
  0x47a4a, 0x8959, 0x7a4a, 0x8959, 0x7a4a, 0x2c2c2c2c, 0x59595959, 0x3b3b3b3b, 
  0x4a4a4a4a, (1U<<31) | 4907, 0x45959, 0x42c2c, 0x45959, 0x43b3b, 0x44a4a, 0x4594a4a, 
  0x4a4a4a, (1U<<31) | 1822, 0x7a7a, (1U<<31) | 3579, (1U<<31) | 3579, 0x7a7a7, 0x0, (1U<<31) | 672, 
  0x70, 0x44a4a0, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x7f2f, 0x7f2f, 0x4447a0, 0x447a0, (1U<<31) | 3579, (1U<<31) | 3579, (1U<<31) | 3579, 
  (1U<<31) | 3579, (1U<<31) | 3552, (1U<<31) | 3579, (1U<<31) | 3579, (1U<<31) | 3552, 0x4444f4, 0x5554f5, 0x44444f4, 
  0x55554f5, 0x44444f4, 0x55554f5, 0x4444f4, 0x5554f5, 0x4444f4, 0x5554f5, 0x4444f4, 
  0x5554f5, 0x4444f4, 0x5554f5, 0x4444f4, 0x5554f5, 0x44444f4, 0x55554f5, 0x4, 
  0x4, 0x42e4, 0x5e50, 0x40, 0x40, 0x50, 0x42e4, 0x42e4, 
  0x42e0, 0x52f4, 0x4, 0x2c2c2c, 0x2c2c2c2c, 0x4a4a4a, 0x595959, 0x3b3b3b, 
  0x2c2c2c, 0x2c2c2c2c, 0x2c2c2c, 0x2c2c2c, 0x4a4a4a, 0x595959, 0x3b3b3b, 0x2c2c2c, 
  0x4a4a4a, 0x595959, 0x3b3b3b, 0x2c2c59, (1U<<31) | 810, (1U<<31) | 5475, (1U<<31) | 6033, (1U<<31) | 1028, 
  (1U<<31) | 810, (1U<<31) | 5475, (1U<<31) | 6033, (1U<<31) | 1028, (1U<<31) | 810, (1U<<31) | 5475, (1U<<31) | 6033, (1U<<31) | 1028, 
  0x4a4a4a, (1U<<31) | 1822, (1U<<31) | 4454, (1U<<31) | 4907, (1U<<31) | 1965, 0x42c2c, 0x44a4a, 0x45959, 
  0x43b3b, 0x2c2c2c, 0x4a4a4a, 0x595959, 0x3b3b3b, 0x42c2c2c, (1U<<31) | 1844, 0x44a4a4a, 
  (1U<<31) | 4432, 0x43b3b3b, (1U<<31) | 1987, 0x42c2c2c, (1U<<31) | 1844, 0x44a4a4a, (1U<<31) | 4432, 0x43b3b3b, 
  (1U<<31) | 1987, (1U<<31) | 7651, (1U<<31) | 7070, (1U<<31) | 7651, (1U<<31) | 7651, (1U<<31) | 7070, (1U<<31) | 7070, 0x2c2c2c, 
  (1U<<31) | 810, 0x4a4a4a, (1U<<31) | 5475, 0x3b3b3b, (1U<<31) | 1028, 0x2c2c2c, (1U<<31) | 810, 0x4a4a4a, 
  (1U<<31) | 5475, 0x3b3b3b, (1U<<31) | 1028, 0x2c2c2c, (1U<<31) | 810, 0x4a4a4a, (1U<<31) | 5475, 0x3b3b3b, 
  (1U<<31) | 1028, 0x2c2c2c, (1U<<31) | 810, 0x4a4a4a, (1U<<31) | 5475, 0x3b3b3b, (1U<<31) | 1028, 0x448989, 
  0x447a7a, 0x4898989, 0x47a7a7a, 0x4898989, 0x47a7a7a, (1U<<31) | 5305, (1U<<31) | 5051, 0x3b2c2c3b, 
  0x594a4a59, 0x2c59592c, 0x4a3b3b4a, 0x2c2c3b, 0x4a4a59, 0x59592c, 0x3b3b4a, 0x2c2c, 
  (1U<<31) | 830, 0x4a4a, (1U<<31) | 5449, 0x3b3b, (1U<<31) | 1037, 0x42e2c, 0x2e42c, 0x2e42c, 
  0x3b2c2c3b, 0x594a4a59, 0x4a3b3b4a, 0x2c2c2c2c, 0x4a4a4a4a, 0x3b3b3b3b, 0x3b2c2c3b, 0x594a4a59, 
  0x4a3b3b4a, 0x2c2c2c2c, 0x4a4a4a4a, 0x3b3b3b3b, 0x3b2c2c3b, 0x594a4a59, 0x4a3b3b4a, 0x3b2c2c3b, 
  0x594a4a59, 0x4a3b3b4a, 0x2c2c3b, 0x4a4a59, 0x3b3b4a, 0x2c2c2c, 0x4a4a4a, 0x3b3b3b, 
  0x2c2c3b, 0x4a4a59, 0x3b3b4a, 0x2c2c2c, 0x4a4a4a, 0x3b3b3b, 0x2c2c3b, 0x4a4a59, 
  0x3b3b4a, 0x2c2c3b, 0x4a4a59, 0x3b3b4a, (1U<<31) | 1854, 0x4595959, 0x2c2c2c2c, 0x4a4a3b, 
  (1U<<31) | 5466, 0x59594a, (1U<<31) | 6002, 0x3b3b2c, (1U<<31) | 1019, 0x4a4a3b, (1U<<31) | 5466, 0x59594a, 
  (1U<<31) | 6002, 0x3b3b2c, (1U<<31) | 1019, 0x2c2c2c2c, 0x2c2c2c2c, 0x2c2c2c, 0x4a4a4a, 0x595959, 
  0x3b3b3b, 0x2c2c2c, 0x2c2c2c, 0x2c2c2c, 0x42c2c2c, 0x42c2c2c, 0x2c2c2c, 0x2c2c2c, 
  0x2c2c2c, 0x42c2c2c, 0x2c2c2c, 0x2c2c2c, 0x2e42c0, (1U<<31) | 1822, (1U<<31) | 1832, (1U<<31) | 4454, 
  (1U<<31) | 4442, (1U<<31) | 1965, (1U<<31) | 1975, (1U<<31) | 1822, (1U<<31) | 1832, (1U<<31) | 4454, (1U<<31) | 4442, (1U<<31) | 1965, 
  (1U<<31) | 1975, 0x2e42c0, (1U<<31) | 799, (1U<<31) | 837, (1U<<31) | 819, (1U<<31) | 799, (1U<<31) | 837, (1U<<31) | 819, 
  0x2c2c4a, 0x4a4a59, 0x3b3b59, 0x3b3b4a, 0x4a4a2c, 0x59592c, 0x2c2c4, 0x2c3b, 
  0x4a59, 0x3b4a, 0x2c3b, 0x4a59, 0x2c3b, 0x4a59, 0x3b4a, 0x3b4a, 
  0x2c3b, 0x4a59, 0x3b4a, 0x3f4, 0x3f4, 0x44e4, 0x544e4, 0x555e4, 
  0x7f7f3f, 0x3f4, 0x7f7f7f3f, 0x7f3f, 0x3b3b4a, 0x2e, 0x7f3f, (1U<<31) | 8193, 
  (1U<<31) | 8188, (1U<<31) | 5927, 0x43b3e3b, 0x44a4e4a, 0x4e4a, 0x4595e59, 0x5e59, 0x42c2e2c, 
  0x2e, 0x7f41f, 0x41f, 0xffbf3f, 0xffbf3f, 0x7f3f, 0x7f7f3f, 0x7f7f3f, 
  0x2c2c, 0x3b3b3b, 0x7f7f7f3f, 0x7f7f7f3f, 0x0, (1U<<31) | 3484, 0x43b3e0, 0x44a4e0, 
  0x4595e0, 0x42c2e0, 0x7f7f3f, 0x7f7f3f, 0x2c2c2c, 0x2e40, 0x1f, 0x2e, 
  0x1f, 0x7f3f, 0xaf1f, 0xaf1f, 0xaf1f, 0xaf1f, (1U<<31) | 8177, (1U<<31) | 8174, 
  (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, 
  (1U<<31) | 8174, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8174, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8174, 
  (1U<<31) | 8177, (1U<<31) | 8174, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8174, (1U<<31) | 8174, (1U<<31) | 3423, (1U<<31) | 5967, 
  (1U<<31) | 953, (1U<<31) | 953, (1U<<31) | 6042, (1U<<31) | 6042, (1U<<31) | 953, (1U<<31) | 953, (1U<<31) | 6042, (1U<<31) | 6042, 
  0x595959, 0x5a5a5a, 0x5b5b5b, 0x595959, 0x5a5a5a, 0x5b5b5b, 0x595959, 0x5a5a5a, 
  0x5b5b5b, 0x595959, 0x5a5a5a, 0x5b5b5b, 0x5959, 0x25959, 0x8a8a8a, 0x7b7b7b, 
  (1U<<31) | 7721, 0x7b7b7b7b, 0x28a8a8a, 0x27b7b7b, 0x8a7a, 0x8a4a, 0x7b4b, 0x8a4a, 
  0x7b4b, 0x27b7b7b, 0x8a8a8a, 0x7b7b7b, 0x8a8a8a, 0x7b7b7b, 0x2e2d, 0x592e89, 
  0x5a2e8a, 0x4a2e7a, 0x4b2e7b, 0x89592e0, 0x8a5a2e0, 0x7a4a2e0, 0x7b4b2e0, 0x8a8a8a, 
  0x7b7b7b, 0x8a8a8a, 0x7b7b7b, 0x8a4, 0x7b4, 0x5a5a4, 0x5a5a4, 0x5a5a4, 
  0x7b7b, 0x48a8a, 0x47b7b, 0x7b7b, 0x598989, 0x5a8a8a, 0x4a7a7a, 0x4b7b7b, 
  0x89894, 0x8a8a4, 0x7a7a4, 0x7b7b4, 0x89894, 0x8a8a4, 0x7a7a4, 0x7b7b4, 
  0x89894, 0x8a8a4, 0x7a7a4, 0x7b7b4, 0x0, 0x0, (1U<<31) | 442, (1U<<31) | 488, 
  (1U<<31) | 687, (1U<<31) | 732, (1U<<31) | 593, (1U<<31) | 650, (1U<<31) | 514, (1U<<31) | 548, (1U<<31) | 454, (1U<<31) | 466, 
  (1U<<31) | 699, (1U<<31) | 744, (1U<<31) | 605, (1U<<31) | 617, (1U<<31) | 526, (1U<<31) | 560, 0x4a2e4a, 0x4b2e4b, 
  0x592e59, 0x5a2e5a, 0x4a4a2e0, 0x4b4b2e0, 0x59592e0, 0x5a5a2e0, 0x22d2d3c, 0x4b4b3c, 
  0x3c3c2d, 0x4b4b3c, 0x3c3c2d, 0x2d2d2d, 0x3c3c3c, 0x2d2d2d2d, 0x4b4b4b, 0x4b7b7b, 
  0x4b4b4b, 0x3c3c3c, 0x3c3c3c, 0x4b4b4b, 0x3c3c3c, 0x3c3c3c, 0x2d2d3c, 0x3c3c4b, 
  0x2d4, 0x3c3c3c, 0x3c3c3c, 0x3c3c3c, 0x2d2d5a, 0x2d2d2d, 0x2d2d2d, 0x4b4b4b, 
  0x3c3c3c, 0x4a4b4b, 0x595a5a, 0x3b3c3c, 0x44b4b, 0x45a5a, 0x43c3c, 0x4a4a4a, 
  0x4b4b4b, 0x595959, 0x5a5a5a, 0x4a4b4b, 0x3b3c3c, 0x44b4b, 0x43c3c, 0x4a4a4a, 
  0x4b4b4b, 0x4a4b4b, 0x595a5a, 0x3b3c3c, 0x44b4b, 0x45a5a, 0x43c3c, 0x4a4a4a, 
  0x4b4b4b, 0x595959, 0x5a5a5a, 0x48b8b8b, 0x47c7c7c, 0x259, 0x25a, 0x25b, 
  0x34a, 0x34b, 0x34c, 0x4a4a, 0x4b4b, 0x4c4c, 0x5959, 0x5a5a, 
  0x5b5b, 0x458989, 0x447a7a, 0x457a7a, 0x4894, 0x4895, 0x4894, 0x4895, 
  0x47a4, 0x47a5, 0x47a4, 0x47a5, 0x447a7a, 0x458989, 0x457a7a, 0x42c2c3b, 
  0x42d2d3c, (1U<<31) | 1900, 0x48b8b8b, 0x47c7c7c, 0x428b8b8b, 0x437c7c7c, 0x48919, 0x48a1a, 
  0x48b1b, 0x47a1a, 0x47b1b, 0x47c1c, (1U<<31) | 1588, (1U<<31) | 1920, (1U<<31) | 1566, (1U<<31) | 1931, 
  (1U<<31) | 1720, (1U<<31) | 1687, (1U<<31) | 1698, (1U<<31) | 1709, (1U<<31) | 1632, (1U<<31) | 1610, (1U<<31) | 1676, (1U<<31) | 1654, 
  (1U<<31) | 1621, (1U<<31) | 1599, (1U<<31) | 1665, (1U<<31) | 1643, (1U<<31) | 1533, (1U<<31) | 1500, (1U<<31) | 1544, (1U<<31) | 1511, 
  (1U<<31) | 1522, (1U<<31) | 1489, (1U<<31) | 1577, (1U<<31) | 1555, 0x442e4b20, 0x442e4c30, 0x442e5b20, 0x442e5b20, 
  0x1b1b1b, 0x1d1d1d, (1U<<31) | 280, 0x1c1c1c, 0x1b1b4, 0x1d1d4, (1U<<31) | 287, 0x1c1c4, 
  0x1b1b4, 0x1d1d4, (1U<<31) | 287, 0x1c1c4, (1U<<31) | 1788, (1U<<31) | 1743, (1U<<31) | 197, (1U<<31) | 237, 
  (1U<<31) | 1290, (1U<<31) | 227, (1U<<31) | 247, (1U<<31) | 1397, 0x42489892, 0x4247a7a2, (1U<<31) | 105, 0x24a894a, 
  0x424b8b4b, 0x27a897a, 0x427b8b7b, 0x2598959, 0x25a8a5a, 0x425b8b5b, 0x24a894a, 0x24a8a4a, 
  0x424b8b4b, 0x2598959, 0x25a8a5a, 0x425b8b5b, 0x24a7a4a, 0x24b7b4b, 0x434c7c4c, 0x428b7b8b, 
  0x2597a59, 0x25a7a5a, 0x425b7b5b, 0x24a7a4a, 0x24b7b4b, 0x434c7c4c, 0x2597a59, 0x25a7a5a, 
  0x425b7b5b, 0x27a597a, (1U<<31) | 1754, (1U<<31) | 1777, 0x24a894a, 0x424b8b4b, 0x2598959, 0x25a8a5a, 
  0x425b8b5b, 0x24a894a, 0x24a8a4a, 0x424b8b4b, 0x2598959, 0x25a8a5a, 0x425b8b5b, 0x434c7c4c, 
  0x2597a59, 0x25a7a5a, 0x425b7b5b, 0x24a7a4a, 0x24b7b4b, 0x434c7c4c, 0x2597a59, 0x25a7a5a, 
  0x425b7b5b, 0x27a597a, (1U<<31) | 1788, (1U<<31) | 1743, (1U<<31) | 105, (1U<<31) | 420, (1U<<31) | 431, (1U<<31) | 1477, 
  (1U<<31) | 398, (1U<<31) | 409, (1U<<31) | 1908, (1U<<31) | 1465, (1U<<31) | 1453, 0x24892, 0x247a2, (1U<<31) | 1337, 
  (1U<<31) | 1408, (1U<<31) | 1313, (1U<<31) | 1420, (1U<<31) | 1385, (1U<<31) | 1349, (1U<<31) | 1361, (1U<<31) | 1373, (1U<<31) | 1182, 
  (1U<<31) | 1158, (1U<<31) | 1278, (1U<<31) | 1254, (1U<<31) | 1170, (1U<<31) | 1146, (1U<<31) | 1266, (1U<<31) | 1242, (1U<<31) | 1134, 
  (1U<<31) | 1122, (1U<<31) | 1230, (1U<<31) | 1206, (1U<<31) | 1218, (1U<<31) | 1194, (1U<<31) | 1325, (1U<<31) | 1301, 0x2898989, 
  0x28a8a8a, 0x428b8b8b, 0x27a7a7a, 0x27b7b7b, 0x437c7c7c, (1U<<31) | 1788, (1U<<31) | 1743, 0x28948989, 
  0x28a48a8a, (1U<<31) | 1801, 0x27a47a7a, 0x27b47b7b, (1U<<31) | 1944, (1U<<31) | 1765, (1U<<31) | 1731, (1U<<31) | 1788, 
  (1U<<31) | 1743, (1U<<31) | 1788, (1U<<31) | 1743, (1U<<31) | 1788, (1U<<31) | 1743, 0x22c4a2c, 0x22c4b2c, 0x32c4c2c, 
  0x24a2e0, 0x24b2e0, 0x34c2e0, 0x23b4a3b, 0x23b4b3b, 0x33c4c3c, 0x24a2e0, 0x24b2e0, 
  0x34c2e0, 0x22c592c, 0x22c5a2c, 0x22c5b2c, 0x2592e0, 0x25a2e0, 0x25b2e0, 0x24a594a, 
  0x2592e0, 0x25a2e0, 0x25b2e0, 0x23b593b, 0x23b5a3b, 0x23b5b3b, 0x2592e0, 0x25a2e0, 
  0x25b2e0, 0x22c3b2c, 0x23b2e0, 0x33c2e0, 0x43d2e0, 0x22c4a2c, 0x22c4b2c, 0x32c4c2c, 
  0x24a2e0, 0x24b2e0, 0x34c2e0, 0x23b4a3b, 0x23b4b3b, 0x33c4c3c, 0x24a2e0, 0x24b2e0, 
  0x34c2e0, 0x22c592c, 0x22c5a2c, 0x22c5b2c, 0x2592e0, 0x25a2e0, 0x25b2e0, 0x24a594a, 
  0x24a5a4a, 0x24b5b4b, 0x2592e0, 0x25a2e0, 0x25b2e0, 0x23b593b, 0x23b5a3b, 0x23b5b3b, 
  0x2592e0, 0x25a2e0, 0x25b2e0, 0x22c3b2c, 0x32c3c2c, 0x42d3d2d, 0x23b2e0, 0x33c2e0, 
  0x43d2e0, 0x22c4a2c, 0x22c4b2c, 0x32c4c2c, 0x24a2e0, 0x24b2e0, 0x34c2e0, 0x23b4a3b, 
  0x23b4b3b, 0x33c4c3c, 0x24a2e0, 0x24b2e0, 0x34c2e0, 0x22c592c, 0x22c5a2c, 0x22c5b2c, 
  0x2592e0, 0x25a2e0, 0x25b2e0, 0x24a594a, 0x24a5a4a, 0x24b5b4b, 0x2592e0, 0x25a2e0, 
  0x25b2e0, 0x23b593b, 0x23b5a3b, 0x23b5b3b, 0x2592e0, 0x25a2e0, 0x25b2e0, 0x22c3b2c, 
  0x32c3c2c, 0x42d3d2d, 0x23b2e0, 0x33c2e0, 0x43d2e0, (1U<<31) | 676, (1U<<31) | 721, (1U<<31) | 1799, 
  (1U<<31) | 582, (1U<<31) | 639, (1U<<31) | 1942, (1U<<31) | 3442, (1U<<31) | 3430, 0x28948989, 0x28a48a8a, (1U<<31) | 1801, 
  0x27a47a7a, 0x27b47b7b, (1U<<31) | 1944, (1U<<31) | 3442, (1U<<31) | 3430, 0x28948989, 0x28a48a8a, (1U<<31) | 1801, 
  0x27a47a7a, 0x27b47b7b, (1U<<31) | 1944, (1U<<31) | 3442, (1U<<31) | 3430, (1U<<31) | 711, (1U<<31) | 756, (1U<<31) | 1811, 
  (1U<<31) | 629, (1U<<31) | 662, (1U<<31) | 1954, (1U<<31) | 1788, (1U<<31) | 1743, (1U<<31) | 5397, (1U<<31) | 4566, (1U<<31) | 4969, 
  (1U<<31) | 5164, (1U<<31) | 5418, (1U<<31) | 4537, (1U<<31) | 4990, (1U<<31) | 5143, (1U<<31) | 5334, (1U<<31) | 4886, (1U<<31) | 5376, 
  (1U<<31) | 4938, (1U<<31) | 5080, (1U<<31) | 4464, (1U<<31) | 5101, (1U<<31) | 4485, (1U<<31) | 5313, (1U<<31) | 4865, (1U<<31) | 5355, 
  (1U<<31) | 4917, (1U<<31) | 5059, (1U<<31) | 4411, (1U<<31) | 5122, (1U<<31) | 4506, (1U<<31) | 1788, (1U<<31) | 1743, (1U<<31) | 1788, 
  (1U<<31) | 1743, 0x437c3c7c, 0x23b47a3b, 0x23b47b3b, 0x33c47c3c, (1U<<31) | 420, (1U<<31) | 431, (1U<<31) | 1477, 
  (1U<<31) | 398, (1U<<31) | 409, (1U<<31) | 1908, (1U<<31) | 1465, (1U<<31) | 1453, 0x48b8b8b, 0x47c7c7c, 0x48b8b8b, 
  0x47c7c7c, 0x48b8b8b, 0x47c7c7c, 0x4c4c3d, (1U<<31) | 1044, 0x4c4c3d, (1U<<31) | 1044, (1U<<31) | 983, 
  0x3d3d3d, 0x5a8a8a, 0x5b8b8b, 0x5a5a5a, 0x5b5b5b, 0x3b3b3b, 0x3c3c3c, 0x3d3d3d, 
  0x2c2c2c, 0x2d2d2d, (1U<<31) | 983, 0x4c7c7c, 0x4c4c4c, (1U<<31) | 990, 0x3d3d4c, 0x3d3d3d, 
  0x3d3d3d, 0x3d3d3d, 0x2c2c2c, 0x2d2d2d, (1U<<31) | 983, (1U<<31) | 997, (1U<<31) | 983, 0x4a4c4c, 
  0x595b5b, 0x3b3d3d, 0x44c4c, 0x45b5b, 0x43d3d, 0x4c4c4c, 0x5b5b5b, 0x3b3b3b, 
  0x3c3c3c, 0x3d3d3d, 0x4a4c4c, 0x595959, 0x595a5a, 0x595b5b, 0x3b3d3d, 0x44c4c, 
  0x45959, 0x45a5a, 0x45b5b, 0x43d3d, 0x4c4c4c, 0x595959, 0x5a5a5a, 0x5b5b5b, 
  0x3b3b3b, 0x3c3c3c, 0x3d3d3d, 0x4a4c4c, 0x595b5b, 0x3b3d3d, 0x44c4c, 0x45b5b, 
  0x43d3d, 0x4c4c4c, 0x5b5b5b, 0x3b3b3b, 0x3c3c3c, 0x3d3d3d, (1U<<31) | 4454, (1U<<31) | 4527, 
  (1U<<31) | 4587, (1U<<31) | 4907, (1U<<31) | 4959, (1U<<31) | 5011, 0x2898989, 0x28a8a8a, 0x28b8b8b, 0x27a7a7a, 
  0x27b7b7b, 0x37c7c7c, (1U<<31) | 711, (1U<<31) | 629, 0x428b8b8b, 0x437c7c7c, (1U<<31) | 1788, (1U<<31) | 1743, 
  0x2898989, 0x28a8a8a, 0x28b8b8b, 0x27a7a7a, 0x27b7b7b, 0x37c7c7c, (1U<<31) | 711, (1U<<31) | 629, 
  0x428b8b8b, 0x437c7c7c, (1U<<31) | 1788, (1U<<31) | 1743, (1U<<31) | 5408, (1U<<31) | 4577, (1U<<31) | 4980, (1U<<31) | 5175, 
  (1U<<31) | 5429, (1U<<31) | 4548, (1U<<31) | 5001, (1U<<31) | 5154, (1U<<31) | 5345, (1U<<31) | 4897, (1U<<31) | 5387, (1U<<31) | 4949, 
  (1U<<31) | 5091, (1U<<31) | 4475, (1U<<31) | 5112, (1U<<31) | 4496, 0x442e4b20, 0x442e4c30, 0x442e5b20, 0x442e5b20, 
  (1U<<31) | 5324, (1U<<31) | 4876, (1U<<31) | 5366, (1U<<31) | 4928, (1U<<31) | 5070, (1U<<31) | 4422, (1U<<31) | 5133, (1U<<31) | 4517, 
  0x49f2f, 0x48b8b, 0x47c7c, 0x48b8b8b, 0x47c7c7c, 0x49f2f, 0x4489894, 0x447a7a4, 
  0x4894, 0x4895, 0x4894, 0x4895, 0x47a4, 0x47a5, 0x47a4, 0x47a5, 
  0x47777, 0x48888, (1U<<31) | 5439, (1U<<31) | 5185, (1U<<31) | 5439, (1U<<31) | 5185, (1U<<31) | 5456, (1U<<31) | 5534, 
  (1U<<31) | 5569, (1U<<31) | 5992, (1U<<31) | 6150, (1U<<31) | 6160, 0x4a4a4a4a, 0x4b4b4b4b, 0x4c4c4c4c, 0x4a4a4a4a, 
  0x4b4b4b4b, 0x4c4c4c4c, 0x4a4a4a4a, 0x4b4b4b4b, 0x4c4c4c4c, 0x4a4a4a4a, 0x4b4b4b4b, 0x4c4c4c4c, 
  0x4a4a4a4a, 0x4b4b4b4b, 0x4c4c4c4c, 0x3b3b3b3b, 0x3c3c3c3c, 0x3d3d3d3d, (1U<<31) | 7642, (1U<<31) | 7712, 
  (1U<<31) | 7730, 0x7a4a7a7a, 0x7b4b7b7b, 0x7c4c7c7c, 0x59595959, 0x5a5a5a5a, 0x5b5b5b5b, 0x2c2c2c2c, 
  0x2d2d2d2d, (1U<<31) | 981, 0x5b8b8b, 0x4c7c7c, 0x59595959, 0x5a5a5a5a, 0x5b5b5b5b, 0x59595959, 
  0x5a5a5a5a, 0x5b5b5b5b, 0x2c2c1c, 0x2d2d1d, (1U<<31) | 974, 0x7a7a3b, 0x7b7b3c, 0x7c7c3d, 
  0x7b3b, 0x7c3c, 0x4a4a7a7a, 0x4b4b7b7b, 0x4c4c7c7c, 0x1a3b7a3b, 0x444, 0x555, 
  0x444, 0x555, 0x444, 0x555, 0x444, 0x555, 0x2e0, 0x2e0, 
  0x2e0, 0x2e0, 0x2e0, 0x42e0, 0x52e0, (1U<<31) | 5974, (1U<<31) | 6011, 0x2e2e2, 
  0x2e2e2, 0x4, 0x5, 0x40, 0x50, (1U<<31) | 7660, (1U<<31) | 7721, 0x7a7a7a7a, 
  0x7b7b7b7b, 0x2e0, 0x2e0, 0x2e0, 0x2e0, 0x40, 0x50, 0x20, 
  0x2e40, 0x2e0, 0x2e0, 0x45959590, 0x4442, 0x4452, 0x4440, 0x4450, 
  0x0, 0x0, (1U<<31) | 962, (1U<<31) | 8172, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, 
  (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 1004, 
  (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, 
  (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 5910, (1U<<31) | 4771, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, 
  (1U<<31) | 8177, (1U<<31) | 8159, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, 
  (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 5923, (1U<<31) | 5923, (1U<<31) | 5923, (1U<<31) | 8177, (1U<<31) | 8177, 
  (1U<<31) | 5923, (1U<<31) | 5923, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 5923, (1U<<31) | 5923, (1U<<31) | 5923, 
  (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, 
  (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, (1U<<31) | 8177, 0x442e0, 
  0x2e2e0, 0x4440, 0x2595959, 0x25a5a5a, 0x25b5b5b, 0x40, 0x50, 0x4, 
  0x5, 0x4, 0x5, 0x4, 0x4, 0x45, (1U<<31) | 2015, (1U<<31) | 4792, 
  (1U<<31) | 5021, (1U<<31) | 2015, (1U<<31) | 4792, (1U<<31) | 5021, 0x44, 0x55, 0x5, (1U<<31) | 5021, 
  0x2e0, 0x0, 0x2e0, 0x2e0, 0x2e2e, 0x0, 0x0, 0x4a4a4a, 
  0x4a4a4a, 0x4a4a4a, 0x24a4a4a, 0x4a4a4a, 0x4a4a4a, 0x4a4a4a4a, 0x2e, 0x27a7a7a, 
  0x27a7a7a, 0x7a7a4, 0x7a7a4, 0x7a7a4, 0x7a7a4, 0x7a7a4, 0x7a7a4, (1U<<31) | 7669, 
  (1U<<31) | 8168, (1U<<31) | 8162, (1U<<31) | 7079, 0x7a4, 0x7a5, (1U<<31) | 7669, (1U<<31) | 7079, 0x7a4, 
  0x7a5, 0x2e0, 0x7a7a7a, 0x7a7a7a, 0x7a7a7a, 0x7a7a7a, 0x7a4, (1U<<31) | 1005, 
  0x7a7a, 0x7a7a, 0x7a7a, 0x7a7a, 0x0, 0x2e0, 0x7a7a4, 0x7a7a4, 
  0x7a7a4, 0x7a7a4, 0x7a7a4, 0x7a7a4, 0x2e0, 0x2898989, 0x2898989, 0x89894, 
  0x89894, 0x89894, 0x89894, 0x89894, 0x89894, 0x894a, 0x897a, 0x7a4a, 
  0x894, 0x895, 0x897a7a, 0x894a, 0x7a4a, 0x894, 0x895, 0x0, 
  0x2e2c2c0, 0x898989, 0x898989, 0x0, 0x898989, 0x898989, 0x894, 0x4a4a3b, 
  0x3b3b2c, 0x3b3b2c, 0x0, 0x2c2c2c, 0x3b3b3b, 0x3b3b4a, 0x2c4, 0x3b3b3b, 
  0x3b3b3b, 0x2c2c59, 0x4a4a4a, 0x595959, 0x3b3b3b, 0x44a4a, 0x45959, 0x43b3b, 
  0x4a4a4a, 0x3b3b3b, 0x44a4a, 0x43b3b, 0x4a4a4a, 0x595959, 0x3b3b3b, 0x44a4a, 
  0x45959, 0x43b3b, 0x89894, 0x89894, 0x89894, 0x89894, 0x89894, 0x89894, 
  0x898989, 0x7a7a7a, 0x898989, 0x7a7a7a, 0x898989, 0x7a7a7a, 0x2e2c, 0x442e0, 
  0x440, (1U<<31) | 7660, 0x7a7a7a7a, 0x2898989, 0x27a7a7a, 0x27a7a7a, 0x22c2c3b, 0x4a4a3b, 
  0x2c2c2c2c, 0x3b3b, 0x59594, 0x59594, 0x59594, 0x48989, 0x47a7a, 0x4898989, 
  0x47a7a7a, 0x344, 0x444, 0x244, 0x555, 0x242c42c4, 0x242c42c4, 0x242c42c4, 
  0x242c42c4, 0x242c42c4, 0x242c42c4, (1U<<31) | 388, 0x22c2c4, 0x22c2c4, 0x22c2c4, 0x22c2c4, 
  0x22c2c4, 0x22c2c4, 0x22c2c2c, 0x2c5959, 0x225959, 0x595959, 0x22595959, (1U<<31) | 8174, 
  (1U<<31) | 8174, (1U<<31) | 8174, (1U<<31) | 8177, 0x4a4a4a, (1U<<31) | 8177, 0x3b3b3b, (1U<<31) | 8177, 0x3b3b3b, 
  (1U<<31) | 8177, 0x4a4a4a, (1U<<31) | 8177, 0x3b3b3b, (1U<<31) | 8177, 0x3b3b3b, (1U<<31) | 8177, 0x2c2c3b, 
  (1U<<31) | 8177, 0x3b3b3b, (1U<<31) | 8177, 0x2c2c2c, (1U<<31) | 8177, 0x2c2c2c, (1U<<31) | 8177, 0x4a4a4a, 
  (1U<<31) | 8177, 0x3b3b3b, 0x2e0, (1U<<31) | 3423, (1U<<31) | 5967, 0x444, 0x555, 0x2220, 
  0x2220, 0x2220, 0x2220, 0x2220, 0x52e20, 0x52e20, 0x0, 0x52e20, 
  0x20, 0x4442, 0x2e0, 0x4442, 0x47a3b, 0x47b3b, 0x22c2c2c, 0x22d2d2d, 
  (1U<<31) | 380, 0x22c2c2c, 0x22d2d2d, (1U<<31) | 380, 0x2c2c2c, 0x2d2d2d, (1U<<31) | 983, 0x0, 
  0x0, 0x40, 0x50, 0x40, 0x50, 0x40, 0x2e40, 0x2e50, 
  0x2e40, 0x2e50, 0x20, 0x4, 0x0, 0x45, 0x8989, 0x8a8a, 
  0x7a7a, 0x7b7b, 0x8989, 0x7a7a, (1U<<31) | 538, (1U<<31) | 572, (1U<<31) | 478, (1U<<31) | 500, 
  0x2c4a, 0x2c59, 0x2c3b, 0x4a59, 0x2c4a, 0x2c59, 0x2c3b, 0x4a59, 
  0x3b4a, 0x3b59, 0x3b4a, 0x3b59, 0x2c3b, 0x4a59, 0x3b4a, 0x4a4a4a4a, 
  0x594a4a59, 0x594a4a59, 0x4a4a4a4a, 0x594a4a59, 0x594a4a59, 0x4a3b3b4a, 0x3b3b3b3b, 0x4a3b3b4a, 
  0x3b3b3b3b, 0x4a3b3b4a, 0x4a3b3b4a, 0x2c2c2c2c, 0x2c2c2c, 0x4a4a4a, 0x595959, 0x3b3b3b, 
  0x2c2c2c, 0x4a4a4a, 0x595959, 0x3b3b3b, 0x0, 0x442e0, 0x442e0, 0x442e0, 
  0x442e0, 0x442e0, 0x442e0, 0x442e0, 0x442e0, 0x442e0, 0x442e0, 0x442e0, 
  0x442e0, 0x4440, 0x0, 0x4, 0x44, 0x2e2e, 0x44f0, 0x0, 
  0x4f0, 0x40, 0x4444, (1U<<31) | 3711, 0x4f0, 0x4f0, 0x4f4, 0x4f0, 
  0x4, 0x4, 0x4, 0x44, 0x44f, 0xcf4f, 0x4f4, 0x4f4, 
  0x4f4, 0x2e4f0, 0x2e4f0, 0x2e4f0, 0x2e4f0, 0x2e4f0, 0x44f4, 0x4f4, 
  0x4f0, 0x4f0, 0x44f0, 0x44f0, 0x44f4, 0x44f0, 0x4f4, 0x44f0, 
  0xcf4f0, 0x44f0, 0x2e4f0, 0x440, 0x44f0, 0x44f0, 0xcf4f0, 0x40, 
  0x44f0, 0x2e4f0, 0x444, 0x0, 0x4f0, 0x4f4, 0x4f4, 0x2e, 
  0x444, 0
};

static const unsigned char IIT_LongEncodingTable[] = {
  /* 0 */ 4, 27, 2, 4, 4, 4, 4, 1, 4, 1, 1, 0,
  /* 12 */ 0, 15, 0, 10, 4, 4, 4, 4, 4, 4, 4, 1, 1, 0,
  /* 26 */ 0, 15, 0, 10, 4, 4, 4, 1, 1, 0,
  /* 36 */ 0, 15, 2, 10, 4, 4, 4, 1, 1, 0,
  /* 46 */ 0, 4, 4, 15, 3, 15, 7, 1, 1, 0,
  /* 56 */ 0, 4, 4, 15, 0, 15, 7, 15, 7, 15, 7, 1, 1, 0,
  /* 70 */ 21, 1, 15, 1, 1, 0,
  /* 76 */ 0, 15, 3, 34, 1, 0, 4, 31, 3, 1, 0,
  /* 87 */ 0, 15, 3, 15, 12, 4, 31, 3, 1, 0,
  /* 97 */ 15, 3, 15, 7, 31, 3, 1, 0,
  /* 105 */ 15, 3, 15, 7, 15, 7, 31, 3, 1, 0,
  /* 115 */ 0, 15, 3, 33, 7, 31, 3, 1, 0,
  /* 124 */ 15, 1, 15, 7, 15, 7, 4, 4, 4, 1, 0,
  /* 135 */ 15, 1, 15, 7, 10, 4, 4, 4, 1, 0,
  /* 145 */ 15, 2, 15, 7, 10, 4, 4, 4, 1, 0,
  /* 155 */ 15, 0, 27, 3, 15, 7, 15, 7, 4, 4, 1, 0,
  /* 167 */ 15, 1, 15, 12, 15, 7, 4, 4, 1, 0,
  /* 177 */ 21, 15, 2, 1, 15, 7, 15, 7, 1, 0,
  /* 187 */ 15, 2, 15, 7, 15, 7, 15, 7, 1, 0,
  /* 197 */ 9, 1, 9, 8, 9, 8, 4, 9, 1, 0,
  /* 207 */ 10, 7, 10, 7, 11, 6, 4, 10, 1, 0,
  /* 217 */ 11, 6, 11, 6, 10, 7, 4, 10, 1, 0,
  /* 227 */ 10, 1, 10, 7, 10, 7, 4, 10, 1, 0,
  /* 237 */ 10, 1, 10, 8, 10, 8, 4, 10, 1, 0,
  /* 247 */ 11, 1, 11, 7, 11, 7, 4, 11, 1, 0,
  /* 257 */ 0, 43, 12, 1, 0,
  /* 262 */ 43, 12, 1, 43, 12, 1, 0,
  /* 269 */ 15, 3, 43, 12, 1, 0,
  /* 275 */ 0, 19, 15, 1, 0,
  /* 280 */ 16, 1, 16, 1, 16, 1, 0,
  /* 287 */ 4, 16, 1, 16, 1, 0,
  /* 293 */ 21, 12, 4, 16, 1, 12, 4, 12, 4, 16, 1, 0,
  /* 305 */ 12, 4, 12, 4, 12, 4, 16, 1, 0,
  /* 314 */ 0, 15, 4, 15, 12, 15, 17, 1, 0,
  /* 323 */ 2, 18, 1, 0,
  /* 327 */ 36, 1, 36, 1, 0,
  /* 332 */ 23, 12, 2, 12, 2, 12, 2, 12, 2, 36, 1, 0,
  /* 344 */ 47, 1, 47, 1, 47, 1, 0,
  /* 351 */ 21, 13, 4, 47, 1, 13, 4, 13, 4, 47, 1, 0,
  /* 363 */ 13, 4, 13, 4, 13, 4, 47, 1, 0,
  /* 372 */ 21, 12, 2, 12, 2, 50, 1, 0,
  /* 380 */ 16, 2, 16, 2, 16, 2, 2, 0,
  /* 388 */ 12, 2, 12, 2, 4, 12, 2, 4, 2, 0,
  /* 398 */ 10, 7, 10, 7, 10, 7, 10, 4, 4, 2, 0,
  /* 409 */ 11, 7, 11, 7, 11, 7, 11, 4, 4, 2, 0,
  /* 420 */ 9, 8, 9, 8, 9, 8, 9, 5, 4, 2, 0,
  /* 431 */ 10, 8, 10, 8, 10, 8, 10, 5, 4, 2, 0,
  /* 442 */ 10, 4, 10, 4, 14, 2, 10, 4, 10, 4, 2, 0,
  /* 454 */ 10, 4, 10, 4, 14, 2, 9, 5, 10, 4, 2, 0,
  /* 466 */ 10, 4, 10, 4, 14, 2, 10, 5, 10, 4, 2, 0,
  /* 478 */ 10, 7, 10, 7, 10, 7, 10, 4, 2, 0,
  /* 488 */ 11, 4, 11, 4, 14, 2, 11, 4, 11, 4, 2, 0,
  /* 500 */ 11, 7, 11, 7, 11, 7, 11, 4, 2, 0,
  /* 510 */ 27, 4, 2, 0,
  /* 514 */ 9, 5, 9, 5, 14, 2, 10, 4, 9, 5, 2, 0,
  /* 526 */ 9, 5, 9, 5, 14, 2, 9, 5, 9, 5, 2, 0,
  /* 538 */ 9, 8, 9, 8, 9, 8, 9, 5, 2, 0,
  /* 548 */ 10, 5, 10, 5, 14, 2, 10, 4, 10, 5, 2, 0,
  /* 560 */ 10, 5, 10, 5, 14, 2, 10, 5, 10, 5, 2, 0,
  /* 572 */ 10, 8, 10, 8, 10, 8, 10, 5, 2, 0,
  /* 582 */ 10, 7, 10, 7, 10, 7, 4, 10, 7, 2, 0,
  /* 593 */ 10, 7, 10, 7, 14, 2, 10, 4, 10, 7, 2, 0,
  /* 605 */ 10, 7, 10, 7, 14, 2, 9, 5, 10, 7, 2, 0,
  /* 617 */ 10, 7, 10, 7, 14, 2, 10, 5, 10, 7, 2, 0,
  /* 629 */ 10, 7, 10, 7, 10, 7, 10, 7, 2, 0,
  /* 639 */ 11, 7, 11, 7, 11, 7, 4, 11, 7, 2, 0,
  /* 650 */ 11, 7, 11, 7, 14, 2, 11, 4, 11, 7, 2, 0,
  /* 662 */ 11, 7, 11, 7, 11, 7, 11, 7, 2, 0,
  /* 672 */ 27, 7, 2, 0,
  /* 676 */ 9, 8, 9, 8, 9, 8, 4, 9, 8, 2, 0,
  /* 687 */ 9, 8, 9, 8, 14, 2, 10, 4, 9, 8, 2, 0,
  /* 699 */ 9, 8, 9, 8, 14, 2, 9, 5, 9, 8, 2, 0,
  /* 711 */ 9, 8, 9, 8, 9, 8, 9, 8, 2, 0,
  /* 721 */ 10, 8, 10, 8, 10, 8, 4, 10, 8, 2, 0,
  /* 732 */ 10, 8, 10, 8, 14, 2, 10, 4, 10, 8, 2, 0,
  /* 744 */ 10, 8, 10, 8, 14, 2, 10, 5, 10, 8, 2, 0,
  /* 756 */ 10, 8, 10, 8, 10, 8, 10, 8, 2, 0,
  /* 766 */ 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 0,
  /* 781 */ 50, 1, 12, 2, 12, 2, 0,
  /* 788 */ 36, 1, 12, 2, 12, 2, 12, 2, 12, 2, 0,
  /* 799 */ 21, 12, 2, 4, 12, 2, 12, 2, 12, 2, 0,
  /* 810 */ 21, 12, 2, 4, 12, 2, 12, 2, 0,
  /* 819 */ 21, 12, 2, 4, 11, 3, 11, 3, 12, 2, 0,
  /* 830 */ 21, 12, 2, 4, 12, 2, 0,
  /* 837 */ 21, 12, 2, 4, 10, 4, 10, 4, 12, 2, 0,
  /* 848 */ 43, 12, 2, 43, 12, 2, 43, 12, 2, 0,
  /* 858 */ 18, 4, 4, 14, 2, 14, 2, 14, 2, 14, 2, 0,
  /* 870 */ 18, 4, 14, 2, 14, 2, 14, 2, 0,
  /* 879 */ 21, 4, 14, 2, 14, 2, 4, 14, 2, 0,
  /* 889 */ 21, 5, 14, 2, 14, 2, 4, 14, 2, 0,
  /* 899 */ 21, 4, 14, 2, 14, 2, 4, 4, 14, 2, 0,
  /* 910 */ 21, 5, 14, 2, 14, 2, 4, 4, 14, 2, 0,
  /* 921 */ 14, 2, 14, 2, 4, 4, 4, 14, 2, 0,
  /* 931 */ 21, 4, 4, 14, 2, 0,
  /* 937 */ 14, 2, 14, 2, 4, 4, 5, 14, 2, 0,
  /* 947 */ 21, 5, 5, 14, 2, 0,
  /* 953 */ 21, 2, 9, 5, 9, 5, 14, 2, 0,
  /* 962 */ 0, 17, 17, 14, 2, 0,
  /* 968 */ 14, 2, 18, 14, 2, 0,
  /* 974 */ 16, 1, 16, 2, 16, 2, 0,
  /* 981 */ 16, 2, 16, 2, 16, 2, 16, 2, 0,
  /* 990 */ 13, 3, 16, 2, 16, 2, 0,
  /* 997 */ 11, 5, 16, 2, 16, 2, 0,
  /* 1004 */ 17, 17, 17, 2, 0,
  /* 1009 */ 0, 5, 4, 4, 4, 3, 3, 3, 3, 0,
  /* 1019 */ 21, 12, 2, 4, 11, 3, 11, 3, 0,
  /* 1028 */ 21, 11, 3, 4, 11, 3, 11, 3, 0,
  /* 1037 */ 21, 11, 3, 4, 11, 3, 0,
  /* 1044 */ 16, 2, 13, 3, 13, 3, 0,
  /* 1051 */ 5, 31, 3, 1, 15, 3, 0,
  /* 1058 */ 42, 7, 31, 3, 1, 15, 3, 0,
  /* 1066 */ 46, 7, 46, 7, 31, 3, 1, 15, 3, 0,
  /* 1076 */ 43, 12, 1, 15, 3, 0,
  /* 1082 */ 30, 7, 15, 3, 0,
  /* 1087 */ 42, 7, 31, 3, 1, 42, 7, 15, 3, 0,
  /* 1097 */ 42, 7, 42, 7, 15, 3, 0,
  /* 1104 */ 44, 7, 44, 7, 15, 3, 0,
  /* 1111 */ 15, 3, 15, 7, 15, 7, 31, 3, 1, 4, 0,
  /* 1122 */ 9, 5, 9, 5, 14, 2, 10, 4, 9, 1, 4, 0,
  /* 1134 */ 9, 8, 9, 8, 14, 2, 10, 4, 9, 1, 4, 0,
  /* 1146 */ 10, 4, 10, 4, 14, 2, 9, 5, 9, 1, 4, 0,
  /* 1158 */ 9, 5, 9, 5, 14, 2, 9, 5, 9, 1, 4, 0,
  /* 1170 */ 10, 7, 10, 7, 14, 2, 9, 5, 9, 1, 4, 0,
  /* 1182 */ 9, 8, 9, 8, 14, 2, 9, 5, 9, 1, 4, 0,
  /* 1194 */ 10, 4, 10, 4, 14, 2, 10, 4, 10, 1, 4, 0,
  /* 1206 */ 10, 5, 10, 5, 14, 2, 10, 4, 10, 1, 4, 0,
  /* 1218 */ 10, 7, 10, 7, 14, 2, 10, 4, 10, 1, 4, 0,
  /* 1230 */ 10, 8, 10, 8, 14, 2, 10, 4, 10, 1, 4, 0,
  /* 1242 */ 10, 4, 10, 4, 14, 2, 10, 5, 10, 1, 4, 0,
  /* 1254 */ 10, 5, 10, 5, 14, 2, 10, 5, 10, 1, 4, 0,
  /* 1266 */ 10, 7, 10, 7, 14, 2, 10, 5, 10, 1, 4, 0,
  /* 1278 */ 10, 8, 10, 8, 14, 2, 10, 5, 10, 1, 4, 0,
  /* 1290 */ 11, 1, 11, 8, 11, 8, 4, 11, 1, 4, 0,
  /* 1301 */ 11, 4, 11, 4, 14, 2, 11, 4, 11, 1, 4, 0,
  /* 1313 */ 11, 5, 11, 5, 14, 2, 11, 4, 11, 1, 4, 0,
  /* 1325 */ 11, 7, 11, 7, 14, 2, 11, 4, 11, 1, 4, 0,
  /* 1337 */ 11, 8, 11, 8, 14, 2, 11, 4, 11, 1, 4, 0,
  /* 1349 */ 11, 4, 11, 4, 14, 2, 11, 5, 11, 1, 4, 0,
  /* 1361 */ 11, 5, 11, 5, 14, 2, 11, 5, 11, 1, 4, 0,
  /* 1373 */ 11, 7, 11, 7, 14, 2, 11, 5, 11, 1, 4, 0,
  /* 1385 */ 11, 8, 11, 8, 14, 2, 11, 5, 11, 1, 4, 0,
  /* 1397 */ 12, 1, 12, 7, 12, 7, 4, 12, 1, 4, 0,
  /* 1408 */ 12, 4, 12, 4, 14, 2, 12, 4, 12, 1, 4, 0,
  /* 1420 */ 12, 7, 12, 7, 14, 2, 12, 4, 12, 1, 4, 0,
  /* 1432 */ 18, 15, 1, 4, 0,
  /* 1437 */ 12, 4, 12, 4, 16, 1, 4, 0,
  /* 1445 */ 13, 4, 13, 4, 47, 1, 4, 0,
  /* 1453 */ 10, 7, 10, 7, 10, 7, 10, 4, 4, 2, 4, 0,
  /* 1465 */ 9, 8, 9, 8, 9, 8, 9, 5, 4, 2, 4, 0,
  /* 1477 */ 11, 8, 11, 8, 11, 8, 11, 5, 4, 2, 4, 0,
  /* 1489 */ 10, 4, 10, 4, 14, 2, 10, 4, 2, 4, 0,
  /* 1500 */ 9, 5, 9, 5, 14, 2, 10, 4, 2, 4, 0,
  /* 1511 */ 10, 5, 10, 5, 14, 2, 10, 4, 2, 4, 0,
  /* 1522 */ 10, 7, 10, 7, 14, 2, 10, 4, 2, 4, 0,
  /* 1533 */ 9, 8, 9, 8, 14, 2, 10, 4, 2, 4, 0,
  /* 1544 */ 10, 8, 10, 8, 14, 2, 10, 4, 2, 4, 0,
  /* 1555 */ 11, 4, 11, 4, 14, 2, 11, 4, 2, 4, 0,
  /* 1566 */ 11, 5, 11, 5, 14, 2, 11, 4, 2, 4, 0,
  /* 1577 */ 11, 7, 11, 7, 14, 2, 11, 4, 2, 4, 0,
  /* 1588 */ 11, 8, 11, 8, 14, 2, 11, 4, 2, 4, 0,
  /* 1599 */ 10, 4, 10, 4, 14, 2, 9, 5, 2, 4, 0,
  /* 1610 */ 9, 5, 9, 5, 14, 2, 9, 5, 2, 4, 0,
  /* 1621 */ 10, 7, 10, 7, 14, 2, 9, 5, 2, 4, 0,
  /* 1632 */ 9, 8, 9, 8, 14, 2, 9, 5, 2, 4, 0,
  /* 1643 */ 10, 4, 10, 4, 14, 2, 10, 5, 2, 4, 0,
  /* 1654 */ 10, 5, 10, 5, 14, 2, 10, 5, 2, 4, 0,
  /* 1665 */ 10, 7, 10, 7, 14, 2, 10, 5, 2, 4, 0,
  /* 1676 */ 10, 8, 10, 8, 14, 2, 10, 5, 2, 4, 0,
  /* 1687 */ 11, 4, 11, 4, 14, 2, 11, 5, 2, 4, 0,
  /* 1698 */ 11, 5, 11, 5, 14, 2, 11, 5, 2, 4, 0,
  /* 1709 */ 11, 7, 11, 7, 14, 2, 11, 5, 2, 4, 0,
  /* 1720 */ 11, 8, 11, 8, 14, 2, 11, 5, 2, 4, 0,
  /* 1731 */ 10, 7, 10, 7, 10, 7, 4, 10, 7, 2, 4, 0,
  /* 1743 */ 10, 7, 10, 7, 10, 7, 10, 7, 2, 4, 0,
  /* 1754 */ 10, 7, 10, 7, 9, 8, 10, 7, 2, 4, 0,
  /* 1765 */ 9, 8, 9, 8, 9, 8, 4, 9, 8, 2, 4, 0,
  /* 1777 */ 9, 8, 9, 8, 10, 7, 9, 8, 2, 4, 0,
  /* 1788 */ 9, 8, 9, 8, 9, 8, 9, 8, 2, 4, 0,
  /* 1799 */ 11, 8, 11, 8, 11, 8, 4, 11, 8, 2, 4, 0,
  /* 1811 */ 11, 8, 11, 8, 11, 8, 11, 8, 2, 4, 0,
  /* 1822 */ 12, 2, 12, 2, 12, 2, 12, 2, 4, 0,
  /* 1832 */ 21, 12, 2, 4, 12, 2, 12, 2, 12, 2, 4, 0,
  /* 1844 */ 21, 12, 2, 4, 12, 2, 12, 2, 4, 0,
  /* 1854 */ 12, 2, 9, 5, 9, 5, 12, 2, 4, 0,
  /* 1864 */ 21, 4, 14, 2, 14, 2, 4, 0,
  /* 1872 */ 21, 5, 14, 2, 14, 2, 4, 0,
  /* 1880 */ 15, 1, 15, 7, 14, 2, 14, 2, 4, 0,
  /* 1890 */ 15, 4, 15, 7, 14, 2, 14, 2, 4, 0,
  /* 1900 */ 13, 3, 16, 2, 16, 2, 4, 0,
  /* 1908 */ 12, 7, 12, 7, 12, 7, 12, 4, 4, 3, 4, 0,
  /* 1920 */ 12, 4, 12, 4, 14, 2, 12, 4, 3, 4, 0,
  /* 1931 */ 12, 7, 12, 7, 14, 2, 12, 4, 3, 4, 0,
  /* 1942 */ 12, 7, 12, 7, 12, 7, 4, 12, 7, 3, 4, 0,
  /* 1954 */ 12, 7, 12, 7, 12, 7, 12, 7, 3, 4, 0,
  /* 1965 */ 11, 3, 11, 3, 11, 3, 11, 3, 4, 0,
  /* 1975 */ 21, 11, 3, 4, 11, 3, 11, 3, 11, 3, 4, 0,
  /* 1987 */ 21, 11, 3, 4, 11, 3, 11, 3, 4, 0,
  /* 1997 */ 0, 31, 3, 1, 14, 2, 15, 3, 4, 0,
  /* 2007 */ 44, 7, 44, 7, 15, 3, 4, 0,
  /* 2015 */ 21, 3, 4, 0,
  /* 2019 */ 0, 15, 3, 31, 3, 1, 33, 7, 31, 3, 4, 0,
  /* 2031 */ 15, 0, 4, 15, 10, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2044 */ 15, 0, 4, 4, 15, 10, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2058 */ 15, 0, 4, 7, 15, 10, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2072 */ 15, 0, 4, 4, 7, 15, 10, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2087 */ 15, 0, 4, 15, 10, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2102 */ 15, 0, 4, 4, 15, 10, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2118 */ 15, 0, 4, 7, 15, 10, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2134 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2151 */ 15, 0, 4, 15, 10, 15, 15, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2168 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2186 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2204 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2223 */ 15, 0, 4, 15, 10, 15, 15, 15, 15, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2242 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 15, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2262 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2282 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2303 */ 15, 0, 4, 15, 10, 7, 15, 18, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2319 */ 15, 0, 4, 4, 15, 10, 7, 15, 18, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2336 */ 15, 0, 4, 15, 10, 15, 18, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2351 */ 15, 0, 4, 4, 15, 10, 15, 18, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2367 */ 15, 0, 4, 15, 10, 15, 15, 15, 18, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2384 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 18, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2402 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 18, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2420 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 18, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2439 */ 15, 0, 4, 15, 10, 7, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2457 */ 15, 0, 4, 4, 15, 10, 7, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2476 */ 15, 0, 4, 15, 10, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2493 */ 15, 0, 4, 4, 15, 10, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2511 */ 15, 0, 4, 15, 10, 15, 15, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2530 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2550 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2570 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2591 */ 15, 0, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2614 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2638 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2662 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2687 */ 15, 0, 4, 15, 10, 7, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2707 */ 15, 0, 4, 4, 15, 10, 7, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2728 */ 15, 0, 4, 15, 10, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2747 */ 15, 0, 4, 4, 15, 10, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2767 */ 15, 0, 4, 15, 10, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2788 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2810 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2832 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2855 */ 15, 0, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2880 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2906 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2932 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2959 */ 15, 0, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 2988 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3018 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3048 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3079 */ 15, 0, 4, 15, 10, 7, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3101 */ 15, 0, 4, 4, 15, 10, 7, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3124 */ 15, 0, 4, 15, 10, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3145 */ 15, 0, 4, 4, 15, 10, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3167 */ 15, 0, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3194 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3222 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3250 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3279 */ 15, 0, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3310 */ 15, 0, 4, 4, 15, 10, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3342 */ 15, 0, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3374 */ 15, 0, 4, 4, 7, 15, 10, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 18, 15, 23, 15, 23, 15, 23, 11, 4, 10, 4, 1, 4, 4, 0,
  /* 3407 */ 21, 4, 1, 4, 4, 0,
  /* 3413 */ 0, 15, 3, 33, 7, 5, 1, 4, 4, 0,
  /* 3423 */ 21, 2, 4, 2, 4, 4, 0,
  /* 3430 */ 10, 7, 10, 7, 10, 7, 10, 7, 2, 4, 4, 0,
  /* 3442 */ 9, 8, 9, 8, 9, 8, 9, 8, 2, 4, 4, 0,
  /* 3454 */ 21, 4, 1, 4, 4, 4, 0,
  /* 3461 */ 21, 15, 3, 4, 4, 4, 0,
  /* 3468 */ 21, 4, 1, 4, 4, 4, 4, 0,
  /* 3476 */ 21, 15, 3, 4, 4, 4, 4, 0,
  /* 3484 */ 12, 2, 12, 2, 12, 2, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3507 */ 40, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3530 */ 40, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3552 */ 10, 4, 10, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3566 */ 0, 15, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3579 */ 10, 7, 10, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3593 */ 0, 15, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3605 */ 21, 4, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3615 */ 0, 5, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3625 */ 21, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 3634 */ 0, 15, 0, 10, 4, 4, 4, 4, 4, 4, 0,
  /* 3645 */ 15, 3, 15, 7, 15, 11, 4, 4, 4, 4, 4, 4, 0,
  /* 3658 */ 21, 4, 4, 4, 4, 4, 4, 0,
  /* 3666 */ 0, 15, 0, 10, 4, 4, 4, 4, 4, 0,
  /* 3676 */ 15, 0, 15, 7, 10, 4, 4, 4, 4, 4, 0,
  /* 3687 */ 15, 2, 15, 7, 10, 4, 4, 4, 4, 4, 0,
  /* 3698 */ 15, 1, 15, 7, 15, 7, 10, 4, 4, 4, 4, 4, 0,
  /* 3711 */ 21, 4, 4, 4, 4, 4, 0,
  /* 3718 */ 10, 4, 4, 4, 10, 4, 4, 4, 4, 0,
  /* 3728 */ 15, 0, 15, 7, 10, 4, 4, 4, 4, 0,
  /* 3738 */ 15, 2, 15, 7, 10, 4, 4, 4, 4, 0,
  /* 3748 */ 15, 1, 15, 7, 15, 7, 10, 4, 4, 4, 4, 0,
  /* 3760 */ 12, 4, 4, 4, 12, 4, 4, 4, 4, 0,
  /* 3770 */ 13, 4, 4, 4, 13, 4, 4, 4, 4, 0,
  /* 3780 */ 21, 4, 4, 4, 4, 0,
  /* 3786 */ 23, 3, 3, 3, 3, 5, 4, 4, 4, 0,
  /* 3796 */ 21, 3, 3, 5, 4, 4, 4, 0,
  /* 3804 */ 23, 4, 4, 4, 4, 5, 4, 4, 4, 0,
  /* 3814 */ 21, 4, 4, 5, 4, 4, 4, 0,
  /* 3822 */ 23, 4, 4, 4, 4, 5, 5, 4, 4, 4, 0,
  /* 3833 */ 21, 5, 5, 5, 4, 4, 4, 0,
  /* 3841 */ 23, 7, 7, 7, 7, 5, 5, 4, 4, 4, 0,
  /* 3852 */ 23, 7, 7, 7, 7, 5, 4, 4, 4, 0,
  /* 3862 */ 10, 7, 9, 3, 9, 3, 10, 7, 4, 4, 4, 0,
  /* 3874 */ 10, 7, 10, 6, 10, 6, 10, 7, 4, 4, 4, 0,
  /* 3886 */ 10, 7, 7, 7, 10, 7, 4, 4, 4, 0,
  /* 3896 */ 12, 7, 9, 3, 9, 3, 12, 7, 4, 4, 4, 0,
  /* 3908 */ 12, 7, 10, 6, 10, 6, 12, 7, 4, 4, 4, 0,
  /* 3920 */ 12, 7, 7, 7, 12, 7, 4, 4, 4, 0,
  /* 3930 */ 13, 7, 9, 3, 9, 3, 13, 7, 4, 4, 4, 0,
  /* 3942 */ 13, 7, 10, 6, 10, 6, 13, 7, 4, 4, 4, 0,
  /* 3954 */ 13, 7, 7, 7, 13, 7, 4, 4, 4, 0,
  /* 3964 */ 15, 3, 15, 7, 15, 7, 15, 7, 4, 4, 4, 0,
  /* 3976 */ 15, 0, 4, 15, 9, 11, 4, 4, 4, 0,
  /* 3986 */ 0, 15, 2, 4, 15, 9, 11, 4, 4, 4, 0,
  /* 3997 */ 15, 1, 15, 7, 15, 9, 11, 4, 4, 4, 0,
  /* 4008 */ 15, 1, 15, 7, 15, 7, 15, 9, 11, 4, 4, 4, 0,
  /* 4021 */ 15, 3, 15, 7, 15, 11, 4, 4, 4, 0,
  /* 4031 */ 15, 0, 4, 15, 9, 15, 15, 11, 4, 4, 4, 0,
  /* 4043 */ 0, 15, 2, 4, 15, 9, 15, 15, 11, 4, 4, 4, 0,
  /* 4056 */ 15, 1, 15, 7, 15, 9, 15, 15, 11, 4, 4, 4, 0,
  /* 4069 */ 15, 1, 15, 7, 15, 7, 15, 9, 15, 15, 11, 4, 4, 4, 0,
  /* 4084 */ 15, 0, 4, 15, 9, 15, 15, 15, 15, 11, 4, 4, 4, 0,
  /* 4098 */ 0, 15, 2, 4, 15, 9, 15, 15, 15, 15, 11, 4, 4, 4, 0,
  /* 4113 */ 15, 1, 15, 7, 15, 9, 15, 15, 15, 15, 11, 4, 4, 4, 0,
  /* 4128 */ 15, 1, 15, 7, 15, 7, 15, 9, 15, 15, 15, 15, 11, 4, 4, 4, 0,
  /* 4145 */ 15, 0, 4, 15, 9, 15, 15, 15, 15, 15, 15, 11, 4, 4, 4, 0,
  /* 4161 */ 0, 15, 2, 4, 15, 9, 15, 15, 15, 15, 15, 15, 11, 4, 4, 4, 0,
  /* 4178 */ 15, 1, 15, 7, 15, 9, 15, 15, 15, 15, 15, 15, 11, 4, 4, 4, 0,
  /* 4195 */ 15, 1, 15, 7, 15, 7, 15, 9, 15, 15, 15, 15, 15, 15, 11, 4, 4, 4, 0,
  /* 4214 */ 16, 4, 16, 4, 16, 4, 4, 4, 0,
  /* 4223 */ 15, 3, 15, 11, 15, 19, 4, 4, 4, 0,
  /* 4233 */ 15, 3, 15, 12, 15, 19, 4, 4, 4, 0,
  /* 4243 */ 23, 3, 3, 3, 3, 5, 4, 4, 0,
  /* 4252 */ 21, 3, 3, 5, 4, 4, 0,
  /* 4259 */ 23, 4, 4, 4, 4, 5, 4, 4, 0,
  /* 4268 */ 21, 4, 4, 5, 4, 4, 0,
  /* 4275 */ 23, 4, 4, 4, 4, 5, 5, 4, 4, 0,
  /* 4285 */ 21, 5, 5, 5, 4, 4, 0,
  /* 4292 */ 23, 7, 7, 7, 7, 5, 5, 4, 4, 0,
  /* 4302 */ 23, 7, 7, 7, 7, 5, 4, 4, 0,
  /* 4311 */ 21, 7, 1, 7, 4, 4, 0,
  /* 4318 */ 21, 7, 1, 4, 7, 4, 4, 0,
  /* 4326 */ 21, 4, 15, 3, 15, 7, 4, 4, 0,
  /* 4335 */ 15, 3, 15, 7, 15, 7, 15, 7, 4, 4, 0,
  /* 4346 */ 23, 15, 3, 15, 7, 15, 7, 15, 7, 15, 12, 15, 7, 15, 7, 15, 7, 15, 7, 4, 4, 0,
  /* 4368 */ 22, 15, 3, 15, 7, 15, 7, 15, 12, 15, 7, 15, 7, 15, 7, 4, 4, 0,
  /* 4386 */ 21, 15, 3, 15, 7, 15, 12, 15, 7, 15, 7, 4, 4, 0,
  /* 4400 */ 15, 3, 15, 7, 45, 7, 45, 7, 4, 4, 0,
  /* 4411 */ 0, 14, 2, 10, 1, 10, 4, 10, 4, 4, 0,
  /* 4422 */ 0, 14, 2, 2, 10, 4, 10, 4, 4, 0,
  /* 4432 */ 21, 10, 4, 4, 10, 4, 10, 4, 4, 0,
  /* 4442 */ 21, 10, 4, 4, 10, 4, 10, 4, 10, 4, 4, 0,
  /* 4454 */ 10, 4, 10, 4, 10, 4, 10, 4, 4, 0,
  /* 4464 */ 0, 14, 2, 9, 1, 9, 5, 10, 4, 4, 0,
  /* 4475 */ 0, 14, 2, 2, 9, 5, 10, 4, 4, 0,
  /* 4485 */ 0, 14, 2, 10, 1, 10, 5, 10, 4, 4, 0,
  /* 4496 */ 0, 14, 2, 2, 10, 5, 10, 4, 4, 0,
  /* 4506 */ 0, 14, 2, 11, 1, 11, 4, 11, 4, 4, 0,
  /* 4517 */ 0, 14, 2, 2, 11, 4, 11, 4, 4, 0,
  /* 4527 */ 11, 4, 11, 4, 11, 4, 11, 4, 4, 0,
  /* 4537 */ 0, 14, 2, 11, 1, 11, 5, 11, 4, 4, 0,
  /* 4548 */ 0, 14, 2, 2, 11, 5, 11, 4, 4, 0,
  /* 4558 */ 16, 1, 16, 1, 12, 4, 4, 0,
  /* 4566 */ 0, 14, 2, 12, 1, 12, 4, 12, 4, 4, 0,
  /* 4577 */ 0, 14, 2, 3, 12, 4, 12, 4, 4, 0,
  /* 4587 */ 12, 4, 12, 4, 12, 4, 12, 4, 4, 0,
  /* 4597 */ 13, 4, 13, 4, 12, 4, 12, 4, 4, 0,
  /* 4607 */ 47, 1, 47, 1, 13, 4, 4, 0,
  /* 4615 */ 13, 4, 13, 4, 13, 4, 13, 4, 4, 0,
  /* 4625 */ 16, 4, 16, 4, 13, 4, 13, 4, 4, 0,
  /* 4635 */ 16, 4, 16, 4, 13, 4, 4, 0,
  /* 4643 */ 40, 4, 4, 4, 4, 4, 4, 4, 4, 15, 4, 4, 0,
  /* 4656 */ 23, 4, 4, 4, 4, 15, 4, 4, 0,
  /* 4665 */ 21, 4, 4, 15, 4, 4, 0,
  /* 4672 */ 40, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 15, 4, 4, 0,
  /* 4693 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 15, 4, 4, 0,
  /* 4706 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 15, 4, 4, 0,
  /* 4719 */ 0, 15, 4, 15, 11, 15, 15, 4, 4, 0,
  /* 4729 */ 0, 15, 4, 15, 11, 15, 15, 15, 15, 4, 4, 0,
  /* 4741 */ 0, 15, 4, 15, 11, 15, 15, 15, 15, 15, 15, 4, 4, 0,
  /* 4755 */ 13, 4, 13, 4, 16, 4, 4, 0,
  /* 4763 */ 16, 4, 16, 4, 16, 4, 4, 0,
  /* 4771 */ 17, 17, 4, 4, 0,
  /* 4776 */ 15, 0, 18, 4, 4, 0,
  /* 4782 */ 0, 15, 4, 15, 11, 15, 19, 4, 4, 0,
  /* 4792 */ 21, 4, 4, 0,
  /* 4796 */ 23, 3, 3, 3, 3, 5, 4, 0,
  /* 4804 */ 21, 3, 3, 5, 4, 0,
  /* 4810 */ 0, 31, 3, 1, 15, 3, 5, 4, 0,
  /* 4819 */ 23, 4, 4, 4, 4, 5, 4, 0,
  /* 4827 */ 21, 4, 4, 5, 4, 0,
  /* 4833 */ 23, 4, 4, 4, 4, 5, 5, 4, 0,
  /* 4842 */ 21, 5, 5, 5, 4, 0,
  /* 4848 */ 23, 7, 7, 7, 7, 5, 5, 4, 0,
  /* 4857 */ 23, 7, 7, 7, 7, 5, 4, 0,
  /* 4865 */ 0, 14, 2, 9, 1, 10, 4, 9, 5, 4, 0,
  /* 4876 */ 0, 14, 2, 2, 10, 4, 9, 5, 4, 0,
  /* 4886 */ 0, 14, 2, 9, 1, 9, 5, 9, 5, 4, 0,
  /* 4897 */ 0, 14, 2, 2, 9, 5, 9, 5, 4, 0,
  /* 4907 */ 9, 5, 9, 5, 9, 5, 9, 5, 4, 0,
  /* 4917 */ 0, 14, 2, 10, 1, 10, 4, 10, 5, 4, 0,
  /* 4928 */ 0, 14, 2, 2, 10, 4, 10, 5, 4, 0,
  /* 4938 */ 0, 14, 2, 10, 1, 10, 5, 10, 5, 4, 0,
  /* 4949 */ 0, 14, 2, 2, 10, 5, 10, 5, 4, 0,
  /* 4959 */ 10, 5, 10, 5, 10, 5, 10, 5, 4, 0,
  /* 4969 */ 0, 14, 2, 11, 1, 11, 4, 11, 5, 4, 0,
  /* 4980 */ 0, 14, 2, 2, 11, 4, 11, 5, 4, 0,
  /* 4990 */ 0, 14, 2, 11, 1, 11, 5, 11, 5, 4, 0,
  /* 5001 */ 0, 14, 2, 2, 11, 5, 11, 5, 4, 0,
  /* 5011 */ 11, 5, 11, 5, 11, 5, 11, 5, 4, 0,
  /* 5021 */ 21, 5, 4, 0,
  /* 5025 */ 0, 15, 4, 9, 6, 9, 6, 9, 6, 9, 6, 4, 0,
  /* 5038 */ 0, 15, 4, 7, 7, 7, 7, 7, 7, 7, 7, 4, 0,
  /* 5051 */ 21, 10, 4, 4, 10, 7, 4, 0,
  /* 5059 */ 0, 14, 2, 10, 1, 10, 4, 10, 7, 4, 0,
  /* 5070 */ 0, 14, 2, 2, 10, 4, 10, 7, 4, 0,
  /* 5080 */ 0, 14, 2, 9, 1, 9, 5, 10, 7, 4, 0,
  /* 5091 */ 0, 14, 2, 2, 9, 5, 10, 7, 4, 0,
  /* 5101 */ 0, 14, 2, 10, 1, 10, 5, 10, 7, 4, 0,
  /* 5112 */ 0, 14, 2, 2, 10, 5, 10, 7, 4, 0,
  /* 5122 */ 0, 14, 2, 11, 1, 11, 4, 11, 7, 4, 0,
  /* 5133 */ 0, 14, 2, 2, 11, 4, 11, 7, 4, 0,
  /* 5143 */ 0, 14, 2, 11, 1, 11, 5, 11, 7, 4, 0,
  /* 5154 */ 0, 14, 2, 2, 11, 5, 11, 7, 4, 0,
  /* 5164 */ 0, 14, 2, 12, 1, 12, 4, 12, 7, 4, 0,
  /* 5175 */ 0, 14, 2, 3, 12, 4, 12, 7, 4, 0,
  /* 5185 */ 12, 7, 12, 7, 12, 7, 12, 7, 4, 0,
  /* 5195 */ 15, 3, 31, 3, 1, 15, 7, 4, 0,
  /* 5204 */ 15, 3, 31, 3, 1, 15, 7, 15, 7, 4, 0,
  /* 5215 */ 21, 15, 3, 4, 15, 7, 15, 7, 4, 0,
  /* 5225 */ 15, 3, 31, 3, 1, 15, 7, 15, 7, 15, 7, 4, 0,
  /* 5238 */ 15, 3, 15, 7, 15, 7, 15, 7, 4, 0,
  /* 5248 */ 15, 2, 4, 15, 7, 15, 7, 15, 7, 4, 0,
  /* 5259 */ 15, 1, 25, 7, 4, 0,
  /* 5265 */ 15, 3, 26, 7, 4, 0,
  /* 5271 */ 15, 3, 44, 7, 4, 0,
  /* 5277 */ 15, 3, 44, 7, 44, 7, 4, 0,
  /* 5285 */ 15, 3, 15, 7, 44, 7, 44, 7, 4, 0,
  /* 5295 */ 15, 3, 15, 7, 45, 7, 45, 7, 4, 0,
  /* 5305 */ 21, 9, 5, 4, 9, 8, 4, 0,
  /* 5313 */ 0, 14, 2, 9, 1, 10, 4, 9, 8, 4, 0,
  /* 5324 */ 0, 14, 2, 2, 10, 4, 9, 8, 4, 0,
  /* 5334 */ 0, 14, 2, 9, 1, 9, 5, 9, 8, 4, 0,
  /* 5345 */ 0, 14, 2, 2, 9, 5, 9, 8, 4, 0,
  /* 5355 */ 0, 14, 2, 10, 1, 10, 4, 10, 8, 4, 0,
  /* 5366 */ 0, 14, 2, 2, 10, 4, 10, 8, 4, 0,
  /* 5376 */ 0, 14, 2, 10, 1, 10, 5, 10, 8, 4, 0,
  /* 5387 */ 0, 14, 2, 2, 10, 5, 10, 8, 4, 0,
  /* 5397 */ 0, 14, 2, 11, 1, 11, 4, 11, 8, 4, 0,
  /* 5408 */ 0, 14, 2, 2, 11, 4, 11, 8, 4, 0,
  /* 5418 */ 0, 14, 2, 11, 1, 11, 5, 11, 8, 4, 0,
  /* 5429 */ 0, 14, 2, 2, 11, 5, 11, 8, 4, 0,
  /* 5439 */ 11, 8, 11, 8, 11, 8, 11, 8, 4, 0,
  /* 5449 */ 21, 10, 4, 4, 10, 4, 0,
  /* 5456 */ 21, 10, 1, 10, 1, 10, 4, 10, 4, 0,
  /* 5466 */ 21, 11, 3, 4, 10, 4, 10, 4, 0,
  /* 5475 */ 21, 10, 4, 4, 10, 4, 10, 4, 0,
  /* 5484 */ 10, 4, 15, 1, 7, 10, 7, 15, 11, 15, 15, 10, 4, 0,
  /* 5498 */ 43, 9, 8, 43, 9, 8, 43, 9, 1, 43, 10, 4, 0,
  /* 5511 */ 43, 11, 6, 43, 11, 6, 43, 10, 1, 43, 10, 4, 0,
  /* 5524 */ 43, 10, 4, 43, 10, 4, 43, 10, 4, 0,
  /* 5534 */ 21, 11, 1, 11, 1, 11, 4, 11, 4, 0,
  /* 5544 */ 12, 4, 16, 1, 12, 4, 0,
  /* 5551 */ 0, 16, 1, 14, 2, 12, 4, 0,
  /* 5559 */ 0, 14, 2, 16, 1, 4, 4, 12, 4, 0,
  /* 5569 */ 21, 12, 1, 12, 1, 12, 4, 12, 4, 0,
  /* 5579 */ 16, 1, 16, 1, 12, 4, 12, 4, 0,
  /* 5588 */ 12, 4, 16, 1, 12, 4, 12, 4, 0,
  /* 5597 */ 13, 4, 16, 1, 12, 4, 12, 4, 0,
  /* 5606 */ 0, 16, 1, 4, 4, 12, 4, 12, 4, 0,
  /* 5616 */ 0, 16, 1, 4, 4, 13, 4, 12, 4, 0,
  /* 5626 */ 21, 15, 3, 15, 7, 15, 12, 4, 0,
  /* 5635 */ 22, 15, 3, 15, 7, 15, 7, 15, 12, 4, 0,
  /* 5646 */ 23, 15, 3, 15, 7, 15, 7, 15, 7, 15, 12, 4, 0,
  /* 5659 */ 13, 4, 47, 1, 13, 4, 0,
  /* 5666 */ 0, 47, 1, 14, 2, 13, 4, 0,
  /* 5674 */ 0, 14, 2, 16, 1, 4, 4, 13, 4, 0,
  /* 5684 */ 0, 14, 2, 47, 1, 4, 4, 13, 4, 0,
  /* 5694 */ 47, 1, 47, 1, 13, 4, 13, 4, 0,
  /* 5703 */ 13, 4, 47, 1, 13, 4, 13, 4, 0,
  /* 5712 */ 16, 4, 47, 1, 13, 4, 13, 4, 0,
  /* 5721 */ 0, 47, 1, 4, 4, 13, 4, 13, 4, 0,
  /* 5731 */ 16, 4, 16, 4, 13, 4, 13, 4, 0,
  /* 5740 */ 0, 4, 4, 16, 4, 13, 4, 0,
  /* 5748 */ 0, 47, 1, 4, 4, 16, 4, 13, 4, 0,
  /* 5758 */ 16, 4, 16, 4, 13, 4, 0,
  /* 5765 */ 40, 4, 4, 4, 4, 4, 4, 4, 4, 15, 4, 0,
  /* 5777 */ 23, 4, 4, 4, 4, 15, 4, 0,
  /* 5785 */ 21, 4, 4, 15, 4, 0,
  /* 5791 */ 0, 14, 20, 5, 15, 4, 0,
  /* 5798 */ 40, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 15, 4, 0,
  /* 5818 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 15, 4, 0,
  /* 5830 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 15, 4, 0,
  /* 5842 */ 21, 15, 3, 15, 11, 15, 15, 4, 0,
  /* 5851 */ 0, 15, 4, 15, 11, 15, 15, 15, 15, 4, 0,
  /* 5862 */ 0, 15, 4, 15, 11, 15, 15, 15, 15, 15, 15, 4, 0,
  /* 5875 */ 5, 19, 15, 4, 0,
  /* 5880 */ 0, 14, 2, 47, 1, 4, 4, 16, 4, 0,
  /* 5890 */ 0, 14, 2, 4, 4, 16, 4, 0,
  /* 5898 */ 13, 4, 16, 4, 0,
  /* 5903 */ 16, 4, 16, 4, 16, 4, 0,
  /* 5910 */ 4, 17, 4, 0,
  /* 5914 */ 0, 15, 4, 15, 12, 15, 17, 4, 0,
  /* 5923 */ 17, 17, 4, 0,
  /* 5927 */ 0, 18, 4, 0,
  /* 5931 */ 14, 2, 18, 4, 0,
  /* 5936 */ 5, 28, 35, 4, 0,
  /* 5941 */ 0, 15, 3, 31, 3, 1, 33, 7, 31, 3, 5, 0,
  /* 5953 */ 21, 5, 1, 4, 5, 0,
  /* 5959 */ 16, 4, 16, 4, 13, 4, 5, 0,
  /* 5967 */ 21, 2, 5, 2, 5, 5, 0,
  /* 5974 */ 39, 4, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 4, 9, 5, 0,
  /* 5992 */ 21, 9, 1, 9, 1, 9, 5, 9, 5, 0,
  /* 6002 */ 21, 10, 4, 4, 9, 5, 9, 5, 0,
  /* 6011 */ 40, 4, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 4, 9, 5, 9, 5, 0,
  /* 6033 */ 21, 9, 5, 4, 9, 5, 9, 5, 0,
  /* 6042 */ 49, 2, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 14, 2, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 9, 5, 0,
  /* 6079 */ 28, 35, 9, 5, 9, 5, 0,
  /* 6086 */ 28, 35, 9, 5, 0,
  /* 6091 */ 43, 11, 6, 43, 11, 6, 43, 9, 1, 43, 9, 5, 0,
  /* 6104 */ 43, 10, 7, 43, 10, 7, 43, 9, 1, 43, 9, 5, 0,
  /* 6117 */ 31, 3, 1, 31, 3, 1, 15, 3, 43, 9, 5, 0,
  /* 6129 */ 43, 9, 5, 43, 9, 5, 43, 9, 5, 0,
  /* 6139 */ 15, 3, 31, 3, 1, 15, 7, 43, 9, 5, 0,
  /* 6150 */ 21, 10, 1, 10, 1, 10, 5, 10, 5, 0,
  /* 6160 */ 21, 11, 1, 11, 1, 11, 5, 11, 5, 0,
  /* 6170 */ 0, 15, 3, 31, 3, 1, 15, 11, 5, 0,
  /* 6180 */ 28, 35, 5, 0,
  /* 6184 */ 41, 41, 5, 0,
  /* 6188 */ 43, 10, 7, 43, 10, 7, 43, 11, 48, 43, 11, 48, 5, 0,
  /* 6202 */ 0, 15, 4, 9, 6, 9, 6, 9, 6, 9, 6, 0,
  /* 6214 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 0,
  /* 6264 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 0,
  /* 6314 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 0,
  /* 6340 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 0,
  /* 6366 */ 43, 9, 5, 43, 9, 5, 43, 9, 1, 43, 11, 6, 0,
  /* 6379 */ 43, 9, 8, 43, 9, 8, 43, 9, 1, 43, 11, 6, 0,
  /* 6392 */ 43, 10, 4, 43, 10, 4, 43, 10, 1, 43, 11, 6, 0,
  /* 6405 */ 43, 10, 7, 43, 10, 7, 43, 10, 1, 43, 11, 6, 0,
  /* 6418 */ 23, 4, 4, 4, 4, 5, 4, 7, 0,
  /* 6427 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 0,
  /* 6437 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 0,
  /* 6447 */ 23, 7, 7, 7, 7, 5, 4, 7, 0,
  /* 6456 */ 23, 4, 4, 4, 4, 5, 7, 0,
  /* 6464 */ 23, 4, 4, 4, 4, 5, 5, 7, 0,
  /* 6473 */ 23, 7, 7, 7, 7, 5, 5, 7, 0,
  /* 6482 */ 23, 7, 7, 7, 7, 5, 7, 0,
  /* 6490 */ 23, 4, 4, 4, 4, 5, 4, 7, 7, 0,
  /* 6500 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 7, 0,
  /* 6511 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 7, 0,
  /* 6522 */ 23, 7, 7, 7, 7, 5, 4, 7, 7, 0,
  /* 6532 */ 23, 4, 4, 4, 4, 5, 7, 7, 0,
  /* 6541 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 0,
  /* 6551 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 0,
  /* 6561 */ 23, 7, 7, 7, 7, 5, 7, 7, 0,
  /* 6570 */ 23, 4, 4, 4, 4, 5, 4, 7, 7, 7, 0,
  /* 6581 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 0,
  /* 6593 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 0,
  /* 6605 */ 23, 7, 7, 7, 7, 5, 4, 7, 7, 7, 0,
  /* 6616 */ 23, 4, 4, 4, 4, 5, 7, 7, 7, 0,
  /* 6626 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 7, 0,
  /* 6637 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 7, 0,
  /* 6648 */ 23, 7, 7, 7, 7, 5, 7, 7, 7, 0,
  /* 6658 */ 23, 4, 4, 4, 4, 5, 4, 7, 7, 7, 7, 0,
  /* 6670 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 7, 0,
  /* 6683 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 7, 0,
  /* 6696 */ 23, 7, 7, 7, 7, 5, 4, 7, 7, 7, 7, 0,
  /* 6708 */ 23, 4, 4, 4, 4, 5, 7, 7, 7, 7, 0,
  /* 6719 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 0,
  /* 6731 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 0,
  /* 6743 */ 23, 7, 7, 7, 7, 5, 7, 7, 7, 7, 0,
  /* 6754 */ 23, 4, 4, 4, 4, 5, 4, 7, 7, 7, 7, 7, 7, 0,
  /* 6768 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 7, 7, 7, 0,
  /* 6783 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 7, 7, 7, 0,
  /* 6798 */ 23, 7, 7, 7, 7, 5, 4, 7, 7, 7, 7, 7, 7, 0,
  /* 6812 */ 23, 4, 4, 4, 4, 5, 7, 7, 7, 7, 7, 7, 0,
  /* 6825 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 7, 7, 0,
  /* 6839 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 7, 7, 0,
  /* 6853 */ 23, 7, 7, 7, 7, 5, 7, 7, 7, 7, 7, 7, 0,
  /* 6866 */ 0, 15, 4, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 6878 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 6928 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 6978 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 9, 6, 9, 6, 9, 6, 9, 6, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 7004 */ 23, 4, 4, 4, 4, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 7020 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 7037 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 7054 */ 23, 7, 7, 7, 7, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 7070 */ 21, 10, 4, 4, 10, 7, 10, 7, 0,
  /* 7079 */ 17, 10, 7, 0,
  /* 7083 */ 43, 9, 5, 43, 9, 5, 43, 9, 1, 43, 10, 7, 0,
  /* 7096 */ 43, 9, 8, 43, 9, 8, 43, 9, 1, 43, 10, 7, 0,
  /* 7109 */ 43, 11, 6, 43, 11, 6, 43, 10, 1, 43, 10, 7, 0,
  /* 7122 */ 43, 11, 48, 43, 11, 48, 43, 11, 1, 43, 10, 7, 0,
  /* 7135 */ 11, 48, 11, 48, 10, 7, 0,
  /* 7142 */ 15, 3, 31, 3, 1, 15, 7, 0,
  /* 7150 */ 15, 3, 34, 1, 0, 4, 31, 3, 1, 15, 7, 0,
  /* 7162 */ 15, 3, 15, 12, 4, 31, 3, 1, 15, 7, 0,
  /* 7173 */ 15, 3, 15, 7, 31, 3, 1, 15, 7, 0,
  /* 7183 */ 15, 3, 33, 7, 31, 3, 1, 15, 7, 0,
  /* 7193 */ 15, 3, 12, 2, 12, 2, 12, 2, 12, 2, 15, 7, 0,
  /* 7206 */ 15, 3, 15, 7, 12, 2, 12, 2, 12, 2, 12, 2, 15, 7, 0,
  /* 7221 */ 15, 3, 12, 2, 12, 2, 12, 2, 15, 7, 0,
  /* 7232 */ 15, 3, 15, 7, 12, 2, 12, 2, 12, 2, 15, 7, 0,
  /* 7245 */ 15, 3, 15, 7, 12, 2, 12, 2, 15, 7, 0,
  /* 7256 */ 31, 3, 1, 31, 3, 1, 15, 3, 15, 7, 0,
  /* 7267 */ 21, 4, 4, 4, 4, 4, 4, 4, 15, 3, 15, 7, 0,
  /* 7280 */ 44, 7, 44, 7, 15, 3, 15, 7, 0,
  /* 7289 */ 21, 15, 1, 31, 1, 1, 15, 7, 15, 7, 0,
  /* 7300 */ 15, 3, 31, 3, 1, 15, 7, 15, 7, 0,
  /* 7310 */ 15, 3, 31, 3, 1, 15, 7, 15, 7, 15, 7, 0,
  /* 7322 */ 15, 3, 4, 15, 7, 15, 7, 15, 7, 0,
  /* 7332 */ 15, 3, 15, 7, 4, 4, 15, 11, 15, 7, 0,
  /* 7343 */ 15, 3, 15, 7, 4, 15, 11, 15, 7, 0,
  /* 7353 */ 15, 3, 15, 7, 15, 7, 4, 15, 11, 15, 7, 0,
  /* 7365 */ 15, 3, 15, 7, 15, 7, 15, 11, 15, 7, 0,
  /* 7376 */ 15, 3, 15, 11, 4, 4, 4, 15, 19, 15, 7, 0,
  /* 7388 */ 15, 3, 15, 7, 15, 11, 4, 4, 4, 15, 19, 15, 7, 0,
  /* 7402 */ 15, 3, 15, 11, 4, 4, 15, 19, 15, 7, 0,
  /* 7413 */ 15, 3, 15, 11, 15, 15, 4, 4, 15, 19, 15, 7, 0,
  /* 7426 */ 15, 3, 15, 11, 4, 15, 19, 15, 7, 0,
  /* 7436 */ 15, 3, 15, 11, 15, 15, 4, 15, 19, 15, 7, 0,
  /* 7448 */ 15, 1, 25, 7, 0,
  /* 7453 */ 15, 3, 25, 7, 0,
  /* 7458 */ 15, 3, 25, 7, 25, 7, 0,
  /* 7465 */ 15, 3, 26, 7, 0,
  /* 7470 */ 15, 3, 26, 7, 26, 7, 0,
  /* 7477 */ 0, 15, 3, 31, 3, 1, 33, 7, 0,
  /* 7486 */ 0, 15, 3, 15, 7, 31, 3, 1, 33, 7, 0,
  /* 7497 */ 0, 15, 3, 15, 7, 15, 7, 31, 3, 1, 33, 7, 0,
  /* 7510 */ 0, 15, 3, 15, 7, 15, 7, 15, 7, 31, 3, 1, 33, 7, 0,
  /* 7525 */ 15, 3, 15, 11, 33, 7, 0,
  /* 7532 */ 15, 3, 15, 7, 31, 3, 1, 42, 7, 0,
  /* 7542 */ 15, 3, 42, 7, 0,
  /* 7547 */ 15, 3, 15, 7, 42, 7, 0,
  /* 7554 */ 15, 3, 42, 7, 42, 7, 0,
  /* 7561 */ 15, 3, 44, 7, 0,
  /* 7566 */ 15, 3, 31, 3, 1, 15, 7, 44, 7, 0,
  /* 7576 */ 15, 3, 15, 7, 44, 7, 0,
  /* 7583 */ 15, 3, 44, 7, 44, 7, 0,
  /* 7590 */ 15, 3, 15, 7, 44, 7, 44, 7, 0,
  /* 7599 */ 15, 3, 15, 7, 45, 7, 45, 7, 0,
  /* 7608 */ 15, 3, 46, 7, 0,
  /* 7613 */ 15, 3, 31, 3, 1, 15, 7, 46, 7, 0,
  /* 7623 */ 15, 3, 15, 7, 46, 7, 0,
  /* 7630 */ 15, 3, 15, 7, 15, 7, 46, 7, 0,
  /* 7639 */ 48, 7, 0,
  /* 7642 */ 9, 8, 9, 8, 9, 5, 9, 8, 0,
  /* 7651 */ 21, 9, 5, 4, 9, 8, 9, 8, 0,
  /* 7660 */ 9, 8, 9, 8, 9, 8, 9, 8, 0,
  /* 7669 */ 17, 9, 8, 0,
  /* 7673 */ 43, 10, 4, 43, 10, 4, 43, 9, 1, 43, 9, 8, 0,
  /* 7686 */ 43, 11, 6, 43, 11, 6, 43, 9, 1, 43, 9, 8, 0,
  /* 7699 */ 43, 10, 7, 43, 10, 7, 43, 9, 1, 43, 9, 8, 0,
  /* 7712 */ 10, 8, 10, 8, 10, 5, 10, 8, 0,
  /* 7721 */ 10, 8, 10, 8, 10, 8, 10, 8, 0,
  /* 7730 */ 11, 8, 11, 8, 11, 5, 11, 8, 0,
  /* 7739 */ 21, 1, 15, 1, 15, 9, 0,
  /* 7746 */ 15, 3, 15, 7, 31, 3, 1, 15, 11, 0,
  /* 7756 */ 15, 3, 46, 7, 31, 3, 1, 15, 11, 0,
  /* 7766 */ 15, 3, 4, 15, 7, 12, 2, 12, 2, 4, 15, 11, 0,
  /* 7779 */ 15, 3, 4, 15, 7, 12, 2, 4, 15, 11, 0,
  /* 7790 */ 15, 3, 15, 7, 4, 4, 4, 4, 15, 11, 0,
  /* 7801 */ 21, 15, 3, 4, 15, 7, 4, 4, 4, 15, 11, 0,
  /* 7813 */ 15, 3, 15, 7, 15, 7, 15, 7, 4, 4, 4, 15, 11, 0,
  /* 7827 */ 21, 4, 15, 3, 15, 7, 4, 4, 15, 11, 0,
  /* 7838 */ 21, 15, 3, 4, 15, 7, 4, 4, 15, 11, 0,
  /* 7849 */ 15, 3, 4, 15, 7, 4, 15, 11, 0,
  /* 7858 */ 15, 3, 15, 7, 15, 7, 4, 15, 11, 0,
  /* 7868 */ 21, 15, 3, 4, 15, 7, 15, 7, 15, 7, 4, 15, 11, 0,
  /* 7882 */ 21, 4, 4, 4, 4, 4, 4, 4, 15, 3, 15, 7, 15, 11, 0,
  /* 7897 */ 15, 3, 15, 7, 15, 7, 15, 11, 0,
  /* 7906 */ 15, 3, 15, 7, 15, 7, 15, 7, 15, 11, 0,
  /* 7917 */ 15, 3, 4, 15, 7, 15, 7, 15, 7, 15, 11, 0,
  /* 7929 */ 15, 3, 4, 4, 15, 7, 15, 7, 15, 7, 15, 11, 0,
  /* 7942 */ 23, 15, 7, 15, 7, 15, 7, 15, 3, 15, 12, 0,
  /* 7954 */ 22, 15, 7, 15, 7, 15, 3, 15, 12, 0,
  /* 7964 */ 21, 15, 7, 15, 3, 15, 12, 0,
  /* 7972 */ 23, 15, 7, 15, 7, 15, 7, 15, 7, 15, 7, 15, 7, 15, 7, 15, 3, 5, 15, 12, 0,
  /* 7993 */ 22, 15, 7, 15, 7, 15, 7, 15, 7, 15, 7, 15, 3, 5, 15, 12, 0,
  /* 8010 */ 21, 15, 7, 15, 7, 15, 7, 15, 3, 5, 15, 12, 0,
  /* 8023 */ 0, 15, 3, 15, 7, 5, 15, 12, 0,
  /* 8032 */ 0, 15, 3, 15, 7, 15, 7, 5, 15, 12, 0,
  /* 8043 */ 0, 15, 3, 15, 7, 15, 7, 15, 7, 5, 15, 12, 0,
  /* 8056 */ 21, 15, 3, 15, 7, 15, 12, 0,
  /* 8064 */ 0, 15, 3, 15, 7, 15, 7, 15, 12, 0,
  /* 8074 */ 22, 15, 3, 15, 7, 15, 7, 15, 12, 0,
  /* 8084 */ 0, 15, 3, 15, 7, 15, 7, 15, 7, 15, 12, 0,
  /* 8096 */ 23, 15, 3, 15, 7, 15, 7, 15, 7, 15, 12, 0,
  /* 8108 */ 15, 3, 15, 7, 15, 11, 15, 15, 0,
  /* 8117 */ 15, 3, 15, 11, 15, 15, 15, 15, 0,
  /* 8126 */ 0, 15, 4, 15, 11, 15, 15, 15, 15, 0,
  /* 8136 */ 15, 3, 15, 11, 15, 15, 15, 15, 15, 15, 0,
  /* 8147 */ 0, 15, 4, 15, 11, 15, 15, 15, 15, 15, 15, 0,
  /* 8159 */ 4, 17, 0,
  /* 8162 */ 10, 7, 10, 7, 17, 0,
  /* 8168 */ 9, 8, 17, 0,
  /* 8172 */ 0, 14, 17, 17, 0,
  /* 8177 */ 17, 17, 17, 0,
  /* 8181 */ 15, 0, 18, 0,
  /* 8185 */ 1, 18, 0,
  /* 8188 */ 14, 2, 18, 0,
  /* 8192 */ 15, 4, 18, 0,
  /* 8196 */ 15, 2, 15, 12, 15, 18, 0,
  /* 8203 */ 0, 19, 0,
  /* 8206 */ 15, 1, 19, 0,
  /* 8210 */ 1, 14, 2, 19, 0,
  /* 8215 */ 21, 14, 2, 1, 14, 2, 4, 19, 0,
  /* 8224 */ 15, 2, 15, 7, 19, 0,
  /* 8230 */ 15, 2, 15, 7, 15, 7, 19, 0,
  /* 8238 */ 15, 1, 15, 10, 19, 0,
  /* 8244 */ 15, 2, 15, 10, 19, 0,
  /* 8250 */ 15, 3, 15, 7, 15, 11, 4, 4, 4, 4, 4, 4, 15, 19, 0,
  /* 8265 */ 15, 3, 15, 7, 15, 11, 4, 4, 4, 15, 19, 0,
  /* 8277 */ 15, 3, 15, 11, 4, 15, 19, 0,
  /* 8285 */ 15, 3, 15, 7, 15, 11, 4, 15, 19, 0,
  /* 8295 */ 15, 3, 4, 15, 7, 15, 11, 4, 15, 19, 0,
  /* 8306 */ 21, 15, 3, 15, 11, 15, 15, 4, 15, 19, 0,
  /* 8317 */ 0, 15, 3, 4, 15, 11, 15, 19, 0,
  /* 8326 */ 15, 3, 15, 7, 4, 15, 11, 15, 19, 0,
  /* 8336 */ 15, 2, 15, 7, 15, 11, 15, 19, 0,
  /* 8345 */ 15, 3, 4, 15, 7, 15, 11, 15, 19, 0,
  /* 8355 */ 15, 2, 15, 7, 4, 19, 19, 0,
  /* 8363 */ 31, 2, 1, 15, 2, 15, 7, 19, 19, 0,
  /* 8373 */ 15, 2, 15, 7, 15, 7, 19, 19, 0,
  /* 8382 */ 15, 2, 15, 7, 15, 7, 15, 7, 19, 19, 0,
  /* 8393 */ 15, 2, 15, 9, 19, 19, 0,
  /* 8400 */ 15, 1, 15, 10, 19, 19, 0,
  /* 8407 */ 15, 2, 15, 10, 19, 19, 0,
  /* 8414 */ 0, 19, 19, 19, 0,
  /* 8419 */ 15, 3, 15, 12, 15, 19, 4, 4, 4, 15, 27, 0,
  /* 8431 */ 0, 15, 4, 15, 11, 15, 19, 4, 4, 15, 27, 0,
  /* 8443 */ 15, 0, 29, 0,
  /* 8447 */ 0, 1, 29, 0,
  /* 8451 */ 0, 5, 4, 14, 2, 4, 29, 0,
  /* 8459 */ 5, 5, 4, 14, 2, 4, 29, 0,
  /* 8467 */ 18, 5, 4, 15, 4, 4, 4, 29, 0,
  /* 8476 */ 0, 5, 4, 29, 0,
  /* 8481 */ 4, 28, 35, 0,
  /* 8485 */ 28, 35, 9, 5, 9, 5, 28, 35, 0,
  /* 8494 */ 4, 4, 28, 35, 28, 35, 0,
  /* 8501 */ 28, 35, 28, 35, 28, 35, 28, 35, 0,
  /* 8510 */ 5, 41, 0,
  /* 8513 */ 8, 41, 0,
  /* 8516 */ 41, 41, 41, 41, 0,
  /* 8521 */ 43, 10, 7, 43, 10, 7, 43, 11, 48, 43, 11, 48, 0,
  /* 8534 */ 10, 7, 10, 7, 11, 48, 11, 48, 0,
  255
};

#endif

// Add parameter attributes that are not common to all intrinsics.
#ifdef GET_INTRINSIC_ATTRIBUTES
AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {
  static const uint8_t IntrinsicsToAttributesMap[] = {
    1, // llvm.abs
    2, // llvm.addressofreturnaddress
    3, // llvm.adjust.trampoline
    4, // llvm.annotation
    5, // llvm.assume
    6, // llvm.bitreverse
    6, // llvm.bswap
    7, // llvm.call.preallocated.arg
    7, // llvm.call.preallocated.setup
    7, // llvm.call.preallocated.teardown
    6, // llvm.canonicalize
    6, // llvm.ceil
    7, // llvm.clear_cache
    8, // llvm.codeview.annotation
    9, // llvm.convert.from.fp16
    9, // llvm.convert.to.fp16
    6, // llvm.copysign
    7, // llvm.coro.alloc
    7, // llvm.coro.alloca.alloc
    7, // llvm.coro.alloca.free
    7, // llvm.coro.alloca.get
    10, // llvm.coro.begin
    11, // llvm.coro.destroy
    12, // llvm.coro.done
    7, // llvm.coro.end
    2, // llvm.coro.frame
    13, // llvm.coro.free
    14, // llvm.coro.id
    7, // llvm.coro.id.retcon
    7, // llvm.coro.id.retcon.once
    2, // llvm.coro.noop
    15, // llvm.coro.param
    2, // llvm.coro.prepare.retcon
    16, // llvm.coro.promise
    11, // llvm.coro.resume
    7, // llvm.coro.save
    2, // llvm.coro.size
    17, // llvm.coro.subfn.addr
    7, // llvm.coro.suspend
    7, // llvm.coro.suspend.retcon
    6, // llvm.cos
    1, // llvm.ctlz
    6, // llvm.ctpop
    1, // llvm.cttz
    6, // llvm.dbg.addr
    6, // llvm.dbg.declare
    6, // llvm.dbg.label
    6, // llvm.dbg.value
    7, // llvm.debugtrap
    9, // llvm.donothing
    7, // llvm.eh.dwarf.cfa
    2, // llvm.eh.exceptioncode
    2, // llvm.eh.exceptionpointer
    2, // llvm.eh.recoverfp
    7, // llvm.eh.return.i32
    7, // llvm.eh.return.i64
    2, // llvm.eh.sjlj.callsite
    7, // llvm.eh.sjlj.functioncontext
    18, // llvm.eh.sjlj.longjmp
    2, // llvm.eh.sjlj.lsda
    7, // llvm.eh.sjlj.setjmp
    7, // llvm.eh.sjlj.setup.dispatch
    2, // llvm.eh.typeid.for
    7, // llvm.eh.unwind.init
    6, // llvm.exp
    6, // llvm.exp2
    9, // llvm.expect
    9, // llvm.expect.with.probability
    19, // llvm.experimental.constrained.ceil
    19, // llvm.experimental.constrained.cos
    19, // llvm.experimental.constrained.exp
    19, // llvm.experimental.constrained.exp2
    19, // llvm.experimental.constrained.fadd
    19, // llvm.experimental.constrained.fcmp
    19, // llvm.experimental.constrained.fcmps
    19, // llvm.experimental.constrained.fdiv
    19, // llvm.experimental.constrained.floor
    19, // llvm.experimental.constrained.fma
    19, // llvm.experimental.constrained.fmul
    19, // llvm.experimental.constrained.fmuladd
    19, // llvm.experimental.constrained.fpext
    19, // llvm.experimental.constrained.fptosi
    19, // llvm.experimental.constrained.fptoui
    19, // llvm.experimental.constrained.fptrunc
    19, // llvm.experimental.constrained.frem
    19, // llvm.experimental.constrained.fsub
    19, // llvm.experimental.constrained.llrint
    19, // llvm.experimental.constrained.llround
    19, // llvm.experimental.constrained.log
    19, // llvm.experimental.constrained.log10
    19, // llvm.experimental.constrained.log2
    19, // llvm.experimental.constrained.lrint
    19, // llvm.experimental.constrained.lround
    19, // llvm.experimental.constrained.maximum
    19, // llvm.experimental.constrained.maxnum
    19, // llvm.experimental.constrained.minimum
    19, // llvm.experimental.constrained.minnum
    19, // llvm.experimental.constrained.nearbyint
    19, // llvm.experimental.constrained.pow
    19, // llvm.experimental.constrained.powi
    19, // llvm.experimental.constrained.rint
    19, // llvm.experimental.constrained.round
    19, // llvm.experimental.constrained.roundeven
    19, // llvm.experimental.constrained.sin
    19, // llvm.experimental.constrained.sitofp
    19, // llvm.experimental.constrained.sqrt
    19, // llvm.experimental.constrained.trunc
    19, // llvm.experimental.constrained.uitofp
    11, // llvm.experimental.deoptimize
    20, // llvm.experimental.gc.relocate
    21, // llvm.experimental.gc.result
    22, // llvm.experimental.gc.statepoint
    11, // llvm.experimental.guard
    11, // llvm.experimental.patchpoint.i64
    11, // llvm.experimental.patchpoint.void
    11, // llvm.experimental.stackmap
    23, // llvm.experimental.widenable.condition
    6, // llvm.fabs
    6, // llvm.floor
    19, // llvm.flt.rounds
    6, // llvm.fma
    6, // llvm.fmuladd
    24, // llvm.frameaddress
    6, // llvm.fshl
    6, // llvm.fshr
    3, // llvm.gcread
    7, // llvm.gcroot
    25, // llvm.gcwrite
    26, // llvm.get.active.lane.mask
    7, // llvm.get.dynamic.area.offset
    27, // llvm.hwasan.check.memaccess
    27, // llvm.hwasan.check.memaccess.shortgranules
    7, // llvm.icall.branch.funnel
    28, // llvm.init.trampoline
    7, // llvm.instrprof.increment
    7, // llvm.instrprof.increment.step
    7, // llvm.instrprof.value.profile
    29, // llvm.invariant.end
    30, // llvm.invariant.start
    31, // llvm.is.constant
    23, // llvm.launder.invariant.group
    30, // llvm.lifetime.end
    30, // llvm.lifetime.start
    6, // llvm.llrint
    6, // llvm.llround
    3, // llvm.load.relative
    2, // llvm.localaddress
    7, // llvm.localescape
    32, // llvm.localrecover
    6, // llvm.log
    6, // llvm.log10
    6, // llvm.log2
    33, // llvm.loop.decrement
    33, // llvm.loop.decrement.reg
    6, // llvm.lrint
    6, // llvm.lround
    34, // llvm.masked.compressstore
    35, // llvm.masked.expandload
    36, // llvm.masked.gather
    37, // llvm.masked.load
    38, // llvm.masked.scatter
    39, // llvm.masked.store
    40, // llvm.matrix.column.major.load
    41, // llvm.matrix.column.major.store
    42, // llvm.matrix.multiply
    43, // llvm.matrix.transpose
    6, // llvm.maximum
    6, // llvm.maxnum
    44, // llvm.memcpy
    45, // llvm.memcpy.element.unordered.atomic
    46, // llvm.memcpy.inline
    47, // llvm.memmove
    45, // llvm.memmove.element.unordered.atomic
    48, // llvm.memset
    48, // llvm.memset.element.unordered.atomic
    6, // llvm.minimum
    6, // llvm.minnum
    6, // llvm.nearbyint
    7, // llvm.objc.arc.annotation.bottomup.bbend
    7, // llvm.objc.arc.annotation.bottomup.bbstart
    7, // llvm.objc.arc.annotation.topdown.bbend
    7, // llvm.objc.arc.annotation.topdown.bbstart
    7, // llvm.objc.autorelease
    7, // llvm.objc.autoreleasePoolPop
    7, // llvm.objc.autoreleasePoolPush
    7, // llvm.objc.autoreleaseReturnValue
    7, // llvm.objc.clang.arc.use
    7, // llvm.objc.copyWeak
    7, // llvm.objc.destroyWeak
    7, // llvm.objc.initWeak
    7, // llvm.objc.loadWeak
    7, // llvm.objc.loadWeakRetained
    7, // llvm.objc.moveWeak
    7, // llvm.objc.release
    7, // llvm.objc.retain
    7, // llvm.objc.retain.autorelease
    7, // llvm.objc.retainAutorelease
    7, // llvm.objc.retainAutoreleaseReturnValue
    7, // llvm.objc.retainAutoreleasedReturnValue
    7, // llvm.objc.retainBlock
    7, // llvm.objc.retainedObject
    7, // llvm.objc.storeStrong
    7, // llvm.objc.storeWeak
    7, // llvm.objc.sync.enter
    7, // llvm.objc.sync.exit
    7, // llvm.objc.unretainedObject
    7, // llvm.objc.unretainedPointer
    7, // llvm.objc.unsafeClaimAutoreleasedReturnValue
    49, // llvm.objectsize
    7, // llvm.pcmarker
    6, // llvm.pow
    6, // llvm.powi
    50, // llvm.prefetch
    51, // llvm.preserve.array.access.index
    51, // llvm.preserve.struct.access.index
    52, // llvm.preserve.union.access.index
    4, // llvm.ptr.annotation
    6, // llvm.ptrmask
    21, // llvm.read_register
    53, // llvm.read_volatile_register
    7, // llvm.readcyclecounter
    24, // llvm.returnaddress
    6, // llvm.rint
    6, // llvm.round
    6, // llvm.roundeven
    6, // llvm.sadd.sat
    6, // llvm.sadd.with.overflow
    32, // llvm.sdiv.fix
    32, // llvm.sdiv.fix.sat
    33, // llvm.set.loop.iterations
    19, // llvm.sideeffect
    6, // llvm.sin
    6, // llvm.smax
    6, // llvm.smin
    54, // llvm.smul.fix
    54, // llvm.smul.fix.sat
    6, // llvm.smul.with.overflow
    2, // llvm.sponentry
    6, // llvm.sqrt
    55, // llvm.ssa.copy
    6, // llvm.sshl.sat
    6, // llvm.ssub.sat
    6, // llvm.ssub.with.overflow
    7, // llvm.stackguard
    7, // llvm.stackprotector
    7, // llvm.stackrestore
    7, // llvm.stacksave
    6, // llvm.strip.invariant.group
    33, // llvm.test.set.loop.iterations
    2, // llvm.thread.pointer
    56, // llvm.trap
    6, // llvm.trunc
    9, // llvm.type.checked.load
    9, // llvm.type.test
    6, // llvm.uadd.sat
    6, // llvm.uadd.with.overflow
    32, // llvm.udiv.fix
    32, // llvm.udiv.fix.sat
    6, // llvm.umax
    6, // llvm.umin
    54, // llvm.umul.fix
    54, // llvm.umul.fix.sat
    6, // llvm.umul.with.overflow
    6, // llvm.ushl.sat
    6, // llvm.usub.sat
    6, // llvm.usub.with.overflow
    7, // llvm.va_copy
    7, // llvm.va_end
    7, // llvm.va_start
    4, // llvm.var.annotation
    9, // llvm.vector.reduce.add
    9, // llvm.vector.reduce.and
    9, // llvm.vector.reduce.fadd
    9, // llvm.vector.reduce.fmax
    9, // llvm.vector.reduce.fmin
    9, // llvm.vector.reduce.fmul
    9, // llvm.vector.reduce.mul
    9, // llvm.vector.reduce.or
    9, // llvm.vector.reduce.smax
    9, // llvm.vector.reduce.smin
    9, // llvm.vector.reduce.umax
    9, // llvm.vector.reduce.umin
    9, // llvm.vector.reduce.xor
    26, // llvm.vp.add
    26, // llvm.vp.and
    26, // llvm.vp.ashr
    26, // llvm.vp.lshr
    26, // llvm.vp.mul
    26, // llvm.vp.or
    26, // llvm.vp.sdiv
    26, // llvm.vp.shl
    26, // llvm.vp.srem
    26, // llvm.vp.sub
    26, // llvm.vp.udiv
    26, // llvm.vp.urem
    26, // llvm.vp.xor
    2, // llvm.vscale
    7, // llvm.write_register
    57, // llvm.xray.customevent
    58, // llvm.xray.typedevent
    2, // llvm.aarch64.addg
    7, // llvm.aarch64.clrex
    2, // llvm.aarch64.cls
    2, // llvm.aarch64.cls64
    2, // llvm.aarch64.crc32b
    2, // llvm.aarch64.crc32cb
    2, // llvm.aarch64.crc32ch
    2, // llvm.aarch64.crc32cw
    2, // llvm.aarch64.crc32cx
    2, // llvm.aarch64.crc32h
    2, // llvm.aarch64.crc32w
    2, // llvm.aarch64.crc32x
    2, // llvm.aarch64.crypto.aesd
    2, // llvm.aarch64.crypto.aese
    2, // llvm.aarch64.crypto.aesimc
    2, // llvm.aarch64.crypto.aesmc
    2, // llvm.aarch64.crypto.sha1c
    2, // llvm.aarch64.crypto.sha1h
    2, // llvm.aarch64.crypto.sha1m
    2, // llvm.aarch64.crypto.sha1p
    2, // llvm.aarch64.crypto.sha1su0
    2, // llvm.aarch64.crypto.sha1su1
    2, // llvm.aarch64.crypto.sha256h
    2, // llvm.aarch64.crypto.sha256h2
    2, // llvm.aarch64.crypto.sha256su0
    2, // llvm.aarch64.crypto.sha256su1
    7, // llvm.aarch64.dmb
    7, // llvm.aarch64.dsb
    2, // llvm.aarch64.fjcvtzs
    59, // llvm.aarch64.get.fpcr
    2, // llvm.aarch64.gmi
    7, // llvm.aarch64.hint
    59, // llvm.aarch64.irg
    59, // llvm.aarch64.irg.sp
    7, // llvm.aarch64.isb
    7, // llvm.aarch64.ldaxp
    7, // llvm.aarch64.ldaxr
    21, // llvm.aarch64.ldg
    7, // llvm.aarch64.ldxp
    7, // llvm.aarch64.ldxr
    2, // llvm.aarch64.neon.abs
    2, // llvm.aarch64.neon.addhn
    2, // llvm.aarch64.neon.addp
    2, // llvm.aarch64.neon.bfcvt
    2, // llvm.aarch64.neon.bfcvtn
    2, // llvm.aarch64.neon.bfcvtn2
    2, // llvm.aarch64.neon.bfdot
    2, // llvm.aarch64.neon.bfmlalb
    2, // llvm.aarch64.neon.bfmlalt
    2, // llvm.aarch64.neon.bfmmla
    2, // llvm.aarch64.neon.cls
    2, // llvm.aarch64.neon.fabd
    2, // llvm.aarch64.neon.facge
    2, // llvm.aarch64.neon.facgt
    2, // llvm.aarch64.neon.faddp
    2, // llvm.aarch64.neon.faddv
    2, // llvm.aarch64.neon.fcvtas
    2, // llvm.aarch64.neon.fcvtau
    2, // llvm.aarch64.neon.fcvtms
    2, // llvm.aarch64.neon.fcvtmu
    2, // llvm.aarch64.neon.fcvtns
    2, // llvm.aarch64.neon.fcvtnu
    2, // llvm.aarch64.neon.fcvtps
    2, // llvm.aarch64.neon.fcvtpu
    2, // llvm.aarch64.neon.fcvtxn
    2, // llvm.aarch64.neon.fcvtzs
    2, // llvm.aarch64.neon.fcvtzu
    2, // llvm.aarch64.neon.fmax
    2, // llvm.aarch64.neon.fmaxnm
    2, // llvm.aarch64.neon.fmaxnmp
    2, // llvm.aarch64.neon.fmaxnmv
    2, // llvm.aarch64.neon.fmaxp
    2, // llvm.aarch64.neon.fmaxv
    2, // llvm.aarch64.neon.fmin
    2, // llvm.aarch64.neon.fminnm
    2, // llvm.aarch64.neon.fminnmp
    2, // llvm.aarch64.neon.fminnmv
    2, // llvm.aarch64.neon.fminp
    2, // llvm.aarch64.neon.fminv
    2, // llvm.aarch64.neon.fmlal
    2, // llvm.aarch64.neon.fmlal2
    2, // llvm.aarch64.neon.fmlsl
    2, // llvm.aarch64.neon.fmlsl2
    2, // llvm.aarch64.neon.fmulx
    2, // llvm.aarch64.neon.frecpe
    2, // llvm.aarch64.neon.frecps
    2, // llvm.aarch64.neon.frecpx
    2, // llvm.aarch64.neon.frintn
    2, // llvm.aarch64.neon.frsqrte
    2, // llvm.aarch64.neon.frsqrts
    3, // llvm.aarch64.neon.ld1x2
    3, // llvm.aarch64.neon.ld1x3
    3, // llvm.aarch64.neon.ld1x4
    3, // llvm.aarch64.neon.ld2
    3, // llvm.aarch64.neon.ld2lane
    3, // llvm.aarch64.neon.ld2r
    3, // llvm.aarch64.neon.ld3
    3, // llvm.aarch64.neon.ld3lane
    3, // llvm.aarch64.neon.ld3r
    3, // llvm.aarch64.neon.ld4
    3, // llvm.aarch64.neon.ld4lane
    3, // llvm.aarch64.neon.ld4r
    2, // llvm.aarch64.neon.pmul
    2, // llvm.aarch64.neon.pmull
    2, // llvm.aarch64.neon.pmull64
    2, // llvm.aarch64.neon.raddhn
    2, // llvm.aarch64.neon.rbit
    2, // llvm.aarch64.neon.rshrn
    2, // llvm.aarch64.neon.rsubhn
    2, // llvm.aarch64.neon.sabd
    2, // llvm.aarch64.neon.saddlp
    2, // llvm.aarch64.neon.saddlv
    2, // llvm.aarch64.neon.saddv
    2, // llvm.aarch64.neon.scalar.sqxtn
    2, // llvm.aarch64.neon.scalar.sqxtun
    2, // llvm.aarch64.neon.scalar.uqxtn
    2, // llvm.aarch64.neon.sdot
    2, // llvm.aarch64.neon.shadd
    2, // llvm.aarch64.neon.shll
    2, // llvm.aarch64.neon.shsub
    2, // llvm.aarch64.neon.smax
    2, // llvm.aarch64.neon.smaxp
    2, // llvm.aarch64.neon.smaxv
    2, // llvm.aarch64.neon.smin
    2, // llvm.aarch64.neon.sminp
    2, // llvm.aarch64.neon.sminv
    2, // llvm.aarch64.neon.smmla
    2, // llvm.aarch64.neon.smull
    2, // llvm.aarch64.neon.sqabs
    2, // llvm.aarch64.neon.sqadd
    2, // llvm.aarch64.neon.sqdmulh
    2, // llvm.aarch64.neon.sqdmulh.lane
    2, // llvm.aarch64.neon.sqdmulh.laneq
    2, // llvm.aarch64.neon.sqdmull
    2, // llvm.aarch64.neon.sqdmulls.scalar
    2, // llvm.aarch64.neon.sqneg
    2, // llvm.aarch64.neon.sqrdmulh
    2, // llvm.aarch64.neon.sqrdmulh.lane
    2, // llvm.aarch64.neon.sqrdmulh.laneq
    2, // llvm.aarch64.neon.sqrshl
    2, // llvm.aarch64.neon.sqrshrn
    2, // llvm.aarch64.neon.sqrshrun
    2, // llvm.aarch64.neon.sqshl
    2, // llvm.aarch64.neon.sqshlu
    2, // llvm.aarch64.neon.sqshrn
    2, // llvm.aarch64.neon.sqshrun
    2, // llvm.aarch64.neon.sqsub
    2, // llvm.aarch64.neon.sqxtn
    2, // llvm.aarch64.neon.sqxtun
    2, // llvm.aarch64.neon.srhadd
    2, // llvm.aarch64.neon.srshl
    2, // llvm.aarch64.neon.sshl
    2, // llvm.aarch64.neon.sshll
    60, // llvm.aarch64.neon.st1x2
    61, // llvm.aarch64.neon.st1x3
    62, // llvm.aarch64.neon.st1x4
    60, // llvm.aarch64.neon.st2
    61, // llvm.aarch64.neon.st2lane
    61, // llvm.aarch64.neon.st3
    62, // llvm.aarch64.neon.st3lane
    62, // llvm.aarch64.neon.st4
    63, // llvm.aarch64.neon.st4lane
    2, // llvm.aarch64.neon.subhn
    2, // llvm.aarch64.neon.suqadd
    2, // llvm.aarch64.neon.tbl1
    2, // llvm.aarch64.neon.tbl2
    2, // llvm.aarch64.neon.tbl3
    2, // llvm.aarch64.neon.tbl4
    2, // llvm.aarch64.neon.tbx1
    2, // llvm.aarch64.neon.tbx2
    2, // llvm.aarch64.neon.tbx3
    2, // llvm.aarch64.neon.tbx4
    2, // llvm.aarch64.neon.uabd
    2, // llvm.aarch64.neon.uaddlp
    2, // llvm.aarch64.neon.uaddlv
    2, // llvm.aarch64.neon.uaddv
    2, // llvm.aarch64.neon.udot
    2, // llvm.aarch64.neon.uhadd
    2, // llvm.aarch64.neon.uhsub
    2, // llvm.aarch64.neon.umax
    2, // llvm.aarch64.neon.umaxp
    2, // llvm.aarch64.neon.umaxv
    2, // llvm.aarch64.neon.umin
    2, // llvm.aarch64.neon.uminp
    2, // llvm.aarch64.neon.uminv
    2, // llvm.aarch64.neon.ummla
    2, // llvm.aarch64.neon.umull
    2, // llvm.aarch64.neon.uqadd
    2, // llvm.aarch64.neon.uqrshl
    2, // llvm.aarch64.neon.uqrshrn
    2, // llvm.aarch64.neon.uqshl
    2, // llvm.aarch64.neon.uqshrn
    2, // llvm.aarch64.neon.uqsub
    2, // llvm.aarch64.neon.uqxtn
    2, // llvm.aarch64.neon.urecpe
    2, // llvm.aarch64.neon.urhadd
    2, // llvm.aarch64.neon.urshl
    2, // llvm.aarch64.neon.ursqrte
    2, // llvm.aarch64.neon.usdot
    2, // llvm.aarch64.neon.ushl
    2, // llvm.aarch64.neon.ushll
    2, // llvm.aarch64.neon.usmmla
    2, // llvm.aarch64.neon.usqadd
    2, // llvm.aarch64.neon.vcadd.rot270
    2, // llvm.aarch64.neon.vcadd.rot90
    2, // llvm.aarch64.neon.vcopy.lane
    2, // llvm.aarch64.neon.vcvtfp2fxs
    2, // llvm.aarch64.neon.vcvtfp2fxu
    2, // llvm.aarch64.neon.vcvtfp2hf
    2, // llvm.aarch64.neon.vcvtfxs2fp
    2, // llvm.aarch64.neon.vcvtfxu2fp
    2, // llvm.aarch64.neon.vcvthf2fp
    2, // llvm.aarch64.neon.vsli
    2, // llvm.aarch64.neon.vsri
    2, // llvm.aarch64.sdiv
    64, // llvm.aarch64.settag
    64, // llvm.aarch64.settag.zero
    2, // llvm.aarch64.sisd.fabd
    2, // llvm.aarch64.sisd.fcvtxn
    7, // llvm.aarch64.space
    65, // llvm.aarch64.stg
    64, // llvm.aarch64.stgp
    7, // llvm.aarch64.stlxp
    7, // llvm.aarch64.stlxr
    7, // llvm.aarch64.stxp
    7, // llvm.aarch64.stxr
    2, // llvm.aarch64.subp
    2, // llvm.aarch64.sve.abs
    2, // llvm.aarch64.sve.adclb
    2, // llvm.aarch64.sve.adclt
    2, // llvm.aarch64.sve.add
    2, // llvm.aarch64.sve.addhnb
    2, // llvm.aarch64.sve.addhnt
    2, // llvm.aarch64.sve.addp
    2, // llvm.aarch64.sve.adrb
    2, // llvm.aarch64.sve.adrd
    2, // llvm.aarch64.sve.adrh
    2, // llvm.aarch64.sve.adrw
    2, // llvm.aarch64.sve.aesd
    2, // llvm.aarch64.sve.aese
    2, // llvm.aarch64.sve.aesimc
    2, // llvm.aarch64.sve.aesmc
    2, // llvm.aarch64.sve.and
    2, // llvm.aarch64.sve.and.z
    2, // llvm.aarch64.sve.andv
    2, // llvm.aarch64.sve.asr
    2, // llvm.aarch64.sve.asr.wide
    32, // llvm.aarch64.sve.asrd
    2, // llvm.aarch64.sve.bcax
    2, // llvm.aarch64.sve.bdep.x
    2, // llvm.aarch64.sve.bext.x
    2, // llvm.aarch64.sve.bfdot
    66, // llvm.aarch64.sve.bfdot.lane
    2, // llvm.aarch64.sve.bfmlalb
    66, // llvm.aarch64.sve.bfmlalb.lane
    2, // llvm.aarch64.sve.bfmlalt
    66, // llvm.aarch64.sve.bfmlalt.lane
    2, // llvm.aarch64.sve.bfmmla
    2, // llvm.aarch64.sve.bgrp.x
    2, // llvm.aarch64.sve.bic
    2, // llvm.aarch64.sve.bic.z
    2, // llvm.aarch64.sve.brka
    2, // llvm.aarch64.sve.brka.z
    2, // llvm.aarch64.sve.brkb
    2, // llvm.aarch64.sve.brkb.z
    2, // llvm.aarch64.sve.brkn.z
    2, // llvm.aarch64.sve.brkpa.z
    2, // llvm.aarch64.sve.brkpb.z
    2, // llvm.aarch64.sve.bsl
    2, // llvm.aarch64.sve.bsl1n
    2, // llvm.aarch64.sve.bsl2n
    32, // llvm.aarch64.sve.cadd.x
    66, // llvm.aarch64.sve.cdot
    67, // llvm.aarch64.sve.cdot.lane
    2, // llvm.aarch64.sve.clasta
    2, // llvm.aarch64.sve.clasta.n
    2, // llvm.aarch64.sve.clastb
    2, // llvm.aarch64.sve.clastb.n
    2, // llvm.aarch64.sve.cls
    2, // llvm.aarch64.sve.clz
    67, // llvm.aarch64.sve.cmla.lane.x
    66, // llvm.aarch64.sve.cmla.x
    2, // llvm.aarch64.sve.cmpeq
    2, // llvm.aarch64.sve.cmpeq.wide
    2, // llvm.aarch64.sve.cmpge
    2, // llvm.aarch64.sve.cmpge.wide
    2, // llvm.aarch64.sve.cmpgt
    2, // llvm.aarch64.sve.cmpgt.wide
    2, // llvm.aarch64.sve.cmphi
    2, // llvm.aarch64.sve.cmphi.wide
    2, // llvm.aarch64.sve.cmphs
    2, // llvm.aarch64.sve.cmphs.wide
    2, // llvm.aarch64.sve.cmple.wide
    2, // llvm.aarch64.sve.cmplo.wide
    2, // llvm.aarch64.sve.cmpls.wide
    2, // llvm.aarch64.sve.cmplt.wide
    2, // llvm.aarch64.sve.cmpne
    2, // llvm.aarch64.sve.cmpne.wide
    2, // llvm.aarch64.sve.cnot
    2, // llvm.aarch64.sve.cnt
    24, // llvm.aarch64.sve.cntb
    24, // llvm.aarch64.sve.cntd
    24, // llvm.aarch64.sve.cnth
    2, // llvm.aarch64.sve.cntp
    24, // llvm.aarch64.sve.cntw
    2, // llvm.aarch64.sve.compact
    2, // llvm.aarch64.sve.convert.from.svbool
    2, // llvm.aarch64.sve.convert.to.svbool
    2, // llvm.aarch64.sve.dup
    2, // llvm.aarch64.sve.dup.x
    2, // llvm.aarch64.sve.dupq.lane
    2, // llvm.aarch64.sve.eor
    2, // llvm.aarch64.sve.eor.z
    2, // llvm.aarch64.sve.eor3
    2, // llvm.aarch64.sve.eorbt
    2, // llvm.aarch64.sve.eortb
    2, // llvm.aarch64.sve.eorv
    32, // llvm.aarch64.sve.ext
    2, // llvm.aarch64.sve.fabd
    2, // llvm.aarch64.sve.fabs
    2, // llvm.aarch64.sve.facge
    2, // llvm.aarch64.sve.facgt
    2, // llvm.aarch64.sve.fadd
    2, // llvm.aarch64.sve.fadda
    2, // llvm.aarch64.sve.faddp
    2, // llvm.aarch64.sve.faddv
    66, // llvm.aarch64.sve.fcadd
    68, // llvm.aarch64.sve.fcmla
    67, // llvm.aarch64.sve.fcmla.lane
    2, // llvm.aarch64.sve.fcmpeq
    2, // llvm.aarch64.sve.fcmpge
    2, // llvm.aarch64.sve.fcmpgt
    2, // llvm.aarch64.sve.fcmpne
    2, // llvm.aarch64.sve.fcmpuo
    2, // llvm.aarch64.sve.fcvt
    2, // llvm.aarch64.sve.fcvt.bf16f32
    2, // llvm.aarch64.sve.fcvt.f16f32
    2, // llvm.aarch64.sve.fcvt.f16f64
    2, // llvm.aarch64.sve.fcvt.f32f16
    2, // llvm.aarch64.sve.fcvt.f32f64
    2, // llvm.aarch64.sve.fcvt.f64f16
    2, // llvm.aarch64.sve.fcvt.f64f32
    2, // llvm.aarch64.sve.fcvtlt.f32f16
    2, // llvm.aarch64.sve.fcvtlt.f64f32
    2, // llvm.aarch64.sve.fcvtnt.bf16f32
    2, // llvm.aarch64.sve.fcvtnt.f16f32
    2, // llvm.aarch64.sve.fcvtnt.f32f64
    2, // llvm.aarch64.sve.fcvtx.f32f64
    2, // llvm.aarch64.sve.fcvtxnt.f32f64
    2, // llvm.aarch64.sve.fcvtzs
    2, // llvm.aarch64.sve.fcvtzs.i32f16
    2, // llvm.aarch64.sve.fcvtzs.i32f64
    2, // llvm.aarch64.sve.fcvtzs.i64f16
    2, // llvm.aarch64.sve.fcvtzs.i64f32
    2, // llvm.aarch64.sve.fcvtzu
    2, // llvm.aarch64.sve.fcvtzu.i32f16
    2, // llvm.aarch64.sve.fcvtzu.i32f64
    2, // llvm.aarch64.sve.fcvtzu.i64f16
    2, // llvm.aarch64.sve.fcvtzu.i64f32
    2, // llvm.aarch64.sve.fdiv
    2, // llvm.aarch64.sve.fdivr
    2, // llvm.aarch64.sve.fexpa.x
    2, // llvm.aarch64.sve.flogb
    2, // llvm.aarch64.sve.fmad
    2, // llvm.aarch64.sve.fmax
    2, // llvm.aarch64.sve.fmaxnm
    2, // llvm.aarch64.sve.fmaxnmp
    2, // llvm.aarch64.sve.fmaxnmv
    2, // llvm.aarch64.sve.fmaxp
    2, // llvm.aarch64.sve.fmaxv
    2, // llvm.aarch64.sve.fmin
    2, // llvm.aarch64.sve.fminnm
    2, // llvm.aarch64.sve.fminnmp
    2, // llvm.aarch64.sve.fminnmv
    2, // llvm.aarch64.sve.fminp
    2, // llvm.aarch64.sve.fminv
    2, // llvm.aarch64.sve.fmla
    66, // llvm.aarch64.sve.fmla.lane
    2, // llvm.aarch64.sve.fmlalb
    66, // llvm.aarch64.sve.fmlalb.lane
    2, // llvm.aarch64.sve.fmlalt
    66, // llvm.aarch64.sve.fmlalt.lane
    2, // llvm.aarch64.sve.fmls
    66, // llvm.aarch64.sve.fmls.lane
    2, // llvm.aarch64.sve.fmlslb
    66, // llvm.aarch64.sve.fmlslb.lane
    2, // llvm.aarch64.sve.fmlslt
    66, // llvm.aarch64.sve.fmlslt.lane
    2, // llvm.aarch64.sve.fmmla
    2, // llvm.aarch64.sve.fmsb
    2, // llvm.aarch64.sve.fmul
    32, // llvm.aarch64.sve.fmul.lane
    2, // llvm.aarch64.sve.fmulx
    2, // llvm.aarch64.sve.fneg
    2, // llvm.aarch64.sve.fnmad
    2, // llvm.aarch64.sve.fnmla
    2, // llvm.aarch64.sve.fnmls
    2, // llvm.aarch64.sve.fnmsb
    2, // llvm.aarch64.sve.frecpe.x
    2, // llvm.aarch64.sve.frecps.x
    2, // llvm.aarch64.sve.frecpx
    2, // llvm.aarch64.sve.frinta
    2, // llvm.aarch64.sve.frinti
    2, // llvm.aarch64.sve.frintm
    2, // llvm.aarch64.sve.frintn
    2, // llvm.aarch64.sve.frintp
    2, // llvm.aarch64.sve.frintx
    2, // llvm.aarch64.sve.frintz
    2, // llvm.aarch64.sve.frsqrte.x
    2, // llvm.aarch64.sve.frsqrts.x
    2, // llvm.aarch64.sve.fscale
    2, // llvm.aarch64.sve.fsqrt
    2, // llvm.aarch64.sve.fsub
    2, // llvm.aarch64.sve.fsubr
    32, // llvm.aarch64.sve.ftmad.x
    2, // llvm.aarch64.sve.ftsmul.x
    2, // llvm.aarch64.sve.ftssel.x
    2, // llvm.aarch64.sve.histcnt
    2, // llvm.aarch64.sve.histseg
    2, // llvm.aarch64.sve.index
    2, // llvm.aarch64.sve.insr
    2, // llvm.aarch64.sve.lasta
    2, // llvm.aarch64.sve.lastb
    3, // llvm.aarch64.sve.ld1
    3, // llvm.aarch64.sve.ld1.gather
    3, // llvm.aarch64.sve.ld1.gather.index
    21, // llvm.aarch64.sve.ld1.gather.scalar.offset
    3, // llvm.aarch64.sve.ld1.gather.sxtw
    3, // llvm.aarch64.sve.ld1.gather.sxtw.index
    3, // llvm.aarch64.sve.ld1.gather.uxtw
    3, // llvm.aarch64.sve.ld1.gather.uxtw.index
    3, // llvm.aarch64.sve.ld1ro
    3, // llvm.aarch64.sve.ld1rq
    3, // llvm.aarch64.sve.ld2
    3, // llvm.aarch64.sve.ld3
    3, // llvm.aarch64.sve.ld4
    3, // llvm.aarch64.sve.ldff1
    3, // llvm.aarch64.sve.ldff1.gather
    3, // llvm.aarch64.sve.ldff1.gather.index
    21, // llvm.aarch64.sve.ldff1.gather.scalar.offset
    3, // llvm.aarch64.sve.ldff1.gather.sxtw
    3, // llvm.aarch64.sve.ldff1.gather.sxtw.index
    3, // llvm.aarch64.sve.ldff1.gather.uxtw
    3, // llvm.aarch64.sve.ldff1.gather.uxtw.index
    3, // llvm.aarch64.sve.ldnf1
    3, // llvm.aarch64.sve.ldnt1
    3, // llvm.aarch64.sve.ldnt1.gather
    3, // llvm.aarch64.sve.ldnt1.gather.index
    21, // llvm.aarch64.sve.ldnt1.gather.scalar.offset
    3, // llvm.aarch64.sve.ldnt1.gather.uxtw
    2, // llvm.aarch64.sve.lsl
    2, // llvm.aarch64.sve.lsl.wide
    2, // llvm.aarch64.sve.lsr
    2, // llvm.aarch64.sve.lsr.wide
    2, // llvm.aarch64.sve.mad
    2, // llvm.aarch64.sve.match
    2, // llvm.aarch64.sve.mla
    66, // llvm.aarch64.sve.mla.lane
    2, // llvm.aarch64.sve.mls
    66, // llvm.aarch64.sve.mls.lane
    2, // llvm.aarch64.sve.msb
    2, // llvm.aarch64.sve.mul
    32, // llvm.aarch64.sve.mul.lane
    2, // llvm.aarch64.sve.nand.z
    2, // llvm.aarch64.sve.nbsl
    2, // llvm.aarch64.sve.neg
    2, // llvm.aarch64.sve.nmatch
    2, // llvm.aarch64.sve.nor.z
    2, // llvm.aarch64.sve.not
    2, // llvm.aarch64.sve.orn.z
    2, // llvm.aarch64.sve.orr
    2, // llvm.aarch64.sve.orr.z
    2, // llvm.aarch64.sve.orv
    2, // llvm.aarch64.sve.pfirst
    2, // llvm.aarch64.sve.pmul
    2, // llvm.aarch64.sve.pmullb.pair
    2, // llvm.aarch64.sve.pmullt.pair
    2, // llvm.aarch64.sve.pnext
    69, // llvm.aarch64.sve.prf
    70, // llvm.aarch64.sve.prfb.gather.index
    71, // llvm.aarch64.sve.prfb.gather.scalar.offset
    70, // llvm.aarch64.sve.prfb.gather.sxtw.index
    70, // llvm.aarch64.sve.prfb.gather.uxtw.index
    70, // llvm.aarch64.sve.prfd.gather.index
    71, // llvm.aarch64.sve.prfd.gather.scalar.offset
    70, // llvm.aarch64.sve.prfd.gather.sxtw.index
    70, // llvm.aarch64.sve.prfd.gather.uxtw.index
    70, // llvm.aarch64.sve.prfh.gather.index
    71, // llvm.aarch64.sve.prfh.gather.scalar.offset
    70, // llvm.aarch64.sve.prfh.gather.sxtw.index
    70, // llvm.aarch64.sve.prfh.gather.uxtw.index
    70, // llvm.aarch64.sve.prfw.gather.index
    71, // llvm.aarch64.sve.prfw.gather.scalar.offset
    70, // llvm.aarch64.sve.prfw.gather.sxtw.index
    70, // llvm.aarch64.sve.prfw.gather.uxtw.index
    2, // llvm.aarch64.sve.ptest.any
    2, // llvm.aarch64.sve.ptest.first
    2, // llvm.aarch64.sve.ptest.last
    24, // llvm.aarch64.sve.ptrue
    2, // llvm.aarch64.sve.punpkhi
    2, // llvm.aarch64.sve.punpklo
    2, // llvm.aarch64.sve.raddhnb
    2, // llvm.aarch64.sve.raddhnt
    2, // llvm.aarch64.sve.rax1
    2, // llvm.aarch64.sve.rbit
    7, // llvm.aarch64.sve.rdffr
    7, // llvm.aarch64.sve.rdffr.z
    2, // llvm.aarch64.sve.rev
    2, // llvm.aarch64.sve.revb
    2, // llvm.aarch64.sve.revh
    2, // llvm.aarch64.sve.revw
    52, // llvm.aarch64.sve.rshrnb
    32, // llvm.aarch64.sve.rshrnt
    2, // llvm.aarch64.sve.rsubhnb
    2, // llvm.aarch64.sve.rsubhnt
    2, // llvm.aarch64.sve.saba
    2, // llvm.aarch64.sve.sabalb
    2, // llvm.aarch64.sve.sabalt
    2, // llvm.aarch64.sve.sabd
    2, // llvm.aarch64.sve.sabdlb
    2, // llvm.aarch64.sve.sabdlt
    2, // llvm.aarch64.sve.sadalp
    2, // llvm.aarch64.sve.saddlb
    2, // llvm.aarch64.sve.saddlbt
    2, // llvm.aarch64.sve.saddlt
    2, // llvm.aarch64.sve.saddv
    2, // llvm.aarch64.sve.saddwb
    2, // llvm.aarch64.sve.saddwt
    2, // llvm.aarch64.sve.sbclb
    2, // llvm.aarch64.sve.sbclt
    2, // llvm.aarch64.sve.scvtf
    2, // llvm.aarch64.sve.scvtf.f16i32
    2, // llvm.aarch64.sve.scvtf.f16i64
    2, // llvm.aarch64.sve.scvtf.f32i64
    2, // llvm.aarch64.sve.scvtf.f64i32
    2, // llvm.aarch64.sve.sdiv
    2, // llvm.aarch64.sve.sdivr
    2, // llvm.aarch64.sve.sdot
    66, // llvm.aarch64.sve.sdot.lane
    2, // llvm.aarch64.sve.sel
    7, // llvm.aarch64.sve.setffr
    2, // llvm.aarch64.sve.shadd
    52, // llvm.aarch64.sve.shrnb
    32, // llvm.aarch64.sve.shrnt
    2, // llvm.aarch64.sve.shsub
    2, // llvm.aarch64.sve.shsubr
    32, // llvm.aarch64.sve.sli
    2, // llvm.aarch64.sve.sm4e
    2, // llvm.aarch64.sve.sm4ekey
    2, // llvm.aarch64.sve.smax
    2, // llvm.aarch64.sve.smaxp
    2, // llvm.aarch64.sve.smaxv
    2, // llvm.aarch64.sve.smin
    2, // llvm.aarch64.sve.sminp
    2, // llvm.aarch64.sve.sminv
    2, // llvm.aarch64.sve.smlalb
    66, // llvm.aarch64.sve.smlalb.lane
    2, // llvm.aarch64.sve.smlalt
    66, // llvm.aarch64.sve.smlalt.lane
    2, // llvm.aarch64.sve.smlslb
    66, // llvm.aarch64.sve.smlslb.lane
    2, // llvm.aarch64.sve.smlslt
    66, // llvm.aarch64.sve.smlslt.lane
    2, // llvm.aarch64.sve.smmla
    2, // llvm.aarch64.sve.smulh
    2, // llvm.aarch64.sve.smullb
    32, // llvm.aarch64.sve.smullb.lane
    2, // llvm.aarch64.sve.smullt
    32, // llvm.aarch64.sve.smullt.lane
    2, // llvm.aarch64.sve.splice
    2, // llvm.aarch64.sve.sqabs
    2, // llvm.aarch64.sve.sqadd
    2, // llvm.aarch64.sve.sqadd.x
    32, // llvm.aarch64.sve.sqcadd.x
    51, // llvm.aarch64.sve.sqdecb.n32
    51, // llvm.aarch64.sve.sqdecb.n64
    51, // llvm.aarch64.sve.sqdecd
    51, // llvm.aarch64.sve.sqdecd.n32
    51, // llvm.aarch64.sve.sqdecd.n64
    51, // llvm.aarch64.sve.sqdech
    51, // llvm.aarch64.sve.sqdech.n32
    51, // llvm.aarch64.sve.sqdech.n64
    2, // llvm.aarch64.sve.sqdecp
    2, // llvm.aarch64.sve.sqdecp.n32
    2, // llvm.aarch64.sve.sqdecp.n64
    51, // llvm.aarch64.sve.sqdecw
    51, // llvm.aarch64.sve.sqdecw.n32
    51, // llvm.aarch64.sve.sqdecw.n64
    2, // llvm.aarch64.sve.sqdmlalb
    66, // llvm.aarch64.sve.sqdmlalb.lane
    2, // llvm.aarch64.sve.sqdmlalbt
    2, // llvm.aarch64.sve.sqdmlalt
    66, // llvm.aarch64.sve.sqdmlalt.lane
    2, // llvm.aarch64.sve.sqdmlslb
    66, // llvm.aarch64.sve.sqdmlslb.lane
    2, // llvm.aarch64.sve.sqdmlslbt
    2, // llvm.aarch64.sve.sqdmlslt
    66, // llvm.aarch64.sve.sqdmlslt.lane
    2, // llvm.aarch64.sve.sqdmulh
    32, // llvm.aarch64.sve.sqdmulh.lane
    2, // llvm.aarch64.sve.sqdmullb
    32, // llvm.aarch64.sve.sqdmullb.lane
    2, // llvm.aarch64.sve.sqdmullt
    32, // llvm.aarch64.sve.sqdmullt.lane
    51, // llvm.aarch64.sve.sqincb.n32
    51, // llvm.aarch64.sve.sqincb.n64
    51, // llvm.aarch64.sve.sqincd
    51, // llvm.aarch64.sve.sqincd.n32
    51, // llvm.aarch64.sve.sqincd.n64
    51, // llvm.aarch64.sve.sqinch
    51, // llvm.aarch64.sve.sqinch.n32
    51, // llvm.aarch64.sve.sqinch.n64
    2, // llvm.aarch64.sve.sqincp
    2, // llvm.aarch64.sve.sqincp.n32
    2, // llvm.aarch64.sve.sqincp.n64
    51, // llvm.aarch64.sve.sqincw
    51, // llvm.aarch64.sve.sqincw.n32
    51, // llvm.aarch64.sve.sqincw.n64
    2, // llvm.aarch64.sve.sqneg
    67, // llvm.aarch64.sve.sqrdcmlah.lane.x
    66, // llvm.aarch64.sve.sqrdcmlah.x
    2, // llvm.aarch64.sve.sqrdmlah
    66, // llvm.aarch64.sve.sqrdmlah.lane
    2, // llvm.aarch64.sve.sqrdmlsh
    66, // llvm.aarch64.sve.sqrdmlsh.lane
    2, // llvm.aarch64.sve.sqrdmulh
    32, // llvm.aarch64.sve.sqrdmulh.lane
    2, // llvm.aarch64.sve.sqrshl
    52, // llvm.aarch64.sve.sqrshrnb
    32, // llvm.aarch64.sve.sqrshrnt
    52, // llvm.aarch64.sve.sqrshrunb
    32, // llvm.aarch64.sve.sqrshrunt
    2, // llvm.aarch64.sve.sqshl
    32, // llvm.aarch64.sve.sqshlu
    52, // llvm.aarch64.sve.sqshrnb
    32, // llvm.aarch64.sve.sqshrnt
    52, // llvm.aarch64.sve.sqshrunb
    32, // llvm.aarch64.sve.sqshrunt
    2, // llvm.aarch64.sve.sqsub
    2, // llvm.aarch64.sve.sqsub.x
    2, // llvm.aarch64.sve.sqsubr
    2, // llvm.aarch64.sve.sqxtnb
    2, // llvm.aarch64.sve.sqxtnt
    2, // llvm.aarch64.sve.sqxtunb
    2, // llvm.aarch64.sve.sqxtunt
    2, // llvm.aarch64.sve.srhadd
    32, // llvm.aarch64.sve.sri
    2, // llvm.aarch64.sve.srshl
    32, // llvm.aarch64.sve.srshr
    32, // llvm.aarch64.sve.srsra
    52, // llvm.aarch64.sve.sshllb
    52, // llvm.aarch64.sve.sshllt
    32, // llvm.aarch64.sve.ssra
    2, // llvm.aarch64.sve.ssublb
    2, // llvm.aarch64.sve.ssublbt
    2, // llvm.aarch64.sve.ssublt
    2, // llvm.aarch64.sve.ssubltb
    2, // llvm.aarch64.sve.ssubwb
    2, // llvm.aarch64.sve.ssubwt
    60, // llvm.aarch64.sve.st1
    72, // llvm.aarch64.sve.st1.scatter
    72, // llvm.aarch64.sve.st1.scatter.index
    65, // llvm.aarch64.sve.st1.scatter.scalar.offset
    72, // llvm.aarch64.sve.st1.scatter.sxtw
    72, // llvm.aarch64.sve.st1.scatter.sxtw.index
    72, // llvm.aarch64.sve.st1.scatter.uxtw
    72, // llvm.aarch64.sve.st1.scatter.uxtw.index
    61, // llvm.aarch64.sve.st2
    62, // llvm.aarch64.sve.st3
    63, // llvm.aarch64.sve.st4
    60, // llvm.aarch64.sve.stnt1
    72, // llvm.aarch64.sve.stnt1.scatter
    72, // llvm.aarch64.sve.stnt1.scatter.index
    65, // llvm.aarch64.sve.stnt1.scatter.scalar.offset
    72, // llvm.aarch64.sve.stnt1.scatter.uxtw
    2, // llvm.aarch64.sve.sub
    2, // llvm.aarch64.sve.subhnb
    2, // llvm.aarch64.sve.subhnt
    2, // llvm.aarch64.sve.subr
    66, // llvm.aarch64.sve.sudot.lane
    2, // llvm.aarch64.sve.sunpkhi
    2, // llvm.aarch64.sve.sunpklo
    2, // llvm.aarch64.sve.suqadd
    2, // llvm.aarch64.sve.sxtb
    2, // llvm.aarch64.sve.sxth
    2, // llvm.aarch64.sve.sxtw
    2, // llvm.aarch64.sve.tbl
    2, // llvm.aarch64.sve.tbl2
    2, // llvm.aarch64.sve.tbx
    2, // llvm.aarch64.sve.trn1
    2, // llvm.aarch64.sve.trn1q
    2, // llvm.aarch64.sve.trn2
    2, // llvm.aarch64.sve.trn2q
    21, // llvm.aarch64.sve.tuple.create2
    21, // llvm.aarch64.sve.tuple.create3
    21, // llvm.aarch64.sve.tuple.create4
    73, // llvm.aarch64.sve.tuple.get
    74, // llvm.aarch64.sve.tuple.set
    2, // llvm.aarch64.sve.uaba
    2, // llvm.aarch64.sve.uabalb
    2, // llvm.aarch64.sve.uabalt
    2, // llvm.aarch64.sve.uabd
    2, // llvm.aarch64.sve.uabdlb
    2, // llvm.aarch64.sve.uabdlt
    2, // llvm.aarch64.sve.uadalp
    2, // llvm.aarch64.sve.uaddlb
    2, // llvm.aarch64.sve.uaddlt
    2, // llvm.aarch64.sve.uaddv
    2, // llvm.aarch64.sve.uaddwb
    2, // llvm.aarch64.sve.uaddwt
    2, // llvm.aarch64.sve.ucvtf
    2, // llvm.aarch64.sve.ucvtf.f16i32
    2, // llvm.aarch64.sve.ucvtf.f16i64
    2, // llvm.aarch64.sve.ucvtf.f32i64
    2, // llvm.aarch64.sve.ucvtf.f64i32
    2, // llvm.aarch64.sve.udiv
    2, // llvm.aarch64.sve.udivr
    2, // llvm.aarch64.sve.udot
    66, // llvm.aarch64.sve.udot.lane
    2, // llvm.aarch64.sve.uhadd
    2, // llvm.aarch64.sve.uhsub
    2, // llvm.aarch64.sve.uhsubr
    2, // llvm.aarch64.sve.umax
    2, // llvm.aarch64.sve.umaxp
    2, // llvm.aarch64.sve.umaxv
    2, // llvm.aarch64.sve.umin
    2, // llvm.aarch64.sve.uminp
    2, // llvm.aarch64.sve.uminv
    2, // llvm.aarch64.sve.umlalb
    66, // llvm.aarch64.sve.umlalb.lane
    2, // llvm.aarch64.sve.umlalt
    66, // llvm.aarch64.sve.umlalt.lane
    2, // llvm.aarch64.sve.umlslb
    66, // llvm.aarch64.sve.umlslb.lane
    2, // llvm.aarch64.sve.umlslt
    66, // llvm.aarch64.sve.umlslt.lane
    2, // llvm.aarch64.sve.ummla
    2, // llvm.aarch64.sve.umulh
    2, // llvm.aarch64.sve.umullb
    32, // llvm.aarch64.sve.umullb.lane
    2, // llvm.aarch64.sve.umullt
    32, // llvm.aarch64.sve.umullt.lane
    2, // llvm.aarch64.sve.uqadd
    2, // llvm.aarch64.sve.uqadd.x
    51, // llvm.aarch64.sve.uqdecb.n32
    51, // llvm.aarch64.sve.uqdecb.n64
    51, // llvm.aarch64.sve.uqdecd
    51, // llvm.aarch64.sve.uqdecd.n32
    51, // llvm.aarch64.sve.uqdecd.n64
    51, // llvm.aarch64.sve.uqdech
    51, // llvm.aarch64.sve.uqdech.n32
    51, // llvm.aarch64.sve.uqdech.n64
    2, // llvm.aarch64.sve.uqdecp
    2, // llvm.aarch64.sve.uqdecp.n32
    2, // llvm.aarch64.sve.uqdecp.n64
    51, // llvm.aarch64.sve.uqdecw
    51, // llvm.aarch64.sve.uqdecw.n32
    51, // llvm.aarch64.sve.uqdecw.n64
    51, // llvm.aarch64.sve.uqincb.n32
    51, // llvm.aarch64.sve.uqincb.n64
    51, // llvm.aarch64.sve.uqincd
    51, // llvm.aarch64.sve.uqincd.n32
    51, // llvm.aarch64.sve.uqincd.n64
    51, // llvm.aarch64.sve.uqinch
    51, // llvm.aarch64.sve.uqinch.n32
    51, // llvm.aarch64.sve.uqinch.n64
    2, // llvm.aarch64.sve.uqincp
    2, // llvm.aarch64.sve.uqincp.n32
    2, // llvm.aarch64.sve.uqincp.n64
    51, // llvm.aarch64.sve.uqincw
    51, // llvm.aarch64.sve.uqincw.n32
    51, // llvm.aarch64.sve.uqincw.n64
    2, // llvm.aarch64.sve.uqrshl
    52, // llvm.aarch64.sve.uqrshrnb
    32, // llvm.aarch64.sve.uqrshrnt
    2, // llvm.aarch64.sve.uqshl
    52, // llvm.aarch64.sve.uqshrnb
    32, // llvm.aarch64.sve.uqshrnt
    2, // llvm.aarch64.sve.uqsub
    2, // llvm.aarch64.sve.uqsub.x
    2, // llvm.aarch64.sve.uqsubr
    2, // llvm.aarch64.sve.uqxtnb
    2, // llvm.aarch64.sve.uqxtnt
    2, // llvm.aarch64.sve.urecpe
    2, // llvm.aarch64.sve.urhadd
    2, // llvm.aarch64.sve.urshl
    32, // llvm.aarch64.sve.urshr
    2, // llvm.aarch64.sve.ursqrte
    32, // llvm.aarch64.sve.ursra
    2, // llvm.aarch64.sve.usdot
    66, // llvm.aarch64.sve.usdot.lane
    52, // llvm.aarch64.sve.ushllb
    52, // llvm.aarch64.sve.ushllt
    2, // llvm.aarch64.sve.usmmla
    2, // llvm.aarch64.sve.usqadd
    32, // llvm.aarch64.sve.usra
    2, // llvm.aarch64.sve.usublb
    2, // llvm.aarch64.sve.usublt
    2, // llvm.aarch64.sve.usubwb
    2, // llvm.aarch64.sve.usubwt
    2, // llvm.aarch64.sve.uunpkhi
    2, // llvm.aarch64.sve.uunpklo
    2, // llvm.aarch64.sve.uxtb
    2, // llvm.aarch64.sve.uxth
    2, // llvm.aarch64.sve.uxtw
    2, // llvm.aarch64.sve.uzp1
    2, // llvm.aarch64.sve.uzp1q
    2, // llvm.aarch64.sve.uzp2
    2, // llvm.aarch64.sve.uzp2q
    2, // llvm.aarch64.sve.whilege
    2, // llvm.aarch64.sve.whilegt
    2, // llvm.aarch64.sve.whilehi
    2, // llvm.aarch64.sve.whilehs
    2, // llvm.aarch64.sve.whilele
    2, // llvm.aarch64.sve.whilelo
    2, // llvm.aarch64.sve.whilels
    2, // llvm.aarch64.sve.whilelt
    7, // llvm.aarch64.sve.whilerw.b
    7, // llvm.aarch64.sve.whilerw.d
    7, // llvm.aarch64.sve.whilerw.h
    7, // llvm.aarch64.sve.whilerw.s
    7, // llvm.aarch64.sve.whilewr.b
    7, // llvm.aarch64.sve.whilewr.d
    7, // llvm.aarch64.sve.whilewr.h
    7, // llvm.aarch64.sve.whilewr.s
    7, // llvm.aarch64.sve.wrffr
    32, // llvm.aarch64.sve.xar
    2, // llvm.aarch64.sve.zip1
    2, // llvm.aarch64.sve.zip1q
    2, // llvm.aarch64.sve.zip2
    2, // llvm.aarch64.sve.zip2q
    32, // llvm.aarch64.tagp
    75, // llvm.aarch64.tcancel
    7, // llvm.aarch64.tcommit
    7, // llvm.aarch64.tstart
    59, // llvm.aarch64.ttest
    2, // llvm.aarch64.udiv
    6, // llvm.amdgcn.alignbit
    6, // llvm.amdgcn.alignbyte
    76, // llvm.amdgcn.atomic.dec
    76, // llvm.amdgcn.atomic.inc
    31, // llvm.amdgcn.ballot
    77, // llvm.amdgcn.buffer.atomic.add
    77, // llvm.amdgcn.buffer.atomic.and
    78, // llvm.amdgcn.buffer.atomic.cmpswap
    77, // llvm.amdgcn.buffer.atomic.csub
    79, // llvm.amdgcn.buffer.atomic.fadd
    77, // llvm.amdgcn.buffer.atomic.or
    77, // llvm.amdgcn.buffer.atomic.smax
    77, // llvm.amdgcn.buffer.atomic.smin
    77, // llvm.amdgcn.buffer.atomic.sub
    77, // llvm.amdgcn.buffer.atomic.swap
    77, // llvm.amdgcn.buffer.atomic.umax
    77, // llvm.amdgcn.buffer.atomic.umin
    77, // llvm.amdgcn.buffer.atomic.xor
    80, // llvm.amdgcn.buffer.load
    80, // llvm.amdgcn.buffer.load.format
    81, // llvm.amdgcn.buffer.store
    81, // llvm.amdgcn.buffer.store.format
    82, // llvm.amdgcn.buffer.wbinvl1
    82, // llvm.amdgcn.buffer.wbinvl1.sc
    82, // llvm.amdgcn.buffer.wbinvl1.vol
    6, // llvm.amdgcn.class
    6, // llvm.amdgcn.cos
    6, // llvm.amdgcn.cubeid
    6, // llvm.amdgcn.cubema
    6, // llvm.amdgcn.cubesc
    6, // llvm.amdgcn.cubetc
    6, // llvm.amdgcn.cvt.pk.i16
    6, // llvm.amdgcn.cvt.pk.u16
    6, // llvm.amdgcn.cvt.pk.u8.f32
    6, // llvm.amdgcn.cvt.pknorm.i16
    6, // llvm.amdgcn.cvt.pknorm.u16
    6, // llvm.amdgcn.cvt.pkrtz
    6, // llvm.amdgcn.dispatch.id
    83, // llvm.amdgcn.dispatch.ptr
    6, // llvm.amdgcn.div.fixup
    6, // llvm.amdgcn.div.fmas
    54, // llvm.amdgcn.div.scale
    84, // llvm.amdgcn.ds.append
    31, // llvm.amdgcn.ds.bpermute
    84, // llvm.amdgcn.ds.consume
    76, // llvm.amdgcn.ds.fadd
    76, // llvm.amdgcn.ds.fmax
    76, // llvm.amdgcn.ds.fmin
    85, // llvm.amdgcn.ds.gws.barrier
    86, // llvm.amdgcn.ds.gws.init
    85, // llvm.amdgcn.ds.gws.sema.br
    85, // llvm.amdgcn.ds.gws.sema.p
    85, // llvm.amdgcn.ds.gws.sema.release.all
    85, // llvm.amdgcn.ds.gws.sema.v
    87, // llvm.amdgcn.ds.ordered.add
    87, // llvm.amdgcn.ds.ordered.swap
    31, // llvm.amdgcn.ds.permute
    88, // llvm.amdgcn.ds.swizzle
    89, // llvm.amdgcn.else
    89, // llvm.amdgcn.end.cf
    90, // llvm.amdgcn.exp
    91, // llvm.amdgcn.exp.compr
    92, // llvm.amdgcn.fcmp
    6, // llvm.amdgcn.fdiv.fast
    93, // llvm.amdgcn.fdot2
    6, // llvm.amdgcn.fma.legacy
    6, // llvm.amdgcn.fmad.ftz
    6, // llvm.amdgcn.fmed3
    6, // llvm.amdgcn.fmul.legacy
    6, // llvm.amdgcn.fract
    6, // llvm.amdgcn.frexp.exp
    6, // llvm.amdgcn.frexp.mant
    94, // llvm.amdgcn.global.atomic.csub
    94, // llvm.amdgcn.global.atomic.fadd
    6, // llvm.amdgcn.groupstaticsize
    92, // llvm.amdgcn.icmp
    89, // llvm.amdgcn.if
    31, // llvm.amdgcn.if.break
    95, // llvm.amdgcn.image.atomic.add.1d
    96, // llvm.amdgcn.image.atomic.add.1darray
    96, // llvm.amdgcn.image.atomic.add.2d
    97, // llvm.amdgcn.image.atomic.add.2darray
    98, // llvm.amdgcn.image.atomic.add.2darraymsaa
    97, // llvm.amdgcn.image.atomic.add.2dmsaa
    97, // llvm.amdgcn.image.atomic.add.3d
    97, // llvm.amdgcn.image.atomic.add.cube
    95, // llvm.amdgcn.image.atomic.and.1d
    96, // llvm.amdgcn.image.atomic.and.1darray
    96, // llvm.amdgcn.image.atomic.and.2d
    97, // llvm.amdgcn.image.atomic.and.2darray
    98, // llvm.amdgcn.image.atomic.and.2darraymsaa
    97, // llvm.amdgcn.image.atomic.and.2dmsaa
    97, // llvm.amdgcn.image.atomic.and.3d
    97, // llvm.amdgcn.image.atomic.and.cube
    96, // llvm.amdgcn.image.atomic.cmpswap.1d
    97, // llvm.amdgcn.image.atomic.cmpswap.1darray
    97, // llvm.amdgcn.image.atomic.cmpswap.2d
    98, // llvm.amdgcn.image.atomic.cmpswap.2darray
    99, // llvm.amdgcn.image.atomic.cmpswap.2darraymsaa
    98, // llvm.amdgcn.image.atomic.cmpswap.2dmsaa
    98, // llvm.amdgcn.image.atomic.cmpswap.3d
    98, // llvm.amdgcn.image.atomic.cmpswap.cube
    95, // llvm.amdgcn.image.atomic.dec.1d
    96, // llvm.amdgcn.image.atomic.dec.1darray
    96, // llvm.amdgcn.image.atomic.dec.2d
    97, // llvm.amdgcn.image.atomic.dec.2darray
    98, // llvm.amdgcn.image.atomic.dec.2darraymsaa
    97, // llvm.amdgcn.image.atomic.dec.2dmsaa
    97, // llvm.amdgcn.image.atomic.dec.3d
    97, // llvm.amdgcn.image.atomic.dec.cube
    95, // llvm.amdgcn.image.atomic.inc.1d
    96, // llvm.amdgcn.image.atomic.inc.1darray
    96, // llvm.amdgcn.image.atomic.inc.2d
    97, // llvm.amdgcn.image.atomic.inc.2darray
    98, // llvm.amdgcn.image.atomic.inc.2darraymsaa
    97, // llvm.amdgcn.image.atomic.inc.2dmsaa
    97, // llvm.amdgcn.image.atomic.inc.3d
    97, // llvm.amdgcn.image.atomic.inc.cube
    95, // llvm.amdgcn.image.atomic.or.1d
    96, // llvm.amdgcn.image.atomic.or.1darray
    96, // llvm.amdgcn.image.atomic.or.2d
    97, // llvm.amdgcn.image.atomic.or.2darray
    98, // llvm.amdgcn.image.atomic.or.2darraymsaa
    97, // llvm.amdgcn.image.atomic.or.2dmsaa
    97, // llvm.amdgcn.image.atomic.or.3d
    97, // llvm.amdgcn.image.atomic.or.cube
    95, // llvm.amdgcn.image.atomic.smax.1d
    96, // llvm.amdgcn.image.atomic.smax.1darray
    96, // llvm.amdgcn.image.atomic.smax.2d
    97, // llvm.amdgcn.image.atomic.smax.2darray
    98, // llvm.amdgcn.image.atomic.smax.2darraymsaa
    97, // llvm.amdgcn.image.atomic.smax.2dmsaa
    97, // llvm.amdgcn.image.atomic.smax.3d
    97, // llvm.amdgcn.image.atomic.smax.cube
    95, // llvm.amdgcn.image.atomic.smin.1d
    96, // llvm.amdgcn.image.atomic.smin.1darray
    96, // llvm.amdgcn.image.atomic.smin.2d
    97, // llvm.amdgcn.image.atomic.smin.2darray
    98, // llvm.amdgcn.image.atomic.smin.2darraymsaa
    97, // llvm.amdgcn.image.atomic.smin.2dmsaa
    97, // llvm.amdgcn.image.atomic.smin.3d
    97, // llvm.amdgcn.image.atomic.smin.cube
    95, // llvm.amdgcn.image.atomic.sub.1d
    96, // llvm.amdgcn.image.atomic.sub.1darray
    96, // llvm.amdgcn.image.atomic.sub.2d
    97, // llvm.amdgcn.image.atomic.sub.2darray
    98, // llvm.amdgcn.image.atomic.sub.2darraymsaa
    97, // llvm.amdgcn.image.atomic.sub.2dmsaa
    97, // llvm.amdgcn.image.atomic.sub.3d
    97, // llvm.amdgcn.image.atomic.sub.cube
    95, // llvm.amdgcn.image.atomic.swap.1d
    96, // llvm.amdgcn.image.atomic.swap.1darray
    96, // llvm.amdgcn.image.atomic.swap.2d
    97, // llvm.amdgcn.image.atomic.swap.2darray
    98, // llvm.amdgcn.image.atomic.swap.2darraymsaa
    97, // llvm.amdgcn.image.atomic.swap.2dmsaa
    97, // llvm.amdgcn.image.atomic.swap.3d
    97, // llvm.amdgcn.image.atomic.swap.cube
    95, // llvm.amdgcn.image.atomic.umax.1d
    96, // llvm.amdgcn.image.atomic.umax.1darray
    96, // llvm.amdgcn.image.atomic.umax.2d
    97, // llvm.amdgcn.image.atomic.umax.2darray
    98, // llvm.amdgcn.image.atomic.umax.2darraymsaa
    97, // llvm.amdgcn.image.atomic.umax.2dmsaa
    97, // llvm.amdgcn.image.atomic.umax.3d
    97, // llvm.amdgcn.image.atomic.umax.cube
    95, // llvm.amdgcn.image.atomic.umin.1d
    96, // llvm.amdgcn.image.atomic.umin.1darray
    96, // llvm.amdgcn.image.atomic.umin.2d
    97, // llvm.amdgcn.image.atomic.umin.2darray
    98, // llvm.amdgcn.image.atomic.umin.2darraymsaa
    97, // llvm.amdgcn.image.atomic.umin.2dmsaa
    97, // llvm.amdgcn.image.atomic.umin.3d
    97, // llvm.amdgcn.image.atomic.umin.cube
    95, // llvm.amdgcn.image.atomic.xor.1d
    96, // llvm.amdgcn.image.atomic.xor.1darray
    96, // llvm.amdgcn.image.atomic.xor.2d
    97, // llvm.amdgcn.image.atomic.xor.2darray
    98, // llvm.amdgcn.image.atomic.xor.2darraymsaa
    97, // llvm.amdgcn.image.atomic.xor.2dmsaa
    97, // llvm.amdgcn.image.atomic.xor.3d
    97, // llvm.amdgcn.image.atomic.xor.cube
    21, // llvm.amdgcn.image.bvh.intersect.ray
    100, // llvm.amdgcn.image.gather4.2d
    101, // llvm.amdgcn.image.gather4.2darray
    101, // llvm.amdgcn.image.gather4.b.2d
    102, // llvm.amdgcn.image.gather4.b.2darray
    102, // llvm.amdgcn.image.gather4.b.cl.2d
    103, // llvm.amdgcn.image.gather4.b.cl.2darray
    103, // llvm.amdgcn.image.gather4.b.cl.cube
    103, // llvm.amdgcn.image.gather4.b.cl.o.2d
    104, // llvm.amdgcn.image.gather4.b.cl.o.2darray
    104, // llvm.amdgcn.image.gather4.b.cl.o.cube
    102, // llvm.amdgcn.image.gather4.b.cube
    102, // llvm.amdgcn.image.gather4.b.o.2d
    103, // llvm.amdgcn.image.gather4.b.o.2darray
    103, // llvm.amdgcn.image.gather4.b.o.cube
    101, // llvm.amdgcn.image.gather4.c.2d
    102, // llvm.amdgcn.image.gather4.c.2darray
    102, // llvm.amdgcn.image.gather4.c.b.2d
    103, // llvm.amdgcn.image.gather4.c.b.2darray
    103, // llvm.amdgcn.image.gather4.c.b.cl.2d
    104, // llvm.amdgcn.image.gather4.c.b.cl.2darray
    104, // llvm.amdgcn.image.gather4.c.b.cl.cube
    104, // llvm.amdgcn.image.gather4.c.b.cl.o.2d
    105, // llvm.amdgcn.image.gather4.c.b.cl.o.2darray
    105, // llvm.amdgcn.image.gather4.c.b.cl.o.cube
    103, // llvm.amdgcn.image.gather4.c.b.cube
    103, // llvm.amdgcn.image.gather4.c.b.o.2d
    104, // llvm.amdgcn.image.gather4.c.b.o.2darray
    104, // llvm.amdgcn.image.gather4.c.b.o.cube
    102, // llvm.amdgcn.image.gather4.c.cl.2d
    103, // llvm.amdgcn.image.gather4.c.cl.2darray
    103, // llvm.amdgcn.image.gather4.c.cl.cube
    103, // llvm.amdgcn.image.gather4.c.cl.o.2d
    104, // llvm.amdgcn.image.gather4.c.cl.o.2darray
    104, // llvm.amdgcn.image.gather4.c.cl.o.cube
    102, // llvm.amdgcn.image.gather4.c.cube
    102, // llvm.amdgcn.image.gather4.c.l.2d
    103, // llvm.amdgcn.image.gather4.c.l.2darray
    103, // llvm.amdgcn.image.gather4.c.l.cube
    103, // llvm.amdgcn.image.gather4.c.l.o.2d
    104, // llvm.amdgcn.image.gather4.c.l.o.2darray
    104, // llvm.amdgcn.image.gather4.c.l.o.cube
    101, // llvm.amdgcn.image.gather4.c.lz.2d
    102, // llvm.amdgcn.image.gather4.c.lz.2darray
    102, // llvm.amdgcn.image.gather4.c.lz.cube
    102, // llvm.amdgcn.image.gather4.c.lz.o.2d
    103, // llvm.amdgcn.image.gather4.c.lz.o.2darray
    103, // llvm.amdgcn.image.gather4.c.lz.o.cube
    102, // llvm.amdgcn.image.gather4.c.o.2d
    103, // llvm.amdgcn.image.gather4.c.o.2darray
    103, // llvm.amdgcn.image.gather4.c.o.cube
    101, // llvm.amdgcn.image.gather4.cl.2d
    102, // llvm.amdgcn.image.gather4.cl.2darray
    102, // llvm.amdgcn.image.gather4.cl.cube
    102, // llvm.amdgcn.image.gather4.cl.o.2d
    103, // llvm.amdgcn.image.gather4.cl.o.2darray
    103, // llvm.amdgcn.image.gather4.cl.o.cube
    101, // llvm.amdgcn.image.gather4.cube
    101, // llvm.amdgcn.image.gather4.l.2d
    102, // llvm.amdgcn.image.gather4.l.2darray
    102, // llvm.amdgcn.image.gather4.l.cube
    102, // llvm.amdgcn.image.gather4.l.o.2d
    103, // llvm.amdgcn.image.gather4.l.o.2darray
    103, // llvm.amdgcn.image.gather4.l.o.cube
    100, // llvm.amdgcn.image.gather4.lz.2d
    101, // llvm.amdgcn.image.gather4.lz.2darray
    101, // llvm.amdgcn.image.gather4.lz.cube
    101, // llvm.amdgcn.image.gather4.lz.o.2d
    102, // llvm.amdgcn.image.gather4.lz.o.2darray
    102, // llvm.amdgcn.image.gather4.lz.o.cube
    101, // llvm.amdgcn.image.gather4.o.2d
    102, // llvm.amdgcn.image.gather4.o.2darray
    102, // llvm.amdgcn.image.gather4.o.cube
    106, // llvm.amdgcn.image.getlod.1d
    107, // llvm.amdgcn.image.getlod.1darray
    107, // llvm.amdgcn.image.getlod.2d
    108, // llvm.amdgcn.image.getlod.2darray
    108, // llvm.amdgcn.image.getlod.3d
    108, // llvm.amdgcn.image.getlod.cube
    109, // llvm.amdgcn.image.getresinfo.1d
    109, // llvm.amdgcn.image.getresinfo.1darray
    109, // llvm.amdgcn.image.getresinfo.2d
    109, // llvm.amdgcn.image.getresinfo.2darray
    109, // llvm.amdgcn.image.getresinfo.2darraymsaa
    109, // llvm.amdgcn.image.getresinfo.2dmsaa
    109, // llvm.amdgcn.image.getresinfo.3d
    109, // llvm.amdgcn.image.getresinfo.cube
    110, // llvm.amdgcn.image.load.1d
    111, // llvm.amdgcn.image.load.1darray
    111, // llvm.amdgcn.image.load.2d
    112, // llvm.amdgcn.image.load.2darray
    113, // llvm.amdgcn.image.load.2darraymsaa
    112, // llvm.amdgcn.image.load.2dmsaa
    112, // llvm.amdgcn.image.load.3d
    112, // llvm.amdgcn.image.load.cube
    111, // llvm.amdgcn.image.load.mip.1d
    112, // llvm.amdgcn.image.load.mip.1darray
    112, // llvm.amdgcn.image.load.mip.2d
    113, // llvm.amdgcn.image.load.mip.2darray
    113, // llvm.amdgcn.image.load.mip.3d
    113, // llvm.amdgcn.image.load.mip.cube
    110, // llvm.amdgcn.image.msaa.load.1d
    111, // llvm.amdgcn.image.msaa.load.1darray
    111, // llvm.amdgcn.image.msaa.load.2d
    112, // llvm.amdgcn.image.msaa.load.2darray
    113, // llvm.amdgcn.image.msaa.load.2darraymsaa
    112, // llvm.amdgcn.image.msaa.load.2dmsaa
    112, // llvm.amdgcn.image.msaa.load.3d
    112, // llvm.amdgcn.image.msaa.load.cube
    114, // llvm.amdgcn.image.sample.1d
    100, // llvm.amdgcn.image.sample.1darray
    100, // llvm.amdgcn.image.sample.2d
    101, // llvm.amdgcn.image.sample.2darray
    101, // llvm.amdgcn.image.sample.3d
    100, // llvm.amdgcn.image.sample.b.1d
    101, // llvm.amdgcn.image.sample.b.1darray
    101, // llvm.amdgcn.image.sample.b.2d
    102, // llvm.amdgcn.image.sample.b.2darray
    102, // llvm.amdgcn.image.sample.b.3d
    101, // llvm.amdgcn.image.sample.b.cl.1d
    102, // llvm.amdgcn.image.sample.b.cl.1darray
    102, // llvm.amdgcn.image.sample.b.cl.2d
    103, // llvm.amdgcn.image.sample.b.cl.2darray
    103, // llvm.amdgcn.image.sample.b.cl.3d
    103, // llvm.amdgcn.image.sample.b.cl.cube
    102, // llvm.amdgcn.image.sample.b.cl.o.1d
    103, // llvm.amdgcn.image.sample.b.cl.o.1darray
    103, // llvm.amdgcn.image.sample.b.cl.o.2d
    104, // llvm.amdgcn.image.sample.b.cl.o.2darray
    104, // llvm.amdgcn.image.sample.b.cl.o.3d
    104, // llvm.amdgcn.image.sample.b.cl.o.cube
    102, // llvm.amdgcn.image.sample.b.cube
    101, // llvm.amdgcn.image.sample.b.o.1d
    102, // llvm.amdgcn.image.sample.b.o.1darray
    102, // llvm.amdgcn.image.sample.b.o.2d
    103, // llvm.amdgcn.image.sample.b.o.2darray
    103, // llvm.amdgcn.image.sample.b.o.3d
    103, // llvm.amdgcn.image.sample.b.o.cube
    100, // llvm.amdgcn.image.sample.c.1d
    101, // llvm.amdgcn.image.sample.c.1darray
    101, // llvm.amdgcn.image.sample.c.2d
    102, // llvm.amdgcn.image.sample.c.2darray
    102, // llvm.amdgcn.image.sample.c.3d
    101, // llvm.amdgcn.image.sample.c.b.1d
    102, // llvm.amdgcn.image.sample.c.b.1darray
    102, // llvm.amdgcn.image.sample.c.b.2d
    103, // llvm.amdgcn.image.sample.c.b.2darray
    103, // llvm.amdgcn.image.sample.c.b.3d
    102, // llvm.amdgcn.image.sample.c.b.cl.1d
    103, // llvm.amdgcn.image.sample.c.b.cl.1darray
    103, // llvm.amdgcn.image.sample.c.b.cl.2d
    104, // llvm.amdgcn.image.sample.c.b.cl.2darray
    104, // llvm.amdgcn.image.sample.c.b.cl.3d
    104, // llvm.amdgcn.image.sample.c.b.cl.cube
    103, // llvm.amdgcn.image.sample.c.b.cl.o.1d
    104, // llvm.amdgcn.image.sample.c.b.cl.o.1darray
    104, // llvm.amdgcn.image.sample.c.b.cl.o.2d
    105, // llvm.amdgcn.image.sample.c.b.cl.o.2darray
    105, // llvm.amdgcn.image.sample.c.b.cl.o.3d
    105, // llvm.amdgcn.image.sample.c.b.cl.o.cube
    103, // llvm.amdgcn.image.sample.c.b.cube
    102, // llvm.amdgcn.image.sample.c.b.o.1d
    103, // llvm.amdgcn.image.sample.c.b.o.1darray
    103, // llvm.amdgcn.image.sample.c.b.o.2d
    104, // llvm.amdgcn.image.sample.c.b.o.2darray
    104, // llvm.amdgcn.image.sample.c.b.o.3d
    104, // llvm.amdgcn.image.sample.c.b.o.cube
    102, // llvm.amdgcn.image.sample.c.cd.1d
    103, // llvm.amdgcn.image.sample.c.cd.1darray
    105, // llvm.amdgcn.image.sample.c.cd.2d
    115, // llvm.amdgcn.image.sample.c.cd.2darray
    116, // llvm.amdgcn.image.sample.c.cd.3d
    103, // llvm.amdgcn.image.sample.c.cd.cl.1d
    104, // llvm.amdgcn.image.sample.c.cd.cl.1darray
    115, // llvm.amdgcn.image.sample.c.cd.cl.2d
    117, // llvm.amdgcn.image.sample.c.cd.cl.2darray
    118, // llvm.amdgcn.image.sample.c.cd.cl.3d
    117, // llvm.amdgcn.image.sample.c.cd.cl.cube
    104, // llvm.amdgcn.image.sample.c.cd.cl.o.1d
    105, // llvm.amdgcn.image.sample.c.cd.cl.o.1darray
    117, // llvm.amdgcn.image.sample.c.cd.cl.o.2d
    116, // llvm.amdgcn.image.sample.c.cd.cl.o.2darray
    119, // llvm.amdgcn.image.sample.c.cd.cl.o.3d
    116, // llvm.amdgcn.image.sample.c.cd.cl.o.cube
    115, // llvm.amdgcn.image.sample.c.cd.cube
    103, // llvm.amdgcn.image.sample.c.cd.o.1d
    104, // llvm.amdgcn.image.sample.c.cd.o.1darray
    115, // llvm.amdgcn.image.sample.c.cd.o.2d
    117, // llvm.amdgcn.image.sample.c.cd.o.2darray
    118, // llvm.amdgcn.image.sample.c.cd.o.3d
    117, // llvm.amdgcn.image.sample.c.cd.o.cube
    101, // llvm.amdgcn.image.sample.c.cl.1d
    102, // llvm.amdgcn.image.sample.c.cl.1darray
    102, // llvm.amdgcn.image.sample.c.cl.2d
    103, // llvm.amdgcn.image.sample.c.cl.2darray
    103, // llvm.amdgcn.image.sample.c.cl.3d
    103, // llvm.amdgcn.image.sample.c.cl.cube
    102, // llvm.amdgcn.image.sample.c.cl.o.1d
    103, // llvm.amdgcn.image.sample.c.cl.o.1darray
    103, // llvm.amdgcn.image.sample.c.cl.o.2d
    104, // llvm.amdgcn.image.sample.c.cl.o.2darray
    104, // llvm.amdgcn.image.sample.c.cl.o.3d
    104, // llvm.amdgcn.image.sample.c.cl.o.cube
    102, // llvm.amdgcn.image.sample.c.cube
    102, // llvm.amdgcn.image.sample.c.d.1d
    103, // llvm.amdgcn.image.sample.c.d.1darray
    105, // llvm.amdgcn.image.sample.c.d.2d
    115, // llvm.amdgcn.image.sample.c.d.2darray
    116, // llvm.amdgcn.image.sample.c.d.3d
    103, // llvm.amdgcn.image.sample.c.d.cl.1d
    104, // llvm.amdgcn.image.sample.c.d.cl.1darray
    115, // llvm.amdgcn.image.sample.c.d.cl.2d
    117, // llvm.amdgcn.image.sample.c.d.cl.2darray
    118, // llvm.amdgcn.image.sample.c.d.cl.3d
    117, // llvm.amdgcn.image.sample.c.d.cl.cube
    104, // llvm.amdgcn.image.sample.c.d.cl.o.1d
    105, // llvm.amdgcn.image.sample.c.d.cl.o.1darray
    117, // llvm.amdgcn.image.sample.c.d.cl.o.2d
    116, // llvm.amdgcn.image.sample.c.d.cl.o.2darray
    119, // llvm.amdgcn.image.sample.c.d.cl.o.3d
    116, // llvm.amdgcn.image.sample.c.d.cl.o.cube
    115, // llvm.amdgcn.image.sample.c.d.cube
    103, // llvm.amdgcn.image.sample.c.d.o.1d
    104, // llvm.amdgcn.image.sample.c.d.o.1darray
    115, // llvm.amdgcn.image.sample.c.d.o.2d
    117, // llvm.amdgcn.image.sample.c.d.o.2darray
    118, // llvm.amdgcn.image.sample.c.d.o.3d
    117, // llvm.amdgcn.image.sample.c.d.o.cube
    101, // llvm.amdgcn.image.sample.c.l.1d
    102, // llvm.amdgcn.image.sample.c.l.1darray
    102, // llvm.amdgcn.image.sample.c.l.2d
    103, // llvm.amdgcn.image.sample.c.l.2darray
    103, // llvm.amdgcn.image.sample.c.l.3d
    103, // llvm.amdgcn.image.sample.c.l.cube
    102, // llvm.amdgcn.image.sample.c.l.o.1d
    103, // llvm.amdgcn.image.sample.c.l.o.1darray
    103, // llvm.amdgcn.image.sample.c.l.o.2d
    104, // llvm.amdgcn.image.sample.c.l.o.2darray
    104, // llvm.amdgcn.image.sample.c.l.o.3d
    104, // llvm.amdgcn.image.sample.c.l.o.cube
    100, // llvm.amdgcn.image.sample.c.lz.1d
    101, // llvm.amdgcn.image.sample.c.lz.1darray
    101, // llvm.amdgcn.image.sample.c.lz.2d
    102, // llvm.amdgcn.image.sample.c.lz.2darray
    102, // llvm.amdgcn.image.sample.c.lz.3d
    102, // llvm.amdgcn.image.sample.c.lz.cube
    101, // llvm.amdgcn.image.sample.c.lz.o.1d
    102, // llvm.amdgcn.image.sample.c.lz.o.1darray
    102, // llvm.amdgcn.image.sample.c.lz.o.2d
    103, // llvm.amdgcn.image.sample.c.lz.o.2darray
    103, // llvm.amdgcn.image.sample.c.lz.o.3d
    103, // llvm.amdgcn.image.sample.c.lz.o.cube
    101, // llvm.amdgcn.image.sample.c.o.1d
    102, // llvm.amdgcn.image.sample.c.o.1darray
    102, // llvm.amdgcn.image.sample.c.o.2d
    103, // llvm.amdgcn.image.sample.c.o.2darray
    103, // llvm.amdgcn.image.sample.c.o.3d
    103, // llvm.amdgcn.image.sample.c.o.cube
    101, // llvm.amdgcn.image.sample.cd.1d
    102, // llvm.amdgcn.image.sample.cd.1darray
    104, // llvm.amdgcn.image.sample.cd.2d
    105, // llvm.amdgcn.image.sample.cd.2darray
    117, // llvm.amdgcn.image.sample.cd.3d
    102, // llvm.amdgcn.image.sample.cd.cl.1d
    103, // llvm.amdgcn.image.sample.cd.cl.1darray
    105, // llvm.amdgcn.image.sample.cd.cl.2d
    115, // llvm.amdgcn.image.sample.cd.cl.2darray
    116, // llvm.amdgcn.image.sample.cd.cl.3d
    115, // llvm.amdgcn.image.sample.cd.cl.cube
    103, // llvm.amdgcn.image.sample.cd.cl.o.1d
    104, // llvm.amdgcn.image.sample.cd.cl.o.1darray
    115, // llvm.amdgcn.image.sample.cd.cl.o.2d
    117, // llvm.amdgcn.image.sample.cd.cl.o.2darray
    118, // llvm.amdgcn.image.sample.cd.cl.o.3d
    117, // llvm.amdgcn.image.sample.cd.cl.o.cube
    105, // llvm.amdgcn.image.sample.cd.cube
    102, // llvm.amdgcn.image.sample.cd.o.1d
    103, // llvm.amdgcn.image.sample.cd.o.1darray
    105, // llvm.amdgcn.image.sample.cd.o.2d
    115, // llvm.amdgcn.image.sample.cd.o.2darray
    116, // llvm.amdgcn.image.sample.cd.o.3d
    115, // llvm.amdgcn.image.sample.cd.o.cube
    100, // llvm.amdgcn.image.sample.cl.1d
    101, // llvm.amdgcn.image.sample.cl.1darray
    101, // llvm.amdgcn.image.sample.cl.2d
    102, // llvm.amdgcn.image.sample.cl.2darray
    102, // llvm.amdgcn.image.sample.cl.3d
    102, // llvm.amdgcn.image.sample.cl.cube
    101, // llvm.amdgcn.image.sample.cl.o.1d
    102, // llvm.amdgcn.image.sample.cl.o.1darray
    102, // llvm.amdgcn.image.sample.cl.o.2d
    103, // llvm.amdgcn.image.sample.cl.o.2darray
    103, // llvm.amdgcn.image.sample.cl.o.3d
    103, // llvm.amdgcn.image.sample.cl.o.cube
    101, // llvm.amdgcn.image.sample.cube
    101, // llvm.amdgcn.image.sample.d.1d
    102, // llvm.amdgcn.image.sample.d.1darray
    104, // llvm.amdgcn.image.sample.d.2d
    105, // llvm.amdgcn.image.sample.d.2darray
    117, // llvm.amdgcn.image.sample.d.3d
    102, // llvm.amdgcn.image.sample.d.cl.1d
    103, // llvm.amdgcn.image.sample.d.cl.1darray
    105, // llvm.amdgcn.image.sample.d.cl.2d
    115, // llvm.amdgcn.image.sample.d.cl.2darray
    116, // llvm.amdgcn.image.sample.d.cl.3d
    115, // llvm.amdgcn.image.sample.d.cl.cube
    103, // llvm.amdgcn.image.sample.d.cl.o.1d
    104, // llvm.amdgcn.image.sample.d.cl.o.1darray
    115, // llvm.amdgcn.image.sample.d.cl.o.2d
    117, // llvm.amdgcn.image.sample.d.cl.o.2darray
    118, // llvm.amdgcn.image.sample.d.cl.o.3d
    117, // llvm.amdgcn.image.sample.d.cl.o.cube
    105, // llvm.amdgcn.image.sample.d.cube
    102, // llvm.amdgcn.image.sample.d.o.1d
    103, // llvm.amdgcn.image.sample.d.o.1darray
    105, // llvm.amdgcn.image.sample.d.o.2d
    115, // llvm.amdgcn.image.sample.d.o.2darray
    116, // llvm.amdgcn.image.sample.d.o.3d
    115, // llvm.amdgcn.image.sample.d.o.cube
    100, // llvm.amdgcn.image.sample.l.1d
    101, // llvm.amdgcn.image.sample.l.1darray
    101, // llvm.amdgcn.image.sample.l.2d
    102, // llvm.amdgcn.image.sample.l.2darray
    102, // llvm.amdgcn.image.sample.l.3d
    102, // llvm.amdgcn.image.sample.l.cube
    101, // llvm.amdgcn.image.sample.l.o.1d
    102, // llvm.amdgcn.image.sample.l.o.1darray
    102, // llvm.amdgcn.image.sample.l.o.2d
    103, // llvm.amdgcn.image.sample.l.o.2darray
    103, // llvm.amdgcn.image.sample.l.o.3d
    103, // llvm.amdgcn.image.sample.l.o.cube
    114, // llvm.amdgcn.image.sample.lz.1d
    100, // llvm.amdgcn.image.sample.lz.1darray
    100, // llvm.amdgcn.image.sample.lz.2d
    101, // llvm.amdgcn.image.sample.lz.2darray
    101, // llvm.amdgcn.image.sample.lz.3d
    101, // llvm.amdgcn.image.sample.lz.cube
    100, // llvm.amdgcn.image.sample.lz.o.1d
    101, // llvm.amdgcn.image.sample.lz.o.1darray
    101, // llvm.amdgcn.image.sample.lz.o.2d
    102, // llvm.amdgcn.image.sample.lz.o.2darray
    102, // llvm.amdgcn.image.sample.lz.o.3d
    102, // llvm.amdgcn.image.sample.lz.o.cube
    100, // llvm.amdgcn.image.sample.o.1d
    101, // llvm.amdgcn.image.sample.o.1darray
    101, // llvm.amdgcn.image.sample.o.2d
    102, // llvm.amdgcn.image.sample.o.2darray
    102, // llvm.amdgcn.image.sample.o.3d
    102, // llvm.amdgcn.image.sample.o.cube
    120, // llvm.amdgcn.image.store.1d
    121, // llvm.amdgcn.image.store.1darray
    121, // llvm.amdgcn.image.store.2d
    122, // llvm.amdgcn.image.store.2darray
    123, // llvm.amdgcn.image.store.2darraymsaa
    122, // llvm.amdgcn.image.store.2dmsaa
    122, // llvm.amdgcn.image.store.3d
    122, // llvm.amdgcn.image.store.cube
    121, // llvm.amdgcn.image.store.mip.1d
    122, // llvm.amdgcn.image.store.mip.1darray
    122, // llvm.amdgcn.image.store.mip.2d
    123, // llvm.amdgcn.image.store.mip.2darray
    123, // llvm.amdgcn.image.store.mip.3d
    123, // llvm.amdgcn.image.store.mip.cube
    83, // llvm.amdgcn.implicit.buffer.ptr
    83, // llvm.amdgcn.implicitarg.ptr
    124, // llvm.amdgcn.init.exec
    125, // llvm.amdgcn.init.exec.from.input
    126, // llvm.amdgcn.interp.mov
    127, // llvm.amdgcn.interp.p1
    49, // llvm.amdgcn.interp.p1.f16
    128, // llvm.amdgcn.interp.p2
    129, // llvm.amdgcn.interp.p2.f16
    130, // llvm.amdgcn.is.private
    130, // llvm.amdgcn.is.shared
    83, // llvm.amdgcn.kernarg.segment.ptr
    7, // llvm.amdgcn.kill
    6, // llvm.amdgcn.ldexp
    6, // llvm.amdgcn.lerp
    6, // llvm.amdgcn.log.clamp
    89, // llvm.amdgcn.loop
    9, // llvm.amdgcn.mbcnt.hi
    9, // llvm.amdgcn.mbcnt.lo
    131, // llvm.amdgcn.mfma.f32.16x16x16f16
    131, // llvm.amdgcn.mfma.f32.16x16x1f32
    131, // llvm.amdgcn.mfma.f32.16x16x2bf16
    131, // llvm.amdgcn.mfma.f32.16x16x4f16
    131, // llvm.amdgcn.mfma.f32.16x16x4f32
    131, // llvm.amdgcn.mfma.f32.16x16x8bf16
    131, // llvm.amdgcn.mfma.f32.32x32x1f32
    131, // llvm.amdgcn.mfma.f32.32x32x2bf16
    131, // llvm.amdgcn.mfma.f32.32x32x2f32
    131, // llvm.amdgcn.mfma.f32.32x32x4bf16
    131, // llvm.amdgcn.mfma.f32.32x32x4f16
    131, // llvm.amdgcn.mfma.f32.32x32x8f16
    131, // llvm.amdgcn.mfma.f32.4x4x1f32
    131, // llvm.amdgcn.mfma.f32.4x4x2bf16
    131, // llvm.amdgcn.mfma.f32.4x4x4f16
    131, // llvm.amdgcn.mfma.i32.16x16x16i8
    131, // llvm.amdgcn.mfma.i32.16x16x4i8
    131, // llvm.amdgcn.mfma.i32.32x32x4i8
    131, // llvm.amdgcn.mfma.i32.32x32x8i8
    131, // llvm.amdgcn.mfma.i32.4x4x4i8
    132, // llvm.amdgcn.mov.dpp
    88, // llvm.amdgcn.mov.dpp8
    6, // llvm.amdgcn.mqsad.pk.u16.u8
    6, // llvm.amdgcn.mqsad.u32.u8
    6, // llvm.amdgcn.msad.u8
    6, // llvm.amdgcn.mul.i24
    6, // llvm.amdgcn.mul.u24
    133, // llvm.amdgcn.permlane16
    133, // llvm.amdgcn.permlanex16
    9, // llvm.amdgcn.ps.live
    6, // llvm.amdgcn.qsad.pk.u16.u8
    83, // llvm.amdgcn.queue.ptr
    77, // llvm.amdgcn.raw.buffer.atomic.add
    77, // llvm.amdgcn.raw.buffer.atomic.and
    78, // llvm.amdgcn.raw.buffer.atomic.cmpswap
    77, // llvm.amdgcn.raw.buffer.atomic.dec
    77, // llvm.amdgcn.raw.buffer.atomic.fadd
    77, // llvm.amdgcn.raw.buffer.atomic.inc
    77, // llvm.amdgcn.raw.buffer.atomic.or
    77, // llvm.amdgcn.raw.buffer.atomic.smax
    77, // llvm.amdgcn.raw.buffer.atomic.smin
    77, // llvm.amdgcn.raw.buffer.atomic.sub
    77, // llvm.amdgcn.raw.buffer.atomic.swap
    77, // llvm.amdgcn.raw.buffer.atomic.umax
    77, // llvm.amdgcn.raw.buffer.atomic.umin
    77, // llvm.amdgcn.raw.buffer.atomic.xor
    134, // llvm.amdgcn.raw.buffer.load
    134, // llvm.amdgcn.raw.buffer.load.format
    135, // llvm.amdgcn.raw.buffer.store
    135, // llvm.amdgcn.raw.buffer.store.format
    80, // llvm.amdgcn.raw.tbuffer.load
    81, // llvm.amdgcn.raw.tbuffer.store
    6, // llvm.amdgcn.rcp
    6, // llvm.amdgcn.rcp.legacy
    31, // llvm.amdgcn.readfirstlane
    31, // llvm.amdgcn.readlane
    6, // llvm.amdgcn.reloc.constant
    6, // llvm.amdgcn.rsq
    6, // llvm.amdgcn.rsq.clamp
    6, // llvm.amdgcn.rsq.legacy
    136, // llvm.amdgcn.s.barrier
    137, // llvm.amdgcn.s.buffer.load
    82, // llvm.amdgcn.s.dcache.inv
    82, // llvm.amdgcn.s.dcache.inv.vol
    82, // llvm.amdgcn.s.dcache.wb
    82, // llvm.amdgcn.s.dcache.wb.vol
    138, // llvm.amdgcn.s.decperflevel
    139, // llvm.amdgcn.s.get.waveid.in.workgroup
    6, // llvm.amdgcn.s.getpc
    140, // llvm.amdgcn.s.getreg
    138, // llvm.amdgcn.s.incperflevel
    4, // llvm.amdgcn.s.memrealtime
    4, // llvm.amdgcn.s.memtime
    141, // llvm.amdgcn.s.sendmsg
    141, // llvm.amdgcn.s.sendmsghalt
    141, // llvm.amdgcn.s.setreg
    138, // llvm.amdgcn.s.sleep
    138, // llvm.amdgcn.s.waitcnt
    6, // llvm.amdgcn.sad.hi.u8
    6, // llvm.amdgcn.sad.u16
    6, // llvm.amdgcn.sad.u8
    6, // llvm.amdgcn.sbfe
    93, // llvm.amdgcn.sdot2
    93, // llvm.amdgcn.sdot4
    93, // llvm.amdgcn.sdot8
    31, // llvm.amdgcn.set.inactive
    6, // llvm.amdgcn.sffbh
    6, // llvm.amdgcn.sin
    6, // llvm.amdgcn.softwqm
    6, // llvm.amdgcn.sqrt
    78, // llvm.amdgcn.struct.buffer.atomic.add
    78, // llvm.amdgcn.struct.buffer.atomic.and
    142, // llvm.amdgcn.struct.buffer.atomic.cmpswap
    78, // llvm.amdgcn.struct.buffer.atomic.dec
    78, // llvm.amdgcn.struct.buffer.atomic.fadd
    78, // llvm.amdgcn.struct.buffer.atomic.inc
    78, // llvm.amdgcn.struct.buffer.atomic.or
    78, // llvm.amdgcn.struct.buffer.atomic.smax
    78, // llvm.amdgcn.struct.buffer.atomic.smin
    78, // llvm.amdgcn.struct.buffer.atomic.sub
    78, // llvm.amdgcn.struct.buffer.atomic.swap
    78, // llvm.amdgcn.struct.buffer.atomic.umax
    78, // llvm.amdgcn.struct.buffer.atomic.umin
    78, // llvm.amdgcn.struct.buffer.atomic.xor
    143, // llvm.amdgcn.struct.buffer.load
    143, // llvm.amdgcn.struct.buffer.load.format
    144, // llvm.amdgcn.struct.buffer.store
    144, // llvm.amdgcn.struct.buffer.store.format
    145, // llvm.amdgcn.struct.tbuffer.load
    146, // llvm.amdgcn.struct.tbuffer.store
    147, // llvm.amdgcn.tbuffer.load
    148, // llvm.amdgcn.tbuffer.store
    6, // llvm.amdgcn.trig.preop
    6, // llvm.amdgcn.ubfe
    93, // llvm.amdgcn.udot2
    93, // llvm.amdgcn.udot4
    93, // llvm.amdgcn.udot8
    149, // llvm.amdgcn.unreachable
    150, // llvm.amdgcn.update.dpp
    136, // llvm.amdgcn.wave.barrier
    6, // llvm.amdgcn.wavefrontsize
    6, // llvm.amdgcn.workgroup.id.x
    6, // llvm.amdgcn.workgroup.id.y
    6, // llvm.amdgcn.workgroup.id.z
    6, // llvm.amdgcn.workitem.id.x
    6, // llvm.amdgcn.workitem.id.y
    6, // llvm.amdgcn.workitem.id.z
    6, // llvm.amdgcn.wqm
    31, // llvm.amdgcn.wqm.vote
    31, // llvm.amdgcn.writelane
    151, // llvm.amdgcn.wwm
    152, // llvm.arm.cde.cx1
    153, // llvm.arm.cde.cx1a
    152, // llvm.arm.cde.cx1d
    154, // llvm.arm.cde.cx1da
    153, // llvm.arm.cde.cx2
    154, // llvm.arm.cde.cx2a
    153, // llvm.arm.cde.cx2d
    155, // llvm.arm.cde.cx2da
    154, // llvm.arm.cde.cx3
    155, // llvm.arm.cde.cx3a
    154, // llvm.arm.cde.cx3d
    156, // llvm.arm.cde.cx3da
    152, // llvm.arm.cde.vcx1
    153, // llvm.arm.cde.vcx1a
    152, // llvm.arm.cde.vcx1q
    153, // llvm.arm.cde.vcx1q.predicated
    153, // llvm.arm.cde.vcx1qa
    153, // llvm.arm.cde.vcx1qa.predicated
    153, // llvm.arm.cde.vcx2
    154, // llvm.arm.cde.vcx2a
    153, // llvm.arm.cde.vcx2q
    154, // llvm.arm.cde.vcx2q.predicated
    154, // llvm.arm.cde.vcx2qa
    154, // llvm.arm.cde.vcx2qa.predicated
    154, // llvm.arm.cde.vcx3
    155, // llvm.arm.cde.vcx3a
    154, // llvm.arm.cde.vcx3q
    155, // llvm.arm.cde.vcx3q.predicated
    155, // llvm.arm.cde.vcx3qa
    155, // llvm.arm.cde.vcx3qa.predicated
    157, // llvm.arm.cdp
    157, // llvm.arm.cdp2
    7, // llvm.arm.clrex
    2, // llvm.arm.cls
    2, // llvm.arm.cls64
    2, // llvm.arm.cmse.tt
    2, // llvm.arm.cmse.tta
    2, // llvm.arm.cmse.ttat
    2, // llvm.arm.cmse.ttt
    2, // llvm.arm.crc32b
    2, // llvm.arm.crc32cb
    2, // llvm.arm.crc32ch
    2, // llvm.arm.crc32cw
    2, // llvm.arm.crc32h
    2, // llvm.arm.crc32w
    7, // llvm.arm.dbg
    7, // llvm.arm.dmb
    7, // llvm.arm.dsb
    7, // llvm.arm.get.fpscr
    158, // llvm.arm.gnu.eabi.mcount
    7, // llvm.arm.hint
    7, // llvm.arm.isb
    7, // llvm.arm.ldaex
    7, // llvm.arm.ldaexd
    159, // llvm.arm.ldc
    159, // llvm.arm.ldc2
    159, // llvm.arm.ldc2l
    159, // llvm.arm.ldcl
    7, // llvm.arm.ldrex
    7, // llvm.arm.ldrexd
    160, // llvm.arm.mcr
    160, // llvm.arm.mcr2
    161, // llvm.arm.mcrr
    161, // llvm.arm.mcrr2
    162, // llvm.arm.mrc
    162, // llvm.arm.mrc2
    163, // llvm.arm.mrrc
    163, // llvm.arm.mrrc2
    2, // llvm.arm.mve.abd.predicated
    2, // llvm.arm.mve.abs.predicated
    2, // llvm.arm.mve.add.predicated
    2, // llvm.arm.mve.addlv
    2, // llvm.arm.mve.addlv.predicated
    2, // llvm.arm.mve.addv
    2, // llvm.arm.mve.addv.predicated
    2, // llvm.arm.mve.and.predicated
    2, // llvm.arm.mve.asrl
    2, // llvm.arm.mve.bic.predicated
    2, // llvm.arm.mve.cls.predicated
    2, // llvm.arm.mve.clz.predicated
    2, // llvm.arm.mve.eor.predicated
    2, // llvm.arm.mve.fma.predicated
    2, // llvm.arm.mve.hadd.predicated
    2, // llvm.arm.mve.hsub.predicated
    2, // llvm.arm.mve.lsll
    2, // llvm.arm.mve.max.predicated
    2, // llvm.arm.mve.maxav
    2, // llvm.arm.mve.maxav.predicated
    2, // llvm.arm.mve.maxnmav
    2, // llvm.arm.mve.maxnmav.predicated
    2, // llvm.arm.mve.maxnmv
    2, // llvm.arm.mve.maxnmv.predicated
    2, // llvm.arm.mve.maxv
    2, // llvm.arm.mve.maxv.predicated
    2, // llvm.arm.mve.min.predicated
    2, // llvm.arm.mve.minav
    2, // llvm.arm.mve.minav.predicated
    2, // llvm.arm.mve.minnmav
    2, // llvm.arm.mve.minnmav.predicated
    2, // llvm.arm.mve.minnmv
    2, // llvm.arm.mve.minnmv.predicated
    2, // llvm.arm.mve.minv
    2, // llvm.arm.mve.minv.predicated
    2, // llvm.arm.mve.mul.predicated
    2, // llvm.arm.mve.mulh.predicated
    2, // llvm.arm.mve.mull.int.predicated
    2, // llvm.arm.mve.mull.poly.predicated
    2, // llvm.arm.mve.mvn.predicated
    2, // llvm.arm.mve.neg.predicated
    2, // llvm.arm.mve.orn.predicated
    2, // llvm.arm.mve.orr.predicated
    2, // llvm.arm.mve.pred.i2v
    2, // llvm.arm.mve.pred.v2i
    2, // llvm.arm.mve.qabs.predicated
    2, // llvm.arm.mve.qadd.predicated
    2, // llvm.arm.mve.qdmulh.predicated
    2, // llvm.arm.mve.qneg.predicated
    2, // llvm.arm.mve.qrdmulh.predicated
    2, // llvm.arm.mve.qsub.predicated
    2, // llvm.arm.mve.rhadd.predicated
    2, // llvm.arm.mve.rmulh.predicated
    2, // llvm.arm.mve.shl.imm.predicated
    2, // llvm.arm.mve.shr.imm.predicated
    2, // llvm.arm.mve.sqrshr
    2, // llvm.arm.mve.sqrshrl
    2, // llvm.arm.mve.sqshl
    2, // llvm.arm.mve.sqshll
    2, // llvm.arm.mve.srshr
    2, // llvm.arm.mve.srshrl
    2, // llvm.arm.mve.sub.predicated
    2, // llvm.arm.mve.uqrshl
    2, // llvm.arm.mve.uqrshll
    2, // llvm.arm.mve.uqshl
    2, // llvm.arm.mve.uqshll
    2, // llvm.arm.mve.urshr
    2, // llvm.arm.mve.urshrl
    2, // llvm.arm.mve.vabav
    2, // llvm.arm.mve.vabav.predicated
    2, // llvm.arm.mve.vabd
    2, // llvm.arm.mve.vadc
    2, // llvm.arm.mve.vadc.predicated
    2, // llvm.arm.mve.vbrsr
    2, // llvm.arm.mve.vbrsr.predicated
    2, // llvm.arm.mve.vcaddq
    2, // llvm.arm.mve.vcaddq.predicated
    2, // llvm.arm.mve.vcls
    2, // llvm.arm.mve.vcmlaq
    2, // llvm.arm.mve.vcmlaq.predicated
    2, // llvm.arm.mve.vcmulq
    2, // llvm.arm.mve.vcmulq.predicated
    2, // llvm.arm.mve.vctp16
    2, // llvm.arm.mve.vctp32
    2, // llvm.arm.mve.vctp64
    2, // llvm.arm.mve.vctp8
    2, // llvm.arm.mve.vcvt.fix
    2, // llvm.arm.mve.vcvt.fix.predicated
    2, // llvm.arm.mve.vcvt.fp.int.predicated
    2, // llvm.arm.mve.vcvt.narrow
    2, // llvm.arm.mve.vcvt.narrow.predicated
    2, // llvm.arm.mve.vcvt.widen
    2, // llvm.arm.mve.vcvt.widen.predicated
    2, // llvm.arm.mve.vcvta
    2, // llvm.arm.mve.vcvta.predicated
    2, // llvm.arm.mve.vcvtm
    2, // llvm.arm.mve.vcvtm.predicated
    2, // llvm.arm.mve.vcvtn
    2, // llvm.arm.mve.vcvtn.predicated
    2, // llvm.arm.mve.vcvtp
    2, // llvm.arm.mve.vcvtp.predicated
    2, // llvm.arm.mve.vddup
    2, // llvm.arm.mve.vddup.predicated
    2, // llvm.arm.mve.vdwdup
    2, // llvm.arm.mve.vdwdup.predicated
    2, // llvm.arm.mve.vhadd
    2, // llvm.arm.mve.vhsub
    2, // llvm.arm.mve.vidup
    2, // llvm.arm.mve.vidup.predicated
    2, // llvm.arm.mve.viwdup
    2, // llvm.arm.mve.viwdup.predicated
    3, // llvm.arm.mve.vld2q
    3, // llvm.arm.mve.vld4q
    21, // llvm.arm.mve.vldr.gather.base
    21, // llvm.arm.mve.vldr.gather.base.predicated
    21, // llvm.arm.mve.vldr.gather.base.wb
    21, // llvm.arm.mve.vldr.gather.base.wb.predicated
    21, // llvm.arm.mve.vldr.gather.offset
    21, // llvm.arm.mve.vldr.gather.offset.predicated
    2, // llvm.arm.mve.vmaxa.predicated
    2, // llvm.arm.mve.vmaxnma.predicated
    2, // llvm.arm.mve.vmina.predicated
    2, // llvm.arm.mve.vminnma.predicated
    2, // llvm.arm.mve.vmla.n.predicated
    2, // llvm.arm.mve.vmlas.n.predicated
    2, // llvm.arm.mve.vmldava
    2, // llvm.arm.mve.vmldava.predicated
    2, // llvm.arm.mve.vmlldava
    2, // llvm.arm.mve.vmlldava.predicated
    2, // llvm.arm.mve.vmovl.predicated
    2, // llvm.arm.mve.vmovn.predicated
    2, // llvm.arm.mve.vmulh
    2, // llvm.arm.mve.vmull
    2, // llvm.arm.mve.vmull.poly
    2, // llvm.arm.mve.vqdmlad
    2, // llvm.arm.mve.vqdmlad.predicated
    2, // llvm.arm.mve.vqdmlah
    2, // llvm.arm.mve.vqdmlah.predicated
    2, // llvm.arm.mve.vqdmlash
    2, // llvm.arm.mve.vqdmlash.predicated
    2, // llvm.arm.mve.vqdmulh
    2, // llvm.arm.mve.vqdmull
    2, // llvm.arm.mve.vqdmull.predicated
    2, // llvm.arm.mve.vqmovn
    2, // llvm.arm.mve.vqmovn.predicated
    2, // llvm.arm.mve.vqrdmlah
    2, // llvm.arm.mve.vqrdmlah.predicated
    2, // llvm.arm.mve.vqrdmlash
    2, // llvm.arm.mve.vqrdmlash.predicated
    2, // llvm.arm.mve.vqrdmulh
    2, // llvm.arm.mve.vqshl.imm
    2, // llvm.arm.mve.vqshl.imm.predicated
    2, // llvm.arm.mve.vqshlu.imm
    2, // llvm.arm.mve.vqshlu.imm.predicated
    2, // llvm.arm.mve.vreinterpretq
    2, // llvm.arm.mve.vrev.predicated
    2, // llvm.arm.mve.vrhadd
    2, // llvm.arm.mve.vrinta.predicated
    2, // llvm.arm.mve.vrintm.predicated
    2, // llvm.arm.mve.vrintn
    2, // llvm.arm.mve.vrintn.predicated
    2, // llvm.arm.mve.vrintp.predicated
    2, // llvm.arm.mve.vrintx.predicated
    2, // llvm.arm.mve.vrintz.predicated
    2, // llvm.arm.mve.vrmlldavha
    2, // llvm.arm.mve.vrmlldavha.predicated
    2, // llvm.arm.mve.vrmulh
    2, // llvm.arm.mve.vrshr.imm
    2, // llvm.arm.mve.vrshr.imm.predicated
    2, // llvm.arm.mve.vsbc
    2, // llvm.arm.mve.vsbc.predicated
    2, // llvm.arm.mve.vshl.scalar
    2, // llvm.arm.mve.vshl.scalar.predicated
    2, // llvm.arm.mve.vshl.vector
    2, // llvm.arm.mve.vshl.vector.predicated
    2, // llvm.arm.mve.vshlc
    2, // llvm.arm.mve.vshlc.predicated
    2, // llvm.arm.mve.vshll.imm
    2, // llvm.arm.mve.vshll.imm.predicated
    2, // llvm.arm.mve.vshrn
    2, // llvm.arm.mve.vshrn.predicated
    2, // llvm.arm.mve.vsli
    2, // llvm.arm.mve.vsli.predicated
    2, // llvm.arm.mve.vsri
    2, // llvm.arm.mve.vsri.predicated
    72, // llvm.arm.mve.vst2q
    72, // llvm.arm.mve.vst4q
    65, // llvm.arm.mve.vstr.scatter.base
    65, // llvm.arm.mve.vstr.scatter.base.predicated
    65, // llvm.arm.mve.vstr.scatter.base.wb
    65, // llvm.arm.mve.vstr.scatter.base.wb.predicated
    65, // llvm.arm.mve.vstr.scatter.offset
    65, // llvm.arm.mve.vstr.scatter.offset.predicated
    2, // llvm.arm.neon.aesd
    2, // llvm.arm.neon.aese
    2, // llvm.arm.neon.aesimc
    2, // llvm.arm.neon.aesmc
    2, // llvm.arm.neon.bfdot
    2, // llvm.arm.neon.bfmlalb
    2, // llvm.arm.neon.bfmlalt
    2, // llvm.arm.neon.bfmmla
    2, // llvm.arm.neon.sdot
    2, // llvm.arm.neon.sha1c
    2, // llvm.arm.neon.sha1h
    2, // llvm.arm.neon.sha1m
    2, // llvm.arm.neon.sha1p
    2, // llvm.arm.neon.sha1su0
    2, // llvm.arm.neon.sha1su1
    2, // llvm.arm.neon.sha256h
    2, // llvm.arm.neon.sha256h2
    2, // llvm.arm.neon.sha256su0
    2, // llvm.arm.neon.sha256su1
    2, // llvm.arm.neon.smmla
    2, // llvm.arm.neon.udot
    2, // llvm.arm.neon.ummla
    2, // llvm.arm.neon.usdot
    2, // llvm.arm.neon.usmmla
    2, // llvm.arm.neon.vabds
    2, // llvm.arm.neon.vabdu
    2, // llvm.arm.neon.vabs
    2, // llvm.arm.neon.vacge
    2, // llvm.arm.neon.vacgt
    2, // llvm.arm.neon.vbsl
    2, // llvm.arm.neon.vcadd.rot270
    2, // llvm.arm.neon.vcadd.rot90
    2, // llvm.arm.neon.vcls
    2, // llvm.arm.neon.vcvtas
    2, // llvm.arm.neon.vcvtau
    2, // llvm.arm.neon.vcvtbfp2bf
    2, // llvm.arm.neon.vcvtfp2bf
    2, // llvm.arm.neon.vcvtfp2fxs
    2, // llvm.arm.neon.vcvtfp2fxu
    2, // llvm.arm.neon.vcvtfp2hf
    2, // llvm.arm.neon.vcvtfxs2fp
    2, // llvm.arm.neon.vcvtfxu2fp
    2, // llvm.arm.neon.vcvthf2fp
    2, // llvm.arm.neon.vcvtms
    2, // llvm.arm.neon.vcvtmu
    2, // llvm.arm.neon.vcvtns
    2, // llvm.arm.neon.vcvtnu
    2, // llvm.arm.neon.vcvtps
    2, // llvm.arm.neon.vcvtpu
    2, // llvm.arm.neon.vhadds
    2, // llvm.arm.neon.vhaddu
    2, // llvm.arm.neon.vhsubs
    2, // llvm.arm.neon.vhsubu
    3, // llvm.arm.neon.vld1
    3, // llvm.arm.neon.vld1x2
    3, // llvm.arm.neon.vld1x3
    3, // llvm.arm.neon.vld1x4
    3, // llvm.arm.neon.vld2
    3, // llvm.arm.neon.vld2dup
    3, // llvm.arm.neon.vld2lane
    3, // llvm.arm.neon.vld3
    3, // llvm.arm.neon.vld3dup
    3, // llvm.arm.neon.vld3lane
    3, // llvm.arm.neon.vld4
    3, // llvm.arm.neon.vld4dup
    3, // llvm.arm.neon.vld4lane
    2, // llvm.arm.neon.vmaxnm
    2, // llvm.arm.neon.vmaxs
    2, // llvm.arm.neon.vmaxu
    2, // llvm.arm.neon.vminnm
    2, // llvm.arm.neon.vmins
    2, // llvm.arm.neon.vminu
    2, // llvm.arm.neon.vmullp
    2, // llvm.arm.neon.vmulls
    2, // llvm.arm.neon.vmullu
    2, // llvm.arm.neon.vmulp
    2, // llvm.arm.neon.vpadals
    2, // llvm.arm.neon.vpadalu
    2, // llvm.arm.neon.vpadd
    2, // llvm.arm.neon.vpaddls
    2, // llvm.arm.neon.vpaddlu
    2, // llvm.arm.neon.vpmaxs
    2, // llvm.arm.neon.vpmaxu
    2, // llvm.arm.neon.vpmins
    2, // llvm.arm.neon.vpminu
    2, // llvm.arm.neon.vqabs
    2, // llvm.arm.neon.vqdmulh
    2, // llvm.arm.neon.vqdmull
    2, // llvm.arm.neon.vqmovns
    2, // llvm.arm.neon.vqmovnsu
    2, // llvm.arm.neon.vqmovnu
    2, // llvm.arm.neon.vqneg
    2, // llvm.arm.neon.vqrdmulh
    2, // llvm.arm.neon.vqrshiftns
    2, // llvm.arm.neon.vqrshiftnsu
    2, // llvm.arm.neon.vqrshiftnu
    2, // llvm.arm.neon.vqrshifts
    2, // llvm.arm.neon.vqrshiftu
    2, // llvm.arm.neon.vqshiftns
    2, // llvm.arm.neon.vqshiftnsu
    2, // llvm.arm.neon.vqshiftnu
    2, // llvm.arm.neon.vqshifts
    2, // llvm.arm.neon.vqshiftsu
    2, // llvm.arm.neon.vqshiftu
    2, // llvm.arm.neon.vraddhn
    2, // llvm.arm.neon.vrecpe
    2, // llvm.arm.neon.vrecps
    2, // llvm.arm.neon.vrhadds
    2, // llvm.arm.neon.vrhaddu
    2, // llvm.arm.neon.vrinta
    2, // llvm.arm.neon.vrintm
    2, // llvm.arm.neon.vrintn
    2, // llvm.arm.neon.vrintp
    2, // llvm.arm.neon.vrintx
    2, // llvm.arm.neon.vrintz
    2, // llvm.arm.neon.vrshiftn
    2, // llvm.arm.neon.vrshifts
    2, // llvm.arm.neon.vrshiftu
    2, // llvm.arm.neon.vrsqrte
    2, // llvm.arm.neon.vrsqrts
    2, // llvm.arm.neon.vrsubhn
    2, // llvm.arm.neon.vshiftins
    2, // llvm.arm.neon.vshifts
    2, // llvm.arm.neon.vshiftu
    164, // llvm.arm.neon.vst1
    28, // llvm.arm.neon.vst1x2
    28, // llvm.arm.neon.vst1x3
    28, // llvm.arm.neon.vst1x4
    164, // llvm.arm.neon.vst2
    164, // llvm.arm.neon.vst2lane
    164, // llvm.arm.neon.vst3
    164, // llvm.arm.neon.vst3lane
    164, // llvm.arm.neon.vst4
    164, // llvm.arm.neon.vst4lane
    2, // llvm.arm.neon.vtbl1
    2, // llvm.arm.neon.vtbl2
    2, // llvm.arm.neon.vtbl3
    2, // llvm.arm.neon.vtbl4
    2, // llvm.arm.neon.vtbx1
    2, // llvm.arm.neon.vtbx2
    2, // llvm.arm.neon.vtbx3
    2, // llvm.arm.neon.vtbx4
    2, // llvm.arm.qadd
    2, // llvm.arm.qadd16
    2, // llvm.arm.qadd8
    2, // llvm.arm.qasx
    2, // llvm.arm.qsax
    2, // llvm.arm.qsub
    2, // llvm.arm.qsub16
    2, // llvm.arm.qsub8
    7, // llvm.arm.sadd16
    7, // llvm.arm.sadd8
    7, // llvm.arm.sasx
    21, // llvm.arm.sel
    7, // llvm.arm.set.fpscr
    2, // llvm.arm.shadd16
    2, // llvm.arm.shadd8
    2, // llvm.arm.shasx
    2, // llvm.arm.shsax
    2, // llvm.arm.shsub16
    2, // llvm.arm.shsub8
    2, // llvm.arm.smlabb
    2, // llvm.arm.smlabt
    2, // llvm.arm.smlad
    2, // llvm.arm.smladx
    2, // llvm.arm.smlald
    2, // llvm.arm.smlaldx
    2, // llvm.arm.smlatb
    2, // llvm.arm.smlatt
    2, // llvm.arm.smlawb
    2, // llvm.arm.smlawt
    2, // llvm.arm.smlsd
    2, // llvm.arm.smlsdx
    2, // llvm.arm.smlsld
    2, // llvm.arm.smlsldx
    2, // llvm.arm.smuad
    2, // llvm.arm.smuadx
    2, // llvm.arm.smulbb
    2, // llvm.arm.smulbt
    2, // llvm.arm.smultb
    2, // llvm.arm.smultt
    2, // llvm.arm.smulwb
    2, // llvm.arm.smulwt
    2, // llvm.arm.smusd
    2, // llvm.arm.smusdx
    75, // llvm.arm.space
    2, // llvm.arm.ssat
    2, // llvm.arm.ssat16
    7, // llvm.arm.ssax
    7, // llvm.arm.ssub16
    7, // llvm.arm.ssub8
    159, // llvm.arm.stc
    159, // llvm.arm.stc2
    159, // llvm.arm.stc2l
    159, // llvm.arm.stcl
    7, // llvm.arm.stlex
    7, // llvm.arm.stlexd
    7, // llvm.arm.strex
    7, // llvm.arm.strexd
    2, // llvm.arm.sxtab16
    2, // llvm.arm.sxtb16
    7, // llvm.arm.uadd16
    7, // llvm.arm.uadd8
    7, // llvm.arm.uasx
    2, // llvm.arm.uhadd16
    2, // llvm.arm.uhadd8
    2, // llvm.arm.uhasx
    2, // llvm.arm.uhsax
    2, // llvm.arm.uhsub16
    2, // llvm.arm.uhsub8
    7, // llvm.arm.undefined
    2, // llvm.arm.uqadd16
    2, // llvm.arm.uqadd8
    2, // llvm.arm.uqasx
    2, // llvm.arm.uqsax
    2, // llvm.arm.uqsub16
    2, // llvm.arm.uqsub8
    2, // llvm.arm.usad8
    2, // llvm.arm.usada8
    2, // llvm.arm.usat
    2, // llvm.arm.usat16
    7, // llvm.arm.usax
    7, // llvm.arm.usub16
    7, // llvm.arm.usub8
    2, // llvm.arm.uxtab16
    2, // llvm.arm.uxtb16
    2, // llvm.arm.vcvtr
    2, // llvm.arm.vcvtru
    2, // llvm.bpf.btf.type.id
    21, // llvm.bpf.load.byte
    21, // llvm.bpf.load.half
    21, // llvm.bpf.load.word
    2, // llvm.bpf.passthrough
    2, // llvm.bpf.preserve.enum.value
    52, // llvm.bpf.preserve.field.info
    2, // llvm.bpf.preserve.type.info
    7, // llvm.bpf.pseudo
    2, // llvm.hexagon.A2.abs
    2, // llvm.hexagon.A2.absp
    2, // llvm.hexagon.A2.abssat
    2, // llvm.hexagon.A2.add
    2, // llvm.hexagon.A2.addh.h16.hh
    2, // llvm.hexagon.A2.addh.h16.hl
    2, // llvm.hexagon.A2.addh.h16.lh
    2, // llvm.hexagon.A2.addh.h16.ll
    2, // llvm.hexagon.A2.addh.h16.sat.hh
    2, // llvm.hexagon.A2.addh.h16.sat.hl
    2, // llvm.hexagon.A2.addh.h16.sat.lh
    2, // llvm.hexagon.A2.addh.h16.sat.ll
    2, // llvm.hexagon.A2.addh.l16.hl
    2, // llvm.hexagon.A2.addh.l16.ll
    2, // llvm.hexagon.A2.addh.l16.sat.hl
    2, // llvm.hexagon.A2.addh.l16.sat.ll
    52, // llvm.hexagon.A2.addi
    2, // llvm.hexagon.A2.addp
    2, // llvm.hexagon.A2.addpsat
    2, // llvm.hexagon.A2.addsat
    2, // llvm.hexagon.A2.addsp
    2, // llvm.hexagon.A2.and
    52, // llvm.hexagon.A2.andir
    2, // llvm.hexagon.A2.andp
    2, // llvm.hexagon.A2.aslh
    2, // llvm.hexagon.A2.asrh
    2, // llvm.hexagon.A2.combine.hh
    2, // llvm.hexagon.A2.combine.hl
    2, // llvm.hexagon.A2.combine.lh
    2, // llvm.hexagon.A2.combine.ll
    152, // llvm.hexagon.A2.combineii
    2, // llvm.hexagon.A2.combinew
    2, // llvm.hexagon.A2.max
    2, // llvm.hexagon.A2.maxp
    2, // llvm.hexagon.A2.maxu
    2, // llvm.hexagon.A2.maxup
    2, // llvm.hexagon.A2.min
    2, // llvm.hexagon.A2.minp
    2, // llvm.hexagon.A2.minu
    2, // llvm.hexagon.A2.minup
    2, // llvm.hexagon.A2.neg
    2, // llvm.hexagon.A2.negp
    2, // llvm.hexagon.A2.negsat
    2, // llvm.hexagon.A2.not
    2, // llvm.hexagon.A2.notp
    2, // llvm.hexagon.A2.or
    52, // llvm.hexagon.A2.orir
    2, // llvm.hexagon.A2.orp
    2, // llvm.hexagon.A2.roundsat
    2, // llvm.hexagon.A2.sat
    2, // llvm.hexagon.A2.satb
    2, // llvm.hexagon.A2.sath
    2, // llvm.hexagon.A2.satub
    2, // llvm.hexagon.A2.satuh
    2, // llvm.hexagon.A2.sub
    2, // llvm.hexagon.A2.subh.h16.hh
    2, // llvm.hexagon.A2.subh.h16.hl
    2, // llvm.hexagon.A2.subh.h16.lh
    2, // llvm.hexagon.A2.subh.h16.ll
    2, // llvm.hexagon.A2.subh.h16.sat.hh
    2, // llvm.hexagon.A2.subh.h16.sat.hl
    2, // llvm.hexagon.A2.subh.h16.sat.lh
    2, // llvm.hexagon.A2.subh.h16.sat.ll
    2, // llvm.hexagon.A2.subh.l16.hl
    2, // llvm.hexagon.A2.subh.l16.ll
    2, // llvm.hexagon.A2.subh.l16.sat.hl
    2, // llvm.hexagon.A2.subh.l16.sat.ll
    2, // llvm.hexagon.A2.subp
    24, // llvm.hexagon.A2.subri
    2, // llvm.hexagon.A2.subsat
    2, // llvm.hexagon.A2.svaddh
    2, // llvm.hexagon.A2.svaddhs
    2, // llvm.hexagon.A2.svadduhs
    2, // llvm.hexagon.A2.svavgh
    2, // llvm.hexagon.A2.svavghs
    2, // llvm.hexagon.A2.svnavgh
    2, // llvm.hexagon.A2.svsubh
    2, // llvm.hexagon.A2.svsubhs
    2, // llvm.hexagon.A2.svsubuhs
    2, // llvm.hexagon.A2.swiz
    2, // llvm.hexagon.A2.sxtb
    2, // llvm.hexagon.A2.sxth
    2, // llvm.hexagon.A2.sxtw
    2, // llvm.hexagon.A2.tfr
    52, // llvm.hexagon.A2.tfrih
    52, // llvm.hexagon.A2.tfril
    2, // llvm.hexagon.A2.tfrp
    24, // llvm.hexagon.A2.tfrpi
    24, // llvm.hexagon.A2.tfrsi
    2, // llvm.hexagon.A2.vabsh
    2, // llvm.hexagon.A2.vabshsat
    2, // llvm.hexagon.A2.vabsw
    2, // llvm.hexagon.A2.vabswsat
    2, // llvm.hexagon.A2.vaddb.map
    2, // llvm.hexagon.A2.vaddh
    2, // llvm.hexagon.A2.vaddhs
    2, // llvm.hexagon.A2.vaddub
    2, // llvm.hexagon.A2.vaddubs
    2, // llvm.hexagon.A2.vadduhs
    2, // llvm.hexagon.A2.vaddw
    2, // llvm.hexagon.A2.vaddws
    2, // llvm.hexagon.A2.vavgh
    2, // llvm.hexagon.A2.vavghcr
    2, // llvm.hexagon.A2.vavghr
    2, // llvm.hexagon.A2.vavgub
    2, // llvm.hexagon.A2.vavgubr
    2, // llvm.hexagon.A2.vavguh
    2, // llvm.hexagon.A2.vavguhr
    2, // llvm.hexagon.A2.vavguw
    2, // llvm.hexagon.A2.vavguwr
    2, // llvm.hexagon.A2.vavgw
    2, // llvm.hexagon.A2.vavgwcr
    2, // llvm.hexagon.A2.vavgwr
    2, // llvm.hexagon.A2.vcmpbeq
    2, // llvm.hexagon.A2.vcmpbgtu
    2, // llvm.hexagon.A2.vcmpheq
    2, // llvm.hexagon.A2.vcmphgt
    2, // llvm.hexagon.A2.vcmphgtu
    2, // llvm.hexagon.A2.vcmpweq
    2, // llvm.hexagon.A2.vcmpwgt
    2, // llvm.hexagon.A2.vcmpwgtu
    2, // llvm.hexagon.A2.vconj
    2, // llvm.hexagon.A2.vmaxb
    2, // llvm.hexagon.A2.vmaxh
    2, // llvm.hexagon.A2.vmaxub
    2, // llvm.hexagon.A2.vmaxuh
    2, // llvm.hexagon.A2.vmaxuw
    2, // llvm.hexagon.A2.vmaxw
    2, // llvm.hexagon.A2.vminb
    2, // llvm.hexagon.A2.vminh
    2, // llvm.hexagon.A2.vminub
    2, // llvm.hexagon.A2.vminuh
    2, // llvm.hexagon.A2.vminuw
    2, // llvm.hexagon.A2.vminw
    2, // llvm.hexagon.A2.vnavgh
    2, // llvm.hexagon.A2.vnavghcr
    2, // llvm.hexagon.A2.vnavghr
    2, // llvm.hexagon.A2.vnavgw
    2, // llvm.hexagon.A2.vnavgwcr
    2, // llvm.hexagon.A2.vnavgwr
    2, // llvm.hexagon.A2.vraddub
    2, // llvm.hexagon.A2.vraddub.acc
    2, // llvm.hexagon.A2.vrsadub
    2, // llvm.hexagon.A2.vrsadub.acc
    2, // llvm.hexagon.A2.vsubb.map
    2, // llvm.hexagon.A2.vsubh
    2, // llvm.hexagon.A2.vsubhs
    2, // llvm.hexagon.A2.vsubub
    2, // llvm.hexagon.A2.vsububs
    2, // llvm.hexagon.A2.vsubuhs
    2, // llvm.hexagon.A2.vsubw
    2, // llvm.hexagon.A2.vsubws
    2, // llvm.hexagon.A2.xor
    2, // llvm.hexagon.A2.xorp
    2, // llvm.hexagon.A2.zxtb
    2, // llvm.hexagon.A2.zxth
    2, // llvm.hexagon.A4.andn
    2, // llvm.hexagon.A4.andnp
    2, // llvm.hexagon.A4.bitsplit
    52, // llvm.hexagon.A4.bitspliti
    2, // llvm.hexagon.A4.boundscheck
    2, // llvm.hexagon.A4.cmpbeq
    52, // llvm.hexagon.A4.cmpbeqi
    2, // llvm.hexagon.A4.cmpbgt
    52, // llvm.hexagon.A4.cmpbgti
    2, // llvm.hexagon.A4.cmpbgtu
    52, // llvm.hexagon.A4.cmpbgtui
    2, // llvm.hexagon.A4.cmpheq
    52, // llvm.hexagon.A4.cmpheqi
    2, // llvm.hexagon.A4.cmphgt
    52, // llvm.hexagon.A4.cmphgti
    2, // llvm.hexagon.A4.cmphgtu
    52, // llvm.hexagon.A4.cmphgtui
    24, // llvm.hexagon.A4.combineir
    52, // llvm.hexagon.A4.combineri
    52, // llvm.hexagon.A4.cround.ri
    2, // llvm.hexagon.A4.cround.rr
    2, // llvm.hexagon.A4.modwrapu
    2, // llvm.hexagon.A4.orn
    2, // llvm.hexagon.A4.ornp
    2, // llvm.hexagon.A4.rcmpeq
    52, // llvm.hexagon.A4.rcmpeqi
    2, // llvm.hexagon.A4.rcmpneq
    52, // llvm.hexagon.A4.rcmpneqi
    52, // llvm.hexagon.A4.round.ri
    52, // llvm.hexagon.A4.round.ri.sat
    2, // llvm.hexagon.A4.round.rr
    2, // llvm.hexagon.A4.round.rr.sat
    2, // llvm.hexagon.A4.tlbmatch
    2, // llvm.hexagon.A4.vcmpbeq.any
    52, // llvm.hexagon.A4.vcmpbeqi
    2, // llvm.hexagon.A4.vcmpbgt
    52, // llvm.hexagon.A4.vcmpbgti
    52, // llvm.hexagon.A4.vcmpbgtui
    52, // llvm.hexagon.A4.vcmpheqi
    52, // llvm.hexagon.A4.vcmphgti
    52, // llvm.hexagon.A4.vcmphgtui
    52, // llvm.hexagon.A4.vcmpweqi
    52, // llvm.hexagon.A4.vcmpwgti
    52, // llvm.hexagon.A4.vcmpwgtui
    2, // llvm.hexagon.A4.vrmaxh
    2, // llvm.hexagon.A4.vrmaxuh
    2, // llvm.hexagon.A4.vrmaxuw
    2, // llvm.hexagon.A4.vrmaxw
    2, // llvm.hexagon.A4.vrminh
    2, // llvm.hexagon.A4.vrminuh
    2, // llvm.hexagon.A4.vrminuw
    2, // llvm.hexagon.A4.vrminw
    2, // llvm.hexagon.A5.vaddhubs
    2, // llvm.hexagon.A6.vcmpbeq.notany
    52, // llvm.hexagon.A7.clip
    52, // llvm.hexagon.A7.croundd.ri
    2, // llvm.hexagon.A7.croundd.rr
    52, // llvm.hexagon.A7.vclip
    2, // llvm.hexagon.C2.all8
    2, // llvm.hexagon.C2.and
    2, // llvm.hexagon.C2.andn
    2, // llvm.hexagon.C2.any8
    2, // llvm.hexagon.C2.bitsclr
    52, // llvm.hexagon.C2.bitsclri
    2, // llvm.hexagon.C2.bitsset
    2, // llvm.hexagon.C2.cmpeq
    52, // llvm.hexagon.C2.cmpeqi
    2, // llvm.hexagon.C2.cmpeqp
    52, // llvm.hexagon.C2.cmpgei
    52, // llvm.hexagon.C2.cmpgeui
    2, // llvm.hexagon.C2.cmpgt
    52, // llvm.hexagon.C2.cmpgti
    2, // llvm.hexagon.C2.cmpgtp
    2, // llvm.hexagon.C2.cmpgtu
    52, // llvm.hexagon.C2.cmpgtui
    2, // llvm.hexagon.C2.cmpgtup
    2, // llvm.hexagon.C2.cmplt
    2, // llvm.hexagon.C2.cmpltu
    2, // llvm.hexagon.C2.mask
    2, // llvm.hexagon.C2.mux
    51, // llvm.hexagon.C2.muxii
    32, // llvm.hexagon.C2.muxir
    52, // llvm.hexagon.C2.muxri
    2, // llvm.hexagon.C2.not
    2, // llvm.hexagon.C2.or
    2, // llvm.hexagon.C2.orn
    2, // llvm.hexagon.C2.pxfer.map
    2, // llvm.hexagon.C2.tfrpr
    2, // llvm.hexagon.C2.tfrrp
    2, // llvm.hexagon.C2.vitpack
    2, // llvm.hexagon.C2.vmux
    2, // llvm.hexagon.C2.xor
    2, // llvm.hexagon.C4.and.and
    2, // llvm.hexagon.C4.and.andn
    2, // llvm.hexagon.C4.and.or
    2, // llvm.hexagon.C4.and.orn
    2, // llvm.hexagon.C4.cmplte
    52, // llvm.hexagon.C4.cmpltei
    2, // llvm.hexagon.C4.cmplteu
    52, // llvm.hexagon.C4.cmplteui
    2, // llvm.hexagon.C4.cmpneq
    52, // llvm.hexagon.C4.cmpneqi
    2, // llvm.hexagon.C4.fastcorner9
    2, // llvm.hexagon.C4.fastcorner9.not
    2, // llvm.hexagon.C4.nbitsclr
    52, // llvm.hexagon.C4.nbitsclri
    2, // llvm.hexagon.C4.nbitsset
    2, // llvm.hexagon.C4.or.and
    2, // llvm.hexagon.C4.or.andn
    2, // llvm.hexagon.C4.or.or
    2, // llvm.hexagon.C4.or.orn
    2, // llvm.hexagon.F2.conv.d2df
    2, // llvm.hexagon.F2.conv.d2sf
    2, // llvm.hexagon.F2.conv.df2d
    2, // llvm.hexagon.F2.conv.df2d.chop
    2, // llvm.hexagon.F2.conv.df2sf
    2, // llvm.hexagon.F2.conv.df2ud
    2, // llvm.hexagon.F2.conv.df2ud.chop
    2, // llvm.hexagon.F2.conv.df2uw
    2, // llvm.hexagon.F2.conv.df2uw.chop
    2, // llvm.hexagon.F2.conv.df2w
    2, // llvm.hexagon.F2.conv.df2w.chop
    2, // llvm.hexagon.F2.conv.sf2d
    2, // llvm.hexagon.F2.conv.sf2d.chop
    2, // llvm.hexagon.F2.conv.sf2df
    2, // llvm.hexagon.F2.conv.sf2ud
    2, // llvm.hexagon.F2.conv.sf2ud.chop
    2, // llvm.hexagon.F2.conv.sf2uw
    2, // llvm.hexagon.F2.conv.sf2uw.chop
    2, // llvm.hexagon.F2.conv.sf2w
    2, // llvm.hexagon.F2.conv.sf2w.chop
    2, // llvm.hexagon.F2.conv.ud2df
    2, // llvm.hexagon.F2.conv.ud2sf
    2, // llvm.hexagon.F2.conv.uw2df
    2, // llvm.hexagon.F2.conv.uw2sf
    2, // llvm.hexagon.F2.conv.w2df
    2, // llvm.hexagon.F2.conv.w2sf
    165, // llvm.hexagon.F2.dfadd
    166, // llvm.hexagon.F2.dfclass
    165, // llvm.hexagon.F2.dfcmpeq
    165, // llvm.hexagon.F2.dfcmpge
    165, // llvm.hexagon.F2.dfcmpgt
    165, // llvm.hexagon.F2.dfcmpuo
    167, // llvm.hexagon.F2.dfimm.n
    167, // llvm.hexagon.F2.dfimm.p
    165, // llvm.hexagon.F2.dfmax
    165, // llvm.hexagon.F2.dfmin
    165, // llvm.hexagon.F2.dfmpyfix
    165, // llvm.hexagon.F2.dfmpyhh
    165, // llvm.hexagon.F2.dfmpylh
    165, // llvm.hexagon.F2.dfmpyll
    165, // llvm.hexagon.F2.dfsub
    165, // llvm.hexagon.F2.sfadd
    166, // llvm.hexagon.F2.sfclass
    165, // llvm.hexagon.F2.sfcmpeq
    165, // llvm.hexagon.F2.sfcmpge
    165, // llvm.hexagon.F2.sfcmpgt
    165, // llvm.hexagon.F2.sfcmpuo
    165, // llvm.hexagon.F2.sffixupd
    165, // llvm.hexagon.F2.sffixupn
    165, // llvm.hexagon.F2.sffixupr
    165, // llvm.hexagon.F2.sffma
    165, // llvm.hexagon.F2.sffma.lib
    165, // llvm.hexagon.F2.sffma.sc
    165, // llvm.hexagon.F2.sffms
    165, // llvm.hexagon.F2.sffms.lib
    167, // llvm.hexagon.F2.sfimm.n
    167, // llvm.hexagon.F2.sfimm.p
    165, // llvm.hexagon.F2.sfmax
    165, // llvm.hexagon.F2.sfmin
    165, // llvm.hexagon.F2.sfmpy
    165, // llvm.hexagon.F2.sfsub
    21, // llvm.hexagon.L2.loadrb.pbr
    61, // llvm.hexagon.L2.loadrb.pci
    60, // llvm.hexagon.L2.loadrb.pcr
    21, // llvm.hexagon.L2.loadrd.pbr
    61, // llvm.hexagon.L2.loadrd.pci
    60, // llvm.hexagon.L2.loadrd.pcr
    21, // llvm.hexagon.L2.loadrh.pbr
    61, // llvm.hexagon.L2.loadrh.pci
    60, // llvm.hexagon.L2.loadrh.pcr
    21, // llvm.hexagon.L2.loadri.pbr
    61, // llvm.hexagon.L2.loadri.pci
    60, // llvm.hexagon.L2.loadri.pcr
    21, // llvm.hexagon.L2.loadrub.pbr
    61, // llvm.hexagon.L2.loadrub.pci
    60, // llvm.hexagon.L2.loadrub.pcr
    21, // llvm.hexagon.L2.loadruh.pbr
    61, // llvm.hexagon.L2.loadruh.pci
    60, // llvm.hexagon.L2.loadruh.pcr
    28, // llvm.hexagon.L2.loadw.locked
    28, // llvm.hexagon.L4.loadd.locked
    2, // llvm.hexagon.M2.acci
    32, // llvm.hexagon.M2.accii
    2, // llvm.hexagon.M2.cmaci.s0
    2, // llvm.hexagon.M2.cmacr.s0
    2, // llvm.hexagon.M2.cmacs.s0
    2, // llvm.hexagon.M2.cmacs.s1
    2, // llvm.hexagon.M2.cmacsc.s0
    2, // llvm.hexagon.M2.cmacsc.s1
    2, // llvm.hexagon.M2.cmpyi.s0
    2, // llvm.hexagon.M2.cmpyr.s0
    2, // llvm.hexagon.M2.cmpyrs.s0
    2, // llvm.hexagon.M2.cmpyrs.s1
    2, // llvm.hexagon.M2.cmpyrsc.s0
    2, // llvm.hexagon.M2.cmpyrsc.s1
    2, // llvm.hexagon.M2.cmpys.s0
    2, // llvm.hexagon.M2.cmpys.s1
    2, // llvm.hexagon.M2.cmpysc.s0
    2, // llvm.hexagon.M2.cmpysc.s1
    2, // llvm.hexagon.M2.cnacs.s0
    2, // llvm.hexagon.M2.cnacs.s1
    2, // llvm.hexagon.M2.cnacsc.s0
    2, // llvm.hexagon.M2.cnacsc.s1
    2, // llvm.hexagon.M2.dpmpyss.acc.s0
    2, // llvm.hexagon.M2.dpmpyss.nac.s0
    2, // llvm.hexagon.M2.dpmpyss.rnd.s0
    2, // llvm.hexagon.M2.dpmpyss.s0
    2, // llvm.hexagon.M2.dpmpyuu.acc.s0
    2, // llvm.hexagon.M2.dpmpyuu.nac.s0
    2, // llvm.hexagon.M2.dpmpyuu.s0
    2, // llvm.hexagon.M2.hmmpyh.rs1
    2, // llvm.hexagon.M2.hmmpyh.s1
    2, // llvm.hexagon.M2.hmmpyl.rs1
    2, // llvm.hexagon.M2.hmmpyl.s1
    2, // llvm.hexagon.M2.maci
    32, // llvm.hexagon.M2.macsin
    32, // llvm.hexagon.M2.macsip
    2, // llvm.hexagon.M2.mmachs.rs0
    2, // llvm.hexagon.M2.mmachs.rs1
    2, // llvm.hexagon.M2.mmachs.s0
    2, // llvm.hexagon.M2.mmachs.s1
    2, // llvm.hexagon.M2.mmacls.rs0
    2, // llvm.hexagon.M2.mmacls.rs1
    2, // llvm.hexagon.M2.mmacls.s0
    2, // llvm.hexagon.M2.mmacls.s1
    2, // llvm.hexagon.M2.mmacuhs.rs0
    2, // llvm.hexagon.M2.mmacuhs.rs1
    2, // llvm.hexagon.M2.mmacuhs.s0
    2, // llvm.hexagon.M2.mmacuhs.s1
    2, // llvm.hexagon.M2.mmaculs.rs0
    2, // llvm.hexagon.M2.mmaculs.rs1
    2, // llvm.hexagon.M2.mmaculs.s0
    2, // llvm.hexagon.M2.mmaculs.s1
    2, // llvm.hexagon.M2.mmpyh.rs0
    2, // llvm.hexagon.M2.mmpyh.rs1
    2, // llvm.hexagon.M2.mmpyh.s0
    2, // llvm.hexagon.M2.mmpyh.s1
    2, // llvm.hexagon.M2.mmpyl.rs0
    2, // llvm.hexagon.M2.mmpyl.rs1
    2, // llvm.hexagon.M2.mmpyl.s0
    2, // llvm.hexagon.M2.mmpyl.s1
    2, // llvm.hexagon.M2.mmpyuh.rs0
    2, // llvm.hexagon.M2.mmpyuh.rs1
    2, // llvm.hexagon.M2.mmpyuh.s0
    2, // llvm.hexagon.M2.mmpyuh.s1
    2, // llvm.hexagon.M2.mmpyul.rs0
    2, // llvm.hexagon.M2.mmpyul.rs1
    2, // llvm.hexagon.M2.mmpyul.s0
    2, // llvm.hexagon.M2.mmpyul.s1
    2, // llvm.hexagon.M2.mnaci
    2, // llvm.hexagon.M2.mpy.acc.hh.s0
    2, // llvm.hexagon.M2.mpy.acc.hh.s1
    2, // llvm.hexagon.M2.mpy.acc.hl.s0
    2, // llvm.hexagon.M2.mpy.acc.hl.s1
    2, // llvm.hexagon.M2.mpy.acc.lh.s0
    2, // llvm.hexagon.M2.mpy.acc.lh.s1
    2, // llvm.hexagon.M2.mpy.acc.ll.s0
    2, // llvm.hexagon.M2.mpy.acc.ll.s1
    2, // llvm.hexagon.M2.mpy.acc.sat.hh.s0
    2, // llvm.hexagon.M2.mpy.acc.sat.hh.s1
    2, // llvm.hexagon.M2.mpy.acc.sat.hl.s0
    2, // llvm.hexagon.M2.mpy.acc.sat.hl.s1
    2, // llvm.hexagon.M2.mpy.acc.sat.lh.s0
    2, // llvm.hexagon.M2.mpy.acc.sat.lh.s1
    2, // llvm.hexagon.M2.mpy.acc.sat.ll.s0
    2, // llvm.hexagon.M2.mpy.acc.sat.ll.s1
    2, // llvm.hexagon.M2.mpy.hh.s0
    2, // llvm.hexagon.M2.mpy.hh.s1
    2, // llvm.hexagon.M2.mpy.hl.s0
    2, // llvm.hexagon.M2.mpy.hl.s1
    2, // llvm.hexagon.M2.mpy.lh.s0
    2, // llvm.hexagon.M2.mpy.lh.s1
    2, // llvm.hexagon.M2.mpy.ll.s0
    2, // llvm.hexagon.M2.mpy.ll.s1
    2, // llvm.hexagon.M2.mpy.nac.hh.s0
    2, // llvm.hexagon.M2.mpy.nac.hh.s1
    2, // llvm.hexagon.M2.mpy.nac.hl.s0
    2, // llvm.hexagon.M2.mpy.nac.hl.s1
    2, // llvm.hexagon.M2.mpy.nac.lh.s0
    2, // llvm.hexagon.M2.mpy.nac.lh.s1
    2, // llvm.hexagon.M2.mpy.nac.ll.s0
    2, // llvm.hexagon.M2.mpy.nac.ll.s1
    2, // llvm.hexagon.M2.mpy.nac.sat.hh.s0
    2, // llvm.hexagon.M2.mpy.nac.sat.hh.s1
    2, // llvm.hexagon.M2.mpy.nac.sat.hl.s0
    2, // llvm.hexagon.M2.mpy.nac.sat.hl.s1
    2, // llvm.hexagon.M2.mpy.nac.sat.lh.s0
    2, // llvm.hexagon.M2.mpy.nac.sat.lh.s1
    2, // llvm.hexagon.M2.mpy.nac.sat.ll.s0
    2, // llvm.hexagon.M2.mpy.nac.sat.ll.s1
    2, // llvm.hexagon.M2.mpy.rnd.hh.s0
    2, // llvm.hexagon.M2.mpy.rnd.hh.s1
    2, // llvm.hexagon.M2.mpy.rnd.hl.s0
    2, // llvm.hexagon.M2.mpy.rnd.hl.s1
    2, // llvm.hexagon.M2.mpy.rnd.lh.s0
    2, // llvm.hexagon.M2.mpy.rnd.lh.s1
    2, // llvm.hexagon.M2.mpy.rnd.ll.s0
    2, // llvm.hexagon.M2.mpy.rnd.ll.s1
    2, // llvm.hexagon.M2.mpy.sat.hh.s0
    2, // llvm.hexagon.M2.mpy.sat.hh.s1
    2, // llvm.hexagon.M2.mpy.sat.hl.s0
    2, // llvm.hexagon.M2.mpy.sat.hl.s1
    2, // llvm.hexagon.M2.mpy.sat.lh.s0
    2, // llvm.hexagon.M2.mpy.sat.lh.s1
    2, // llvm.hexagon.M2.mpy.sat.ll.s0
    2, // llvm.hexagon.M2.mpy.sat.ll.s1
    2, // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
    2, // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
    2, // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
    2, // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
    2, // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
    2, // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
    2, // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
    2, // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
    2, // llvm.hexagon.M2.mpy.up
    2, // llvm.hexagon.M2.mpy.up.s1
    2, // llvm.hexagon.M2.mpy.up.s1.sat
    2, // llvm.hexagon.M2.mpyd.acc.hh.s0
    2, // llvm.hexagon.M2.mpyd.acc.hh.s1
    2, // llvm.hexagon.M2.mpyd.acc.hl.s0
    2, // llvm.hexagon.M2.mpyd.acc.hl.s1
    2, // llvm.hexagon.M2.mpyd.acc.lh.s0
    2, // llvm.hexagon.M2.mpyd.acc.lh.s1
    2, // llvm.hexagon.M2.mpyd.acc.ll.s0
    2, // llvm.hexagon.M2.mpyd.acc.ll.s1
    2, // llvm.hexagon.M2.mpyd.hh.s0
    2, // llvm.hexagon.M2.mpyd.hh.s1
    2, // llvm.hexagon.M2.mpyd.hl.s0
    2, // llvm.hexagon.M2.mpyd.hl.s1
    2, // llvm.hexagon.M2.mpyd.lh.s0
    2, // llvm.hexagon.M2.mpyd.lh.s1
    2, // llvm.hexagon.M2.mpyd.ll.s0
    2, // llvm.hexagon.M2.mpyd.ll.s1
    2, // llvm.hexagon.M2.mpyd.nac.hh.s0
    2, // llvm.hexagon.M2.mpyd.nac.hh.s1
    2, // llvm.hexagon.M2.mpyd.nac.hl.s0
    2, // llvm.hexagon.M2.mpyd.nac.hl.s1
    2, // llvm.hexagon.M2.mpyd.nac.lh.s0
    2, // llvm.hexagon.M2.mpyd.nac.lh.s1
    2, // llvm.hexagon.M2.mpyd.nac.ll.s0
    2, // llvm.hexagon.M2.mpyd.nac.ll.s1
    2, // llvm.hexagon.M2.mpyd.rnd.hh.s0
    2, // llvm.hexagon.M2.mpyd.rnd.hh.s1
    2, // llvm.hexagon.M2.mpyd.rnd.hl.s0
    2, // llvm.hexagon.M2.mpyd.rnd.hl.s1
    2, // llvm.hexagon.M2.mpyd.rnd.lh.s0
    2, // llvm.hexagon.M2.mpyd.rnd.lh.s1
    2, // llvm.hexagon.M2.mpyd.rnd.ll.s0
    2, // llvm.hexagon.M2.mpyd.rnd.ll.s1
    2, // llvm.hexagon.M2.mpyi
    52, // llvm.hexagon.M2.mpysmi
    2, // llvm.hexagon.M2.mpysu.up
    2, // llvm.hexagon.M2.mpyu.acc.hh.s0
    2, // llvm.hexagon.M2.mpyu.acc.hh.s1
    2, // llvm.hexagon.M2.mpyu.acc.hl.s0
    2, // llvm.hexagon.M2.mpyu.acc.hl.s1
    2, // llvm.hexagon.M2.mpyu.acc.lh.s0
    2, // llvm.hexagon.M2.mpyu.acc.lh.s1
    2, // llvm.hexagon.M2.mpyu.acc.ll.s0
    2, // llvm.hexagon.M2.mpyu.acc.ll.s1
    2, // llvm.hexagon.M2.mpyu.hh.s0
    2, // llvm.hexagon.M2.mpyu.hh.s1
    2, // llvm.hexagon.M2.mpyu.hl.s0
    2, // llvm.hexagon.M2.mpyu.hl.s1
    2, // llvm.hexagon.M2.mpyu.lh.s0
    2, // llvm.hexagon.M2.mpyu.lh.s1
    2, // llvm.hexagon.M2.mpyu.ll.s0
    2, // llvm.hexagon.M2.mpyu.ll.s1
    2, // llvm.hexagon.M2.mpyu.nac.hh.s0
    2, // llvm.hexagon.M2.mpyu.nac.hh.s1
    2, // llvm.hexagon.M2.mpyu.nac.hl.s0
    2, // llvm.hexagon.M2.mpyu.nac.hl.s1
    2, // llvm.hexagon.M2.mpyu.nac.lh.s0
    2, // llvm.hexagon.M2.mpyu.nac.lh.s1
    2, // llvm.hexagon.M2.mpyu.nac.ll.s0
    2, // llvm.hexagon.M2.mpyu.nac.ll.s1
    2, // llvm.hexagon.M2.mpyu.up
    2, // llvm.hexagon.M2.mpyud.acc.hh.s0
    2, // llvm.hexagon.M2.mpyud.acc.hh.s1
    2, // llvm.hexagon.M2.mpyud.acc.hl.s0
    2, // llvm.hexagon.M2.mpyud.acc.hl.s1
    2, // llvm.hexagon.M2.mpyud.acc.lh.s0
    2, // llvm.hexagon.M2.mpyud.acc.lh.s1
    2, // llvm.hexagon.M2.mpyud.acc.ll.s0
    2, // llvm.hexagon.M2.mpyud.acc.ll.s1
    2, // llvm.hexagon.M2.mpyud.hh.s0
    2, // llvm.hexagon.M2.mpyud.hh.s1
    2, // llvm.hexagon.M2.mpyud.hl.s0
    2, // llvm.hexagon.M2.mpyud.hl.s1
    2, // llvm.hexagon.M2.mpyud.lh.s0
    2, // llvm.hexagon.M2.mpyud.lh.s1
    2, // llvm.hexagon.M2.mpyud.ll.s0
    2, // llvm.hexagon.M2.mpyud.ll.s1
    2, // llvm.hexagon.M2.mpyud.nac.hh.s0
    2, // llvm.hexagon.M2.mpyud.nac.hh.s1
    2, // llvm.hexagon.M2.mpyud.nac.hl.s0
    2, // llvm.hexagon.M2.mpyud.nac.hl.s1
    2, // llvm.hexagon.M2.mpyud.nac.lh.s0
    2, // llvm.hexagon.M2.mpyud.nac.lh.s1
    2, // llvm.hexagon.M2.mpyud.nac.ll.s0
    2, // llvm.hexagon.M2.mpyud.nac.ll.s1
    2, // llvm.hexagon.M2.mpyui
    2, // llvm.hexagon.M2.nacci
    32, // llvm.hexagon.M2.naccii
    2, // llvm.hexagon.M2.subacc
    2, // llvm.hexagon.M2.vabsdiffh
    2, // llvm.hexagon.M2.vabsdiffw
    2, // llvm.hexagon.M2.vcmac.s0.sat.i
    2, // llvm.hexagon.M2.vcmac.s0.sat.r
    2, // llvm.hexagon.M2.vcmpy.s0.sat.i
    2, // llvm.hexagon.M2.vcmpy.s0.sat.r
    2, // llvm.hexagon.M2.vcmpy.s1.sat.i
    2, // llvm.hexagon.M2.vcmpy.s1.sat.r
    2, // llvm.hexagon.M2.vdmacs.s0
    2, // llvm.hexagon.M2.vdmacs.s1
    2, // llvm.hexagon.M2.vdmpyrs.s0
    2, // llvm.hexagon.M2.vdmpyrs.s1
    2, // llvm.hexagon.M2.vdmpys.s0
    2, // llvm.hexagon.M2.vdmpys.s1
    2, // llvm.hexagon.M2.vmac2
    2, // llvm.hexagon.M2.vmac2es
    2, // llvm.hexagon.M2.vmac2es.s0
    2, // llvm.hexagon.M2.vmac2es.s1
    2, // llvm.hexagon.M2.vmac2s.s0
    2, // llvm.hexagon.M2.vmac2s.s1
    2, // llvm.hexagon.M2.vmac2su.s0
    2, // llvm.hexagon.M2.vmac2su.s1
    2, // llvm.hexagon.M2.vmpy2es.s0
    2, // llvm.hexagon.M2.vmpy2es.s1
    2, // llvm.hexagon.M2.vmpy2s.s0
    2, // llvm.hexagon.M2.vmpy2s.s0pack
    2, // llvm.hexagon.M2.vmpy2s.s1
    2, // llvm.hexagon.M2.vmpy2s.s1pack
    2, // llvm.hexagon.M2.vmpy2su.s0
    2, // llvm.hexagon.M2.vmpy2su.s1
    2, // llvm.hexagon.M2.vraddh
    2, // llvm.hexagon.M2.vradduh
    2, // llvm.hexagon.M2.vrcmaci.s0
    2, // llvm.hexagon.M2.vrcmaci.s0c
    2, // llvm.hexagon.M2.vrcmacr.s0
    2, // llvm.hexagon.M2.vrcmacr.s0c
    2, // llvm.hexagon.M2.vrcmpyi.s0
    2, // llvm.hexagon.M2.vrcmpyi.s0c
    2, // llvm.hexagon.M2.vrcmpyr.s0
    2, // llvm.hexagon.M2.vrcmpyr.s0c
    2, // llvm.hexagon.M2.vrcmpys.acc.s1
    2, // llvm.hexagon.M2.vrcmpys.s1
    2, // llvm.hexagon.M2.vrcmpys.s1rp
    2, // llvm.hexagon.M2.vrmac.s0
    2, // llvm.hexagon.M2.vrmpy.s0
    2, // llvm.hexagon.M2.xor.xacc
    2, // llvm.hexagon.M4.and.and
    2, // llvm.hexagon.M4.and.andn
    2, // llvm.hexagon.M4.and.or
    2, // llvm.hexagon.M4.and.xor
    2, // llvm.hexagon.M4.cmpyi.wh
    2, // llvm.hexagon.M4.cmpyi.whc
    2, // llvm.hexagon.M4.cmpyr.wh
    2, // llvm.hexagon.M4.cmpyr.whc
    2, // llvm.hexagon.M4.mac.up.s1.sat
    153, // llvm.hexagon.M4.mpyri.addi
    32, // llvm.hexagon.M4.mpyri.addr
    52, // llvm.hexagon.M4.mpyri.addr.u2
    24, // llvm.hexagon.M4.mpyrr.addi
    2, // llvm.hexagon.M4.mpyrr.addr
    2, // llvm.hexagon.M4.nac.up.s1.sat
    2, // llvm.hexagon.M4.or.and
    2, // llvm.hexagon.M4.or.andn
    2, // llvm.hexagon.M4.or.or
    2, // llvm.hexagon.M4.or.xor
    2, // llvm.hexagon.M4.pmpyw
    2, // llvm.hexagon.M4.pmpyw.acc
    2, // llvm.hexagon.M4.vpmpyh
    2, // llvm.hexagon.M4.vpmpyh.acc
    2, // llvm.hexagon.M4.vrmpyeh.acc.s0
    2, // llvm.hexagon.M4.vrmpyeh.acc.s1
    2, // llvm.hexagon.M4.vrmpyeh.s0
    2, // llvm.hexagon.M4.vrmpyeh.s1
    2, // llvm.hexagon.M4.vrmpyoh.acc.s0
    2, // llvm.hexagon.M4.vrmpyoh.acc.s1
    2, // llvm.hexagon.M4.vrmpyoh.s0
    2, // llvm.hexagon.M4.vrmpyoh.s1
    2, // llvm.hexagon.M4.xor.and
    2, // llvm.hexagon.M4.xor.andn
    2, // llvm.hexagon.M4.xor.or
    2, // llvm.hexagon.M4.xor.xacc
    2, // llvm.hexagon.M5.vdmacbsu
    2, // llvm.hexagon.M5.vdmpybsu
    2, // llvm.hexagon.M5.vmacbsu
    2, // llvm.hexagon.M5.vmacbuu
    2, // llvm.hexagon.M5.vmpybsu
    2, // llvm.hexagon.M5.vmpybuu
    2, // llvm.hexagon.M5.vrmacbsu
    2, // llvm.hexagon.M5.vrmacbuu
    2, // llvm.hexagon.M5.vrmpybsu
    2, // llvm.hexagon.M5.vrmpybuu
    2, // llvm.hexagon.M6.vabsdiffb
    2, // llvm.hexagon.M6.vabsdiffub
    2, // llvm.hexagon.M7.dcmpyiw
    2, // llvm.hexagon.M7.dcmpyiw.acc
    2, // llvm.hexagon.M7.dcmpyiwc
    2, // llvm.hexagon.M7.dcmpyiwc.acc
    2, // llvm.hexagon.M7.dcmpyrw
    2, // llvm.hexagon.M7.dcmpyrw.acc
    2, // llvm.hexagon.M7.dcmpyrwc
    2, // llvm.hexagon.M7.dcmpyrwc.acc
    2, // llvm.hexagon.M7.vdmpy
    2, // llvm.hexagon.M7.vdmpy.acc
    2, // llvm.hexagon.M7.wcmpyiw
    2, // llvm.hexagon.M7.wcmpyiw.rnd
    2, // llvm.hexagon.M7.wcmpyiwc
    2, // llvm.hexagon.M7.wcmpyiwc.rnd
    2, // llvm.hexagon.M7.wcmpyrw
    2, // llvm.hexagon.M7.wcmpyrw.rnd
    2, // llvm.hexagon.M7.wcmpyrwc
    2, // llvm.hexagon.M7.wcmpyrwc.rnd
    32, // llvm.hexagon.S2.addasl.rrri
    52, // llvm.hexagon.S2.asl.i.p
    32, // llvm.hexagon.S2.asl.i.p.acc
    32, // llvm.hexagon.S2.asl.i.p.and
    32, // llvm.hexagon.S2.asl.i.p.nac
    32, // llvm.hexagon.S2.asl.i.p.or
    32, // llvm.hexagon.S2.asl.i.p.xacc
    52, // llvm.hexagon.S2.asl.i.r
    32, // llvm.hexagon.S2.asl.i.r.acc
    32, // llvm.hexagon.S2.asl.i.r.and
    32, // llvm.hexagon.S2.asl.i.r.nac
    32, // llvm.hexagon.S2.asl.i.r.or
    52, // llvm.hexagon.S2.asl.i.r.sat
    32, // llvm.hexagon.S2.asl.i.r.xacc
    52, // llvm.hexagon.S2.asl.i.vh
    52, // llvm.hexagon.S2.asl.i.vw
    2, // llvm.hexagon.S2.asl.r.p
    2, // llvm.hexagon.S2.asl.r.p.acc
    2, // llvm.hexagon.S2.asl.r.p.and
    2, // llvm.hexagon.S2.asl.r.p.nac
    2, // llvm.hexagon.S2.asl.r.p.or
    2, // llvm.hexagon.S2.asl.r.p.xor
    2, // llvm.hexagon.S2.asl.r.r
    2, // llvm.hexagon.S2.asl.r.r.acc
    2, // llvm.hexagon.S2.asl.r.r.and
    2, // llvm.hexagon.S2.asl.r.r.nac
    2, // llvm.hexagon.S2.asl.r.r.or
    2, // llvm.hexagon.S2.asl.r.r.sat
    2, // llvm.hexagon.S2.asl.r.vh
    2, // llvm.hexagon.S2.asl.r.vw
    52, // llvm.hexagon.S2.asr.i.p
    32, // llvm.hexagon.S2.asr.i.p.acc
    32, // llvm.hexagon.S2.asr.i.p.and
    32, // llvm.hexagon.S2.asr.i.p.nac
    32, // llvm.hexagon.S2.asr.i.p.or
    52, // llvm.hexagon.S2.asr.i.p.rnd
    52, // llvm.hexagon.S2.asr.i.p.rnd.goodsyntax
    52, // llvm.hexagon.S2.asr.i.r
    32, // llvm.hexagon.S2.asr.i.r.acc
    32, // llvm.hexagon.S2.asr.i.r.and
    32, // llvm.hexagon.S2.asr.i.r.nac
    32, // llvm.hexagon.S2.asr.i.r.or
    52, // llvm.hexagon.S2.asr.i.r.rnd
    52, // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
    52, // llvm.hexagon.S2.asr.i.svw.trun
    52, // llvm.hexagon.S2.asr.i.vh
    52, // llvm.hexagon.S2.asr.i.vw
    2, // llvm.hexagon.S2.asr.r.p
    2, // llvm.hexagon.S2.asr.r.p.acc
    2, // llvm.hexagon.S2.asr.r.p.and
    2, // llvm.hexagon.S2.asr.r.p.nac
    2, // llvm.hexagon.S2.asr.r.p.or
    2, // llvm.hexagon.S2.asr.r.p.xor
    2, // llvm.hexagon.S2.asr.r.r
    2, // llvm.hexagon.S2.asr.r.r.acc
    2, // llvm.hexagon.S2.asr.r.r.and
    2, // llvm.hexagon.S2.asr.r.r.nac
    2, // llvm.hexagon.S2.asr.r.r.or
    2, // llvm.hexagon.S2.asr.r.r.sat
    2, // llvm.hexagon.S2.asr.r.svw.trun
    2, // llvm.hexagon.S2.asr.r.vh
    2, // llvm.hexagon.S2.asr.r.vw
    2, // llvm.hexagon.S2.brev
    2, // llvm.hexagon.S2.brevp
    2, // llvm.hexagon.S2.cl0
    2, // llvm.hexagon.S2.cl0p
    2, // llvm.hexagon.S2.cl1
    2, // llvm.hexagon.S2.cl1p
    2, // llvm.hexagon.S2.clb
    2, // llvm.hexagon.S2.clbnorm
    2, // llvm.hexagon.S2.clbp
    52, // llvm.hexagon.S2.clrbit.i
    2, // llvm.hexagon.S2.clrbit.r
    2, // llvm.hexagon.S2.ct0
    2, // llvm.hexagon.S2.ct0p
    2, // llvm.hexagon.S2.ct1
    2, // llvm.hexagon.S2.ct1p
    2, // llvm.hexagon.S2.deinterleave
    51, // llvm.hexagon.S2.extractu
    2, // llvm.hexagon.S2.extractu.rp
    51, // llvm.hexagon.S2.extractup
    2, // llvm.hexagon.S2.extractup.rp
    168, // llvm.hexagon.S2.insert
    2, // llvm.hexagon.S2.insert.rp
    168, // llvm.hexagon.S2.insertp
    2, // llvm.hexagon.S2.insertp.rp
    2, // llvm.hexagon.S2.interleave
    2, // llvm.hexagon.S2.lfsp
    2, // llvm.hexagon.S2.lsl.r.p
    2, // llvm.hexagon.S2.lsl.r.p.acc
    2, // llvm.hexagon.S2.lsl.r.p.and
    2, // llvm.hexagon.S2.lsl.r.p.nac
    2, // llvm.hexagon.S2.lsl.r.p.or
    2, // llvm.hexagon.S2.lsl.r.p.xor
    2, // llvm.hexagon.S2.lsl.r.r
    2, // llvm.hexagon.S2.lsl.r.r.acc
    2, // llvm.hexagon.S2.lsl.r.r.and
    2, // llvm.hexagon.S2.lsl.r.r.nac
    2, // llvm.hexagon.S2.lsl.r.r.or
    2, // llvm.hexagon.S2.lsl.r.vh
    2, // llvm.hexagon.S2.lsl.r.vw
    52, // llvm.hexagon.S2.lsr.i.p
    32, // llvm.hexagon.S2.lsr.i.p.acc
    32, // llvm.hexagon.S2.lsr.i.p.and
    32, // llvm.hexagon.S2.lsr.i.p.nac
    32, // llvm.hexagon.S2.lsr.i.p.or
    32, // llvm.hexagon.S2.lsr.i.p.xacc
    52, // llvm.hexagon.S2.lsr.i.r
    32, // llvm.hexagon.S2.lsr.i.r.acc
    32, // llvm.hexagon.S2.lsr.i.r.and
    32, // llvm.hexagon.S2.lsr.i.r.nac
    32, // llvm.hexagon.S2.lsr.i.r.or
    32, // llvm.hexagon.S2.lsr.i.r.xacc
    52, // llvm.hexagon.S2.lsr.i.vh
    52, // llvm.hexagon.S2.lsr.i.vw
    2, // llvm.hexagon.S2.lsr.r.p
    2, // llvm.hexagon.S2.lsr.r.p.acc
    2, // llvm.hexagon.S2.lsr.r.p.and
    2, // llvm.hexagon.S2.lsr.r.p.nac
    2, // llvm.hexagon.S2.lsr.r.p.or
    2, // llvm.hexagon.S2.lsr.r.p.xor
    2, // llvm.hexagon.S2.lsr.r.r
    2, // llvm.hexagon.S2.lsr.r.r.acc
    2, // llvm.hexagon.S2.lsr.r.r.and
    2, // llvm.hexagon.S2.lsr.r.r.nac
    2, // llvm.hexagon.S2.lsr.r.r.or
    2, // llvm.hexagon.S2.lsr.r.vh
    2, // llvm.hexagon.S2.lsr.r.vw
    152, // llvm.hexagon.S2.mask
    2, // llvm.hexagon.S2.packhl
    2, // llvm.hexagon.S2.parityp
    52, // llvm.hexagon.S2.setbit.i
    2, // llvm.hexagon.S2.setbit.r
    2, // llvm.hexagon.S2.shuffeb
    2, // llvm.hexagon.S2.shuffeh
    2, // llvm.hexagon.S2.shuffob
    2, // llvm.hexagon.S2.shuffoh
    65, // llvm.hexagon.S2.storerb.pbr
    62, // llvm.hexagon.S2.storerb.pci
    61, // llvm.hexagon.S2.storerb.pcr
    65, // llvm.hexagon.S2.storerd.pbr
    62, // llvm.hexagon.S2.storerd.pci
    61, // llvm.hexagon.S2.storerd.pcr
    65, // llvm.hexagon.S2.storerf.pbr
    62, // llvm.hexagon.S2.storerf.pci
    61, // llvm.hexagon.S2.storerf.pcr
    65, // llvm.hexagon.S2.storerh.pbr
    62, // llvm.hexagon.S2.storerh.pci
    61, // llvm.hexagon.S2.storerh.pcr
    65, // llvm.hexagon.S2.storeri.pbr
    62, // llvm.hexagon.S2.storeri.pci
    61, // llvm.hexagon.S2.storeri.pcr
    28, // llvm.hexagon.S2.storew.locked
    2, // llvm.hexagon.S2.svsathb
    2, // llvm.hexagon.S2.svsathub
    168, // llvm.hexagon.S2.tableidxb.goodsyntax
    168, // llvm.hexagon.S2.tableidxd.goodsyntax
    168, // llvm.hexagon.S2.tableidxh.goodsyntax
    168, // llvm.hexagon.S2.tableidxw.goodsyntax
    52, // llvm.hexagon.S2.togglebit.i
    2, // llvm.hexagon.S2.togglebit.r
    52, // llvm.hexagon.S2.tstbit.i
    2, // llvm.hexagon.S2.tstbit.r
    32, // llvm.hexagon.S2.valignib
    2, // llvm.hexagon.S2.valignrb
    2, // llvm.hexagon.S2.vcnegh
    2, // llvm.hexagon.S2.vcrotate
    2, // llvm.hexagon.S2.vrcnegh
    2, // llvm.hexagon.S2.vrndpackwh
    2, // llvm.hexagon.S2.vrndpackwhs
    2, // llvm.hexagon.S2.vsathb
    2, // llvm.hexagon.S2.vsathb.nopack
    2, // llvm.hexagon.S2.vsathub
    2, // llvm.hexagon.S2.vsathub.nopack
    2, // llvm.hexagon.S2.vsatwh
    2, // llvm.hexagon.S2.vsatwh.nopack
    2, // llvm.hexagon.S2.vsatwuh
    2, // llvm.hexagon.S2.vsatwuh.nopack
    2, // llvm.hexagon.S2.vsplatrb
    2, // llvm.hexagon.S2.vsplatrh
    32, // llvm.hexagon.S2.vspliceib
    2, // llvm.hexagon.S2.vsplicerb
    2, // llvm.hexagon.S2.vsxtbh
    2, // llvm.hexagon.S2.vsxthw
    2, // llvm.hexagon.S2.vtrunehb
    2, // llvm.hexagon.S2.vtrunewh
    2, // llvm.hexagon.S2.vtrunohb
    2, // llvm.hexagon.S2.vtrunowh
    2, // llvm.hexagon.S2.vzxtbh
    2, // llvm.hexagon.S2.vzxthw
    32, // llvm.hexagon.S4.addaddi
    153, // llvm.hexagon.S4.addi.asl.ri
    153, // llvm.hexagon.S4.addi.lsr.ri
    153, // llvm.hexagon.S4.andi.asl.ri
    153, // llvm.hexagon.S4.andi.lsr.ri
    52, // llvm.hexagon.S4.clbaddi
    52, // llvm.hexagon.S4.clbpaddi
    2, // llvm.hexagon.S4.clbpnorm
    51, // llvm.hexagon.S4.extract
    2, // llvm.hexagon.S4.extract.rp
    51, // llvm.hexagon.S4.extractp
    2, // llvm.hexagon.S4.extractp.rp
    24, // llvm.hexagon.S4.lsli
    52, // llvm.hexagon.S4.ntstbit.i
    2, // llvm.hexagon.S4.ntstbit.r
    32, // llvm.hexagon.S4.or.andi
    32, // llvm.hexagon.S4.or.andix
    32, // llvm.hexagon.S4.or.ori
    153, // llvm.hexagon.S4.ori.asl.ri
    153, // llvm.hexagon.S4.ori.lsr.ri
    2, // llvm.hexagon.S4.parity
    28, // llvm.hexagon.S4.stored.locked
    52, // llvm.hexagon.S4.subaddi
    153, // llvm.hexagon.S4.subi.asl.ri
    153, // llvm.hexagon.S4.subi.lsr.ri
    32, // llvm.hexagon.S4.vrcrotate
    66, // llvm.hexagon.S4.vrcrotate.acc
    2, // llvm.hexagon.S4.vxaddsubh
    2, // llvm.hexagon.S4.vxaddsubhr
    2, // llvm.hexagon.S4.vxaddsubw
    2, // llvm.hexagon.S4.vxsubaddh
    2, // llvm.hexagon.S4.vxsubaddhr
    2, // llvm.hexagon.S4.vxsubaddw
    52, // llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax
    52, // llvm.hexagon.S5.asrhub.sat
    2, // llvm.hexagon.S5.popcountp
    52, // llvm.hexagon.S5.vasrhrnd.goodsyntax
    52, // llvm.hexagon.S6.rol.i.p
    32, // llvm.hexagon.S6.rol.i.p.acc
    32, // llvm.hexagon.S6.rol.i.p.and
    32, // llvm.hexagon.S6.rol.i.p.nac
    32, // llvm.hexagon.S6.rol.i.p.or
    32, // llvm.hexagon.S6.rol.i.p.xacc
    52, // llvm.hexagon.S6.rol.i.r
    32, // llvm.hexagon.S6.rol.i.r.acc
    32, // llvm.hexagon.S6.rol.i.r.and
    32, // llvm.hexagon.S6.rol.i.r.nac
    32, // llvm.hexagon.S6.rol.i.r.or
    32, // llvm.hexagon.S6.rol.i.r.xacc
    2, // llvm.hexagon.S6.vsplatrbp
    2, // llvm.hexagon.S6.vtrunehb.ppp
    2, // llvm.hexagon.S6.vtrunohb.ppp
    2, // llvm.hexagon.V6.extractw
    2, // llvm.hexagon.V6.extractw.128B
    2, // llvm.hexagon.V6.hi
    2, // llvm.hexagon.V6.hi.128B
    2, // llvm.hexagon.V6.lo
    2, // llvm.hexagon.V6.lo.128B
    2, // llvm.hexagon.V6.lvsplatb
    2, // llvm.hexagon.V6.lvsplatb.128B
    2, // llvm.hexagon.V6.lvsplath
    2, // llvm.hexagon.V6.lvsplath.128B
    2, // llvm.hexagon.V6.lvsplatw
    2, // llvm.hexagon.V6.lvsplatw.128B
    2, // llvm.hexagon.V6.pred.and
    2, // llvm.hexagon.V6.pred.and.128B
    2, // llvm.hexagon.V6.pred.and.n
    2, // llvm.hexagon.V6.pred.and.n.128B
    2, // llvm.hexagon.V6.pred.not
    2, // llvm.hexagon.V6.pred.not.128B
    2, // llvm.hexagon.V6.pred.or
    2, // llvm.hexagon.V6.pred.or.128B
    2, // llvm.hexagon.V6.pred.or.n
    2, // llvm.hexagon.V6.pred.or.n.128B
    2, // llvm.hexagon.V6.pred.scalar2
    2, // llvm.hexagon.V6.pred.scalar2.128B
    2, // llvm.hexagon.V6.pred.scalar2v2
    2, // llvm.hexagon.V6.pred.scalar2v2.128B
    2, // llvm.hexagon.V6.pred.typecast
    2, // llvm.hexagon.V6.pred.typecast.128B
    2, // llvm.hexagon.V6.pred.xor
    2, // llvm.hexagon.V6.pred.xor.128B
    2, // llvm.hexagon.V6.shuffeqh
    2, // llvm.hexagon.V6.shuffeqh.128B
    2, // llvm.hexagon.V6.shuffeqw
    2, // llvm.hexagon.V6.shuffeqw.128B
    65, // llvm.hexagon.V6.vS32b.nqpred.ai
    65, // llvm.hexagon.V6.vS32b.nqpred.ai.128B
    65, // llvm.hexagon.V6.vS32b.nt.nqpred.ai
    65, // llvm.hexagon.V6.vS32b.nt.nqpred.ai.128B
    65, // llvm.hexagon.V6.vS32b.nt.qpred.ai
    65, // llvm.hexagon.V6.vS32b.nt.qpred.ai.128B
    65, // llvm.hexagon.V6.vS32b.qpred.ai
    65, // llvm.hexagon.V6.vS32b.qpred.ai.128B
    2, // llvm.hexagon.V6.vabsb
    2, // llvm.hexagon.V6.vabsb.128B
    2, // llvm.hexagon.V6.vabsb.sat
    2, // llvm.hexagon.V6.vabsb.sat.128B
    2, // llvm.hexagon.V6.vabsdiffh
    2, // llvm.hexagon.V6.vabsdiffh.128B
    2, // llvm.hexagon.V6.vabsdiffub
    2, // llvm.hexagon.V6.vabsdiffub.128B
    2, // llvm.hexagon.V6.vabsdiffuh
    2, // llvm.hexagon.V6.vabsdiffuh.128B
    2, // llvm.hexagon.V6.vabsdiffw
    2, // llvm.hexagon.V6.vabsdiffw.128B
    2, // llvm.hexagon.V6.vabsh
    2, // llvm.hexagon.V6.vabsh.128B
    2, // llvm.hexagon.V6.vabsh.sat
    2, // llvm.hexagon.V6.vabsh.sat.128B
    2, // llvm.hexagon.V6.vabsw
    2, // llvm.hexagon.V6.vabsw.128B
    2, // llvm.hexagon.V6.vabsw.sat
    2, // llvm.hexagon.V6.vabsw.sat.128B
    2, // llvm.hexagon.V6.vaddb
    2, // llvm.hexagon.V6.vaddb.128B
    2, // llvm.hexagon.V6.vaddb.dv
    2, // llvm.hexagon.V6.vaddb.dv.128B
    2, // llvm.hexagon.V6.vaddbnq
    2, // llvm.hexagon.V6.vaddbnq.128B
    2, // llvm.hexagon.V6.vaddbq
    2, // llvm.hexagon.V6.vaddbq.128B
    2, // llvm.hexagon.V6.vaddbsat
    2, // llvm.hexagon.V6.vaddbsat.128B
    2, // llvm.hexagon.V6.vaddbsat.dv
    2, // llvm.hexagon.V6.vaddbsat.dv.128B
    2, // llvm.hexagon.V6.vaddcarry
    2, // llvm.hexagon.V6.vaddcarry.128B
    2, // llvm.hexagon.V6.vaddcarrysat
    2, // llvm.hexagon.V6.vaddcarrysat.128B
    2, // llvm.hexagon.V6.vaddclbh
    2, // llvm.hexagon.V6.vaddclbh.128B
    2, // llvm.hexagon.V6.vaddclbw
    2, // llvm.hexagon.V6.vaddclbw.128B
    2, // llvm.hexagon.V6.vaddh
    2, // llvm.hexagon.V6.vaddh.128B
    2, // llvm.hexagon.V6.vaddh.dv
    2, // llvm.hexagon.V6.vaddh.dv.128B
    2, // llvm.hexagon.V6.vaddhnq
    2, // llvm.hexagon.V6.vaddhnq.128B
    2, // llvm.hexagon.V6.vaddhq
    2, // llvm.hexagon.V6.vaddhq.128B
    2, // llvm.hexagon.V6.vaddhsat
    2, // llvm.hexagon.V6.vaddhsat.128B
    2, // llvm.hexagon.V6.vaddhsat.dv
    2, // llvm.hexagon.V6.vaddhsat.dv.128B
    2, // llvm.hexagon.V6.vaddhw
    2, // llvm.hexagon.V6.vaddhw.128B
    2, // llvm.hexagon.V6.vaddhw.acc
    2, // llvm.hexagon.V6.vaddhw.acc.128B
    2, // llvm.hexagon.V6.vaddubh
    2, // llvm.hexagon.V6.vaddubh.128B
    2, // llvm.hexagon.V6.vaddubh.acc
    2, // llvm.hexagon.V6.vaddubh.acc.128B
    2, // llvm.hexagon.V6.vaddubsat
    2, // llvm.hexagon.V6.vaddubsat.128B
    2, // llvm.hexagon.V6.vaddubsat.dv
    2, // llvm.hexagon.V6.vaddubsat.dv.128B
    2, // llvm.hexagon.V6.vaddububb.sat
    2, // llvm.hexagon.V6.vaddububb.sat.128B
    2, // llvm.hexagon.V6.vadduhsat
    2, // llvm.hexagon.V6.vadduhsat.128B
    2, // llvm.hexagon.V6.vadduhsat.dv
    2, // llvm.hexagon.V6.vadduhsat.dv.128B
    2, // llvm.hexagon.V6.vadduhw
    2, // llvm.hexagon.V6.vadduhw.128B
    2, // llvm.hexagon.V6.vadduhw.acc
    2, // llvm.hexagon.V6.vadduhw.acc.128B
    2, // llvm.hexagon.V6.vadduwsat
    2, // llvm.hexagon.V6.vadduwsat.128B
    2, // llvm.hexagon.V6.vadduwsat.dv
    2, // llvm.hexagon.V6.vadduwsat.dv.128B
    2, // llvm.hexagon.V6.vaddw
    2, // llvm.hexagon.V6.vaddw.128B
    2, // llvm.hexagon.V6.vaddw.dv
    2, // llvm.hexagon.V6.vaddw.dv.128B
    2, // llvm.hexagon.V6.vaddwnq
    2, // llvm.hexagon.V6.vaddwnq.128B
    2, // llvm.hexagon.V6.vaddwq
    2, // llvm.hexagon.V6.vaddwq.128B
    2, // llvm.hexagon.V6.vaddwsat
    2, // llvm.hexagon.V6.vaddwsat.128B
    2, // llvm.hexagon.V6.vaddwsat.dv
    2, // llvm.hexagon.V6.vaddwsat.dv.128B
    2, // llvm.hexagon.V6.valignb
    2, // llvm.hexagon.V6.valignb.128B
    32, // llvm.hexagon.V6.valignbi
    32, // llvm.hexagon.V6.valignbi.128B
    2, // llvm.hexagon.V6.vand
    2, // llvm.hexagon.V6.vand.128B
    2, // llvm.hexagon.V6.vandnqrt
    2, // llvm.hexagon.V6.vandnqrt.128B
    2, // llvm.hexagon.V6.vandnqrt.acc
    2, // llvm.hexagon.V6.vandnqrt.acc.128B
    2, // llvm.hexagon.V6.vandqrt
    2, // llvm.hexagon.V6.vandqrt.128B
    2, // llvm.hexagon.V6.vandqrt.acc
    2, // llvm.hexagon.V6.vandqrt.acc.128B
    2, // llvm.hexagon.V6.vandvnqv
    2, // llvm.hexagon.V6.vandvnqv.128B
    2, // llvm.hexagon.V6.vandvqv
    2, // llvm.hexagon.V6.vandvqv.128B
    2, // llvm.hexagon.V6.vandvrt
    2, // llvm.hexagon.V6.vandvrt.128B
    2, // llvm.hexagon.V6.vandvrt.acc
    2, // llvm.hexagon.V6.vandvrt.acc.128B
    2, // llvm.hexagon.V6.vaslh
    2, // llvm.hexagon.V6.vaslh.128B
    2, // llvm.hexagon.V6.vaslh.acc
    2, // llvm.hexagon.V6.vaslh.acc.128B
    2, // llvm.hexagon.V6.vaslhv
    2, // llvm.hexagon.V6.vaslhv.128B
    2, // llvm.hexagon.V6.vaslw
    2, // llvm.hexagon.V6.vaslw.128B
    2, // llvm.hexagon.V6.vaslw.acc
    2, // llvm.hexagon.V6.vaslw.acc.128B
    2, // llvm.hexagon.V6.vaslwv
    2, // llvm.hexagon.V6.vaslwv.128B
    2, // llvm.hexagon.V6.vasr.into
    2, // llvm.hexagon.V6.vasr.into.128B
    2, // llvm.hexagon.V6.vasrh
    2, // llvm.hexagon.V6.vasrh.128B
    2, // llvm.hexagon.V6.vasrh.acc
    2, // llvm.hexagon.V6.vasrh.acc.128B
    2, // llvm.hexagon.V6.vasrhbrndsat
    2, // llvm.hexagon.V6.vasrhbrndsat.128B
    2, // llvm.hexagon.V6.vasrhbsat
    2, // llvm.hexagon.V6.vasrhbsat.128B
    2, // llvm.hexagon.V6.vasrhubrndsat
    2, // llvm.hexagon.V6.vasrhubrndsat.128B
    2, // llvm.hexagon.V6.vasrhubsat
    2, // llvm.hexagon.V6.vasrhubsat.128B
    2, // llvm.hexagon.V6.vasrhv
    2, // llvm.hexagon.V6.vasrhv.128B
    2, // llvm.hexagon.V6.vasruhubrndsat
    2, // llvm.hexagon.V6.vasruhubrndsat.128B
    2, // llvm.hexagon.V6.vasruhubsat
    2, // llvm.hexagon.V6.vasruhubsat.128B
    2, // llvm.hexagon.V6.vasruwuhrndsat
    2, // llvm.hexagon.V6.vasruwuhrndsat.128B
    2, // llvm.hexagon.V6.vasruwuhsat
    2, // llvm.hexagon.V6.vasruwuhsat.128B
    2, // llvm.hexagon.V6.vasrw
    2, // llvm.hexagon.V6.vasrw.128B
    2, // llvm.hexagon.V6.vasrw.acc
    2, // llvm.hexagon.V6.vasrw.acc.128B
    2, // llvm.hexagon.V6.vasrwh
    2, // llvm.hexagon.V6.vasrwh.128B
    2, // llvm.hexagon.V6.vasrwhrndsat
    2, // llvm.hexagon.V6.vasrwhrndsat.128B
    2, // llvm.hexagon.V6.vasrwhsat
    2, // llvm.hexagon.V6.vasrwhsat.128B
    2, // llvm.hexagon.V6.vasrwuhrndsat
    2, // llvm.hexagon.V6.vasrwuhrndsat.128B
    2, // llvm.hexagon.V6.vasrwuhsat
    2, // llvm.hexagon.V6.vasrwuhsat.128B
    2, // llvm.hexagon.V6.vasrwv
    2, // llvm.hexagon.V6.vasrwv.128B
    2, // llvm.hexagon.V6.vassign
    2, // llvm.hexagon.V6.vassign.128B
    2, // llvm.hexagon.V6.vassignp
    2, // llvm.hexagon.V6.vassignp.128B
    2, // llvm.hexagon.V6.vavgb
    2, // llvm.hexagon.V6.vavgb.128B
    2, // llvm.hexagon.V6.vavgbrnd
    2, // llvm.hexagon.V6.vavgbrnd.128B
    2, // llvm.hexagon.V6.vavgh
    2, // llvm.hexagon.V6.vavgh.128B
    2, // llvm.hexagon.V6.vavghrnd
    2, // llvm.hexagon.V6.vavghrnd.128B
    2, // llvm.hexagon.V6.vavgub
    2, // llvm.hexagon.V6.vavgub.128B
    2, // llvm.hexagon.V6.vavgubrnd
    2, // llvm.hexagon.V6.vavgubrnd.128B
    2, // llvm.hexagon.V6.vavguh
    2, // llvm.hexagon.V6.vavguh.128B
    2, // llvm.hexagon.V6.vavguhrnd
    2, // llvm.hexagon.V6.vavguhrnd.128B
    2, // llvm.hexagon.V6.vavguw
    2, // llvm.hexagon.V6.vavguw.128B
    2, // llvm.hexagon.V6.vavguwrnd
    2, // llvm.hexagon.V6.vavguwrnd.128B
    2, // llvm.hexagon.V6.vavgw
    2, // llvm.hexagon.V6.vavgw.128B
    2, // llvm.hexagon.V6.vavgwrnd
    2, // llvm.hexagon.V6.vavgwrnd.128B
    2, // llvm.hexagon.V6.vcl0h
    2, // llvm.hexagon.V6.vcl0h.128B
    2, // llvm.hexagon.V6.vcl0w
    2, // llvm.hexagon.V6.vcl0w.128B
    2, // llvm.hexagon.V6.vcombine
    2, // llvm.hexagon.V6.vcombine.128B
    2, // llvm.hexagon.V6.vd0
    2, // llvm.hexagon.V6.vd0.128B
    2, // llvm.hexagon.V6.vdd0
    2, // llvm.hexagon.V6.vdd0.128B
    2, // llvm.hexagon.V6.vdealb
    2, // llvm.hexagon.V6.vdealb.128B
    2, // llvm.hexagon.V6.vdealb4w
    2, // llvm.hexagon.V6.vdealb4w.128B
    2, // llvm.hexagon.V6.vdealh
    2, // llvm.hexagon.V6.vdealh.128B
    2, // llvm.hexagon.V6.vdealvdd
    2, // llvm.hexagon.V6.vdealvdd.128B
    2, // llvm.hexagon.V6.vdelta
    2, // llvm.hexagon.V6.vdelta.128B
    2, // llvm.hexagon.V6.vdmpybus
    2, // llvm.hexagon.V6.vdmpybus.128B
    2, // llvm.hexagon.V6.vdmpybus.acc
    2, // llvm.hexagon.V6.vdmpybus.acc.128B
    2, // llvm.hexagon.V6.vdmpybus.dv
    2, // llvm.hexagon.V6.vdmpybus.dv.128B
    2, // llvm.hexagon.V6.vdmpybus.dv.acc
    2, // llvm.hexagon.V6.vdmpybus.dv.acc.128B
    2, // llvm.hexagon.V6.vdmpyhb
    2, // llvm.hexagon.V6.vdmpyhb.128B
    2, // llvm.hexagon.V6.vdmpyhb.acc
    2, // llvm.hexagon.V6.vdmpyhb.acc.128B
    2, // llvm.hexagon.V6.vdmpyhb.dv
    2, // llvm.hexagon.V6.vdmpyhb.dv.128B
    2, // llvm.hexagon.V6.vdmpyhb.dv.acc
    2, // llvm.hexagon.V6.vdmpyhb.dv.acc.128B
    2, // llvm.hexagon.V6.vdmpyhisat
    2, // llvm.hexagon.V6.vdmpyhisat.128B
    2, // llvm.hexagon.V6.vdmpyhisat.acc
    2, // llvm.hexagon.V6.vdmpyhisat.acc.128B
    2, // llvm.hexagon.V6.vdmpyhsat
    2, // llvm.hexagon.V6.vdmpyhsat.128B
    2, // llvm.hexagon.V6.vdmpyhsat.acc
    2, // llvm.hexagon.V6.vdmpyhsat.acc.128B
    2, // llvm.hexagon.V6.vdmpyhsuisat
    2, // llvm.hexagon.V6.vdmpyhsuisat.128B
    2, // llvm.hexagon.V6.vdmpyhsuisat.acc
    2, // llvm.hexagon.V6.vdmpyhsuisat.acc.128B
    2, // llvm.hexagon.V6.vdmpyhsusat
    2, // llvm.hexagon.V6.vdmpyhsusat.128B
    2, // llvm.hexagon.V6.vdmpyhsusat.acc
    2, // llvm.hexagon.V6.vdmpyhsusat.acc.128B
    2, // llvm.hexagon.V6.vdmpyhvsat
    2, // llvm.hexagon.V6.vdmpyhvsat.128B
    2, // llvm.hexagon.V6.vdmpyhvsat.acc
    2, // llvm.hexagon.V6.vdmpyhvsat.acc.128B
    2, // llvm.hexagon.V6.vdsaduh
    2, // llvm.hexagon.V6.vdsaduh.128B
    2, // llvm.hexagon.V6.vdsaduh.acc
    2, // llvm.hexagon.V6.vdsaduh.acc.128B
    2, // llvm.hexagon.V6.veqb
    2, // llvm.hexagon.V6.veqb.128B
    2, // llvm.hexagon.V6.veqb.and
    2, // llvm.hexagon.V6.veqb.and.128B
    2, // llvm.hexagon.V6.veqb.or
    2, // llvm.hexagon.V6.veqb.or.128B
    2, // llvm.hexagon.V6.veqb.xor
    2, // llvm.hexagon.V6.veqb.xor.128B
    2, // llvm.hexagon.V6.veqh
    2, // llvm.hexagon.V6.veqh.128B
    2, // llvm.hexagon.V6.veqh.and
    2, // llvm.hexagon.V6.veqh.and.128B
    2, // llvm.hexagon.V6.veqh.or
    2, // llvm.hexagon.V6.veqh.or.128B
    2, // llvm.hexagon.V6.veqh.xor
    2, // llvm.hexagon.V6.veqh.xor.128B
    2, // llvm.hexagon.V6.veqw
    2, // llvm.hexagon.V6.veqw.128B
    2, // llvm.hexagon.V6.veqw.and
    2, // llvm.hexagon.V6.veqw.and.128B
    2, // llvm.hexagon.V6.veqw.or
    2, // llvm.hexagon.V6.veqw.or.128B
    2, // llvm.hexagon.V6.veqw.xor
    2, // llvm.hexagon.V6.veqw.xor.128B
    164, // llvm.hexagon.V6.vgathermh
    164, // llvm.hexagon.V6.vgathermh.128B
    164, // llvm.hexagon.V6.vgathermhq
    164, // llvm.hexagon.V6.vgathermhq.128B
    164, // llvm.hexagon.V6.vgathermhw
    164, // llvm.hexagon.V6.vgathermhw.128B
    164, // llvm.hexagon.V6.vgathermhwq
    164, // llvm.hexagon.V6.vgathermhwq.128B
    164, // llvm.hexagon.V6.vgathermw
    164, // llvm.hexagon.V6.vgathermw.128B
    164, // llvm.hexagon.V6.vgathermwq
    164, // llvm.hexagon.V6.vgathermwq.128B
    2, // llvm.hexagon.V6.vgtb
    2, // llvm.hexagon.V6.vgtb.128B
    2, // llvm.hexagon.V6.vgtb.and
    2, // llvm.hexagon.V6.vgtb.and.128B
    2, // llvm.hexagon.V6.vgtb.or
    2, // llvm.hexagon.V6.vgtb.or.128B
    2, // llvm.hexagon.V6.vgtb.xor
    2, // llvm.hexagon.V6.vgtb.xor.128B
    2, // llvm.hexagon.V6.vgth
    2, // llvm.hexagon.V6.vgth.128B
    2, // llvm.hexagon.V6.vgth.and
    2, // llvm.hexagon.V6.vgth.and.128B
    2, // llvm.hexagon.V6.vgth.or
    2, // llvm.hexagon.V6.vgth.or.128B
    2, // llvm.hexagon.V6.vgth.xor
    2, // llvm.hexagon.V6.vgth.xor.128B
    2, // llvm.hexagon.V6.vgtub
    2, // llvm.hexagon.V6.vgtub.128B
    2, // llvm.hexagon.V6.vgtub.and
    2, // llvm.hexagon.V6.vgtub.and.128B
    2, // llvm.hexagon.V6.vgtub.or
    2, // llvm.hexagon.V6.vgtub.or.128B
    2, // llvm.hexagon.V6.vgtub.xor
    2, // llvm.hexagon.V6.vgtub.xor.128B
    2, // llvm.hexagon.V6.vgtuh
    2, // llvm.hexagon.V6.vgtuh.128B
    2, // llvm.hexagon.V6.vgtuh.and
    2, // llvm.hexagon.V6.vgtuh.and.128B
    2, // llvm.hexagon.V6.vgtuh.or
    2, // llvm.hexagon.V6.vgtuh.or.128B
    2, // llvm.hexagon.V6.vgtuh.xor
    2, // llvm.hexagon.V6.vgtuh.xor.128B
    2, // llvm.hexagon.V6.vgtuw
    2, // llvm.hexagon.V6.vgtuw.128B
    2, // llvm.hexagon.V6.vgtuw.and
    2, // llvm.hexagon.V6.vgtuw.and.128B
    2, // llvm.hexagon.V6.vgtuw.or
    2, // llvm.hexagon.V6.vgtuw.or.128B
    2, // llvm.hexagon.V6.vgtuw.xor
    2, // llvm.hexagon.V6.vgtuw.xor.128B
    2, // llvm.hexagon.V6.vgtw
    2, // llvm.hexagon.V6.vgtw.128B
    2, // llvm.hexagon.V6.vgtw.and
    2, // llvm.hexagon.V6.vgtw.and.128B
    2, // llvm.hexagon.V6.vgtw.or
    2, // llvm.hexagon.V6.vgtw.or.128B
    2, // llvm.hexagon.V6.vgtw.xor
    2, // llvm.hexagon.V6.vgtw.xor.128B
    2, // llvm.hexagon.V6.vinsertwr
    2, // llvm.hexagon.V6.vinsertwr.128B
    2, // llvm.hexagon.V6.vlalignb
    2, // llvm.hexagon.V6.vlalignb.128B
    32, // llvm.hexagon.V6.vlalignbi
    32, // llvm.hexagon.V6.vlalignbi.128B
    2, // llvm.hexagon.V6.vlsrb
    2, // llvm.hexagon.V6.vlsrb.128B
    2, // llvm.hexagon.V6.vlsrh
    2, // llvm.hexagon.V6.vlsrh.128B
    2, // llvm.hexagon.V6.vlsrhv
    2, // llvm.hexagon.V6.vlsrhv.128B
    2, // llvm.hexagon.V6.vlsrw
    2, // llvm.hexagon.V6.vlsrw.128B
    2, // llvm.hexagon.V6.vlsrwv
    2, // llvm.hexagon.V6.vlsrwv.128B
    2, // llvm.hexagon.V6.vlut4
    2, // llvm.hexagon.V6.vlut4.128B
    2, // llvm.hexagon.V6.vlutvvb
    2, // llvm.hexagon.V6.vlutvvb.128B
    2, // llvm.hexagon.V6.vlutvvb.nm
    2, // llvm.hexagon.V6.vlutvvb.nm.128B
    2, // llvm.hexagon.V6.vlutvvb.oracc
    2, // llvm.hexagon.V6.vlutvvb.oracc.128B
    66, // llvm.hexagon.V6.vlutvvb.oracci
    66, // llvm.hexagon.V6.vlutvvb.oracci.128B
    32, // llvm.hexagon.V6.vlutvvbi
    32, // llvm.hexagon.V6.vlutvvbi.128B
    2, // llvm.hexagon.V6.vlutvwh
    2, // llvm.hexagon.V6.vlutvwh.128B
    2, // llvm.hexagon.V6.vlutvwh.nm
    2, // llvm.hexagon.V6.vlutvwh.nm.128B
    2, // llvm.hexagon.V6.vlutvwh.oracc
    2, // llvm.hexagon.V6.vlutvwh.oracc.128B
    66, // llvm.hexagon.V6.vlutvwh.oracci
    66, // llvm.hexagon.V6.vlutvwh.oracci.128B
    32, // llvm.hexagon.V6.vlutvwhi
    32, // llvm.hexagon.V6.vlutvwhi.128B
    65, // llvm.hexagon.V6.vmaskedstorenq
    65, // llvm.hexagon.V6.vmaskedstorenq.128B
    65, // llvm.hexagon.V6.vmaskedstorentnq
    65, // llvm.hexagon.V6.vmaskedstorentnq.128B
    65, // llvm.hexagon.V6.vmaskedstorentq
    65, // llvm.hexagon.V6.vmaskedstorentq.128B
    65, // llvm.hexagon.V6.vmaskedstoreq
    65, // llvm.hexagon.V6.vmaskedstoreq.128B
    2, // llvm.hexagon.V6.vmaxb
    2, // llvm.hexagon.V6.vmaxb.128B
    2, // llvm.hexagon.V6.vmaxh
    2, // llvm.hexagon.V6.vmaxh.128B
    2, // llvm.hexagon.V6.vmaxub
    2, // llvm.hexagon.V6.vmaxub.128B
    2, // llvm.hexagon.V6.vmaxuh
    2, // llvm.hexagon.V6.vmaxuh.128B
    2, // llvm.hexagon.V6.vmaxw
    2, // llvm.hexagon.V6.vmaxw.128B
    2, // llvm.hexagon.V6.vminb
    2, // llvm.hexagon.V6.vminb.128B
    2, // llvm.hexagon.V6.vminh
    2, // llvm.hexagon.V6.vminh.128B
    2, // llvm.hexagon.V6.vminub
    2, // llvm.hexagon.V6.vminub.128B
    2, // llvm.hexagon.V6.vminuh
    2, // llvm.hexagon.V6.vminuh.128B
    2, // llvm.hexagon.V6.vminw
    2, // llvm.hexagon.V6.vminw.128B
    2, // llvm.hexagon.V6.vmpabus
    2, // llvm.hexagon.V6.vmpabus.128B
    2, // llvm.hexagon.V6.vmpabus.acc
    2, // llvm.hexagon.V6.vmpabus.acc.128B
    2, // llvm.hexagon.V6.vmpabusv
    2, // llvm.hexagon.V6.vmpabusv.128B
    2, // llvm.hexagon.V6.vmpabuu
    2, // llvm.hexagon.V6.vmpabuu.128B
    2, // llvm.hexagon.V6.vmpabuu.acc
    2, // llvm.hexagon.V6.vmpabuu.acc.128B
    2, // llvm.hexagon.V6.vmpabuuv
    2, // llvm.hexagon.V6.vmpabuuv.128B
    2, // llvm.hexagon.V6.vmpahb
    2, // llvm.hexagon.V6.vmpahb.128B
    2, // llvm.hexagon.V6.vmpahb.acc
    2, // llvm.hexagon.V6.vmpahb.acc.128B
    2, // llvm.hexagon.V6.vmpahhsat
    2, // llvm.hexagon.V6.vmpahhsat.128B
    2, // llvm.hexagon.V6.vmpauhb
    2, // llvm.hexagon.V6.vmpauhb.128B
    2, // llvm.hexagon.V6.vmpauhb.acc
    2, // llvm.hexagon.V6.vmpauhb.acc.128B
    2, // llvm.hexagon.V6.vmpauhuhsat
    2, // llvm.hexagon.V6.vmpauhuhsat.128B
    2, // llvm.hexagon.V6.vmpsuhuhsat
    2, // llvm.hexagon.V6.vmpsuhuhsat.128B
    2, // llvm.hexagon.V6.vmpybus
    2, // llvm.hexagon.V6.vmpybus.128B
    2, // llvm.hexagon.V6.vmpybus.acc
    2, // llvm.hexagon.V6.vmpybus.acc.128B
    2, // llvm.hexagon.V6.vmpybusv
    2, // llvm.hexagon.V6.vmpybusv.128B
    2, // llvm.hexagon.V6.vmpybusv.acc
    2, // llvm.hexagon.V6.vmpybusv.acc.128B
    2, // llvm.hexagon.V6.vmpybv
    2, // llvm.hexagon.V6.vmpybv.128B
    2, // llvm.hexagon.V6.vmpybv.acc
    2, // llvm.hexagon.V6.vmpybv.acc.128B
    2, // llvm.hexagon.V6.vmpyewuh
    2, // llvm.hexagon.V6.vmpyewuh.128B
    2, // llvm.hexagon.V6.vmpyewuh.64
    2, // llvm.hexagon.V6.vmpyewuh.64.128B
    2, // llvm.hexagon.V6.vmpyh
    2, // llvm.hexagon.V6.vmpyh.128B
    2, // llvm.hexagon.V6.vmpyh.acc
    2, // llvm.hexagon.V6.vmpyh.acc.128B
    2, // llvm.hexagon.V6.vmpyhsat.acc
    2, // llvm.hexagon.V6.vmpyhsat.acc.128B
    2, // llvm.hexagon.V6.vmpyhsrs
    2, // llvm.hexagon.V6.vmpyhsrs.128B
    2, // llvm.hexagon.V6.vmpyhss
    2, // llvm.hexagon.V6.vmpyhss.128B
    2, // llvm.hexagon.V6.vmpyhus
    2, // llvm.hexagon.V6.vmpyhus.128B
    2, // llvm.hexagon.V6.vmpyhus.acc
    2, // llvm.hexagon.V6.vmpyhus.acc.128B
    2, // llvm.hexagon.V6.vmpyhv
    2, // llvm.hexagon.V6.vmpyhv.128B
    2, // llvm.hexagon.V6.vmpyhv.acc
    2, // llvm.hexagon.V6.vmpyhv.acc.128B
    2, // llvm.hexagon.V6.vmpyhvsrs
    2, // llvm.hexagon.V6.vmpyhvsrs.128B
    2, // llvm.hexagon.V6.vmpyieoh
    2, // llvm.hexagon.V6.vmpyieoh.128B
    2, // llvm.hexagon.V6.vmpyiewh.acc
    2, // llvm.hexagon.V6.vmpyiewh.acc.128B
    2, // llvm.hexagon.V6.vmpyiewuh
    2, // llvm.hexagon.V6.vmpyiewuh.128B
    2, // llvm.hexagon.V6.vmpyiewuh.acc
    2, // llvm.hexagon.V6.vmpyiewuh.acc.128B
    2, // llvm.hexagon.V6.vmpyih
    2, // llvm.hexagon.V6.vmpyih.128B
    2, // llvm.hexagon.V6.vmpyih.acc
    2, // llvm.hexagon.V6.vmpyih.acc.128B
    2, // llvm.hexagon.V6.vmpyihb
    2, // llvm.hexagon.V6.vmpyihb.128B
    2, // llvm.hexagon.V6.vmpyihb.acc
    2, // llvm.hexagon.V6.vmpyihb.acc.128B
    2, // llvm.hexagon.V6.vmpyiowh
    2, // llvm.hexagon.V6.vmpyiowh.128B
    2, // llvm.hexagon.V6.vmpyiwb
    2, // llvm.hexagon.V6.vmpyiwb.128B
    2, // llvm.hexagon.V6.vmpyiwb.acc
    2, // llvm.hexagon.V6.vmpyiwb.acc.128B
    2, // llvm.hexagon.V6.vmpyiwh
    2, // llvm.hexagon.V6.vmpyiwh.128B
    2, // llvm.hexagon.V6.vmpyiwh.acc
    2, // llvm.hexagon.V6.vmpyiwh.acc.128B
    2, // llvm.hexagon.V6.vmpyiwub
    2, // llvm.hexagon.V6.vmpyiwub.128B
    2, // llvm.hexagon.V6.vmpyiwub.acc
    2, // llvm.hexagon.V6.vmpyiwub.acc.128B
    2, // llvm.hexagon.V6.vmpyowh
    2, // llvm.hexagon.V6.vmpyowh.128B
    2, // llvm.hexagon.V6.vmpyowh.64.acc
    2, // llvm.hexagon.V6.vmpyowh.64.acc.128B
    2, // llvm.hexagon.V6.vmpyowh.rnd
    2, // llvm.hexagon.V6.vmpyowh.rnd.128B
    2, // llvm.hexagon.V6.vmpyowh.rnd.sacc
    2, // llvm.hexagon.V6.vmpyowh.rnd.sacc.128B
    2, // llvm.hexagon.V6.vmpyowh.sacc
    2, // llvm.hexagon.V6.vmpyowh.sacc.128B
    2, // llvm.hexagon.V6.vmpyub
    2, // llvm.hexagon.V6.vmpyub.128B
    2, // llvm.hexagon.V6.vmpyub.acc
    2, // llvm.hexagon.V6.vmpyub.acc.128B
    2, // llvm.hexagon.V6.vmpyubv
    2, // llvm.hexagon.V6.vmpyubv.128B
    2, // llvm.hexagon.V6.vmpyubv.acc
    2, // llvm.hexagon.V6.vmpyubv.acc.128B
    2, // llvm.hexagon.V6.vmpyuh
    2, // llvm.hexagon.V6.vmpyuh.128B
    2, // llvm.hexagon.V6.vmpyuh.acc
    2, // llvm.hexagon.V6.vmpyuh.acc.128B
    2, // llvm.hexagon.V6.vmpyuhe
    2, // llvm.hexagon.V6.vmpyuhe.128B
    2, // llvm.hexagon.V6.vmpyuhe.acc
    2, // llvm.hexagon.V6.vmpyuhe.acc.128B
    2, // llvm.hexagon.V6.vmpyuhv
    2, // llvm.hexagon.V6.vmpyuhv.128B
    2, // llvm.hexagon.V6.vmpyuhv.acc
    2, // llvm.hexagon.V6.vmpyuhv.acc.128B
    2, // llvm.hexagon.V6.vmux
    2, // llvm.hexagon.V6.vmux.128B
    2, // llvm.hexagon.V6.vnavgb
    2, // llvm.hexagon.V6.vnavgb.128B
    2, // llvm.hexagon.V6.vnavgh
    2, // llvm.hexagon.V6.vnavgh.128B
    2, // llvm.hexagon.V6.vnavgub
    2, // llvm.hexagon.V6.vnavgub.128B
    2, // llvm.hexagon.V6.vnavgw
    2, // llvm.hexagon.V6.vnavgw.128B
    2, // llvm.hexagon.V6.vnormamth
    2, // llvm.hexagon.V6.vnormamth.128B
    2, // llvm.hexagon.V6.vnormamtw
    2, // llvm.hexagon.V6.vnormamtw.128B
    2, // llvm.hexagon.V6.vnot
    2, // llvm.hexagon.V6.vnot.128B
    2, // llvm.hexagon.V6.vor
    2, // llvm.hexagon.V6.vor.128B
    2, // llvm.hexagon.V6.vpackeb
    2, // llvm.hexagon.V6.vpackeb.128B
    2, // llvm.hexagon.V6.vpackeh
    2, // llvm.hexagon.V6.vpackeh.128B
    2, // llvm.hexagon.V6.vpackhb.sat
    2, // llvm.hexagon.V6.vpackhb.sat.128B
    2, // llvm.hexagon.V6.vpackhub.sat
    2, // llvm.hexagon.V6.vpackhub.sat.128B
    2, // llvm.hexagon.V6.vpackob
    2, // llvm.hexagon.V6.vpackob.128B
    2, // llvm.hexagon.V6.vpackoh
    2, // llvm.hexagon.V6.vpackoh.128B
    2, // llvm.hexagon.V6.vpackwh.sat
    2, // llvm.hexagon.V6.vpackwh.sat.128B
    2, // llvm.hexagon.V6.vpackwuh.sat
    2, // llvm.hexagon.V6.vpackwuh.sat.128B
    2, // llvm.hexagon.V6.vpopcounth
    2, // llvm.hexagon.V6.vpopcounth.128B
    2, // llvm.hexagon.V6.vprefixqb
    2, // llvm.hexagon.V6.vprefixqb.128B
    2, // llvm.hexagon.V6.vprefixqh
    2, // llvm.hexagon.V6.vprefixqh.128B
    2, // llvm.hexagon.V6.vprefixqw
    2, // llvm.hexagon.V6.vprefixqw.128B
    2, // llvm.hexagon.V6.vrdelta
    2, // llvm.hexagon.V6.vrdelta.128B
    2, // llvm.hexagon.V6.vrmpybub.rtt
    2, // llvm.hexagon.V6.vrmpybub.rtt.128B
    2, // llvm.hexagon.V6.vrmpybub.rtt.acc
    2, // llvm.hexagon.V6.vrmpybub.rtt.acc.128B
    2, // llvm.hexagon.V6.vrmpybus
    2, // llvm.hexagon.V6.vrmpybus.128B
    2, // llvm.hexagon.V6.vrmpybus.acc
    2, // llvm.hexagon.V6.vrmpybus.acc.128B
    32, // llvm.hexagon.V6.vrmpybusi
    32, // llvm.hexagon.V6.vrmpybusi.128B
    66, // llvm.hexagon.V6.vrmpybusi.acc
    66, // llvm.hexagon.V6.vrmpybusi.acc.128B
    2, // llvm.hexagon.V6.vrmpybusv
    2, // llvm.hexagon.V6.vrmpybusv.128B
    2, // llvm.hexagon.V6.vrmpybusv.acc
    2, // llvm.hexagon.V6.vrmpybusv.acc.128B
    2, // llvm.hexagon.V6.vrmpybv
    2, // llvm.hexagon.V6.vrmpybv.128B
    2, // llvm.hexagon.V6.vrmpybv.acc
    2, // llvm.hexagon.V6.vrmpybv.acc.128B
    2, // llvm.hexagon.V6.vrmpyub
    2, // llvm.hexagon.V6.vrmpyub.128B
    2, // llvm.hexagon.V6.vrmpyub.acc
    2, // llvm.hexagon.V6.vrmpyub.acc.128B
    2, // llvm.hexagon.V6.vrmpyub.rtt
    2, // llvm.hexagon.V6.vrmpyub.rtt.128B
    2, // llvm.hexagon.V6.vrmpyub.rtt.acc
    2, // llvm.hexagon.V6.vrmpyub.rtt.acc.128B
    32, // llvm.hexagon.V6.vrmpyubi
    32, // llvm.hexagon.V6.vrmpyubi.128B
    66, // llvm.hexagon.V6.vrmpyubi.acc
    66, // llvm.hexagon.V6.vrmpyubi.acc.128B
    2, // llvm.hexagon.V6.vrmpyubv
    2, // llvm.hexagon.V6.vrmpyubv.128B
    2, // llvm.hexagon.V6.vrmpyubv.acc
    2, // llvm.hexagon.V6.vrmpyubv.acc.128B
    2, // llvm.hexagon.V6.vror
    2, // llvm.hexagon.V6.vror.128B
    2, // llvm.hexagon.V6.vrotr
    2, // llvm.hexagon.V6.vrotr.128B
    2, // llvm.hexagon.V6.vroundhb
    2, // llvm.hexagon.V6.vroundhb.128B
    2, // llvm.hexagon.V6.vroundhub
    2, // llvm.hexagon.V6.vroundhub.128B
    2, // llvm.hexagon.V6.vrounduhub
    2, // llvm.hexagon.V6.vrounduhub.128B
    2, // llvm.hexagon.V6.vrounduwuh
    2, // llvm.hexagon.V6.vrounduwuh.128B
    2, // llvm.hexagon.V6.vroundwh
    2, // llvm.hexagon.V6.vroundwh.128B
    2, // llvm.hexagon.V6.vroundwuh
    2, // llvm.hexagon.V6.vroundwuh.128B
    32, // llvm.hexagon.V6.vrsadubi
    32, // llvm.hexagon.V6.vrsadubi.128B
    66, // llvm.hexagon.V6.vrsadubi.acc
    66, // llvm.hexagon.V6.vrsadubi.acc.128B
    2, // llvm.hexagon.V6.vsatdw
    2, // llvm.hexagon.V6.vsatdw.128B
    2, // llvm.hexagon.V6.vsathub
    2, // llvm.hexagon.V6.vsathub.128B
    2, // llvm.hexagon.V6.vsatuwuh
    2, // llvm.hexagon.V6.vsatuwuh.128B
    2, // llvm.hexagon.V6.vsatwh
    2, // llvm.hexagon.V6.vsatwh.128B
    2, // llvm.hexagon.V6.vsb
    2, // llvm.hexagon.V6.vsb.128B
    65, // llvm.hexagon.V6.vscattermh
    65, // llvm.hexagon.V6.vscattermh.128B
    65, // llvm.hexagon.V6.vscattermh.add
    65, // llvm.hexagon.V6.vscattermh.add.128B
    65, // llvm.hexagon.V6.vscattermhq
    65, // llvm.hexagon.V6.vscattermhq.128B
    65, // llvm.hexagon.V6.vscattermhw
    65, // llvm.hexagon.V6.vscattermhw.128B
    65, // llvm.hexagon.V6.vscattermhw.add
    65, // llvm.hexagon.V6.vscattermhw.add.128B
    65, // llvm.hexagon.V6.vscattermhwq
    65, // llvm.hexagon.V6.vscattermhwq.128B
    65, // llvm.hexagon.V6.vscattermw
    65, // llvm.hexagon.V6.vscattermw.128B
    65, // llvm.hexagon.V6.vscattermw.add
    65, // llvm.hexagon.V6.vscattermw.add.128B
    65, // llvm.hexagon.V6.vscattermwq
    65, // llvm.hexagon.V6.vscattermwq.128B
    2, // llvm.hexagon.V6.vsh
    2, // llvm.hexagon.V6.vsh.128B
    2, // llvm.hexagon.V6.vshufeh
    2, // llvm.hexagon.V6.vshufeh.128B
    2, // llvm.hexagon.V6.vshuffb
    2, // llvm.hexagon.V6.vshuffb.128B
    2, // llvm.hexagon.V6.vshuffeb
    2, // llvm.hexagon.V6.vshuffeb.128B
    2, // llvm.hexagon.V6.vshuffh
    2, // llvm.hexagon.V6.vshuffh.128B
    2, // llvm.hexagon.V6.vshuffob
    2, // llvm.hexagon.V6.vshuffob.128B
    2, // llvm.hexagon.V6.vshuffvdd
    2, // llvm.hexagon.V6.vshuffvdd.128B
    2, // llvm.hexagon.V6.vshufoeb
    2, // llvm.hexagon.V6.vshufoeb.128B
    2, // llvm.hexagon.V6.vshufoeh
    2, // llvm.hexagon.V6.vshufoeh.128B
    2, // llvm.hexagon.V6.vshufoh
    2, // llvm.hexagon.V6.vshufoh.128B
    2, // llvm.hexagon.V6.vsubb
    2, // llvm.hexagon.V6.vsubb.128B
    2, // llvm.hexagon.V6.vsubb.dv
    2, // llvm.hexagon.V6.vsubb.dv.128B
    2, // llvm.hexagon.V6.vsubbnq
    2, // llvm.hexagon.V6.vsubbnq.128B
    2, // llvm.hexagon.V6.vsubbq
    2, // llvm.hexagon.V6.vsubbq.128B
    2, // llvm.hexagon.V6.vsubbsat
    2, // llvm.hexagon.V6.vsubbsat.128B
    2, // llvm.hexagon.V6.vsubbsat.dv
    2, // llvm.hexagon.V6.vsubbsat.dv.128B
    2, // llvm.hexagon.V6.vsubcarry
    2, // llvm.hexagon.V6.vsubcarry.128B
    2, // llvm.hexagon.V6.vsubh
    2, // llvm.hexagon.V6.vsubh.128B
    2, // llvm.hexagon.V6.vsubh.dv
    2, // llvm.hexagon.V6.vsubh.dv.128B
    2, // llvm.hexagon.V6.vsubhnq
    2, // llvm.hexagon.V6.vsubhnq.128B
    2, // llvm.hexagon.V6.vsubhq
    2, // llvm.hexagon.V6.vsubhq.128B
    2, // llvm.hexagon.V6.vsubhsat
    2, // llvm.hexagon.V6.vsubhsat.128B
    2, // llvm.hexagon.V6.vsubhsat.dv
    2, // llvm.hexagon.V6.vsubhsat.dv.128B
    2, // llvm.hexagon.V6.vsubhw
    2, // llvm.hexagon.V6.vsubhw.128B
    2, // llvm.hexagon.V6.vsububh
    2, // llvm.hexagon.V6.vsububh.128B
    2, // llvm.hexagon.V6.vsububsat
    2, // llvm.hexagon.V6.vsububsat.128B
    2, // llvm.hexagon.V6.vsububsat.dv
    2, // llvm.hexagon.V6.vsububsat.dv.128B
    2, // llvm.hexagon.V6.vsubububb.sat
    2, // llvm.hexagon.V6.vsubububb.sat.128B
    2, // llvm.hexagon.V6.vsubuhsat
    2, // llvm.hexagon.V6.vsubuhsat.128B
    2, // llvm.hexagon.V6.vsubuhsat.dv
    2, // llvm.hexagon.V6.vsubuhsat.dv.128B
    2, // llvm.hexagon.V6.vsubuhw
    2, // llvm.hexagon.V6.vsubuhw.128B
    2, // llvm.hexagon.V6.vsubuwsat
    2, // llvm.hexagon.V6.vsubuwsat.128B
    2, // llvm.hexagon.V6.vsubuwsat.dv
    2, // llvm.hexagon.V6.vsubuwsat.dv.128B
    2, // llvm.hexagon.V6.vsubw
    2, // llvm.hexagon.V6.vsubw.128B
    2, // llvm.hexagon.V6.vsubw.dv
    2, // llvm.hexagon.V6.vsubw.dv.128B
    2, // llvm.hexagon.V6.vsubwnq
    2, // llvm.hexagon.V6.vsubwnq.128B
    2, // llvm.hexagon.V6.vsubwq
    2, // llvm.hexagon.V6.vsubwq.128B
    2, // llvm.hexagon.V6.vsubwsat
    2, // llvm.hexagon.V6.vsubwsat.128B
    2, // llvm.hexagon.V6.vsubwsat.dv
    2, // llvm.hexagon.V6.vsubwsat.dv.128B
    2, // llvm.hexagon.V6.vswap
    2, // llvm.hexagon.V6.vswap.128B
    2, // llvm.hexagon.V6.vtmpyb
    2, // llvm.hexagon.V6.vtmpyb.128B
    2, // llvm.hexagon.V6.vtmpyb.acc
    2, // llvm.hexagon.V6.vtmpyb.acc.128B
    2, // llvm.hexagon.V6.vtmpybus
    2, // llvm.hexagon.V6.vtmpybus.128B
    2, // llvm.hexagon.V6.vtmpybus.acc
    2, // llvm.hexagon.V6.vtmpybus.acc.128B
    2, // llvm.hexagon.V6.vtmpyhb
    2, // llvm.hexagon.V6.vtmpyhb.128B
    2, // llvm.hexagon.V6.vtmpyhb.acc
    2, // llvm.hexagon.V6.vtmpyhb.acc.128B
    2, // llvm.hexagon.V6.vunpackb
    2, // llvm.hexagon.V6.vunpackb.128B
    2, // llvm.hexagon.V6.vunpackh
    2, // llvm.hexagon.V6.vunpackh.128B
    2, // llvm.hexagon.V6.vunpackob
    2, // llvm.hexagon.V6.vunpackob.128B
    2, // llvm.hexagon.V6.vunpackoh
    2, // llvm.hexagon.V6.vunpackoh.128B
    2, // llvm.hexagon.V6.vunpackub
    2, // llvm.hexagon.V6.vunpackub.128B
    2, // llvm.hexagon.V6.vunpackuh
    2, // llvm.hexagon.V6.vunpackuh.128B
    2, // llvm.hexagon.V6.vxor
    2, // llvm.hexagon.V6.vxor.128B
    2, // llvm.hexagon.V6.vzb
    2, // llvm.hexagon.V6.vzb.128B
    2, // llvm.hexagon.V6.vzh
    2, // llvm.hexagon.V6.vzh.128B
    7, // llvm.hexagon.Y2.dccleana
    7, // llvm.hexagon.Y2.dccleaninva
    7, // llvm.hexagon.Y2.dcfetch
    7, // llvm.hexagon.Y2.dcinva
    7, // llvm.hexagon.Y2.dczeroa
    7, // llvm.hexagon.Y4.l2fetch
    7, // llvm.hexagon.Y5.l2fetch
    169, // llvm.hexagon.circ.ldb
    169, // llvm.hexagon.circ.ldd
    169, // llvm.hexagon.circ.ldh
    169, // llvm.hexagon.circ.ldub
    169, // llvm.hexagon.circ.lduh
    169, // llvm.hexagon.circ.ldw
    170, // llvm.hexagon.circ.stb
    170, // llvm.hexagon.circ.std
    170, // llvm.hexagon.circ.sth
    170, // llvm.hexagon.circ.sthhi
    170, // llvm.hexagon.circ.stw
    7, // llvm.hexagon.prefetch
    171, // llvm.hexagon.vmemcpy
    172, // llvm.hexagon.vmemset
    7, // llvm.mips.absq.s.ph
    7, // llvm.mips.absq.s.qb
    7, // llvm.mips.absq.s.w
    2, // llvm.mips.add.a.b
    2, // llvm.mips.add.a.d
    2, // llvm.mips.add.a.h
    2, // llvm.mips.add.a.w
    2, // llvm.mips.addq.ph
    2, // llvm.mips.addq.s.ph
    7, // llvm.mips.addq.s.w
    2, // llvm.mips.addqh.ph
    2, // llvm.mips.addqh.r.ph
    2, // llvm.mips.addqh.r.w
    2, // llvm.mips.addqh.w
    2, // llvm.mips.adds.a.b
    2, // llvm.mips.adds.a.d
    2, // llvm.mips.adds.a.h
    2, // llvm.mips.adds.a.w
    2, // llvm.mips.adds.s.b
    2, // llvm.mips.adds.s.d
    2, // llvm.mips.adds.s.h
    2, // llvm.mips.adds.s.w
    2, // llvm.mips.adds.u.b
    2, // llvm.mips.adds.u.d
    2, // llvm.mips.adds.u.h
    2, // llvm.mips.adds.u.w
    7, // llvm.mips.addsc
    7, // llvm.mips.addu.ph
    2, // llvm.mips.addu.qb
    7, // llvm.mips.addu.s.ph
    2, // llvm.mips.addu.s.qb
    2, // llvm.mips.adduh.qb
    2, // llvm.mips.adduh.r.qb
    2, // llvm.mips.addv.b
    2, // llvm.mips.addv.d
    2, // llvm.mips.addv.h
    2, // llvm.mips.addv.w
    52, // llvm.mips.addvi.b
    52, // llvm.mips.addvi.d
    52, // llvm.mips.addvi.h
    52, // llvm.mips.addvi.w
    7, // llvm.mips.addwc
    2, // llvm.mips.and.v
    52, // llvm.mips.andi.b
    32, // llvm.mips.append
    2, // llvm.mips.asub.s.b
    2, // llvm.mips.asub.s.d
    2, // llvm.mips.asub.s.h
    2, // llvm.mips.asub.s.w
    2, // llvm.mips.asub.u.b
    2, // llvm.mips.asub.u.d
    2, // llvm.mips.asub.u.h
    2, // llvm.mips.asub.u.w
    2, // llvm.mips.ave.s.b
    2, // llvm.mips.ave.s.d
    2, // llvm.mips.ave.s.h
    2, // llvm.mips.ave.s.w
    2, // llvm.mips.ave.u.b
    2, // llvm.mips.ave.u.d
    2, // llvm.mips.ave.u.h
    2, // llvm.mips.ave.u.w
    2, // llvm.mips.aver.s.b
    2, // llvm.mips.aver.s.d
    2, // llvm.mips.aver.s.h
    2, // llvm.mips.aver.s.w
    2, // llvm.mips.aver.u.b
    2, // llvm.mips.aver.u.d
    2, // llvm.mips.aver.u.h
    2, // llvm.mips.aver.u.w
    32, // llvm.mips.balign
    2, // llvm.mips.bclr.b
    2, // llvm.mips.bclr.d
    2, // llvm.mips.bclr.h
    2, // llvm.mips.bclr.w
    52, // llvm.mips.bclri.b
    52, // llvm.mips.bclri.d
    52, // llvm.mips.bclri.h
    52, // llvm.mips.bclri.w
    2, // llvm.mips.binsl.b
    2, // llvm.mips.binsl.d
    2, // llvm.mips.binsl.h
    2, // llvm.mips.binsl.w
    32, // llvm.mips.binsli.b
    32, // llvm.mips.binsli.d
    32, // llvm.mips.binsli.h
    32, // llvm.mips.binsli.w
    2, // llvm.mips.binsr.b
    2, // llvm.mips.binsr.d
    2, // llvm.mips.binsr.h
    2, // llvm.mips.binsr.w
    32, // llvm.mips.binsri.b
    32, // llvm.mips.binsri.d
    32, // llvm.mips.binsri.h
    32, // llvm.mips.binsri.w
    2, // llvm.mips.bitrev
    2, // llvm.mips.bmnz.v
    32, // llvm.mips.bmnzi.b
    2, // llvm.mips.bmz.v
    32, // llvm.mips.bmzi.b
    2, // llvm.mips.bneg.b
    2, // llvm.mips.bneg.d
    2, // llvm.mips.bneg.h
    2, // llvm.mips.bneg.w
    52, // llvm.mips.bnegi.b
    52, // llvm.mips.bnegi.d
    52, // llvm.mips.bnegi.h
    52, // llvm.mips.bnegi.w
    2, // llvm.mips.bnz.b
    2, // llvm.mips.bnz.d
    2, // llvm.mips.bnz.h
    2, // llvm.mips.bnz.v
    2, // llvm.mips.bnz.w
    21, // llvm.mips.bposge32
    2, // llvm.mips.bsel.v
    32, // llvm.mips.bseli.b
    2, // llvm.mips.bset.b
    2, // llvm.mips.bset.d
    2, // llvm.mips.bset.h
    2, // llvm.mips.bset.w
    52, // llvm.mips.bseti.b
    52, // llvm.mips.bseti.d
    52, // llvm.mips.bseti.h
    52, // llvm.mips.bseti.w
    2, // llvm.mips.bz.b
    2, // llvm.mips.bz.d
    2, // llvm.mips.bz.h
    2, // llvm.mips.bz.v
    2, // llvm.mips.bz.w
    2, // llvm.mips.ceq.b
    2, // llvm.mips.ceq.d
    2, // llvm.mips.ceq.h
    2, // llvm.mips.ceq.w
    52, // llvm.mips.ceqi.b
    52, // llvm.mips.ceqi.d
    52, // llvm.mips.ceqi.h
    52, // llvm.mips.ceqi.w
    75, // llvm.mips.cfcmsa
    2, // llvm.mips.cle.s.b
    2, // llvm.mips.cle.s.d
    2, // llvm.mips.cle.s.h
    2, // llvm.mips.cle.s.w
    2, // llvm.mips.cle.u.b
    2, // llvm.mips.cle.u.d
    2, // llvm.mips.cle.u.h
    2, // llvm.mips.cle.u.w
    52, // llvm.mips.clei.s.b
    52, // llvm.mips.clei.s.d
    52, // llvm.mips.clei.s.h
    52, // llvm.mips.clei.s.w
    52, // llvm.mips.clei.u.b
    52, // llvm.mips.clei.u.d
    52, // llvm.mips.clei.u.h
    52, // llvm.mips.clei.u.w
    2, // llvm.mips.clt.s.b
    2, // llvm.mips.clt.s.d
    2, // llvm.mips.clt.s.h
    2, // llvm.mips.clt.s.w
    2, // llvm.mips.clt.u.b
    2, // llvm.mips.clt.u.d
    2, // llvm.mips.clt.u.h
    2, // llvm.mips.clt.u.w
    52, // llvm.mips.clti.s.b
    52, // llvm.mips.clti.s.d
    52, // llvm.mips.clti.s.h
    52, // llvm.mips.clti.s.w
    52, // llvm.mips.clti.u.b
    52, // llvm.mips.clti.u.d
    52, // llvm.mips.clti.u.h
    52, // llvm.mips.clti.u.w
    7, // llvm.mips.cmp.eq.ph
    7, // llvm.mips.cmp.le.ph
    7, // llvm.mips.cmp.lt.ph
    7, // llvm.mips.cmpgdu.eq.qb
    7, // llvm.mips.cmpgdu.le.qb
    7, // llvm.mips.cmpgdu.lt.qb
    7, // llvm.mips.cmpgu.eq.qb
    7, // llvm.mips.cmpgu.le.qb
    7, // llvm.mips.cmpgu.lt.qb
    7, // llvm.mips.cmpu.eq.qb
    7, // llvm.mips.cmpu.le.qb
    7, // llvm.mips.cmpu.lt.qb
    2, // llvm.mips.copy.s.b
    2, // llvm.mips.copy.s.d
    2, // llvm.mips.copy.s.h
    2, // llvm.mips.copy.s.w
    2, // llvm.mips.copy.u.b
    2, // llvm.mips.copy.u.d
    2, // llvm.mips.copy.u.h
    2, // llvm.mips.copy.u.w
    75, // llvm.mips.ctcmsa
    2, // llvm.mips.div.s.b
    2, // llvm.mips.div.s.d
    2, // llvm.mips.div.s.h
    2, // llvm.mips.div.s.w
    2, // llvm.mips.div.u.b
    2, // llvm.mips.div.u.d
    2, // llvm.mips.div.u.h
    2, // llvm.mips.div.u.w
    2, // llvm.mips.dlsa
    2, // llvm.mips.dotp.s.d
    2, // llvm.mips.dotp.s.h
    2, // llvm.mips.dotp.s.w
    2, // llvm.mips.dotp.u.d
    2, // llvm.mips.dotp.u.h
    2, // llvm.mips.dotp.u.w
    2, // llvm.mips.dpa.w.ph
    2, // llvm.mips.dpadd.s.d
    2, // llvm.mips.dpadd.s.h
    2, // llvm.mips.dpadd.s.w
    2, // llvm.mips.dpadd.u.d
    2, // llvm.mips.dpadd.u.h
    2, // llvm.mips.dpadd.u.w
    7, // llvm.mips.dpaq.s.w.ph
    7, // llvm.mips.dpaq.sa.l.w
    7, // llvm.mips.dpaqx.s.w.ph
    7, // llvm.mips.dpaqx.sa.w.ph
    2, // llvm.mips.dpau.h.qbl
    2, // llvm.mips.dpau.h.qbr
    2, // llvm.mips.dpax.w.ph
    2, // llvm.mips.dps.w.ph
    7, // llvm.mips.dpsq.s.w.ph
    7, // llvm.mips.dpsq.sa.l.w
    7, // llvm.mips.dpsqx.s.w.ph
    7, // llvm.mips.dpsqx.sa.w.ph
    2, // llvm.mips.dpsu.h.qbl
    2, // llvm.mips.dpsu.h.qbr
    2, // llvm.mips.dpsub.s.d
    2, // llvm.mips.dpsub.s.h
    2, // llvm.mips.dpsub.s.w
    2, // llvm.mips.dpsub.u.d
    2, // llvm.mips.dpsub.u.h
    2, // llvm.mips.dpsub.u.w
    2, // llvm.mips.dpsx.w.ph
    7, // llvm.mips.extp
    7, // llvm.mips.extpdp
    7, // llvm.mips.extr.r.w
    7, // llvm.mips.extr.rs.w
    7, // llvm.mips.extr.s.h
    7, // llvm.mips.extr.w
    2, // llvm.mips.fadd.d
    2, // llvm.mips.fadd.w
    2, // llvm.mips.fcaf.d
    2, // llvm.mips.fcaf.w
    2, // llvm.mips.fceq.d
    2, // llvm.mips.fceq.w
    2, // llvm.mips.fclass.d
    2, // llvm.mips.fclass.w
    2, // llvm.mips.fcle.d
    2, // llvm.mips.fcle.w
    2, // llvm.mips.fclt.d
    2, // llvm.mips.fclt.w
    2, // llvm.mips.fcne.d
    2, // llvm.mips.fcne.w
    2, // llvm.mips.fcor.d
    2, // llvm.mips.fcor.w
    2, // llvm.mips.fcueq.d
    2, // llvm.mips.fcueq.w
    2, // llvm.mips.fcule.d
    2, // llvm.mips.fcule.w
    2, // llvm.mips.fcult.d
    2, // llvm.mips.fcult.w
    2, // llvm.mips.fcun.d
    2, // llvm.mips.fcun.w
    2, // llvm.mips.fcune.d
    2, // llvm.mips.fcune.w
    2, // llvm.mips.fdiv.d
    2, // llvm.mips.fdiv.w
    2, // llvm.mips.fexdo.h
    2, // llvm.mips.fexdo.w
    2, // llvm.mips.fexp2.d
    2, // llvm.mips.fexp2.w
    2, // llvm.mips.fexupl.d
    2, // llvm.mips.fexupl.w
    2, // llvm.mips.fexupr.d
    2, // llvm.mips.fexupr.w
    2, // llvm.mips.ffint.s.d
    2, // llvm.mips.ffint.s.w
    2, // llvm.mips.ffint.u.d
    2, // llvm.mips.ffint.u.w
    2, // llvm.mips.ffql.d
    2, // llvm.mips.ffql.w
    2, // llvm.mips.ffqr.d
    2, // llvm.mips.ffqr.w
    2, // llvm.mips.fill.b
    2, // llvm.mips.fill.d
    2, // llvm.mips.fill.h
    2, // llvm.mips.fill.w
    2, // llvm.mips.flog2.d
    2, // llvm.mips.flog2.w
    2, // llvm.mips.fmadd.d
    2, // llvm.mips.fmadd.w
    2, // llvm.mips.fmax.a.d
    2, // llvm.mips.fmax.a.w
    2, // llvm.mips.fmax.d
    2, // llvm.mips.fmax.w
    2, // llvm.mips.fmin.a.d
    2, // llvm.mips.fmin.a.w
    2, // llvm.mips.fmin.d
    2, // llvm.mips.fmin.w
    2, // llvm.mips.fmsub.d
    2, // llvm.mips.fmsub.w
    2, // llvm.mips.fmul.d
    2, // llvm.mips.fmul.w
    2, // llvm.mips.frcp.d
    2, // llvm.mips.frcp.w
    2, // llvm.mips.frint.d
    2, // llvm.mips.frint.w
    2, // llvm.mips.frsqrt.d
    2, // llvm.mips.frsqrt.w
    2, // llvm.mips.fsaf.d
    2, // llvm.mips.fsaf.w
    2, // llvm.mips.fseq.d
    2, // llvm.mips.fseq.w
    2, // llvm.mips.fsle.d
    2, // llvm.mips.fsle.w
    2, // llvm.mips.fslt.d
    2, // llvm.mips.fslt.w
    2, // llvm.mips.fsne.d
    2, // llvm.mips.fsne.w
    2, // llvm.mips.fsor.d
    2, // llvm.mips.fsor.w
    2, // llvm.mips.fsqrt.d
    2, // llvm.mips.fsqrt.w
    2, // llvm.mips.fsub.d
    2, // llvm.mips.fsub.w
    2, // llvm.mips.fsueq.d
    2, // llvm.mips.fsueq.w
    2, // llvm.mips.fsule.d
    2, // llvm.mips.fsule.w
    2, // llvm.mips.fsult.d
    2, // llvm.mips.fsult.w
    2, // llvm.mips.fsun.d
    2, // llvm.mips.fsun.w
    2, // llvm.mips.fsune.d
    2, // llvm.mips.fsune.w
    2, // llvm.mips.ftint.s.d
    2, // llvm.mips.ftint.s.w
    2, // llvm.mips.ftint.u.d
    2, // llvm.mips.ftint.u.w
    2, // llvm.mips.ftq.h
    2, // llvm.mips.ftq.w
    2, // llvm.mips.ftrunc.s.d
    2, // llvm.mips.ftrunc.s.w
    2, // llvm.mips.ftrunc.u.d
    2, // llvm.mips.ftrunc.u.w
    2, // llvm.mips.hadd.s.d
    2, // llvm.mips.hadd.s.h
    2, // llvm.mips.hadd.s.w
    2, // llvm.mips.hadd.u.d
    2, // llvm.mips.hadd.u.h
    2, // llvm.mips.hadd.u.w
    2, // llvm.mips.hsub.s.d
    2, // llvm.mips.hsub.s.h
    2, // llvm.mips.hsub.s.w
    2, // llvm.mips.hsub.u.d
    2, // llvm.mips.hsub.u.h
    2, // llvm.mips.hsub.u.w
    2, // llvm.mips.ilvev.b
    2, // llvm.mips.ilvev.d
    2, // llvm.mips.ilvev.h
    2, // llvm.mips.ilvev.w
    2, // llvm.mips.ilvl.b
    2, // llvm.mips.ilvl.d
    2, // llvm.mips.ilvl.h
    2, // llvm.mips.ilvl.w
    2, // llvm.mips.ilvod.b
    2, // llvm.mips.ilvod.d
    2, // llvm.mips.ilvod.h
    2, // llvm.mips.ilvod.w
    2, // llvm.mips.ilvr.b
    2, // llvm.mips.ilvr.d
    2, // llvm.mips.ilvr.h
    2, // llvm.mips.ilvr.w
    2, // llvm.mips.insert.b
    2, // llvm.mips.insert.d
    2, // llvm.mips.insert.h
    2, // llvm.mips.insert.w
    21, // llvm.mips.insv
    52, // llvm.mips.insve.b
    52, // llvm.mips.insve.d
    52, // llvm.mips.insve.h
    52, // llvm.mips.insve.w
    3, // llvm.mips.lbux
    3, // llvm.mips.ld.b
    3, // llvm.mips.ld.d
    3, // llvm.mips.ld.h
    3, // llvm.mips.ld.w
    24, // llvm.mips.ldi.b
    24, // llvm.mips.ldi.d
    24, // llvm.mips.ldi.h
    24, // llvm.mips.ldi.w
    3, // llvm.mips.ldr.d
    3, // llvm.mips.ldr.w
    3, // llvm.mips.lhx
    2, // llvm.mips.lsa
    3, // llvm.mips.lwx
    2, // llvm.mips.madd
    2, // llvm.mips.madd.q.h
    2, // llvm.mips.madd.q.w
    2, // llvm.mips.maddr.q.h
    2, // llvm.mips.maddr.q.w
    2, // llvm.mips.maddu
    2, // llvm.mips.maddv.b
    2, // llvm.mips.maddv.d
    2, // llvm.mips.maddv.h
    2, // llvm.mips.maddv.w
    7, // llvm.mips.maq.s.w.phl
    7, // llvm.mips.maq.s.w.phr
    7, // llvm.mips.maq.sa.w.phl
    7, // llvm.mips.maq.sa.w.phr
    2, // llvm.mips.max.a.b
    2, // llvm.mips.max.a.d
    2, // llvm.mips.max.a.h
    2, // llvm.mips.max.a.w
    2, // llvm.mips.max.s.b
    2, // llvm.mips.max.s.d
    2, // llvm.mips.max.s.h
    2, // llvm.mips.max.s.w
    2, // llvm.mips.max.u.b
    2, // llvm.mips.max.u.d
    2, // llvm.mips.max.u.h
    2, // llvm.mips.max.u.w
    52, // llvm.mips.maxi.s.b
    52, // llvm.mips.maxi.s.d
    52, // llvm.mips.maxi.s.h
    52, // llvm.mips.maxi.s.w
    52, // llvm.mips.maxi.u.b
    52, // llvm.mips.maxi.u.d
    52, // llvm.mips.maxi.u.h
    52, // llvm.mips.maxi.u.w
    2, // llvm.mips.min.a.b
    2, // llvm.mips.min.a.d
    2, // llvm.mips.min.a.h
    2, // llvm.mips.min.a.w
    2, // llvm.mips.min.s.b
    2, // llvm.mips.min.s.d
    2, // llvm.mips.min.s.h
    2, // llvm.mips.min.s.w
    2, // llvm.mips.min.u.b
    2, // llvm.mips.min.u.d
    2, // llvm.mips.min.u.h
    2, // llvm.mips.min.u.w
    52, // llvm.mips.mini.s.b
    52, // llvm.mips.mini.s.d
    52, // llvm.mips.mini.s.h
    52, // llvm.mips.mini.s.w
    52, // llvm.mips.mini.u.b
    52, // llvm.mips.mini.u.d
    52, // llvm.mips.mini.u.h
    52, // llvm.mips.mini.u.w
    2, // llvm.mips.mod.s.b
    2, // llvm.mips.mod.s.d
    2, // llvm.mips.mod.s.h
    2, // llvm.mips.mod.s.w
    2, // llvm.mips.mod.u.b
    2, // llvm.mips.mod.u.d
    2, // llvm.mips.mod.u.h
    2, // llvm.mips.mod.u.w
    2, // llvm.mips.modsub
    2, // llvm.mips.move.v
    2, // llvm.mips.msub
    2, // llvm.mips.msub.q.h
    2, // llvm.mips.msub.q.w
    2, // llvm.mips.msubr.q.h
    2, // llvm.mips.msubr.q.w
    2, // llvm.mips.msubu
    2, // llvm.mips.msubv.b
    2, // llvm.mips.msubv.d
    2, // llvm.mips.msubv.h
    2, // llvm.mips.msubv.w
    7, // llvm.mips.mthlip
    7, // llvm.mips.mul.ph
    2, // llvm.mips.mul.q.h
    2, // llvm.mips.mul.q.w
    7, // llvm.mips.mul.s.ph
    7, // llvm.mips.muleq.s.w.phl
    7, // llvm.mips.muleq.s.w.phr
    7, // llvm.mips.muleu.s.ph.qbl
    7, // llvm.mips.muleu.s.ph.qbr
    7, // llvm.mips.mulq.rs.ph
    7, // llvm.mips.mulq.rs.w
    7, // llvm.mips.mulq.s.ph
    7, // llvm.mips.mulq.s.w
    2, // llvm.mips.mulr.q.h
    2, // llvm.mips.mulr.q.w
    2, // llvm.mips.mulsa.w.ph
    7, // llvm.mips.mulsaq.s.w.ph
    2, // llvm.mips.mult
    2, // llvm.mips.multu
    2, // llvm.mips.mulv.b
    2, // llvm.mips.mulv.d
    2, // llvm.mips.mulv.h
    2, // llvm.mips.mulv.w
    2, // llvm.mips.nloc.b
    2, // llvm.mips.nloc.d
    2, // llvm.mips.nloc.h
    2, // llvm.mips.nloc.w
    2, // llvm.mips.nlzc.b
    2, // llvm.mips.nlzc.d
    2, // llvm.mips.nlzc.h
    2, // llvm.mips.nlzc.w
    2, // llvm.mips.nor.v
    52, // llvm.mips.nori.b
    2, // llvm.mips.or.v
    52, // llvm.mips.ori.b
    2, // llvm.mips.packrl.ph
    2, // llvm.mips.pckev.b
    2, // llvm.mips.pckev.d
    2, // llvm.mips.pckev.h
    2, // llvm.mips.pckev.w
    2, // llvm.mips.pckod.b
    2, // llvm.mips.pckod.d
    2, // llvm.mips.pckod.h
    2, // llvm.mips.pckod.w
    2, // llvm.mips.pcnt.b
    2, // llvm.mips.pcnt.d
    2, // llvm.mips.pcnt.h
    2, // llvm.mips.pcnt.w
    21, // llvm.mips.pick.ph
    21, // llvm.mips.pick.qb
    2, // llvm.mips.preceq.w.phl
    2, // llvm.mips.preceq.w.phr
    2, // llvm.mips.precequ.ph.qbl
    2, // llvm.mips.precequ.ph.qbla
    2, // llvm.mips.precequ.ph.qbr
    2, // llvm.mips.precequ.ph.qbra
    2, // llvm.mips.preceu.ph.qbl
    2, // llvm.mips.preceu.ph.qbla
    2, // llvm.mips.preceu.ph.qbr
    2, // llvm.mips.preceu.ph.qbra
    7, // llvm.mips.precr.qb.ph
    32, // llvm.mips.precr.sra.ph.w
    32, // llvm.mips.precr.sra.r.ph.w
    2, // llvm.mips.precrq.ph.w
    2, // llvm.mips.precrq.qb.ph
    7, // llvm.mips.precrq.rs.ph.w
    7, // llvm.mips.precrqu.s.qb.ph
    32, // llvm.mips.prepend
    2, // llvm.mips.raddu.w.qb
    173, // llvm.mips.rddsp
    2, // llvm.mips.repl.ph
    2, // llvm.mips.repl.qb
    52, // llvm.mips.sat.s.b
    52, // llvm.mips.sat.s.d
    52, // llvm.mips.sat.s.h
    52, // llvm.mips.sat.s.w
    52, // llvm.mips.sat.u.b
    52, // llvm.mips.sat.u.d
    52, // llvm.mips.sat.u.h
    52, // llvm.mips.sat.u.w
    52, // llvm.mips.shf.b
    52, // llvm.mips.shf.h
    52, // llvm.mips.shf.w
    2, // llvm.mips.shilo
    7, // llvm.mips.shll.ph
    7, // llvm.mips.shll.qb
    7, // llvm.mips.shll.s.ph
    7, // llvm.mips.shll.s.w
    2, // llvm.mips.shra.ph
    2, // llvm.mips.shra.qb
    2, // llvm.mips.shra.r.ph
    2, // llvm.mips.shra.r.qb
    2, // llvm.mips.shra.r.w
    2, // llvm.mips.shrl.ph
    2, // llvm.mips.shrl.qb
    2, // llvm.mips.sld.b
    2, // llvm.mips.sld.d
    2, // llvm.mips.sld.h
    2, // llvm.mips.sld.w
    32, // llvm.mips.sldi.b
    32, // llvm.mips.sldi.d
    32, // llvm.mips.sldi.h
    32, // llvm.mips.sldi.w
    2, // llvm.mips.sll.b
    2, // llvm.mips.sll.d
    2, // llvm.mips.sll.h
    2, // llvm.mips.sll.w
    52, // llvm.mips.slli.b
    52, // llvm.mips.slli.d
    52, // llvm.mips.slli.h
    52, // llvm.mips.slli.w
    2, // llvm.mips.splat.b
    2, // llvm.mips.splat.d
    2, // llvm.mips.splat.h
    2, // llvm.mips.splat.w
    52, // llvm.mips.splati.b
    52, // llvm.mips.splati.d
    52, // llvm.mips.splati.h
    52, // llvm.mips.splati.w
    2, // llvm.mips.sra.b
    2, // llvm.mips.sra.d
    2, // llvm.mips.sra.h
    2, // llvm.mips.sra.w
    52, // llvm.mips.srai.b
    52, // llvm.mips.srai.d
    52, // llvm.mips.srai.h
    52, // llvm.mips.srai.w
    2, // llvm.mips.srar.b
    2, // llvm.mips.srar.d
    2, // llvm.mips.srar.h
    2, // llvm.mips.srar.w
    52, // llvm.mips.srari.b
    52, // llvm.mips.srari.d
    52, // llvm.mips.srari.h
    52, // llvm.mips.srari.w
    2, // llvm.mips.srl.b
    2, // llvm.mips.srl.d
    2, // llvm.mips.srl.h
    2, // llvm.mips.srl.w
    52, // llvm.mips.srli.b
    52, // llvm.mips.srli.d
    52, // llvm.mips.srli.h
    52, // llvm.mips.srli.w
    2, // llvm.mips.srlr.b
    2, // llvm.mips.srlr.d
    2, // llvm.mips.srlr.h
    2, // llvm.mips.srlr.w
    52, // llvm.mips.srlri.b
    52, // llvm.mips.srlri.d
    52, // llvm.mips.srlri.h
    52, // llvm.mips.srlri.w
    164, // llvm.mips.st.b
    164, // llvm.mips.st.d
    164, // llvm.mips.st.h
    164, // llvm.mips.st.w
    164, // llvm.mips.str.d
    164, // llvm.mips.str.w
    2, // llvm.mips.subq.ph
    2, // llvm.mips.subq.s.ph
    7, // llvm.mips.subq.s.w
    2, // llvm.mips.subqh.ph
    2, // llvm.mips.subqh.r.ph
    2, // llvm.mips.subqh.r.w
    2, // llvm.mips.subqh.w
    2, // llvm.mips.subs.s.b
    2, // llvm.mips.subs.s.d
    2, // llvm.mips.subs.s.h
    2, // llvm.mips.subs.s.w
    2, // llvm.mips.subs.u.b
    2, // llvm.mips.subs.u.d
    2, // llvm.mips.subs.u.h
    2, // llvm.mips.subs.u.w
    2, // llvm.mips.subsus.u.b
    2, // llvm.mips.subsus.u.d
    2, // llvm.mips.subsus.u.h
    2, // llvm.mips.subsus.u.w
    2, // llvm.mips.subsuu.s.b
    2, // llvm.mips.subsuu.s.d
    2, // llvm.mips.subsuu.s.h
    2, // llvm.mips.subsuu.s.w
    7, // llvm.mips.subu.ph
    2, // llvm.mips.subu.qb
    7, // llvm.mips.subu.s.ph
    2, // llvm.mips.subu.s.qb
    2, // llvm.mips.subuh.qb
    2, // llvm.mips.subuh.r.qb
    2, // llvm.mips.subv.b
    2, // llvm.mips.subv.d
    2, // llvm.mips.subv.h
    2, // llvm.mips.subv.w
    52, // llvm.mips.subvi.b
    52, // llvm.mips.subvi.d
    52, // llvm.mips.subvi.h
    52, // llvm.mips.subvi.w
    2, // llvm.mips.vshf.b
    2, // llvm.mips.vshf.d
    2, // llvm.mips.vshf.h
    2, // llvm.mips.vshf.w
    174, // llvm.mips.wrdsp
    2, // llvm.mips.xor.v
    52, // llvm.mips.xori.b
    2, // llvm.nvvm.add.rm.d
    2, // llvm.nvvm.add.rm.f
    2, // llvm.nvvm.add.rm.ftz.f
    2, // llvm.nvvm.add.rn.d
    2, // llvm.nvvm.add.rn.f
    2, // llvm.nvvm.add.rn.ftz.f
    2, // llvm.nvvm.add.rp.d
    2, // llvm.nvvm.add.rp.f
    2, // llvm.nvvm.add.rp.ftz.f
    2, // llvm.nvvm.add.rz.d
    2, // llvm.nvvm.add.rz.f
    2, // llvm.nvvm.add.rz.ftz.f
    28, // llvm.nvvm.atomic.add.gen.f.cta
    28, // llvm.nvvm.atomic.add.gen.f.sys
    28, // llvm.nvvm.atomic.add.gen.i.cta
    28, // llvm.nvvm.atomic.add.gen.i.sys
    28, // llvm.nvvm.atomic.and.gen.i.cta
    28, // llvm.nvvm.atomic.and.gen.i.sys
    28, // llvm.nvvm.atomic.cas.gen.i.cta
    28, // llvm.nvvm.atomic.cas.gen.i.sys
    28, // llvm.nvvm.atomic.dec.gen.i.cta
    28, // llvm.nvvm.atomic.dec.gen.i.sys
    28, // llvm.nvvm.atomic.exch.gen.i.cta
    28, // llvm.nvvm.atomic.exch.gen.i.sys
    28, // llvm.nvvm.atomic.inc.gen.i.cta
    28, // llvm.nvvm.atomic.inc.gen.i.sys
    28, // llvm.nvvm.atomic.load.dec.32
    28, // llvm.nvvm.atomic.load.inc.32
    28, // llvm.nvvm.atomic.max.gen.i.cta
    28, // llvm.nvvm.atomic.max.gen.i.sys
    28, // llvm.nvvm.atomic.min.gen.i.cta
    28, // llvm.nvvm.atomic.min.gen.i.sys
    28, // llvm.nvvm.atomic.or.gen.i.cta
    28, // llvm.nvvm.atomic.or.gen.i.sys
    28, // llvm.nvvm.atomic.xor.gen.i.cta
    28, // llvm.nvvm.atomic.xor.gen.i.sys
    149, // llvm.nvvm.bar.sync
    149, // llvm.nvvm.bar.warp.sync
    149, // llvm.nvvm.barrier
    149, // llvm.nvvm.barrier.n
    149, // llvm.nvvm.barrier.sync
    149, // llvm.nvvm.barrier.sync.cnt
    149, // llvm.nvvm.barrier0
    149, // llvm.nvvm.barrier0.and
    149, // llvm.nvvm.barrier0.or
    149, // llvm.nvvm.barrier0.popc
    2, // llvm.nvvm.bitcast.d2ll
    2, // llvm.nvvm.bitcast.f2i
    2, // llvm.nvvm.bitcast.i2f
    2, // llvm.nvvm.bitcast.ll2d
    2, // llvm.nvvm.ceil.d
    2, // llvm.nvvm.ceil.f
    2, // llvm.nvvm.ceil.ftz.f
    7, // llvm.nvvm.compiler.error
    7, // llvm.nvvm.compiler.warn
    2, // llvm.nvvm.cos.approx.f
    2, // llvm.nvvm.cos.approx.ftz.f
    2, // llvm.nvvm.d2f.rm
    2, // llvm.nvvm.d2f.rm.ftz
    2, // llvm.nvvm.d2f.rn
    2, // llvm.nvvm.d2f.rn.ftz
    2, // llvm.nvvm.d2f.rp
    2, // llvm.nvvm.d2f.rp.ftz
    2, // llvm.nvvm.d2f.rz
    2, // llvm.nvvm.d2f.rz.ftz
    2, // llvm.nvvm.d2i.hi
    2, // llvm.nvvm.d2i.lo
    2, // llvm.nvvm.d2i.rm
    2, // llvm.nvvm.d2i.rn
    2, // llvm.nvvm.d2i.rp
    2, // llvm.nvvm.d2i.rz
    2, // llvm.nvvm.d2ll.rm
    2, // llvm.nvvm.d2ll.rn
    2, // llvm.nvvm.d2ll.rp
    2, // llvm.nvvm.d2ll.rz
    2, // llvm.nvvm.d2ui.rm
    2, // llvm.nvvm.d2ui.rn
    2, // llvm.nvvm.d2ui.rp
    2, // llvm.nvvm.d2ui.rz
    2, // llvm.nvvm.d2ull.rm
    2, // llvm.nvvm.d2ull.rn
    2, // llvm.nvvm.d2ull.rp
    2, // llvm.nvvm.d2ull.rz
    2, // llvm.nvvm.div.approx.f
    2, // llvm.nvvm.div.approx.ftz.f
    2, // llvm.nvvm.div.rm.d
    2, // llvm.nvvm.div.rm.f
    2, // llvm.nvvm.div.rm.ftz.f
    2, // llvm.nvvm.div.rn.d
    2, // llvm.nvvm.div.rn.f
    2, // llvm.nvvm.div.rn.ftz.f
    2, // llvm.nvvm.div.rp.d
    2, // llvm.nvvm.div.rp.f
    2, // llvm.nvvm.div.rp.ftz.f
    2, // llvm.nvvm.div.rz.d
    2, // llvm.nvvm.div.rz.f
    2, // llvm.nvvm.div.rz.ftz.f
    2, // llvm.nvvm.ex2.approx.d
    2, // llvm.nvvm.ex2.approx.f
    2, // llvm.nvvm.ex2.approx.ftz.f
    2, // llvm.nvvm.f2h.rn
    2, // llvm.nvvm.f2h.rn.ftz
    2, // llvm.nvvm.f2i.rm
    2, // llvm.nvvm.f2i.rm.ftz
    2, // llvm.nvvm.f2i.rn
    2, // llvm.nvvm.f2i.rn.ftz
    2, // llvm.nvvm.f2i.rp
    2, // llvm.nvvm.f2i.rp.ftz
    2, // llvm.nvvm.f2i.rz
    2, // llvm.nvvm.f2i.rz.ftz
    2, // llvm.nvvm.f2ll.rm
    2, // llvm.nvvm.f2ll.rm.ftz
    2, // llvm.nvvm.f2ll.rn
    2, // llvm.nvvm.f2ll.rn.ftz
    2, // llvm.nvvm.f2ll.rp
    2, // llvm.nvvm.f2ll.rp.ftz
    2, // llvm.nvvm.f2ll.rz
    2, // llvm.nvvm.f2ll.rz.ftz
    2, // llvm.nvvm.f2ui.rm
    2, // llvm.nvvm.f2ui.rm.ftz
    2, // llvm.nvvm.f2ui.rn
    2, // llvm.nvvm.f2ui.rn.ftz
    2, // llvm.nvvm.f2ui.rp
    2, // llvm.nvvm.f2ui.rp.ftz
    2, // llvm.nvvm.f2ui.rz
    2, // llvm.nvvm.f2ui.rz.ftz
    2, // llvm.nvvm.f2ull.rm
    2, // llvm.nvvm.f2ull.rm.ftz
    2, // llvm.nvvm.f2ull.rn
    2, // llvm.nvvm.f2ull.rn.ftz
    2, // llvm.nvvm.f2ull.rp
    2, // llvm.nvvm.f2ull.rp.ftz
    2, // llvm.nvvm.f2ull.rz
    2, // llvm.nvvm.f2ull.rz.ftz
    2, // llvm.nvvm.fabs.d
    2, // llvm.nvvm.fabs.f
    2, // llvm.nvvm.fabs.ftz.f
    2, // llvm.nvvm.floor.d
    2, // llvm.nvvm.floor.f
    2, // llvm.nvvm.floor.ftz.f
    2, // llvm.nvvm.fma.rm.d
    2, // llvm.nvvm.fma.rm.f
    2, // llvm.nvvm.fma.rm.ftz.f
    2, // llvm.nvvm.fma.rn.d
    2, // llvm.nvvm.fma.rn.f
    2, // llvm.nvvm.fma.rn.ftz.f
    2, // llvm.nvvm.fma.rp.d
    2, // llvm.nvvm.fma.rp.f
    2, // llvm.nvvm.fma.rp.ftz.f
    2, // llvm.nvvm.fma.rz.d
    2, // llvm.nvvm.fma.rz.f
    2, // llvm.nvvm.fma.rz.ftz.f
    2, // llvm.nvvm.fmax.d
    2, // llvm.nvvm.fmax.f
    2, // llvm.nvvm.fmax.ftz.f
    2, // llvm.nvvm.fmin.d
    2, // llvm.nvvm.fmin.f
    2, // llvm.nvvm.fmin.ftz.f
    2, // llvm.nvvm.fns
    2, // llvm.nvvm.i2d.rm
    2, // llvm.nvvm.i2d.rn
    2, // llvm.nvvm.i2d.rp
    2, // llvm.nvvm.i2d.rz
    2, // llvm.nvvm.i2f.rm
    2, // llvm.nvvm.i2f.rn
    2, // llvm.nvvm.i2f.rp
    2, // llvm.nvvm.i2f.rz
    2, // llvm.nvvm.isspacep.const
    2, // llvm.nvvm.isspacep.global
    2, // llvm.nvvm.isspacep.local
    2, // llvm.nvvm.isspacep.shared
    2, // llvm.nvvm.istypep.sampler
    2, // llvm.nvvm.istypep.surface
    2, // llvm.nvvm.istypep.texture
    175, // llvm.nvvm.ldg.global.f
    175, // llvm.nvvm.ldg.global.i
    175, // llvm.nvvm.ldg.global.p
    175, // llvm.nvvm.ldu.global.f
    175, // llvm.nvvm.ldu.global.i
    175, // llvm.nvvm.ldu.global.p
    2, // llvm.nvvm.lg2.approx.d
    2, // llvm.nvvm.lg2.approx.f
    2, // llvm.nvvm.lg2.approx.ftz.f
    2, // llvm.nvvm.ll2d.rm
    2, // llvm.nvvm.ll2d.rn
    2, // llvm.nvvm.ll2d.rp
    2, // llvm.nvvm.ll2d.rz
    2, // llvm.nvvm.ll2f.rm
    2, // llvm.nvvm.ll2f.rn
    2, // llvm.nvvm.ll2f.rp
    2, // llvm.nvvm.ll2f.rz
    2, // llvm.nvvm.lohi.i2d
    176, // llvm.nvvm.match.all.sync.i32p
    176, // llvm.nvvm.match.all.sync.i64p
    176, // llvm.nvvm.match.any.sync.i32
    176, // llvm.nvvm.match.any.sync.i64
    7, // llvm.nvvm.membar.cta
    7, // llvm.nvvm.membar.gl
    7, // llvm.nvvm.membar.sys
    2, // llvm.nvvm.mma.m8n8k4.col.col.f16.f16
    2, // llvm.nvvm.mma.m8n8k4.col.col.f32.f16
    2, // llvm.nvvm.mma.m8n8k4.col.col.f32.f32
    2, // llvm.nvvm.mma.m8n8k4.col.row.f16.f16
    2, // llvm.nvvm.mma.m8n8k4.col.row.f32.f16
    2, // llvm.nvvm.mma.m8n8k4.col.row.f32.f32
    2, // llvm.nvvm.mma.m8n8k4.row.col.f16.f16
    2, // llvm.nvvm.mma.m8n8k4.row.col.f32.f16
    2, // llvm.nvvm.mma.m8n8k4.row.col.f32.f32
    2, // llvm.nvvm.mma.m8n8k4.row.row.f16.f16
    2, // llvm.nvvm.mma.m8n8k4.row.row.f32.f16
    2, // llvm.nvvm.mma.m8n8k4.row.row.f32.f32
    2, // llvm.nvvm.move.double
    2, // llvm.nvvm.move.float
    2, // llvm.nvvm.move.i16
    2, // llvm.nvvm.move.i32
    2, // llvm.nvvm.move.i64
    16, // llvm.nvvm.move.ptr
    2, // llvm.nvvm.mul.rm.d
    2, // llvm.nvvm.mul.rm.f
    2, // llvm.nvvm.mul.rm.ftz.f
    2, // llvm.nvvm.mul.rn.d
    2, // llvm.nvvm.mul.rn.f
    2, // llvm.nvvm.mul.rn.ftz.f
    2, // llvm.nvvm.mul.rp.d
    2, // llvm.nvvm.mul.rp.f
    2, // llvm.nvvm.mul.rp.ftz.f
    2, // llvm.nvvm.mul.rz.d
    2, // llvm.nvvm.mul.rz.f
    2, // llvm.nvvm.mul.rz.ftz.f
    2, // llvm.nvvm.mul24.i
    2, // llvm.nvvm.mul24.ui
    2, // llvm.nvvm.mulhi.i
    2, // llvm.nvvm.mulhi.ll
    2, // llvm.nvvm.mulhi.ui
    2, // llvm.nvvm.mulhi.ull
    2, // llvm.nvvm.prmt
    2, // llvm.nvvm.ptr.constant.to.gen
    2, // llvm.nvvm.ptr.gen.to.constant
    2, // llvm.nvvm.ptr.gen.to.global
    2, // llvm.nvvm.ptr.gen.to.local
    2, // llvm.nvvm.ptr.gen.to.param
    2, // llvm.nvvm.ptr.gen.to.shared
    2, // llvm.nvvm.ptr.global.to.gen
    2, // llvm.nvvm.ptr.local.to.gen
    2, // llvm.nvvm.ptr.shared.to.gen
    2, // llvm.nvvm.rcp.approx.ftz.d
    2, // llvm.nvvm.rcp.rm.d
    2, // llvm.nvvm.rcp.rm.f
    2, // llvm.nvvm.rcp.rm.ftz.f
    2, // llvm.nvvm.rcp.rn.d
    2, // llvm.nvvm.rcp.rn.f
    2, // llvm.nvvm.rcp.rn.ftz.f
    2, // llvm.nvvm.rcp.rp.d
    2, // llvm.nvvm.rcp.rp.f
    2, // llvm.nvvm.rcp.rp.ftz.f
    2, // llvm.nvvm.rcp.rz.d
    2, // llvm.nvvm.rcp.rz.f
    2, // llvm.nvvm.rcp.rz.ftz.f
    177, // llvm.nvvm.read.ptx.sreg.clock
    177, // llvm.nvvm.read.ptx.sreg.clock64
    2, // llvm.nvvm.read.ptx.sreg.ctaid.w
    2, // llvm.nvvm.read.ptx.sreg.ctaid.x
    2, // llvm.nvvm.read.ptx.sreg.ctaid.y
    2, // llvm.nvvm.read.ptx.sreg.ctaid.z
    2, // llvm.nvvm.read.ptx.sreg.envreg0
    2, // llvm.nvvm.read.ptx.sreg.envreg1
    2, // llvm.nvvm.read.ptx.sreg.envreg10
    2, // llvm.nvvm.read.ptx.sreg.envreg11
    2, // llvm.nvvm.read.ptx.sreg.envreg12
    2, // llvm.nvvm.read.ptx.sreg.envreg13
    2, // llvm.nvvm.read.ptx.sreg.envreg14
    2, // llvm.nvvm.read.ptx.sreg.envreg15
    2, // llvm.nvvm.read.ptx.sreg.envreg16
    2, // llvm.nvvm.read.ptx.sreg.envreg17
    2, // llvm.nvvm.read.ptx.sreg.envreg18
    2, // llvm.nvvm.read.ptx.sreg.envreg19
    2, // llvm.nvvm.read.ptx.sreg.envreg2
    2, // llvm.nvvm.read.ptx.sreg.envreg20
    2, // llvm.nvvm.read.ptx.sreg.envreg21
    2, // llvm.nvvm.read.ptx.sreg.envreg22
    2, // llvm.nvvm.read.ptx.sreg.envreg23
    2, // llvm.nvvm.read.ptx.sreg.envreg24
    2, // llvm.nvvm.read.ptx.sreg.envreg25
    2, // llvm.nvvm.read.ptx.sreg.envreg26
    2, // llvm.nvvm.read.ptx.sreg.envreg27
    2, // llvm.nvvm.read.ptx.sreg.envreg28
    2, // llvm.nvvm.read.ptx.sreg.envreg29
    2, // llvm.nvvm.read.ptx.sreg.envreg3
    2, // llvm.nvvm.read.ptx.sreg.envreg30
    2, // llvm.nvvm.read.ptx.sreg.envreg31
    2, // llvm.nvvm.read.ptx.sreg.envreg4
    2, // llvm.nvvm.read.ptx.sreg.envreg5
    2, // llvm.nvvm.read.ptx.sreg.envreg6
    2, // llvm.nvvm.read.ptx.sreg.envreg7
    2, // llvm.nvvm.read.ptx.sreg.envreg8
    2, // llvm.nvvm.read.ptx.sreg.envreg9
    2, // llvm.nvvm.read.ptx.sreg.gridid
    2, // llvm.nvvm.read.ptx.sreg.laneid
    2, // llvm.nvvm.read.ptx.sreg.lanemask.eq
    2, // llvm.nvvm.read.ptx.sreg.lanemask.ge
    2, // llvm.nvvm.read.ptx.sreg.lanemask.gt
    2, // llvm.nvvm.read.ptx.sreg.lanemask.le
    2, // llvm.nvvm.read.ptx.sreg.lanemask.lt
    2, // llvm.nvvm.read.ptx.sreg.nctaid.w
    2, // llvm.nvvm.read.ptx.sreg.nctaid.x
    2, // llvm.nvvm.read.ptx.sreg.nctaid.y
    2, // llvm.nvvm.read.ptx.sreg.nctaid.z
    2, // llvm.nvvm.read.ptx.sreg.nsmid
    2, // llvm.nvvm.read.ptx.sreg.ntid.w
    2, // llvm.nvvm.read.ptx.sreg.ntid.x
    2, // llvm.nvvm.read.ptx.sreg.ntid.y
    2, // llvm.nvvm.read.ptx.sreg.ntid.z
    2, // llvm.nvvm.read.ptx.sreg.nwarpid
    177, // llvm.nvvm.read.ptx.sreg.pm0
    177, // llvm.nvvm.read.ptx.sreg.pm1
    177, // llvm.nvvm.read.ptx.sreg.pm2
    177, // llvm.nvvm.read.ptx.sreg.pm3
    2, // llvm.nvvm.read.ptx.sreg.smid
    2, // llvm.nvvm.read.ptx.sreg.tid.w
    2, // llvm.nvvm.read.ptx.sreg.tid.x
    2, // llvm.nvvm.read.ptx.sreg.tid.y
    2, // llvm.nvvm.read.ptx.sreg.tid.z
    2, // llvm.nvvm.read.ptx.sreg.warpid
    2, // llvm.nvvm.read.ptx.sreg.warpsize
    2, // llvm.nvvm.reflect
    2, // llvm.nvvm.rotate.b32
    2, // llvm.nvvm.rotate.b64
    2, // llvm.nvvm.rotate.right.b64
    2, // llvm.nvvm.round.d
    2, // llvm.nvvm.round.f
    2, // llvm.nvvm.round.ftz.f
    2, // llvm.nvvm.rsqrt.approx.d
    2, // llvm.nvvm.rsqrt.approx.f
    2, // llvm.nvvm.rsqrt.approx.ftz.f
    2, // llvm.nvvm.sad.i
    2, // llvm.nvvm.sad.ui
    2, // llvm.nvvm.saturate.d
    2, // llvm.nvvm.saturate.f
    2, // llvm.nvvm.saturate.ftz.f
    176, // llvm.nvvm.shfl.bfly.f32
    176, // llvm.nvvm.shfl.bfly.f32p
    176, // llvm.nvvm.shfl.bfly.i32
    176, // llvm.nvvm.shfl.bfly.i32p
    176, // llvm.nvvm.shfl.down.f32
    176, // llvm.nvvm.shfl.down.f32p
    176, // llvm.nvvm.shfl.down.i32
    176, // llvm.nvvm.shfl.down.i32p
    176, // llvm.nvvm.shfl.idx.f32
    176, // llvm.nvvm.shfl.idx.f32p
    176, // llvm.nvvm.shfl.idx.i32
    176, // llvm.nvvm.shfl.idx.i32p
    176, // llvm.nvvm.shfl.sync.bfly.f32
    176, // llvm.nvvm.shfl.sync.bfly.f32p
    176, // llvm.nvvm.shfl.sync.bfly.i32
    176, // llvm.nvvm.shfl.sync.bfly.i32p
    176, // llvm.nvvm.shfl.sync.down.f32
    176, // llvm.nvvm.shfl.sync.down.f32p
    176, // llvm.nvvm.shfl.sync.down.i32
    176, // llvm.nvvm.shfl.sync.down.i32p
    176, // llvm.nvvm.shfl.sync.idx.f32
    176, // llvm.nvvm.shfl.sync.idx.f32p
    176, // llvm.nvvm.shfl.sync.idx.i32
    176, // llvm.nvvm.shfl.sync.idx.i32p
    176, // llvm.nvvm.shfl.sync.up.f32
    176, // llvm.nvvm.shfl.sync.up.f32p
    176, // llvm.nvvm.shfl.sync.up.i32
    176, // llvm.nvvm.shfl.sync.up.i32p
    176, // llvm.nvvm.shfl.up.f32
    176, // llvm.nvvm.shfl.up.f32p
    176, // llvm.nvvm.shfl.up.i32
    176, // llvm.nvvm.shfl.up.i32p
    2, // llvm.nvvm.sin.approx.f
    2, // llvm.nvvm.sin.approx.ftz.f
    2, // llvm.nvvm.sqrt.approx.f
    2, // llvm.nvvm.sqrt.approx.ftz.f
    2, // llvm.nvvm.sqrt.f
    2, // llvm.nvvm.sqrt.rm.d
    2, // llvm.nvvm.sqrt.rm.f
    2, // llvm.nvvm.sqrt.rm.ftz.f
    2, // llvm.nvvm.sqrt.rn.d
    2, // llvm.nvvm.sqrt.rn.f
    2, // llvm.nvvm.sqrt.rn.ftz.f
    2, // llvm.nvvm.sqrt.rp.d
    2, // llvm.nvvm.sqrt.rp.f
    2, // llvm.nvvm.sqrt.rp.ftz.f
    2, // llvm.nvvm.sqrt.rz.d
    2, // llvm.nvvm.sqrt.rz.f
    2, // llvm.nvvm.sqrt.rz.ftz.f
    7, // llvm.nvvm.suld.1d.array.i16.clamp
    7, // llvm.nvvm.suld.1d.array.i16.trap
    7, // llvm.nvvm.suld.1d.array.i16.zero
    7, // llvm.nvvm.suld.1d.array.i32.clamp
    7, // llvm.nvvm.suld.1d.array.i32.trap
    7, // llvm.nvvm.suld.1d.array.i32.zero
    7, // llvm.nvvm.suld.1d.array.i64.clamp
    7, // llvm.nvvm.suld.1d.array.i64.trap
    7, // llvm.nvvm.suld.1d.array.i64.zero
    7, // llvm.nvvm.suld.1d.array.i8.clamp
    7, // llvm.nvvm.suld.1d.array.i8.trap
    7, // llvm.nvvm.suld.1d.array.i8.zero
    7, // llvm.nvvm.suld.1d.array.v2i16.clamp
    7, // llvm.nvvm.suld.1d.array.v2i16.trap
    7, // llvm.nvvm.suld.1d.array.v2i16.zero
    7, // llvm.nvvm.suld.1d.array.v2i32.clamp
    7, // llvm.nvvm.suld.1d.array.v2i32.trap
    7, // llvm.nvvm.suld.1d.array.v2i32.zero
    7, // llvm.nvvm.suld.1d.array.v2i64.clamp
    7, // llvm.nvvm.suld.1d.array.v2i64.trap
    7, // llvm.nvvm.suld.1d.array.v2i64.zero
    7, // llvm.nvvm.suld.1d.array.v2i8.clamp
    7, // llvm.nvvm.suld.1d.array.v2i8.trap
    7, // llvm.nvvm.suld.1d.array.v2i8.zero
    7, // llvm.nvvm.suld.1d.array.v4i16.clamp
    7, // llvm.nvvm.suld.1d.array.v4i16.trap
    7, // llvm.nvvm.suld.1d.array.v4i16.zero
    7, // llvm.nvvm.suld.1d.array.v4i32.clamp
    7, // llvm.nvvm.suld.1d.array.v4i32.trap
    7, // llvm.nvvm.suld.1d.array.v4i32.zero
    7, // llvm.nvvm.suld.1d.array.v4i8.clamp
    7, // llvm.nvvm.suld.1d.array.v4i8.trap
    7, // llvm.nvvm.suld.1d.array.v4i8.zero
    7, // llvm.nvvm.suld.1d.i16.clamp
    7, // llvm.nvvm.suld.1d.i16.trap
    7, // llvm.nvvm.suld.1d.i16.zero
    7, // llvm.nvvm.suld.1d.i32.clamp
    7, // llvm.nvvm.suld.1d.i32.trap
    7, // llvm.nvvm.suld.1d.i32.zero
    7, // llvm.nvvm.suld.1d.i64.clamp
    7, // llvm.nvvm.suld.1d.i64.trap
    7, // llvm.nvvm.suld.1d.i64.zero
    7, // llvm.nvvm.suld.1d.i8.clamp
    7, // llvm.nvvm.suld.1d.i8.trap
    7, // llvm.nvvm.suld.1d.i8.zero
    7, // llvm.nvvm.suld.1d.v2i16.clamp
    7, // llvm.nvvm.suld.1d.v2i16.trap
    7, // llvm.nvvm.suld.1d.v2i16.zero
    7, // llvm.nvvm.suld.1d.v2i32.clamp
    7, // llvm.nvvm.suld.1d.v2i32.trap
    7, // llvm.nvvm.suld.1d.v2i32.zero
    7, // llvm.nvvm.suld.1d.v2i64.clamp
    7, // llvm.nvvm.suld.1d.v2i64.trap
    7, // llvm.nvvm.suld.1d.v2i64.zero
    7, // llvm.nvvm.suld.1d.v2i8.clamp
    7, // llvm.nvvm.suld.1d.v2i8.trap
    7, // llvm.nvvm.suld.1d.v2i8.zero
    7, // llvm.nvvm.suld.1d.v4i16.clamp
    7, // llvm.nvvm.suld.1d.v4i16.trap
    7, // llvm.nvvm.suld.1d.v4i16.zero
    7, // llvm.nvvm.suld.1d.v4i32.clamp
    7, // llvm.nvvm.suld.1d.v4i32.trap
    7, // llvm.nvvm.suld.1d.v4i32.zero
    7, // llvm.nvvm.suld.1d.v4i8.clamp
    7, // llvm.nvvm.suld.1d.v4i8.trap
    7, // llvm.nvvm.suld.1d.v4i8.zero
    7, // llvm.nvvm.suld.2d.array.i16.clamp
    7, // llvm.nvvm.suld.2d.array.i16.trap
    7, // llvm.nvvm.suld.2d.array.i16.zero
    7, // llvm.nvvm.suld.2d.array.i32.clamp
    7, // llvm.nvvm.suld.2d.array.i32.trap
    7, // llvm.nvvm.suld.2d.array.i32.zero
    7, // llvm.nvvm.suld.2d.array.i64.clamp
    7, // llvm.nvvm.suld.2d.array.i64.trap
    7, // llvm.nvvm.suld.2d.array.i64.zero
    7, // llvm.nvvm.suld.2d.array.i8.clamp
    7, // llvm.nvvm.suld.2d.array.i8.trap
    7, // llvm.nvvm.suld.2d.array.i8.zero
    7, // llvm.nvvm.suld.2d.array.v2i16.clamp
    7, // llvm.nvvm.suld.2d.array.v2i16.trap
    7, // llvm.nvvm.suld.2d.array.v2i16.zero
    7, // llvm.nvvm.suld.2d.array.v2i32.clamp
    7, // llvm.nvvm.suld.2d.array.v2i32.trap
    7, // llvm.nvvm.suld.2d.array.v2i32.zero
    7, // llvm.nvvm.suld.2d.array.v2i64.clamp
    7, // llvm.nvvm.suld.2d.array.v2i64.trap
    7, // llvm.nvvm.suld.2d.array.v2i64.zero
    7, // llvm.nvvm.suld.2d.array.v2i8.clamp
    7, // llvm.nvvm.suld.2d.array.v2i8.trap
    7, // llvm.nvvm.suld.2d.array.v2i8.zero
    7, // llvm.nvvm.suld.2d.array.v4i16.clamp
    7, // llvm.nvvm.suld.2d.array.v4i16.trap
    7, // llvm.nvvm.suld.2d.array.v4i16.zero
    7, // llvm.nvvm.suld.2d.array.v4i32.clamp
    7, // llvm.nvvm.suld.2d.array.v4i32.trap
    7, // llvm.nvvm.suld.2d.array.v4i32.zero
    7, // llvm.nvvm.suld.2d.array.v4i8.clamp
    7, // llvm.nvvm.suld.2d.array.v4i8.trap
    7, // llvm.nvvm.suld.2d.array.v4i8.zero
    7, // llvm.nvvm.suld.2d.i16.clamp
    7, // llvm.nvvm.suld.2d.i16.trap
    7, // llvm.nvvm.suld.2d.i16.zero
    7, // llvm.nvvm.suld.2d.i32.clamp
    7, // llvm.nvvm.suld.2d.i32.trap
    7, // llvm.nvvm.suld.2d.i32.zero
    7, // llvm.nvvm.suld.2d.i64.clamp
    7, // llvm.nvvm.suld.2d.i64.trap
    7, // llvm.nvvm.suld.2d.i64.zero
    7, // llvm.nvvm.suld.2d.i8.clamp
    7, // llvm.nvvm.suld.2d.i8.trap
    7, // llvm.nvvm.suld.2d.i8.zero
    7, // llvm.nvvm.suld.2d.v2i16.clamp
    7, // llvm.nvvm.suld.2d.v2i16.trap
    7, // llvm.nvvm.suld.2d.v2i16.zero
    7, // llvm.nvvm.suld.2d.v2i32.clamp
    7, // llvm.nvvm.suld.2d.v2i32.trap
    7, // llvm.nvvm.suld.2d.v2i32.zero
    7, // llvm.nvvm.suld.2d.v2i64.clamp
    7, // llvm.nvvm.suld.2d.v2i64.trap
    7, // llvm.nvvm.suld.2d.v2i64.zero
    7, // llvm.nvvm.suld.2d.v2i8.clamp
    7, // llvm.nvvm.suld.2d.v2i8.trap
    7, // llvm.nvvm.suld.2d.v2i8.zero
    7, // llvm.nvvm.suld.2d.v4i16.clamp
    7, // llvm.nvvm.suld.2d.v4i16.trap
    7, // llvm.nvvm.suld.2d.v4i16.zero
    7, // llvm.nvvm.suld.2d.v4i32.clamp
    7, // llvm.nvvm.suld.2d.v4i32.trap
    7, // llvm.nvvm.suld.2d.v4i32.zero
    7, // llvm.nvvm.suld.2d.v4i8.clamp
    7, // llvm.nvvm.suld.2d.v4i8.trap
    7, // llvm.nvvm.suld.2d.v4i8.zero
    7, // llvm.nvvm.suld.3d.i16.clamp
    7, // llvm.nvvm.suld.3d.i16.trap
    7, // llvm.nvvm.suld.3d.i16.zero
    7, // llvm.nvvm.suld.3d.i32.clamp
    7, // llvm.nvvm.suld.3d.i32.trap
    7, // llvm.nvvm.suld.3d.i32.zero
    7, // llvm.nvvm.suld.3d.i64.clamp
    7, // llvm.nvvm.suld.3d.i64.trap
    7, // llvm.nvvm.suld.3d.i64.zero
    7, // llvm.nvvm.suld.3d.i8.clamp
    7, // llvm.nvvm.suld.3d.i8.trap
    7, // llvm.nvvm.suld.3d.i8.zero
    7, // llvm.nvvm.suld.3d.v2i16.clamp
    7, // llvm.nvvm.suld.3d.v2i16.trap
    7, // llvm.nvvm.suld.3d.v2i16.zero
    7, // llvm.nvvm.suld.3d.v2i32.clamp
    7, // llvm.nvvm.suld.3d.v2i32.trap
    7, // llvm.nvvm.suld.3d.v2i32.zero
    7, // llvm.nvvm.suld.3d.v2i64.clamp
    7, // llvm.nvvm.suld.3d.v2i64.trap
    7, // llvm.nvvm.suld.3d.v2i64.zero
    7, // llvm.nvvm.suld.3d.v2i8.clamp
    7, // llvm.nvvm.suld.3d.v2i8.trap
    7, // llvm.nvvm.suld.3d.v2i8.zero
    7, // llvm.nvvm.suld.3d.v4i16.clamp
    7, // llvm.nvvm.suld.3d.v4i16.trap
    7, // llvm.nvvm.suld.3d.v4i16.zero
    7, // llvm.nvvm.suld.3d.v4i32.clamp
    7, // llvm.nvvm.suld.3d.v4i32.trap
    7, // llvm.nvvm.suld.3d.v4i32.zero
    7, // llvm.nvvm.suld.3d.v4i8.clamp
    7, // llvm.nvvm.suld.3d.v4i8.trap
    7, // llvm.nvvm.suld.3d.v4i8.zero
    2, // llvm.nvvm.suq.array.size
    2, // llvm.nvvm.suq.channel.data.type
    2, // llvm.nvvm.suq.channel.order
    2, // llvm.nvvm.suq.depth
    2, // llvm.nvvm.suq.height
    2, // llvm.nvvm.suq.width
    7, // llvm.nvvm.sust.b.1d.array.i16.clamp
    7, // llvm.nvvm.sust.b.1d.array.i16.trap
    7, // llvm.nvvm.sust.b.1d.array.i16.zero
    7, // llvm.nvvm.sust.b.1d.array.i32.clamp
    7, // llvm.nvvm.sust.b.1d.array.i32.trap
    7, // llvm.nvvm.sust.b.1d.array.i32.zero
    7, // llvm.nvvm.sust.b.1d.array.i64.clamp
    7, // llvm.nvvm.sust.b.1d.array.i64.trap
    7, // llvm.nvvm.sust.b.1d.array.i64.zero
    7, // llvm.nvvm.sust.b.1d.array.i8.clamp
    7, // llvm.nvvm.sust.b.1d.array.i8.trap
    7, // llvm.nvvm.sust.b.1d.array.i8.zero
    7, // llvm.nvvm.sust.b.1d.array.v2i16.clamp
    7, // llvm.nvvm.sust.b.1d.array.v2i16.trap
    7, // llvm.nvvm.sust.b.1d.array.v2i16.zero
    7, // llvm.nvvm.sust.b.1d.array.v2i32.clamp
    7, // llvm.nvvm.sust.b.1d.array.v2i32.trap
    7, // llvm.nvvm.sust.b.1d.array.v2i32.zero
    7, // llvm.nvvm.sust.b.1d.array.v2i64.clamp
    7, // llvm.nvvm.sust.b.1d.array.v2i64.trap
    7, // llvm.nvvm.sust.b.1d.array.v2i64.zero
    7, // llvm.nvvm.sust.b.1d.array.v2i8.clamp
    7, // llvm.nvvm.sust.b.1d.array.v2i8.trap
    7, // llvm.nvvm.sust.b.1d.array.v2i8.zero
    7, // llvm.nvvm.sust.b.1d.array.v4i16.clamp
    7, // llvm.nvvm.sust.b.1d.array.v4i16.trap
    7, // llvm.nvvm.sust.b.1d.array.v4i16.zero
    7, // llvm.nvvm.sust.b.1d.array.v4i32.clamp
    7, // llvm.nvvm.sust.b.1d.array.v4i32.trap
    7, // llvm.nvvm.sust.b.1d.array.v4i32.zero
    7, // llvm.nvvm.sust.b.1d.array.v4i8.clamp
    7, // llvm.nvvm.sust.b.1d.array.v4i8.trap
    7, // llvm.nvvm.sust.b.1d.array.v4i8.zero
    7, // llvm.nvvm.sust.b.1d.i16.clamp
    7, // llvm.nvvm.sust.b.1d.i16.trap
    7, // llvm.nvvm.sust.b.1d.i16.zero
    7, // llvm.nvvm.sust.b.1d.i32.clamp
    7, // llvm.nvvm.sust.b.1d.i32.trap
    7, // llvm.nvvm.sust.b.1d.i32.zero
    7, // llvm.nvvm.sust.b.1d.i64.clamp
    7, // llvm.nvvm.sust.b.1d.i64.trap
    7, // llvm.nvvm.sust.b.1d.i64.zero
    7, // llvm.nvvm.sust.b.1d.i8.clamp
    7, // llvm.nvvm.sust.b.1d.i8.trap
    7, // llvm.nvvm.sust.b.1d.i8.zero
    7, // llvm.nvvm.sust.b.1d.v2i16.clamp
    7, // llvm.nvvm.sust.b.1d.v2i16.trap
    7, // llvm.nvvm.sust.b.1d.v2i16.zero
    7, // llvm.nvvm.sust.b.1d.v2i32.clamp
    7, // llvm.nvvm.sust.b.1d.v2i32.trap
    7, // llvm.nvvm.sust.b.1d.v2i32.zero
    7, // llvm.nvvm.sust.b.1d.v2i64.clamp
    7, // llvm.nvvm.sust.b.1d.v2i64.trap
    7, // llvm.nvvm.sust.b.1d.v2i64.zero
    7, // llvm.nvvm.sust.b.1d.v2i8.clamp
    7, // llvm.nvvm.sust.b.1d.v2i8.trap
    7, // llvm.nvvm.sust.b.1d.v2i8.zero
    7, // llvm.nvvm.sust.b.1d.v4i16.clamp
    7, // llvm.nvvm.sust.b.1d.v4i16.trap
    7, // llvm.nvvm.sust.b.1d.v4i16.zero
    7, // llvm.nvvm.sust.b.1d.v4i32.clamp
    7, // llvm.nvvm.sust.b.1d.v4i32.trap
    7, // llvm.nvvm.sust.b.1d.v4i32.zero
    7, // llvm.nvvm.sust.b.1d.v4i8.clamp
    7, // llvm.nvvm.sust.b.1d.v4i8.trap
    7, // llvm.nvvm.sust.b.1d.v4i8.zero
    7, // llvm.nvvm.sust.b.2d.array.i16.clamp
    7, // llvm.nvvm.sust.b.2d.array.i16.trap
    7, // llvm.nvvm.sust.b.2d.array.i16.zero
    7, // llvm.nvvm.sust.b.2d.array.i32.clamp
    7, // llvm.nvvm.sust.b.2d.array.i32.trap
    7, // llvm.nvvm.sust.b.2d.array.i32.zero
    7, // llvm.nvvm.sust.b.2d.array.i64.clamp
    7, // llvm.nvvm.sust.b.2d.array.i64.trap
    7, // llvm.nvvm.sust.b.2d.array.i64.zero
    7, // llvm.nvvm.sust.b.2d.array.i8.clamp
    7, // llvm.nvvm.sust.b.2d.array.i8.trap
    7, // llvm.nvvm.sust.b.2d.array.i8.zero
    7, // llvm.nvvm.sust.b.2d.array.v2i16.clamp
    7, // llvm.nvvm.sust.b.2d.array.v2i16.trap
    7, // llvm.nvvm.sust.b.2d.array.v2i16.zero
    7, // llvm.nvvm.sust.b.2d.array.v2i32.clamp
    7, // llvm.nvvm.sust.b.2d.array.v2i32.trap
    7, // llvm.nvvm.sust.b.2d.array.v2i32.zero
    7, // llvm.nvvm.sust.b.2d.array.v2i64.clamp
    7, // llvm.nvvm.sust.b.2d.array.v2i64.trap
    7, // llvm.nvvm.sust.b.2d.array.v2i64.zero
    7, // llvm.nvvm.sust.b.2d.array.v2i8.clamp
    7, // llvm.nvvm.sust.b.2d.array.v2i8.trap
    7, // llvm.nvvm.sust.b.2d.array.v2i8.zero
    7, // llvm.nvvm.sust.b.2d.array.v4i16.clamp
    7, // llvm.nvvm.sust.b.2d.array.v4i16.trap
    7, // llvm.nvvm.sust.b.2d.array.v4i16.zero
    7, // llvm.nvvm.sust.b.2d.array.v4i32.clamp
    7, // llvm.nvvm.sust.b.2d.array.v4i32.trap
    7, // llvm.nvvm.sust.b.2d.array.v4i32.zero
    7, // llvm.nvvm.sust.b.2d.array.v4i8.clamp
    7, // llvm.nvvm.sust.b.2d.array.v4i8.trap
    7, // llvm.nvvm.sust.b.2d.array.v4i8.zero
    7, // llvm.nvvm.sust.b.2d.i16.clamp
    7, // llvm.nvvm.sust.b.2d.i16.trap
    7, // llvm.nvvm.sust.b.2d.i16.zero
    7, // llvm.nvvm.sust.b.2d.i32.clamp
    7, // llvm.nvvm.sust.b.2d.i32.trap
    7, // llvm.nvvm.sust.b.2d.i32.zero
    7, // llvm.nvvm.sust.b.2d.i64.clamp
    7, // llvm.nvvm.sust.b.2d.i64.trap
    7, // llvm.nvvm.sust.b.2d.i64.zero
    7, // llvm.nvvm.sust.b.2d.i8.clamp
    7, // llvm.nvvm.sust.b.2d.i8.trap
    7, // llvm.nvvm.sust.b.2d.i8.zero
    7, // llvm.nvvm.sust.b.2d.v2i16.clamp
    7, // llvm.nvvm.sust.b.2d.v2i16.trap
    7, // llvm.nvvm.sust.b.2d.v2i16.zero
    7, // llvm.nvvm.sust.b.2d.v2i32.clamp
    7, // llvm.nvvm.sust.b.2d.v2i32.trap
    7, // llvm.nvvm.sust.b.2d.v2i32.zero
    7, // llvm.nvvm.sust.b.2d.v2i64.clamp
    7, // llvm.nvvm.sust.b.2d.v2i64.trap
    7, // llvm.nvvm.sust.b.2d.v2i64.zero
    7, // llvm.nvvm.sust.b.2d.v2i8.clamp
    7, // llvm.nvvm.sust.b.2d.v2i8.trap
    7, // llvm.nvvm.sust.b.2d.v2i8.zero
    7, // llvm.nvvm.sust.b.2d.v4i16.clamp
    7, // llvm.nvvm.sust.b.2d.v4i16.trap
    7, // llvm.nvvm.sust.b.2d.v4i16.zero
    7, // llvm.nvvm.sust.b.2d.v4i32.clamp
    7, // llvm.nvvm.sust.b.2d.v4i32.trap
    7, // llvm.nvvm.sust.b.2d.v4i32.zero
    7, // llvm.nvvm.sust.b.2d.v4i8.clamp
    7, // llvm.nvvm.sust.b.2d.v4i8.trap
    7, // llvm.nvvm.sust.b.2d.v4i8.zero
    7, // llvm.nvvm.sust.b.3d.i16.clamp
    7, // llvm.nvvm.sust.b.3d.i16.trap
    7, // llvm.nvvm.sust.b.3d.i16.zero
    7, // llvm.nvvm.sust.b.3d.i32.clamp
    7, // llvm.nvvm.sust.b.3d.i32.trap
    7, // llvm.nvvm.sust.b.3d.i32.zero
    7, // llvm.nvvm.sust.b.3d.i64.clamp
    7, // llvm.nvvm.sust.b.3d.i64.trap
    7, // llvm.nvvm.sust.b.3d.i64.zero
    7, // llvm.nvvm.sust.b.3d.i8.clamp
    7, // llvm.nvvm.sust.b.3d.i8.trap
    7, // llvm.nvvm.sust.b.3d.i8.zero
    7, // llvm.nvvm.sust.b.3d.v2i16.clamp
    7, // llvm.nvvm.sust.b.3d.v2i16.trap
    7, // llvm.nvvm.sust.b.3d.v2i16.zero
    7, // llvm.nvvm.sust.b.3d.v2i32.clamp
    7, // llvm.nvvm.sust.b.3d.v2i32.trap
    7, // llvm.nvvm.sust.b.3d.v2i32.zero
    7, // llvm.nvvm.sust.b.3d.v2i64.clamp
    7, // llvm.nvvm.sust.b.3d.v2i64.trap
    7, // llvm.nvvm.sust.b.3d.v2i64.zero
    7, // llvm.nvvm.sust.b.3d.v2i8.clamp
    7, // llvm.nvvm.sust.b.3d.v2i8.trap
    7, // llvm.nvvm.sust.b.3d.v2i8.zero
    7, // llvm.nvvm.sust.b.3d.v4i16.clamp
    7, // llvm.nvvm.sust.b.3d.v4i16.trap
    7, // llvm.nvvm.sust.b.3d.v4i16.zero
    7, // llvm.nvvm.sust.b.3d.v4i32.clamp
    7, // llvm.nvvm.sust.b.3d.v4i32.trap
    7, // llvm.nvvm.sust.b.3d.v4i32.zero
    7, // llvm.nvvm.sust.b.3d.v4i8.clamp
    7, // llvm.nvvm.sust.b.3d.v4i8.trap
    7, // llvm.nvvm.sust.b.3d.v4i8.zero
    7, // llvm.nvvm.sust.p.1d.array.i16.trap
    7, // llvm.nvvm.sust.p.1d.array.i32.trap
    7, // llvm.nvvm.sust.p.1d.array.i8.trap
    7, // llvm.nvvm.sust.p.1d.array.v2i16.trap
    7, // llvm.nvvm.sust.p.1d.array.v2i32.trap
    7, // llvm.nvvm.sust.p.1d.array.v2i8.trap
    7, // llvm.nvvm.sust.p.1d.array.v4i16.trap
    7, // llvm.nvvm.sust.p.1d.array.v4i32.trap
    7, // llvm.nvvm.sust.p.1d.array.v4i8.trap
    7, // llvm.nvvm.sust.p.1d.i16.trap
    7, // llvm.nvvm.sust.p.1d.i32.trap
    7, // llvm.nvvm.sust.p.1d.i8.trap
    7, // llvm.nvvm.sust.p.1d.v2i16.trap
    7, // llvm.nvvm.sust.p.1d.v2i32.trap
    7, // llvm.nvvm.sust.p.1d.v2i8.trap
    7, // llvm.nvvm.sust.p.1d.v4i16.trap
    7, // llvm.nvvm.sust.p.1d.v4i32.trap
    7, // llvm.nvvm.sust.p.1d.v4i8.trap
    7, // llvm.nvvm.sust.p.2d.array.i16.trap
    7, // llvm.nvvm.sust.p.2d.array.i32.trap
    7, // llvm.nvvm.sust.p.2d.array.i8.trap
    7, // llvm.nvvm.sust.p.2d.array.v2i16.trap
    7, // llvm.nvvm.sust.p.2d.array.v2i32.trap
    7, // llvm.nvvm.sust.p.2d.array.v2i8.trap
    7, // llvm.nvvm.sust.p.2d.array.v4i16.trap
    7, // llvm.nvvm.sust.p.2d.array.v4i32.trap
    7, // llvm.nvvm.sust.p.2d.array.v4i8.trap
    7, // llvm.nvvm.sust.p.2d.i16.trap
    7, // llvm.nvvm.sust.p.2d.i32.trap
    7, // llvm.nvvm.sust.p.2d.i8.trap
    7, // llvm.nvvm.sust.p.2d.v2i16.trap
    7, // llvm.nvvm.sust.p.2d.v2i32.trap
    7, // llvm.nvvm.sust.p.2d.v2i8.trap
    7, // llvm.nvvm.sust.p.2d.v4i16.trap
    7, // llvm.nvvm.sust.p.2d.v4i32.trap
    7, // llvm.nvvm.sust.p.2d.v4i8.trap
    7, // llvm.nvvm.sust.p.3d.i16.trap
    7, // llvm.nvvm.sust.p.3d.i32.trap
    7, // llvm.nvvm.sust.p.3d.i8.trap
    7, // llvm.nvvm.sust.p.3d.v2i16.trap
    7, // llvm.nvvm.sust.p.3d.v2i32.trap
    7, // llvm.nvvm.sust.p.3d.v2i8.trap
    7, // llvm.nvvm.sust.p.3d.v4i16.trap
    7, // llvm.nvvm.sust.p.3d.v4i32.trap
    7, // llvm.nvvm.sust.p.3d.v4i8.trap
    2, // llvm.nvvm.swap.lo.hi.b64
    7, // llvm.nvvm.tex.1d.array.grad.v4f32.f32
    7, // llvm.nvvm.tex.1d.array.grad.v4s32.f32
    7, // llvm.nvvm.tex.1d.array.grad.v4u32.f32
    7, // llvm.nvvm.tex.1d.array.level.v4f32.f32
    7, // llvm.nvvm.tex.1d.array.level.v4s32.f32
    7, // llvm.nvvm.tex.1d.array.level.v4u32.f32
    7, // llvm.nvvm.tex.1d.array.v4f32.f32
    7, // llvm.nvvm.tex.1d.array.v4f32.s32
    7, // llvm.nvvm.tex.1d.array.v4s32.f32
    7, // llvm.nvvm.tex.1d.array.v4s32.s32
    7, // llvm.nvvm.tex.1d.array.v4u32.f32
    7, // llvm.nvvm.tex.1d.array.v4u32.s32
    7, // llvm.nvvm.tex.1d.grad.v4f32.f32
    7, // llvm.nvvm.tex.1d.grad.v4s32.f32
    7, // llvm.nvvm.tex.1d.grad.v4u32.f32
    7, // llvm.nvvm.tex.1d.level.v4f32.f32
    7, // llvm.nvvm.tex.1d.level.v4s32.f32
    7, // llvm.nvvm.tex.1d.level.v4u32.f32
    7, // llvm.nvvm.tex.1d.v4f32.f32
    7, // llvm.nvvm.tex.1d.v4f32.s32
    7, // llvm.nvvm.tex.1d.v4s32.f32
    7, // llvm.nvvm.tex.1d.v4s32.s32
    7, // llvm.nvvm.tex.1d.v4u32.f32
    7, // llvm.nvvm.tex.1d.v4u32.s32
    7, // llvm.nvvm.tex.2d.array.grad.v4f32.f32
    7, // llvm.nvvm.tex.2d.array.grad.v4s32.f32
    7, // llvm.nvvm.tex.2d.array.grad.v4u32.f32
    7, // llvm.nvvm.tex.2d.array.level.v4f32.f32
    7, // llvm.nvvm.tex.2d.array.level.v4s32.f32
    7, // llvm.nvvm.tex.2d.array.level.v4u32.f32
    7, // llvm.nvvm.tex.2d.array.v4f32.f32
    7, // llvm.nvvm.tex.2d.array.v4f32.s32
    7, // llvm.nvvm.tex.2d.array.v4s32.f32
    7, // llvm.nvvm.tex.2d.array.v4s32.s32
    7, // llvm.nvvm.tex.2d.array.v4u32.f32
    7, // llvm.nvvm.tex.2d.array.v4u32.s32
    7, // llvm.nvvm.tex.2d.grad.v4f32.f32
    7, // llvm.nvvm.tex.2d.grad.v4s32.f32
    7, // llvm.nvvm.tex.2d.grad.v4u32.f32
    7, // llvm.nvvm.tex.2d.level.v4f32.f32
    7, // llvm.nvvm.tex.2d.level.v4s32.f32
    7, // llvm.nvvm.tex.2d.level.v4u32.f32
    7, // llvm.nvvm.tex.2d.v4f32.f32
    7, // llvm.nvvm.tex.2d.v4f32.s32
    7, // llvm.nvvm.tex.2d.v4s32.f32
    7, // llvm.nvvm.tex.2d.v4s32.s32
    7, // llvm.nvvm.tex.2d.v4u32.f32
    7, // llvm.nvvm.tex.2d.v4u32.s32
    7, // llvm.nvvm.tex.3d.grad.v4f32.f32
    7, // llvm.nvvm.tex.3d.grad.v4s32.f32
    7, // llvm.nvvm.tex.3d.grad.v4u32.f32
    7, // llvm.nvvm.tex.3d.level.v4f32.f32
    7, // llvm.nvvm.tex.3d.level.v4s32.f32
    7, // llvm.nvvm.tex.3d.level.v4u32.f32
    7, // llvm.nvvm.tex.3d.v4f32.f32
    7, // llvm.nvvm.tex.3d.v4f32.s32
    7, // llvm.nvvm.tex.3d.v4s32.f32
    7, // llvm.nvvm.tex.3d.v4s32.s32
    7, // llvm.nvvm.tex.3d.v4u32.f32
    7, // llvm.nvvm.tex.3d.v4u32.s32
    7, // llvm.nvvm.tex.cube.array.level.v4f32.f32
    7, // llvm.nvvm.tex.cube.array.level.v4s32.f32
    7, // llvm.nvvm.tex.cube.array.level.v4u32.f32
    7, // llvm.nvvm.tex.cube.array.v4f32.f32
    7, // llvm.nvvm.tex.cube.array.v4s32.f32
    7, // llvm.nvvm.tex.cube.array.v4u32.f32
    7, // llvm.nvvm.tex.cube.level.v4f32.f32
    7, // llvm.nvvm.tex.cube.level.v4s32.f32
    7, // llvm.nvvm.tex.cube.level.v4u32.f32
    7, // llvm.nvvm.tex.cube.v4f32.f32
    7, // llvm.nvvm.tex.cube.v4s32.f32
    7, // llvm.nvvm.tex.cube.v4u32.f32
    7, // llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32
    7, // llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32
    7, // llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32
    7, // llvm.nvvm.tex.unified.1d.array.level.v4f32.f32
    7, // llvm.nvvm.tex.unified.1d.array.level.v4s32.f32
    7, // llvm.nvvm.tex.unified.1d.array.level.v4u32.f32
    7, // llvm.nvvm.tex.unified.1d.array.v4f32.f32
    7, // llvm.nvvm.tex.unified.1d.array.v4f32.s32
    7, // llvm.nvvm.tex.unified.1d.array.v4s32.f32
    7, // llvm.nvvm.tex.unified.1d.array.v4s32.s32
    7, // llvm.nvvm.tex.unified.1d.array.v4u32.f32
    7, // llvm.nvvm.tex.unified.1d.array.v4u32.s32
    7, // llvm.nvvm.tex.unified.1d.grad.v4f32.f32
    7, // llvm.nvvm.tex.unified.1d.grad.v4s32.f32
    7, // llvm.nvvm.tex.unified.1d.grad.v4u32.f32
    7, // llvm.nvvm.tex.unified.1d.level.v4f32.f32
    7, // llvm.nvvm.tex.unified.1d.level.v4s32.f32
    7, // llvm.nvvm.tex.unified.1d.level.v4u32.f32
    7, // llvm.nvvm.tex.unified.1d.v4f32.f32
    7, // llvm.nvvm.tex.unified.1d.v4f32.s32
    7, // llvm.nvvm.tex.unified.1d.v4s32.f32
    7, // llvm.nvvm.tex.unified.1d.v4s32.s32
    7, // llvm.nvvm.tex.unified.1d.v4u32.f32
    7, // llvm.nvvm.tex.unified.1d.v4u32.s32
    7, // llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32
    7, // llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32
    7, // llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32
    7, // llvm.nvvm.tex.unified.2d.array.level.v4f32.f32
    7, // llvm.nvvm.tex.unified.2d.array.level.v4s32.f32
    7, // llvm.nvvm.tex.unified.2d.array.level.v4u32.f32
    7, // llvm.nvvm.tex.unified.2d.array.v4f32.f32
    7, // llvm.nvvm.tex.unified.2d.array.v4f32.s32
    7, // llvm.nvvm.tex.unified.2d.array.v4s32.f32
    7, // llvm.nvvm.tex.unified.2d.array.v4s32.s32
    7, // llvm.nvvm.tex.unified.2d.array.v4u32.f32
    7, // llvm.nvvm.tex.unified.2d.array.v4u32.s32
    7, // llvm.nvvm.tex.unified.2d.grad.v4f32.f32
    7, // llvm.nvvm.tex.unified.2d.grad.v4s32.f32
    7, // llvm.nvvm.tex.unified.2d.grad.v4u32.f32
    7, // llvm.nvvm.tex.unified.2d.level.v4f32.f32
    7, // llvm.nvvm.tex.unified.2d.level.v4s32.f32
    7, // llvm.nvvm.tex.unified.2d.level.v4u32.f32
    7, // llvm.nvvm.tex.unified.2d.v4f32.f32
    7, // llvm.nvvm.tex.unified.2d.v4f32.s32
    7, // llvm.nvvm.tex.unified.2d.v4s32.f32
    7, // llvm.nvvm.tex.unified.2d.v4s32.s32
    7, // llvm.nvvm.tex.unified.2d.v4u32.f32
    7, // llvm.nvvm.tex.unified.2d.v4u32.s32
    7, // llvm.nvvm.tex.unified.3d.grad.v4f32.f32
    7, // llvm.nvvm.tex.unified.3d.grad.v4s32.f32
    7, // llvm.nvvm.tex.unified.3d.grad.v4u32.f32
    7, // llvm.nvvm.tex.unified.3d.level.v4f32.f32
    7, // llvm.nvvm.tex.unified.3d.level.v4s32.f32
    7, // llvm.nvvm.tex.unified.3d.level.v4u32.f32
    7, // llvm.nvvm.tex.unified.3d.v4f32.f32
    7, // llvm.nvvm.tex.unified.3d.v4f32.s32
    7, // llvm.nvvm.tex.unified.3d.v4s32.f32
    7, // llvm.nvvm.tex.unified.3d.v4s32.s32
    7, // llvm.nvvm.tex.unified.3d.v4u32.f32
    7, // llvm.nvvm.tex.unified.3d.v4u32.s32
    7, // llvm.nvvm.tex.unified.cube.array.level.v4f32.f32
    7, // llvm.nvvm.tex.unified.cube.array.level.v4s32.f32
    7, // llvm.nvvm.tex.unified.cube.array.level.v4u32.f32
    7, // llvm.nvvm.tex.unified.cube.array.v4f32.f32
    7, // llvm.nvvm.tex.unified.cube.array.v4s32.f32
    7, // llvm.nvvm.tex.unified.cube.array.v4u32.f32
    7, // llvm.nvvm.tex.unified.cube.level.v4f32.f32
    7, // llvm.nvvm.tex.unified.cube.level.v4s32.f32
    7, // llvm.nvvm.tex.unified.cube.level.v4u32.f32
    7, // llvm.nvvm.tex.unified.cube.v4f32.f32
    7, // llvm.nvvm.tex.unified.cube.v4s32.f32
    7, // llvm.nvvm.tex.unified.cube.v4u32.f32
    2, // llvm.nvvm.texsurf.handle
    2, // llvm.nvvm.texsurf.handle.internal
    7, // llvm.nvvm.tld4.a.2d.v4f32.f32
    7, // llvm.nvvm.tld4.a.2d.v4s32.f32
    7, // llvm.nvvm.tld4.a.2d.v4u32.f32
    7, // llvm.nvvm.tld4.b.2d.v4f32.f32
    7, // llvm.nvvm.tld4.b.2d.v4s32.f32
    7, // llvm.nvvm.tld4.b.2d.v4u32.f32
    7, // llvm.nvvm.tld4.g.2d.v4f32.f32
    7, // llvm.nvvm.tld4.g.2d.v4s32.f32
    7, // llvm.nvvm.tld4.g.2d.v4u32.f32
    7, // llvm.nvvm.tld4.r.2d.v4f32.f32
    7, // llvm.nvvm.tld4.r.2d.v4s32.f32
    7, // llvm.nvvm.tld4.r.2d.v4u32.f32
    7, // llvm.nvvm.tld4.unified.a.2d.v4f32.f32
    7, // llvm.nvvm.tld4.unified.a.2d.v4s32.f32
    7, // llvm.nvvm.tld4.unified.a.2d.v4u32.f32
    7, // llvm.nvvm.tld4.unified.b.2d.v4f32.f32
    7, // llvm.nvvm.tld4.unified.b.2d.v4s32.f32
    7, // llvm.nvvm.tld4.unified.b.2d.v4u32.f32
    7, // llvm.nvvm.tld4.unified.g.2d.v4f32.f32
    7, // llvm.nvvm.tld4.unified.g.2d.v4s32.f32
    7, // llvm.nvvm.tld4.unified.g.2d.v4u32.f32
    7, // llvm.nvvm.tld4.unified.r.2d.v4f32.f32
    7, // llvm.nvvm.tld4.unified.r.2d.v4s32.f32
    7, // llvm.nvvm.tld4.unified.r.2d.v4u32.f32
    2, // llvm.nvvm.trunc.d
    2, // llvm.nvvm.trunc.f
    2, // llvm.nvvm.trunc.ftz.f
    2, // llvm.nvvm.txq.array.size
    2, // llvm.nvvm.txq.channel.data.type
    2, // llvm.nvvm.txq.channel.order
    2, // llvm.nvvm.txq.depth
    2, // llvm.nvvm.txq.height
    2, // llvm.nvvm.txq.num.mipmap.levels
    2, // llvm.nvvm.txq.num.samples
    2, // llvm.nvvm.txq.width
    2, // llvm.nvvm.ui2d.rm
    2, // llvm.nvvm.ui2d.rn
    2, // llvm.nvvm.ui2d.rp
    2, // llvm.nvvm.ui2d.rz
    2, // llvm.nvvm.ui2f.rm
    2, // llvm.nvvm.ui2f.rn
    2, // llvm.nvvm.ui2f.rp
    2, // llvm.nvvm.ui2f.rz
    2, // llvm.nvvm.ull2d.rm
    2, // llvm.nvvm.ull2d.rn
    2, // llvm.nvvm.ull2d.rp
    2, // llvm.nvvm.ull2d.rz
    2, // llvm.nvvm.ull2f.rm
    2, // llvm.nvvm.ull2f.rn
    2, // llvm.nvvm.ull2f.rp
    2, // llvm.nvvm.ull2f.rz
    176, // llvm.nvvm.vote.all
    176, // llvm.nvvm.vote.all.sync
    176, // llvm.nvvm.vote.any
    176, // llvm.nvvm.vote.any.sync
    176, // llvm.nvvm.vote.ballot
    176, // llvm.nvvm.vote.ballot.sync
    176, // llvm.nvvm.vote.uni
    176, // llvm.nvvm.vote.uni.sync
    17, // llvm.nvvm.wmma.m16n16k16.load.a.col.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.a.col.s8
    17, // llvm.nvvm.wmma.m16n16k16.load.a.col.stride.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.a.col.stride.s8
    17, // llvm.nvvm.wmma.m16n16k16.load.a.col.stride.u8
    17, // llvm.nvvm.wmma.m16n16k16.load.a.col.u8
    17, // llvm.nvvm.wmma.m16n16k16.load.a.row.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.a.row.s8
    17, // llvm.nvvm.wmma.m16n16k16.load.a.row.stride.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.a.row.stride.s8
    17, // llvm.nvvm.wmma.m16n16k16.load.a.row.stride.u8
    17, // llvm.nvvm.wmma.m16n16k16.load.a.row.u8
    17, // llvm.nvvm.wmma.m16n16k16.load.b.col.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.b.col.s8
    17, // llvm.nvvm.wmma.m16n16k16.load.b.col.stride.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.b.col.stride.s8
    17, // llvm.nvvm.wmma.m16n16k16.load.b.col.stride.u8
    17, // llvm.nvvm.wmma.m16n16k16.load.b.col.u8
    17, // llvm.nvvm.wmma.m16n16k16.load.b.row.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.b.row.s8
    17, // llvm.nvvm.wmma.m16n16k16.load.b.row.stride.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.b.row.stride.s8
    17, // llvm.nvvm.wmma.m16n16k16.load.b.row.stride.u8
    17, // llvm.nvvm.wmma.m16n16k16.load.b.row.u8
    17, // llvm.nvvm.wmma.m16n16k16.load.c.col.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.c.col.f32
    17, // llvm.nvvm.wmma.m16n16k16.load.c.col.s32
    17, // llvm.nvvm.wmma.m16n16k16.load.c.col.stride.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.c.col.stride.f32
    17, // llvm.nvvm.wmma.m16n16k16.load.c.col.stride.s32
    17, // llvm.nvvm.wmma.m16n16k16.load.c.row.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.c.row.f32
    17, // llvm.nvvm.wmma.m16n16k16.load.c.row.s32
    17, // llvm.nvvm.wmma.m16n16k16.load.c.row.stride.f16
    17, // llvm.nvvm.wmma.m16n16k16.load.c.row.stride.f32
    17, // llvm.nvvm.wmma.m16n16k16.load.c.row.stride.s32
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f16.f16
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f16.f32
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f32.f16
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f32.f32
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.s8
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.s8.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.u8
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.col.u8.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f16.f16
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f16.f32
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f32.f16
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f32.f32
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.s8
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.s8.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.u8
    2, // llvm.nvvm.wmma.m16n16k16.mma.col.row.u8.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f16.f16
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f16.f32
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f32.f16
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f32.f32
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.s8
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.s8.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.u8
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.col.u8.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f16.f16
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f16.f32
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f32.f16
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f32.f32
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.s8
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.s8.satfinite
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.u8
    2, // llvm.nvvm.wmma.m16n16k16.mma.row.row.u8.satfinite
    64, // llvm.nvvm.wmma.m16n16k16.store.d.col.f16
    64, // llvm.nvvm.wmma.m16n16k16.store.d.col.f32
    64, // llvm.nvvm.wmma.m16n16k16.store.d.col.s32
    64, // llvm.nvvm.wmma.m16n16k16.store.d.col.stride.f16
    64, // llvm.nvvm.wmma.m16n16k16.store.d.col.stride.f32
    64, // llvm.nvvm.wmma.m16n16k16.store.d.col.stride.s32
    64, // llvm.nvvm.wmma.m16n16k16.store.d.row.f16
    64, // llvm.nvvm.wmma.m16n16k16.store.d.row.f32
    64, // llvm.nvvm.wmma.m16n16k16.store.d.row.s32
    64, // llvm.nvvm.wmma.m16n16k16.store.d.row.stride.f16
    64, // llvm.nvvm.wmma.m16n16k16.store.d.row.stride.f32
    64, // llvm.nvvm.wmma.m16n16k16.store.d.row.stride.s32
    17, // llvm.nvvm.wmma.m32n8k16.load.a.col.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.a.col.s8
    17, // llvm.nvvm.wmma.m32n8k16.load.a.col.stride.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.a.col.stride.s8
    17, // llvm.nvvm.wmma.m32n8k16.load.a.col.stride.u8
    17, // llvm.nvvm.wmma.m32n8k16.load.a.col.u8
    17, // llvm.nvvm.wmma.m32n8k16.load.a.row.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.a.row.s8
    17, // llvm.nvvm.wmma.m32n8k16.load.a.row.stride.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.a.row.stride.s8
    17, // llvm.nvvm.wmma.m32n8k16.load.a.row.stride.u8
    17, // llvm.nvvm.wmma.m32n8k16.load.a.row.u8
    17, // llvm.nvvm.wmma.m32n8k16.load.b.col.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.b.col.s8
    17, // llvm.nvvm.wmma.m32n8k16.load.b.col.stride.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.b.col.stride.s8
    17, // llvm.nvvm.wmma.m32n8k16.load.b.col.stride.u8
    17, // llvm.nvvm.wmma.m32n8k16.load.b.col.u8
    17, // llvm.nvvm.wmma.m32n8k16.load.b.row.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.b.row.s8
    17, // llvm.nvvm.wmma.m32n8k16.load.b.row.stride.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.b.row.stride.s8
    17, // llvm.nvvm.wmma.m32n8k16.load.b.row.stride.u8
    17, // llvm.nvvm.wmma.m32n8k16.load.b.row.u8
    17, // llvm.nvvm.wmma.m32n8k16.load.c.col.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.c.col.f32
    17, // llvm.nvvm.wmma.m32n8k16.load.c.col.s32
    17, // llvm.nvvm.wmma.m32n8k16.load.c.col.stride.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.c.col.stride.f32
    17, // llvm.nvvm.wmma.m32n8k16.load.c.col.stride.s32
    17, // llvm.nvvm.wmma.m32n8k16.load.c.row.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.c.row.f32
    17, // llvm.nvvm.wmma.m32n8k16.load.c.row.s32
    17, // llvm.nvvm.wmma.m32n8k16.load.c.row.stride.f16
    17, // llvm.nvvm.wmma.m32n8k16.load.c.row.stride.f32
    17, // llvm.nvvm.wmma.m32n8k16.load.c.row.stride.s32
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f16.f16
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f16.f32
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f32.f16
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f32.f32
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.s8
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.s8.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.u8
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.col.u8.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f16.f16
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f16.f32
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f32.f16
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f32.f32
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.s8
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.s8.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.u8
    2, // llvm.nvvm.wmma.m32n8k16.mma.col.row.u8.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f16.f16
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f16.f32
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f32.f16
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f32.f32
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.s8
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.s8.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.u8
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.col.u8.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f16.f16
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f16.f32
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f32.f16
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f32.f32
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.s8
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.s8.satfinite
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.u8
    2, // llvm.nvvm.wmma.m32n8k16.mma.row.row.u8.satfinite
    64, // llvm.nvvm.wmma.m32n8k16.store.d.col.f16
    64, // llvm.nvvm.wmma.m32n8k16.store.d.col.f32
    64, // llvm.nvvm.wmma.m32n8k16.store.d.col.s32
    64, // llvm.nvvm.wmma.m32n8k16.store.d.col.stride.f16
    64, // llvm.nvvm.wmma.m32n8k16.store.d.col.stride.f32
    64, // llvm.nvvm.wmma.m32n8k16.store.d.col.stride.s32
    64, // llvm.nvvm.wmma.m32n8k16.store.d.row.f16
    64, // llvm.nvvm.wmma.m32n8k16.store.d.row.f32
    64, // llvm.nvvm.wmma.m32n8k16.store.d.row.s32
    64, // llvm.nvvm.wmma.m32n8k16.store.d.row.stride.f16
    64, // llvm.nvvm.wmma.m32n8k16.store.d.row.stride.f32
    64, // llvm.nvvm.wmma.m32n8k16.store.d.row.stride.s32
    17, // llvm.nvvm.wmma.m8n32k16.load.a.col.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.a.col.s8
    17, // llvm.nvvm.wmma.m8n32k16.load.a.col.stride.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.a.col.stride.s8
    17, // llvm.nvvm.wmma.m8n32k16.load.a.col.stride.u8
    17, // llvm.nvvm.wmma.m8n32k16.load.a.col.u8
    17, // llvm.nvvm.wmma.m8n32k16.load.a.row.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.a.row.s8
    17, // llvm.nvvm.wmma.m8n32k16.load.a.row.stride.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.a.row.stride.s8
    17, // llvm.nvvm.wmma.m8n32k16.load.a.row.stride.u8
    17, // llvm.nvvm.wmma.m8n32k16.load.a.row.u8
    17, // llvm.nvvm.wmma.m8n32k16.load.b.col.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.b.col.s8
    17, // llvm.nvvm.wmma.m8n32k16.load.b.col.stride.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.b.col.stride.s8
    17, // llvm.nvvm.wmma.m8n32k16.load.b.col.stride.u8
    17, // llvm.nvvm.wmma.m8n32k16.load.b.col.u8
    17, // llvm.nvvm.wmma.m8n32k16.load.b.row.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.b.row.s8
    17, // llvm.nvvm.wmma.m8n32k16.load.b.row.stride.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.b.row.stride.s8
    17, // llvm.nvvm.wmma.m8n32k16.load.b.row.stride.u8
    17, // llvm.nvvm.wmma.m8n32k16.load.b.row.u8
    17, // llvm.nvvm.wmma.m8n32k16.load.c.col.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.c.col.f32
    17, // llvm.nvvm.wmma.m8n32k16.load.c.col.s32
    17, // llvm.nvvm.wmma.m8n32k16.load.c.col.stride.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.c.col.stride.f32
    17, // llvm.nvvm.wmma.m8n32k16.load.c.col.stride.s32
    17, // llvm.nvvm.wmma.m8n32k16.load.c.row.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.c.row.f32
    17, // llvm.nvvm.wmma.m8n32k16.load.c.row.s32
    17, // llvm.nvvm.wmma.m8n32k16.load.c.row.stride.f16
    17, // llvm.nvvm.wmma.m8n32k16.load.c.row.stride.f32
    17, // llvm.nvvm.wmma.m8n32k16.load.c.row.stride.s32
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f16.f16
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f16.f32
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f32.f16
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f32.f32
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.s8
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.s8.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.u8
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.col.u8.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f16.f16
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f16.f32
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f32.f16
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f32.f32
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.s8
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.s8.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.u8
    2, // llvm.nvvm.wmma.m8n32k16.mma.col.row.u8.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f16.f16
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f16.f32
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f32.f16
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f32.f32
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.s8
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.s8.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.u8
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.col.u8.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f16.f16
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f16.f16.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f16.f32
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f16.f32.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f32.f16
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f32.f16.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f32.f32
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f32.f32.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.s8
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.s8.satfinite
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.u8
    2, // llvm.nvvm.wmma.m8n32k16.mma.row.row.u8.satfinite
    64, // llvm.nvvm.wmma.m8n32k16.store.d.col.f16
    64, // llvm.nvvm.wmma.m8n32k16.store.d.col.f32
    64, // llvm.nvvm.wmma.m8n32k16.store.d.col.s32
    64, // llvm.nvvm.wmma.m8n32k16.store.d.col.stride.f16
    64, // llvm.nvvm.wmma.m8n32k16.store.d.col.stride.f32
    64, // llvm.nvvm.wmma.m8n32k16.store.d.col.stride.s32
    64, // llvm.nvvm.wmma.m8n32k16.store.d.row.f16
    64, // llvm.nvvm.wmma.m8n32k16.store.d.row.f32
    64, // llvm.nvvm.wmma.m8n32k16.store.d.row.s32
    64, // llvm.nvvm.wmma.m8n32k16.store.d.row.stride.f16
    64, // llvm.nvvm.wmma.m8n32k16.store.d.row.stride.f32
    64, // llvm.nvvm.wmma.m8n32k16.store.d.row.stride.s32
    17, // llvm.nvvm.wmma.m8n8k128.load.a.row.b1
    17, // llvm.nvvm.wmma.m8n8k128.load.a.row.stride.b1
    17, // llvm.nvvm.wmma.m8n8k128.load.b.col.b1
    17, // llvm.nvvm.wmma.m8n8k128.load.b.col.stride.b1
    17, // llvm.nvvm.wmma.m8n8k128.load.c.col.s32
    17, // llvm.nvvm.wmma.m8n8k128.load.c.col.stride.s32
    17, // llvm.nvvm.wmma.m8n8k128.load.c.row.s32
    17, // llvm.nvvm.wmma.m8n8k128.load.c.row.stride.s32
    2, // llvm.nvvm.wmma.m8n8k128.mma.row.col.b1
    64, // llvm.nvvm.wmma.m8n8k128.store.d.col.s32
    64, // llvm.nvvm.wmma.m8n8k128.store.d.col.stride.s32
    64, // llvm.nvvm.wmma.m8n8k128.store.d.row.s32
    64, // llvm.nvvm.wmma.m8n8k128.store.d.row.stride.s32
    17, // llvm.nvvm.wmma.m8n8k32.load.a.row.s4
    17, // llvm.nvvm.wmma.m8n8k32.load.a.row.stride.s4
    17, // llvm.nvvm.wmma.m8n8k32.load.a.row.stride.u4
    17, // llvm.nvvm.wmma.m8n8k32.load.a.row.u4
    17, // llvm.nvvm.wmma.m8n8k32.load.b.col.s4
    17, // llvm.nvvm.wmma.m8n8k32.load.b.col.stride.s4
    17, // llvm.nvvm.wmma.m8n8k32.load.b.col.stride.u4
    17, // llvm.nvvm.wmma.m8n8k32.load.b.col.u4
    17, // llvm.nvvm.wmma.m8n8k32.load.c.col.s32
    17, // llvm.nvvm.wmma.m8n8k32.load.c.col.stride.s32
    17, // llvm.nvvm.wmma.m8n8k32.load.c.row.s32
    17, // llvm.nvvm.wmma.m8n8k32.load.c.row.stride.s32
    2, // llvm.nvvm.wmma.m8n8k32.mma.row.col.s4
    2, // llvm.nvvm.wmma.m8n8k32.mma.row.col.s4.satfinite
    2, // llvm.nvvm.wmma.m8n8k32.mma.row.col.u4
    2, // llvm.nvvm.wmma.m8n8k32.mma.row.col.u4.satfinite
    64, // llvm.nvvm.wmma.m8n8k32.store.d.col.s32
    64, // llvm.nvvm.wmma.m8n8k32.store.d.col.stride.s32
    64, // llvm.nvvm.wmma.m8n8k32.store.d.row.s32
    64, // llvm.nvvm.wmma.m8n8k32.store.d.row.stride.s32
    2, // llvm.ppc.addf128.round.to.odd
    2, // llvm.ppc.altivec.crypto.vcipher
    2, // llvm.ppc.altivec.crypto.vcipherlast
    2, // llvm.ppc.altivec.crypto.vncipher
    2, // llvm.ppc.altivec.crypto.vncipherlast
    2, // llvm.ppc.altivec.crypto.vpermxor
    2, // llvm.ppc.altivec.crypto.vpmsumb
    2, // llvm.ppc.altivec.crypto.vpmsumd
    2, // llvm.ppc.altivec.crypto.vpmsumh
    2, // llvm.ppc.altivec.crypto.vpmsumw
    2, // llvm.ppc.altivec.crypto.vsbox
    51, // llvm.ppc.altivec.crypto.vshasigmad
    51, // llvm.ppc.altivec.crypto.vshasigmaw
    7, // llvm.ppc.altivec.dss
    7, // llvm.ppc.altivec.dssall
    7, // llvm.ppc.altivec.dst
    7, // llvm.ppc.altivec.dstst
    7, // llvm.ppc.altivec.dststt
    7, // llvm.ppc.altivec.dstt
    3, // llvm.ppc.altivec.lvebx
    3, // llvm.ppc.altivec.lvehx
    3, // llvm.ppc.altivec.lvewx
    2, // llvm.ppc.altivec.lvsl
    2, // llvm.ppc.altivec.lvsr
    3, // llvm.ppc.altivec.lvx
    3, // llvm.ppc.altivec.lvxl
    21, // llvm.ppc.altivec.mfvscr
    7, // llvm.ppc.altivec.mtvscr
    2, // llvm.ppc.altivec.mtvsrbm
    2, // llvm.ppc.altivec.mtvsrdm
    2, // llvm.ppc.altivec.mtvsrhm
    2, // llvm.ppc.altivec.mtvsrqm
    2, // llvm.ppc.altivec.mtvsrwm
    72, // llvm.ppc.altivec.stvebx
    72, // llvm.ppc.altivec.stvehx
    72, // llvm.ppc.altivec.stvewx
    72, // llvm.ppc.altivec.stvx
    72, // llvm.ppc.altivec.stvxl
    2, // llvm.ppc.altivec.vabsdub
    2, // llvm.ppc.altivec.vabsduh
    2, // llvm.ppc.altivec.vabsduw
    2, // llvm.ppc.altivec.vaddcuq
    2, // llvm.ppc.altivec.vaddcuw
    2, // llvm.ppc.altivec.vaddecuq
    2, // llvm.ppc.altivec.vaddeuqm
    2, // llvm.ppc.altivec.vaddsbs
    2, // llvm.ppc.altivec.vaddshs
    2, // llvm.ppc.altivec.vaddsws
    2, // llvm.ppc.altivec.vaddubs
    2, // llvm.ppc.altivec.vadduhs
    2, // llvm.ppc.altivec.vadduws
    2, // llvm.ppc.altivec.vavgsb
    2, // llvm.ppc.altivec.vavgsh
    2, // llvm.ppc.altivec.vavgsw
    2, // llvm.ppc.altivec.vavgub
    2, // llvm.ppc.altivec.vavguh
    2, // llvm.ppc.altivec.vavguw
    2, // llvm.ppc.altivec.vbpermq
    52, // llvm.ppc.altivec.vcfsx
    2, // llvm.ppc.altivec.vcfuged
    52, // llvm.ppc.altivec.vcfux
    2, // llvm.ppc.altivec.vclrlb
    2, // llvm.ppc.altivec.vclrrb
    2, // llvm.ppc.altivec.vclzdm
    2, // llvm.ppc.altivec.vclzlsbb
    2, // llvm.ppc.altivec.vcmpbfp
    2, // llvm.ppc.altivec.vcmpbfp.p
    2, // llvm.ppc.altivec.vcmpeqfp
    2, // llvm.ppc.altivec.vcmpeqfp.p
    2, // llvm.ppc.altivec.vcmpequb
    2, // llvm.ppc.altivec.vcmpequb.p
    2, // llvm.ppc.altivec.vcmpequd
    2, // llvm.ppc.altivec.vcmpequd.p
    2, // llvm.ppc.altivec.vcmpequh
    2, // llvm.ppc.altivec.vcmpequh.p
    2, // llvm.ppc.altivec.vcmpequq
    2, // llvm.ppc.altivec.vcmpequq.p
    2, // llvm.ppc.altivec.vcmpequw
    2, // llvm.ppc.altivec.vcmpequw.p
    2, // llvm.ppc.altivec.vcmpgefp
    2, // llvm.ppc.altivec.vcmpgefp.p
    2, // llvm.ppc.altivec.vcmpgtfp
    2, // llvm.ppc.altivec.vcmpgtfp.p
    2, // llvm.ppc.altivec.vcmpgtsb
    2, // llvm.ppc.altivec.vcmpgtsb.p
    2, // llvm.ppc.altivec.vcmpgtsd
    2, // llvm.ppc.altivec.vcmpgtsd.p
    2, // llvm.ppc.altivec.vcmpgtsh
    2, // llvm.ppc.altivec.vcmpgtsh.p
    2, // llvm.ppc.altivec.vcmpgtsq
    2, // llvm.ppc.altivec.vcmpgtsq.p
    2, // llvm.ppc.altivec.vcmpgtsw
    2, // llvm.ppc.altivec.vcmpgtsw.p
    2, // llvm.ppc.altivec.vcmpgtub
    2, // llvm.ppc.altivec.vcmpgtub.p
    2, // llvm.ppc.altivec.vcmpgtud
    2, // llvm.ppc.altivec.vcmpgtud.p
    2, // llvm.ppc.altivec.vcmpgtuh
    2, // llvm.ppc.altivec.vcmpgtuh.p
    2, // llvm.ppc.altivec.vcmpgtuq
    2, // llvm.ppc.altivec.vcmpgtuq.p
    2, // llvm.ppc.altivec.vcmpgtuw
    2, // llvm.ppc.altivec.vcmpgtuw.p
    2, // llvm.ppc.altivec.vcmpneb
    2, // llvm.ppc.altivec.vcmpneb.p
    2, // llvm.ppc.altivec.vcmpneh
    2, // llvm.ppc.altivec.vcmpneh.p
    2, // llvm.ppc.altivec.vcmpnew
    2, // llvm.ppc.altivec.vcmpnew.p
    2, // llvm.ppc.altivec.vcmpnezb
    2, // llvm.ppc.altivec.vcmpnezb.p
    2, // llvm.ppc.altivec.vcmpnezh
    2, // llvm.ppc.altivec.vcmpnezh.p
    2, // llvm.ppc.altivec.vcmpnezw
    2, // llvm.ppc.altivec.vcmpnezw.p
    52, // llvm.ppc.altivec.vcntmbb
    52, // llvm.ppc.altivec.vcntmbd
    52, // llvm.ppc.altivec.vcntmbh
    52, // llvm.ppc.altivec.vcntmbw
    52, // llvm.ppc.altivec.vctsxs
    52, // llvm.ppc.altivec.vctuxs
    2, // llvm.ppc.altivec.vctzdm
    2, // llvm.ppc.altivec.vctzlsbb
    2, // llvm.ppc.altivec.vdivesd
    2, // llvm.ppc.altivec.vdivesq
    2, // llvm.ppc.altivec.vdivesw
    2, // llvm.ppc.altivec.vdiveud
    2, // llvm.ppc.altivec.vdiveuq
    2, // llvm.ppc.altivec.vdiveuw
    2, // llvm.ppc.altivec.vexpandbm
    2, // llvm.ppc.altivec.vexpanddm
    2, // llvm.ppc.altivec.vexpandhm
    2, // llvm.ppc.altivec.vexpandqm
    2, // llvm.ppc.altivec.vexpandwm
    2, // llvm.ppc.altivec.vexptefp
    2, // llvm.ppc.altivec.vextddvlx
    2, // llvm.ppc.altivec.vextddvrx
    2, // llvm.ppc.altivec.vextdubvlx
    2, // llvm.ppc.altivec.vextdubvrx
    2, // llvm.ppc.altivec.vextduhvlx
    2, // llvm.ppc.altivec.vextduhvrx
    2, // llvm.ppc.altivec.vextduwvlx
    2, // llvm.ppc.altivec.vextduwvrx
    2, // llvm.ppc.altivec.vextractbm
    2, // llvm.ppc.altivec.vextractdm
    2, // llvm.ppc.altivec.vextracthm
    2, // llvm.ppc.altivec.vextractqm
    2, // llvm.ppc.altivec.vextractwm
    2, // llvm.ppc.altivec.vextsb2d
    2, // llvm.ppc.altivec.vextsb2w
    2, // llvm.ppc.altivec.vextsd2q
    2, // llvm.ppc.altivec.vextsh2d
    2, // llvm.ppc.altivec.vextsh2w
    2, // llvm.ppc.altivec.vextsw2d
    2, // llvm.ppc.altivec.vgbbd
    52, // llvm.ppc.altivec.vgnb
    2, // llvm.ppc.altivec.vinsblx
    2, // llvm.ppc.altivec.vinsbrx
    2, // llvm.ppc.altivec.vinsbvlx
    2, // llvm.ppc.altivec.vinsbvrx
    32, // llvm.ppc.altivec.vinsd
    2, // llvm.ppc.altivec.vinsdlx
    2, // llvm.ppc.altivec.vinsdrx
    2, // llvm.ppc.altivec.vinshlx
    2, // llvm.ppc.altivec.vinshrx
    2, // llvm.ppc.altivec.vinshvlx
    2, // llvm.ppc.altivec.vinshvrx
    32, // llvm.ppc.altivec.vinsw
    2, // llvm.ppc.altivec.vinswlx
    2, // llvm.ppc.altivec.vinswrx
    2, // llvm.ppc.altivec.vinswvlx
    2, // llvm.ppc.altivec.vinswvrx
    2, // llvm.ppc.altivec.vlogefp
    2, // llvm.ppc.altivec.vmaddfp
    2, // llvm.ppc.altivec.vmaxfp
    2, // llvm.ppc.altivec.vmaxsb
    2, // llvm.ppc.altivec.vmaxsd
    2, // llvm.ppc.altivec.vmaxsh
    2, // llvm.ppc.altivec.vmaxsw
    2, // llvm.ppc.altivec.vmaxub
    2, // llvm.ppc.altivec.vmaxud
    2, // llvm.ppc.altivec.vmaxuh
    2, // llvm.ppc.altivec.vmaxuw
    2, // llvm.ppc.altivec.vmhaddshs
    2, // llvm.ppc.altivec.vmhraddshs
    2, // llvm.ppc.altivec.vminfp
    2, // llvm.ppc.altivec.vminsb
    2, // llvm.ppc.altivec.vminsd
    2, // llvm.ppc.altivec.vminsh
    2, // llvm.ppc.altivec.vminsw
    2, // llvm.ppc.altivec.vminub
    2, // llvm.ppc.altivec.vminud
    2, // llvm.ppc.altivec.vminuh
    2, // llvm.ppc.altivec.vminuw
    2, // llvm.ppc.altivec.vmladduhm
    2, // llvm.ppc.altivec.vmsumcud
    2, // llvm.ppc.altivec.vmsummbm
    2, // llvm.ppc.altivec.vmsumshm
    2, // llvm.ppc.altivec.vmsumshs
    2, // llvm.ppc.altivec.vmsumubm
    2, // llvm.ppc.altivec.vmsumudm
    2, // llvm.ppc.altivec.vmsumuhm
    2, // llvm.ppc.altivec.vmsumuhs
    2, // llvm.ppc.altivec.vmulesb
    2, // llvm.ppc.altivec.vmulesd
    2, // llvm.ppc.altivec.vmulesh
    2, // llvm.ppc.altivec.vmulesw
    2, // llvm.ppc.altivec.vmuleub
    2, // llvm.ppc.altivec.vmuleud
    2, // llvm.ppc.altivec.vmuleuh
    2, // llvm.ppc.altivec.vmuleuw
    2, // llvm.ppc.altivec.vmulhsd
    2, // llvm.ppc.altivec.vmulhsw
    2, // llvm.ppc.altivec.vmulhud
    2, // llvm.ppc.altivec.vmulhuw
    2, // llvm.ppc.altivec.vmulosb
    2, // llvm.ppc.altivec.vmulosd
    2, // llvm.ppc.altivec.vmulosh
    2, // llvm.ppc.altivec.vmulosw
    2, // llvm.ppc.altivec.vmuloub
    2, // llvm.ppc.altivec.vmuloud
    2, // llvm.ppc.altivec.vmulouh
    2, // llvm.ppc.altivec.vmulouw
    2, // llvm.ppc.altivec.vnmsubfp
    2, // llvm.ppc.altivec.vpdepd
    2, // llvm.ppc.altivec.vperm
    2, // llvm.ppc.altivec.vpextd
    2, // llvm.ppc.altivec.vpkpx
    2, // llvm.ppc.altivec.vpksdss
    2, // llvm.ppc.altivec.vpksdus
    2, // llvm.ppc.altivec.vpkshss
    2, // llvm.ppc.altivec.vpkshus
    2, // llvm.ppc.altivec.vpkswss
    2, // llvm.ppc.altivec.vpkswus
    2, // llvm.ppc.altivec.vpkudus
    2, // llvm.ppc.altivec.vpkuhus
    2, // llvm.ppc.altivec.vpkuwus
    2, // llvm.ppc.altivec.vprtybd
    2, // llvm.ppc.altivec.vprtybq
    2, // llvm.ppc.altivec.vprtybw
    2, // llvm.ppc.altivec.vrefp
    2, // llvm.ppc.altivec.vrfim
    2, // llvm.ppc.altivec.vrfin
    2, // llvm.ppc.altivec.vrfip
    2, // llvm.ppc.altivec.vrfiz
    2, // llvm.ppc.altivec.vrlb
    2, // llvm.ppc.altivec.vrld
    2, // llvm.ppc.altivec.vrldmi
    2, // llvm.ppc.altivec.vrldnm
    2, // llvm.ppc.altivec.vrlh
    2, // llvm.ppc.altivec.vrlqmi
    2, // llvm.ppc.altivec.vrlqnm
    2, // llvm.ppc.altivec.vrlw
    2, // llvm.ppc.altivec.vrlwmi
    2, // llvm.ppc.altivec.vrlwnm
    2, // llvm.ppc.altivec.vrsqrtefp
    2, // llvm.ppc.altivec.vsel
    2, // llvm.ppc.altivec.vsl
    2, // llvm.ppc.altivec.vslb
    32, // llvm.ppc.altivec.vsldbi
    2, // llvm.ppc.altivec.vslh
    2, // llvm.ppc.altivec.vslo
    2, // llvm.ppc.altivec.vslv
    2, // llvm.ppc.altivec.vslw
    2, // llvm.ppc.altivec.vsr
    2, // llvm.ppc.altivec.vsrab
    2, // llvm.ppc.altivec.vsrah
    2, // llvm.ppc.altivec.vsraw
    2, // llvm.ppc.altivec.vsrb
    32, // llvm.ppc.altivec.vsrdbi
    2, // llvm.ppc.altivec.vsrh
    2, // llvm.ppc.altivec.vsro
    2, // llvm.ppc.altivec.vsrv
    2, // llvm.ppc.altivec.vsrw
    2, // llvm.ppc.altivec.vstribl
    2, // llvm.ppc.altivec.vstribl.p
    2, // llvm.ppc.altivec.vstribr
    2, // llvm.ppc.altivec.vstribr.p
    2, // llvm.ppc.altivec.vstrihl
    2, // llvm.ppc.altivec.vstrihl.p
    2, // llvm.ppc.altivec.vstrihr
    2, // llvm.ppc.altivec.vstrihr.p
    2, // llvm.ppc.altivec.vsubcuq
    2, // llvm.ppc.altivec.vsubcuw
    2, // llvm.ppc.altivec.vsubecuq
    2, // llvm.ppc.altivec.vsubeuqm
    2, // llvm.ppc.altivec.vsubsbs
    2, // llvm.ppc.altivec.vsubshs
    2, // llvm.ppc.altivec.vsubsws
    2, // llvm.ppc.altivec.vsububs
    2, // llvm.ppc.altivec.vsubuhs
    2, // llvm.ppc.altivec.vsubuws
    2, // llvm.ppc.altivec.vsum2sws
    2, // llvm.ppc.altivec.vsum4sbs
    2, // llvm.ppc.altivec.vsum4shs
    2, // llvm.ppc.altivec.vsum4ubs
    2, // llvm.ppc.altivec.vsumsws
    2, // llvm.ppc.altivec.vupkhpx
    2, // llvm.ppc.altivec.vupkhsb
    2, // llvm.ppc.altivec.vupkhsh
    2, // llvm.ppc.altivec.vupkhsw
    2, // llvm.ppc.altivec.vupklpx
    2, // llvm.ppc.altivec.vupklsb
    2, // llvm.ppc.altivec.vupklsh
    2, // llvm.ppc.altivec.vupklsw
    2, // llvm.ppc.bpermd
    7, // llvm.ppc.cfence
    2, // llvm.ppc.cfuged
    2, // llvm.ppc.cntlzdm
    2, // llvm.ppc.cnttzdm
    7, // llvm.ppc.dcba
    7, // llvm.ppc.dcbf
    7, // llvm.ppc.dcbfl
    7, // llvm.ppc.dcbflp
    7, // llvm.ppc.dcbi
    7, // llvm.ppc.dcbst
    28, // llvm.ppc.dcbt
    178, // llvm.ppc.dcbt.with.hint
    28, // llvm.ppc.dcbtst
    178, // llvm.ppc.dcbtst.with.hint
    7, // llvm.ppc.dcbz
    7, // llvm.ppc.dcbzl
    2, // llvm.ppc.divde
    2, // llvm.ppc.divdeu
    2, // llvm.ppc.divf128.round.to.odd
    2, // llvm.ppc.divwe
    2, // llvm.ppc.divweu
    7, // llvm.ppc.eieio
    2, // llvm.ppc.fmaf128.round.to.odd
    7, // llvm.ppc.get.texasr
    7, // llvm.ppc.get.texasru
    7, // llvm.ppc.get.tfhar
    7, // llvm.ppc.get.tfiar
    7, // llvm.ppc.isync
    7, // llvm.ppc.lwsync
    2, // llvm.ppc.mma.assemble.acc
    2, // llvm.ppc.mma.assemble.pair
    2, // llvm.ppc.mma.disassemble.acc
    2, // llvm.ppc.mma.disassemble.pair
    2, // llvm.ppc.mma.xxmfacc
    2, // llvm.ppc.mma.xxmtacc
    2, // llvm.ppc.mma.xxsetaccz
    2, // llvm.ppc.mulf128.round.to.odd
    2, // llvm.ppc.pdepd
    2, // llvm.ppc.pextd
    2, // llvm.ppc.popcntb
    2, // llvm.ppc.readflm
    2, // llvm.ppc.scalar.extract.expq
    2, // llvm.ppc.scalar.insert.exp.qp
    7, // llvm.ppc.set.texasr
    7, // llvm.ppc.set.texasru
    7, // llvm.ppc.set.tfhar
    7, // llvm.ppc.set.tfiar
    7, // llvm.ppc.setflm
    7, // llvm.ppc.setrnd
    2, // llvm.ppc.sqrtf128.round.to.odd
    2, // llvm.ppc.subf128.round.to.odd
    7, // llvm.ppc.sync
    7, // llvm.ppc.tabort
    7, // llvm.ppc.tabortdc
    7, // llvm.ppc.tabortdci
    7, // llvm.ppc.tabortwc
    7, // llvm.ppc.tabortwci
    75, // llvm.ppc.tbegin
    7, // llvm.ppc.tcheck
    75, // llvm.ppc.tend
    7, // llvm.ppc.tendall
    7, // llvm.ppc.trechkpt
    7, // llvm.ppc.treclaim
    7, // llvm.ppc.tresume
    2, // llvm.ppc.truncf128.round.to.odd
    7, // llvm.ppc.tsr
    7, // llvm.ppc.tsuspend
    7, // llvm.ppc.ttest
    3, // llvm.ppc.vsx.lxvd2x
    3, // llvm.ppc.vsx.lxvd2x.be
    3, // llvm.ppc.vsx.lxvl
    3, // llvm.ppc.vsx.lxvll
    3, // llvm.ppc.vsx.lxvw4x
    3, // llvm.ppc.vsx.lxvw4x.be
    72, // llvm.ppc.vsx.stxvd2x
    72, // llvm.ppc.vsx.stxvd2x.be
    72, // llvm.ppc.vsx.stxvl
    72, // llvm.ppc.vsx.stxvll
    72, // llvm.ppc.vsx.stxvw4x
    72, // llvm.ppc.vsx.stxvw4x.be
    2, // llvm.ppc.vsx.xsmaxdp
    2, // llvm.ppc.vsx.xsmindp
    2, // llvm.ppc.vsx.xvcmpeqdp
    2, // llvm.ppc.vsx.xvcmpeqdp.p
    2, // llvm.ppc.vsx.xvcmpeqsp
    2, // llvm.ppc.vsx.xvcmpeqsp.p
    2, // llvm.ppc.vsx.xvcmpgedp
    2, // llvm.ppc.vsx.xvcmpgedp.p
    2, // llvm.ppc.vsx.xvcmpgesp
    2, // llvm.ppc.vsx.xvcmpgesp.p
    2, // llvm.ppc.vsx.xvcmpgtdp
    2, // llvm.ppc.vsx.xvcmpgtdp.p
    2, // llvm.ppc.vsx.xvcmpgtsp
    2, // llvm.ppc.vsx.xvcmpgtsp.p
    2, // llvm.ppc.vsx.xvcvbf16spn
    2, // llvm.ppc.vsx.xvcvdpsp
    2, // llvm.ppc.vsx.xvcvdpsxws
    2, // llvm.ppc.vsx.xvcvdpuxws
    2, // llvm.ppc.vsx.xvcvhpsp
    2, // llvm.ppc.vsx.xvcvspbf16
    2, // llvm.ppc.vsx.xvcvspdp
    2, // llvm.ppc.vsx.xvcvsphp
    2, // llvm.ppc.vsx.xvcvsxdsp
    2, // llvm.ppc.vsx.xvcvsxwdp
    2, // llvm.ppc.vsx.xvcvuxdsp
    2, // llvm.ppc.vsx.xvcvuxwdp
    2, // llvm.ppc.vsx.xvdivdp
    2, // llvm.ppc.vsx.xvdivsp
    2, // llvm.ppc.vsx.xviexpdp
    2, // llvm.ppc.vsx.xviexpsp
    2, // llvm.ppc.vsx.xvmaxdp
    2, // llvm.ppc.vsx.xvmaxsp
    2, // llvm.ppc.vsx.xvmindp
    2, // llvm.ppc.vsx.xvminsp
    2, // llvm.ppc.vsx.xvrdpip
    2, // llvm.ppc.vsx.xvredp
    2, // llvm.ppc.vsx.xvresp
    2, // llvm.ppc.vsx.xvrspip
    2, // llvm.ppc.vsx.xvrsqrtedp
    2, // llvm.ppc.vsx.xvrsqrtesp
    2, // llvm.ppc.vsx.xvtdivdp
    2, // llvm.ppc.vsx.xvtdivsp
    2, // llvm.ppc.vsx.xvtlsbb
    2, // llvm.ppc.vsx.xvtsqrtdp
    2, // llvm.ppc.vsx.xvtsqrtsp
    52, // llvm.ppc.vsx.xvtstdcdp
    52, // llvm.ppc.vsx.xvtstdcsp
    2, // llvm.ppc.vsx.xvxexpdp
    2, // llvm.ppc.vsx.xvxexpsp
    2, // llvm.ppc.vsx.xvxsigdp
    2, // llvm.ppc.vsx.xvxsigsp
    2, // llvm.ppc.vsx.xxblendvb
    2, // llvm.ppc.vsx.xxblendvd
    2, // llvm.ppc.vsx.xxblendvh
    2, // llvm.ppc.vsx.xxblendvw
    66, // llvm.ppc.vsx.xxeval
    2, // llvm.ppc.vsx.xxextractuw
    2, // llvm.ppc.vsx.xxgenpcvbm
    2, // llvm.ppc.vsx.xxgenpcvdm
    2, // llvm.ppc.vsx.xxgenpcvhm
    2, // llvm.ppc.vsx.xxgenpcvwm
    2, // llvm.ppc.vsx.xxinsertw
    2, // llvm.ppc.vsx.xxleqv
    66, // llvm.ppc.vsx.xxpermx
    6, // llvm.r600.cube
    9, // llvm.r600.ddx
    9, // llvm.r600.ddy
    6, // llvm.r600.dot4
    89, // llvm.r600.group.barrier
    6, // llvm.r600.implicitarg.ptr
    4, // llvm.r600.kill
    4, // llvm.r600.rat.store.typed
    6, // llvm.r600.read.global.size.x
    6, // llvm.r600.read.global.size.y
    6, // llvm.r600.read.global.size.z
    6, // llvm.r600.read.local.size.x
    6, // llvm.r600.read.local.size.y
    6, // llvm.r600.read.local.size.z
    6, // llvm.r600.read.ngroups.x
    6, // llvm.r600.read.ngroups.y
    6, // llvm.r600.read.ngroups.z
    6, // llvm.r600.read.tgid.x
    6, // llvm.r600.read.tgid.y
    6, // llvm.r600.read.tgid.z
    6, // llvm.r600.read.tidig.x
    6, // llvm.r600.read.tidig.y
    6, // llvm.r600.read.tidig.z
    6, // llvm.r600.recipsqrt.clamped
    6, // llvm.r600.recipsqrt.ieee
    4, // llvm.r600.store.stream.output
    4, // llvm.r600.store.swizzle
    9, // llvm.r600.tex
    9, // llvm.r600.texc
    9, // llvm.r600.txb
    9, // llvm.r600.txbc
    9, // llvm.r600.txf
    9, // llvm.r600.txl
    9, // llvm.r600.txlc
    9, // llvm.r600.txq
    179, // llvm.riscv.masked.atomicrmw.add.i32
    179, // llvm.riscv.masked.atomicrmw.add.i64
    180, // llvm.riscv.masked.atomicrmw.max.i32
    180, // llvm.riscv.masked.atomicrmw.max.i64
    180, // llvm.riscv.masked.atomicrmw.min.i32
    180, // llvm.riscv.masked.atomicrmw.min.i64
    179, // llvm.riscv.masked.atomicrmw.nand.i32
    179, // llvm.riscv.masked.atomicrmw.nand.i64
    179, // llvm.riscv.masked.atomicrmw.sub.i32
    179, // llvm.riscv.masked.atomicrmw.sub.i64
    179, // llvm.riscv.masked.atomicrmw.umax.i32
    179, // llvm.riscv.masked.atomicrmw.umax.i64
    179, // llvm.riscv.masked.atomicrmw.umin.i32
    179, // llvm.riscv.masked.atomicrmw.umin.i64
    179, // llvm.riscv.masked.atomicrmw.xchg.i32
    179, // llvm.riscv.masked.atomicrmw.xchg.i64
    180, // llvm.riscv.masked.cmpxchg.i32
    180, // llvm.riscv.masked.cmpxchg.i64
    7, // llvm.s390.efpc
    2, // llvm.s390.etnd
    52, // llvm.s390.lcbb
    72, // llvm.s390.ntstg
    7, // llvm.s390.ppa.txassist
    7, // llvm.s390.sfpc
    181, // llvm.s390.tabort
    182, // llvm.s390.tbegin
    182, // llvm.s390.tbegin.nofloat
    182, // llvm.s390.tbeginc
    2, // llvm.s390.tdc
    7, // llvm.s390.tend
    2, // llvm.s390.vaccb
    2, // llvm.s390.vacccq
    2, // llvm.s390.vaccf
    2, // llvm.s390.vaccg
    2, // llvm.s390.vacch
    2, // llvm.s390.vaccq
    2, // llvm.s390.vacq
    2, // llvm.s390.vaq
    2, // llvm.s390.vavgb
    2, // llvm.s390.vavgf
    2, // llvm.s390.vavgg
    2, // llvm.s390.vavgh
    2, // llvm.s390.vavglb
    2, // llvm.s390.vavglf
    2, // llvm.s390.vavglg
    2, // llvm.s390.vavglh
    2, // llvm.s390.vbperm
    2, // llvm.s390.vceqbs
    2, // llvm.s390.vceqfs
    2, // llvm.s390.vceqgs
    2, // llvm.s390.vceqhs
    2, // llvm.s390.vchbs
    2, // llvm.s390.vchfs
    2, // llvm.s390.vchgs
    2, // llvm.s390.vchhs
    2, // llvm.s390.vchlbs
    2, // llvm.s390.vchlfs
    2, // llvm.s390.vchlgs
    2, // llvm.s390.vchlhs
    2, // llvm.s390.vcksm
    66, // llvm.s390.verimb
    66, // llvm.s390.verimf
    66, // llvm.s390.verimg
    66, // llvm.s390.verimh
    2, // llvm.s390.verllb
    2, // llvm.s390.verllf
    2, // llvm.s390.verllg
    2, // llvm.s390.verllh
    2, // llvm.s390.verllvb
    2, // llvm.s390.verllvf
    2, // llvm.s390.verllvg
    2, // llvm.s390.verllvh
    32, // llvm.s390.vfaeb
    32, // llvm.s390.vfaebs
    32, // llvm.s390.vfaef
    32, // llvm.s390.vfaefs
    32, // llvm.s390.vfaeh
    32, // llvm.s390.vfaehs
    32, // llvm.s390.vfaezb
    32, // llvm.s390.vfaezbs
    32, // llvm.s390.vfaezf
    32, // llvm.s390.vfaezfs
    32, // llvm.s390.vfaezh
    32, // llvm.s390.vfaezhs
    2, // llvm.s390.vfcedbs
    2, // llvm.s390.vfcesbs
    2, // llvm.s390.vfchdbs
    2, // llvm.s390.vfchedbs
    2, // llvm.s390.vfchesbs
    2, // llvm.s390.vfchsbs
    2, // llvm.s390.vfeeb
    2, // llvm.s390.vfeebs
    2, // llvm.s390.vfeef
    2, // llvm.s390.vfeefs
    2, // llvm.s390.vfeeh
    2, // llvm.s390.vfeehs
    2, // llvm.s390.vfeezb
    2, // llvm.s390.vfeezbs
    2, // llvm.s390.vfeezf
    2, // llvm.s390.vfeezfs
    2, // llvm.s390.vfeezh
    2, // llvm.s390.vfeezhs
    2, // llvm.s390.vfeneb
    2, // llvm.s390.vfenebs
    2, // llvm.s390.vfenef
    2, // llvm.s390.vfenefs
    2, // llvm.s390.vfeneh
    2, // llvm.s390.vfenehs
    2, // llvm.s390.vfenezb
    2, // llvm.s390.vfenezbs
    2, // llvm.s390.vfenezf
    2, // llvm.s390.vfenezfs
    2, // llvm.s390.vfenezh
    2, // llvm.s390.vfenezhs
    51, // llvm.s390.vfidb
    51, // llvm.s390.vfisb
    32, // llvm.s390.vfmaxdb
    32, // llvm.s390.vfmaxsb
    32, // llvm.s390.vfmindb
    32, // llvm.s390.vfminsb
    52, // llvm.s390.vftcidb
    52, // llvm.s390.vftcisb
    2, // llvm.s390.vgfmab
    2, // llvm.s390.vgfmaf
    2, // llvm.s390.vgfmag
    2, // llvm.s390.vgfmah
    2, // llvm.s390.vgfmb
    2, // llvm.s390.vgfmf
    2, // llvm.s390.vgfmg
    2, // llvm.s390.vgfmh
    2, // llvm.s390.vistrb
    2, // llvm.s390.vistrbs
    2, // llvm.s390.vistrf
    2, // llvm.s390.vistrfs
    2, // llvm.s390.vistrh
    2, // llvm.s390.vistrhs
    73, // llvm.s390.vlbb
    3, // llvm.s390.vll
    3, // llvm.s390.vlrl
    2, // llvm.s390.vmaeb
    2, // llvm.s390.vmaef
    2, // llvm.s390.vmaeh
    2, // llvm.s390.vmahb
    2, // llvm.s390.vmahf
    2, // llvm.s390.vmahh
    2, // llvm.s390.vmaleb
    2, // llvm.s390.vmalef
    2, // llvm.s390.vmaleh
    2, // llvm.s390.vmalhb
    2, // llvm.s390.vmalhf
    2, // llvm.s390.vmalhh
    2, // llvm.s390.vmalob
    2, // llvm.s390.vmalof
    2, // llvm.s390.vmaloh
    2, // llvm.s390.vmaob
    2, // llvm.s390.vmaof
    2, // llvm.s390.vmaoh
    2, // llvm.s390.vmeb
    2, // llvm.s390.vmef
    2, // llvm.s390.vmeh
    2, // llvm.s390.vmhb
    2, // llvm.s390.vmhf
    2, // llvm.s390.vmhh
    2, // llvm.s390.vmleb
    2, // llvm.s390.vmlef
    2, // llvm.s390.vmleh
    2, // llvm.s390.vmlhb
    2, // llvm.s390.vmlhf
    2, // llvm.s390.vmlhh
    2, // llvm.s390.vmlob
    2, // llvm.s390.vmlof
    2, // llvm.s390.vmloh
    2, // llvm.s390.vmob
    2, // llvm.s390.vmof
    2, // llvm.s390.vmoh
    66, // llvm.s390.vmslg
    32, // llvm.s390.vpdi
    2, // llvm.s390.vperm
    2, // llvm.s390.vpklsf
    2, // llvm.s390.vpklsfs
    2, // llvm.s390.vpklsg
    2, // llvm.s390.vpklsgs
    2, // llvm.s390.vpklsh
    2, // llvm.s390.vpklshs
    2, // llvm.s390.vpksf
    2, // llvm.s390.vpksfs
    2, // llvm.s390.vpksg
    2, // llvm.s390.vpksgs
    2, // llvm.s390.vpksh
    2, // llvm.s390.vpkshs
    2, // llvm.s390.vsbcbiq
    2, // llvm.s390.vsbiq
    2, // llvm.s390.vscbib
    2, // llvm.s390.vscbif
    2, // llvm.s390.vscbig
    2, // llvm.s390.vscbih
    2, // llvm.s390.vscbiq
    2, // llvm.s390.vsl
    2, // llvm.s390.vslb
    32, // llvm.s390.vsld
    32, // llvm.s390.vsldb
    2, // llvm.s390.vsq
    2, // llvm.s390.vsra
    2, // llvm.s390.vsrab
    32, // llvm.s390.vsrd
    2, // llvm.s390.vsrl
    2, // llvm.s390.vsrlb
    72, // llvm.s390.vstl
    66, // llvm.s390.vstrcb
    66, // llvm.s390.vstrcbs
    66, // llvm.s390.vstrcf
    66, // llvm.s390.vstrcfs
    66, // llvm.s390.vstrch
    66, // llvm.s390.vstrchs
    66, // llvm.s390.vstrczb
    66, // llvm.s390.vstrczbs
    66, // llvm.s390.vstrczf
    66, // llvm.s390.vstrczfs
    66, // llvm.s390.vstrczh
    66, // llvm.s390.vstrczhs
    72, // llvm.s390.vstrl
    2, // llvm.s390.vstrsb
    2, // llvm.s390.vstrsf
    2, // llvm.s390.vstrsh
    2, // llvm.s390.vstrszb
    2, // llvm.s390.vstrszf
    2, // llvm.s390.vstrszh
    2, // llvm.s390.vsumb
    2, // llvm.s390.vsumgf
    2, // llvm.s390.vsumgh
    2, // llvm.s390.vsumh
    2, // llvm.s390.vsumqf
    2, // llvm.s390.vsumqg
    2, // llvm.s390.vtm
    2, // llvm.s390.vuphb
    2, // llvm.s390.vuphf
    2, // llvm.s390.vuphh
    2, // llvm.s390.vuplb
    2, // llvm.s390.vuplf
    2, // llvm.s390.vuplhb
    2, // llvm.s390.vuplhf
    2, // llvm.s390.vuplhh
    2, // llvm.s390.vuplhw
    2, // llvm.s390.vupllb
    2, // llvm.s390.vupllf
    2, // llvm.s390.vupllh
    183, // llvm.wasm.alltrue
    183, // llvm.wasm.anytrue
    184, // llvm.wasm.atomic.notify
    185, // llvm.wasm.atomic.wait.i32
    185, // llvm.wasm.atomic.wait.i64
    183, // llvm.wasm.avgr.unsigned
    183, // llvm.wasm.bitmask
    183, // llvm.wasm.bitselect
    183, // llvm.wasm.ceil
    183, // llvm.wasm.dot
    53, // llvm.wasm.extract.exception
    183, // llvm.wasm.floor
    53, // llvm.wasm.get.ehselector
    53, // llvm.wasm.get.exception
    52, // llvm.wasm.landingpad.index
    3, // llvm.wasm.load16.lane
    3, // llvm.wasm.load32.lane
    3, // llvm.wasm.load32.zero
    3, // llvm.wasm.load64.lane
    3, // llvm.wasm.load64.zero
    3, // llvm.wasm.load8.lane
    2, // llvm.wasm.lsda
    7, // llvm.wasm.memory.grow
    21, // llvm.wasm.memory.size
    183, // llvm.wasm.narrow.signed
    183, // llvm.wasm.narrow.unsigned
    183, // llvm.wasm.nearest
    183, // llvm.wasm.pmax
    183, // llvm.wasm.pmin
    183, // llvm.wasm.popcnt
    183, // llvm.wasm.q15mulr.saturate.signed
    183, // llvm.wasm.qfma
    183, // llvm.wasm.qfms
    186, // llvm.wasm.rethrow.in.catch
    183, // llvm.wasm.shuffle
    72, // llvm.wasm.store16.lane
    72, // llvm.wasm.store32.lane
    72, // llvm.wasm.store64.lane
    72, // llvm.wasm.store8.lane
    183, // llvm.wasm.sub.saturate.signed
    183, // llvm.wasm.sub.saturate.unsigned
    183, // llvm.wasm.swizzle
    187, // llvm.wasm.throw
    183, // llvm.wasm.tls.align
    21, // llvm.wasm.tls.base
    183, // llvm.wasm.tls.size
    183, // llvm.wasm.trunc
    183, // llvm.wasm.trunc.saturate.signed
    183, // llvm.wasm.trunc.saturate.unsigned
    2, // llvm.wasm.trunc.signed
    2, // llvm.wasm.trunc.unsigned
    2, // llvm.x86.3dnow.pavgusb
    2, // llvm.x86.3dnow.pf2id
    2, // llvm.x86.3dnow.pfacc
    2, // llvm.x86.3dnow.pfadd
    2, // llvm.x86.3dnow.pfcmpeq
    2, // llvm.x86.3dnow.pfcmpge
    2, // llvm.x86.3dnow.pfcmpgt
    2, // llvm.x86.3dnow.pfmax
    2, // llvm.x86.3dnow.pfmin
    2, // llvm.x86.3dnow.pfmul
    2, // llvm.x86.3dnow.pfrcp
    2, // llvm.x86.3dnow.pfrcpit1
    2, // llvm.x86.3dnow.pfrcpit2
    2, // llvm.x86.3dnow.pfrsqit1
    2, // llvm.x86.3dnow.pfrsqrt
    2, // llvm.x86.3dnow.pfsub
    2, // llvm.x86.3dnow.pfsubr
    2, // llvm.x86.3dnow.pi2fd
    2, // llvm.x86.3dnow.pmulhrw
    2, // llvm.x86.3dnowa.pf2iw
    2, // llvm.x86.3dnowa.pfnacc
    2, // llvm.x86.3dnowa.pfpnacc
    2, // llvm.x86.3dnowa.pi2fw
    2, // llvm.x86.3dnowa.pswapd
    2, // llvm.x86.addcarry.32
    2, // llvm.x86.addcarry.64
    7, // llvm.x86.aesdec128kl
    7, // llvm.x86.aesdec256kl
    7, // llvm.x86.aesdecwide128kl
    7, // llvm.x86.aesdecwide256kl
    7, // llvm.x86.aesenc128kl
    7, // llvm.x86.aesenc256kl
    7, // llvm.x86.aesencwide128kl
    7, // llvm.x86.aesencwide256kl
    2, // llvm.x86.aesni.aesdec
    2, // llvm.x86.aesni.aesdec.256
    2, // llvm.x86.aesni.aesdec.512
    2, // llvm.x86.aesni.aesdeclast
    2, // llvm.x86.aesni.aesdeclast.256
    2, // llvm.x86.aesni.aesdeclast.512
    2, // llvm.x86.aesni.aesenc
    2, // llvm.x86.aesni.aesenc.256
    2, // llvm.x86.aesni.aesenc.512
    2, // llvm.x86.aesni.aesenclast
    2, // llvm.x86.aesni.aesenclast.256
    2, // llvm.x86.aesni.aesenclast.512
    2, // llvm.x86.aesni.aesimc
    52, // llvm.x86.aesni.aeskeygenassist
    2, // llvm.x86.avx.addsub.pd.256
    2, // llvm.x86.avx.addsub.ps.256
    2, // llvm.x86.avx.blendv.pd.256
    2, // llvm.x86.avx.blendv.ps.256
    32, // llvm.x86.avx.cmp.pd.256
    32, // llvm.x86.avx.cmp.ps.256
    2, // llvm.x86.avx.cvt.pd2.ps.256
    2, // llvm.x86.avx.cvt.pd2dq.256
    2, // llvm.x86.avx.cvt.ps2dq.256
    2, // llvm.x86.avx.cvtt.pd2dq.256
    2, // llvm.x86.avx.cvtt.ps2dq.256
    32, // llvm.x86.avx.dp.ps.256
    2, // llvm.x86.avx.hadd.pd.256
    2, // llvm.x86.avx.hadd.ps.256
    2, // llvm.x86.avx.hsub.pd.256
    2, // llvm.x86.avx.hsub.ps.256
    21, // llvm.x86.avx.ldu.dq.256
    3, // llvm.x86.avx.maskload.pd
    3, // llvm.x86.avx.maskload.pd.256
    3, // llvm.x86.avx.maskload.ps
    3, // llvm.x86.avx.maskload.ps.256
    164, // llvm.x86.avx.maskstore.pd
    164, // llvm.x86.avx.maskstore.pd.256
    164, // llvm.x86.avx.maskstore.ps
    164, // llvm.x86.avx.maskstore.ps.256
    2, // llvm.x86.avx.max.pd.256
    2, // llvm.x86.avx.max.ps.256
    2, // llvm.x86.avx.min.pd.256
    2, // llvm.x86.avx.min.ps.256
    2, // llvm.x86.avx.movmsk.pd.256
    2, // llvm.x86.avx.movmsk.ps.256
    2, // llvm.x86.avx.ptestc.256
    2, // llvm.x86.avx.ptestnzc.256
    2, // llvm.x86.avx.ptestz.256
    2, // llvm.x86.avx.rcp.ps.256
    52, // llvm.x86.avx.round.pd.256
    52, // llvm.x86.avx.round.ps.256
    2, // llvm.x86.avx.rsqrt.ps.256
    2, // llvm.x86.avx.vpermilvar.pd
    2, // llvm.x86.avx.vpermilvar.pd.256
    2, // llvm.x86.avx.vpermilvar.ps
    2, // llvm.x86.avx.vpermilvar.ps.256
    2, // llvm.x86.avx.vtestc.pd
    2, // llvm.x86.avx.vtestc.pd.256
    2, // llvm.x86.avx.vtestc.ps
    2, // llvm.x86.avx.vtestc.ps.256
    2, // llvm.x86.avx.vtestnzc.pd
    2, // llvm.x86.avx.vtestnzc.pd.256
    2, // llvm.x86.avx.vtestnzc.ps
    2, // llvm.x86.avx.vtestnzc.ps.256
    2, // llvm.x86.avx.vtestz.pd
    2, // llvm.x86.avx.vtestz.pd.256
    2, // llvm.x86.avx.vtestz.ps
    2, // llvm.x86.avx.vtestz.ps.256
    59, // llvm.x86.avx.vzeroall
    59, // llvm.x86.avx.vzeroupper
    188, // llvm.x86.avx2.gather.d.d
    188, // llvm.x86.avx2.gather.d.d.256
    188, // llvm.x86.avx2.gather.d.pd
    188, // llvm.x86.avx2.gather.d.pd.256
    188, // llvm.x86.avx2.gather.d.ps
    188, // llvm.x86.avx2.gather.d.ps.256
    188, // llvm.x86.avx2.gather.d.q
    188, // llvm.x86.avx2.gather.d.q.256
    188, // llvm.x86.avx2.gather.q.d
    188, // llvm.x86.avx2.gather.q.d.256
    188, // llvm.x86.avx2.gather.q.pd
    188, // llvm.x86.avx2.gather.q.pd.256
    188, // llvm.x86.avx2.gather.q.ps
    188, // llvm.x86.avx2.gather.q.ps.256
    188, // llvm.x86.avx2.gather.q.q
    188, // llvm.x86.avx2.gather.q.q.256
    3, // llvm.x86.avx2.maskload.d
    3, // llvm.x86.avx2.maskload.d.256
    3, // llvm.x86.avx2.maskload.q
    3, // llvm.x86.avx2.maskload.q.256
    164, // llvm.x86.avx2.maskstore.d
    164, // llvm.x86.avx2.maskstore.d.256
    164, // llvm.x86.avx2.maskstore.q
    164, // llvm.x86.avx2.maskstore.q.256
    32, // llvm.x86.avx2.mpsadbw
    2, // llvm.x86.avx2.packssdw
    2, // llvm.x86.avx2.packsswb
    2, // llvm.x86.avx2.packusdw
    2, // llvm.x86.avx2.packuswb
    2, // llvm.x86.avx2.pavg.b
    2, // llvm.x86.avx2.pavg.w
    2, // llvm.x86.avx2.pblendvb
    2, // llvm.x86.avx2.permd
    2, // llvm.x86.avx2.permps
    2, // llvm.x86.avx2.phadd.d
    2, // llvm.x86.avx2.phadd.sw
    2, // llvm.x86.avx2.phadd.w
    2, // llvm.x86.avx2.phsub.d
    2, // llvm.x86.avx2.phsub.sw
    2, // llvm.x86.avx2.phsub.w
    2, // llvm.x86.avx2.pmadd.ub.sw
    2, // llvm.x86.avx2.pmadd.wd
    2, // llvm.x86.avx2.pmovmskb
    2, // llvm.x86.avx2.pmul.hr.sw
    2, // llvm.x86.avx2.pmulh.w
    2, // llvm.x86.avx2.pmulhu.w
    2, // llvm.x86.avx2.psad.bw
    2, // llvm.x86.avx2.pshuf.b
    2, // llvm.x86.avx2.psign.b
    2, // llvm.x86.avx2.psign.d
    2, // llvm.x86.avx2.psign.w
    2, // llvm.x86.avx2.psll.d
    2, // llvm.x86.avx2.psll.q
    2, // llvm.x86.avx2.psll.w
    2, // llvm.x86.avx2.pslli.d
    2, // llvm.x86.avx2.pslli.q
    2, // llvm.x86.avx2.pslli.w
    2, // llvm.x86.avx2.psllv.d
    2, // llvm.x86.avx2.psllv.d.256
    2, // llvm.x86.avx2.psllv.q
    2, // llvm.x86.avx2.psllv.q.256
    2, // llvm.x86.avx2.psra.d
    2, // llvm.x86.avx2.psra.w
    2, // llvm.x86.avx2.psrai.d
    2, // llvm.x86.avx2.psrai.w
    2, // llvm.x86.avx2.psrav.d
    2, // llvm.x86.avx2.psrav.d.256
    2, // llvm.x86.avx2.psrl.d
    2, // llvm.x86.avx2.psrl.q
    2, // llvm.x86.avx2.psrl.w
    2, // llvm.x86.avx2.psrli.d
    2, // llvm.x86.avx2.psrli.q
    2, // llvm.x86.avx2.psrli.w
    2, // llvm.x86.avx2.psrlv.d
    2, // llvm.x86.avx2.psrlv.d.256
    2, // llvm.x86.avx2.psrlv.q
    2, // llvm.x86.avx2.psrlv.q.256
    32, // llvm.x86.avx512.add.pd.512
    32, // llvm.x86.avx512.add.ps.512
    2, // llvm.x86.avx512.broadcastmb.128
    2, // llvm.x86.avx512.broadcastmb.256
    2, // llvm.x86.avx512.broadcastmb.512
    2, // llvm.x86.avx512.broadcastmw.128
    2, // llvm.x86.avx512.broadcastmw.256
    2, // llvm.x86.avx512.broadcastmw.512
    2, // llvm.x86.avx512.conflict.d.128
    2, // llvm.x86.avx512.conflict.d.256
    2, // llvm.x86.avx512.conflict.d.512
    2, // llvm.x86.avx512.conflict.q.128
    2, // llvm.x86.avx512.conflict.q.256
    2, // llvm.x86.avx512.conflict.q.512
    32, // llvm.x86.avx512.cvtsi2sd64
    32, // llvm.x86.avx512.cvtsi2ss32
    32, // llvm.x86.avx512.cvtsi2ss64
    52, // llvm.x86.avx512.cvttsd2si
    52, // llvm.x86.avx512.cvttsd2si64
    52, // llvm.x86.avx512.cvttsd2usi
    52, // llvm.x86.avx512.cvttsd2usi64
    52, // llvm.x86.avx512.cvttss2si
    52, // llvm.x86.avx512.cvttss2si64
    52, // llvm.x86.avx512.cvttss2usi
    52, // llvm.x86.avx512.cvttss2usi64
    32, // llvm.x86.avx512.cvtusi2ss
    32, // llvm.x86.avx512.cvtusi642sd
    32, // llvm.x86.avx512.cvtusi642ss
    32, // llvm.x86.avx512.dbpsadbw.128
    32, // llvm.x86.avx512.dbpsadbw.256
    32, // llvm.x86.avx512.dbpsadbw.512
    32, // llvm.x86.avx512.div.pd.512
    32, // llvm.x86.avx512.div.ps.512
    66, // llvm.x86.avx512.exp2.pd
    66, // llvm.x86.avx512.exp2.ps
    52, // llvm.x86.avx512.fpclass.pd.128
    52, // llvm.x86.avx512.fpclass.pd.256
    52, // llvm.x86.avx512.fpclass.pd.512
    52, // llvm.x86.avx512.fpclass.ps.128
    52, // llvm.x86.avx512.fpclass.ps.256
    52, // llvm.x86.avx512.fpclass.ps.512
    188, // llvm.x86.avx512.gather.dpd.512
    188, // llvm.x86.avx512.gather.dpi.512
    188, // llvm.x86.avx512.gather.dpq.512
    188, // llvm.x86.avx512.gather.dps.512
    188, // llvm.x86.avx512.gather.qpd.512
    188, // llvm.x86.avx512.gather.qpi.512
    188, // llvm.x86.avx512.gather.qpq.512
    188, // llvm.x86.avx512.gather.qps.512
    188, // llvm.x86.avx512.gather3div2.df
    188, // llvm.x86.avx512.gather3div2.di
    188, // llvm.x86.avx512.gather3div4.df
    188, // llvm.x86.avx512.gather3div4.di
    188, // llvm.x86.avx512.gather3div4.sf
    188, // llvm.x86.avx512.gather3div4.si
    188, // llvm.x86.avx512.gather3div8.sf
    188, // llvm.x86.avx512.gather3div8.si
    188, // llvm.x86.avx512.gather3siv2.df
    188, // llvm.x86.avx512.gather3siv2.di
    188, // llvm.x86.avx512.gather3siv4.df
    188, // llvm.x86.avx512.gather3siv4.di
    188, // llvm.x86.avx512.gather3siv4.sf
    188, // llvm.x86.avx512.gather3siv4.si
    188, // llvm.x86.avx512.gather3siv8.sf
    188, // llvm.x86.avx512.gather3siv8.si
    189, // llvm.x86.avx512.gatherpf.dpd.512
    189, // llvm.x86.avx512.gatherpf.dps.512
    189, // llvm.x86.avx512.gatherpf.qpd.512
    189, // llvm.x86.avx512.gatherpf.qps.512
    2, // llvm.x86.avx512.kadd.b
    2, // llvm.x86.avx512.kadd.d
    2, // llvm.x86.avx512.kadd.q
    2, // llvm.x86.avx512.kadd.w
    2, // llvm.x86.avx512.ktestc.b
    2, // llvm.x86.avx512.ktestc.d
    2, // llvm.x86.avx512.ktestc.q
    2, // llvm.x86.avx512.ktestc.w
    2, // llvm.x86.avx512.ktestz.b
    2, // llvm.x86.avx512.ktestz.d
    2, // llvm.x86.avx512.ktestz.q
    2, // llvm.x86.avx512.ktestz.w
    68, // llvm.x86.avx512.mask.add.sd.round
    68, // llvm.x86.avx512.mask.add.ss.round
    32, // llvm.x86.avx512.mask.cmp.pd.128
    32, // llvm.x86.avx512.mask.cmp.pd.256
    190, // llvm.x86.avx512.mask.cmp.pd.512
    32, // llvm.x86.avx512.mask.cmp.ps.128
    32, // llvm.x86.avx512.mask.cmp.ps.256
    190, // llvm.x86.avx512.mask.cmp.ps.512
    190, // llvm.x86.avx512.mask.cmp.sd
    190, // llvm.x86.avx512.mask.cmp.ss
    2, // llvm.x86.avx512.mask.compress
    2, // llvm.x86.avx512.mask.cvtpd2dq.128
    66, // llvm.x86.avx512.mask.cvtpd2dq.512
    2, // llvm.x86.avx512.mask.cvtpd2ps
    66, // llvm.x86.avx512.mask.cvtpd2ps.512
    2, // llvm.x86.avx512.mask.cvtpd2qq.128
    2, // llvm.x86.avx512.mask.cvtpd2qq.256
    66, // llvm.x86.avx512.mask.cvtpd2qq.512
    2, // llvm.x86.avx512.mask.cvtpd2udq.128
    2, // llvm.x86.avx512.mask.cvtpd2udq.256
    66, // llvm.x86.avx512.mask.cvtpd2udq.512
    2, // llvm.x86.avx512.mask.cvtpd2uqq.128
    2, // llvm.x86.avx512.mask.cvtpd2uqq.256
    66, // llvm.x86.avx512.mask.cvtpd2uqq.512
    2, // llvm.x86.avx512.mask.cvtps2dq.128
    2, // llvm.x86.avx512.mask.cvtps2dq.256
    66, // llvm.x86.avx512.mask.cvtps2dq.512
    66, // llvm.x86.avx512.mask.cvtps2pd.512
    2, // llvm.x86.avx512.mask.cvtps2qq.128
    2, // llvm.x86.avx512.mask.cvtps2qq.256
    66, // llvm.x86.avx512.mask.cvtps2qq.512
    2, // llvm.x86.avx512.mask.cvtps2udq.128
    2, // llvm.x86.avx512.mask.cvtps2udq.256
    66, // llvm.x86.avx512.mask.cvtps2udq.512
    2, // llvm.x86.avx512.mask.cvtps2uqq.128
    2, // llvm.x86.avx512.mask.cvtps2uqq.256
    66, // llvm.x86.avx512.mask.cvtps2uqq.512
    2, // llvm.x86.avx512.mask.cvtqq2ps.128
    68, // llvm.x86.avx512.mask.cvtsd2ss.round
    68, // llvm.x86.avx512.mask.cvtss2sd.round
    2, // llvm.x86.avx512.mask.cvttpd2dq.128
    66, // llvm.x86.avx512.mask.cvttpd2dq.512
    2, // llvm.x86.avx512.mask.cvttpd2qq.128
    2, // llvm.x86.avx512.mask.cvttpd2qq.256
    66, // llvm.x86.avx512.mask.cvttpd2qq.512
    2, // llvm.x86.avx512.mask.cvttpd2udq.128
    2, // llvm.x86.avx512.mask.cvttpd2udq.256
    66, // llvm.x86.avx512.mask.cvttpd2udq.512
    2, // llvm.x86.avx512.mask.cvttpd2uqq.128
    2, // llvm.x86.avx512.mask.cvttpd2uqq.256
    66, // llvm.x86.avx512.mask.cvttpd2uqq.512
    66, // llvm.x86.avx512.mask.cvttps2dq.512
    2, // llvm.x86.avx512.mask.cvttps2qq.128
    2, // llvm.x86.avx512.mask.cvttps2qq.256
    66, // llvm.x86.avx512.mask.cvttps2qq.512
    2, // llvm.x86.avx512.mask.cvttps2udq.128
    2, // llvm.x86.avx512.mask.cvttps2udq.256
    66, // llvm.x86.avx512.mask.cvttps2udq.512
    2, // llvm.x86.avx512.mask.cvttps2uqq.128
    2, // llvm.x86.avx512.mask.cvttps2uqq.256
    66, // llvm.x86.avx512.mask.cvttps2uqq.512
    2, // llvm.x86.avx512.mask.cvtuqq2ps.128
    68, // llvm.x86.avx512.mask.div.sd.round
    68, // llvm.x86.avx512.mask.div.ss.round
    2, // llvm.x86.avx512.mask.expand
    66, // llvm.x86.avx512.mask.fixupimm.pd.128
    66, // llvm.x86.avx512.mask.fixupimm.pd.256
    191, // llvm.x86.avx512.mask.fixupimm.pd.512
    66, // llvm.x86.avx512.mask.fixupimm.ps.128
    66, // llvm.x86.avx512.mask.fixupimm.ps.256
    191, // llvm.x86.avx512.mask.fixupimm.ps.512
    191, // llvm.x86.avx512.mask.fixupimm.sd
    191, // llvm.x86.avx512.mask.fixupimm.ss
    52, // llvm.x86.avx512.mask.fpclass.sd
    52, // llvm.x86.avx512.mask.fpclass.ss
    188, // llvm.x86.avx512.mask.gather.dpd.512
    188, // llvm.x86.avx512.mask.gather.dpi.512
    188, // llvm.x86.avx512.mask.gather.dpq.512
    188, // llvm.x86.avx512.mask.gather.dps.512
    188, // llvm.x86.avx512.mask.gather.qpd.512
    188, // llvm.x86.avx512.mask.gather.qpi.512
    188, // llvm.x86.avx512.mask.gather.qpq.512
    188, // llvm.x86.avx512.mask.gather.qps.512
    188, // llvm.x86.avx512.mask.gather3div2.df
    188, // llvm.x86.avx512.mask.gather3div2.di
    188, // llvm.x86.avx512.mask.gather3div4.df
    188, // llvm.x86.avx512.mask.gather3div4.di
    188, // llvm.x86.avx512.mask.gather3div4.sf
    188, // llvm.x86.avx512.mask.gather3div4.si
    188, // llvm.x86.avx512.mask.gather3div8.sf
    188, // llvm.x86.avx512.mask.gather3div8.si
    188, // llvm.x86.avx512.mask.gather3siv2.df
    188, // llvm.x86.avx512.mask.gather3siv2.di
    188, // llvm.x86.avx512.mask.gather3siv4.df
    188, // llvm.x86.avx512.mask.gather3siv4.di
    188, // llvm.x86.avx512.mask.gather3siv4.sf
    188, // llvm.x86.avx512.mask.gather3siv4.si
    188, // llvm.x86.avx512.mask.gather3siv8.sf
    188, // llvm.x86.avx512.mask.gather3siv8.si
    2, // llvm.x86.avx512.mask.getexp.pd.128
    2, // llvm.x86.avx512.mask.getexp.pd.256
    66, // llvm.x86.avx512.mask.getexp.pd.512
    2, // llvm.x86.avx512.mask.getexp.ps.128
    2, // llvm.x86.avx512.mask.getexp.ps.256
    66, // llvm.x86.avx512.mask.getexp.ps.512
    68, // llvm.x86.avx512.mask.getexp.sd
    68, // llvm.x86.avx512.mask.getexp.ss
    52, // llvm.x86.avx512.mask.getmant.pd.128
    52, // llvm.x86.avx512.mask.getmant.pd.256
    192, // llvm.x86.avx512.mask.getmant.pd.512
    52, // llvm.x86.avx512.mask.getmant.ps.128
    52, // llvm.x86.avx512.mask.getmant.ps.256
    192, // llvm.x86.avx512.mask.getmant.ps.512
    193, // llvm.x86.avx512.mask.getmant.sd
    193, // llvm.x86.avx512.mask.getmant.ss
    68, // llvm.x86.avx512.mask.max.sd.round
    68, // llvm.x86.avx512.mask.max.ss.round
    68, // llvm.x86.avx512.mask.min.sd.round
    68, // llvm.x86.avx512.mask.min.ss.round
    68, // llvm.x86.avx512.mask.mul.sd.round
    68, // llvm.x86.avx512.mask.mul.ss.round
    2, // llvm.x86.avx512.mask.pmov.db.128
    2, // llvm.x86.avx512.mask.pmov.db.256
    2, // llvm.x86.avx512.mask.pmov.db.512
    164, // llvm.x86.avx512.mask.pmov.db.mem.128
    164, // llvm.x86.avx512.mask.pmov.db.mem.256
    164, // llvm.x86.avx512.mask.pmov.db.mem.512
    2, // llvm.x86.avx512.mask.pmov.dw.128
    2, // llvm.x86.avx512.mask.pmov.dw.256
    2, // llvm.x86.avx512.mask.pmov.dw.512
    164, // llvm.x86.avx512.mask.pmov.dw.mem.128
    164, // llvm.x86.avx512.mask.pmov.dw.mem.256
    164, // llvm.x86.avx512.mask.pmov.dw.mem.512
    2, // llvm.x86.avx512.mask.pmov.qb.128
    2, // llvm.x86.avx512.mask.pmov.qb.256
    2, // llvm.x86.avx512.mask.pmov.qb.512
    164, // llvm.x86.avx512.mask.pmov.qb.mem.128
    164, // llvm.x86.avx512.mask.pmov.qb.mem.256
    164, // llvm.x86.avx512.mask.pmov.qb.mem.512
    2, // llvm.x86.avx512.mask.pmov.qd.128
    164, // llvm.x86.avx512.mask.pmov.qd.mem.128
    164, // llvm.x86.avx512.mask.pmov.qd.mem.256
    164, // llvm.x86.avx512.mask.pmov.qd.mem.512
    2, // llvm.x86.avx512.mask.pmov.qw.128
    2, // llvm.x86.avx512.mask.pmov.qw.256
    2, // llvm.x86.avx512.mask.pmov.qw.512
    164, // llvm.x86.avx512.mask.pmov.qw.mem.128
    164, // llvm.x86.avx512.mask.pmov.qw.mem.256
    164, // llvm.x86.avx512.mask.pmov.qw.mem.512
    2, // llvm.x86.avx512.mask.pmov.wb.128
    164, // llvm.x86.avx512.mask.pmov.wb.mem.128
    164, // llvm.x86.avx512.mask.pmov.wb.mem.256
    164, // llvm.x86.avx512.mask.pmov.wb.mem.512
    2, // llvm.x86.avx512.mask.pmovs.db.128
    2, // llvm.x86.avx512.mask.pmovs.db.256
    2, // llvm.x86.avx512.mask.pmovs.db.512
    164, // llvm.x86.avx512.mask.pmovs.db.mem.128
    164, // llvm.x86.avx512.mask.pmovs.db.mem.256
    164, // llvm.x86.avx512.mask.pmovs.db.mem.512
    2, // llvm.x86.avx512.mask.pmovs.dw.128
    2, // llvm.x86.avx512.mask.pmovs.dw.256
    2, // llvm.x86.avx512.mask.pmovs.dw.512
    164, // llvm.x86.avx512.mask.pmovs.dw.mem.128
    164, // llvm.x86.avx512.mask.pmovs.dw.mem.256
    164, // llvm.x86.avx512.mask.pmovs.dw.mem.512
    2, // llvm.x86.avx512.mask.pmovs.qb.128
    2, // llvm.x86.avx512.mask.pmovs.qb.256
    2, // llvm.x86.avx512.mask.pmovs.qb.512
    164, // llvm.x86.avx512.mask.pmovs.qb.mem.128
    164, // llvm.x86.avx512.mask.pmovs.qb.mem.256
    164, // llvm.x86.avx512.mask.pmovs.qb.mem.512
    2, // llvm.x86.avx512.mask.pmovs.qd.128
    2, // llvm.x86.avx512.mask.pmovs.qd.256
    2, // llvm.x86.avx512.mask.pmovs.qd.512
    164, // llvm.x86.avx512.mask.pmovs.qd.mem.128
    164, // llvm.x86.avx512.mask.pmovs.qd.mem.256
    164, // llvm.x86.avx512.mask.pmovs.qd.mem.512
    2, // llvm.x86.avx512.mask.pmovs.qw.128
    2, // llvm.x86.avx512.mask.pmovs.qw.256
    2, // llvm.x86.avx512.mask.pmovs.qw.512
    164, // llvm.x86.avx512.mask.pmovs.qw.mem.128
    164, // llvm.x86.avx512.mask.pmovs.qw.mem.256
    164, // llvm.x86.avx512.mask.pmovs.qw.mem.512
    2, // llvm.x86.avx512.mask.pmovs.wb.128
    2, // llvm.x86.avx512.mask.pmovs.wb.256
    2, // llvm.x86.avx512.mask.pmovs.wb.512
    164, // llvm.x86.avx512.mask.pmovs.wb.mem.128
    164, // llvm.x86.avx512.mask.pmovs.wb.mem.256
    164, // llvm.x86.avx512.mask.pmovs.wb.mem.512
    2, // llvm.x86.avx512.mask.pmovus.db.128
    2, // llvm.x86.avx512.mask.pmovus.db.256
    2, // llvm.x86.avx512.mask.pmovus.db.512
    164, // llvm.x86.avx512.mask.pmovus.db.mem.128
    164, // llvm.x86.avx512.mask.pmovus.db.mem.256
    164, // llvm.x86.avx512.mask.pmovus.db.mem.512
    2, // llvm.x86.avx512.mask.pmovus.dw.128
    2, // llvm.x86.avx512.mask.pmovus.dw.256
    2, // llvm.x86.avx512.mask.pmovus.dw.512
    164, // llvm.x86.avx512.mask.pmovus.dw.mem.128
    164, // llvm.x86.avx512.mask.pmovus.dw.mem.256
    164, // llvm.x86.avx512.mask.pmovus.dw.mem.512
    2, // llvm.x86.avx512.mask.pmovus.qb.128
    2, // llvm.x86.avx512.mask.pmovus.qb.256
    2, // llvm.x86.avx512.mask.pmovus.qb.512
    164, // llvm.x86.avx512.mask.pmovus.qb.mem.128
    164, // llvm.x86.avx512.mask.pmovus.qb.mem.256
    164, // llvm.x86.avx512.mask.pmovus.qb.mem.512
    2, // llvm.x86.avx512.mask.pmovus.qd.128
    2, // llvm.x86.avx512.mask.pmovus.qd.256
    2, // llvm.x86.avx512.mask.pmovus.qd.512
    164, // llvm.x86.avx512.mask.pmovus.qd.mem.128
    164, // llvm.x86.avx512.mask.pmovus.qd.mem.256
    164, // llvm.x86.avx512.mask.pmovus.qd.mem.512
    2, // llvm.x86.avx512.mask.pmovus.qw.128
    2, // llvm.x86.avx512.mask.pmovus.qw.256
    2, // llvm.x86.avx512.mask.pmovus.qw.512
    164, // llvm.x86.avx512.mask.pmovus.qw.mem.128
    164, // llvm.x86.avx512.mask.pmovus.qw.mem.256
    164, // llvm.x86.avx512.mask.pmovus.qw.mem.512
    2, // llvm.x86.avx512.mask.pmovus.wb.128
    2, // llvm.x86.avx512.mask.pmovus.wb.256
    2, // llvm.x86.avx512.mask.pmovus.wb.512
    164, // llvm.x86.avx512.mask.pmovus.wb.mem.128
    164, // llvm.x86.avx512.mask.pmovus.wb.mem.256
    164, // llvm.x86.avx512.mask.pmovus.wb.mem.512
    32, // llvm.x86.avx512.mask.range.pd.128
    32, // llvm.x86.avx512.mask.range.pd.256
    193, // llvm.x86.avx512.mask.range.pd.512
    32, // llvm.x86.avx512.mask.range.ps.128
    32, // llvm.x86.avx512.mask.range.ps.256
    193, // llvm.x86.avx512.mask.range.ps.512
    194, // llvm.x86.avx512.mask.range.sd
    194, // llvm.x86.avx512.mask.range.ss
    52, // llvm.x86.avx512.mask.reduce.pd.128
    52, // llvm.x86.avx512.mask.reduce.pd.256
    192, // llvm.x86.avx512.mask.reduce.pd.512
    52, // llvm.x86.avx512.mask.reduce.ps.128
    52, // llvm.x86.avx512.mask.reduce.ps.256
    192, // llvm.x86.avx512.mask.reduce.ps.512
    194, // llvm.x86.avx512.mask.reduce.sd
    194, // llvm.x86.avx512.mask.reduce.ss
    52, // llvm.x86.avx512.mask.rndscale.pd.128
    52, // llvm.x86.avx512.mask.rndscale.pd.256
    192, // llvm.x86.avx512.mask.rndscale.pd.512
    52, // llvm.x86.avx512.mask.rndscale.ps.128
    52, // llvm.x86.avx512.mask.rndscale.ps.256
    192, // llvm.x86.avx512.mask.rndscale.ps.512
    194, // llvm.x86.avx512.mask.rndscale.sd
    194, // llvm.x86.avx512.mask.rndscale.ss
    2, // llvm.x86.avx512.mask.scalef.pd.128
    2, // llvm.x86.avx512.mask.scalef.pd.256
    68, // llvm.x86.avx512.mask.scalef.pd.512
    2, // llvm.x86.avx512.mask.scalef.ps.128
    2, // llvm.x86.avx512.mask.scalef.ps.256
    68, // llvm.x86.avx512.mask.scalef.ps.512
    68, // llvm.x86.avx512.mask.scalef.sd
    68, // llvm.x86.avx512.mask.scalef.ss
    79, // llvm.x86.avx512.mask.scatter.dpd.512
    79, // llvm.x86.avx512.mask.scatter.dpi.512
    79, // llvm.x86.avx512.mask.scatter.dpq.512
    79, // llvm.x86.avx512.mask.scatter.dps.512
    79, // llvm.x86.avx512.mask.scatter.qpd.512
    79, // llvm.x86.avx512.mask.scatter.qpi.512
    79, // llvm.x86.avx512.mask.scatter.qpq.512
    79, // llvm.x86.avx512.mask.scatter.qps.512
    79, // llvm.x86.avx512.mask.scatterdiv2.df
    79, // llvm.x86.avx512.mask.scatterdiv2.di
    79, // llvm.x86.avx512.mask.scatterdiv4.df
    79, // llvm.x86.avx512.mask.scatterdiv4.di
    79, // llvm.x86.avx512.mask.scatterdiv4.sf
    79, // llvm.x86.avx512.mask.scatterdiv4.si
    79, // llvm.x86.avx512.mask.scatterdiv8.sf
    79, // llvm.x86.avx512.mask.scatterdiv8.si
    79, // llvm.x86.avx512.mask.scattersiv2.df
    79, // llvm.x86.avx512.mask.scattersiv2.di
    79, // llvm.x86.avx512.mask.scattersiv4.df
    79, // llvm.x86.avx512.mask.scattersiv4.di
    79, // llvm.x86.avx512.mask.scattersiv4.sf
    79, // llvm.x86.avx512.mask.scattersiv4.si
    79, // llvm.x86.avx512.mask.scattersiv8.sf
    79, // llvm.x86.avx512.mask.scattersiv8.si
    68, // llvm.x86.avx512.mask.sqrt.sd
    68, // llvm.x86.avx512.mask.sqrt.ss
    68, // llvm.x86.avx512.mask.sub.sd.round
    68, // llvm.x86.avx512.mask.sub.ss.round
    66, // llvm.x86.avx512.mask.vcvtph2ps.512
    52, // llvm.x86.avx512.mask.vcvtps2ph.128
    52, // llvm.x86.avx512.mask.vcvtps2ph.256
    52, // llvm.x86.avx512.mask.vcvtps2ph.512
    66, // llvm.x86.avx512.maskz.fixupimm.pd.128
    66, // llvm.x86.avx512.maskz.fixupimm.pd.256
    191, // llvm.x86.avx512.maskz.fixupimm.pd.512
    66, // llvm.x86.avx512.maskz.fixupimm.ps.128
    66, // llvm.x86.avx512.maskz.fixupimm.ps.256
    191, // llvm.x86.avx512.maskz.fixupimm.ps.512
    191, // llvm.x86.avx512.maskz.fixupimm.sd
    191, // llvm.x86.avx512.maskz.fixupimm.ss
    32, // llvm.x86.avx512.max.pd.512
    32, // llvm.x86.avx512.max.ps.512
    32, // llvm.x86.avx512.min.pd.512
    32, // llvm.x86.avx512.min.ps.512
    32, // llvm.x86.avx512.mul.pd.512
    32, // llvm.x86.avx512.mul.ps.512
    2, // llvm.x86.avx512.packssdw.512
    2, // llvm.x86.avx512.packsswb.512
    2, // llvm.x86.avx512.packusdw.512
    2, // llvm.x86.avx512.packuswb.512
    2, // llvm.x86.avx512.pavg.b.512
    2, // llvm.x86.avx512.pavg.w.512
    2, // llvm.x86.avx512.permvar.df.256
    2, // llvm.x86.avx512.permvar.df.512
    2, // llvm.x86.avx512.permvar.di.256
    2, // llvm.x86.avx512.permvar.di.512
    2, // llvm.x86.avx512.permvar.hi.128
    2, // llvm.x86.avx512.permvar.hi.256
    2, // llvm.x86.avx512.permvar.hi.512
    2, // llvm.x86.avx512.permvar.qi.128
    2, // llvm.x86.avx512.permvar.qi.256
    2, // llvm.x86.avx512.permvar.qi.512
    2, // llvm.x86.avx512.permvar.sf.512
    2, // llvm.x86.avx512.permvar.si.512
    2, // llvm.x86.avx512.pmaddubs.w.512
    2, // llvm.x86.avx512.pmaddw.d.512
    2, // llvm.x86.avx512.pmul.hr.sw.512
    2, // llvm.x86.avx512.pmulh.w.512
    2, // llvm.x86.avx512.pmulhu.w.512
    2, // llvm.x86.avx512.pmultishift.qb.128
    2, // llvm.x86.avx512.pmultishift.qb.256
    2, // llvm.x86.avx512.pmultishift.qb.512
    2, // llvm.x86.avx512.psad.bw.512
    2, // llvm.x86.avx512.pshuf.b.512
    2, // llvm.x86.avx512.psll.d.512
    2, // llvm.x86.avx512.psll.q.512
    2, // llvm.x86.avx512.psll.w.512
    2, // llvm.x86.avx512.pslli.d.512
    2, // llvm.x86.avx512.pslli.q.512
    2, // llvm.x86.avx512.pslli.w.512
    2, // llvm.x86.avx512.psllv.d.512
    2, // llvm.x86.avx512.psllv.q.512
    2, // llvm.x86.avx512.psllv.w.128
    2, // llvm.x86.avx512.psllv.w.256
    2, // llvm.x86.avx512.psllv.w.512
    2, // llvm.x86.avx512.psra.d.512
    2, // llvm.x86.avx512.psra.q.128
    2, // llvm.x86.avx512.psra.q.256
    2, // llvm.x86.avx512.psra.q.512
    2, // llvm.x86.avx512.psra.w.512
    2, // llvm.x86.avx512.psrai.d.512
    2, // llvm.x86.avx512.psrai.q.128
    2, // llvm.x86.avx512.psrai.q.256
    2, // llvm.x86.avx512.psrai.q.512
    2, // llvm.x86.avx512.psrai.w.512
    2, // llvm.x86.avx512.psrav.d.512
    2, // llvm.x86.avx512.psrav.q.128
    2, // llvm.x86.avx512.psrav.q.256
    2, // llvm.x86.avx512.psrav.q.512
    2, // llvm.x86.avx512.psrav.w.128
    2, // llvm.x86.avx512.psrav.w.256
    2, // llvm.x86.avx512.psrav.w.512
    2, // llvm.x86.avx512.psrl.d.512
    2, // llvm.x86.avx512.psrl.q.512
    2, // llvm.x86.avx512.psrl.w.512
    2, // llvm.x86.avx512.psrli.d.512
    2, // llvm.x86.avx512.psrli.q.512
    2, // llvm.x86.avx512.psrli.w.512
    2, // llvm.x86.avx512.psrlv.d.512
    2, // llvm.x86.avx512.psrlv.q.512
    2, // llvm.x86.avx512.psrlv.w.128
    2, // llvm.x86.avx512.psrlv.w.256
    2, // llvm.x86.avx512.psrlv.w.512
    66, // llvm.x86.avx512.pternlog.d.128
    66, // llvm.x86.avx512.pternlog.d.256
    66, // llvm.x86.avx512.pternlog.d.512
    66, // llvm.x86.avx512.pternlog.q.128
    66, // llvm.x86.avx512.pternlog.q.256
    66, // llvm.x86.avx512.pternlog.q.512
    2, // llvm.x86.avx512.rcp14.pd.128
    2, // llvm.x86.avx512.rcp14.pd.256
    2, // llvm.x86.avx512.rcp14.pd.512
    2, // llvm.x86.avx512.rcp14.ps.128
    2, // llvm.x86.avx512.rcp14.ps.256
    2, // llvm.x86.avx512.rcp14.ps.512
    2, // llvm.x86.avx512.rcp14.sd
    2, // llvm.x86.avx512.rcp14.ss
    66, // llvm.x86.avx512.rcp28.pd
    66, // llvm.x86.avx512.rcp28.ps
    68, // llvm.x86.avx512.rcp28.sd
    68, // llvm.x86.avx512.rcp28.ss
    2, // llvm.x86.avx512.rsqrt14.pd.128
    2, // llvm.x86.avx512.rsqrt14.pd.256
    2, // llvm.x86.avx512.rsqrt14.pd.512
    2, // llvm.x86.avx512.rsqrt14.ps.128
    2, // llvm.x86.avx512.rsqrt14.ps.256
    2, // llvm.x86.avx512.rsqrt14.ps.512
    2, // llvm.x86.avx512.rsqrt14.sd
    2, // llvm.x86.avx512.rsqrt14.ss
    66, // llvm.x86.avx512.rsqrt28.pd
    66, // llvm.x86.avx512.rsqrt28.ps
    68, // llvm.x86.avx512.rsqrt28.sd
    68, // llvm.x86.avx512.rsqrt28.ss
    79, // llvm.x86.avx512.scatter.dpd.512
    79, // llvm.x86.avx512.scatter.dpi.512
    79, // llvm.x86.avx512.scatter.dpq.512
    79, // llvm.x86.avx512.scatter.dps.512
    79, // llvm.x86.avx512.scatter.qpd.512
    79, // llvm.x86.avx512.scatter.qpi.512
    79, // llvm.x86.avx512.scatter.qpq.512
    79, // llvm.x86.avx512.scatter.qps.512
    79, // llvm.x86.avx512.scatterdiv2.df
    79, // llvm.x86.avx512.scatterdiv2.di
    79, // llvm.x86.avx512.scatterdiv4.df
    79, // llvm.x86.avx512.scatterdiv4.di
    79, // llvm.x86.avx512.scatterdiv4.sf
    79, // llvm.x86.avx512.scatterdiv4.si
    79, // llvm.x86.avx512.scatterdiv8.sf
    79, // llvm.x86.avx512.scatterdiv8.si
    189, // llvm.x86.avx512.scatterpf.dpd.512
    189, // llvm.x86.avx512.scatterpf.dps.512
    189, // llvm.x86.avx512.scatterpf.qpd.512
    189, // llvm.x86.avx512.scatterpf.qps.512
    79, // llvm.x86.avx512.scattersiv2.df
    79, // llvm.x86.avx512.scattersiv2.di
    79, // llvm.x86.avx512.scattersiv4.df
    79, // llvm.x86.avx512.scattersiv4.di
    79, // llvm.x86.avx512.scattersiv4.sf
    79, // llvm.x86.avx512.scattersiv4.si
    79, // llvm.x86.avx512.scattersiv8.sf
    79, // llvm.x86.avx512.scattersiv8.si
    52, // llvm.x86.avx512.sitofp.round
    52, // llvm.x86.avx512.sqrt.pd.512
    52, // llvm.x86.avx512.sqrt.ps.512
    32, // llvm.x86.avx512.sub.pd.512
    32, // llvm.x86.avx512.sub.ps.512
    52, // llvm.x86.avx512.uitofp.round
    168, // llvm.x86.avx512.vcomi.sd
    168, // llvm.x86.avx512.vcomi.ss
    52, // llvm.x86.avx512.vcvtsd2si32
    52, // llvm.x86.avx512.vcvtsd2si64
    52, // llvm.x86.avx512.vcvtsd2usi32
    52, // llvm.x86.avx512.vcvtsd2usi64
    52, // llvm.x86.avx512.vcvtss2si32
    52, // llvm.x86.avx512.vcvtss2si64
    52, // llvm.x86.avx512.vcvtss2usi32
    52, // llvm.x86.avx512.vcvtss2usi64
    66, // llvm.x86.avx512.vfmadd.f32
    66, // llvm.x86.avx512.vfmadd.f64
    66, // llvm.x86.avx512.vfmadd.pd.512
    66, // llvm.x86.avx512.vfmadd.ps.512
    66, // llvm.x86.avx512.vfmaddsub.pd.512
    66, // llvm.x86.avx512.vfmaddsub.ps.512
    2, // llvm.x86.avx512.vp2intersect.d.128
    2, // llvm.x86.avx512.vp2intersect.d.256
    2, // llvm.x86.avx512.vp2intersect.d.512
    2, // llvm.x86.avx512.vp2intersect.q.128
    2, // llvm.x86.avx512.vp2intersect.q.256
    2, // llvm.x86.avx512.vp2intersect.q.512
    2, // llvm.x86.avx512.vpdpbusd.128
    2, // llvm.x86.avx512.vpdpbusd.256
    2, // llvm.x86.avx512.vpdpbusd.512
    2, // llvm.x86.avx512.vpdpbusds.128
    2, // llvm.x86.avx512.vpdpbusds.256
    2, // llvm.x86.avx512.vpdpbusds.512
    2, // llvm.x86.avx512.vpdpwssd.128
    2, // llvm.x86.avx512.vpdpwssd.256
    2, // llvm.x86.avx512.vpdpwssd.512
    2, // llvm.x86.avx512.vpdpwssds.128
    2, // llvm.x86.avx512.vpdpwssds.256
    2, // llvm.x86.avx512.vpdpwssds.512
    2, // llvm.x86.avx512.vpermi2var.d.128
    2, // llvm.x86.avx512.vpermi2var.d.256
    2, // llvm.x86.avx512.vpermi2var.d.512
    2, // llvm.x86.avx512.vpermi2var.hi.128
    2, // llvm.x86.avx512.vpermi2var.hi.256
    2, // llvm.x86.avx512.vpermi2var.hi.512
    2, // llvm.x86.avx512.vpermi2var.pd.128
    2, // llvm.x86.avx512.vpermi2var.pd.256
    2, // llvm.x86.avx512.vpermi2var.pd.512
    2, // llvm.x86.avx512.vpermi2var.ps.128
    2, // llvm.x86.avx512.vpermi2var.ps.256
    2, // llvm.x86.avx512.vpermi2var.ps.512
    2, // llvm.x86.avx512.vpermi2var.q.128
    2, // llvm.x86.avx512.vpermi2var.q.256
    2, // llvm.x86.avx512.vpermi2var.q.512
    2, // llvm.x86.avx512.vpermi2var.qi.128
    2, // llvm.x86.avx512.vpermi2var.qi.256
    2, // llvm.x86.avx512.vpermi2var.qi.512
    2, // llvm.x86.avx512.vpermilvar.pd.512
    2, // llvm.x86.avx512.vpermilvar.ps.512
    2, // llvm.x86.avx512.vpmadd52h.uq.128
    2, // llvm.x86.avx512.vpmadd52h.uq.256
    2, // llvm.x86.avx512.vpmadd52h.uq.512
    2, // llvm.x86.avx512.vpmadd52l.uq.128
    2, // llvm.x86.avx512.vpmadd52l.uq.256
    2, // llvm.x86.avx512.vpmadd52l.uq.512
    2, // llvm.x86.avx512.vpshufbitqmb.128
    2, // llvm.x86.avx512.vpshufbitqmb.256
    2, // llvm.x86.avx512.vpshufbitqmb.512
    2, // llvm.x86.avx512bf16.cvtne2ps2bf16.128
    2, // llvm.x86.avx512bf16.cvtne2ps2bf16.256
    2, // llvm.x86.avx512bf16.cvtne2ps2bf16.512
    2, // llvm.x86.avx512bf16.cvtneps2bf16.256
    2, // llvm.x86.avx512bf16.cvtneps2bf16.512
    2, // llvm.x86.avx512bf16.dpbf16ps.128
    2, // llvm.x86.avx512bf16.dpbf16ps.256
    2, // llvm.x86.avx512bf16.dpbf16ps.512
    2, // llvm.x86.avx512bf16.mask.cvtneps2bf16.128
    2, // llvm.x86.bmi.bextr.32
    2, // llvm.x86.bmi.bextr.64
    2, // llvm.x86.bmi.bzhi.32
    2, // llvm.x86.bmi.bzhi.64
    2, // llvm.x86.bmi.pdep.32
    2, // llvm.x86.bmi.pdep.64
    2, // llvm.x86.bmi.pext.32
    2, // llvm.x86.bmi.pext.64
    7, // llvm.x86.cldemote
    7, // llvm.x86.clflushopt
    7, // llvm.x86.clrssbsy
    7, // llvm.x86.clwb
    7, // llvm.x86.clzero
    7, // llvm.x86.directstore32
    7, // llvm.x86.directstore64
    7, // llvm.x86.encodekey128
    7, // llvm.x86.encodekey256
    7, // llvm.x86.enqcmd
    7, // llvm.x86.enqcmds
    7, // llvm.x86.flags.read.u32
    7, // llvm.x86.flags.read.u64
    7, // llvm.x86.flags.write.u32
    7, // llvm.x86.flags.write.u64
    2, // llvm.x86.fma.vfmaddsub.pd
    2, // llvm.x86.fma.vfmaddsub.pd.256
    2, // llvm.x86.fma.vfmaddsub.ps
    2, // llvm.x86.fma.vfmaddsub.ps.256
    7, // llvm.x86.fxrstor
    7, // llvm.x86.fxrstor64
    7, // llvm.x86.fxsave
    7, // llvm.x86.fxsave64
    7, // llvm.x86.incsspd
    7, // llvm.x86.incsspq
    75, // llvm.x86.int
    7, // llvm.x86.invpcid
    7, // llvm.x86.ldtilecfg
    7, // llvm.x86.llwpcb
    7, // llvm.x86.loadiwkey
    195, // llvm.x86.lwpins32
    195, // llvm.x86.lwpins64
    195, // llvm.x86.lwpval32
    195, // llvm.x86.lwpval64
    7, // llvm.x86.mmx.emms
    7, // llvm.x86.mmx.femms
    7, // llvm.x86.mmx.maskmovq
    7, // llvm.x86.mmx.movnt.dq
    2, // llvm.x86.mmx.packssdw
    2, // llvm.x86.mmx.packsswb
    2, // llvm.x86.mmx.packuswb
    2, // llvm.x86.mmx.padd.b
    2, // llvm.x86.mmx.padd.d
    2, // llvm.x86.mmx.padd.q
    2, // llvm.x86.mmx.padd.w
    2, // llvm.x86.mmx.padds.b
    2, // llvm.x86.mmx.padds.w
    2, // llvm.x86.mmx.paddus.b
    2, // llvm.x86.mmx.paddus.w
    32, // llvm.x86.mmx.palignr.b
    2, // llvm.x86.mmx.pand
    2, // llvm.x86.mmx.pandn
    2, // llvm.x86.mmx.pavg.b
    2, // llvm.x86.mmx.pavg.w
    2, // llvm.x86.mmx.pcmpeq.b
    2, // llvm.x86.mmx.pcmpeq.d
    2, // llvm.x86.mmx.pcmpeq.w
    2, // llvm.x86.mmx.pcmpgt.b
    2, // llvm.x86.mmx.pcmpgt.d
    2, // llvm.x86.mmx.pcmpgt.w
    52, // llvm.x86.mmx.pextr.w
    32, // llvm.x86.mmx.pinsr.w
    2, // llvm.x86.mmx.pmadd.wd
    2, // llvm.x86.mmx.pmaxs.w
    2, // llvm.x86.mmx.pmaxu.b
    2, // llvm.x86.mmx.pmins.w
    2, // llvm.x86.mmx.pminu.b
    2, // llvm.x86.mmx.pmovmskb
    2, // llvm.x86.mmx.pmulh.w
    2, // llvm.x86.mmx.pmulhu.w
    2, // llvm.x86.mmx.pmull.w
    2, // llvm.x86.mmx.pmulu.dq
    2, // llvm.x86.mmx.por
    2, // llvm.x86.mmx.psad.bw
    2, // llvm.x86.mmx.psll.d
    2, // llvm.x86.mmx.psll.q
    2, // llvm.x86.mmx.psll.w
    2, // llvm.x86.mmx.pslli.d
    2, // llvm.x86.mmx.pslli.q
    2, // llvm.x86.mmx.pslli.w
    2, // llvm.x86.mmx.psra.d
    2, // llvm.x86.mmx.psra.w
    2, // llvm.x86.mmx.psrai.d
    2, // llvm.x86.mmx.psrai.w
    2, // llvm.x86.mmx.psrl.d
    2, // llvm.x86.mmx.psrl.q
    2, // llvm.x86.mmx.psrl.w
    2, // llvm.x86.mmx.psrli.d
    2, // llvm.x86.mmx.psrli.q
    2, // llvm.x86.mmx.psrli.w
    2, // llvm.x86.mmx.psub.b
    2, // llvm.x86.mmx.psub.d
    2, // llvm.x86.mmx.psub.q
    2, // llvm.x86.mmx.psub.w
    2, // llvm.x86.mmx.psubs.b
    2, // llvm.x86.mmx.psubs.w
    2, // llvm.x86.mmx.psubus.b
    2, // llvm.x86.mmx.psubus.w
    2, // llvm.x86.mmx.punpckhbw
    2, // llvm.x86.mmx.punpckhdq
    2, // llvm.x86.mmx.punpckhwd
    2, // llvm.x86.mmx.punpcklbw
    2, // llvm.x86.mmx.punpckldq
    2, // llvm.x86.mmx.punpcklwd
    2, // llvm.x86.mmx.pxor
    7, // llvm.x86.monitorx
    7, // llvm.x86.movdir64b
    7, // llvm.x86.mwaitx
    32, // llvm.x86.pclmulqdq
    32, // llvm.x86.pclmulqdq.256
    32, // llvm.x86.pclmulqdq.512
    7, // llvm.x86.ptwrite32
    7, // llvm.x86.ptwrite64
    7, // llvm.x86.rdfsbase.32
    7, // llvm.x86.rdfsbase.64
    7, // llvm.x86.rdgsbase.32
    7, // llvm.x86.rdgsbase.64
    7, // llvm.x86.rdpid
    7, // llvm.x86.rdpkru
    7, // llvm.x86.rdpmc
    7, // llvm.x86.rdrand.16
    7, // llvm.x86.rdrand.32
    7, // llvm.x86.rdrand.64
    7, // llvm.x86.rdseed.16
    7, // llvm.x86.rdseed.32
    7, // llvm.x86.rdseed.64
    7, // llvm.x86.rdsspd
    7, // llvm.x86.rdsspq
    7, // llvm.x86.rdtsc
    7, // llvm.x86.rdtscp
    7, // llvm.x86.rstorssp
    7, // llvm.x86.saveprevssp
    7, // llvm.x86.seh.ehguard
    7, // llvm.x86.seh.ehregnode
    2, // llvm.x86.seh.lsda
    7, // llvm.x86.serialize
    7, // llvm.x86.setssbsy
    2, // llvm.x86.sha1msg1
    2, // llvm.x86.sha1msg2
    2, // llvm.x86.sha1nexte
    32, // llvm.x86.sha1rnds4
    2, // llvm.x86.sha256msg1
    2, // llvm.x86.sha256msg2
    2, // llvm.x86.sha256rnds2
    7, // llvm.x86.slwpcb
    32, // llvm.x86.sse.cmp.ps
    32, // llvm.x86.sse.cmp.ss
    2, // llvm.x86.sse.comieq.ss
    2, // llvm.x86.sse.comige.ss
    2, // llvm.x86.sse.comigt.ss
    2, // llvm.x86.sse.comile.ss
    2, // llvm.x86.sse.comilt.ss
    2, // llvm.x86.sse.comineq.ss
    2, // llvm.x86.sse.cvtpd2pi
    2, // llvm.x86.sse.cvtpi2pd
    2, // llvm.x86.sse.cvtpi2ps
    2, // llvm.x86.sse.cvtps2pi
    2, // llvm.x86.sse.cvtss2si
    2, // llvm.x86.sse.cvtss2si64
    2, // llvm.x86.sse.cvttpd2pi
    2, // llvm.x86.sse.cvttps2pi
    2, // llvm.x86.sse.cvttss2si
    2, // llvm.x86.sse.cvttss2si64
    196, // llvm.x86.sse.ldmxcsr
    2, // llvm.x86.sse.max.ps
    2, // llvm.x86.sse.max.ss
    2, // llvm.x86.sse.min.ps
    2, // llvm.x86.sse.min.ss
    2, // llvm.x86.sse.movmsk.ps
    52, // llvm.x86.sse.pshuf.w
    2, // llvm.x86.sse.rcp.ps
    2, // llvm.x86.sse.rcp.ss
    2, // llvm.x86.sse.rsqrt.ps
    2, // llvm.x86.sse.rsqrt.ss
    7, // llvm.x86.sse.sfence
    197, // llvm.x86.sse.stmxcsr
    2, // llvm.x86.sse.ucomieq.ss
    2, // llvm.x86.sse.ucomige.ss
    2, // llvm.x86.sse.ucomigt.ss
    2, // llvm.x86.sse.ucomile.ss
    2, // llvm.x86.sse.ucomilt.ss
    2, // llvm.x86.sse.ucomineq.ss
    7, // llvm.x86.sse2.clflush
    32, // llvm.x86.sse2.cmp.pd
    32, // llvm.x86.sse2.cmp.sd
    2, // llvm.x86.sse2.comieq.sd
    2, // llvm.x86.sse2.comige.sd
    2, // llvm.x86.sse2.comigt.sd
    2, // llvm.x86.sse2.comile.sd
    2, // llvm.x86.sse2.comilt.sd
    2, // llvm.x86.sse2.comineq.sd
    2, // llvm.x86.sse2.cvtpd2dq
    2, // llvm.x86.sse2.cvtpd2ps
    2, // llvm.x86.sse2.cvtps2dq
    2, // llvm.x86.sse2.cvtsd2si
    2, // llvm.x86.sse2.cvtsd2si64
    2, // llvm.x86.sse2.cvtsd2ss
    2, // llvm.x86.sse2.cvttpd2dq
    2, // llvm.x86.sse2.cvttps2dq
    2, // llvm.x86.sse2.cvttsd2si
    2, // llvm.x86.sse2.cvttsd2si64
    7, // llvm.x86.sse2.lfence
    7, // llvm.x86.sse2.maskmov.dqu
    2, // llvm.x86.sse2.max.pd
    2, // llvm.x86.sse2.max.sd
    7, // llvm.x86.sse2.mfence
    2, // llvm.x86.sse2.min.pd
    2, // llvm.x86.sse2.min.sd
    2, // llvm.x86.sse2.movmsk.pd
    2, // llvm.x86.sse2.packssdw.128
    2, // llvm.x86.sse2.packsswb.128
    2, // llvm.x86.sse2.packuswb.128
    7, // llvm.x86.sse2.pause
    2, // llvm.x86.sse2.pavg.b
    2, // llvm.x86.sse2.pavg.w
    2, // llvm.x86.sse2.pmadd.wd
    2, // llvm.x86.sse2.pmovmskb.128
    2, // llvm.x86.sse2.pmulh.w
    2, // llvm.x86.sse2.pmulhu.w
    2, // llvm.x86.sse2.psad.bw
    2, // llvm.x86.sse2.psll.d
    2, // llvm.x86.sse2.psll.q
    2, // llvm.x86.sse2.psll.w
    2, // llvm.x86.sse2.pslli.d
    2, // llvm.x86.sse2.pslli.q
    2, // llvm.x86.sse2.pslli.w
    2, // llvm.x86.sse2.psra.d
    2, // llvm.x86.sse2.psra.w
    2, // llvm.x86.sse2.psrai.d
    2, // llvm.x86.sse2.psrai.w
    2, // llvm.x86.sse2.psrl.d
    2, // llvm.x86.sse2.psrl.q
    2, // llvm.x86.sse2.psrl.w
    2, // llvm.x86.sse2.psrli.d
    2, // llvm.x86.sse2.psrli.q
    2, // llvm.x86.sse2.psrli.w
    2, // llvm.x86.sse2.ucomieq.sd
    2, // llvm.x86.sse2.ucomige.sd
    2, // llvm.x86.sse2.ucomigt.sd
    2, // llvm.x86.sse2.ucomile.sd
    2, // llvm.x86.sse2.ucomilt.sd
    2, // llvm.x86.sse2.ucomineq.sd
    2, // llvm.x86.sse3.addsub.pd
    2, // llvm.x86.sse3.addsub.ps
    2, // llvm.x86.sse3.hadd.pd
    2, // llvm.x86.sse3.hadd.ps
    2, // llvm.x86.sse3.hsub.pd
    2, // llvm.x86.sse3.hsub.ps
    21, // llvm.x86.sse3.ldu.dq
    7, // llvm.x86.sse3.monitor
    7, // llvm.x86.sse3.mwait
    2, // llvm.x86.sse41.blendvpd
    2, // llvm.x86.sse41.blendvps
    32, // llvm.x86.sse41.dppd
    32, // llvm.x86.sse41.dpps
    32, // llvm.x86.sse41.insertps
    32, // llvm.x86.sse41.mpsadbw
    2, // llvm.x86.sse41.packusdw
    2, // llvm.x86.sse41.pblendvb
    2, // llvm.x86.sse41.phminposuw
    2, // llvm.x86.sse41.ptestc
    2, // llvm.x86.sse41.ptestnzc
    2, // llvm.x86.sse41.ptestz
    52, // llvm.x86.sse41.round.pd
    52, // llvm.x86.sse41.round.ps
    32, // llvm.x86.sse41.round.sd
    32, // llvm.x86.sse41.round.ss
    2, // llvm.x86.sse42.crc32.32.16
    2, // llvm.x86.sse42.crc32.32.32
    2, // llvm.x86.sse42.crc32.32.8
    2, // llvm.x86.sse42.crc32.64.64
    68, // llvm.x86.sse42.pcmpestri128
    68, // llvm.x86.sse42.pcmpestria128
    68, // llvm.x86.sse42.pcmpestric128
    68, // llvm.x86.sse42.pcmpestrio128
    68, // llvm.x86.sse42.pcmpestris128
    68, // llvm.x86.sse42.pcmpestriz128
    68, // llvm.x86.sse42.pcmpestrm128
    32, // llvm.x86.sse42.pcmpistri128
    32, // llvm.x86.sse42.pcmpistria128
    32, // llvm.x86.sse42.pcmpistric128
    32, // llvm.x86.sse42.pcmpistrio128
    32, // llvm.x86.sse42.pcmpistris128
    32, // llvm.x86.sse42.pcmpistriz128
    32, // llvm.x86.sse42.pcmpistrm128
    2, // llvm.x86.sse4a.extrq
    51, // llvm.x86.sse4a.extrqi
    2, // llvm.x86.sse4a.insertq
    168, // llvm.x86.sse4a.insertqi
    2, // llvm.x86.ssse3.pabs.b
    2, // llvm.x86.ssse3.pabs.d
    2, // llvm.x86.ssse3.pabs.w
    2, // llvm.x86.ssse3.phadd.d
    2, // llvm.x86.ssse3.phadd.d.128
    2, // llvm.x86.ssse3.phadd.sw
    2, // llvm.x86.ssse3.phadd.sw.128
    2, // llvm.x86.ssse3.phadd.w
    2, // llvm.x86.ssse3.phadd.w.128
    2, // llvm.x86.ssse3.phsub.d
    2, // llvm.x86.ssse3.phsub.d.128
    2, // llvm.x86.ssse3.phsub.sw
    2, // llvm.x86.ssse3.phsub.sw.128
    2, // llvm.x86.ssse3.phsub.w
    2, // llvm.x86.ssse3.phsub.w.128
    2, // llvm.x86.ssse3.pmadd.ub.sw
    2, // llvm.x86.ssse3.pmadd.ub.sw.128
    2, // llvm.x86.ssse3.pmul.hr.sw
    2, // llvm.x86.ssse3.pmul.hr.sw.128
    2, // llvm.x86.ssse3.pshuf.b
    2, // llvm.x86.ssse3.pshuf.b.128
    2, // llvm.x86.ssse3.psign.b
    2, // llvm.x86.ssse3.psign.b.128
    2, // llvm.x86.ssse3.psign.d
    2, // llvm.x86.ssse3.psign.d.128
    2, // llvm.x86.ssse3.psign.w
    2, // llvm.x86.ssse3.psign.w.128
    7, // llvm.x86.sttilecfg
    2, // llvm.x86.subborrow.32
    2, // llvm.x86.subborrow.64
    52, // llvm.x86.tbm.bextri.u32
    52, // llvm.x86.tbm.bextri.u64
    163, // llvm.x86.tdpbf16ps
    163, // llvm.x86.tdpbssd
    163, // llvm.x86.tdpbsud
    163, // llvm.x86.tdpbusd
    163, // llvm.x86.tdpbuud
    75, // llvm.x86.tileloadd64
    75, // llvm.x86.tileloaddt164
    7, // llvm.x86.tilerelease
    75, // llvm.x86.tilestored64
    75, // llvm.x86.tilezero
    7, // llvm.x86.tpause
    7, // llvm.x86.umonitor
    7, // llvm.x86.umwait
    52, // llvm.x86.vcvtps2ph.128
    52, // llvm.x86.vcvtps2ph.256
    32, // llvm.x86.vgf2p8affineinvqb.128
    32, // llvm.x86.vgf2p8affineinvqb.256
    32, // llvm.x86.vgf2p8affineinvqb.512
    32, // llvm.x86.vgf2p8affineqb.128
    32, // llvm.x86.vgf2p8affineqb.256
    32, // llvm.x86.vgf2p8affineqb.512
    2, // llvm.x86.vgf2p8mulb.128
    2, // llvm.x86.vgf2p8mulb.256
    2, // llvm.x86.vgf2p8mulb.512
    7, // llvm.x86.wbinvd
    7, // llvm.x86.wbnoinvd
    7, // llvm.x86.wrfsbase.32
    7, // llvm.x86.wrfsbase.64
    7, // llvm.x86.wrgsbase.32
    7, // llvm.x86.wrgsbase.64
    7, // llvm.x86.wrpkru
    7, // llvm.x86.wrssd
    7, // llvm.x86.wrssq
    7, // llvm.x86.wrussd
    7, // llvm.x86.wrussq
    75, // llvm.x86.xabort
    7, // llvm.x86.xbegin
    7, // llvm.x86.xend
    7, // llvm.x86.xgetbv
    2, // llvm.x86.xop.vfrcz.pd
    2, // llvm.x86.xop.vfrcz.pd.256
    2, // llvm.x86.xop.vfrcz.ps
    2, // llvm.x86.xop.vfrcz.ps.256
    2, // llvm.x86.xop.vfrcz.sd
    2, // llvm.x86.xop.vfrcz.ss
    66, // llvm.x86.xop.vpermil2pd
    66, // llvm.x86.xop.vpermil2pd.256
    66, // llvm.x86.xop.vpermil2ps
    66, // llvm.x86.xop.vpermil2ps.256
    2, // llvm.x86.xop.vphaddbd
    2, // llvm.x86.xop.vphaddbq
    2, // llvm.x86.xop.vphaddbw
    2, // llvm.x86.xop.vphadddq
    2, // llvm.x86.xop.vphaddubd
    2, // llvm.x86.xop.vphaddubq
    2, // llvm.x86.xop.vphaddubw
    2, // llvm.x86.xop.vphaddudq
    2, // llvm.x86.xop.vphadduwd
    2, // llvm.x86.xop.vphadduwq
    2, // llvm.x86.xop.vphaddwd
    2, // llvm.x86.xop.vphaddwq
    2, // llvm.x86.xop.vphsubbw
    2, // llvm.x86.xop.vphsubdq
    2, // llvm.x86.xop.vphsubwd
    2, // llvm.x86.xop.vpmacsdd
    2, // llvm.x86.xop.vpmacsdqh
    2, // llvm.x86.xop.vpmacsdql
    2, // llvm.x86.xop.vpmacssdd
    2, // llvm.x86.xop.vpmacssdqh
    2, // llvm.x86.xop.vpmacssdql
    2, // llvm.x86.xop.vpmacsswd
    2, // llvm.x86.xop.vpmacssww
    2, // llvm.x86.xop.vpmacswd
    2, // llvm.x86.xop.vpmacsww
    2, // llvm.x86.xop.vpmadcsswd
    2, // llvm.x86.xop.vpmadcswd
    2, // llvm.x86.xop.vpperm
    2, // llvm.x86.xop.vpshab
    2, // llvm.x86.xop.vpshad
    2, // llvm.x86.xop.vpshaq
    2, // llvm.x86.xop.vpshaw
    2, // llvm.x86.xop.vpshlb
    2, // llvm.x86.xop.vpshld
    2, // llvm.x86.xop.vpshlq
    2, // llvm.x86.xop.vpshlw
    7, // llvm.x86.xresldtrk
    7, // llvm.x86.xrstor
    7, // llvm.x86.xrstor64
    7, // llvm.x86.xrstors
    7, // llvm.x86.xrstors64
    7, // llvm.x86.xsave
    7, // llvm.x86.xsave64
    7, // llvm.x86.xsavec
    7, // llvm.x86.xsavec64
    7, // llvm.x86.xsaveopt
    7, // llvm.x86.xsaveopt64
    7, // llvm.x86.xsaves
    7, // llvm.x86.xsaves64
    7, // llvm.x86.xsetbv
    7, // llvm.x86.xsusldtrk
    7, // llvm.x86.xtest
    2, // llvm.xcore.bitrev
    7, // llvm.xcore.checkevent
    198, // llvm.xcore.chkct
    7, // llvm.xcore.clre
    198, // llvm.xcore.clrpt
    7, // llvm.xcore.clrsr
    2, // llvm.xcore.crc32
    2, // llvm.xcore.crc8
    198, // llvm.xcore.edu
    198, // llvm.xcore.eeu
    198, // llvm.xcore.endin
    198, // llvm.xcore.freer
    7, // llvm.xcore.geted
    7, // llvm.xcore.getet
    2, // llvm.xcore.getid
    7, // llvm.xcore.getps
    7, // llvm.xcore.getr
    198, // llvm.xcore.getst
    198, // llvm.xcore.getts
    198, // llvm.xcore.in
    198, // llvm.xcore.inct
    198, // llvm.xcore.initcp
    198, // llvm.xcore.initdp
    198, // llvm.xcore.initlr
    198, // llvm.xcore.initpc
    198, // llvm.xcore.initsp
    198, // llvm.xcore.inshr
    198, // llvm.xcore.int
    198, // llvm.xcore.mjoin
    198, // llvm.xcore.msync
    198, // llvm.xcore.out
    198, // llvm.xcore.outct
    198, // llvm.xcore.outshr
    198, // llvm.xcore.outt
    198, // llvm.xcore.peek
    198, // llvm.xcore.setc
    199, // llvm.xcore.setclk
    198, // llvm.xcore.setd
    198, // llvm.xcore.setev
    7, // llvm.xcore.setps
    198, // llvm.xcore.setpsc
    198, // llvm.xcore.setpt
    199, // llvm.xcore.setrdy
    7, // llvm.xcore.setsr
    198, // llvm.xcore.settw
    198, // llvm.xcore.setv
    2, // llvm.xcore.sext
    7, // llvm.xcore.ssync
    198, // llvm.xcore.syncr
    198, // llvm.xcore.testct
    198, // llvm.xcore.testwct
    21, // llvm.xcore.waitevent
    2, // llvm.xcore.zext
  };

  AttributeList AS[9];
  unsigned NumAttrs = 0;
  if (id != 0) {
    switch(IntrinsicsToAttributesMap[id - 1]) {
    default: llvm_unreachable("Invalid attribute number");
    case 7: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 198: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 199: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 75: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 159: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 163: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 162: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[4] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[5] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 6;
      break;
      }
    case 157: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[4] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[5] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[6] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 7;
      break;
      }
    case 160: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[4] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[5] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 6;
      break;
      }
    case 161: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 10: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 174: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 195: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 189: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 79: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 70: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::InaccessibleMemOrArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 71: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::InaccessibleMemOrArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 164: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 28: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 12: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 172: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 171: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 178: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 179: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 180: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 25: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 60: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 69: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 61: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 169: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 62: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 63: {
      const Attribute::AttrKind AttrParam6[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 177: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::InaccessibleMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 27: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::InaccessibleMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 65: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 57: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 58: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 170: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 72: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly,Attribute::ArgMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 64: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 21: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 173: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 74: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 20: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 188: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 3: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 175: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 17: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 13: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 14: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ReadNone};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 73: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 158: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 2: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 16: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 55: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::Returned};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 15: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ReadNone};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ReadNone};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 24: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 152: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 153: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 154: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 155: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 156: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 52: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 51: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 192: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 32: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 168: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 190: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 193: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 66: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 67: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 191: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 68: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 194: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 53: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 185: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::InaccessibleMemOrArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 184: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::InaccessibleMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 197: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly,Attribute::ArgMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 196: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 59: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 141: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 183: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Speculatable,Attribute::ReadNone};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 149: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Convergent};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 124: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Convergent};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 125: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Convergent};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 176: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Convergent,Attribute::InaccessibleMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 4: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 87: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[4] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[5] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[6] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[7] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 8;
      break;
      }
    case 5: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoUndef};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 95: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 77: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 96: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 78: {
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 97: {
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 142: {
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 98: {
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 99: {
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind AttrParam9[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 9, AttrParam9);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 50: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::InaccessibleMemOrArgMemOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 94: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 46: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::NoAlias,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::NoAlias,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ArgMemOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 44: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::NoAlias,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::NoAlias,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ArgMemOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 45: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ArgMemOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 47: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ArgMemOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 76: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ArgMemOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 30: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 29: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 19: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::InaccessibleMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 120: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 121: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 122: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 123: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind AttrParam9[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 9, AttrParam9);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 38: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 135: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 81: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 144: {
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 146: {
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 148: {
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind AttrParam9[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 9, AttrParam9);
      const Attribute::AttrKind AttrParam10[]= {Attribute::ImmArg};
      AS[4] = AttributeList::get(C, 10, AttrParam10);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly};
      AS[5] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 6;
      break;
      }
    case 34: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly,Attribute::ArgMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 48: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 39: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 91: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly,Attribute::InaccessibleMemOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 90: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::WriteOnly,Attribute::InaccessibleMemOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 35: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 110: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 111: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 114: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 112: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 100: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 113: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 101: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind AttrParam9[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 9, AttrParam9);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 102: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind AttrParam9[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 9, AttrParam9);
      const Attribute::AttrKind AttrParam10[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 10, AttrParam10);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 103: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam9[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 9, AttrParam9);
      const Attribute::AttrKind AttrParam10[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 10, AttrParam10);
      const Attribute::AttrKind AttrParam11[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 11, AttrParam11);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 104: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam10[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 10, AttrParam10);
      const Attribute::AttrKind AttrParam11[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 11, AttrParam11);
      const Attribute::AttrKind AttrParam12[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 12, AttrParam12);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 105: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam11[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 11, AttrParam11);
      const Attribute::AttrKind AttrParam12[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 12, AttrParam12);
      const Attribute::AttrKind AttrParam13[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 13, AttrParam13);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 115: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam12[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 12, AttrParam12);
      const Attribute::AttrKind AttrParam13[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 13, AttrParam13);
      const Attribute::AttrKind AttrParam14[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 14, AttrParam14);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 117: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam13[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 13, AttrParam13);
      const Attribute::AttrKind AttrParam14[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 14, AttrParam14);
      const Attribute::AttrKind AttrParam15[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 15, AttrParam15);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 116: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam14[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 14, AttrParam14);
      const Attribute::AttrKind AttrParam15[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 15, AttrParam15);
      const Attribute::AttrKind AttrParam16[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 16, AttrParam16);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 118: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam15[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 15, AttrParam15);
      const Attribute::AttrKind AttrParam16[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 16, AttrParam16);
      const Attribute::AttrKind AttrParam17[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 17, AttrParam17);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 119: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam16[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 16, AttrParam16);
      const Attribute::AttrKind AttrParam17[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 17, AttrParam17);
      const Attribute::AttrKind AttrParam18[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 18, AttrParam18);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 36: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 134: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 80: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 143: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 145: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 147: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind AttrParam9[]= {Attribute::ImmArg};
      AS[4] = AttributeList::get(C, 9, AttrParam9);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly};
      AS[5] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 6;
      break;
      }
    case 37: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly,Attribute::ArgMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 139: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadOnly,Attribute::InaccessibleMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 9: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadNone};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 109: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadNone};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 106: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadNone};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 107: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadNone};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 108: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam7[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 7, AttrParam7);
      const Attribute::AttrKind AttrParam8[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 8, AttrParam8);
      const Attribute::AttrKind AttrParam9[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 9, AttrParam9);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadNone};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 137: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 82: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 138: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 23: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::InaccessibleMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 140: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadOnly,Attribute::InaccessibleMemOnly};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 6: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 83: {
      const Attribute::AttrKind AttrParam0[]= {Attribute::Alignment};
      const uint64_t AttrValParam0[]= {4};
      AS[0] = AttributeList::get(C, 0, AttrParam0, AttrValParam0);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 130: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 126: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 1: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 127: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 49: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 54: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 128: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 129: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 93: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 89: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 84: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::ArgMemOnly};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 85: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::InaccessibleMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 86: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::WriteOnly,Attribute::InaccessibleMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 31: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::ReadNone};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 88: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 132: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::ReadNone};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 92: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 150: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::ReadNone};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 131: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::ReadNone};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 133: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 136: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 151: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::Convergent,Attribute::Speculatable,Attribute::ReadNone};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 41: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind AttrParam6[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoSync,Attribute::WillReturn,Attribute::WriteOnly,Attribute::ArgMemOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 40: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoSync,Attribute::WillReturn,Attribute::ReadOnly,Attribute::ArgMemOnly};
      AS[4] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 5;
      break;
      }
    case 26: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoSync,Attribute::WillReturn,Attribute::ReadNone};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 43: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoSync,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 42: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 3, AttrParam3);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoSync,Attribute::WillReturn,Attribute::Speculatable,Attribute::ReadNone};
      AS[3] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 4;
      break;
      }
    case 18: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoReturn};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 56: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoReturn,Attribute::Cold};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 33: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoDuplicate};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 182: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoDuplicate,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 8: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WillReturn,Attribute::NoDuplicate,Attribute::InaccessibleMemOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 11: {
      return AttributeList();
      }
    case 22: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[1] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam4[]= {Attribute::ImmArg};
      AS[2] = AttributeList::get(C, 4, AttrParam4);
      const Attribute::AttrKind AttrParam5[]= {Attribute::ImmArg};
      AS[3] = AttributeList::get(C, 5, AttrParam5);
      NumAttrs = 4;
      break;
      }
    case 165: {
      const Attribute::AttrKind Atts[] = {Attribute::ReadNone};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 167: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 166: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::ReadNone};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 186: {
      const Attribute::AttrKind Atts[] = {Attribute::NoReturn};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 187: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::ImmArg};
      AS[0] = AttributeList::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoReturn};
      AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 181: {
      const Attribute::AttrKind Atts[] = {Attribute::NoReturn,Attribute::WriteOnly};
      AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    }
  }
  return AttributeList::get(C, makeArrayRef(AS, NumAttrs));
}
#endif // GET_INTRINSIC_ATTRIBUTES

// Get the LLVM intrinsic that corresponds to a builtin.
// This is used by the C front-end.  The builtin name is passed
// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed
// in as TargetPrefix.  The result is assigned to 'IntrinsicID'.
#ifdef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
Intrinsic::ID Intrinsic::getIntrinsicForGCCBuiltin(const char *TargetPrefixStr, StringRef BuiltinNameStr) {
  static const char BuiltinNames[] = {
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'd', 'j', 'u', 's',
  't', '_', 't', 'r', 'a', 'm', 'p', 'o', 'l', 'i', 'n', 'e', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'd', 'e', 'b', 'u', 'g', 't', 'r',
  'a', 'p', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'u', 'n',
  'w', 'i', 'n', 'd', '_', 'i', 'n', 'i', 't', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 'i', 'n', 'i', 't', '_', 't', 'r', 'a', 'm', 'p',
  'o', 'l', 'i', 'n', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 'o', 'b', 'j', 'e', 'c', 't', '_', 's', 'i', 'z', 'e', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 's', 't', 'a', 'c', 'k', '_', 'r',
  'e', 's', 't', 'o', 'r', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 's', 't', 'a', 'c', 'k', '_', 's', 'a', 'v', 'e', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 't', 'h', 'r', 'e', 'a', 'd', '_',
  'p', 'o', 'i', 'n', 't', 'e', 'r', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 't', 'r', 'a', 'p', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'a', 'r', 'm', '_', 'd', 'm', 'b', '\000', '_', '_', 'b', 'u',
  'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'd', 's', 'b', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'i', 's',
  'b', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 's', 'v', 'e',
  '_', 's', 'v', 'a', 'e', 's', 'd', '_', 'u', '8', '\000', '_', '_', 'b', 'u',
  'i', 'l', 't', 'i', 'n', '_', 's', 'v', 'e', '_', 's', 'v', 'a', 'e', 's',
  'e', '_', 'u', '8', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
  's', 'v', 'e', '_', 's', 'v', 'a', 'e', 's', 'i', 'm', 'c', '_', 'u', '8',
  '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 's', 'v', 'e', '_',
  's', 'v', 'a', 'e', 's', 'm', 'c', '_', 'u', '8', '\000', '_', '_', 'b', 'u',
  'i', 'l', 't', 'i', 'n', '_', 's', 'v', 'e', '_', 's', 'v', 'r', 'a', 'x',
  '1', '_', 'u', '6', '4', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 's', 'v', 'e', '_', 's', 'v', 'r', 'd', 'f', 'f', 'r', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 's', 'v', 'e', '_', 's', 'v', 'r',
  'd', 'f', 'f', 'r', '_', 'z', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 's', 'v', 'e', '_', 's', 'v', 's', 'e', 't', 'f', 'f', 'r', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 's', 'v', 'e', '_', 's',
  'v', 's', 'm', '4', 'e', '_', 'u', '3', '2', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 's', 'v', 'e', '_', 's', 'v', 's', 'm', '4', 'e',
  'k', 'e', 'y', '_', 'u', '3', '2', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 's', 'v', 'e', '_', 's', 'v', 'w', 'r', 'f', 'f', 'r', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 't',
  'c', 'a', 'n', 'c', 'e', 'l', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 'a', 'r', 'm', '_', 't', 'c', 'o', 'm', 'm', 'i', 't', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 't', 's',
  't', 'a', 'r', 't', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
  'a', 'r', 'm', '_', 't', 't', 'e', 's', 't', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'a', 'l', 'i',
  'g', 'n', 'b', 'y', 't', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'b', 'u', 'f', 'f', 'e', 'r',
  '_', 'w', 'b', 'i', 'n', 'v', 'l', '1', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'b', 'u', 'f', 'f',
  'e', 'r', '_', 'w', 'b', 'i', 'n', 'v', 'l', '1', '_', 's', 'c', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n',
  '_', 'b', 'u', 'f', 'f', 'e', 'r', '_', 'w', 'b', 'i', 'n', 'v', 'l', '1',
  '_', 'v', 'o', 'l', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
  'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'u', 'b', 'e', 'i', 'd', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n',
  '_', 'c', 'u', 'b', 'e', 'm', 'a', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'u', 'b', 'e', 's',
  'c', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd',
  'g', 'c', 'n', '_', 'c', 'u', 'b', 'e', 't', 'c', '\000', '_', '_', 'b', 'u',
  'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'v',
  't', '_', 'p', 'k', '_', 'i', '1', '6', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'v', 't', '_',
  'p', 'k', '_', 'u', '1', '6', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'v', 't', '_', 'p', 'k',
  '_', 'u', '8', '_', 'f', '3', '2', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'v', 't', '_', 'p',
  'k', 'n', 'o', 'r', 'm', '_', 'i', '1', '6', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'v', 't',
  '_', 'p', 'k', 'n', 'o', 'r', 'm', '_', 'u', '1', '6', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c',
  'v', 't', '_', 'p', 'k', 'r', 't', 'z', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 'i', 's', 'p',
  'a', 't', 'c', 'h', '_', 'i', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_', 'b', 'p',
  'e', 'r', 'm', 'u', 't', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_', 'g', 'w', 's',
  '_', 'b', 'a', 'r', 'r', 'i', 'e', 'r', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_', 'g',
  'w', 's', '_', 'i', 'n', 'i', 't', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_', 'g', 'w',
  's', '_', 's', 'e', 'm', 'a', '_', 'b', 'r', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_',
  'g', 'w', 's', '_', 's', 'e', 'm', 'a', '_', 'p', '\000', '_', '_', 'b', 'u',
  'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's',
  '_', 'g', 'w', 's', '_', 's', 'e', 'm', 'a', '_', 'r', 'e', 'l', 'e', 'a',
  's', 'e', '_', 'a', 'l', 'l', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_', 'g', 'w', 's',
  '_', 's', 'e', 'm', 'a', '_', 'v', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_', 'p', 'e',
  'r', 'm', 'u', 't', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_', 's', 'w', 'i', 'z',
  'z', 'l', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a',
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  'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 't', 'i', 'l', 'e',
  'z', 'e', 'r', 'o', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
  'i', 'a', '3', '2', '_', 't', 'p', 'a', 'u', 's', 'e', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'u', 'm', 'o',
  'n', 'i', 't', 'o', 'r', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 'i', 'a', '3', '2', '_', 'u', 'm', 'w', 'a', 'i', 't', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'c',
  'v', 't', 'p', 's', '2', 'p', 'h', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'c', 'v', 't', 'p', 's', '2',
  'p', 'h', '2', '5', '6', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 'i', 'a', '3', '2', '_', 'v', 'g', 'f', '2', 'p', '8', 'a', 'f', 'f',
  'i', 'n', 'e', 'i', 'n', 'v', 'q', 'b', '_', 'v', '1', '6', 'q', 'i', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
  'v', 'g', 'f', '2', 'p', '8', 'a', 'f', 'f', 'i', 'n', 'e', 'i', 'n', 'v',
  'q', 'b', '_', 'v', '3', '2', 'q', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'g', 'f', '2', 'p', '8',
  'a', 'f', 'f', 'i', 'n', 'e', 'i', 'n', 'v', 'q', 'b', '_', 'v', '6', '4',
  'q', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
  '3', '2', '_', 'v', 'g', 'f', '2', 'p', '8', 'a', 'f', 'f', 'i', 'n', 'e',
  'q', 'b', '_', 'v', '1', '6', 'q', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'g', 'f', '2', 'p', '8',
  'a', 'f', 'f', 'i', 'n', 'e', 'q', 'b', '_', 'v', '3', '2', 'q', 'i', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
  'v', 'g', 'f', '2', 'p', '8', 'a', 'f', 'f', 'i', 'n', 'e', 'q', 'b', '_',
  'v', '6', '4', 'q', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 'i', 'a', '3', '2', '_', 'v', 'g', 'f', '2', 'p', '8', 'm', 'u', 'l',
  'b', '_', 'v', '1', '6', 'q', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'g', 'f', '2', 'p', '8', 'm',
  'u', 'l', 'b', '_', 'v', '3', '2', 'q', 'i', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'g', 'f', '2', 'p',
  '8', 'm', 'u', 'l', 'b', '_', 'v', '6', '4', 'q', 'i', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'w', 'b', 'i',
  'n', 'v', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
  'a', '3', '2', '_', 'w', 'b', 'n', 'o', 'i', 'n', 'v', 'd', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'w', 'r',
  'f', 's', 'b', 'a', 's', 'e', '3', '2', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'w', 'r', 'f', 's', 'b', 'a',
  's', 'e', '6', '4', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
  'i', 'a', '3', '2', '_', 'w', 'r', 'g', 's', 'b', 'a', 's', 'e', '3', '2',
  '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2',
  '_', 'w', 'r', 'g', 's', 'b', 'a', 's', 'e', '6', '4', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'w', 'r', 'p',
  'k', 'r', 'u', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
  'a', '3', '2', '_', 'w', 'r', 's', 's', 'd', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'w', 'r', 's', 's', 'q',
  '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2',
  '_', 'w', 'r', 'u', 's', 's', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'i', 'a', '3', '2', '_', 'w', 'r', 'u', 's', 's', 'q', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
  'x', 'a', 'b', 'o', 'r', 't', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 'i', 'a', '3', '2', '_', 'x', 'b', 'e', 'g', 'i', 'n', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'x',
  'e', 'n', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
  'a', '3', '2', '_', 'v', 'f', 'r', 'c', 'z', 'p', 'd', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'f', 'r',
  'c', 'z', 'p', 'd', '2', '5', '6', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'f', 'r', 'c', 'z', 'p', 's',
  '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2',
  '_', 'v', 'f', 'r', 'c', 'z', 'p', 's', '2', '5', '6', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'f', 'r',
  'c', 'z', 's', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
  'i', 'a', '3', '2', '_', 'v', 'f', 'r', 'c', 'z', 's', 's', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p',
  'e', 'r', 'm', 'i', 'l', '2', 'p', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'e', 'r', 'm', 'i',
  'l', '2', 'p', 'd', '2', '5', '6', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'e', 'r', 'm', 'i', 'l',
  '2', 'p', 's', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
  'a', '3', '2', '_', 'v', 'p', 'e', 'r', 'm', 'i', 'l', '2', 'p', 's', '2',
  '5', '6', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
  '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'b', 'd', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h',
  'a', 'd', 'd', 'b', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'b', 'w', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
  'v', 'p', 'h', 'a', 'd', 'd', 'd', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd',
  'u', 'b', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
  'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'b', 'q', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
  'p', 'h', 'a', 'd', 'd', 'u', 'b', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd',
  'u', 'd', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
  'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'w', 'd', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
  'p', 'h', 'a', 'd', 'd', 'u', 'w', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd',
  'w', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
  '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'w', 'q', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h',
  's', 'u', 'b', 'b', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 's', 'u', 'b', 'd', 'q', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
  'v', 'p', 'h', 's', 'u', 'b', 'w', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's',
  'd', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
  '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's', 'd', 'q', 'h', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p',
  'm', 'a', 'c', 's', 'd', 'q', 'l', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's', 's',
  'd', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
  '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's', 's', 'd', 'q', 'h', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
  'p', 'm', 'a', 'c', 's', 's', 'd', 'q', 'l', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c',
  's', 's', 'w', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
  'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's', 's', 'w', 'w', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
  'v', 'p', 'm', 'a', 'c', 's', 'w', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's',
  'w', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
  '3', '2', '_', 'v', 'p', 'm', 'a', 'd', 'c', 's', 's', 'w', 'd', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
  'p', 'm', 'a', 'd', 'c', 's', 'w', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l',
  't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'p', 'e', 'r', 'm',
  '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2',
  '_', 'v', 'p', 's', 'h', 'a', 'b', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 's', 'h', 'a', 'd', '\000',
  '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
  'v', 'p', 's', 'h', 'a', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 's', 'h', 'a', 'w', '\000', '_',
  '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
  'p', 's', 'h', 'l', 'b', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
  '_', 'i', 'a', '3', '2', '_', 'v', 'p', 's', 'h', 'l', 'd', '\000', '_', '_',
  'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p',
  's', 'h', 'l', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
  'i', 'a', '3', '2', '_', 'v', 'p', 's', 'h', 'l', 'w', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'x', 'r', 'e',
  's', 'l', 'd', 't', 'r', 'k', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
  'n', '_', 'i', 'a', '3', '2', '_', 'x', 's', 'u', 's', 'l', 'd', 't', 'r',
  'k', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3',
  '2', '_', 'x', 't', 'e', 's', 't', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
  'i', 'n', '_', 'b', 'i', 't', 'r', 'e', 'v', '\000', '_', '_', 'b', 'u', 'i',
  'l', 't', 'i', 'n', '_', 'g', 'e', 't', 'i', 'd', '\000', '_', '_', 'b', 'u',
  'i', 'l', 't', 'i', 'n', '_', 'g', 'e', 't', 'p', 's', '\000', '_', '_', 'b',
  'u', 'i', 'l', 't', 'i', 'n', '_', 's', 'e', 't', 'p', 's', '\000',
  };

  struct BuiltinEntry {
    Intrinsic::ID IntrinID;
    unsigned StrTabOffset;
    const char *getName() const {
      return &BuiltinNames[StrTabOffset];
    }
    bool operator<(StringRef RHS) const {
      return strncmp(getName(), RHS.data(), RHS.size()) < 0;
    }
  };
  StringRef TargetPrefix(TargetPrefixStr);

  /* Target Independent Builtins */ {
    static const BuiltinEntry Names[] = {
      {Intrinsic::adjust_trampoline, 0}, // __builtin_adjust_trampoline
      {Intrinsic::debugtrap, 28}, // __builtin_debugtrap
      {Intrinsic::init_trampoline, 70}, // __builtin_init_trampoline
      {Intrinsic::objectsize, 96}, // __builtin_object_size
      {Intrinsic::stackrestore, 118}, // __builtin_stack_restore
      {Intrinsic::stacksave, 142}, // __builtin_stack_save
      {Intrinsic::thread_pointer, 163}, // __builtin_thread_pointer
      {Intrinsic::trap, 188}, // __builtin_trap
      {Intrinsic::eh_unwind_init, 48}, // __builtin_unwind_init
    };
    auto I = std::lower_bound(std::begin(Names),
                              std::end(Names),
                              BuiltinNameStr);
    if (I != std::end(Names) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "aarch64") {
    static const BuiltinEntry aarch64Names[] = {
      {Intrinsic::aarch64_dmb, 203}, // __builtin_arm_dmb
      {Intrinsic::aarch64_dsb, 221}, // __builtin_arm_dsb
      {Intrinsic::aarch64_isb, 239}, // __builtin_arm_isb
      {Intrinsic::aarch64_tcancel, 525}, // __builtin_arm_tcancel
      {Intrinsic::aarch64_tcommit, 547}, // __builtin_arm_tcommit
      {Intrinsic::aarch64_tstart, 569}, // __builtin_arm_tstart
      {Intrinsic::aarch64_ttest, 590}, // __builtin_arm_ttest
      {Intrinsic::aarch64_sve_aesd, 257}, // __builtin_sve_svaesd_u8
      {Intrinsic::aarch64_sve_aese, 281}, // __builtin_sve_svaese_u8
      {Intrinsic::aarch64_sve_aesimc, 305}, // __builtin_sve_svaesimc_u8
      {Intrinsic::aarch64_sve_aesmc, 331}, // __builtin_sve_svaesmc_u8
      {Intrinsic::aarch64_sve_rax1, 356}, // __builtin_sve_svrax1_u64
      {Intrinsic::aarch64_sve_rdffr, 381}, // __builtin_sve_svrdffr
      {Intrinsic::aarch64_sve_rdffr_z, 403}, // __builtin_sve_svrdffr_z
      {Intrinsic::aarch64_sve_setffr, 427}, // __builtin_sve_svsetffr
      {Intrinsic::aarch64_sve_sm4e, 450}, // __builtin_sve_svsm4e_u32
      {Intrinsic::aarch64_sve_sm4ekey, 475}, // __builtin_sve_svsm4ekey_u32
      {Intrinsic::aarch64_sve_wrffr, 503}, // __builtin_sve_svwrffr
    };
    auto I = std::lower_bound(std::begin(aarch64Names),
                              std::end(aarch64Names),
                              BuiltinNameStr);
    if (I != std::end(aarch64Names) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "amdgcn") {
    static const BuiltinEntry amdgcnNames[] = {
      {Intrinsic::amdgcn_alignbyte, 610}, // __builtin_amdgcn_alignbyte
      {Intrinsic::amdgcn_buffer_wbinvl1, 637}, // __builtin_amdgcn_buffer_wbinvl1
      {Intrinsic::amdgcn_buffer_wbinvl1_sc, 669}, // __builtin_amdgcn_buffer_wbinvl1_sc
      {Intrinsic::amdgcn_buffer_wbinvl1_vol, 704}, // __builtin_amdgcn_buffer_wbinvl1_vol
      {Intrinsic::amdgcn_cubeid, 740}, // __builtin_amdgcn_cubeid
      {Intrinsic::amdgcn_cubema, 764}, // __builtin_amdgcn_cubema
      {Intrinsic::amdgcn_cubesc, 788}, // __builtin_amdgcn_cubesc
      {Intrinsic::amdgcn_cubetc, 812}, // __builtin_amdgcn_cubetc
      {Intrinsic::amdgcn_cvt_pk_i16, 836}, // __builtin_amdgcn_cvt_pk_i16
      {Intrinsic::amdgcn_cvt_pk_u16, 864}, // __builtin_amdgcn_cvt_pk_u16
      {Intrinsic::amdgcn_cvt_pk_u8_f32, 892}, // __builtin_amdgcn_cvt_pk_u8_f32
      {Intrinsic::amdgcn_cvt_pknorm_i16, 923}, // __builtin_amdgcn_cvt_pknorm_i16
      {Intrinsic::amdgcn_cvt_pknorm_u16, 955}, // __builtin_amdgcn_cvt_pknorm_u16
      {Intrinsic::amdgcn_cvt_pkrtz, 987}, // __builtin_amdgcn_cvt_pkrtz
      {Intrinsic::amdgcn_dispatch_id, 1014}, // __builtin_amdgcn_dispatch_id
      {Intrinsic::amdgcn_ds_bpermute, 1043}, // __builtin_amdgcn_ds_bpermute
      {Intrinsic::amdgcn_ds_gws_barrier, 1072}, // __builtin_amdgcn_ds_gws_barrier
      {Intrinsic::amdgcn_ds_gws_init, 1104}, // __builtin_amdgcn_ds_gws_init
      {Intrinsic::amdgcn_ds_gws_sema_br, 1133}, // __builtin_amdgcn_ds_gws_sema_br
      {Intrinsic::amdgcn_ds_gws_sema_p, 1165}, // __builtin_amdgcn_ds_gws_sema_p
      {Intrinsic::amdgcn_ds_gws_sema_release_all, 1196}, // __builtin_amdgcn_ds_gws_sema_release_all
      {Intrinsic::amdgcn_ds_gws_sema_v, 1237}, // __builtin_amdgcn_ds_gws_sema_v
      {Intrinsic::amdgcn_ds_permute, 1268}, // __builtin_amdgcn_ds_permute
      {Intrinsic::amdgcn_ds_swizzle, 1296}, // __builtin_amdgcn_ds_swizzle
      {Intrinsic::amdgcn_fdot2, 1324}, // __builtin_amdgcn_fdot2
      {Intrinsic::amdgcn_fmed3, 1347}, // __builtin_amdgcn_fmed3
      {Intrinsic::amdgcn_fmul_legacy, 1370}, // __builtin_amdgcn_fmul_legacy
      {Intrinsic::amdgcn_groupstaticsize, 1399}, // __builtin_amdgcn_groupstaticsize
      {Intrinsic::amdgcn_implicit_buffer_ptr, 1432}, // __builtin_amdgcn_implicit_buffer_ptr
      {Intrinsic::amdgcn_implicitarg_ptr, 1469}, // __builtin_amdgcn_implicitarg_ptr
      {Intrinsic::amdgcn_interp_mov, 1502}, // __builtin_amdgcn_interp_mov
      {Intrinsic::amdgcn_interp_p1, 1530}, // __builtin_amdgcn_interp_p1
      {Intrinsic::amdgcn_interp_p1_f16, 1557}, // __builtin_amdgcn_interp_p1_f16
      {Intrinsic::amdgcn_interp_p2, 1588}, // __builtin_amdgcn_interp_p2
      {Intrinsic::amdgcn_interp_p2_f16, 1615}, // __builtin_amdgcn_interp_p2_f16
      {Intrinsic::amdgcn_is_private, 1646}, // __builtin_amdgcn_is_private
      {Intrinsic::amdgcn_is_shared, 1674}, // __builtin_amdgcn_is_shared
      {Intrinsic::amdgcn_kernarg_segment_ptr, 1701}, // __builtin_amdgcn_kernarg_segment_ptr
      {Intrinsic::amdgcn_lerp, 1738}, // __builtin_amdgcn_lerp
      {Intrinsic::amdgcn_mbcnt_hi, 1760}, // __builtin_amdgcn_mbcnt_hi
      {Intrinsic::amdgcn_mbcnt_lo, 1786}, // __builtin_amdgcn_mbcnt_lo
      {Intrinsic::amdgcn_mfma_f32_16x16x16f16, 1812}, // __builtin_amdgcn_mfma_f32_16x16x16f16
      {Intrinsic::amdgcn_mfma_f32_16x16x1f32, 1850}, // __builtin_amdgcn_mfma_f32_16x16x1f32
      {Intrinsic::amdgcn_mfma_f32_16x16x2bf16, 1887}, // __builtin_amdgcn_mfma_f32_16x16x2bf16
      {Intrinsic::amdgcn_mfma_f32_16x16x4f16, 1925}, // __builtin_amdgcn_mfma_f32_16x16x4f16
      {Intrinsic::amdgcn_mfma_f32_16x16x4f32, 1962}, // __builtin_amdgcn_mfma_f32_16x16x4f32
      {Intrinsic::amdgcn_mfma_f32_16x16x8bf16, 1999}, // __builtin_amdgcn_mfma_f32_16x16x8bf16
      {Intrinsic::amdgcn_mfma_f32_32x32x1f32, 2037}, // __builtin_amdgcn_mfma_f32_32x32x1f32
      {Intrinsic::amdgcn_mfma_f32_32x32x2bf16, 2074}, // __builtin_amdgcn_mfma_f32_32x32x2bf16
      {Intrinsic::amdgcn_mfma_f32_32x32x2f32, 2112}, // __builtin_amdgcn_mfma_f32_32x32x2f32
      {Intrinsic::amdgcn_mfma_f32_32x32x4bf16, 2149}, // __builtin_amdgcn_mfma_f32_32x32x4bf16
      {Intrinsic::amdgcn_mfma_f32_32x32x4f16, 2187}, // __builtin_amdgcn_mfma_f32_32x32x4f16
      {Intrinsic::amdgcn_mfma_f32_32x32x8f16, 2224}, // __builtin_amdgcn_mfma_f32_32x32x8f16
      {Intrinsic::amdgcn_mfma_f32_4x4x1f32, 2261}, // __builtin_amdgcn_mfma_f32_4x4x1f32
      {Intrinsic::amdgcn_mfma_f32_4x4x2bf16, 2296}, // __builtin_amdgcn_mfma_f32_4x4x2bf16
      {Intrinsic::amdgcn_mfma_f32_4x4x4f16, 2332}, // __builtin_amdgcn_mfma_f32_4x4x4f16
      {Intrinsic::amdgcn_mfma_i32_16x16x16i8, 2367}, // __builtin_amdgcn_mfma_i32_16x16x16i8
      {Intrinsic::amdgcn_mfma_i32_16x16x4i8, 2404}, // __builtin_amdgcn_mfma_i32_16x16x4i8
      {Intrinsic::amdgcn_mfma_i32_32x32x4i8, 2440}, // __builtin_amdgcn_mfma_i32_32x32x4i8
      {Intrinsic::amdgcn_mfma_i32_32x32x8i8, 2476}, // __builtin_amdgcn_mfma_i32_32x32x8i8
      {Intrinsic::amdgcn_mfma_i32_4x4x4i8, 2512}, // __builtin_amdgcn_mfma_i32_4x4x4i8
      {Intrinsic::amdgcn_mqsad_pk_u16_u8, 2546}, // __builtin_amdgcn_mqsad_pk_u16_u8
      {Intrinsic::amdgcn_mqsad_u32_u8, 2579}, // __builtin_amdgcn_mqsad_u32_u8
      {Intrinsic::amdgcn_msad_u8, 2609}, // __builtin_amdgcn_msad_u8
      {Intrinsic::amdgcn_permlane16, 2634}, // __builtin_amdgcn_permlane16
      {Intrinsic::amdgcn_permlanex16, 2662}, // __builtin_amdgcn_permlanex16
      {Intrinsic::amdgcn_qsad_pk_u16_u8, 2691}, // __builtin_amdgcn_qsad_pk_u16_u8
      {Intrinsic::amdgcn_queue_ptr, 2723}, // __builtin_amdgcn_queue_ptr
      {Intrinsic::amdgcn_rcp_legacy, 2750}, // __builtin_amdgcn_rcp_legacy
      {Intrinsic::amdgcn_readfirstlane, 2778}, // __builtin_amdgcn_readfirstlane
      {Intrinsic::amdgcn_readlane, 2809}, // __builtin_amdgcn_readlane
      {Intrinsic::amdgcn_rsq_legacy, 2835}, // __builtin_amdgcn_rsq_legacy
      {Intrinsic::amdgcn_s_barrier, 2863}, // __builtin_amdgcn_s_barrier
      {Intrinsic::amdgcn_s_dcache_inv, 2890}, // __builtin_amdgcn_s_dcache_inv
      {Intrinsic::amdgcn_s_dcache_inv_vol, 2920}, // __builtin_amdgcn_s_dcache_inv_vol
      {Intrinsic::amdgcn_s_dcache_wb, 2954}, // __builtin_amdgcn_s_dcache_wb
      {Intrinsic::amdgcn_s_dcache_wb_vol, 2983}, // __builtin_amdgcn_s_dcache_wb_vol
      {Intrinsic::amdgcn_s_decperflevel, 3016}, // __builtin_amdgcn_s_decperflevel
      {Intrinsic::amdgcn_s_get_waveid_in_workgroup, 3048}, // __builtin_amdgcn_s_get_waveid_in_workgroup
      {Intrinsic::amdgcn_s_getpc, 3091}, // __builtin_amdgcn_s_getpc
      {Intrinsic::amdgcn_s_getreg, 3116}, // __builtin_amdgcn_s_getreg
      {Intrinsic::amdgcn_s_incperflevel, 3142}, // __builtin_amdgcn_s_incperflevel
      {Intrinsic::amdgcn_s_memrealtime, 3174}, // __builtin_amdgcn_s_memrealtime
      {Intrinsic::amdgcn_s_memtime, 3205}, // __builtin_amdgcn_s_memtime
      {Intrinsic::amdgcn_s_sendmsg, 3232}, // __builtin_amdgcn_s_sendmsg
      {Intrinsic::amdgcn_s_sendmsghalt, 3259}, // __builtin_amdgcn_s_sendmsghalt
      {Intrinsic::amdgcn_s_setreg, 3290}, // __builtin_amdgcn_s_setreg
      {Intrinsic::amdgcn_s_sleep, 3316}, // __builtin_amdgcn_s_sleep
      {Intrinsic::amdgcn_s_waitcnt, 3341}, // __builtin_amdgcn_s_waitcnt
      {Intrinsic::amdgcn_sad_hi_u8, 3368}, // __builtin_amdgcn_sad_hi_u8
      {Intrinsic::amdgcn_sad_u16, 3395}, // __builtin_amdgcn_sad_u16
      {Intrinsic::amdgcn_sad_u8, 3420}, // __builtin_amdgcn_sad_u8
      {Intrinsic::amdgcn_sdot2, 3444}, // __builtin_amdgcn_sdot2
      {Intrinsic::amdgcn_sdot4, 3467}, // __builtin_amdgcn_sdot4
      {Intrinsic::amdgcn_sdot8, 3490}, // __builtin_amdgcn_sdot8
      {Intrinsic::amdgcn_udot2, 3513}, // __builtin_amdgcn_udot2
      {Intrinsic::amdgcn_udot4, 3536}, // __builtin_amdgcn_udot4
      {Intrinsic::amdgcn_udot8, 3559}, // __builtin_amdgcn_udot8
      {Intrinsic::amdgcn_wave_barrier, 3582}, // __builtin_amdgcn_wave_barrier
      {Intrinsic::amdgcn_wavefrontsize, 3612}, // __builtin_amdgcn_wavefrontsize
      {Intrinsic::amdgcn_workgroup_id_x, 3643}, // __builtin_amdgcn_workgroup_id_x
      {Intrinsic::amdgcn_workgroup_id_y, 3675}, // __builtin_amdgcn_workgroup_id_y
      {Intrinsic::amdgcn_workgroup_id_z, 3707}, // __builtin_amdgcn_workgroup_id_z
      {Intrinsic::amdgcn_writelane, 3739}, // __builtin_amdgcn_writelane
    };
    auto I = std::lower_bound(std::begin(amdgcnNames),
                              std::end(amdgcnNames),
                              BuiltinNameStr);
    if (I != std::end(amdgcnNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "arm") {
    static const BuiltinEntry armNames[] = {
      {Intrinsic::arm_cdp, 3766}, // __builtin_arm_cdp
      {Intrinsic::arm_cdp2, 3784}, // __builtin_arm_cdp2
      {Intrinsic::arm_cmse_tt, 3803}, // __builtin_arm_cmse_TT
      {Intrinsic::arm_cmse_tta, 3825}, // __builtin_arm_cmse_TTA
      {Intrinsic::arm_cmse_ttat, 3848}, // __builtin_arm_cmse_TTAT
      {Intrinsic::arm_cmse_ttt, 3872}, // __builtin_arm_cmse_TTT
      {Intrinsic::arm_dmb, 203}, // __builtin_arm_dmb
      {Intrinsic::arm_dsb, 221}, // __builtin_arm_dsb
      {Intrinsic::arm_get_fpscr, 3895}, // __builtin_arm_get_fpscr
      {Intrinsic::arm_isb, 239}, // __builtin_arm_isb
      {Intrinsic::arm_ldc, 3919}, // __builtin_arm_ldc
      {Intrinsic::arm_ldc2, 3937}, // __builtin_arm_ldc2
      {Intrinsic::arm_ldc2l, 3956}, // __builtin_arm_ldc2l
      {Intrinsic::arm_ldcl, 3976}, // __builtin_arm_ldcl
      {Intrinsic::arm_mcr, 3995}, // __builtin_arm_mcr
      {Intrinsic::arm_mcr2, 4013}, // __builtin_arm_mcr2
      {Intrinsic::arm_mrc, 4032}, // __builtin_arm_mrc
      {Intrinsic::arm_mrc2, 4050}, // __builtin_arm_mrc2
      {Intrinsic::arm_qadd, 4069}, // __builtin_arm_qadd
      {Intrinsic::arm_qadd16, 4088}, // __builtin_arm_qadd16
      {Intrinsic::arm_qadd8, 4109}, // __builtin_arm_qadd8
      {Intrinsic::arm_qasx, 4129}, // __builtin_arm_qasx
      {Intrinsic::arm_qsax, 4148}, // __builtin_arm_qsax
      {Intrinsic::arm_qsub, 4167}, // __builtin_arm_qsub
      {Intrinsic::arm_qsub16, 4186}, // __builtin_arm_qsub16
      {Intrinsic::arm_qsub8, 4207}, // __builtin_arm_qsub8
      {Intrinsic::arm_sadd16, 4227}, // __builtin_arm_sadd16
      {Intrinsic::arm_sadd8, 4248}, // __builtin_arm_sadd8
      {Intrinsic::arm_sasx, 4268}, // __builtin_arm_sasx
      {Intrinsic::arm_sel, 4287}, // __builtin_arm_sel
      {Intrinsic::arm_set_fpscr, 4305}, // __builtin_arm_set_fpscr
      {Intrinsic::arm_shadd16, 4329}, // __builtin_arm_shadd16
      {Intrinsic::arm_shadd8, 4351}, // __builtin_arm_shadd8
      {Intrinsic::arm_shasx, 4372}, // __builtin_arm_shasx
      {Intrinsic::arm_shsax, 4392}, // __builtin_arm_shsax
      {Intrinsic::arm_shsub16, 4412}, // __builtin_arm_shsub16
      {Intrinsic::arm_shsub8, 4434}, // __builtin_arm_shsub8
      {Intrinsic::arm_smlabb, 4455}, // __builtin_arm_smlabb
      {Intrinsic::arm_smlabt, 4476}, // __builtin_arm_smlabt
      {Intrinsic::arm_smlad, 4497}, // __builtin_arm_smlad
      {Intrinsic::arm_smladx, 4517}, // __builtin_arm_smladx
      {Intrinsic::arm_smlald, 4538}, // __builtin_arm_smlald
      {Intrinsic::arm_smlaldx, 4559}, // __builtin_arm_smlaldx
      {Intrinsic::arm_smlatb, 4581}, // __builtin_arm_smlatb
      {Intrinsic::arm_smlatt, 4602}, // __builtin_arm_smlatt
      {Intrinsic::arm_smlawb, 4623}, // __builtin_arm_smlawb
      {Intrinsic::arm_smlawt, 4644}, // __builtin_arm_smlawt
      {Intrinsic::arm_smlsd, 4665}, // __builtin_arm_smlsd
      {Intrinsic::arm_smlsdx, 4685}, // __builtin_arm_smlsdx
      {Intrinsic::arm_smlsld, 4706}, // __builtin_arm_smlsld
      {Intrinsic::arm_smlsldx, 4727}, // __builtin_arm_smlsldx
      {Intrinsic::arm_smuad, 4749}, // __builtin_arm_smuad
      {Intrinsic::arm_smuadx, 4769}, // __builtin_arm_smuadx
      {Intrinsic::arm_smulbb, 4790}, // __builtin_arm_smulbb
      {Intrinsic::arm_smulbt, 4811}, // __builtin_arm_smulbt
      {Intrinsic::arm_smultb, 4832}, // __builtin_arm_smultb
      {Intrinsic::arm_smultt, 4853}, // __builtin_arm_smultt
      {Intrinsic::arm_smulwb, 4874}, // __builtin_arm_smulwb
      {Intrinsic::arm_smulwt, 4895}, // __builtin_arm_smulwt
      {Intrinsic::arm_smusd, 4916}, // __builtin_arm_smusd
      {Intrinsic::arm_smusdx, 4936}, // __builtin_arm_smusdx
      {Intrinsic::arm_ssat, 4957}, // __builtin_arm_ssat
      {Intrinsic::arm_ssat16, 4976}, // __builtin_arm_ssat16
      {Intrinsic::arm_ssax, 4997}, // __builtin_arm_ssax
      {Intrinsic::arm_ssub16, 5016}, // __builtin_arm_ssub16
      {Intrinsic::arm_ssub8, 5037}, // __builtin_arm_ssub8
      {Intrinsic::arm_stc, 5057}, // __builtin_arm_stc
      {Intrinsic::arm_stc2, 5075}, // __builtin_arm_stc2
      {Intrinsic::arm_stc2l, 5094}, // __builtin_arm_stc2l
      {Intrinsic::arm_stcl, 5114}, // __builtin_arm_stcl
      {Intrinsic::arm_sxtab16, 5133}, // __builtin_arm_sxtab16
      {Intrinsic::arm_sxtb16, 5155}, // __builtin_arm_sxtb16
      {Intrinsic::arm_uadd16, 5176}, // __builtin_arm_uadd16
      {Intrinsic::arm_uadd8, 5197}, // __builtin_arm_uadd8
      {Intrinsic::arm_uasx, 5217}, // __builtin_arm_uasx
      {Intrinsic::arm_uhadd16, 5236}, // __builtin_arm_uhadd16
      {Intrinsic::arm_uhadd8, 5258}, // __builtin_arm_uhadd8
      {Intrinsic::arm_uhasx, 5279}, // __builtin_arm_uhasx
      {Intrinsic::arm_uhsax, 5299}, // __builtin_arm_uhsax
      {Intrinsic::arm_uhsub16, 5319}, // __builtin_arm_uhsub16
      {Intrinsic::arm_uhsub8, 5341}, // __builtin_arm_uhsub8
      {Intrinsic::arm_uqadd16, 5362}, // __builtin_arm_uqadd16
      {Intrinsic::arm_uqadd8, 5384}, // __builtin_arm_uqadd8
      {Intrinsic::arm_uqasx, 5405}, // __builtin_arm_uqasx
      {Intrinsic::arm_uqsax, 5425}, // __builtin_arm_uqsax
      {Intrinsic::arm_uqsub16, 5445}, // __builtin_arm_uqsub16
      {Intrinsic::arm_uqsub8, 5467}, // __builtin_arm_uqsub8
      {Intrinsic::arm_usad8, 5488}, // __builtin_arm_usad8
      {Intrinsic::arm_usada8, 5508}, // __builtin_arm_usada8
      {Intrinsic::arm_usat, 5529}, // __builtin_arm_usat
      {Intrinsic::arm_usat16, 5548}, // __builtin_arm_usat16
      {Intrinsic::arm_usax, 5569}, // __builtin_arm_usax
      {Intrinsic::arm_usub16, 5588}, // __builtin_arm_usub16
      {Intrinsic::arm_usub8, 5609}, // __builtin_arm_usub8
      {Intrinsic::arm_uxtab16, 5629}, // __builtin_arm_uxtab16
      {Intrinsic::arm_uxtb16, 5651}, // __builtin_arm_uxtb16
    };
    auto I = std::lower_bound(std::begin(armNames),
                              std::end(armNames),
                              BuiltinNameStr);
    if (I != std::end(armNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "bpf") {
    static const BuiltinEntry bpfNames[] = {
      {Intrinsic::bpf_btf_type_id, 5672}, // __builtin_bpf_btf_type_id
      {Intrinsic::bpf_load_byte, 5698}, // __builtin_bpf_load_byte
      {Intrinsic::bpf_load_half, 5722}, // __builtin_bpf_load_half
      {Intrinsic::bpf_load_word, 5746}, // __builtin_bpf_load_word
      {Intrinsic::bpf_passthrough, 5770}, // __builtin_bpf_passthrough
      {Intrinsic::bpf_preserve_enum_value, 5796}, // __builtin_bpf_preserve_enum_value
      {Intrinsic::bpf_preserve_field_info, 5830}, // __builtin_bpf_preserve_field_info
      {Intrinsic::bpf_preserve_type_info, 5864}, // __builtin_bpf_preserve_type_info
      {Intrinsic::bpf_pseudo, 5897}, // __builtin_bpf_pseudo
    };
    auto I = std::lower_bound(std::begin(bpfNames),
                              std::end(bpfNames),
                              BuiltinNameStr);
    if (I != std::end(bpfNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "hexagon") {
    static const BuiltinEntry hexagonNames[] = {
      {Intrinsic::hexagon_A2_abs, 5918}, // __builtin_HEXAGON_A2_abs
      {Intrinsic::hexagon_A2_absp, 5943}, // __builtin_HEXAGON_A2_absp
      {Intrinsic::hexagon_A2_abssat, 5969}, // __builtin_HEXAGON_A2_abssat
      {Intrinsic::hexagon_A2_add, 5997}, // __builtin_HEXAGON_A2_add
      {Intrinsic::hexagon_A2_addh_h16_hh, 6022}, // __builtin_HEXAGON_A2_addh_h16_hh
      {Intrinsic::hexagon_A2_addh_h16_hl, 6055}, // __builtin_HEXAGON_A2_addh_h16_hl
      {Intrinsic::hexagon_A2_addh_h16_lh, 6088}, // __builtin_HEXAGON_A2_addh_h16_lh
      {Intrinsic::hexagon_A2_addh_h16_ll, 6121}, // __builtin_HEXAGON_A2_addh_h16_ll
      {Intrinsic::hexagon_A2_addh_h16_sat_hh, 6154}, // __builtin_HEXAGON_A2_addh_h16_sat_hh
      {Intrinsic::hexagon_A2_addh_h16_sat_hl, 6191}, // __builtin_HEXAGON_A2_addh_h16_sat_hl
      {Intrinsic::hexagon_A2_addh_h16_sat_lh, 6228}, // __builtin_HEXAGON_A2_addh_h16_sat_lh
      {Intrinsic::hexagon_A2_addh_h16_sat_ll, 6265}, // __builtin_HEXAGON_A2_addh_h16_sat_ll
      {Intrinsic::hexagon_A2_addh_l16_hl, 6302}, // __builtin_HEXAGON_A2_addh_l16_hl
      {Intrinsic::hexagon_A2_addh_l16_ll, 6335}, // __builtin_HEXAGON_A2_addh_l16_ll
      {Intrinsic::hexagon_A2_addh_l16_sat_hl, 6368}, // __builtin_HEXAGON_A2_addh_l16_sat_hl
      {Intrinsic::hexagon_A2_addh_l16_sat_ll, 6405}, // __builtin_HEXAGON_A2_addh_l16_sat_ll
      {Intrinsic::hexagon_A2_addi, 6442}, // __builtin_HEXAGON_A2_addi
      {Intrinsic::hexagon_A2_addp, 6468}, // __builtin_HEXAGON_A2_addp
      {Intrinsic::hexagon_A2_addpsat, 6494}, // __builtin_HEXAGON_A2_addpsat
      {Intrinsic::hexagon_A2_addsat, 6523}, // __builtin_HEXAGON_A2_addsat
      {Intrinsic::hexagon_A2_addsp, 6551}, // __builtin_HEXAGON_A2_addsp
      {Intrinsic::hexagon_A2_and, 6578}, // __builtin_HEXAGON_A2_and
      {Intrinsic::hexagon_A2_andir, 6603}, // __builtin_HEXAGON_A2_andir
      {Intrinsic::hexagon_A2_andp, 6630}, // __builtin_HEXAGON_A2_andp
      {Intrinsic::hexagon_A2_aslh, 6656}, // __builtin_HEXAGON_A2_aslh
      {Intrinsic::hexagon_A2_asrh, 6682}, // __builtin_HEXAGON_A2_asrh
      {Intrinsic::hexagon_A2_combine_hh, 6708}, // __builtin_HEXAGON_A2_combine_hh
      {Intrinsic::hexagon_A2_combine_hl, 6740}, // __builtin_HEXAGON_A2_combine_hl
      {Intrinsic::hexagon_A2_combine_lh, 6772}, // __builtin_HEXAGON_A2_combine_lh
      {Intrinsic::hexagon_A2_combine_ll, 6804}, // __builtin_HEXAGON_A2_combine_ll
      {Intrinsic::hexagon_A2_combineii, 6836}, // __builtin_HEXAGON_A2_combineii
      {Intrinsic::hexagon_A2_combinew, 6867}, // __builtin_HEXAGON_A2_combinew
      {Intrinsic::hexagon_A2_max, 6897}, // __builtin_HEXAGON_A2_max
      {Intrinsic::hexagon_A2_maxp, 6922}, // __builtin_HEXAGON_A2_maxp
      {Intrinsic::hexagon_A2_maxu, 6948}, // __builtin_HEXAGON_A2_maxu
      {Intrinsic::hexagon_A2_maxup, 6974}, // __builtin_HEXAGON_A2_maxup
      {Intrinsic::hexagon_A2_min, 7001}, // __builtin_HEXAGON_A2_min
      {Intrinsic::hexagon_A2_minp, 7026}, // __builtin_HEXAGON_A2_minp
      {Intrinsic::hexagon_A2_minu, 7052}, // __builtin_HEXAGON_A2_minu
      {Intrinsic::hexagon_A2_minup, 7078}, // __builtin_HEXAGON_A2_minup
      {Intrinsic::hexagon_A2_neg, 7105}, // __builtin_HEXAGON_A2_neg
      {Intrinsic::hexagon_A2_negp, 7130}, // __builtin_HEXAGON_A2_negp
      {Intrinsic::hexagon_A2_negsat, 7156}, // __builtin_HEXAGON_A2_negsat
      {Intrinsic::hexagon_A2_not, 7184}, // __builtin_HEXAGON_A2_not
      {Intrinsic::hexagon_A2_notp, 7209}, // __builtin_HEXAGON_A2_notp
      {Intrinsic::hexagon_A2_or, 7235}, // __builtin_HEXAGON_A2_or
      {Intrinsic::hexagon_A2_orir, 7259}, // __builtin_HEXAGON_A2_orir
      {Intrinsic::hexagon_A2_orp, 7285}, // __builtin_HEXAGON_A2_orp
      {Intrinsic::hexagon_A2_roundsat, 7310}, // __builtin_HEXAGON_A2_roundsat
      {Intrinsic::hexagon_A2_sat, 7340}, // __builtin_HEXAGON_A2_sat
      {Intrinsic::hexagon_A2_satb, 7365}, // __builtin_HEXAGON_A2_satb
      {Intrinsic::hexagon_A2_sath, 7391}, // __builtin_HEXAGON_A2_sath
      {Intrinsic::hexagon_A2_satub, 7417}, // __builtin_HEXAGON_A2_satub
      {Intrinsic::hexagon_A2_satuh, 7444}, // __builtin_HEXAGON_A2_satuh
      {Intrinsic::hexagon_A2_sub, 7471}, // __builtin_HEXAGON_A2_sub
      {Intrinsic::hexagon_A2_subh_h16_hh, 7496}, // __builtin_HEXAGON_A2_subh_h16_hh
      {Intrinsic::hexagon_A2_subh_h16_hl, 7529}, // __builtin_HEXAGON_A2_subh_h16_hl
      {Intrinsic::hexagon_A2_subh_h16_lh, 7562}, // __builtin_HEXAGON_A2_subh_h16_lh
      {Intrinsic::hexagon_A2_subh_h16_ll, 7595}, // __builtin_HEXAGON_A2_subh_h16_ll
      {Intrinsic::hexagon_A2_subh_h16_sat_hh, 7628}, // __builtin_HEXAGON_A2_subh_h16_sat_hh
      {Intrinsic::hexagon_A2_subh_h16_sat_hl, 7665}, // __builtin_HEXAGON_A2_subh_h16_sat_hl
      {Intrinsic::hexagon_A2_subh_h16_sat_lh, 7702}, // __builtin_HEXAGON_A2_subh_h16_sat_lh
      {Intrinsic::hexagon_A2_subh_h16_sat_ll, 7739}, // __builtin_HEXAGON_A2_subh_h16_sat_ll
      {Intrinsic::hexagon_A2_subh_l16_hl, 7776}, // __builtin_HEXAGON_A2_subh_l16_hl
      {Intrinsic::hexagon_A2_subh_l16_ll, 7809}, // __builtin_HEXAGON_A2_subh_l16_ll
      {Intrinsic::hexagon_A2_subh_l16_sat_hl, 7842}, // __builtin_HEXAGON_A2_subh_l16_sat_hl
      {Intrinsic::hexagon_A2_subh_l16_sat_ll, 7879}, // __builtin_HEXAGON_A2_subh_l16_sat_ll
      {Intrinsic::hexagon_A2_subp, 7916}, // __builtin_HEXAGON_A2_subp
      {Intrinsic::hexagon_A2_subri, 7942}, // __builtin_HEXAGON_A2_subri
      {Intrinsic::hexagon_A2_subsat, 7969}, // __builtin_HEXAGON_A2_subsat
      {Intrinsic::hexagon_A2_svaddh, 7997}, // __builtin_HEXAGON_A2_svaddh
      {Intrinsic::hexagon_A2_svaddhs, 8025}, // __builtin_HEXAGON_A2_svaddhs
      {Intrinsic::hexagon_A2_svadduhs, 8054}, // __builtin_HEXAGON_A2_svadduhs
      {Intrinsic::hexagon_A2_svavgh, 8084}, // __builtin_HEXAGON_A2_svavgh
      {Intrinsic::hexagon_A2_svavghs, 8112}, // __builtin_HEXAGON_A2_svavghs
      {Intrinsic::hexagon_A2_svnavgh, 8141}, // __builtin_HEXAGON_A2_svnavgh
      {Intrinsic::hexagon_A2_svsubh, 8170}, // __builtin_HEXAGON_A2_svsubh
      {Intrinsic::hexagon_A2_svsubhs, 8198}, // __builtin_HEXAGON_A2_svsubhs
      {Intrinsic::hexagon_A2_svsubuhs, 8227}, // __builtin_HEXAGON_A2_svsubuhs
      {Intrinsic::hexagon_A2_swiz, 8257}, // __builtin_HEXAGON_A2_swiz
      {Intrinsic::hexagon_A2_sxtb, 8283}, // __builtin_HEXAGON_A2_sxtb
      {Intrinsic::hexagon_A2_sxth, 8309}, // __builtin_HEXAGON_A2_sxth
      {Intrinsic::hexagon_A2_sxtw, 8335}, // __builtin_HEXAGON_A2_sxtw
      {Intrinsic::hexagon_A2_tfr, 8361}, // __builtin_HEXAGON_A2_tfr
      {Intrinsic::hexagon_A2_tfrih, 8386}, // __builtin_HEXAGON_A2_tfrih
      {Intrinsic::hexagon_A2_tfril, 8413}, // __builtin_HEXAGON_A2_tfril
      {Intrinsic::hexagon_A2_tfrp, 8440}, // __builtin_HEXAGON_A2_tfrp
      {Intrinsic::hexagon_A2_tfrpi, 8466}, // __builtin_HEXAGON_A2_tfrpi
      {Intrinsic::hexagon_A2_tfrsi, 8493}, // __builtin_HEXAGON_A2_tfrsi
      {Intrinsic::hexagon_A2_vabsh, 8520}, // __builtin_HEXAGON_A2_vabsh
      {Intrinsic::hexagon_A2_vabshsat, 8547}, // __builtin_HEXAGON_A2_vabshsat
      {Intrinsic::hexagon_A2_vabsw, 8577}, // __builtin_HEXAGON_A2_vabsw
      {Intrinsic::hexagon_A2_vabswsat, 8604}, // __builtin_HEXAGON_A2_vabswsat
      {Intrinsic::hexagon_A2_vaddb_map, 8634}, // __builtin_HEXAGON_A2_vaddb_map
      {Intrinsic::hexagon_A2_vaddh, 8665}, // __builtin_HEXAGON_A2_vaddh
      {Intrinsic::hexagon_A2_vaddhs, 8692}, // __builtin_HEXAGON_A2_vaddhs
      {Intrinsic::hexagon_A2_vaddub, 8720}, // __builtin_HEXAGON_A2_vaddub
      {Intrinsic::hexagon_A2_vaddubs, 8748}, // __builtin_HEXAGON_A2_vaddubs
      {Intrinsic::hexagon_A2_vadduhs, 8777}, // __builtin_HEXAGON_A2_vadduhs
      {Intrinsic::hexagon_A2_vaddw, 8806}, // __builtin_HEXAGON_A2_vaddw
      {Intrinsic::hexagon_A2_vaddws, 8833}, // __builtin_HEXAGON_A2_vaddws
      {Intrinsic::hexagon_A2_vavgh, 8861}, // __builtin_HEXAGON_A2_vavgh
      {Intrinsic::hexagon_A2_vavghcr, 8888}, // __builtin_HEXAGON_A2_vavghcr
      {Intrinsic::hexagon_A2_vavghr, 8917}, // __builtin_HEXAGON_A2_vavghr
      {Intrinsic::hexagon_A2_vavgub, 8945}, // __builtin_HEXAGON_A2_vavgub
      {Intrinsic::hexagon_A2_vavgubr, 8973}, // __builtin_HEXAGON_A2_vavgubr
      {Intrinsic::hexagon_A2_vavguh, 9002}, // __builtin_HEXAGON_A2_vavguh
      {Intrinsic::hexagon_A2_vavguhr, 9030}, // __builtin_HEXAGON_A2_vavguhr
      {Intrinsic::hexagon_A2_vavguw, 9059}, // __builtin_HEXAGON_A2_vavguw
      {Intrinsic::hexagon_A2_vavguwr, 9087}, // __builtin_HEXAGON_A2_vavguwr
      {Intrinsic::hexagon_A2_vavgw, 9116}, // __builtin_HEXAGON_A2_vavgw
      {Intrinsic::hexagon_A2_vavgwcr, 9143}, // __builtin_HEXAGON_A2_vavgwcr
      {Intrinsic::hexagon_A2_vavgwr, 9172}, // __builtin_HEXAGON_A2_vavgwr
      {Intrinsic::hexagon_A2_vcmpbeq, 9200}, // __builtin_HEXAGON_A2_vcmpbeq
      {Intrinsic::hexagon_A2_vcmpbgtu, 9229}, // __builtin_HEXAGON_A2_vcmpbgtu
      {Intrinsic::hexagon_A2_vcmpheq, 9259}, // __builtin_HEXAGON_A2_vcmpheq
      {Intrinsic::hexagon_A2_vcmphgt, 9288}, // __builtin_HEXAGON_A2_vcmphgt
      {Intrinsic::hexagon_A2_vcmphgtu, 9317}, // __builtin_HEXAGON_A2_vcmphgtu
      {Intrinsic::hexagon_A2_vcmpweq, 9347}, // __builtin_HEXAGON_A2_vcmpweq
      {Intrinsic::hexagon_A2_vcmpwgt, 9376}, // __builtin_HEXAGON_A2_vcmpwgt
      {Intrinsic::hexagon_A2_vcmpwgtu, 9405}, // __builtin_HEXAGON_A2_vcmpwgtu
      {Intrinsic::hexagon_A2_vconj, 9435}, // __builtin_HEXAGON_A2_vconj
      {Intrinsic::hexagon_A2_vmaxb, 9462}, // __builtin_HEXAGON_A2_vmaxb
      {Intrinsic::hexagon_A2_vmaxh, 9489}, // __builtin_HEXAGON_A2_vmaxh
      {Intrinsic::hexagon_A2_vmaxub, 9516}, // __builtin_HEXAGON_A2_vmaxub
      {Intrinsic::hexagon_A2_vmaxuh, 9544}, // __builtin_HEXAGON_A2_vmaxuh
      {Intrinsic::hexagon_A2_vmaxuw, 9572}, // __builtin_HEXAGON_A2_vmaxuw
      {Intrinsic::hexagon_A2_vmaxw, 9600}, // __builtin_HEXAGON_A2_vmaxw
      {Intrinsic::hexagon_A2_vminb, 9627}, // __builtin_HEXAGON_A2_vminb
      {Intrinsic::hexagon_A2_vminh, 9654}, // __builtin_HEXAGON_A2_vminh
      {Intrinsic::hexagon_A2_vminub, 9681}, // __builtin_HEXAGON_A2_vminub
      {Intrinsic::hexagon_A2_vminuh, 9709}, // __builtin_HEXAGON_A2_vminuh
      {Intrinsic::hexagon_A2_vminuw, 9737}, // __builtin_HEXAGON_A2_vminuw
      {Intrinsic::hexagon_A2_vminw, 9765}, // __builtin_HEXAGON_A2_vminw
      {Intrinsic::hexagon_A2_vnavgh, 9792}, // __builtin_HEXAGON_A2_vnavgh
      {Intrinsic::hexagon_A2_vnavghcr, 9820}, // __builtin_HEXAGON_A2_vnavghcr
      {Intrinsic::hexagon_A2_vnavghr, 9850}, // __builtin_HEXAGON_A2_vnavghr
      {Intrinsic::hexagon_A2_vnavgw, 9879}, // __builtin_HEXAGON_A2_vnavgw
      {Intrinsic::hexagon_A2_vnavgwcr, 9907}, // __builtin_HEXAGON_A2_vnavgwcr
      {Intrinsic::hexagon_A2_vnavgwr, 9937}, // __builtin_HEXAGON_A2_vnavgwr
      {Intrinsic::hexagon_A2_vraddub, 9966}, // __builtin_HEXAGON_A2_vraddub
      {Intrinsic::hexagon_A2_vraddub_acc, 9995}, // __builtin_HEXAGON_A2_vraddub_acc
      {Intrinsic::hexagon_A2_vrsadub, 10028}, // __builtin_HEXAGON_A2_vrsadub
      {Intrinsic::hexagon_A2_vrsadub_acc, 10057}, // __builtin_HEXAGON_A2_vrsadub_acc
      {Intrinsic::hexagon_A2_vsubb_map, 10090}, // __builtin_HEXAGON_A2_vsubb_map
      {Intrinsic::hexagon_A2_vsubh, 10121}, // __builtin_HEXAGON_A2_vsubh
      {Intrinsic::hexagon_A2_vsubhs, 10148}, // __builtin_HEXAGON_A2_vsubhs
      {Intrinsic::hexagon_A2_vsubub, 10176}, // __builtin_HEXAGON_A2_vsubub
      {Intrinsic::hexagon_A2_vsububs, 10204}, // __builtin_HEXAGON_A2_vsububs
      {Intrinsic::hexagon_A2_vsubuhs, 10233}, // __builtin_HEXAGON_A2_vsubuhs
      {Intrinsic::hexagon_A2_vsubw, 10262}, // __builtin_HEXAGON_A2_vsubw
      {Intrinsic::hexagon_A2_vsubws, 10289}, // __builtin_HEXAGON_A2_vsubws
      {Intrinsic::hexagon_A2_xor, 10317}, // __builtin_HEXAGON_A2_xor
      {Intrinsic::hexagon_A2_xorp, 10342}, // __builtin_HEXAGON_A2_xorp
      {Intrinsic::hexagon_A2_zxtb, 10368}, // __builtin_HEXAGON_A2_zxtb
      {Intrinsic::hexagon_A2_zxth, 10394}, // __builtin_HEXAGON_A2_zxth
      {Intrinsic::hexagon_A4_andn, 10420}, // __builtin_HEXAGON_A4_andn
      {Intrinsic::hexagon_A4_andnp, 10446}, // __builtin_HEXAGON_A4_andnp
      {Intrinsic::hexagon_A4_bitsplit, 10473}, // __builtin_HEXAGON_A4_bitsplit
      {Intrinsic::hexagon_A4_bitspliti, 10503}, // __builtin_HEXAGON_A4_bitspliti
      {Intrinsic::hexagon_A4_boundscheck, 10534}, // __builtin_HEXAGON_A4_boundscheck
      {Intrinsic::hexagon_A4_cmpbeq, 10567}, // __builtin_HEXAGON_A4_cmpbeq
      {Intrinsic::hexagon_A4_cmpbeqi, 10595}, // __builtin_HEXAGON_A4_cmpbeqi
      {Intrinsic::hexagon_A4_cmpbgt, 10624}, // __builtin_HEXAGON_A4_cmpbgt
      {Intrinsic::hexagon_A4_cmpbgti, 10652}, // __builtin_HEXAGON_A4_cmpbgti
      {Intrinsic::hexagon_A4_cmpbgtu, 10681}, // __builtin_HEXAGON_A4_cmpbgtu
      {Intrinsic::hexagon_A4_cmpbgtui, 10710}, // __builtin_HEXAGON_A4_cmpbgtui
      {Intrinsic::hexagon_A4_cmpheq, 10740}, // __builtin_HEXAGON_A4_cmpheq
      {Intrinsic::hexagon_A4_cmpheqi, 10768}, // __builtin_HEXAGON_A4_cmpheqi
      {Intrinsic::hexagon_A4_cmphgt, 10797}, // __builtin_HEXAGON_A4_cmphgt
      {Intrinsic::hexagon_A4_cmphgti, 10825}, // __builtin_HEXAGON_A4_cmphgti
      {Intrinsic::hexagon_A4_cmphgtu, 10854}, // __builtin_HEXAGON_A4_cmphgtu
      {Intrinsic::hexagon_A4_cmphgtui, 10883}, // __builtin_HEXAGON_A4_cmphgtui
      {Intrinsic::hexagon_A4_combineir, 10913}, // __builtin_HEXAGON_A4_combineir
      {Intrinsic::hexagon_A4_combineri, 10944}, // __builtin_HEXAGON_A4_combineri
      {Intrinsic::hexagon_A4_cround_ri, 10975}, // __builtin_HEXAGON_A4_cround_ri
      {Intrinsic::hexagon_A4_cround_rr, 11006}, // __builtin_HEXAGON_A4_cround_rr
      {Intrinsic::hexagon_A4_modwrapu, 11037}, // __builtin_HEXAGON_A4_modwrapu
      {Intrinsic::hexagon_A4_orn, 11067}, // __builtin_HEXAGON_A4_orn
      {Intrinsic::hexagon_A4_ornp, 11092}, // __builtin_HEXAGON_A4_ornp
      {Intrinsic::hexagon_A4_rcmpeq, 11118}, // __builtin_HEXAGON_A4_rcmpeq
      {Intrinsic::hexagon_A4_rcmpeqi, 11146}, // __builtin_HEXAGON_A4_rcmpeqi
      {Intrinsic::hexagon_A4_rcmpneq, 11175}, // __builtin_HEXAGON_A4_rcmpneq
      {Intrinsic::hexagon_A4_rcmpneqi, 11204}, // __builtin_HEXAGON_A4_rcmpneqi
      {Intrinsic::hexagon_A4_round_ri, 11234}, // __builtin_HEXAGON_A4_round_ri
      {Intrinsic::hexagon_A4_round_ri_sat, 11264}, // __builtin_HEXAGON_A4_round_ri_sat
      {Intrinsic::hexagon_A4_round_rr, 11298}, // __builtin_HEXAGON_A4_round_rr
      {Intrinsic::hexagon_A4_round_rr_sat, 11328}, // __builtin_HEXAGON_A4_round_rr_sat
      {Intrinsic::hexagon_A4_tlbmatch, 11362}, // __builtin_HEXAGON_A4_tlbmatch
      {Intrinsic::hexagon_A4_vcmpbeq_any, 11392}, // __builtin_HEXAGON_A4_vcmpbeq_any
      {Intrinsic::hexagon_A4_vcmpbeqi, 11425}, // __builtin_HEXAGON_A4_vcmpbeqi
      {Intrinsic::hexagon_A4_vcmpbgt, 11455}, // __builtin_HEXAGON_A4_vcmpbgt
      {Intrinsic::hexagon_A4_vcmpbgti, 11484}, // __builtin_HEXAGON_A4_vcmpbgti
      {Intrinsic::hexagon_A4_vcmpbgtui, 11514}, // __builtin_HEXAGON_A4_vcmpbgtui
      {Intrinsic::hexagon_A4_vcmpheqi, 11545}, // __builtin_HEXAGON_A4_vcmpheqi
      {Intrinsic::hexagon_A4_vcmphgti, 11575}, // __builtin_HEXAGON_A4_vcmphgti
      {Intrinsic::hexagon_A4_vcmphgtui, 11605}, // __builtin_HEXAGON_A4_vcmphgtui
      {Intrinsic::hexagon_A4_vcmpweqi, 11636}, // __builtin_HEXAGON_A4_vcmpweqi
      {Intrinsic::hexagon_A4_vcmpwgti, 11666}, // __builtin_HEXAGON_A4_vcmpwgti
      {Intrinsic::hexagon_A4_vcmpwgtui, 11696}, // __builtin_HEXAGON_A4_vcmpwgtui
      {Intrinsic::hexagon_A4_vrmaxh, 11727}, // __builtin_HEXAGON_A4_vrmaxh
      {Intrinsic::hexagon_A4_vrmaxuh, 11755}, // __builtin_HEXAGON_A4_vrmaxuh
      {Intrinsic::hexagon_A4_vrmaxuw, 11784}, // __builtin_HEXAGON_A4_vrmaxuw
      {Intrinsic::hexagon_A4_vrmaxw, 11813}, // __builtin_HEXAGON_A4_vrmaxw
      {Intrinsic::hexagon_A4_vrminh, 11841}, // __builtin_HEXAGON_A4_vrminh
      {Intrinsic::hexagon_A4_vrminuh, 11869}, // __builtin_HEXAGON_A4_vrminuh
      {Intrinsic::hexagon_A4_vrminuw, 11898}, // __builtin_HEXAGON_A4_vrminuw
      {Intrinsic::hexagon_A4_vrminw, 11927}, // __builtin_HEXAGON_A4_vrminw
      {Intrinsic::hexagon_A5_vaddhubs, 11955}, // __builtin_HEXAGON_A5_vaddhubs
      {Intrinsic::hexagon_A6_vcmpbeq_notany, 11985}, // __builtin_HEXAGON_A6_vcmpbeq_notany
      {Intrinsic::hexagon_A7_clip, 12021}, // __builtin_HEXAGON_A7_clip
      {Intrinsic::hexagon_A7_croundd_ri, 12047}, // __builtin_HEXAGON_A7_croundd_ri
      {Intrinsic::hexagon_A7_croundd_rr, 12079}, // __builtin_HEXAGON_A7_croundd_rr
      {Intrinsic::hexagon_A7_vclip, 12111}, // __builtin_HEXAGON_A7_vclip
      {Intrinsic::hexagon_C2_all8, 12138}, // __builtin_HEXAGON_C2_all8
      {Intrinsic::hexagon_C2_and, 12164}, // __builtin_HEXAGON_C2_and
      {Intrinsic::hexagon_C2_andn, 12189}, // __builtin_HEXAGON_C2_andn
      {Intrinsic::hexagon_C2_any8, 12215}, // __builtin_HEXAGON_C2_any8
      {Intrinsic::hexagon_C2_bitsclr, 12241}, // __builtin_HEXAGON_C2_bitsclr
      {Intrinsic::hexagon_C2_bitsclri, 12270}, // __builtin_HEXAGON_C2_bitsclri
      {Intrinsic::hexagon_C2_bitsset, 12300}, // __builtin_HEXAGON_C2_bitsset
      {Intrinsic::hexagon_C2_cmpeq, 12329}, // __builtin_HEXAGON_C2_cmpeq
      {Intrinsic::hexagon_C2_cmpeqi, 12356}, // __builtin_HEXAGON_C2_cmpeqi
      {Intrinsic::hexagon_C2_cmpeqp, 12384}, // __builtin_HEXAGON_C2_cmpeqp
      {Intrinsic::hexagon_C2_cmpgei, 12412}, // __builtin_HEXAGON_C2_cmpgei
      {Intrinsic::hexagon_C2_cmpgeui, 12440}, // __builtin_HEXAGON_C2_cmpgeui
      {Intrinsic::hexagon_C2_cmpgt, 12469}, // __builtin_HEXAGON_C2_cmpgt
      {Intrinsic::hexagon_C2_cmpgti, 12496}, // __builtin_HEXAGON_C2_cmpgti
      {Intrinsic::hexagon_C2_cmpgtp, 12524}, // __builtin_HEXAGON_C2_cmpgtp
      {Intrinsic::hexagon_C2_cmpgtu, 12552}, // __builtin_HEXAGON_C2_cmpgtu
      {Intrinsic::hexagon_C2_cmpgtui, 12580}, // __builtin_HEXAGON_C2_cmpgtui
      {Intrinsic::hexagon_C2_cmpgtup, 12609}, // __builtin_HEXAGON_C2_cmpgtup
      {Intrinsic::hexagon_C2_cmplt, 12638}, // __builtin_HEXAGON_C2_cmplt
      {Intrinsic::hexagon_C2_cmpltu, 12665}, // __builtin_HEXAGON_C2_cmpltu
      {Intrinsic::hexagon_C2_mask, 12693}, // __builtin_HEXAGON_C2_mask
      {Intrinsic::hexagon_C2_mux, 12719}, // __builtin_HEXAGON_C2_mux
      {Intrinsic::hexagon_C2_muxii, 12744}, // __builtin_HEXAGON_C2_muxii
      {Intrinsic::hexagon_C2_muxir, 12771}, // __builtin_HEXAGON_C2_muxir
      {Intrinsic::hexagon_C2_muxri, 12798}, // __builtin_HEXAGON_C2_muxri
      {Intrinsic::hexagon_C2_not, 12825}, // __builtin_HEXAGON_C2_not
      {Intrinsic::hexagon_C2_or, 12850}, // __builtin_HEXAGON_C2_or
      {Intrinsic::hexagon_C2_orn, 12874}, // __builtin_HEXAGON_C2_orn
      {Intrinsic::hexagon_C2_pxfer_map, 12899}, // __builtin_HEXAGON_C2_pxfer_map
      {Intrinsic::hexagon_C2_tfrpr, 12930}, // __builtin_HEXAGON_C2_tfrpr
      {Intrinsic::hexagon_C2_tfrrp, 12957}, // __builtin_HEXAGON_C2_tfrrp
      {Intrinsic::hexagon_C2_vitpack, 12984}, // __builtin_HEXAGON_C2_vitpack
      {Intrinsic::hexagon_C2_vmux, 13013}, // __builtin_HEXAGON_C2_vmux
      {Intrinsic::hexagon_C2_xor, 13039}, // __builtin_HEXAGON_C2_xor
      {Intrinsic::hexagon_C4_and_and, 13064}, // __builtin_HEXAGON_C4_and_and
      {Intrinsic::hexagon_C4_and_andn, 13093}, // __builtin_HEXAGON_C4_and_andn
      {Intrinsic::hexagon_C4_and_or, 13123}, // __builtin_HEXAGON_C4_and_or
      {Intrinsic::hexagon_C4_and_orn, 13151}, // __builtin_HEXAGON_C4_and_orn
      {Intrinsic::hexagon_C4_cmplte, 13180}, // __builtin_HEXAGON_C4_cmplte
      {Intrinsic::hexagon_C4_cmpltei, 13208}, // __builtin_HEXAGON_C4_cmpltei
      {Intrinsic::hexagon_C4_cmplteu, 13237}, // __builtin_HEXAGON_C4_cmplteu
      {Intrinsic::hexagon_C4_cmplteui, 13266}, // __builtin_HEXAGON_C4_cmplteui
      {Intrinsic::hexagon_C4_cmpneq, 13296}, // __builtin_HEXAGON_C4_cmpneq
      {Intrinsic::hexagon_C4_cmpneqi, 13324}, // __builtin_HEXAGON_C4_cmpneqi
      {Intrinsic::hexagon_C4_fastcorner9, 13353}, // __builtin_HEXAGON_C4_fastcorner9
      {Intrinsic::hexagon_C4_fastcorner9_not, 13386}, // __builtin_HEXAGON_C4_fastcorner9_not
      {Intrinsic::hexagon_C4_nbitsclr, 13423}, // __builtin_HEXAGON_C4_nbitsclr
      {Intrinsic::hexagon_C4_nbitsclri, 13453}, // __builtin_HEXAGON_C4_nbitsclri
      {Intrinsic::hexagon_C4_nbitsset, 13484}, // __builtin_HEXAGON_C4_nbitsset
      {Intrinsic::hexagon_C4_or_and, 13514}, // __builtin_HEXAGON_C4_or_and
      {Intrinsic::hexagon_C4_or_andn, 13542}, // __builtin_HEXAGON_C4_or_andn
      {Intrinsic::hexagon_C4_or_or, 13571}, // __builtin_HEXAGON_C4_or_or
      {Intrinsic::hexagon_C4_or_orn, 13598}, // __builtin_HEXAGON_C4_or_orn
      {Intrinsic::hexagon_F2_conv_d2df, 13626}, // __builtin_HEXAGON_F2_conv_d2df
      {Intrinsic::hexagon_F2_conv_d2sf, 13657}, // __builtin_HEXAGON_F2_conv_d2sf
      {Intrinsic::hexagon_F2_conv_df2d, 13688}, // __builtin_HEXAGON_F2_conv_df2d
      {Intrinsic::hexagon_F2_conv_df2d_chop, 13719}, // __builtin_HEXAGON_F2_conv_df2d_chop
      {Intrinsic::hexagon_F2_conv_df2sf, 13755}, // __builtin_HEXAGON_F2_conv_df2sf
      {Intrinsic::hexagon_F2_conv_df2ud, 13787}, // __builtin_HEXAGON_F2_conv_df2ud
      {Intrinsic::hexagon_F2_conv_df2ud_chop, 13819}, // __builtin_HEXAGON_F2_conv_df2ud_chop
      {Intrinsic::hexagon_F2_conv_df2uw, 13856}, // __builtin_HEXAGON_F2_conv_df2uw
      {Intrinsic::hexagon_F2_conv_df2uw_chop, 13888}, // __builtin_HEXAGON_F2_conv_df2uw_chop
      {Intrinsic::hexagon_F2_conv_df2w, 13925}, // __builtin_HEXAGON_F2_conv_df2w
      {Intrinsic::hexagon_F2_conv_df2w_chop, 13956}, // __builtin_HEXAGON_F2_conv_df2w_chop
      {Intrinsic::hexagon_F2_conv_sf2d, 13992}, // __builtin_HEXAGON_F2_conv_sf2d
      {Intrinsic::hexagon_F2_conv_sf2d_chop, 14023}, // __builtin_HEXAGON_F2_conv_sf2d_chop
      {Intrinsic::hexagon_F2_conv_sf2df, 14059}, // __builtin_HEXAGON_F2_conv_sf2df
      {Intrinsic::hexagon_F2_conv_sf2ud, 14091}, // __builtin_HEXAGON_F2_conv_sf2ud
      {Intrinsic::hexagon_F2_conv_sf2ud_chop, 14123}, // __builtin_HEXAGON_F2_conv_sf2ud_chop
      {Intrinsic::hexagon_F2_conv_sf2uw, 14160}, // __builtin_HEXAGON_F2_conv_sf2uw
      {Intrinsic::hexagon_F2_conv_sf2uw_chop, 14192}, // __builtin_HEXAGON_F2_conv_sf2uw_chop
      {Intrinsic::hexagon_F2_conv_sf2w, 14229}, // __builtin_HEXAGON_F2_conv_sf2w
      {Intrinsic::hexagon_F2_conv_sf2w_chop, 14260}, // __builtin_HEXAGON_F2_conv_sf2w_chop
      {Intrinsic::hexagon_F2_conv_ud2df, 14296}, // __builtin_HEXAGON_F2_conv_ud2df
      {Intrinsic::hexagon_F2_conv_ud2sf, 14328}, // __builtin_HEXAGON_F2_conv_ud2sf
      {Intrinsic::hexagon_F2_conv_uw2df, 14360}, // __builtin_HEXAGON_F2_conv_uw2df
      {Intrinsic::hexagon_F2_conv_uw2sf, 14392}, // __builtin_HEXAGON_F2_conv_uw2sf
      {Intrinsic::hexagon_F2_conv_w2df, 14424}, // __builtin_HEXAGON_F2_conv_w2df
      {Intrinsic::hexagon_F2_conv_w2sf, 14455}, // __builtin_HEXAGON_F2_conv_w2sf
      {Intrinsic::hexagon_F2_dfadd, 14486}, // __builtin_HEXAGON_F2_dfadd
      {Intrinsic::hexagon_F2_dfclass, 14513}, // __builtin_HEXAGON_F2_dfclass
      {Intrinsic::hexagon_F2_dfcmpeq, 14542}, // __builtin_HEXAGON_F2_dfcmpeq
      {Intrinsic::hexagon_F2_dfcmpge, 14571}, // __builtin_HEXAGON_F2_dfcmpge
      {Intrinsic::hexagon_F2_dfcmpgt, 14600}, // __builtin_HEXAGON_F2_dfcmpgt
      {Intrinsic::hexagon_F2_dfcmpuo, 14629}, // __builtin_HEXAGON_F2_dfcmpuo
      {Intrinsic::hexagon_F2_dfimm_n, 14658}, // __builtin_HEXAGON_F2_dfimm_n
      {Intrinsic::hexagon_F2_dfimm_p, 14687}, // __builtin_HEXAGON_F2_dfimm_p
      {Intrinsic::hexagon_F2_dfmax, 14716}, // __builtin_HEXAGON_F2_dfmax
      {Intrinsic::hexagon_F2_dfmin, 14743}, // __builtin_HEXAGON_F2_dfmin
      {Intrinsic::hexagon_F2_dfmpyfix, 14770}, // __builtin_HEXAGON_F2_dfmpyfix
      {Intrinsic::hexagon_F2_dfmpyhh, 14800}, // __builtin_HEXAGON_F2_dfmpyhh
      {Intrinsic::hexagon_F2_dfmpylh, 14829}, // __builtin_HEXAGON_F2_dfmpylh
      {Intrinsic::hexagon_F2_dfmpyll, 14858}, // __builtin_HEXAGON_F2_dfmpyll
      {Intrinsic::hexagon_F2_dfsub, 14887}, // __builtin_HEXAGON_F2_dfsub
      {Intrinsic::hexagon_F2_sfadd, 14914}, // __builtin_HEXAGON_F2_sfadd
      {Intrinsic::hexagon_F2_sfclass, 14941}, // __builtin_HEXAGON_F2_sfclass
      {Intrinsic::hexagon_F2_sfcmpeq, 14970}, // __builtin_HEXAGON_F2_sfcmpeq
      {Intrinsic::hexagon_F2_sfcmpge, 14999}, // __builtin_HEXAGON_F2_sfcmpge
      {Intrinsic::hexagon_F2_sfcmpgt, 15028}, // __builtin_HEXAGON_F2_sfcmpgt
      {Intrinsic::hexagon_F2_sfcmpuo, 15057}, // __builtin_HEXAGON_F2_sfcmpuo
      {Intrinsic::hexagon_F2_sffixupd, 15086}, // __builtin_HEXAGON_F2_sffixupd
      {Intrinsic::hexagon_F2_sffixupn, 15116}, // __builtin_HEXAGON_F2_sffixupn
      {Intrinsic::hexagon_F2_sffixupr, 15146}, // __builtin_HEXAGON_F2_sffixupr
      {Intrinsic::hexagon_F2_sffma, 15176}, // __builtin_HEXAGON_F2_sffma
      {Intrinsic::hexagon_F2_sffma_lib, 15203}, // __builtin_HEXAGON_F2_sffma_lib
      {Intrinsic::hexagon_F2_sffma_sc, 15234}, // __builtin_HEXAGON_F2_sffma_sc
      {Intrinsic::hexagon_F2_sffms, 15264}, // __builtin_HEXAGON_F2_sffms
      {Intrinsic::hexagon_F2_sffms_lib, 15291}, // __builtin_HEXAGON_F2_sffms_lib
      {Intrinsic::hexagon_F2_sfimm_n, 15322}, // __builtin_HEXAGON_F2_sfimm_n
      {Intrinsic::hexagon_F2_sfimm_p, 15351}, // __builtin_HEXAGON_F2_sfimm_p
      {Intrinsic::hexagon_F2_sfmax, 15380}, // __builtin_HEXAGON_F2_sfmax
      {Intrinsic::hexagon_F2_sfmin, 15407}, // __builtin_HEXAGON_F2_sfmin
      {Intrinsic::hexagon_F2_sfmpy, 15434}, // __builtin_HEXAGON_F2_sfmpy
      {Intrinsic::hexagon_F2_sfsub, 15461}, // __builtin_HEXAGON_F2_sfsub
      {Intrinsic::hexagon_L2_loadw_locked, 15488}, // __builtin_HEXAGON_L2_loadw_locked
      {Intrinsic::hexagon_L4_loadd_locked, 15522}, // __builtin_HEXAGON_L4_loadd_locked
      {Intrinsic::hexagon_M2_acci, 15556}, // __builtin_HEXAGON_M2_acci
      {Intrinsic::hexagon_M2_accii, 15582}, // __builtin_HEXAGON_M2_accii
      {Intrinsic::hexagon_M2_cmaci_s0, 15609}, // __builtin_HEXAGON_M2_cmaci_s0
      {Intrinsic::hexagon_M2_cmacr_s0, 15639}, // __builtin_HEXAGON_M2_cmacr_s0
      {Intrinsic::hexagon_M2_cmacs_s0, 15669}, // __builtin_HEXAGON_M2_cmacs_s0
      {Intrinsic::hexagon_M2_cmacs_s1, 15699}, // __builtin_HEXAGON_M2_cmacs_s1
      {Intrinsic::hexagon_M2_cmacsc_s0, 15729}, // __builtin_HEXAGON_M2_cmacsc_s0
      {Intrinsic::hexagon_M2_cmacsc_s1, 15760}, // __builtin_HEXAGON_M2_cmacsc_s1
      {Intrinsic::hexagon_M2_cmpyi_s0, 15791}, // __builtin_HEXAGON_M2_cmpyi_s0
      {Intrinsic::hexagon_M2_cmpyr_s0, 15821}, // __builtin_HEXAGON_M2_cmpyr_s0
      {Intrinsic::hexagon_M2_cmpyrs_s0, 15851}, // __builtin_HEXAGON_M2_cmpyrs_s0
      {Intrinsic::hexagon_M2_cmpyrs_s1, 15882}, // __builtin_HEXAGON_M2_cmpyrs_s1
      {Intrinsic::hexagon_M2_cmpyrsc_s0, 15913}, // __builtin_HEXAGON_M2_cmpyrsc_s0
      {Intrinsic::hexagon_M2_cmpyrsc_s1, 15945}, // __builtin_HEXAGON_M2_cmpyrsc_s1
      {Intrinsic::hexagon_M2_cmpys_s0, 15977}, // __builtin_HEXAGON_M2_cmpys_s0
      {Intrinsic::hexagon_M2_cmpys_s1, 16007}, // __builtin_HEXAGON_M2_cmpys_s1
      {Intrinsic::hexagon_M2_cmpysc_s0, 16037}, // __builtin_HEXAGON_M2_cmpysc_s0
      {Intrinsic::hexagon_M2_cmpysc_s1, 16068}, // __builtin_HEXAGON_M2_cmpysc_s1
      {Intrinsic::hexagon_M2_cnacs_s0, 16099}, // __builtin_HEXAGON_M2_cnacs_s0
      {Intrinsic::hexagon_M2_cnacs_s1, 16129}, // __builtin_HEXAGON_M2_cnacs_s1
      {Intrinsic::hexagon_M2_cnacsc_s0, 16159}, // __builtin_HEXAGON_M2_cnacsc_s0
      {Intrinsic::hexagon_M2_cnacsc_s1, 16190}, // __builtin_HEXAGON_M2_cnacsc_s1
      {Intrinsic::hexagon_M2_dpmpyss_acc_s0, 16221}, // __builtin_HEXAGON_M2_dpmpyss_acc_s0
      {Intrinsic::hexagon_M2_dpmpyss_nac_s0, 16257}, // __builtin_HEXAGON_M2_dpmpyss_nac_s0
      {Intrinsic::hexagon_M2_dpmpyss_rnd_s0, 16293}, // __builtin_HEXAGON_M2_dpmpyss_rnd_s0
      {Intrinsic::hexagon_M2_dpmpyss_s0, 16329}, // __builtin_HEXAGON_M2_dpmpyss_s0
      {Intrinsic::hexagon_M2_dpmpyuu_acc_s0, 16361}, // __builtin_HEXAGON_M2_dpmpyuu_acc_s0
      {Intrinsic::hexagon_M2_dpmpyuu_nac_s0, 16397}, // __builtin_HEXAGON_M2_dpmpyuu_nac_s0
      {Intrinsic::hexagon_M2_dpmpyuu_s0, 16433}, // __builtin_HEXAGON_M2_dpmpyuu_s0
      {Intrinsic::hexagon_M2_hmmpyh_rs1, 16465}, // __builtin_HEXAGON_M2_hmmpyh_rs1
      {Intrinsic::hexagon_M2_hmmpyh_s1, 16497}, // __builtin_HEXAGON_M2_hmmpyh_s1
      {Intrinsic::hexagon_M2_hmmpyl_rs1, 16528}, // __builtin_HEXAGON_M2_hmmpyl_rs1
      {Intrinsic::hexagon_M2_hmmpyl_s1, 16560}, // __builtin_HEXAGON_M2_hmmpyl_s1
      {Intrinsic::hexagon_M2_maci, 16591}, // __builtin_HEXAGON_M2_maci
      {Intrinsic::hexagon_M2_macsin, 16617}, // __builtin_HEXAGON_M2_macsin
      {Intrinsic::hexagon_M2_macsip, 16645}, // __builtin_HEXAGON_M2_macsip
      {Intrinsic::hexagon_M2_mmachs_rs0, 16673}, // __builtin_HEXAGON_M2_mmachs_rs0
      {Intrinsic::hexagon_M2_mmachs_rs1, 16705}, // __builtin_HEXAGON_M2_mmachs_rs1
      {Intrinsic::hexagon_M2_mmachs_s0, 16737}, // __builtin_HEXAGON_M2_mmachs_s0
      {Intrinsic::hexagon_M2_mmachs_s1, 16768}, // __builtin_HEXAGON_M2_mmachs_s1
      {Intrinsic::hexagon_M2_mmacls_rs0, 16799}, // __builtin_HEXAGON_M2_mmacls_rs0
      {Intrinsic::hexagon_M2_mmacls_rs1, 16831}, // __builtin_HEXAGON_M2_mmacls_rs1
      {Intrinsic::hexagon_M2_mmacls_s0, 16863}, // __builtin_HEXAGON_M2_mmacls_s0
      {Intrinsic::hexagon_M2_mmacls_s1, 16894}, // __builtin_HEXAGON_M2_mmacls_s1
      {Intrinsic::hexagon_M2_mmacuhs_rs0, 16925}, // __builtin_HEXAGON_M2_mmacuhs_rs0
      {Intrinsic::hexagon_M2_mmacuhs_rs1, 16958}, // __builtin_HEXAGON_M2_mmacuhs_rs1
      {Intrinsic::hexagon_M2_mmacuhs_s0, 16991}, // __builtin_HEXAGON_M2_mmacuhs_s0
      {Intrinsic::hexagon_M2_mmacuhs_s1, 17023}, // __builtin_HEXAGON_M2_mmacuhs_s1
      {Intrinsic::hexagon_M2_mmaculs_rs0, 17055}, // __builtin_HEXAGON_M2_mmaculs_rs0
      {Intrinsic::hexagon_M2_mmaculs_rs1, 17088}, // __builtin_HEXAGON_M2_mmaculs_rs1
      {Intrinsic::hexagon_M2_mmaculs_s0, 17121}, // __builtin_HEXAGON_M2_mmaculs_s0
      {Intrinsic::hexagon_M2_mmaculs_s1, 17153}, // __builtin_HEXAGON_M2_mmaculs_s1
      {Intrinsic::hexagon_M2_mmpyh_rs0, 17185}, // __builtin_HEXAGON_M2_mmpyh_rs0
      {Intrinsic::hexagon_M2_mmpyh_rs1, 17216}, // __builtin_HEXAGON_M2_mmpyh_rs1
      {Intrinsic::hexagon_M2_mmpyh_s0, 17247}, // __builtin_HEXAGON_M2_mmpyh_s0
      {Intrinsic::hexagon_M2_mmpyh_s1, 17277}, // __builtin_HEXAGON_M2_mmpyh_s1
      {Intrinsic::hexagon_M2_mmpyl_rs0, 17307}, // __builtin_HEXAGON_M2_mmpyl_rs0
      {Intrinsic::hexagon_M2_mmpyl_rs1, 17338}, // __builtin_HEXAGON_M2_mmpyl_rs1
      {Intrinsic::hexagon_M2_mmpyl_s0, 17369}, // __builtin_HEXAGON_M2_mmpyl_s0
      {Intrinsic::hexagon_M2_mmpyl_s1, 17399}, // __builtin_HEXAGON_M2_mmpyl_s1
      {Intrinsic::hexagon_M2_mmpyuh_rs0, 17429}, // __builtin_HEXAGON_M2_mmpyuh_rs0
      {Intrinsic::hexagon_M2_mmpyuh_rs1, 17461}, // __builtin_HEXAGON_M2_mmpyuh_rs1
      {Intrinsic::hexagon_M2_mmpyuh_s0, 17493}, // __builtin_HEXAGON_M2_mmpyuh_s0
      {Intrinsic::hexagon_M2_mmpyuh_s1, 17524}, // __builtin_HEXAGON_M2_mmpyuh_s1
      {Intrinsic::hexagon_M2_mmpyul_rs0, 17555}, // __builtin_HEXAGON_M2_mmpyul_rs0
      {Intrinsic::hexagon_M2_mmpyul_rs1, 17587}, // __builtin_HEXAGON_M2_mmpyul_rs1
      {Intrinsic::hexagon_M2_mmpyul_s0, 17619}, // __builtin_HEXAGON_M2_mmpyul_s0
      {Intrinsic::hexagon_M2_mmpyul_s1, 17650}, // __builtin_HEXAGON_M2_mmpyul_s1
      {Intrinsic::hexagon_M2_mnaci, 17681}, // __builtin_HEXAGON_M2_mnaci
      {Intrinsic::hexagon_M2_mpy_acc_hh_s0, 17708}, // __builtin_HEXAGON_M2_mpy_acc_hh_s0
      {Intrinsic::hexagon_M2_mpy_acc_hh_s1, 17743}, // __builtin_HEXAGON_M2_mpy_acc_hh_s1
      {Intrinsic::hexagon_M2_mpy_acc_hl_s0, 17778}, // __builtin_HEXAGON_M2_mpy_acc_hl_s0
      {Intrinsic::hexagon_M2_mpy_acc_hl_s1, 17813}, // __builtin_HEXAGON_M2_mpy_acc_hl_s1
      {Intrinsic::hexagon_M2_mpy_acc_lh_s0, 17848}, // __builtin_HEXAGON_M2_mpy_acc_lh_s0
      {Intrinsic::hexagon_M2_mpy_acc_lh_s1, 17883}, // __builtin_HEXAGON_M2_mpy_acc_lh_s1
      {Intrinsic::hexagon_M2_mpy_acc_ll_s0, 17918}, // __builtin_HEXAGON_M2_mpy_acc_ll_s0
      {Intrinsic::hexagon_M2_mpy_acc_ll_s1, 17953}, // __builtin_HEXAGON_M2_mpy_acc_ll_s1
      {Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0, 17988}, // __builtin_HEXAGON_M2_mpy_acc_sat_hh_s0
      {Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1, 18027}, // __builtin_HEXAGON_M2_mpy_acc_sat_hh_s1
      {Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0, 18066}, // __builtin_HEXAGON_M2_mpy_acc_sat_hl_s0
      {Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1, 18105}, // __builtin_HEXAGON_M2_mpy_acc_sat_hl_s1
      {Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0, 18144}, // __builtin_HEXAGON_M2_mpy_acc_sat_lh_s0
      {Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1, 18183}, // __builtin_HEXAGON_M2_mpy_acc_sat_lh_s1
      {Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0, 18222}, // __builtin_HEXAGON_M2_mpy_acc_sat_ll_s0
      {Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1, 18261}, // __builtin_HEXAGON_M2_mpy_acc_sat_ll_s1
      {Intrinsic::hexagon_M2_mpy_hh_s0, 18300}, // __builtin_HEXAGON_M2_mpy_hh_s0
      {Intrinsic::hexagon_M2_mpy_hh_s1, 18331}, // __builtin_HEXAGON_M2_mpy_hh_s1
      {Intrinsic::hexagon_M2_mpy_hl_s0, 18362}, // __builtin_HEXAGON_M2_mpy_hl_s0
      {Intrinsic::hexagon_M2_mpy_hl_s1, 18393}, // __builtin_HEXAGON_M2_mpy_hl_s1
      {Intrinsic::hexagon_M2_mpy_lh_s0, 18424}, // __builtin_HEXAGON_M2_mpy_lh_s0
      {Intrinsic::hexagon_M2_mpy_lh_s1, 18455}, // __builtin_HEXAGON_M2_mpy_lh_s1
      {Intrinsic::hexagon_M2_mpy_ll_s0, 18486}, // __builtin_HEXAGON_M2_mpy_ll_s0
      {Intrinsic::hexagon_M2_mpy_ll_s1, 18517}, // __builtin_HEXAGON_M2_mpy_ll_s1
      {Intrinsic::hexagon_M2_mpy_nac_hh_s0, 18548}, // __builtin_HEXAGON_M2_mpy_nac_hh_s0
      {Intrinsic::hexagon_M2_mpy_nac_hh_s1, 18583}, // __builtin_HEXAGON_M2_mpy_nac_hh_s1
      {Intrinsic::hexagon_M2_mpy_nac_hl_s0, 18618}, // __builtin_HEXAGON_M2_mpy_nac_hl_s0
      {Intrinsic::hexagon_M2_mpy_nac_hl_s1, 18653}, // __builtin_HEXAGON_M2_mpy_nac_hl_s1
      {Intrinsic::hexagon_M2_mpy_nac_lh_s0, 18688}, // __builtin_HEXAGON_M2_mpy_nac_lh_s0
      {Intrinsic::hexagon_M2_mpy_nac_lh_s1, 18723}, // __builtin_HEXAGON_M2_mpy_nac_lh_s1
      {Intrinsic::hexagon_M2_mpy_nac_ll_s0, 18758}, // __builtin_HEXAGON_M2_mpy_nac_ll_s0
      {Intrinsic::hexagon_M2_mpy_nac_ll_s1, 18793}, // __builtin_HEXAGON_M2_mpy_nac_ll_s1
      {Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0, 18828}, // __builtin_HEXAGON_M2_mpy_nac_sat_hh_s0
      {Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1, 18867}, // __builtin_HEXAGON_M2_mpy_nac_sat_hh_s1
      {Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0, 18906}, // __builtin_HEXAGON_M2_mpy_nac_sat_hl_s0
      {Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1, 18945}, // __builtin_HEXAGON_M2_mpy_nac_sat_hl_s1
      {Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0, 18984}, // __builtin_HEXAGON_M2_mpy_nac_sat_lh_s0
      {Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1, 19023}, // __builtin_HEXAGON_M2_mpy_nac_sat_lh_s1
      {Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0, 19062}, // __builtin_HEXAGON_M2_mpy_nac_sat_ll_s0
      {Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1, 19101}, // __builtin_HEXAGON_M2_mpy_nac_sat_ll_s1
      {Intrinsic::hexagon_M2_mpy_rnd_hh_s0, 19140}, // __builtin_HEXAGON_M2_mpy_rnd_hh_s0
      {Intrinsic::hexagon_M2_mpy_rnd_hh_s1, 19175}, // __builtin_HEXAGON_M2_mpy_rnd_hh_s1
      {Intrinsic::hexagon_M2_mpy_rnd_hl_s0, 19210}, // __builtin_HEXAGON_M2_mpy_rnd_hl_s0
      {Intrinsic::hexagon_M2_mpy_rnd_hl_s1, 19245}, // __builtin_HEXAGON_M2_mpy_rnd_hl_s1
      {Intrinsic::hexagon_M2_mpy_rnd_lh_s0, 19280}, // __builtin_HEXAGON_M2_mpy_rnd_lh_s0
      {Intrinsic::hexagon_M2_mpy_rnd_lh_s1, 19315}, // __builtin_HEXAGON_M2_mpy_rnd_lh_s1
      {Intrinsic::hexagon_M2_mpy_rnd_ll_s0, 19350}, // __builtin_HEXAGON_M2_mpy_rnd_ll_s0
      {Intrinsic::hexagon_M2_mpy_rnd_ll_s1, 19385}, // __builtin_HEXAGON_M2_mpy_rnd_ll_s1
      {Intrinsic::hexagon_M2_mpy_sat_hh_s0, 19420}, // __builtin_HEXAGON_M2_mpy_sat_hh_s0
      {Intrinsic::hexagon_M2_mpy_sat_hh_s1, 19455}, // __builtin_HEXAGON_M2_mpy_sat_hh_s1
      {Intrinsic::hexagon_M2_mpy_sat_hl_s0, 19490}, // __builtin_HEXAGON_M2_mpy_sat_hl_s0
      {Intrinsic::hexagon_M2_mpy_sat_hl_s1, 19525}, // __builtin_HEXAGON_M2_mpy_sat_hl_s1
      {Intrinsic::hexagon_M2_mpy_sat_lh_s0, 19560}, // __builtin_HEXAGON_M2_mpy_sat_lh_s0
      {Intrinsic::hexagon_M2_mpy_sat_lh_s1, 19595}, // __builtin_HEXAGON_M2_mpy_sat_lh_s1
      {Intrinsic::hexagon_M2_mpy_sat_ll_s0, 19630}, // __builtin_HEXAGON_M2_mpy_sat_ll_s0
      {Intrinsic::hexagon_M2_mpy_sat_ll_s1, 19665}, // __builtin_HEXAGON_M2_mpy_sat_ll_s1
      {Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0, 19700}, // __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0
      {Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1, 19739}, // __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1
      {Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0, 19778}, // __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0
      {Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1, 19817}, // __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1
      {Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0, 19856}, // __builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0
      {Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1, 19895}, // __builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1
      {Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0, 19934}, // __builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0
      {Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1, 19973}, // __builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1
      {Intrinsic::hexagon_M2_mpy_up, 20012}, // __builtin_HEXAGON_M2_mpy_up
      {Intrinsic::hexagon_M2_mpy_up_s1, 20040}, // __builtin_HEXAGON_M2_mpy_up_s1
      {Intrinsic::hexagon_M2_mpy_up_s1_sat, 20071}, // __builtin_HEXAGON_M2_mpy_up_s1_sat
      {Intrinsic::hexagon_M2_mpyd_acc_hh_s0, 20106}, // __builtin_HEXAGON_M2_mpyd_acc_hh_s0
      {Intrinsic::hexagon_M2_mpyd_acc_hh_s1, 20142}, // __builtin_HEXAGON_M2_mpyd_acc_hh_s1
      {Intrinsic::hexagon_M2_mpyd_acc_hl_s0, 20178}, // __builtin_HEXAGON_M2_mpyd_acc_hl_s0
      {Intrinsic::hexagon_M2_mpyd_acc_hl_s1, 20214}, // __builtin_HEXAGON_M2_mpyd_acc_hl_s1
      {Intrinsic::hexagon_M2_mpyd_acc_lh_s0, 20250}, // __builtin_HEXAGON_M2_mpyd_acc_lh_s0
      {Intrinsic::hexagon_M2_mpyd_acc_lh_s1, 20286}, // __builtin_HEXAGON_M2_mpyd_acc_lh_s1
      {Intrinsic::hexagon_M2_mpyd_acc_ll_s0, 20322}, // __builtin_HEXAGON_M2_mpyd_acc_ll_s0
      {Intrinsic::hexagon_M2_mpyd_acc_ll_s1, 20358}, // __builtin_HEXAGON_M2_mpyd_acc_ll_s1
      {Intrinsic::hexagon_M2_mpyd_hh_s0, 20394}, // __builtin_HEXAGON_M2_mpyd_hh_s0
      {Intrinsic::hexagon_M2_mpyd_hh_s1, 20426}, // __builtin_HEXAGON_M2_mpyd_hh_s1
      {Intrinsic::hexagon_M2_mpyd_hl_s0, 20458}, // __builtin_HEXAGON_M2_mpyd_hl_s0
      {Intrinsic::hexagon_M2_mpyd_hl_s1, 20490}, // __builtin_HEXAGON_M2_mpyd_hl_s1
      {Intrinsic::hexagon_M2_mpyd_lh_s0, 20522}, // __builtin_HEXAGON_M2_mpyd_lh_s0
      {Intrinsic::hexagon_M2_mpyd_lh_s1, 20554}, // __builtin_HEXAGON_M2_mpyd_lh_s1
      {Intrinsic::hexagon_M2_mpyd_ll_s0, 20586}, // __builtin_HEXAGON_M2_mpyd_ll_s0
      {Intrinsic::hexagon_M2_mpyd_ll_s1, 20618}, // __builtin_HEXAGON_M2_mpyd_ll_s1
      {Intrinsic::hexagon_M2_mpyd_nac_hh_s0, 20650}, // __builtin_HEXAGON_M2_mpyd_nac_hh_s0
      {Intrinsic::hexagon_M2_mpyd_nac_hh_s1, 20686}, // __builtin_HEXAGON_M2_mpyd_nac_hh_s1
      {Intrinsic::hexagon_M2_mpyd_nac_hl_s0, 20722}, // __builtin_HEXAGON_M2_mpyd_nac_hl_s0
      {Intrinsic::hexagon_M2_mpyd_nac_hl_s1, 20758}, // __builtin_HEXAGON_M2_mpyd_nac_hl_s1
      {Intrinsic::hexagon_M2_mpyd_nac_lh_s0, 20794}, // __builtin_HEXAGON_M2_mpyd_nac_lh_s0
      {Intrinsic::hexagon_M2_mpyd_nac_lh_s1, 20830}, // __builtin_HEXAGON_M2_mpyd_nac_lh_s1
      {Intrinsic::hexagon_M2_mpyd_nac_ll_s0, 20866}, // __builtin_HEXAGON_M2_mpyd_nac_ll_s0
      {Intrinsic::hexagon_M2_mpyd_nac_ll_s1, 20902}, // __builtin_HEXAGON_M2_mpyd_nac_ll_s1
      {Intrinsic::hexagon_M2_mpyd_rnd_hh_s0, 20938}, // __builtin_HEXAGON_M2_mpyd_rnd_hh_s0
      {Intrinsic::hexagon_M2_mpyd_rnd_hh_s1, 20974}, // __builtin_HEXAGON_M2_mpyd_rnd_hh_s1
      {Intrinsic::hexagon_M2_mpyd_rnd_hl_s0, 21010}, // __builtin_HEXAGON_M2_mpyd_rnd_hl_s0
      {Intrinsic::hexagon_M2_mpyd_rnd_hl_s1, 21046}, // __builtin_HEXAGON_M2_mpyd_rnd_hl_s1
      {Intrinsic::hexagon_M2_mpyd_rnd_lh_s0, 21082}, // __builtin_HEXAGON_M2_mpyd_rnd_lh_s0
      {Intrinsic::hexagon_M2_mpyd_rnd_lh_s1, 21118}, // __builtin_HEXAGON_M2_mpyd_rnd_lh_s1
      {Intrinsic::hexagon_M2_mpyd_rnd_ll_s0, 21154}, // __builtin_HEXAGON_M2_mpyd_rnd_ll_s0
      {Intrinsic::hexagon_M2_mpyd_rnd_ll_s1, 21190}, // __builtin_HEXAGON_M2_mpyd_rnd_ll_s1
      {Intrinsic::hexagon_M2_mpyi, 21226}, // __builtin_HEXAGON_M2_mpyi
      {Intrinsic::hexagon_M2_mpysmi, 21252}, // __builtin_HEXAGON_M2_mpysmi
      {Intrinsic::hexagon_M2_mpysu_up, 21280}, // __builtin_HEXAGON_M2_mpysu_up
      {Intrinsic::hexagon_M2_mpyu_acc_hh_s0, 21310}, // __builtin_HEXAGON_M2_mpyu_acc_hh_s0
      {Intrinsic::hexagon_M2_mpyu_acc_hh_s1, 21346}, // __builtin_HEXAGON_M2_mpyu_acc_hh_s1
      {Intrinsic::hexagon_M2_mpyu_acc_hl_s0, 21382}, // __builtin_HEXAGON_M2_mpyu_acc_hl_s0
      {Intrinsic::hexagon_M2_mpyu_acc_hl_s1, 21418}, // __builtin_HEXAGON_M2_mpyu_acc_hl_s1
      {Intrinsic::hexagon_M2_mpyu_acc_lh_s0, 21454}, // __builtin_HEXAGON_M2_mpyu_acc_lh_s0
      {Intrinsic::hexagon_M2_mpyu_acc_lh_s1, 21490}, // __builtin_HEXAGON_M2_mpyu_acc_lh_s1
      {Intrinsic::hexagon_M2_mpyu_acc_ll_s0, 21526}, // __builtin_HEXAGON_M2_mpyu_acc_ll_s0
      {Intrinsic::hexagon_M2_mpyu_acc_ll_s1, 21562}, // __builtin_HEXAGON_M2_mpyu_acc_ll_s1
      {Intrinsic::hexagon_M2_mpyu_hh_s0, 21598}, // __builtin_HEXAGON_M2_mpyu_hh_s0
      {Intrinsic::hexagon_M2_mpyu_hh_s1, 21630}, // __builtin_HEXAGON_M2_mpyu_hh_s1
      {Intrinsic::hexagon_M2_mpyu_hl_s0, 21662}, // __builtin_HEXAGON_M2_mpyu_hl_s0
      {Intrinsic::hexagon_M2_mpyu_hl_s1, 21694}, // __builtin_HEXAGON_M2_mpyu_hl_s1
      {Intrinsic::hexagon_M2_mpyu_lh_s0, 21726}, // __builtin_HEXAGON_M2_mpyu_lh_s0
      {Intrinsic::hexagon_M2_mpyu_lh_s1, 21758}, // __builtin_HEXAGON_M2_mpyu_lh_s1
      {Intrinsic::hexagon_M2_mpyu_ll_s0, 21790}, // __builtin_HEXAGON_M2_mpyu_ll_s0
      {Intrinsic::hexagon_M2_mpyu_ll_s1, 21822}, // __builtin_HEXAGON_M2_mpyu_ll_s1
      {Intrinsic::hexagon_M2_mpyu_nac_hh_s0, 21854}, // __builtin_HEXAGON_M2_mpyu_nac_hh_s0
      {Intrinsic::hexagon_M2_mpyu_nac_hh_s1, 21890}, // __builtin_HEXAGON_M2_mpyu_nac_hh_s1
      {Intrinsic::hexagon_M2_mpyu_nac_hl_s0, 21926}, // __builtin_HEXAGON_M2_mpyu_nac_hl_s0
      {Intrinsic::hexagon_M2_mpyu_nac_hl_s1, 21962}, // __builtin_HEXAGON_M2_mpyu_nac_hl_s1
      {Intrinsic::hexagon_M2_mpyu_nac_lh_s0, 21998}, // __builtin_HEXAGON_M2_mpyu_nac_lh_s0
      {Intrinsic::hexagon_M2_mpyu_nac_lh_s1, 22034}, // __builtin_HEXAGON_M2_mpyu_nac_lh_s1
      {Intrinsic::hexagon_M2_mpyu_nac_ll_s0, 22070}, // __builtin_HEXAGON_M2_mpyu_nac_ll_s0
      {Intrinsic::hexagon_M2_mpyu_nac_ll_s1, 22106}, // __builtin_HEXAGON_M2_mpyu_nac_ll_s1
      {Intrinsic::hexagon_M2_mpyu_up, 22142}, // __builtin_HEXAGON_M2_mpyu_up
      {Intrinsic::hexagon_M2_mpyud_acc_hh_s0, 22171}, // __builtin_HEXAGON_M2_mpyud_acc_hh_s0
      {Intrinsic::hexagon_M2_mpyud_acc_hh_s1, 22208}, // __builtin_HEXAGON_M2_mpyud_acc_hh_s1
      {Intrinsic::hexagon_M2_mpyud_acc_hl_s0, 22245}, // __builtin_HEXAGON_M2_mpyud_acc_hl_s0
      {Intrinsic::hexagon_M2_mpyud_acc_hl_s1, 22282}, // __builtin_HEXAGON_M2_mpyud_acc_hl_s1
      {Intrinsic::hexagon_M2_mpyud_acc_lh_s0, 22319}, // __builtin_HEXAGON_M2_mpyud_acc_lh_s0
      {Intrinsic::hexagon_M2_mpyud_acc_lh_s1, 22356}, // __builtin_HEXAGON_M2_mpyud_acc_lh_s1
      {Intrinsic::hexagon_M2_mpyud_acc_ll_s0, 22393}, // __builtin_HEXAGON_M2_mpyud_acc_ll_s0
      {Intrinsic::hexagon_M2_mpyud_acc_ll_s1, 22430}, // __builtin_HEXAGON_M2_mpyud_acc_ll_s1
      {Intrinsic::hexagon_M2_mpyud_hh_s0, 22467}, // __builtin_HEXAGON_M2_mpyud_hh_s0
      {Intrinsic::hexagon_M2_mpyud_hh_s1, 22500}, // __builtin_HEXAGON_M2_mpyud_hh_s1
      {Intrinsic::hexagon_M2_mpyud_hl_s0, 22533}, // __builtin_HEXAGON_M2_mpyud_hl_s0
      {Intrinsic::hexagon_M2_mpyud_hl_s1, 22566}, // __builtin_HEXAGON_M2_mpyud_hl_s1
      {Intrinsic::hexagon_M2_mpyud_lh_s0, 22599}, // __builtin_HEXAGON_M2_mpyud_lh_s0
      {Intrinsic::hexagon_M2_mpyud_lh_s1, 22632}, // __builtin_HEXAGON_M2_mpyud_lh_s1
      {Intrinsic::hexagon_M2_mpyud_ll_s0, 22665}, // __builtin_HEXAGON_M2_mpyud_ll_s0
      {Intrinsic::hexagon_M2_mpyud_ll_s1, 22698}, // __builtin_HEXAGON_M2_mpyud_ll_s1
      {Intrinsic::hexagon_M2_mpyud_nac_hh_s0, 22731}, // __builtin_HEXAGON_M2_mpyud_nac_hh_s0
      {Intrinsic::hexagon_M2_mpyud_nac_hh_s1, 22768}, // __builtin_HEXAGON_M2_mpyud_nac_hh_s1
      {Intrinsic::hexagon_M2_mpyud_nac_hl_s0, 22805}, // __builtin_HEXAGON_M2_mpyud_nac_hl_s0
      {Intrinsic::hexagon_M2_mpyud_nac_hl_s1, 22842}, // __builtin_HEXAGON_M2_mpyud_nac_hl_s1
      {Intrinsic::hexagon_M2_mpyud_nac_lh_s0, 22879}, // __builtin_HEXAGON_M2_mpyud_nac_lh_s0
      {Intrinsic::hexagon_M2_mpyud_nac_lh_s1, 22916}, // __builtin_HEXAGON_M2_mpyud_nac_lh_s1
      {Intrinsic::hexagon_M2_mpyud_nac_ll_s0, 22953}, // __builtin_HEXAGON_M2_mpyud_nac_ll_s0
      {Intrinsic::hexagon_M2_mpyud_nac_ll_s1, 22990}, // __builtin_HEXAGON_M2_mpyud_nac_ll_s1
      {Intrinsic::hexagon_M2_mpyui, 23027}, // __builtin_HEXAGON_M2_mpyui
      {Intrinsic::hexagon_M2_nacci, 23054}, // __builtin_HEXAGON_M2_nacci
      {Intrinsic::hexagon_M2_naccii, 23081}, // __builtin_HEXAGON_M2_naccii
      {Intrinsic::hexagon_M2_subacc, 23109}, // __builtin_HEXAGON_M2_subacc
      {Intrinsic::hexagon_M2_vabsdiffh, 23137}, // __builtin_HEXAGON_M2_vabsdiffh
      {Intrinsic::hexagon_M2_vabsdiffw, 23168}, // __builtin_HEXAGON_M2_vabsdiffw
      {Intrinsic::hexagon_M2_vcmac_s0_sat_i, 23199}, // __builtin_HEXAGON_M2_vcmac_s0_sat_i
      {Intrinsic::hexagon_M2_vcmac_s0_sat_r, 23235}, // __builtin_HEXAGON_M2_vcmac_s0_sat_r
      {Intrinsic::hexagon_M2_vcmpy_s0_sat_i, 23271}, // __builtin_HEXAGON_M2_vcmpy_s0_sat_i
      {Intrinsic::hexagon_M2_vcmpy_s0_sat_r, 23307}, // __builtin_HEXAGON_M2_vcmpy_s0_sat_r
      {Intrinsic::hexagon_M2_vcmpy_s1_sat_i, 23343}, // __builtin_HEXAGON_M2_vcmpy_s1_sat_i
      {Intrinsic::hexagon_M2_vcmpy_s1_sat_r, 23379}, // __builtin_HEXAGON_M2_vcmpy_s1_sat_r
      {Intrinsic::hexagon_M2_vdmacs_s0, 23415}, // __builtin_HEXAGON_M2_vdmacs_s0
      {Intrinsic::hexagon_M2_vdmacs_s1, 23446}, // __builtin_HEXAGON_M2_vdmacs_s1
      {Intrinsic::hexagon_M2_vdmpyrs_s0, 23477}, // __builtin_HEXAGON_M2_vdmpyrs_s0
      {Intrinsic::hexagon_M2_vdmpyrs_s1, 23509}, // __builtin_HEXAGON_M2_vdmpyrs_s1
      {Intrinsic::hexagon_M2_vdmpys_s0, 23541}, // __builtin_HEXAGON_M2_vdmpys_s0
      {Intrinsic::hexagon_M2_vdmpys_s1, 23572}, // __builtin_HEXAGON_M2_vdmpys_s1
      {Intrinsic::hexagon_M2_vmac2, 23603}, // __builtin_HEXAGON_M2_vmac2
      {Intrinsic::hexagon_M2_vmac2es, 23630}, // __builtin_HEXAGON_M2_vmac2es
      {Intrinsic::hexagon_M2_vmac2es_s0, 23659}, // __builtin_HEXAGON_M2_vmac2es_s0
      {Intrinsic::hexagon_M2_vmac2es_s1, 23691}, // __builtin_HEXAGON_M2_vmac2es_s1
      {Intrinsic::hexagon_M2_vmac2s_s0, 23723}, // __builtin_HEXAGON_M2_vmac2s_s0
      {Intrinsic::hexagon_M2_vmac2s_s1, 23754}, // __builtin_HEXAGON_M2_vmac2s_s1
      {Intrinsic::hexagon_M2_vmac2su_s0, 23785}, // __builtin_HEXAGON_M2_vmac2su_s0
      {Intrinsic::hexagon_M2_vmac2su_s1, 23817}, // __builtin_HEXAGON_M2_vmac2su_s1
      {Intrinsic::hexagon_M2_vmpy2es_s0, 23849}, // __builtin_HEXAGON_M2_vmpy2es_s0
      {Intrinsic::hexagon_M2_vmpy2es_s1, 23881}, // __builtin_HEXAGON_M2_vmpy2es_s1
      {Intrinsic::hexagon_M2_vmpy2s_s0, 23913}, // __builtin_HEXAGON_M2_vmpy2s_s0
      {Intrinsic::hexagon_M2_vmpy2s_s0pack, 23944}, // __builtin_HEXAGON_M2_vmpy2s_s0pack
      {Intrinsic::hexagon_M2_vmpy2s_s1, 23979}, // __builtin_HEXAGON_M2_vmpy2s_s1
      {Intrinsic::hexagon_M2_vmpy2s_s1pack, 24010}, // __builtin_HEXAGON_M2_vmpy2s_s1pack
      {Intrinsic::hexagon_M2_vmpy2su_s0, 24045}, // __builtin_HEXAGON_M2_vmpy2su_s0
      {Intrinsic::hexagon_M2_vmpy2su_s1, 24077}, // __builtin_HEXAGON_M2_vmpy2su_s1
      {Intrinsic::hexagon_M2_vraddh, 24109}, // __builtin_HEXAGON_M2_vraddh
      {Intrinsic::hexagon_M2_vradduh, 24137}, // __builtin_HEXAGON_M2_vradduh
      {Intrinsic::hexagon_M2_vrcmaci_s0, 24166}, // __builtin_HEXAGON_M2_vrcmaci_s0
      {Intrinsic::hexagon_M2_vrcmaci_s0c, 24198}, // __builtin_HEXAGON_M2_vrcmaci_s0c
      {Intrinsic::hexagon_M2_vrcmacr_s0, 24231}, // __builtin_HEXAGON_M2_vrcmacr_s0
      {Intrinsic::hexagon_M2_vrcmacr_s0c, 24263}, // __builtin_HEXAGON_M2_vrcmacr_s0c
      {Intrinsic::hexagon_M2_vrcmpyi_s0, 24296}, // __builtin_HEXAGON_M2_vrcmpyi_s0
      {Intrinsic::hexagon_M2_vrcmpyi_s0c, 24328}, // __builtin_HEXAGON_M2_vrcmpyi_s0c
      {Intrinsic::hexagon_M2_vrcmpyr_s0, 24361}, // __builtin_HEXAGON_M2_vrcmpyr_s0
      {Intrinsic::hexagon_M2_vrcmpyr_s0c, 24393}, // __builtin_HEXAGON_M2_vrcmpyr_s0c
      {Intrinsic::hexagon_M2_vrcmpys_acc_s1, 24426}, // __builtin_HEXAGON_M2_vrcmpys_acc_s1
      {Intrinsic::hexagon_M2_vrcmpys_s1, 24462}, // __builtin_HEXAGON_M2_vrcmpys_s1
      {Intrinsic::hexagon_M2_vrcmpys_s1rp, 24494}, // __builtin_HEXAGON_M2_vrcmpys_s1rp
      {Intrinsic::hexagon_M2_vrmac_s0, 24528}, // __builtin_HEXAGON_M2_vrmac_s0
      {Intrinsic::hexagon_M2_vrmpy_s0, 24558}, // __builtin_HEXAGON_M2_vrmpy_s0
      {Intrinsic::hexagon_M2_xor_xacc, 24588}, // __builtin_HEXAGON_M2_xor_xacc
      {Intrinsic::hexagon_M4_and_and, 24618}, // __builtin_HEXAGON_M4_and_and
      {Intrinsic::hexagon_M4_and_andn, 24647}, // __builtin_HEXAGON_M4_and_andn
      {Intrinsic::hexagon_M4_and_or, 24677}, // __builtin_HEXAGON_M4_and_or
      {Intrinsic::hexagon_M4_and_xor, 24705}, // __builtin_HEXAGON_M4_and_xor
      {Intrinsic::hexagon_M4_cmpyi_wh, 24734}, // __builtin_HEXAGON_M4_cmpyi_wh
      {Intrinsic::hexagon_M4_cmpyi_whc, 24764}, // __builtin_HEXAGON_M4_cmpyi_whc
      {Intrinsic::hexagon_M4_cmpyr_wh, 24795}, // __builtin_HEXAGON_M4_cmpyr_wh
      {Intrinsic::hexagon_M4_cmpyr_whc, 24825}, // __builtin_HEXAGON_M4_cmpyr_whc
      {Intrinsic::hexagon_M4_mac_up_s1_sat, 24856}, // __builtin_HEXAGON_M4_mac_up_s1_sat
      {Intrinsic::hexagon_M4_mpyri_addi, 24891}, // __builtin_HEXAGON_M4_mpyri_addi
      {Intrinsic::hexagon_M4_mpyri_addr, 24923}, // __builtin_HEXAGON_M4_mpyri_addr
      {Intrinsic::hexagon_M4_mpyri_addr_u2, 24955}, // __builtin_HEXAGON_M4_mpyri_addr_u2
      {Intrinsic::hexagon_M4_mpyrr_addi, 24990}, // __builtin_HEXAGON_M4_mpyrr_addi
      {Intrinsic::hexagon_M4_mpyrr_addr, 25022}, // __builtin_HEXAGON_M4_mpyrr_addr
      {Intrinsic::hexagon_M4_nac_up_s1_sat, 25054}, // __builtin_HEXAGON_M4_nac_up_s1_sat
      {Intrinsic::hexagon_M4_or_and, 25089}, // __builtin_HEXAGON_M4_or_and
      {Intrinsic::hexagon_M4_or_andn, 25117}, // __builtin_HEXAGON_M4_or_andn
      {Intrinsic::hexagon_M4_or_or, 25146}, // __builtin_HEXAGON_M4_or_or
      {Intrinsic::hexagon_M4_or_xor, 25173}, // __builtin_HEXAGON_M4_or_xor
      {Intrinsic::hexagon_M4_pmpyw, 25201}, // __builtin_HEXAGON_M4_pmpyw
      {Intrinsic::hexagon_M4_pmpyw_acc, 25228}, // __builtin_HEXAGON_M4_pmpyw_acc
      {Intrinsic::hexagon_M4_vpmpyh, 25259}, // __builtin_HEXAGON_M4_vpmpyh
      {Intrinsic::hexagon_M4_vpmpyh_acc, 25287}, // __builtin_HEXAGON_M4_vpmpyh_acc
      {Intrinsic::hexagon_M4_vrmpyeh_acc_s0, 25319}, // __builtin_HEXAGON_M4_vrmpyeh_acc_s0
      {Intrinsic::hexagon_M4_vrmpyeh_acc_s1, 25355}, // __builtin_HEXAGON_M4_vrmpyeh_acc_s1
      {Intrinsic::hexagon_M4_vrmpyeh_s0, 25391}, // __builtin_HEXAGON_M4_vrmpyeh_s0
      {Intrinsic::hexagon_M4_vrmpyeh_s1, 25423}, // __builtin_HEXAGON_M4_vrmpyeh_s1
      {Intrinsic::hexagon_M4_vrmpyoh_acc_s0, 25455}, // __builtin_HEXAGON_M4_vrmpyoh_acc_s0
      {Intrinsic::hexagon_M4_vrmpyoh_acc_s1, 25491}, // __builtin_HEXAGON_M4_vrmpyoh_acc_s1
      {Intrinsic::hexagon_M4_vrmpyoh_s0, 25527}, // __builtin_HEXAGON_M4_vrmpyoh_s0
      {Intrinsic::hexagon_M4_vrmpyoh_s1, 25559}, // __builtin_HEXAGON_M4_vrmpyoh_s1
      {Intrinsic::hexagon_M4_xor_and, 25591}, // __builtin_HEXAGON_M4_xor_and
      {Intrinsic::hexagon_M4_xor_andn, 25620}, // __builtin_HEXAGON_M4_xor_andn
      {Intrinsic::hexagon_M4_xor_or, 25650}, // __builtin_HEXAGON_M4_xor_or
      {Intrinsic::hexagon_M4_xor_xacc, 25678}, // __builtin_HEXAGON_M4_xor_xacc
      {Intrinsic::hexagon_M5_vdmacbsu, 25708}, // __builtin_HEXAGON_M5_vdmacbsu
      {Intrinsic::hexagon_M5_vdmpybsu, 25738}, // __builtin_HEXAGON_M5_vdmpybsu
      {Intrinsic::hexagon_M5_vmacbsu, 25768}, // __builtin_HEXAGON_M5_vmacbsu
      {Intrinsic::hexagon_M5_vmacbuu, 25797}, // __builtin_HEXAGON_M5_vmacbuu
      {Intrinsic::hexagon_M5_vmpybsu, 25826}, // __builtin_HEXAGON_M5_vmpybsu
      {Intrinsic::hexagon_M5_vmpybuu, 25855}, // __builtin_HEXAGON_M5_vmpybuu
      {Intrinsic::hexagon_M5_vrmacbsu, 25884}, // __builtin_HEXAGON_M5_vrmacbsu
      {Intrinsic::hexagon_M5_vrmacbuu, 25914}, // __builtin_HEXAGON_M5_vrmacbuu
      {Intrinsic::hexagon_M5_vrmpybsu, 25944}, // __builtin_HEXAGON_M5_vrmpybsu
      {Intrinsic::hexagon_M5_vrmpybuu, 25974}, // __builtin_HEXAGON_M5_vrmpybuu
      {Intrinsic::hexagon_M6_vabsdiffb, 26004}, // __builtin_HEXAGON_M6_vabsdiffb
      {Intrinsic::hexagon_M6_vabsdiffub, 26035}, // __builtin_HEXAGON_M6_vabsdiffub
      {Intrinsic::hexagon_M7_dcmpyiw, 26067}, // __builtin_HEXAGON_M7_dcmpyiw
      {Intrinsic::hexagon_M7_dcmpyiw_acc, 26096}, // __builtin_HEXAGON_M7_dcmpyiw_acc
      {Intrinsic::hexagon_M7_dcmpyiwc, 26129}, // __builtin_HEXAGON_M7_dcmpyiwc
      {Intrinsic::hexagon_M7_dcmpyiwc_acc, 26159}, // __builtin_HEXAGON_M7_dcmpyiwc_acc
      {Intrinsic::hexagon_M7_dcmpyrw, 26193}, // __builtin_HEXAGON_M7_dcmpyrw
      {Intrinsic::hexagon_M7_dcmpyrw_acc, 26222}, // __builtin_HEXAGON_M7_dcmpyrw_acc
      {Intrinsic::hexagon_M7_dcmpyrwc, 26255}, // __builtin_HEXAGON_M7_dcmpyrwc
      {Intrinsic::hexagon_M7_dcmpyrwc_acc, 26285}, // __builtin_HEXAGON_M7_dcmpyrwc_acc
      {Intrinsic::hexagon_M7_vdmpy, 26319}, // __builtin_HEXAGON_M7_vdmpy
      {Intrinsic::hexagon_M7_vdmpy_acc, 26346}, // __builtin_HEXAGON_M7_vdmpy_acc
      {Intrinsic::hexagon_M7_wcmpyiw, 26377}, // __builtin_HEXAGON_M7_wcmpyiw
      {Intrinsic::hexagon_M7_wcmpyiw_rnd, 26406}, // __builtin_HEXAGON_M7_wcmpyiw_rnd
      {Intrinsic::hexagon_M7_wcmpyiwc, 26439}, // __builtin_HEXAGON_M7_wcmpyiwc
      {Intrinsic::hexagon_M7_wcmpyiwc_rnd, 26469}, // __builtin_HEXAGON_M7_wcmpyiwc_rnd
      {Intrinsic::hexagon_M7_wcmpyrw, 26503}, // __builtin_HEXAGON_M7_wcmpyrw
      {Intrinsic::hexagon_M7_wcmpyrw_rnd, 26532}, // __builtin_HEXAGON_M7_wcmpyrw_rnd
      {Intrinsic::hexagon_M7_wcmpyrwc, 26565}, // __builtin_HEXAGON_M7_wcmpyrwc
      {Intrinsic::hexagon_M7_wcmpyrwc_rnd, 26595}, // __builtin_HEXAGON_M7_wcmpyrwc_rnd
      {Intrinsic::hexagon_S2_addasl_rrri, 26629}, // __builtin_HEXAGON_S2_addasl_rrri
      {Intrinsic::hexagon_S2_asl_i_p, 26662}, // __builtin_HEXAGON_S2_asl_i_p
      {Intrinsic::hexagon_S2_asl_i_p_acc, 26691}, // __builtin_HEXAGON_S2_asl_i_p_acc
      {Intrinsic::hexagon_S2_asl_i_p_and, 26724}, // __builtin_HEXAGON_S2_asl_i_p_and
      {Intrinsic::hexagon_S2_asl_i_p_nac, 26757}, // __builtin_HEXAGON_S2_asl_i_p_nac
      {Intrinsic::hexagon_S2_asl_i_p_or, 26790}, // __builtin_HEXAGON_S2_asl_i_p_or
      {Intrinsic::hexagon_S2_asl_i_p_xacc, 26822}, // __builtin_HEXAGON_S2_asl_i_p_xacc
      {Intrinsic::hexagon_S2_asl_i_r, 26856}, // __builtin_HEXAGON_S2_asl_i_r
      {Intrinsic::hexagon_S2_asl_i_r_acc, 26885}, // __builtin_HEXAGON_S2_asl_i_r_acc
      {Intrinsic::hexagon_S2_asl_i_r_and, 26918}, // __builtin_HEXAGON_S2_asl_i_r_and
      {Intrinsic::hexagon_S2_asl_i_r_nac, 26951}, // __builtin_HEXAGON_S2_asl_i_r_nac
      {Intrinsic::hexagon_S2_asl_i_r_or, 26984}, // __builtin_HEXAGON_S2_asl_i_r_or
      {Intrinsic::hexagon_S2_asl_i_r_sat, 27016}, // __builtin_HEXAGON_S2_asl_i_r_sat
      {Intrinsic::hexagon_S2_asl_i_r_xacc, 27049}, // __builtin_HEXAGON_S2_asl_i_r_xacc
      {Intrinsic::hexagon_S2_asl_i_vh, 27083}, // __builtin_HEXAGON_S2_asl_i_vh
      {Intrinsic::hexagon_S2_asl_i_vw, 27113}, // __builtin_HEXAGON_S2_asl_i_vw
      {Intrinsic::hexagon_S2_asl_r_p, 27143}, // __builtin_HEXAGON_S2_asl_r_p
      {Intrinsic::hexagon_S2_asl_r_p_acc, 27172}, // __builtin_HEXAGON_S2_asl_r_p_acc
      {Intrinsic::hexagon_S2_asl_r_p_and, 27205}, // __builtin_HEXAGON_S2_asl_r_p_and
      {Intrinsic::hexagon_S2_asl_r_p_nac, 27238}, // __builtin_HEXAGON_S2_asl_r_p_nac
      {Intrinsic::hexagon_S2_asl_r_p_or, 27271}, // __builtin_HEXAGON_S2_asl_r_p_or
      {Intrinsic::hexagon_S2_asl_r_p_xor, 27303}, // __builtin_HEXAGON_S2_asl_r_p_xor
      {Intrinsic::hexagon_S2_asl_r_r, 27336}, // __builtin_HEXAGON_S2_asl_r_r
      {Intrinsic::hexagon_S2_asl_r_r_acc, 27365}, // __builtin_HEXAGON_S2_asl_r_r_acc
      {Intrinsic::hexagon_S2_asl_r_r_and, 27398}, // __builtin_HEXAGON_S2_asl_r_r_and
      {Intrinsic::hexagon_S2_asl_r_r_nac, 27431}, // __builtin_HEXAGON_S2_asl_r_r_nac
      {Intrinsic::hexagon_S2_asl_r_r_or, 27464}, // __builtin_HEXAGON_S2_asl_r_r_or
      {Intrinsic::hexagon_S2_asl_r_r_sat, 27496}, // __builtin_HEXAGON_S2_asl_r_r_sat
      {Intrinsic::hexagon_S2_asl_r_vh, 27529}, // __builtin_HEXAGON_S2_asl_r_vh
      {Intrinsic::hexagon_S2_asl_r_vw, 27559}, // __builtin_HEXAGON_S2_asl_r_vw
      {Intrinsic::hexagon_S2_asr_i_p, 27589}, // __builtin_HEXAGON_S2_asr_i_p
      {Intrinsic::hexagon_S2_asr_i_p_acc, 27618}, // __builtin_HEXAGON_S2_asr_i_p_acc
      {Intrinsic::hexagon_S2_asr_i_p_and, 27651}, // __builtin_HEXAGON_S2_asr_i_p_and
      {Intrinsic::hexagon_S2_asr_i_p_nac, 27684}, // __builtin_HEXAGON_S2_asr_i_p_nac
      {Intrinsic::hexagon_S2_asr_i_p_or, 27717}, // __builtin_HEXAGON_S2_asr_i_p_or
      {Intrinsic::hexagon_S2_asr_i_p_rnd, 27749}, // __builtin_HEXAGON_S2_asr_i_p_rnd
      {Intrinsic::hexagon_S2_asr_i_p_rnd_goodsyntax, 27782}, // __builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax
      {Intrinsic::hexagon_S2_asr_i_r, 27826}, // __builtin_HEXAGON_S2_asr_i_r
      {Intrinsic::hexagon_S2_asr_i_r_acc, 27855}, // __builtin_HEXAGON_S2_asr_i_r_acc
      {Intrinsic::hexagon_S2_asr_i_r_and, 27888}, // __builtin_HEXAGON_S2_asr_i_r_and
      {Intrinsic::hexagon_S2_asr_i_r_nac, 27921}, // __builtin_HEXAGON_S2_asr_i_r_nac
      {Intrinsic::hexagon_S2_asr_i_r_or, 27954}, // __builtin_HEXAGON_S2_asr_i_r_or
      {Intrinsic::hexagon_S2_asr_i_r_rnd, 27986}, // __builtin_HEXAGON_S2_asr_i_r_rnd
      {Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax, 28019}, // __builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax
      {Intrinsic::hexagon_S2_asr_i_svw_trun, 28063}, // __builtin_HEXAGON_S2_asr_i_svw_trun
      {Intrinsic::hexagon_S2_asr_i_vh, 28099}, // __builtin_HEXAGON_S2_asr_i_vh
      {Intrinsic::hexagon_S2_asr_i_vw, 28129}, // __builtin_HEXAGON_S2_asr_i_vw
      {Intrinsic::hexagon_S2_asr_r_p, 28159}, // __builtin_HEXAGON_S2_asr_r_p
      {Intrinsic::hexagon_S2_asr_r_p_acc, 28188}, // __builtin_HEXAGON_S2_asr_r_p_acc
      {Intrinsic::hexagon_S2_asr_r_p_and, 28221}, // __builtin_HEXAGON_S2_asr_r_p_and
      {Intrinsic::hexagon_S2_asr_r_p_nac, 28254}, // __builtin_HEXAGON_S2_asr_r_p_nac
      {Intrinsic::hexagon_S2_asr_r_p_or, 28287}, // __builtin_HEXAGON_S2_asr_r_p_or
      {Intrinsic::hexagon_S2_asr_r_p_xor, 28319}, // __builtin_HEXAGON_S2_asr_r_p_xor
      {Intrinsic::hexagon_S2_asr_r_r, 28352}, // __builtin_HEXAGON_S2_asr_r_r
      {Intrinsic::hexagon_S2_asr_r_r_acc, 28381}, // __builtin_HEXAGON_S2_asr_r_r_acc
      {Intrinsic::hexagon_S2_asr_r_r_and, 28414}, // __builtin_HEXAGON_S2_asr_r_r_and
      {Intrinsic::hexagon_S2_asr_r_r_nac, 28447}, // __builtin_HEXAGON_S2_asr_r_r_nac
      {Intrinsic::hexagon_S2_asr_r_r_or, 28480}, // __builtin_HEXAGON_S2_asr_r_r_or
      {Intrinsic::hexagon_S2_asr_r_r_sat, 28512}, // __builtin_HEXAGON_S2_asr_r_r_sat
      {Intrinsic::hexagon_S2_asr_r_svw_trun, 28545}, // __builtin_HEXAGON_S2_asr_r_svw_trun
      {Intrinsic::hexagon_S2_asr_r_vh, 28581}, // __builtin_HEXAGON_S2_asr_r_vh
      {Intrinsic::hexagon_S2_asr_r_vw, 28611}, // __builtin_HEXAGON_S2_asr_r_vw
      {Intrinsic::hexagon_S2_brev, 28641}, // __builtin_HEXAGON_S2_brev
      {Intrinsic::hexagon_S2_brevp, 28667}, // __builtin_HEXAGON_S2_brevp
      {Intrinsic::hexagon_S2_cl0, 28694}, // __builtin_HEXAGON_S2_cl0
      {Intrinsic::hexagon_S2_cl0p, 28719}, // __builtin_HEXAGON_S2_cl0p
      {Intrinsic::hexagon_S2_cl1, 28745}, // __builtin_HEXAGON_S2_cl1
      {Intrinsic::hexagon_S2_cl1p, 28770}, // __builtin_HEXAGON_S2_cl1p
      {Intrinsic::hexagon_S2_clb, 28796}, // __builtin_HEXAGON_S2_clb
      {Intrinsic::hexagon_S2_clbnorm, 28821}, // __builtin_HEXAGON_S2_clbnorm
      {Intrinsic::hexagon_S2_clbp, 28850}, // __builtin_HEXAGON_S2_clbp
      {Intrinsic::hexagon_S2_clrbit_i, 28876}, // __builtin_HEXAGON_S2_clrbit_i
      {Intrinsic::hexagon_S2_clrbit_r, 28906}, // __builtin_HEXAGON_S2_clrbit_r
      {Intrinsic::hexagon_S2_ct0, 28936}, // __builtin_HEXAGON_S2_ct0
      {Intrinsic::hexagon_S2_ct0p, 28961}, // __builtin_HEXAGON_S2_ct0p
      {Intrinsic::hexagon_S2_ct1, 28987}, // __builtin_HEXAGON_S2_ct1
      {Intrinsic::hexagon_S2_ct1p, 29012}, // __builtin_HEXAGON_S2_ct1p
      {Intrinsic::hexagon_S2_deinterleave, 29038}, // __builtin_HEXAGON_S2_deinterleave
      {Intrinsic::hexagon_S2_extractu, 29072}, // __builtin_HEXAGON_S2_extractu
      {Intrinsic::hexagon_S2_extractu_rp, 29102}, // __builtin_HEXAGON_S2_extractu_rp
      {Intrinsic::hexagon_S2_extractup, 29135}, // __builtin_HEXAGON_S2_extractup
      {Intrinsic::hexagon_S2_extractup_rp, 29166}, // __builtin_HEXAGON_S2_extractup_rp
      {Intrinsic::hexagon_S2_insert, 29200}, // __builtin_HEXAGON_S2_insert
      {Intrinsic::hexagon_S2_insert_rp, 29228}, // __builtin_HEXAGON_S2_insert_rp
      {Intrinsic::hexagon_S2_insertp, 29259}, // __builtin_HEXAGON_S2_insertp
      {Intrinsic::hexagon_S2_insertp_rp, 29288}, // __builtin_HEXAGON_S2_insertp_rp
      {Intrinsic::hexagon_S2_interleave, 29320}, // __builtin_HEXAGON_S2_interleave
      {Intrinsic::hexagon_S2_lfsp, 29352}, // __builtin_HEXAGON_S2_lfsp
      {Intrinsic::hexagon_S2_lsl_r_p, 29378}, // __builtin_HEXAGON_S2_lsl_r_p
      {Intrinsic::hexagon_S2_lsl_r_p_acc, 29407}, // __builtin_HEXAGON_S2_lsl_r_p_acc
      {Intrinsic::hexagon_S2_lsl_r_p_and, 29440}, // __builtin_HEXAGON_S2_lsl_r_p_and
      {Intrinsic::hexagon_S2_lsl_r_p_nac, 29473}, // __builtin_HEXAGON_S2_lsl_r_p_nac
      {Intrinsic::hexagon_S2_lsl_r_p_or, 29506}, // __builtin_HEXAGON_S2_lsl_r_p_or
      {Intrinsic::hexagon_S2_lsl_r_p_xor, 29538}, // __builtin_HEXAGON_S2_lsl_r_p_xor
      {Intrinsic::hexagon_S2_lsl_r_r, 29571}, // __builtin_HEXAGON_S2_lsl_r_r
      {Intrinsic::hexagon_S2_lsl_r_r_acc, 29600}, // __builtin_HEXAGON_S2_lsl_r_r_acc
      {Intrinsic::hexagon_S2_lsl_r_r_and, 29633}, // __builtin_HEXAGON_S2_lsl_r_r_and
      {Intrinsic::hexagon_S2_lsl_r_r_nac, 29666}, // __builtin_HEXAGON_S2_lsl_r_r_nac
      {Intrinsic::hexagon_S2_lsl_r_r_or, 29699}, // __builtin_HEXAGON_S2_lsl_r_r_or
      {Intrinsic::hexagon_S2_lsl_r_vh, 29731}, // __builtin_HEXAGON_S2_lsl_r_vh
      {Intrinsic::hexagon_S2_lsl_r_vw, 29761}, // __builtin_HEXAGON_S2_lsl_r_vw
      {Intrinsic::hexagon_S2_lsr_i_p, 29791}, // __builtin_HEXAGON_S2_lsr_i_p
      {Intrinsic::hexagon_S2_lsr_i_p_acc, 29820}, // __builtin_HEXAGON_S2_lsr_i_p_acc
      {Intrinsic::hexagon_S2_lsr_i_p_and, 29853}, // __builtin_HEXAGON_S2_lsr_i_p_and
      {Intrinsic::hexagon_S2_lsr_i_p_nac, 29886}, // __builtin_HEXAGON_S2_lsr_i_p_nac
      {Intrinsic::hexagon_S2_lsr_i_p_or, 29919}, // __builtin_HEXAGON_S2_lsr_i_p_or
      {Intrinsic::hexagon_S2_lsr_i_p_xacc, 29951}, // __builtin_HEXAGON_S2_lsr_i_p_xacc
      {Intrinsic::hexagon_S2_lsr_i_r, 29985}, // __builtin_HEXAGON_S2_lsr_i_r
      {Intrinsic::hexagon_S2_lsr_i_r_acc, 30014}, // __builtin_HEXAGON_S2_lsr_i_r_acc
      {Intrinsic::hexagon_S2_lsr_i_r_and, 30047}, // __builtin_HEXAGON_S2_lsr_i_r_and
      {Intrinsic::hexagon_S2_lsr_i_r_nac, 30080}, // __builtin_HEXAGON_S2_lsr_i_r_nac
      {Intrinsic::hexagon_S2_lsr_i_r_or, 30113}, // __builtin_HEXAGON_S2_lsr_i_r_or
      {Intrinsic::hexagon_S2_lsr_i_r_xacc, 30145}, // __builtin_HEXAGON_S2_lsr_i_r_xacc
      {Intrinsic::hexagon_S2_lsr_i_vh, 30179}, // __builtin_HEXAGON_S2_lsr_i_vh
      {Intrinsic::hexagon_S2_lsr_i_vw, 30209}, // __builtin_HEXAGON_S2_lsr_i_vw
      {Intrinsic::hexagon_S2_lsr_r_p, 30239}, // __builtin_HEXAGON_S2_lsr_r_p
      {Intrinsic::hexagon_S2_lsr_r_p_acc, 30268}, // __builtin_HEXAGON_S2_lsr_r_p_acc
      {Intrinsic::hexagon_S2_lsr_r_p_and, 30301}, // __builtin_HEXAGON_S2_lsr_r_p_and
      {Intrinsic::hexagon_S2_lsr_r_p_nac, 30334}, // __builtin_HEXAGON_S2_lsr_r_p_nac
      {Intrinsic::hexagon_S2_lsr_r_p_or, 30367}, // __builtin_HEXAGON_S2_lsr_r_p_or
      {Intrinsic::hexagon_S2_lsr_r_p_xor, 30399}, // __builtin_HEXAGON_S2_lsr_r_p_xor
      {Intrinsic::hexagon_S2_lsr_r_r, 30432}, // __builtin_HEXAGON_S2_lsr_r_r
      {Intrinsic::hexagon_S2_lsr_r_r_acc, 30461}, // __builtin_HEXAGON_S2_lsr_r_r_acc
      {Intrinsic::hexagon_S2_lsr_r_r_and, 30494}, // __builtin_HEXAGON_S2_lsr_r_r_and
      {Intrinsic::hexagon_S2_lsr_r_r_nac, 30527}, // __builtin_HEXAGON_S2_lsr_r_r_nac
      {Intrinsic::hexagon_S2_lsr_r_r_or, 30560}, // __builtin_HEXAGON_S2_lsr_r_r_or
      {Intrinsic::hexagon_S2_lsr_r_vh, 30592}, // __builtin_HEXAGON_S2_lsr_r_vh
      {Intrinsic::hexagon_S2_lsr_r_vw, 30622}, // __builtin_HEXAGON_S2_lsr_r_vw
      {Intrinsic::hexagon_S2_mask, 30652}, // __builtin_HEXAGON_S2_mask
      {Intrinsic::hexagon_S2_packhl, 30678}, // __builtin_HEXAGON_S2_packhl
      {Intrinsic::hexagon_S2_parityp, 30706}, // __builtin_HEXAGON_S2_parityp
      {Intrinsic::hexagon_S2_setbit_i, 30735}, // __builtin_HEXAGON_S2_setbit_i
      {Intrinsic::hexagon_S2_setbit_r, 30765}, // __builtin_HEXAGON_S2_setbit_r
      {Intrinsic::hexagon_S2_shuffeb, 30795}, // __builtin_HEXAGON_S2_shuffeb
      {Intrinsic::hexagon_S2_shuffeh, 30824}, // __builtin_HEXAGON_S2_shuffeh
      {Intrinsic::hexagon_S2_shuffob, 30853}, // __builtin_HEXAGON_S2_shuffob
      {Intrinsic::hexagon_S2_shuffoh, 30882}, // __builtin_HEXAGON_S2_shuffoh
      {Intrinsic::hexagon_S2_storew_locked, 31008}, // __builtin_HEXAGON_S2_storew_locked
      {Intrinsic::hexagon_S2_svsathb, 31043}, // __builtin_HEXAGON_S2_svsathb
      {Intrinsic::hexagon_S2_svsathub, 31072}, // __builtin_HEXAGON_S2_svsathub
      {Intrinsic::hexagon_S2_tableidxb_goodsyntax, 31102}, // __builtin_HEXAGON_S2_tableidxb_goodsyntax
      {Intrinsic::hexagon_S2_tableidxd_goodsyntax, 31144}, // __builtin_HEXAGON_S2_tableidxd_goodsyntax
      {Intrinsic::hexagon_S2_tableidxh_goodsyntax, 31186}, // __builtin_HEXAGON_S2_tableidxh_goodsyntax
      {Intrinsic::hexagon_S2_tableidxw_goodsyntax, 31228}, // __builtin_HEXAGON_S2_tableidxw_goodsyntax
      {Intrinsic::hexagon_S2_togglebit_i, 31270}, // __builtin_HEXAGON_S2_togglebit_i
      {Intrinsic::hexagon_S2_togglebit_r, 31303}, // __builtin_HEXAGON_S2_togglebit_r
      {Intrinsic::hexagon_S2_tstbit_i, 31336}, // __builtin_HEXAGON_S2_tstbit_i
      {Intrinsic::hexagon_S2_tstbit_r, 31366}, // __builtin_HEXAGON_S2_tstbit_r
      {Intrinsic::hexagon_S2_valignib, 31396}, // __builtin_HEXAGON_S2_valignib
      {Intrinsic::hexagon_S2_valignrb, 31426}, // __builtin_HEXAGON_S2_valignrb
      {Intrinsic::hexagon_S2_vcnegh, 31456}, // __builtin_HEXAGON_S2_vcnegh
      {Intrinsic::hexagon_S2_vcrotate, 31484}, // __builtin_HEXAGON_S2_vcrotate
      {Intrinsic::hexagon_S2_vrcnegh, 31514}, // __builtin_HEXAGON_S2_vrcnegh
      {Intrinsic::hexagon_S2_vrndpackwh, 31543}, // __builtin_HEXAGON_S2_vrndpackwh
      {Intrinsic::hexagon_S2_vrndpackwhs, 31575}, // __builtin_HEXAGON_S2_vrndpackwhs
      {Intrinsic::hexagon_S2_vsathb, 31608}, // __builtin_HEXAGON_S2_vsathb
      {Intrinsic::hexagon_S2_vsathb_nopack, 31636}, // __builtin_HEXAGON_S2_vsathb_nopack
      {Intrinsic::hexagon_S2_vsathub, 31671}, // __builtin_HEXAGON_S2_vsathub
      {Intrinsic::hexagon_S2_vsathub_nopack, 31700}, // __builtin_HEXAGON_S2_vsathub_nopack
      {Intrinsic::hexagon_S2_vsatwh, 31736}, // __builtin_HEXAGON_S2_vsatwh
      {Intrinsic::hexagon_S2_vsatwh_nopack, 31764}, // __builtin_HEXAGON_S2_vsatwh_nopack
      {Intrinsic::hexagon_S2_vsatwuh, 31799}, // __builtin_HEXAGON_S2_vsatwuh
      {Intrinsic::hexagon_S2_vsatwuh_nopack, 31828}, // __builtin_HEXAGON_S2_vsatwuh_nopack
      {Intrinsic::hexagon_S2_vsplatrb, 31864}, // __builtin_HEXAGON_S2_vsplatrb
      {Intrinsic::hexagon_S2_vsplatrh, 31894}, // __builtin_HEXAGON_S2_vsplatrh
      {Intrinsic::hexagon_S2_vspliceib, 31924}, // __builtin_HEXAGON_S2_vspliceib
      {Intrinsic::hexagon_S2_vsplicerb, 31955}, // __builtin_HEXAGON_S2_vsplicerb
      {Intrinsic::hexagon_S2_vsxtbh, 31986}, // __builtin_HEXAGON_S2_vsxtbh
      {Intrinsic::hexagon_S2_vsxthw, 32014}, // __builtin_HEXAGON_S2_vsxthw
      {Intrinsic::hexagon_S2_vtrunehb, 32042}, // __builtin_HEXAGON_S2_vtrunehb
      {Intrinsic::hexagon_S2_vtrunewh, 32072}, // __builtin_HEXAGON_S2_vtrunewh
      {Intrinsic::hexagon_S2_vtrunohb, 32102}, // __builtin_HEXAGON_S2_vtrunohb
      {Intrinsic::hexagon_S2_vtrunowh, 32132}, // __builtin_HEXAGON_S2_vtrunowh
      {Intrinsic::hexagon_S2_vzxtbh, 32162}, // __builtin_HEXAGON_S2_vzxtbh
      {Intrinsic::hexagon_S2_vzxthw, 32190}, // __builtin_HEXAGON_S2_vzxthw
      {Intrinsic::hexagon_S4_addaddi, 32218}, // __builtin_HEXAGON_S4_addaddi
      {Intrinsic::hexagon_S4_addi_asl_ri, 32247}, // __builtin_HEXAGON_S4_addi_asl_ri
      {Intrinsic::hexagon_S4_addi_lsr_ri, 32280}, // __builtin_HEXAGON_S4_addi_lsr_ri
      {Intrinsic::hexagon_S4_andi_asl_ri, 32313}, // __builtin_HEXAGON_S4_andi_asl_ri
      {Intrinsic::hexagon_S4_andi_lsr_ri, 32346}, // __builtin_HEXAGON_S4_andi_lsr_ri
      {Intrinsic::hexagon_S4_clbaddi, 32379}, // __builtin_HEXAGON_S4_clbaddi
      {Intrinsic::hexagon_S4_clbpaddi, 32408}, // __builtin_HEXAGON_S4_clbpaddi
      {Intrinsic::hexagon_S4_clbpnorm, 32438}, // __builtin_HEXAGON_S4_clbpnorm
      {Intrinsic::hexagon_S4_extract, 32468}, // __builtin_HEXAGON_S4_extract
      {Intrinsic::hexagon_S4_extract_rp, 32497}, // __builtin_HEXAGON_S4_extract_rp
      {Intrinsic::hexagon_S4_extractp, 32529}, // __builtin_HEXAGON_S4_extractp
      {Intrinsic::hexagon_S4_extractp_rp, 32559}, // __builtin_HEXAGON_S4_extractp_rp
      {Intrinsic::hexagon_S4_lsli, 32592}, // __builtin_HEXAGON_S4_lsli
      {Intrinsic::hexagon_S4_ntstbit_i, 32618}, // __builtin_HEXAGON_S4_ntstbit_i
      {Intrinsic::hexagon_S4_ntstbit_r, 32649}, // __builtin_HEXAGON_S4_ntstbit_r
      {Intrinsic::hexagon_S4_or_andi, 32680}, // __builtin_HEXAGON_S4_or_andi
      {Intrinsic::hexagon_S4_or_andix, 32709}, // __builtin_HEXAGON_S4_or_andix
      {Intrinsic::hexagon_S4_or_ori, 32739}, // __builtin_HEXAGON_S4_or_ori
      {Intrinsic::hexagon_S4_ori_asl_ri, 32767}, // __builtin_HEXAGON_S4_ori_asl_ri
      {Intrinsic::hexagon_S4_ori_lsr_ri, 32799}, // __builtin_HEXAGON_S4_ori_lsr_ri
      {Intrinsic::hexagon_S4_parity, 32831}, // __builtin_HEXAGON_S4_parity
      {Intrinsic::hexagon_S4_stored_locked, 32859}, // __builtin_HEXAGON_S4_stored_locked
      {Intrinsic::hexagon_S4_subaddi, 32894}, // __builtin_HEXAGON_S4_subaddi
      {Intrinsic::hexagon_S4_subi_asl_ri, 32923}, // __builtin_HEXAGON_S4_subi_asl_ri
      {Intrinsic::hexagon_S4_subi_lsr_ri, 32956}, // __builtin_HEXAGON_S4_subi_lsr_ri
      {Intrinsic::hexagon_S4_vrcrotate, 32989}, // __builtin_HEXAGON_S4_vrcrotate
      {Intrinsic::hexagon_S4_vrcrotate_acc, 33020}, // __builtin_HEXAGON_S4_vrcrotate_acc
      {Intrinsic::hexagon_S4_vxaddsubh, 33055}, // __builtin_HEXAGON_S4_vxaddsubh
      {Intrinsic::hexagon_S4_vxaddsubhr, 33086}, // __builtin_HEXAGON_S4_vxaddsubhr
      {Intrinsic::hexagon_S4_vxaddsubw, 33118}, // __builtin_HEXAGON_S4_vxaddsubw
      {Intrinsic::hexagon_S4_vxsubaddh, 33149}, // __builtin_HEXAGON_S4_vxsubaddh
      {Intrinsic::hexagon_S4_vxsubaddhr, 33180}, // __builtin_HEXAGON_S4_vxsubaddhr
      {Intrinsic::hexagon_S4_vxsubaddw, 33212}, // __builtin_HEXAGON_S4_vxsubaddw
      {Intrinsic::hexagon_S5_asrhub_rnd_sat_goodsyntax, 33243}, // __builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax
      {Intrinsic::hexagon_S5_asrhub_sat, 33290}, // __builtin_HEXAGON_S5_asrhub_sat
      {Intrinsic::hexagon_S5_popcountp, 33322}, // __builtin_HEXAGON_S5_popcountp
      {Intrinsic::hexagon_S5_vasrhrnd_goodsyntax, 33353}, // __builtin_HEXAGON_S5_vasrhrnd_goodsyntax
      {Intrinsic::hexagon_S6_rol_i_p, 33394}, // __builtin_HEXAGON_S6_rol_i_p
      {Intrinsic::hexagon_S6_rol_i_p_acc, 33423}, // __builtin_HEXAGON_S6_rol_i_p_acc
      {Intrinsic::hexagon_S6_rol_i_p_and, 33456}, // __builtin_HEXAGON_S6_rol_i_p_and
      {Intrinsic::hexagon_S6_rol_i_p_nac, 33489}, // __builtin_HEXAGON_S6_rol_i_p_nac
      {Intrinsic::hexagon_S6_rol_i_p_or, 33522}, // __builtin_HEXAGON_S6_rol_i_p_or
      {Intrinsic::hexagon_S6_rol_i_p_xacc, 33554}, // __builtin_HEXAGON_S6_rol_i_p_xacc
      {Intrinsic::hexagon_S6_rol_i_r, 33588}, // __builtin_HEXAGON_S6_rol_i_r
      {Intrinsic::hexagon_S6_rol_i_r_acc, 33617}, // __builtin_HEXAGON_S6_rol_i_r_acc
      {Intrinsic::hexagon_S6_rol_i_r_and, 33650}, // __builtin_HEXAGON_S6_rol_i_r_and
      {Intrinsic::hexagon_S6_rol_i_r_nac, 33683}, // __builtin_HEXAGON_S6_rol_i_r_nac
      {Intrinsic::hexagon_S6_rol_i_r_or, 33716}, // __builtin_HEXAGON_S6_rol_i_r_or
      {Intrinsic::hexagon_S6_rol_i_r_xacc, 33748}, // __builtin_HEXAGON_S6_rol_i_r_xacc
      {Intrinsic::hexagon_S6_vsplatrbp, 33782}, // __builtin_HEXAGON_S6_vsplatrbp
      {Intrinsic::hexagon_S6_vtrunehb_ppp, 33813}, // __builtin_HEXAGON_S6_vtrunehb_ppp
      {Intrinsic::hexagon_S6_vtrunohb_ppp, 33847}, // __builtin_HEXAGON_S6_vtrunohb_ppp
      {Intrinsic::hexagon_V6_extractw, 33881}, // __builtin_HEXAGON_V6_extractw
      {Intrinsic::hexagon_V6_extractw_128B, 33911}, // __builtin_HEXAGON_V6_extractw_128B
      {Intrinsic::hexagon_V6_hi, 33946}, // __builtin_HEXAGON_V6_hi
      {Intrinsic::hexagon_V6_hi_128B, 33970}, // __builtin_HEXAGON_V6_hi_128B
      {Intrinsic::hexagon_V6_lo, 33999}, // __builtin_HEXAGON_V6_lo
      {Intrinsic::hexagon_V6_lo_128B, 34023}, // __builtin_HEXAGON_V6_lo_128B
      {Intrinsic::hexagon_V6_lvsplatb, 34052}, // __builtin_HEXAGON_V6_lvsplatb
      {Intrinsic::hexagon_V6_lvsplatb_128B, 34082}, // __builtin_HEXAGON_V6_lvsplatb_128B
      {Intrinsic::hexagon_V6_lvsplath, 34117}, // __builtin_HEXAGON_V6_lvsplath
      {Intrinsic::hexagon_V6_lvsplath_128B, 34147}, // __builtin_HEXAGON_V6_lvsplath_128B
      {Intrinsic::hexagon_V6_lvsplatw, 34182}, // __builtin_HEXAGON_V6_lvsplatw
      {Intrinsic::hexagon_V6_lvsplatw_128B, 34212}, // __builtin_HEXAGON_V6_lvsplatw_128B
      {Intrinsic::hexagon_V6_vabsb, 34247}, // __builtin_HEXAGON_V6_vabsb
      {Intrinsic::hexagon_V6_vabsb_128B, 34274}, // __builtin_HEXAGON_V6_vabsb_128B
      {Intrinsic::hexagon_V6_vabsb_sat, 34306}, // __builtin_HEXAGON_V6_vabsb_sat
      {Intrinsic::hexagon_V6_vabsb_sat_128B, 34337}, // __builtin_HEXAGON_V6_vabsb_sat_128B
      {Intrinsic::hexagon_V6_vabsdiffh, 34373}, // __builtin_HEXAGON_V6_vabsdiffh
      {Intrinsic::hexagon_V6_vabsdiffh_128B, 34404}, // __builtin_HEXAGON_V6_vabsdiffh_128B
      {Intrinsic::hexagon_V6_vabsdiffub, 34440}, // __builtin_HEXAGON_V6_vabsdiffub
      {Intrinsic::hexagon_V6_vabsdiffub_128B, 34472}, // __builtin_HEXAGON_V6_vabsdiffub_128B
      {Intrinsic::hexagon_V6_vabsdiffuh, 34509}, // __builtin_HEXAGON_V6_vabsdiffuh
      {Intrinsic::hexagon_V6_vabsdiffuh_128B, 34541}, // __builtin_HEXAGON_V6_vabsdiffuh_128B
      {Intrinsic::hexagon_V6_vabsdiffw, 34578}, // __builtin_HEXAGON_V6_vabsdiffw
      {Intrinsic::hexagon_V6_vabsdiffw_128B, 34609}, // __builtin_HEXAGON_V6_vabsdiffw_128B
      {Intrinsic::hexagon_V6_vabsh, 34645}, // __builtin_HEXAGON_V6_vabsh
      {Intrinsic::hexagon_V6_vabsh_128B, 34672}, // __builtin_HEXAGON_V6_vabsh_128B
      {Intrinsic::hexagon_V6_vabsh_sat, 34704}, // __builtin_HEXAGON_V6_vabsh_sat
      {Intrinsic::hexagon_V6_vabsh_sat_128B, 34735}, // __builtin_HEXAGON_V6_vabsh_sat_128B
      {Intrinsic::hexagon_V6_vabsw, 34771}, // __builtin_HEXAGON_V6_vabsw
      {Intrinsic::hexagon_V6_vabsw_128B, 34798}, // __builtin_HEXAGON_V6_vabsw_128B
      {Intrinsic::hexagon_V6_vabsw_sat, 34830}, // __builtin_HEXAGON_V6_vabsw_sat
      {Intrinsic::hexagon_V6_vabsw_sat_128B, 34861}, // __builtin_HEXAGON_V6_vabsw_sat_128B
      {Intrinsic::hexagon_V6_vaddb, 34897}, // __builtin_HEXAGON_V6_vaddb
      {Intrinsic::hexagon_V6_vaddb_128B, 34924}, // __builtin_HEXAGON_V6_vaddb_128B
      {Intrinsic::hexagon_V6_vaddb_dv, 34956}, // __builtin_HEXAGON_V6_vaddb_dv
      {Intrinsic::hexagon_V6_vaddb_dv_128B, 34986}, // __builtin_HEXAGON_V6_vaddb_dv_128B
      {Intrinsic::hexagon_V6_vaddbsat, 35021}, // __builtin_HEXAGON_V6_vaddbsat
      {Intrinsic::hexagon_V6_vaddbsat_128B, 35051}, // __builtin_HEXAGON_V6_vaddbsat_128B
      {Intrinsic::hexagon_V6_vaddbsat_dv, 35086}, // __builtin_HEXAGON_V6_vaddbsat_dv
      {Intrinsic::hexagon_V6_vaddbsat_dv_128B, 35119}, // __builtin_HEXAGON_V6_vaddbsat_dv_128B
      {Intrinsic::hexagon_V6_vaddclbh, 35157}, // __builtin_HEXAGON_V6_vaddclbh
      {Intrinsic::hexagon_V6_vaddclbh_128B, 35187}, // __builtin_HEXAGON_V6_vaddclbh_128B
      {Intrinsic::hexagon_V6_vaddclbw, 35222}, // __builtin_HEXAGON_V6_vaddclbw
      {Intrinsic::hexagon_V6_vaddclbw_128B, 35252}, // __builtin_HEXAGON_V6_vaddclbw_128B
      {Intrinsic::hexagon_V6_vaddh, 35287}, // __builtin_HEXAGON_V6_vaddh
      {Intrinsic::hexagon_V6_vaddh_128B, 35314}, // __builtin_HEXAGON_V6_vaddh_128B
      {Intrinsic::hexagon_V6_vaddh_dv, 35346}, // __builtin_HEXAGON_V6_vaddh_dv
      {Intrinsic::hexagon_V6_vaddh_dv_128B, 35376}, // __builtin_HEXAGON_V6_vaddh_dv_128B
      {Intrinsic::hexagon_V6_vaddhsat, 35411}, // __builtin_HEXAGON_V6_vaddhsat
      {Intrinsic::hexagon_V6_vaddhsat_128B, 35441}, // __builtin_HEXAGON_V6_vaddhsat_128B
      {Intrinsic::hexagon_V6_vaddhsat_dv, 35476}, // __builtin_HEXAGON_V6_vaddhsat_dv
      {Intrinsic::hexagon_V6_vaddhsat_dv_128B, 35509}, // __builtin_HEXAGON_V6_vaddhsat_dv_128B
      {Intrinsic::hexagon_V6_vaddhw, 35547}, // __builtin_HEXAGON_V6_vaddhw
      {Intrinsic::hexagon_V6_vaddhw_128B, 35575}, // __builtin_HEXAGON_V6_vaddhw_128B
      {Intrinsic::hexagon_V6_vaddhw_acc, 35608}, // __builtin_HEXAGON_V6_vaddhw_acc
      {Intrinsic::hexagon_V6_vaddhw_acc_128B, 35640}, // __builtin_HEXAGON_V6_vaddhw_acc_128B
      {Intrinsic::hexagon_V6_vaddubh, 35677}, // __builtin_HEXAGON_V6_vaddubh
      {Intrinsic::hexagon_V6_vaddubh_128B, 35706}, // __builtin_HEXAGON_V6_vaddubh_128B
      {Intrinsic::hexagon_V6_vaddubh_acc, 35740}, // __builtin_HEXAGON_V6_vaddubh_acc
      {Intrinsic::hexagon_V6_vaddubh_acc_128B, 35773}, // __builtin_HEXAGON_V6_vaddubh_acc_128B
      {Intrinsic::hexagon_V6_vaddubsat, 35811}, // __builtin_HEXAGON_V6_vaddubsat
      {Intrinsic::hexagon_V6_vaddubsat_128B, 35842}, // __builtin_HEXAGON_V6_vaddubsat_128B
      {Intrinsic::hexagon_V6_vaddubsat_dv, 35878}, // __builtin_HEXAGON_V6_vaddubsat_dv
      {Intrinsic::hexagon_V6_vaddubsat_dv_128B, 35912}, // __builtin_HEXAGON_V6_vaddubsat_dv_128B
      {Intrinsic::hexagon_V6_vaddububb_sat, 35951}, // __builtin_HEXAGON_V6_vaddububb_sat
      {Intrinsic::hexagon_V6_vaddububb_sat_128B, 35986}, // __builtin_HEXAGON_V6_vaddububb_sat_128B
      {Intrinsic::hexagon_V6_vadduhsat, 36026}, // __builtin_HEXAGON_V6_vadduhsat
      {Intrinsic::hexagon_V6_vadduhsat_128B, 36057}, // __builtin_HEXAGON_V6_vadduhsat_128B
      {Intrinsic::hexagon_V6_vadduhsat_dv, 36093}, // __builtin_HEXAGON_V6_vadduhsat_dv
      {Intrinsic::hexagon_V6_vadduhsat_dv_128B, 36127}, // __builtin_HEXAGON_V6_vadduhsat_dv_128B
      {Intrinsic::hexagon_V6_vadduhw, 36166}, // __builtin_HEXAGON_V6_vadduhw
      {Intrinsic::hexagon_V6_vadduhw_128B, 36195}, // __builtin_HEXAGON_V6_vadduhw_128B
      {Intrinsic::hexagon_V6_vadduhw_acc, 36229}, // __builtin_HEXAGON_V6_vadduhw_acc
      {Intrinsic::hexagon_V6_vadduhw_acc_128B, 36262}, // __builtin_HEXAGON_V6_vadduhw_acc_128B
      {Intrinsic::hexagon_V6_vadduwsat, 36300}, // __builtin_HEXAGON_V6_vadduwsat
      {Intrinsic::hexagon_V6_vadduwsat_128B, 36331}, // __builtin_HEXAGON_V6_vadduwsat_128B
      {Intrinsic::hexagon_V6_vadduwsat_dv, 36367}, // __builtin_HEXAGON_V6_vadduwsat_dv
      {Intrinsic::hexagon_V6_vadduwsat_dv_128B, 36401}, // __builtin_HEXAGON_V6_vadduwsat_dv_128B
      {Intrinsic::hexagon_V6_vaddw, 36440}, // __builtin_HEXAGON_V6_vaddw
      {Intrinsic::hexagon_V6_vaddw_128B, 36467}, // __builtin_HEXAGON_V6_vaddw_128B
      {Intrinsic::hexagon_V6_vaddw_dv, 36499}, // __builtin_HEXAGON_V6_vaddw_dv
      {Intrinsic::hexagon_V6_vaddw_dv_128B, 36529}, // __builtin_HEXAGON_V6_vaddw_dv_128B
      {Intrinsic::hexagon_V6_vaddwsat, 36564}, // __builtin_HEXAGON_V6_vaddwsat
      {Intrinsic::hexagon_V6_vaddwsat_128B, 36594}, // __builtin_HEXAGON_V6_vaddwsat_128B
      {Intrinsic::hexagon_V6_vaddwsat_dv, 36629}, // __builtin_HEXAGON_V6_vaddwsat_dv
      {Intrinsic::hexagon_V6_vaddwsat_dv_128B, 36662}, // __builtin_HEXAGON_V6_vaddwsat_dv_128B
      {Intrinsic::hexagon_V6_valignb, 36700}, // __builtin_HEXAGON_V6_valignb
      {Intrinsic::hexagon_V6_valignb_128B, 36729}, // __builtin_HEXAGON_V6_valignb_128B
      {Intrinsic::hexagon_V6_valignbi, 36763}, // __builtin_HEXAGON_V6_valignbi
      {Intrinsic::hexagon_V6_valignbi_128B, 36793}, // __builtin_HEXAGON_V6_valignbi_128B
      {Intrinsic::hexagon_V6_vand, 36828}, // __builtin_HEXAGON_V6_vand
      {Intrinsic::hexagon_V6_vand_128B, 36854}, // __builtin_HEXAGON_V6_vand_128B
      {Intrinsic::hexagon_V6_vaslh, 36885}, // __builtin_HEXAGON_V6_vaslh
      {Intrinsic::hexagon_V6_vaslh_128B, 36912}, // __builtin_HEXAGON_V6_vaslh_128B
      {Intrinsic::hexagon_V6_vaslh_acc, 36944}, // __builtin_HEXAGON_V6_vaslh_acc
      {Intrinsic::hexagon_V6_vaslh_acc_128B, 36975}, // __builtin_HEXAGON_V6_vaslh_acc_128B
      {Intrinsic::hexagon_V6_vaslhv, 37011}, // __builtin_HEXAGON_V6_vaslhv
      {Intrinsic::hexagon_V6_vaslhv_128B, 37039}, // __builtin_HEXAGON_V6_vaslhv_128B
      {Intrinsic::hexagon_V6_vaslw, 37072}, // __builtin_HEXAGON_V6_vaslw
      {Intrinsic::hexagon_V6_vaslw_128B, 37099}, // __builtin_HEXAGON_V6_vaslw_128B
      {Intrinsic::hexagon_V6_vaslw_acc, 37131}, // __builtin_HEXAGON_V6_vaslw_acc
      {Intrinsic::hexagon_V6_vaslw_acc_128B, 37162}, // __builtin_HEXAGON_V6_vaslw_acc_128B
      {Intrinsic::hexagon_V6_vaslwv, 37198}, // __builtin_HEXAGON_V6_vaslwv
      {Intrinsic::hexagon_V6_vaslwv_128B, 37226}, // __builtin_HEXAGON_V6_vaslwv_128B
      {Intrinsic::hexagon_V6_vasr_into, 37259}, // __builtin_HEXAGON_V6_vasr_into
      {Intrinsic::hexagon_V6_vasr_into_128B, 37290}, // __builtin_HEXAGON_V6_vasr_into_128B
      {Intrinsic::hexagon_V6_vasrh, 37326}, // __builtin_HEXAGON_V6_vasrh
      {Intrinsic::hexagon_V6_vasrh_128B, 37353}, // __builtin_HEXAGON_V6_vasrh_128B
      {Intrinsic::hexagon_V6_vasrh_acc, 37385}, // __builtin_HEXAGON_V6_vasrh_acc
      {Intrinsic::hexagon_V6_vasrh_acc_128B, 37416}, // __builtin_HEXAGON_V6_vasrh_acc_128B
      {Intrinsic::hexagon_V6_vasrhbrndsat, 37452}, // __builtin_HEXAGON_V6_vasrhbrndsat
      {Intrinsic::hexagon_V6_vasrhbrndsat_128B, 37486}, // __builtin_HEXAGON_V6_vasrhbrndsat_128B
      {Intrinsic::hexagon_V6_vasrhbsat, 37525}, // __builtin_HEXAGON_V6_vasrhbsat
      {Intrinsic::hexagon_V6_vasrhbsat_128B, 37556}, // __builtin_HEXAGON_V6_vasrhbsat_128B
      {Intrinsic::hexagon_V6_vasrhubrndsat, 37592}, // __builtin_HEXAGON_V6_vasrhubrndsat
      {Intrinsic::hexagon_V6_vasrhubrndsat_128B, 37627}, // __builtin_HEXAGON_V6_vasrhubrndsat_128B
      {Intrinsic::hexagon_V6_vasrhubsat, 37667}, // __builtin_HEXAGON_V6_vasrhubsat
      {Intrinsic::hexagon_V6_vasrhubsat_128B, 37699}, // __builtin_HEXAGON_V6_vasrhubsat_128B
      {Intrinsic::hexagon_V6_vasrhv, 37736}, // __builtin_HEXAGON_V6_vasrhv
      {Intrinsic::hexagon_V6_vasrhv_128B, 37764}, // __builtin_HEXAGON_V6_vasrhv_128B
      {Intrinsic::hexagon_V6_vasruhubrndsat, 37797}, // __builtin_HEXAGON_V6_vasruhubrndsat
      {Intrinsic::hexagon_V6_vasruhubrndsat_128B, 37833}, // __builtin_HEXAGON_V6_vasruhubrndsat_128B
      {Intrinsic::hexagon_V6_vasruhubsat, 37874}, // __builtin_HEXAGON_V6_vasruhubsat
      {Intrinsic::hexagon_V6_vasruhubsat_128B, 37907}, // __builtin_HEXAGON_V6_vasruhubsat_128B
      {Intrinsic::hexagon_V6_vasruwuhrndsat, 37945}, // __builtin_HEXAGON_V6_vasruwuhrndsat
      {Intrinsic::hexagon_V6_vasruwuhrndsat_128B, 37981}, // __builtin_HEXAGON_V6_vasruwuhrndsat_128B
      {Intrinsic::hexagon_V6_vasruwuhsat, 38022}, // __builtin_HEXAGON_V6_vasruwuhsat
      {Intrinsic::hexagon_V6_vasruwuhsat_128B, 38055}, // __builtin_HEXAGON_V6_vasruwuhsat_128B
      {Intrinsic::hexagon_V6_vasrw, 38093}, // __builtin_HEXAGON_V6_vasrw
      {Intrinsic::hexagon_V6_vasrw_128B, 38120}, // __builtin_HEXAGON_V6_vasrw_128B
      {Intrinsic::hexagon_V6_vasrw_acc, 38152}, // __builtin_HEXAGON_V6_vasrw_acc
      {Intrinsic::hexagon_V6_vasrw_acc_128B, 38183}, // __builtin_HEXAGON_V6_vasrw_acc_128B
      {Intrinsic::hexagon_V6_vasrwh, 38219}, // __builtin_HEXAGON_V6_vasrwh
      {Intrinsic::hexagon_V6_vasrwh_128B, 38247}, // __builtin_HEXAGON_V6_vasrwh_128B
      {Intrinsic::hexagon_V6_vasrwhrndsat, 38280}, // __builtin_HEXAGON_V6_vasrwhrndsat
      {Intrinsic::hexagon_V6_vasrwhrndsat_128B, 38314}, // __builtin_HEXAGON_V6_vasrwhrndsat_128B
      {Intrinsic::hexagon_V6_vasrwhsat, 38353}, // __builtin_HEXAGON_V6_vasrwhsat
      {Intrinsic::hexagon_V6_vasrwhsat_128B, 38384}, // __builtin_HEXAGON_V6_vasrwhsat_128B
      {Intrinsic::hexagon_V6_vasrwuhrndsat, 38420}, // __builtin_HEXAGON_V6_vasrwuhrndsat
      {Intrinsic::hexagon_V6_vasrwuhrndsat_128B, 38455}, // __builtin_HEXAGON_V6_vasrwuhrndsat_128B
      {Intrinsic::hexagon_V6_vasrwuhsat, 38495}, // __builtin_HEXAGON_V6_vasrwuhsat
      {Intrinsic::hexagon_V6_vasrwuhsat_128B, 38527}, // __builtin_HEXAGON_V6_vasrwuhsat_128B
      {Intrinsic::hexagon_V6_vasrwv, 38564}, // __builtin_HEXAGON_V6_vasrwv
      {Intrinsic::hexagon_V6_vasrwv_128B, 38592}, // __builtin_HEXAGON_V6_vasrwv_128B
      {Intrinsic::hexagon_V6_vassign, 38625}, // __builtin_HEXAGON_V6_vassign
      {Intrinsic::hexagon_V6_vassign_128B, 38654}, // __builtin_HEXAGON_V6_vassign_128B
      {Intrinsic::hexagon_V6_vassignp, 38688}, // __builtin_HEXAGON_V6_vassignp
      {Intrinsic::hexagon_V6_vassignp_128B, 38718}, // __builtin_HEXAGON_V6_vassignp_128B
      {Intrinsic::hexagon_V6_vavgb, 38753}, // __builtin_HEXAGON_V6_vavgb
      {Intrinsic::hexagon_V6_vavgb_128B, 38780}, // __builtin_HEXAGON_V6_vavgb_128B
      {Intrinsic::hexagon_V6_vavgbrnd, 38812}, // __builtin_HEXAGON_V6_vavgbrnd
      {Intrinsic::hexagon_V6_vavgbrnd_128B, 38842}, // __builtin_HEXAGON_V6_vavgbrnd_128B
      {Intrinsic::hexagon_V6_vavgh, 38877}, // __builtin_HEXAGON_V6_vavgh
      {Intrinsic::hexagon_V6_vavgh_128B, 38904}, // __builtin_HEXAGON_V6_vavgh_128B
      {Intrinsic::hexagon_V6_vavghrnd, 38936}, // __builtin_HEXAGON_V6_vavghrnd
      {Intrinsic::hexagon_V6_vavghrnd_128B, 38966}, // __builtin_HEXAGON_V6_vavghrnd_128B
      {Intrinsic::hexagon_V6_vavgub, 39001}, // __builtin_HEXAGON_V6_vavgub
      {Intrinsic::hexagon_V6_vavgub_128B, 39029}, // __builtin_HEXAGON_V6_vavgub_128B
      {Intrinsic::hexagon_V6_vavgubrnd, 39062}, // __builtin_HEXAGON_V6_vavgubrnd
      {Intrinsic::hexagon_V6_vavgubrnd_128B, 39093}, // __builtin_HEXAGON_V6_vavgubrnd_128B
      {Intrinsic::hexagon_V6_vavguh, 39129}, // __builtin_HEXAGON_V6_vavguh
      {Intrinsic::hexagon_V6_vavguh_128B, 39157}, // __builtin_HEXAGON_V6_vavguh_128B
      {Intrinsic::hexagon_V6_vavguhrnd, 39190}, // __builtin_HEXAGON_V6_vavguhrnd
      {Intrinsic::hexagon_V6_vavguhrnd_128B, 39221}, // __builtin_HEXAGON_V6_vavguhrnd_128B
      {Intrinsic::hexagon_V6_vavguw, 39257}, // __builtin_HEXAGON_V6_vavguw
      {Intrinsic::hexagon_V6_vavguw_128B, 39285}, // __builtin_HEXAGON_V6_vavguw_128B
      {Intrinsic::hexagon_V6_vavguwrnd, 39318}, // __builtin_HEXAGON_V6_vavguwrnd
      {Intrinsic::hexagon_V6_vavguwrnd_128B, 39349}, // __builtin_HEXAGON_V6_vavguwrnd_128B
      {Intrinsic::hexagon_V6_vavgw, 39385}, // __builtin_HEXAGON_V6_vavgw
      {Intrinsic::hexagon_V6_vavgw_128B, 39412}, // __builtin_HEXAGON_V6_vavgw_128B
      {Intrinsic::hexagon_V6_vavgwrnd, 39444}, // __builtin_HEXAGON_V6_vavgwrnd
      {Intrinsic::hexagon_V6_vavgwrnd_128B, 39474}, // __builtin_HEXAGON_V6_vavgwrnd_128B
      {Intrinsic::hexagon_V6_vcl0h, 39509}, // __builtin_HEXAGON_V6_vcl0h
      {Intrinsic::hexagon_V6_vcl0h_128B, 39536}, // __builtin_HEXAGON_V6_vcl0h_128B
      {Intrinsic::hexagon_V6_vcl0w, 39568}, // __builtin_HEXAGON_V6_vcl0w
      {Intrinsic::hexagon_V6_vcl0w_128B, 39595}, // __builtin_HEXAGON_V6_vcl0w_128B
      {Intrinsic::hexagon_V6_vcombine, 39627}, // __builtin_HEXAGON_V6_vcombine
      {Intrinsic::hexagon_V6_vcombine_128B, 39657}, // __builtin_HEXAGON_V6_vcombine_128B
      {Intrinsic::hexagon_V6_vd0, 39692}, // __builtin_HEXAGON_V6_vd0
      {Intrinsic::hexagon_V6_vd0_128B, 39717}, // __builtin_HEXAGON_V6_vd0_128B
      {Intrinsic::hexagon_V6_vdd0, 39747}, // __builtin_HEXAGON_V6_vdd0
      {Intrinsic::hexagon_V6_vdd0_128B, 39773}, // __builtin_HEXAGON_V6_vdd0_128B
      {Intrinsic::hexagon_V6_vdealb, 39804}, // __builtin_HEXAGON_V6_vdealb
      {Intrinsic::hexagon_V6_vdealb4w, 39865}, // __builtin_HEXAGON_V6_vdealb4w
      {Intrinsic::hexagon_V6_vdealb4w_128B, 39895}, // __builtin_HEXAGON_V6_vdealb4w_128B
      {Intrinsic::hexagon_V6_vdealb_128B, 39832}, // __builtin_HEXAGON_V6_vdealb_128B
      {Intrinsic::hexagon_V6_vdealh, 39930}, // __builtin_HEXAGON_V6_vdealh
      {Intrinsic::hexagon_V6_vdealh_128B, 39958}, // __builtin_HEXAGON_V6_vdealh_128B
      {Intrinsic::hexagon_V6_vdealvdd, 39991}, // __builtin_HEXAGON_V6_vdealvdd
      {Intrinsic::hexagon_V6_vdealvdd_128B, 40021}, // __builtin_HEXAGON_V6_vdealvdd_128B
      {Intrinsic::hexagon_V6_vdelta, 40056}, // __builtin_HEXAGON_V6_vdelta
      {Intrinsic::hexagon_V6_vdelta_128B, 40084}, // __builtin_HEXAGON_V6_vdelta_128B
      {Intrinsic::hexagon_V6_vdmpybus, 40117}, // __builtin_HEXAGON_V6_vdmpybus
      {Intrinsic::hexagon_V6_vdmpybus_128B, 40147}, // __builtin_HEXAGON_V6_vdmpybus_128B
      {Intrinsic::hexagon_V6_vdmpybus_acc, 40182}, // __builtin_HEXAGON_V6_vdmpybus_acc
      {Intrinsic::hexagon_V6_vdmpybus_acc_128B, 40216}, // __builtin_HEXAGON_V6_vdmpybus_acc_128B
      {Intrinsic::hexagon_V6_vdmpybus_dv, 40255}, // __builtin_HEXAGON_V6_vdmpybus_dv
      {Intrinsic::hexagon_V6_vdmpybus_dv_128B, 40288}, // __builtin_HEXAGON_V6_vdmpybus_dv_128B
      {Intrinsic::hexagon_V6_vdmpybus_dv_acc, 40326}, // __builtin_HEXAGON_V6_vdmpybus_dv_acc
      {Intrinsic::hexagon_V6_vdmpybus_dv_acc_128B, 40363}, // __builtin_HEXAGON_V6_vdmpybus_dv_acc_128B
      {Intrinsic::hexagon_V6_vdmpyhb, 40405}, // __builtin_HEXAGON_V6_vdmpyhb
      {Intrinsic::hexagon_V6_vdmpyhb_128B, 40434}, // __builtin_HEXAGON_V6_vdmpyhb_128B
      {Intrinsic::hexagon_V6_vdmpyhb_acc, 40468}, // __builtin_HEXAGON_V6_vdmpyhb_acc
      {Intrinsic::hexagon_V6_vdmpyhb_acc_128B, 40501}, // __builtin_HEXAGON_V6_vdmpyhb_acc_128B
      {Intrinsic::hexagon_V6_vdmpyhb_dv, 40539}, // __builtin_HEXAGON_V6_vdmpyhb_dv
      {Intrinsic::hexagon_V6_vdmpyhb_dv_128B, 40571}, // __builtin_HEXAGON_V6_vdmpyhb_dv_128B
      {Intrinsic::hexagon_V6_vdmpyhb_dv_acc, 40608}, // __builtin_HEXAGON_V6_vdmpyhb_dv_acc
      {Intrinsic::hexagon_V6_vdmpyhb_dv_acc_128B, 40644}, // __builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B
      {Intrinsic::hexagon_V6_vdmpyhisat, 40685}, // __builtin_HEXAGON_V6_vdmpyhisat
      {Intrinsic::hexagon_V6_vdmpyhisat_128B, 40717}, // __builtin_HEXAGON_V6_vdmpyhisat_128B
      {Intrinsic::hexagon_V6_vdmpyhisat_acc, 40754}, // __builtin_HEXAGON_V6_vdmpyhisat_acc
      {Intrinsic::hexagon_V6_vdmpyhisat_acc_128B, 40790}, // __builtin_HEXAGON_V6_vdmpyhisat_acc_128B
      {Intrinsic::hexagon_V6_vdmpyhsat, 40831}, // __builtin_HEXAGON_V6_vdmpyhsat
      {Intrinsic::hexagon_V6_vdmpyhsat_128B, 40862}, // __builtin_HEXAGON_V6_vdmpyhsat_128B
      {Intrinsic::hexagon_V6_vdmpyhsat_acc, 40898}, // __builtin_HEXAGON_V6_vdmpyhsat_acc
      {Intrinsic::hexagon_V6_vdmpyhsat_acc_128B, 40933}, // __builtin_HEXAGON_V6_vdmpyhsat_acc_128B
      {Intrinsic::hexagon_V6_vdmpyhsuisat, 40973}, // __builtin_HEXAGON_V6_vdmpyhsuisat
      {Intrinsic::hexagon_V6_vdmpyhsuisat_128B, 41007}, // __builtin_HEXAGON_V6_vdmpyhsuisat_128B
      {Intrinsic::hexagon_V6_vdmpyhsuisat_acc, 41046}, // __builtin_HEXAGON_V6_vdmpyhsuisat_acc
      {Intrinsic::hexagon_V6_vdmpyhsuisat_acc_128B, 41084}, // __builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B
      {Intrinsic::hexagon_V6_vdmpyhsusat, 41127}, // __builtin_HEXAGON_V6_vdmpyhsusat
      {Intrinsic::hexagon_V6_vdmpyhsusat_128B, 41160}, // __builtin_HEXAGON_V6_vdmpyhsusat_128B
      {Intrinsic::hexagon_V6_vdmpyhsusat_acc, 41198}, // __builtin_HEXAGON_V6_vdmpyhsusat_acc
      {Intrinsic::hexagon_V6_vdmpyhsusat_acc_128B, 41235}, // __builtin_HEXAGON_V6_vdmpyhsusat_acc_128B
      {Intrinsic::hexagon_V6_vdmpyhvsat, 41277}, // __builtin_HEXAGON_V6_vdmpyhvsat
      {Intrinsic::hexagon_V6_vdmpyhvsat_128B, 41309}, // __builtin_HEXAGON_V6_vdmpyhvsat_128B
      {Intrinsic::hexagon_V6_vdmpyhvsat_acc, 41346}, // __builtin_HEXAGON_V6_vdmpyhvsat_acc
      {Intrinsic::hexagon_V6_vdmpyhvsat_acc_128B, 41382}, // __builtin_HEXAGON_V6_vdmpyhvsat_acc_128B
      {Intrinsic::hexagon_V6_vdsaduh, 41423}, // __builtin_HEXAGON_V6_vdsaduh
      {Intrinsic::hexagon_V6_vdsaduh_128B, 41452}, // __builtin_HEXAGON_V6_vdsaduh_128B
      {Intrinsic::hexagon_V6_vdsaduh_acc, 41486}, // __builtin_HEXAGON_V6_vdsaduh_acc
      {Intrinsic::hexagon_V6_vdsaduh_acc_128B, 41519}, // __builtin_HEXAGON_V6_vdsaduh_acc_128B
      {Intrinsic::hexagon_V6_vgathermh, 41557}, // __builtin_HEXAGON_V6_vgathermh
      {Intrinsic::hexagon_V6_vgathermh_128B, 41588}, // __builtin_HEXAGON_V6_vgathermh_128B
      {Intrinsic::hexagon_V6_vgathermhw, 41624}, // __builtin_HEXAGON_V6_vgathermhw
      {Intrinsic::hexagon_V6_vgathermhw_128B, 41656}, // __builtin_HEXAGON_V6_vgathermhw_128B
      {Intrinsic::hexagon_V6_vgathermw, 41693}, // __builtin_HEXAGON_V6_vgathermw
      {Intrinsic::hexagon_V6_vgathermw_128B, 41724}, // __builtin_HEXAGON_V6_vgathermw_128B
      {Intrinsic::hexagon_V6_vinsertwr, 41760}, // __builtin_HEXAGON_V6_vinsertwr
      {Intrinsic::hexagon_V6_vinsertwr_128B, 41791}, // __builtin_HEXAGON_V6_vinsertwr_128B
      {Intrinsic::hexagon_V6_vlalignb, 41827}, // __builtin_HEXAGON_V6_vlalignb
      {Intrinsic::hexagon_V6_vlalignb_128B, 41857}, // __builtin_HEXAGON_V6_vlalignb_128B
      {Intrinsic::hexagon_V6_vlalignbi, 41892}, // __builtin_HEXAGON_V6_vlalignbi
      {Intrinsic::hexagon_V6_vlalignbi_128B, 41923}, // __builtin_HEXAGON_V6_vlalignbi_128B
      {Intrinsic::hexagon_V6_vlsrb, 41959}, // __builtin_HEXAGON_V6_vlsrb
      {Intrinsic::hexagon_V6_vlsrb_128B, 41986}, // __builtin_HEXAGON_V6_vlsrb_128B
      {Intrinsic::hexagon_V6_vlsrh, 42018}, // __builtin_HEXAGON_V6_vlsrh
      {Intrinsic::hexagon_V6_vlsrh_128B, 42045}, // __builtin_HEXAGON_V6_vlsrh_128B
      {Intrinsic::hexagon_V6_vlsrhv, 42077}, // __builtin_HEXAGON_V6_vlsrhv
      {Intrinsic::hexagon_V6_vlsrhv_128B, 42105}, // __builtin_HEXAGON_V6_vlsrhv_128B
      {Intrinsic::hexagon_V6_vlsrw, 42138}, // __builtin_HEXAGON_V6_vlsrw
      {Intrinsic::hexagon_V6_vlsrw_128B, 42165}, // __builtin_HEXAGON_V6_vlsrw_128B
      {Intrinsic::hexagon_V6_vlsrwv, 42197}, // __builtin_HEXAGON_V6_vlsrwv
      {Intrinsic::hexagon_V6_vlsrwv_128B, 42225}, // __builtin_HEXAGON_V6_vlsrwv_128B
      {Intrinsic::hexagon_V6_vlut4, 42258}, // __builtin_HEXAGON_V6_vlut4
      {Intrinsic::hexagon_V6_vlut4_128B, 42285}, // __builtin_HEXAGON_V6_vlut4_128B
      {Intrinsic::hexagon_V6_vlutvvb, 42317}, // __builtin_HEXAGON_V6_vlutvvb
      {Intrinsic::hexagon_V6_vlutvvb_128B, 42346}, // __builtin_HEXAGON_V6_vlutvvb_128B
      {Intrinsic::hexagon_V6_vlutvvb_nm, 42380}, // __builtin_HEXAGON_V6_vlutvvb_nm
      {Intrinsic::hexagon_V6_vlutvvb_nm_128B, 42412}, // __builtin_HEXAGON_V6_vlutvvb_nm_128B
      {Intrinsic::hexagon_V6_vlutvvb_oracc, 42449}, // __builtin_HEXAGON_V6_vlutvvb_oracc
      {Intrinsic::hexagon_V6_vlutvvb_oracc_128B, 42484}, // __builtin_HEXAGON_V6_vlutvvb_oracc_128B
      {Intrinsic::hexagon_V6_vlutvvb_oracci, 42524}, // __builtin_HEXAGON_V6_vlutvvb_oracci
      {Intrinsic::hexagon_V6_vlutvvb_oracci_128B, 42560}, // __builtin_HEXAGON_V6_vlutvvb_oracci_128B
      {Intrinsic::hexagon_V6_vlutvvbi, 42601}, // __builtin_HEXAGON_V6_vlutvvbi
      {Intrinsic::hexagon_V6_vlutvvbi_128B, 42631}, // __builtin_HEXAGON_V6_vlutvvbi_128B
      {Intrinsic::hexagon_V6_vlutvwh, 42666}, // __builtin_HEXAGON_V6_vlutvwh
      {Intrinsic::hexagon_V6_vlutvwh_128B, 42695}, // __builtin_HEXAGON_V6_vlutvwh_128B
      {Intrinsic::hexagon_V6_vlutvwh_nm, 42729}, // __builtin_HEXAGON_V6_vlutvwh_nm
      {Intrinsic::hexagon_V6_vlutvwh_nm_128B, 42761}, // __builtin_HEXAGON_V6_vlutvwh_nm_128B
      {Intrinsic::hexagon_V6_vlutvwh_oracc, 42798}, // __builtin_HEXAGON_V6_vlutvwh_oracc
      {Intrinsic::hexagon_V6_vlutvwh_oracc_128B, 42833}, // __builtin_HEXAGON_V6_vlutvwh_oracc_128B
      {Intrinsic::hexagon_V6_vlutvwh_oracci, 42873}, // __builtin_HEXAGON_V6_vlutvwh_oracci
      {Intrinsic::hexagon_V6_vlutvwh_oracci_128B, 42909}, // __builtin_HEXAGON_V6_vlutvwh_oracci_128B
      {Intrinsic::hexagon_V6_vlutvwhi, 42950}, // __builtin_HEXAGON_V6_vlutvwhi
      {Intrinsic::hexagon_V6_vlutvwhi_128B, 42980}, // __builtin_HEXAGON_V6_vlutvwhi_128B
      {Intrinsic::hexagon_V6_vmaxb, 43015}, // __builtin_HEXAGON_V6_vmaxb
      {Intrinsic::hexagon_V6_vmaxb_128B, 43042}, // __builtin_HEXAGON_V6_vmaxb_128B
      {Intrinsic::hexagon_V6_vmaxh, 43074}, // __builtin_HEXAGON_V6_vmaxh
      {Intrinsic::hexagon_V6_vmaxh_128B, 43101}, // __builtin_HEXAGON_V6_vmaxh_128B
      {Intrinsic::hexagon_V6_vmaxub, 43133}, // __builtin_HEXAGON_V6_vmaxub
      {Intrinsic::hexagon_V6_vmaxub_128B, 43161}, // __builtin_HEXAGON_V6_vmaxub_128B
      {Intrinsic::hexagon_V6_vmaxuh, 43194}, // __builtin_HEXAGON_V6_vmaxuh
      {Intrinsic::hexagon_V6_vmaxuh_128B, 43222}, // __builtin_HEXAGON_V6_vmaxuh_128B
      {Intrinsic::hexagon_V6_vmaxw, 43255}, // __builtin_HEXAGON_V6_vmaxw
      {Intrinsic::hexagon_V6_vmaxw_128B, 43282}, // __builtin_HEXAGON_V6_vmaxw_128B
      {Intrinsic::hexagon_V6_vminb, 43314}, // __builtin_HEXAGON_V6_vminb
      {Intrinsic::hexagon_V6_vminb_128B, 43341}, // __builtin_HEXAGON_V6_vminb_128B
      {Intrinsic::hexagon_V6_vminh, 43373}, // __builtin_HEXAGON_V6_vminh
      {Intrinsic::hexagon_V6_vminh_128B, 43400}, // __builtin_HEXAGON_V6_vminh_128B
      {Intrinsic::hexagon_V6_vminub, 43432}, // __builtin_HEXAGON_V6_vminub
      {Intrinsic::hexagon_V6_vminub_128B, 43460}, // __builtin_HEXAGON_V6_vminub_128B
      {Intrinsic::hexagon_V6_vminuh, 43493}, // __builtin_HEXAGON_V6_vminuh
      {Intrinsic::hexagon_V6_vminuh_128B, 43521}, // __builtin_HEXAGON_V6_vminuh_128B
      {Intrinsic::hexagon_V6_vminw, 43554}, // __builtin_HEXAGON_V6_vminw
      {Intrinsic::hexagon_V6_vminw_128B, 43581}, // __builtin_HEXAGON_V6_vminw_128B
      {Intrinsic::hexagon_V6_vmpabus, 43613}, // __builtin_HEXAGON_V6_vmpabus
      {Intrinsic::hexagon_V6_vmpabus_128B, 43642}, // __builtin_HEXAGON_V6_vmpabus_128B
      {Intrinsic::hexagon_V6_vmpabus_acc, 43676}, // __builtin_HEXAGON_V6_vmpabus_acc
      {Intrinsic::hexagon_V6_vmpabus_acc_128B, 43709}, // __builtin_HEXAGON_V6_vmpabus_acc_128B
      {Intrinsic::hexagon_V6_vmpabusv, 43747}, // __builtin_HEXAGON_V6_vmpabusv
      {Intrinsic::hexagon_V6_vmpabusv_128B, 43777}, // __builtin_HEXAGON_V6_vmpabusv_128B
      {Intrinsic::hexagon_V6_vmpabuu, 43812}, // __builtin_HEXAGON_V6_vmpabuu
      {Intrinsic::hexagon_V6_vmpabuu_128B, 43841}, // __builtin_HEXAGON_V6_vmpabuu_128B
      {Intrinsic::hexagon_V6_vmpabuu_acc, 43875}, // __builtin_HEXAGON_V6_vmpabuu_acc
      {Intrinsic::hexagon_V6_vmpabuu_acc_128B, 43908}, // __builtin_HEXAGON_V6_vmpabuu_acc_128B
      {Intrinsic::hexagon_V6_vmpabuuv, 43946}, // __builtin_HEXAGON_V6_vmpabuuv
      {Intrinsic::hexagon_V6_vmpabuuv_128B, 43976}, // __builtin_HEXAGON_V6_vmpabuuv_128B
      {Intrinsic::hexagon_V6_vmpahb, 44011}, // __builtin_HEXAGON_V6_vmpahb
      {Intrinsic::hexagon_V6_vmpahb_128B, 44039}, // __builtin_HEXAGON_V6_vmpahb_128B
      {Intrinsic::hexagon_V6_vmpahb_acc, 44072}, // __builtin_HEXAGON_V6_vmpahb_acc
      {Intrinsic::hexagon_V6_vmpahb_acc_128B, 44104}, // __builtin_HEXAGON_V6_vmpahb_acc_128B
      {Intrinsic::hexagon_V6_vmpahhsat, 44141}, // __builtin_HEXAGON_V6_vmpahhsat
      {Intrinsic::hexagon_V6_vmpahhsat_128B, 44172}, // __builtin_HEXAGON_V6_vmpahhsat_128B
      {Intrinsic::hexagon_V6_vmpauhb, 44208}, // __builtin_HEXAGON_V6_vmpauhb
      {Intrinsic::hexagon_V6_vmpauhb_128B, 44237}, // __builtin_HEXAGON_V6_vmpauhb_128B
      {Intrinsic::hexagon_V6_vmpauhb_acc, 44271}, // __builtin_HEXAGON_V6_vmpauhb_acc
      {Intrinsic::hexagon_V6_vmpauhb_acc_128B, 44304}, // __builtin_HEXAGON_V6_vmpauhb_acc_128B
      {Intrinsic::hexagon_V6_vmpauhuhsat, 44342}, // __builtin_HEXAGON_V6_vmpauhuhsat
      {Intrinsic::hexagon_V6_vmpauhuhsat_128B, 44375}, // __builtin_HEXAGON_V6_vmpauhuhsat_128B
      {Intrinsic::hexagon_V6_vmpsuhuhsat, 44413}, // __builtin_HEXAGON_V6_vmpsuhuhsat
      {Intrinsic::hexagon_V6_vmpsuhuhsat_128B, 44446}, // __builtin_HEXAGON_V6_vmpsuhuhsat_128B
      {Intrinsic::hexagon_V6_vmpybus, 44484}, // __builtin_HEXAGON_V6_vmpybus
      {Intrinsic::hexagon_V6_vmpybus_128B, 44513}, // __builtin_HEXAGON_V6_vmpybus_128B
      {Intrinsic::hexagon_V6_vmpybus_acc, 44547}, // __builtin_HEXAGON_V6_vmpybus_acc
      {Intrinsic::hexagon_V6_vmpybus_acc_128B, 44580}, // __builtin_HEXAGON_V6_vmpybus_acc_128B
      {Intrinsic::hexagon_V6_vmpybusv, 44618}, // __builtin_HEXAGON_V6_vmpybusv
      {Intrinsic::hexagon_V6_vmpybusv_128B, 44648}, // __builtin_HEXAGON_V6_vmpybusv_128B
      {Intrinsic::hexagon_V6_vmpybusv_acc, 44683}, // __builtin_HEXAGON_V6_vmpybusv_acc
      {Intrinsic::hexagon_V6_vmpybusv_acc_128B, 44717}, // __builtin_HEXAGON_V6_vmpybusv_acc_128B
      {Intrinsic::hexagon_V6_vmpybv, 44756}, // __builtin_HEXAGON_V6_vmpybv
      {Intrinsic::hexagon_V6_vmpybv_128B, 44784}, // __builtin_HEXAGON_V6_vmpybv_128B
      {Intrinsic::hexagon_V6_vmpybv_acc, 44817}, // __builtin_HEXAGON_V6_vmpybv_acc
      {Intrinsic::hexagon_V6_vmpybv_acc_128B, 44849}, // __builtin_HEXAGON_V6_vmpybv_acc_128B
      {Intrinsic::hexagon_V6_vmpyewuh, 44886}, // __builtin_HEXAGON_V6_vmpyewuh
      {Intrinsic::hexagon_V6_vmpyewuh_128B, 44916}, // __builtin_HEXAGON_V6_vmpyewuh_128B
      {Intrinsic::hexagon_V6_vmpyewuh_64, 44951}, // __builtin_HEXAGON_V6_vmpyewuh_64
      {Intrinsic::hexagon_V6_vmpyewuh_64_128B, 44984}, // __builtin_HEXAGON_V6_vmpyewuh_64_128B
      {Intrinsic::hexagon_V6_vmpyh, 45022}, // __builtin_HEXAGON_V6_vmpyh
      {Intrinsic::hexagon_V6_vmpyh_128B, 45049}, // __builtin_HEXAGON_V6_vmpyh_128B
      {Intrinsic::hexagon_V6_vmpyh_acc, 45081}, // __builtin_HEXAGON_V6_vmpyh_acc
      {Intrinsic::hexagon_V6_vmpyh_acc_128B, 45112}, // __builtin_HEXAGON_V6_vmpyh_acc_128B
      {Intrinsic::hexagon_V6_vmpyhsat_acc, 45148}, // __builtin_HEXAGON_V6_vmpyhsat_acc
      {Intrinsic::hexagon_V6_vmpyhsat_acc_128B, 45182}, // __builtin_HEXAGON_V6_vmpyhsat_acc_128B
      {Intrinsic::hexagon_V6_vmpyhsrs, 45221}, // __builtin_HEXAGON_V6_vmpyhsrs
      {Intrinsic::hexagon_V6_vmpyhsrs_128B, 45251}, // __builtin_HEXAGON_V6_vmpyhsrs_128B
      {Intrinsic::hexagon_V6_vmpyhss, 45286}, // __builtin_HEXAGON_V6_vmpyhss
      {Intrinsic::hexagon_V6_vmpyhss_128B, 45315}, // __builtin_HEXAGON_V6_vmpyhss_128B
      {Intrinsic::hexagon_V6_vmpyhus, 45349}, // __builtin_HEXAGON_V6_vmpyhus
      {Intrinsic::hexagon_V6_vmpyhus_128B, 45378}, // __builtin_HEXAGON_V6_vmpyhus_128B
      {Intrinsic::hexagon_V6_vmpyhus_acc, 45412}, // __builtin_HEXAGON_V6_vmpyhus_acc
      {Intrinsic::hexagon_V6_vmpyhus_acc_128B, 45445}, // __builtin_HEXAGON_V6_vmpyhus_acc_128B
      {Intrinsic::hexagon_V6_vmpyhv, 45483}, // __builtin_HEXAGON_V6_vmpyhv
      {Intrinsic::hexagon_V6_vmpyhv_128B, 45511}, // __builtin_HEXAGON_V6_vmpyhv_128B
      {Intrinsic::hexagon_V6_vmpyhv_acc, 45544}, // __builtin_HEXAGON_V6_vmpyhv_acc
      {Intrinsic::hexagon_V6_vmpyhv_acc_128B, 45576}, // __builtin_HEXAGON_V6_vmpyhv_acc_128B
      {Intrinsic::hexagon_V6_vmpyhvsrs, 45613}, // __builtin_HEXAGON_V6_vmpyhvsrs
      {Intrinsic::hexagon_V6_vmpyhvsrs_128B, 45644}, // __builtin_HEXAGON_V6_vmpyhvsrs_128B
      {Intrinsic::hexagon_V6_vmpyieoh, 45680}, // __builtin_HEXAGON_V6_vmpyieoh
      {Intrinsic::hexagon_V6_vmpyieoh_128B, 45710}, // __builtin_HEXAGON_V6_vmpyieoh_128B
      {Intrinsic::hexagon_V6_vmpyiewh_acc, 45745}, // __builtin_HEXAGON_V6_vmpyiewh_acc
      {Intrinsic::hexagon_V6_vmpyiewh_acc_128B, 45779}, // __builtin_HEXAGON_V6_vmpyiewh_acc_128B
      {Intrinsic::hexagon_V6_vmpyiewuh, 45818}, // __builtin_HEXAGON_V6_vmpyiewuh
      {Intrinsic::hexagon_V6_vmpyiewuh_128B, 45849}, // __builtin_HEXAGON_V6_vmpyiewuh_128B
      {Intrinsic::hexagon_V6_vmpyiewuh_acc, 45885}, // __builtin_HEXAGON_V6_vmpyiewuh_acc
      {Intrinsic::hexagon_V6_vmpyiewuh_acc_128B, 45920}, // __builtin_HEXAGON_V6_vmpyiewuh_acc_128B
      {Intrinsic::hexagon_V6_vmpyih, 45960}, // __builtin_HEXAGON_V6_vmpyih
      {Intrinsic::hexagon_V6_vmpyih_128B, 45988}, // __builtin_HEXAGON_V6_vmpyih_128B
      {Intrinsic::hexagon_V6_vmpyih_acc, 46021}, // __builtin_HEXAGON_V6_vmpyih_acc
      {Intrinsic::hexagon_V6_vmpyih_acc_128B, 46053}, // __builtin_HEXAGON_V6_vmpyih_acc_128B
      {Intrinsic::hexagon_V6_vmpyihb, 46090}, // __builtin_HEXAGON_V6_vmpyihb
      {Intrinsic::hexagon_V6_vmpyihb_128B, 46119}, // __builtin_HEXAGON_V6_vmpyihb_128B
      {Intrinsic::hexagon_V6_vmpyihb_acc, 46153}, // __builtin_HEXAGON_V6_vmpyihb_acc
      {Intrinsic::hexagon_V6_vmpyihb_acc_128B, 46186}, // __builtin_HEXAGON_V6_vmpyihb_acc_128B
      {Intrinsic::hexagon_V6_vmpyiowh, 46224}, // __builtin_HEXAGON_V6_vmpyiowh
      {Intrinsic::hexagon_V6_vmpyiowh_128B, 46254}, // __builtin_HEXAGON_V6_vmpyiowh_128B
      {Intrinsic::hexagon_V6_vmpyiwb, 46289}, // __builtin_HEXAGON_V6_vmpyiwb
      {Intrinsic::hexagon_V6_vmpyiwb_128B, 46318}, // __builtin_HEXAGON_V6_vmpyiwb_128B
      {Intrinsic::hexagon_V6_vmpyiwb_acc, 46352}, // __builtin_HEXAGON_V6_vmpyiwb_acc
      {Intrinsic::hexagon_V6_vmpyiwb_acc_128B, 46385}, // __builtin_HEXAGON_V6_vmpyiwb_acc_128B
      {Intrinsic::hexagon_V6_vmpyiwh, 46423}, // __builtin_HEXAGON_V6_vmpyiwh
      {Intrinsic::hexagon_V6_vmpyiwh_128B, 46452}, // __builtin_HEXAGON_V6_vmpyiwh_128B
      {Intrinsic::hexagon_V6_vmpyiwh_acc, 46486}, // __builtin_HEXAGON_V6_vmpyiwh_acc
      {Intrinsic::hexagon_V6_vmpyiwh_acc_128B, 46519}, // __builtin_HEXAGON_V6_vmpyiwh_acc_128B
      {Intrinsic::hexagon_V6_vmpyiwub, 46557}, // __builtin_HEXAGON_V6_vmpyiwub
      {Intrinsic::hexagon_V6_vmpyiwub_128B, 46587}, // __builtin_HEXAGON_V6_vmpyiwub_128B
      {Intrinsic::hexagon_V6_vmpyiwub_acc, 46622}, // __builtin_HEXAGON_V6_vmpyiwub_acc
      {Intrinsic::hexagon_V6_vmpyiwub_acc_128B, 46656}, // __builtin_HEXAGON_V6_vmpyiwub_acc_128B
      {Intrinsic::hexagon_V6_vmpyowh, 46695}, // __builtin_HEXAGON_V6_vmpyowh
      {Intrinsic::hexagon_V6_vmpyowh_128B, 46724}, // __builtin_HEXAGON_V6_vmpyowh_128B
      {Intrinsic::hexagon_V6_vmpyowh_64_acc, 46758}, // __builtin_HEXAGON_V6_vmpyowh_64_acc
      {Intrinsic::hexagon_V6_vmpyowh_64_acc_128B, 46794}, // __builtin_HEXAGON_V6_vmpyowh_64_acc_128B
      {Intrinsic::hexagon_V6_vmpyowh_rnd, 46835}, // __builtin_HEXAGON_V6_vmpyowh_rnd
      {Intrinsic::hexagon_V6_vmpyowh_rnd_128B, 46868}, // __builtin_HEXAGON_V6_vmpyowh_rnd_128B
      {Intrinsic::hexagon_V6_vmpyowh_rnd_sacc, 46906}, // __builtin_HEXAGON_V6_vmpyowh_rnd_sacc
      {Intrinsic::hexagon_V6_vmpyowh_rnd_sacc_128B, 46944}, // __builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B
      {Intrinsic::hexagon_V6_vmpyowh_sacc, 46987}, // __builtin_HEXAGON_V6_vmpyowh_sacc
      {Intrinsic::hexagon_V6_vmpyowh_sacc_128B, 47021}, // __builtin_HEXAGON_V6_vmpyowh_sacc_128B
      {Intrinsic::hexagon_V6_vmpyub, 47060}, // __builtin_HEXAGON_V6_vmpyub
      {Intrinsic::hexagon_V6_vmpyub_128B, 47088}, // __builtin_HEXAGON_V6_vmpyub_128B
      {Intrinsic::hexagon_V6_vmpyub_acc, 47121}, // __builtin_HEXAGON_V6_vmpyub_acc
      {Intrinsic::hexagon_V6_vmpyub_acc_128B, 47153}, // __builtin_HEXAGON_V6_vmpyub_acc_128B
      {Intrinsic::hexagon_V6_vmpyubv, 47190}, // __builtin_HEXAGON_V6_vmpyubv
      {Intrinsic::hexagon_V6_vmpyubv_128B, 47219}, // __builtin_HEXAGON_V6_vmpyubv_128B
      {Intrinsic::hexagon_V6_vmpyubv_acc, 47253}, // __builtin_HEXAGON_V6_vmpyubv_acc
      {Intrinsic::hexagon_V6_vmpyubv_acc_128B, 47286}, // __builtin_HEXAGON_V6_vmpyubv_acc_128B
      {Intrinsic::hexagon_V6_vmpyuh, 47324}, // __builtin_HEXAGON_V6_vmpyuh
      {Intrinsic::hexagon_V6_vmpyuh_128B, 47352}, // __builtin_HEXAGON_V6_vmpyuh_128B
      {Intrinsic::hexagon_V6_vmpyuh_acc, 47385}, // __builtin_HEXAGON_V6_vmpyuh_acc
      {Intrinsic::hexagon_V6_vmpyuh_acc_128B, 47417}, // __builtin_HEXAGON_V6_vmpyuh_acc_128B
      {Intrinsic::hexagon_V6_vmpyuhe, 47454}, // __builtin_HEXAGON_V6_vmpyuhe
      {Intrinsic::hexagon_V6_vmpyuhe_128B, 47483}, // __builtin_HEXAGON_V6_vmpyuhe_128B
      {Intrinsic::hexagon_V6_vmpyuhe_acc, 47517}, // __builtin_HEXAGON_V6_vmpyuhe_acc
      {Intrinsic::hexagon_V6_vmpyuhe_acc_128B, 47550}, // __builtin_HEXAGON_V6_vmpyuhe_acc_128B
      {Intrinsic::hexagon_V6_vmpyuhv, 47588}, // __builtin_HEXAGON_V6_vmpyuhv
      {Intrinsic::hexagon_V6_vmpyuhv_128B, 47617}, // __builtin_HEXAGON_V6_vmpyuhv_128B
      {Intrinsic::hexagon_V6_vmpyuhv_acc, 47651}, // __builtin_HEXAGON_V6_vmpyuhv_acc
      {Intrinsic::hexagon_V6_vmpyuhv_acc_128B, 47684}, // __builtin_HEXAGON_V6_vmpyuhv_acc_128B
      {Intrinsic::hexagon_V6_vnavgb, 47722}, // __builtin_HEXAGON_V6_vnavgb
      {Intrinsic::hexagon_V6_vnavgb_128B, 47750}, // __builtin_HEXAGON_V6_vnavgb_128B
      {Intrinsic::hexagon_V6_vnavgh, 47783}, // __builtin_HEXAGON_V6_vnavgh
      {Intrinsic::hexagon_V6_vnavgh_128B, 47811}, // __builtin_HEXAGON_V6_vnavgh_128B
      {Intrinsic::hexagon_V6_vnavgub, 47844}, // __builtin_HEXAGON_V6_vnavgub
      {Intrinsic::hexagon_V6_vnavgub_128B, 47873}, // __builtin_HEXAGON_V6_vnavgub_128B
      {Intrinsic::hexagon_V6_vnavgw, 47907}, // __builtin_HEXAGON_V6_vnavgw
      {Intrinsic::hexagon_V6_vnavgw_128B, 47935}, // __builtin_HEXAGON_V6_vnavgw_128B
      {Intrinsic::hexagon_V6_vnormamth, 47968}, // __builtin_HEXAGON_V6_vnormamth
      {Intrinsic::hexagon_V6_vnormamth_128B, 47999}, // __builtin_HEXAGON_V6_vnormamth_128B
      {Intrinsic::hexagon_V6_vnormamtw, 48035}, // __builtin_HEXAGON_V6_vnormamtw
      {Intrinsic::hexagon_V6_vnormamtw_128B, 48066}, // __builtin_HEXAGON_V6_vnormamtw_128B
      {Intrinsic::hexagon_V6_vnot, 48102}, // __builtin_HEXAGON_V6_vnot
      {Intrinsic::hexagon_V6_vnot_128B, 48128}, // __builtin_HEXAGON_V6_vnot_128B
      {Intrinsic::hexagon_V6_vor, 48159}, // __builtin_HEXAGON_V6_vor
      {Intrinsic::hexagon_V6_vor_128B, 48184}, // __builtin_HEXAGON_V6_vor_128B
      {Intrinsic::hexagon_V6_vpackeb, 48214}, // __builtin_HEXAGON_V6_vpackeb
      {Intrinsic::hexagon_V6_vpackeb_128B, 48243}, // __builtin_HEXAGON_V6_vpackeb_128B
      {Intrinsic::hexagon_V6_vpackeh, 48277}, // __builtin_HEXAGON_V6_vpackeh
      {Intrinsic::hexagon_V6_vpackeh_128B, 48306}, // __builtin_HEXAGON_V6_vpackeh_128B
      {Intrinsic::hexagon_V6_vpackhb_sat, 48340}, // __builtin_HEXAGON_V6_vpackhb_sat
      {Intrinsic::hexagon_V6_vpackhb_sat_128B, 48373}, // __builtin_HEXAGON_V6_vpackhb_sat_128B
      {Intrinsic::hexagon_V6_vpackhub_sat, 48411}, // __builtin_HEXAGON_V6_vpackhub_sat
      {Intrinsic::hexagon_V6_vpackhub_sat_128B, 48445}, // __builtin_HEXAGON_V6_vpackhub_sat_128B
      {Intrinsic::hexagon_V6_vpackob, 48484}, // __builtin_HEXAGON_V6_vpackob
      {Intrinsic::hexagon_V6_vpackob_128B, 48513}, // __builtin_HEXAGON_V6_vpackob_128B
      {Intrinsic::hexagon_V6_vpackoh, 48547}, // __builtin_HEXAGON_V6_vpackoh
      {Intrinsic::hexagon_V6_vpackoh_128B, 48576}, // __builtin_HEXAGON_V6_vpackoh_128B
      {Intrinsic::hexagon_V6_vpackwh_sat, 48610}, // __builtin_HEXAGON_V6_vpackwh_sat
      {Intrinsic::hexagon_V6_vpackwh_sat_128B, 48643}, // __builtin_HEXAGON_V6_vpackwh_sat_128B
      {Intrinsic::hexagon_V6_vpackwuh_sat, 48681}, // __builtin_HEXAGON_V6_vpackwuh_sat
      {Intrinsic::hexagon_V6_vpackwuh_sat_128B, 48715}, // __builtin_HEXAGON_V6_vpackwuh_sat_128B
      {Intrinsic::hexagon_V6_vpopcounth, 48754}, // __builtin_HEXAGON_V6_vpopcounth
      {Intrinsic::hexagon_V6_vpopcounth_128B, 48786}, // __builtin_HEXAGON_V6_vpopcounth_128B
      {Intrinsic::hexagon_V6_vrdelta, 48823}, // __builtin_HEXAGON_V6_vrdelta
      {Intrinsic::hexagon_V6_vrdelta_128B, 48852}, // __builtin_HEXAGON_V6_vrdelta_128B
      {Intrinsic::hexagon_V6_vrmpybub_rtt, 48886}, // __builtin_HEXAGON_V6_vrmpybub_rtt
      {Intrinsic::hexagon_V6_vrmpybub_rtt_128B, 48920}, // __builtin_HEXAGON_V6_vrmpybub_rtt_128B
      {Intrinsic::hexagon_V6_vrmpybub_rtt_acc, 48959}, // __builtin_HEXAGON_V6_vrmpybub_rtt_acc
      {Intrinsic::hexagon_V6_vrmpybub_rtt_acc_128B, 48997}, // __builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B
      {Intrinsic::hexagon_V6_vrmpybus, 49040}, // __builtin_HEXAGON_V6_vrmpybus
      {Intrinsic::hexagon_V6_vrmpybus_128B, 49070}, // __builtin_HEXAGON_V6_vrmpybus_128B
      {Intrinsic::hexagon_V6_vrmpybus_acc, 49105}, // __builtin_HEXAGON_V6_vrmpybus_acc
      {Intrinsic::hexagon_V6_vrmpybus_acc_128B, 49139}, // __builtin_HEXAGON_V6_vrmpybus_acc_128B
      {Intrinsic::hexagon_V6_vrmpybusi, 49178}, // __builtin_HEXAGON_V6_vrmpybusi
      {Intrinsic::hexagon_V6_vrmpybusi_128B, 49209}, // __builtin_HEXAGON_V6_vrmpybusi_128B
      {Intrinsic::hexagon_V6_vrmpybusi_acc, 49245}, // __builtin_HEXAGON_V6_vrmpybusi_acc
      {Intrinsic::hexagon_V6_vrmpybusi_acc_128B, 49280}, // __builtin_HEXAGON_V6_vrmpybusi_acc_128B
      {Intrinsic::hexagon_V6_vrmpybusv, 49320}, // __builtin_HEXAGON_V6_vrmpybusv
      {Intrinsic::hexagon_V6_vrmpybusv_128B, 49351}, // __builtin_HEXAGON_V6_vrmpybusv_128B
      {Intrinsic::hexagon_V6_vrmpybusv_acc, 49387}, // __builtin_HEXAGON_V6_vrmpybusv_acc
      {Intrinsic::hexagon_V6_vrmpybusv_acc_128B, 49422}, // __builtin_HEXAGON_V6_vrmpybusv_acc_128B
      {Intrinsic::hexagon_V6_vrmpybv, 49462}, // __builtin_HEXAGON_V6_vrmpybv
      {Intrinsic::hexagon_V6_vrmpybv_128B, 49491}, // __builtin_HEXAGON_V6_vrmpybv_128B
      {Intrinsic::hexagon_V6_vrmpybv_acc, 49525}, // __builtin_HEXAGON_V6_vrmpybv_acc
      {Intrinsic::hexagon_V6_vrmpybv_acc_128B, 49558}, // __builtin_HEXAGON_V6_vrmpybv_acc_128B
      {Intrinsic::hexagon_V6_vrmpyub, 49596}, // __builtin_HEXAGON_V6_vrmpyub
      {Intrinsic::hexagon_V6_vrmpyub_128B, 49625}, // __builtin_HEXAGON_V6_vrmpyub_128B
      {Intrinsic::hexagon_V6_vrmpyub_acc, 49659}, // __builtin_HEXAGON_V6_vrmpyub_acc
      {Intrinsic::hexagon_V6_vrmpyub_acc_128B, 49692}, // __builtin_HEXAGON_V6_vrmpyub_acc_128B
      {Intrinsic::hexagon_V6_vrmpyub_rtt, 49730}, // __builtin_HEXAGON_V6_vrmpyub_rtt
      {Intrinsic::hexagon_V6_vrmpyub_rtt_128B, 49763}, // __builtin_HEXAGON_V6_vrmpyub_rtt_128B
      {Intrinsic::hexagon_V6_vrmpyub_rtt_acc, 49801}, // __builtin_HEXAGON_V6_vrmpyub_rtt_acc
      {Intrinsic::hexagon_V6_vrmpyub_rtt_acc_128B, 49838}, // __builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B
      {Intrinsic::hexagon_V6_vrmpyubi, 49880}, // __builtin_HEXAGON_V6_vrmpyubi
      {Intrinsic::hexagon_V6_vrmpyubi_128B, 49910}, // __builtin_HEXAGON_V6_vrmpyubi_128B
      {Intrinsic::hexagon_V6_vrmpyubi_acc, 49945}, // __builtin_HEXAGON_V6_vrmpyubi_acc
      {Intrinsic::hexagon_V6_vrmpyubi_acc_128B, 49979}, // __builtin_HEXAGON_V6_vrmpyubi_acc_128B
      {Intrinsic::hexagon_V6_vrmpyubv, 50018}, // __builtin_HEXAGON_V6_vrmpyubv
      {Intrinsic::hexagon_V6_vrmpyubv_128B, 50048}, // __builtin_HEXAGON_V6_vrmpyubv_128B
      {Intrinsic::hexagon_V6_vrmpyubv_acc, 50083}, // __builtin_HEXAGON_V6_vrmpyubv_acc
      {Intrinsic::hexagon_V6_vrmpyubv_acc_128B, 50117}, // __builtin_HEXAGON_V6_vrmpyubv_acc_128B
      {Intrinsic::hexagon_V6_vror, 50156}, // __builtin_HEXAGON_V6_vror
      {Intrinsic::hexagon_V6_vror_128B, 50182}, // __builtin_HEXAGON_V6_vror_128B
      {Intrinsic::hexagon_V6_vrotr, 50213}, // __builtin_HEXAGON_V6_vrotr
      {Intrinsic::hexagon_V6_vrotr_128B, 50240}, // __builtin_HEXAGON_V6_vrotr_128B
      {Intrinsic::hexagon_V6_vroundhb, 50272}, // __builtin_HEXAGON_V6_vroundhb
      {Intrinsic::hexagon_V6_vroundhb_128B, 50302}, // __builtin_HEXAGON_V6_vroundhb_128B
      {Intrinsic::hexagon_V6_vroundhub, 50337}, // __builtin_HEXAGON_V6_vroundhub
      {Intrinsic::hexagon_V6_vroundhub_128B, 50368}, // __builtin_HEXAGON_V6_vroundhub_128B
      {Intrinsic::hexagon_V6_vrounduhub, 50404}, // __builtin_HEXAGON_V6_vrounduhub
      {Intrinsic::hexagon_V6_vrounduhub_128B, 50436}, // __builtin_HEXAGON_V6_vrounduhub_128B
      {Intrinsic::hexagon_V6_vrounduwuh, 50473}, // __builtin_HEXAGON_V6_vrounduwuh
      {Intrinsic::hexagon_V6_vrounduwuh_128B, 50505}, // __builtin_HEXAGON_V6_vrounduwuh_128B
      {Intrinsic::hexagon_V6_vroundwh, 50542}, // __builtin_HEXAGON_V6_vroundwh
      {Intrinsic::hexagon_V6_vroundwh_128B, 50572}, // __builtin_HEXAGON_V6_vroundwh_128B
      {Intrinsic::hexagon_V6_vroundwuh, 50607}, // __builtin_HEXAGON_V6_vroundwuh
      {Intrinsic::hexagon_V6_vroundwuh_128B, 50638}, // __builtin_HEXAGON_V6_vroundwuh_128B
      {Intrinsic::hexagon_V6_vrsadubi, 50674}, // __builtin_HEXAGON_V6_vrsadubi
      {Intrinsic::hexagon_V6_vrsadubi_128B, 50704}, // __builtin_HEXAGON_V6_vrsadubi_128B
      {Intrinsic::hexagon_V6_vrsadubi_acc, 50739}, // __builtin_HEXAGON_V6_vrsadubi_acc
      {Intrinsic::hexagon_V6_vrsadubi_acc_128B, 50773}, // __builtin_HEXAGON_V6_vrsadubi_acc_128B
      {Intrinsic::hexagon_V6_vsatdw, 50812}, // __builtin_HEXAGON_V6_vsatdw
      {Intrinsic::hexagon_V6_vsatdw_128B, 50840}, // __builtin_HEXAGON_V6_vsatdw_128B
      {Intrinsic::hexagon_V6_vsathub, 50873}, // __builtin_HEXAGON_V6_vsathub
      {Intrinsic::hexagon_V6_vsathub_128B, 50902}, // __builtin_HEXAGON_V6_vsathub_128B
      {Intrinsic::hexagon_V6_vsatuwuh, 50936}, // __builtin_HEXAGON_V6_vsatuwuh
      {Intrinsic::hexagon_V6_vsatuwuh_128B, 50966}, // __builtin_HEXAGON_V6_vsatuwuh_128B
      {Intrinsic::hexagon_V6_vsatwh, 51001}, // __builtin_HEXAGON_V6_vsatwh
      {Intrinsic::hexagon_V6_vsatwh_128B, 51029}, // __builtin_HEXAGON_V6_vsatwh_128B
      {Intrinsic::hexagon_V6_vsb, 51062}, // __builtin_HEXAGON_V6_vsb
      {Intrinsic::hexagon_V6_vsb_128B, 51087}, // __builtin_HEXAGON_V6_vsb_128B
      {Intrinsic::hexagon_V6_vscattermh, 51117}, // __builtin_HEXAGON_V6_vscattermh
      {Intrinsic::hexagon_V6_vscattermh_128B, 51149}, // __builtin_HEXAGON_V6_vscattermh_128B
      {Intrinsic::hexagon_V6_vscattermh_add, 51186}, // __builtin_HEXAGON_V6_vscattermh_add
      {Intrinsic::hexagon_V6_vscattermh_add_128B, 51222}, // __builtin_HEXAGON_V6_vscattermh_add_128B
      {Intrinsic::hexagon_V6_vscattermhw, 51263}, // __builtin_HEXAGON_V6_vscattermhw
      {Intrinsic::hexagon_V6_vscattermhw_128B, 51296}, // __builtin_HEXAGON_V6_vscattermhw_128B
      {Intrinsic::hexagon_V6_vscattermhw_add, 51334}, // __builtin_HEXAGON_V6_vscattermhw_add
      {Intrinsic::hexagon_V6_vscattermhw_add_128B, 51371}, // __builtin_HEXAGON_V6_vscattermhw_add_128B
      {Intrinsic::hexagon_V6_vscattermw, 51413}, // __builtin_HEXAGON_V6_vscattermw
      {Intrinsic::hexagon_V6_vscattermw_128B, 51445}, // __builtin_HEXAGON_V6_vscattermw_128B
      {Intrinsic::hexagon_V6_vscattermw_add, 51482}, // __builtin_HEXAGON_V6_vscattermw_add
      {Intrinsic::hexagon_V6_vscattermw_add_128B, 51518}, // __builtin_HEXAGON_V6_vscattermw_add_128B
      {Intrinsic::hexagon_V6_vsh, 51559}, // __builtin_HEXAGON_V6_vsh
      {Intrinsic::hexagon_V6_vsh_128B, 51584}, // __builtin_HEXAGON_V6_vsh_128B
      {Intrinsic::hexagon_V6_vshufeh, 51614}, // __builtin_HEXAGON_V6_vshufeh
      {Intrinsic::hexagon_V6_vshufeh_128B, 51643}, // __builtin_HEXAGON_V6_vshufeh_128B
      {Intrinsic::hexagon_V6_vshuffb, 51677}, // __builtin_HEXAGON_V6_vshuffb
      {Intrinsic::hexagon_V6_vshuffb_128B, 51706}, // __builtin_HEXAGON_V6_vshuffb_128B
      {Intrinsic::hexagon_V6_vshuffeb, 51740}, // __builtin_HEXAGON_V6_vshuffeb
      {Intrinsic::hexagon_V6_vshuffeb_128B, 51770}, // __builtin_HEXAGON_V6_vshuffeb_128B
      {Intrinsic::hexagon_V6_vshuffh, 51805}, // __builtin_HEXAGON_V6_vshuffh
      {Intrinsic::hexagon_V6_vshuffh_128B, 51834}, // __builtin_HEXAGON_V6_vshuffh_128B
      {Intrinsic::hexagon_V6_vshuffob, 51868}, // __builtin_HEXAGON_V6_vshuffob
      {Intrinsic::hexagon_V6_vshuffob_128B, 51898}, // __builtin_HEXAGON_V6_vshuffob_128B
      {Intrinsic::hexagon_V6_vshuffvdd, 51933}, // __builtin_HEXAGON_V6_vshuffvdd
      {Intrinsic::hexagon_V6_vshuffvdd_128B, 51964}, // __builtin_HEXAGON_V6_vshuffvdd_128B
      {Intrinsic::hexagon_V6_vshufoeb, 52000}, // __builtin_HEXAGON_V6_vshufoeb
      {Intrinsic::hexagon_V6_vshufoeb_128B, 52030}, // __builtin_HEXAGON_V6_vshufoeb_128B
      {Intrinsic::hexagon_V6_vshufoeh, 52065}, // __builtin_HEXAGON_V6_vshufoeh
      {Intrinsic::hexagon_V6_vshufoeh_128B, 52095}, // __builtin_HEXAGON_V6_vshufoeh_128B
      {Intrinsic::hexagon_V6_vshufoh, 52130}, // __builtin_HEXAGON_V6_vshufoh
      {Intrinsic::hexagon_V6_vshufoh_128B, 52159}, // __builtin_HEXAGON_V6_vshufoh_128B
      {Intrinsic::hexagon_V6_vsubb, 52193}, // __builtin_HEXAGON_V6_vsubb
      {Intrinsic::hexagon_V6_vsubb_128B, 52220}, // __builtin_HEXAGON_V6_vsubb_128B
      {Intrinsic::hexagon_V6_vsubb_dv, 52252}, // __builtin_HEXAGON_V6_vsubb_dv
      {Intrinsic::hexagon_V6_vsubb_dv_128B, 52282}, // __builtin_HEXAGON_V6_vsubb_dv_128B
      {Intrinsic::hexagon_V6_vsubbsat, 52317}, // __builtin_HEXAGON_V6_vsubbsat
      {Intrinsic::hexagon_V6_vsubbsat_128B, 52347}, // __builtin_HEXAGON_V6_vsubbsat_128B
      {Intrinsic::hexagon_V6_vsubbsat_dv, 52382}, // __builtin_HEXAGON_V6_vsubbsat_dv
      {Intrinsic::hexagon_V6_vsubbsat_dv_128B, 52415}, // __builtin_HEXAGON_V6_vsubbsat_dv_128B
      {Intrinsic::hexagon_V6_vsubh, 52453}, // __builtin_HEXAGON_V6_vsubh
      {Intrinsic::hexagon_V6_vsubh_128B, 52480}, // __builtin_HEXAGON_V6_vsubh_128B
      {Intrinsic::hexagon_V6_vsubh_dv, 52512}, // __builtin_HEXAGON_V6_vsubh_dv
      {Intrinsic::hexagon_V6_vsubh_dv_128B, 52542}, // __builtin_HEXAGON_V6_vsubh_dv_128B
      {Intrinsic::hexagon_V6_vsubhsat, 52577}, // __builtin_HEXAGON_V6_vsubhsat
      {Intrinsic::hexagon_V6_vsubhsat_128B, 52607}, // __builtin_HEXAGON_V6_vsubhsat_128B
      {Intrinsic::hexagon_V6_vsubhsat_dv, 52642}, // __builtin_HEXAGON_V6_vsubhsat_dv
      {Intrinsic::hexagon_V6_vsubhsat_dv_128B, 52675}, // __builtin_HEXAGON_V6_vsubhsat_dv_128B
      {Intrinsic::hexagon_V6_vsubhw, 52713}, // __builtin_HEXAGON_V6_vsubhw
      {Intrinsic::hexagon_V6_vsubhw_128B, 52741}, // __builtin_HEXAGON_V6_vsubhw_128B
      {Intrinsic::hexagon_V6_vsububh, 52774}, // __builtin_HEXAGON_V6_vsububh
      {Intrinsic::hexagon_V6_vsububh_128B, 52803}, // __builtin_HEXAGON_V6_vsububh_128B
      {Intrinsic::hexagon_V6_vsububsat, 52837}, // __builtin_HEXAGON_V6_vsububsat
      {Intrinsic::hexagon_V6_vsububsat_128B, 52868}, // __builtin_HEXAGON_V6_vsububsat_128B
      {Intrinsic::hexagon_V6_vsububsat_dv, 52904}, // __builtin_HEXAGON_V6_vsububsat_dv
      {Intrinsic::hexagon_V6_vsububsat_dv_128B, 52938}, // __builtin_HEXAGON_V6_vsububsat_dv_128B
      {Intrinsic::hexagon_V6_vsubububb_sat, 52977}, // __builtin_HEXAGON_V6_vsubububb_sat
      {Intrinsic::hexagon_V6_vsubububb_sat_128B, 53012}, // __builtin_HEXAGON_V6_vsubububb_sat_128B
      {Intrinsic::hexagon_V6_vsubuhsat, 53052}, // __builtin_HEXAGON_V6_vsubuhsat
      {Intrinsic::hexagon_V6_vsubuhsat_128B, 53083}, // __builtin_HEXAGON_V6_vsubuhsat_128B
      {Intrinsic::hexagon_V6_vsubuhsat_dv, 53119}, // __builtin_HEXAGON_V6_vsubuhsat_dv
      {Intrinsic::hexagon_V6_vsubuhsat_dv_128B, 53153}, // __builtin_HEXAGON_V6_vsubuhsat_dv_128B
      {Intrinsic::hexagon_V6_vsubuhw, 53192}, // __builtin_HEXAGON_V6_vsubuhw
      {Intrinsic::hexagon_V6_vsubuhw_128B, 53221}, // __builtin_HEXAGON_V6_vsubuhw_128B
      {Intrinsic::hexagon_V6_vsubuwsat, 53255}, // __builtin_HEXAGON_V6_vsubuwsat
      {Intrinsic::hexagon_V6_vsubuwsat_128B, 53286}, // __builtin_HEXAGON_V6_vsubuwsat_128B
      {Intrinsic::hexagon_V6_vsubuwsat_dv, 53322}, // __builtin_HEXAGON_V6_vsubuwsat_dv
      {Intrinsic::hexagon_V6_vsubuwsat_dv_128B, 53356}, // __builtin_HEXAGON_V6_vsubuwsat_dv_128B
      {Intrinsic::hexagon_V6_vsubw, 53395}, // __builtin_HEXAGON_V6_vsubw
      {Intrinsic::hexagon_V6_vsubw_128B, 53422}, // __builtin_HEXAGON_V6_vsubw_128B
      {Intrinsic::hexagon_V6_vsubw_dv, 53454}, // __builtin_HEXAGON_V6_vsubw_dv
      {Intrinsic::hexagon_V6_vsubw_dv_128B, 53484}, // __builtin_HEXAGON_V6_vsubw_dv_128B
      {Intrinsic::hexagon_V6_vsubwsat, 53519}, // __builtin_HEXAGON_V6_vsubwsat
      {Intrinsic::hexagon_V6_vsubwsat_128B, 53549}, // __builtin_HEXAGON_V6_vsubwsat_128B
      {Intrinsic::hexagon_V6_vsubwsat_dv, 53584}, // __builtin_HEXAGON_V6_vsubwsat_dv
      {Intrinsic::hexagon_V6_vsubwsat_dv_128B, 53617}, // __builtin_HEXAGON_V6_vsubwsat_dv_128B
      {Intrinsic::hexagon_V6_vtmpyb, 53655}, // __builtin_HEXAGON_V6_vtmpyb
      {Intrinsic::hexagon_V6_vtmpyb_128B, 53683}, // __builtin_HEXAGON_V6_vtmpyb_128B
      {Intrinsic::hexagon_V6_vtmpyb_acc, 53716}, // __builtin_HEXAGON_V6_vtmpyb_acc
      {Intrinsic::hexagon_V6_vtmpyb_acc_128B, 53748}, // __builtin_HEXAGON_V6_vtmpyb_acc_128B
      {Intrinsic::hexagon_V6_vtmpybus, 53785}, // __builtin_HEXAGON_V6_vtmpybus
      {Intrinsic::hexagon_V6_vtmpybus_128B, 53815}, // __builtin_HEXAGON_V6_vtmpybus_128B
      {Intrinsic::hexagon_V6_vtmpybus_acc, 53850}, // __builtin_HEXAGON_V6_vtmpybus_acc
      {Intrinsic::hexagon_V6_vtmpybus_acc_128B, 53884}, // __builtin_HEXAGON_V6_vtmpybus_acc_128B
      {Intrinsic::hexagon_V6_vtmpyhb, 53923}, // __builtin_HEXAGON_V6_vtmpyhb
      {Intrinsic::hexagon_V6_vtmpyhb_128B, 53952}, // __builtin_HEXAGON_V6_vtmpyhb_128B
      {Intrinsic::hexagon_V6_vtmpyhb_acc, 53986}, // __builtin_HEXAGON_V6_vtmpyhb_acc
      {Intrinsic::hexagon_V6_vtmpyhb_acc_128B, 54019}, // __builtin_HEXAGON_V6_vtmpyhb_acc_128B
      {Intrinsic::hexagon_V6_vunpackb, 54057}, // __builtin_HEXAGON_V6_vunpackb
      {Intrinsic::hexagon_V6_vunpackb_128B, 54087}, // __builtin_HEXAGON_V6_vunpackb_128B
      {Intrinsic::hexagon_V6_vunpackh, 54122}, // __builtin_HEXAGON_V6_vunpackh
      {Intrinsic::hexagon_V6_vunpackh_128B, 54152}, // __builtin_HEXAGON_V6_vunpackh_128B
      {Intrinsic::hexagon_V6_vunpackob, 54187}, // __builtin_HEXAGON_V6_vunpackob
      {Intrinsic::hexagon_V6_vunpackob_128B, 54218}, // __builtin_HEXAGON_V6_vunpackob_128B
      {Intrinsic::hexagon_V6_vunpackoh, 54254}, // __builtin_HEXAGON_V6_vunpackoh
      {Intrinsic::hexagon_V6_vunpackoh_128B, 54285}, // __builtin_HEXAGON_V6_vunpackoh_128B
      {Intrinsic::hexagon_V6_vunpackub, 54321}, // __builtin_HEXAGON_V6_vunpackub
      {Intrinsic::hexagon_V6_vunpackub_128B, 54352}, // __builtin_HEXAGON_V6_vunpackub_128B
      {Intrinsic::hexagon_V6_vunpackuh, 54388}, // __builtin_HEXAGON_V6_vunpackuh
      {Intrinsic::hexagon_V6_vunpackuh_128B, 54419}, // __builtin_HEXAGON_V6_vunpackuh_128B
      {Intrinsic::hexagon_V6_vxor, 54455}, // __builtin_HEXAGON_V6_vxor
      {Intrinsic::hexagon_V6_vxor_128B, 54481}, // __builtin_HEXAGON_V6_vxor_128B
      {Intrinsic::hexagon_V6_vzb, 54512}, // __builtin_HEXAGON_V6_vzb
      {Intrinsic::hexagon_V6_vzb_128B, 54537}, // __builtin_HEXAGON_V6_vzb_128B
      {Intrinsic::hexagon_V6_vzh, 54567}, // __builtin_HEXAGON_V6_vzh
      {Intrinsic::hexagon_V6_vzh_128B, 54592}, // __builtin_HEXAGON_V6_vzh_128B
      {Intrinsic::hexagon_Y2_dccleana, 54622}, // __builtin_HEXAGON_Y2_dccleana
      {Intrinsic::hexagon_Y2_dccleaninva, 54652}, // __builtin_HEXAGON_Y2_dccleaninva
      {Intrinsic::hexagon_Y2_dcfetch, 54685}, // __builtin_HEXAGON_Y2_dcfetch
      {Intrinsic::hexagon_Y2_dcinva, 54714}, // __builtin_HEXAGON_Y2_dcinva
      {Intrinsic::hexagon_Y2_dczeroa, 54742}, // __builtin_HEXAGON_Y2_dczeroa
      {Intrinsic::hexagon_Y4_l2fetch, 54771}, // __builtin_HEXAGON_Y4_l2fetch
      {Intrinsic::hexagon_Y5_l2fetch, 54800}, // __builtin_HEXAGON_Y5_l2fetch
      {Intrinsic::hexagon_prefetch, 55042}, // __builtin_HEXAGON_prefetch
      {Intrinsic::hexagon_S2_storerb_pbr, 30911}, // __builtin_brev_stb
      {Intrinsic::hexagon_S2_storerd_pbr, 30930}, // __builtin_brev_std
      {Intrinsic::hexagon_S2_storerh_pbr, 30970}, // __builtin_brev_sth
      {Intrinsic::hexagon_S2_storerf_pbr, 30949}, // __builtin_brev_sthhi
      {Intrinsic::hexagon_S2_storeri_pbr, 30989}, // __builtin_brev_stw
      {Intrinsic::hexagon_circ_ldb, 54829}, // __builtin_circ_ldb
      {Intrinsic::hexagon_circ_ldd, 54848}, // __builtin_circ_ldd
      {Intrinsic::hexagon_circ_ldh, 54867}, // __builtin_circ_ldh
      {Intrinsic::hexagon_circ_ldub, 54886}, // __builtin_circ_ldub
      {Intrinsic::hexagon_circ_lduh, 54906}, // __builtin_circ_lduh
      {Intrinsic::hexagon_circ_ldw, 54926}, // __builtin_circ_ldw
      {Intrinsic::hexagon_circ_stb, 54945}, // __builtin_circ_stb
      {Intrinsic::hexagon_circ_std, 54964}, // __builtin_circ_std
      {Intrinsic::hexagon_circ_sth, 54983}, // __builtin_circ_sth
      {Intrinsic::hexagon_circ_sthhi, 55002}, // __builtin_circ_sthhi
      {Intrinsic::hexagon_circ_stw, 55023}, // __builtin_circ_stw
      {Intrinsic::hexagon_vmemcpy, 55069}, // __builtin_hexagon_vmemcpy
      {Intrinsic::hexagon_vmemset, 55095}, // __builtin_hexagon_vmemset
    };
    auto I = std::lower_bound(std::begin(hexagonNames),
                              std::end(hexagonNames),
                              BuiltinNameStr);
    if (I != std::end(hexagonNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "mips") {
    static const BuiltinEntry mipsNames[] = {
      {Intrinsic::mips_absq_s_ph, 55121}, // __builtin_mips_absq_s_ph
      {Intrinsic::mips_absq_s_qb, 55146}, // __builtin_mips_absq_s_qb
      {Intrinsic::mips_absq_s_w, 55171}, // __builtin_mips_absq_s_w
      {Intrinsic::mips_addq_ph, 55283}, // __builtin_mips_addq_ph
      {Intrinsic::mips_addq_s_ph, 55306}, // __builtin_mips_addq_s_ph
      {Intrinsic::mips_addq_s_w, 55331}, // __builtin_mips_addq_s_w
      {Intrinsic::mips_addqh_ph, 55355}, // __builtin_mips_addqh_ph
      {Intrinsic::mips_addqh_r_ph, 55379}, // __builtin_mips_addqh_r_ph
      {Intrinsic::mips_addqh_r_w, 55405}, // __builtin_mips_addqh_r_w
      {Intrinsic::mips_addqh_w, 55430}, // __builtin_mips_addqh_w
      {Intrinsic::mips_addsc, 55729}, // __builtin_mips_addsc
      {Intrinsic::mips_addu_ph, 55750}, // __builtin_mips_addu_ph
      {Intrinsic::mips_addu_qb, 55773}, // __builtin_mips_addu_qb
      {Intrinsic::mips_addu_s_ph, 55796}, // __builtin_mips_addu_s_ph
      {Intrinsic::mips_addu_s_qb, 55821}, // __builtin_mips_addu_s_qb
      {Intrinsic::mips_adduh_qb, 55846}, // __builtin_mips_adduh_qb
      {Intrinsic::mips_adduh_r_qb, 55870}, // __builtin_mips_adduh_r_qb
      {Intrinsic::mips_addwc, 56068}, // __builtin_mips_addwc
      {Intrinsic::mips_append, 56130}, // __builtin_mips_append
      {Intrinsic::mips_balign, 56696}, // __builtin_mips_balign
      {Intrinsic::mips_bitrev, 57250}, // __builtin_mips_bitrev
      {Intrinsic::mips_bposge32, 57628}, // __builtin_mips_bposge32
      {Intrinsic::mips_cmp_eq_ph, 58867}, // __builtin_mips_cmp_eq_ph
      {Intrinsic::mips_cmp_le_ph, 58892}, // __builtin_mips_cmp_le_ph
      {Intrinsic::mips_cmp_lt_ph, 58917}, // __builtin_mips_cmp_lt_ph
      {Intrinsic::mips_cmpgdu_eq_qb, 58942}, // __builtin_mips_cmpgdu_eq_qb
      {Intrinsic::mips_cmpgdu_le_qb, 58970}, // __builtin_mips_cmpgdu_le_qb
      {Intrinsic::mips_cmpgdu_lt_qb, 58998}, // __builtin_mips_cmpgdu_lt_qb
      {Intrinsic::mips_cmpgu_eq_qb, 59026}, // __builtin_mips_cmpgu_eq_qb
      {Intrinsic::mips_cmpgu_le_qb, 59053}, // __builtin_mips_cmpgu_le_qb
      {Intrinsic::mips_cmpgu_lt_qb, 59080}, // __builtin_mips_cmpgu_lt_qb
      {Intrinsic::mips_cmpu_eq_qb, 59107}, // __builtin_mips_cmpu_eq_qb
      {Intrinsic::mips_cmpu_le_qb, 59133}, // __builtin_mips_cmpu_le_qb
      {Intrinsic::mips_cmpu_lt_qb, 59159}, // __builtin_mips_cmpu_lt_qb
      {Intrinsic::mips_dlsa, 59566}, // __builtin_mips_dlsa
      {Intrinsic::mips_dpa_w_ph, 59724}, // __builtin_mips_dpa_w_ph
      {Intrinsic::mips_dpaq_s_w_ph, 59892}, // __builtin_mips_dpaq_s_w_ph
      {Intrinsic::mips_dpaq_sa_l_w, 59919}, // __builtin_mips_dpaq_sa_l_w
      {Intrinsic::mips_dpaqx_s_w_ph, 59946}, // __builtin_mips_dpaqx_s_w_ph
      {Intrinsic::mips_dpaqx_sa_w_ph, 59974}, // __builtin_mips_dpaqx_sa_w_ph
      {Intrinsic::mips_dpau_h_qbl, 60003}, // __builtin_mips_dpau_h_qbl
      {Intrinsic::mips_dpau_h_qbr, 60029}, // __builtin_mips_dpau_h_qbr
      {Intrinsic::mips_dpax_w_ph, 60055}, // __builtin_mips_dpax_w_ph
      {Intrinsic::mips_dps_w_ph, 60080}, // __builtin_mips_dps_w_ph
      {Intrinsic::mips_dpsq_s_w_ph, 60104}, // __builtin_mips_dpsq_s_w_ph
      {Intrinsic::mips_dpsq_sa_l_w, 60131}, // __builtin_mips_dpsq_sa_l_w
      {Intrinsic::mips_dpsqx_s_w_ph, 60158}, // __builtin_mips_dpsqx_s_w_ph
      {Intrinsic::mips_dpsqx_sa_w_ph, 60186}, // __builtin_mips_dpsqx_sa_w_ph
      {Intrinsic::mips_dpsu_h_qbl, 60215}, // __builtin_mips_dpsu_h_qbl
      {Intrinsic::mips_dpsu_h_qbr, 60241}, // __builtin_mips_dpsu_h_qbr
      {Intrinsic::mips_dpsx_w_ph, 60411}, // __builtin_mips_dpsx_w_ph
      {Intrinsic::mips_extp, 60436}, // __builtin_mips_extp
      {Intrinsic::mips_extpdp, 60456}, // __builtin_mips_extpdp
      {Intrinsic::mips_extr_r_w, 60478}, // __builtin_mips_extr_r_w
      {Intrinsic::mips_extr_rs_w, 60502}, // __builtin_mips_extr_rs_w
      {Intrinsic::mips_extr_s_h, 60527}, // __builtin_mips_extr_s_h
      {Intrinsic::mips_extr_w, 60551}, // __builtin_mips_extr_w
      {Intrinsic::mips_insv, 63603}, // __builtin_mips_insv
      {Intrinsic::mips_lbux, 63711}, // __builtin_mips_lbux
      {Intrinsic::mips_lhx, 63927}, // __builtin_mips_lhx
      {Intrinsic::mips_lsa, 63946}, // __builtin_mips_lsa
      {Intrinsic::mips_lwx, 63965}, // __builtin_mips_lwx
      {Intrinsic::mips_madd, 63984}, // __builtin_mips_madd
      {Intrinsic::mips_maddu, 64098}, // __builtin_mips_maddu
      {Intrinsic::mips_maq_s_w_phl, 64207}, // __builtin_mips_maq_s_w_phl
      {Intrinsic::mips_maq_s_w_phr, 64234}, // __builtin_mips_maq_s_w_phr
      {Intrinsic::mips_maq_sa_w_phl, 64261}, // __builtin_mips_maq_sa_w_phl
      {Intrinsic::mips_maq_sa_w_phr, 64289}, // __builtin_mips_maq_sa_w_phr
      {Intrinsic::mips_modsub, 65389}, // __builtin_mips_modsub
      {Intrinsic::mips_msub, 65432}, // __builtin_mips_msub
      {Intrinsic::mips_msubu, 65546}, // __builtin_mips_msubu
      {Intrinsic::mips_mthlip, 65655}, // __builtin_mips_mthlip
      {Intrinsic::mips_mul_ph, 65677}, // __builtin_mips_mul_ph
      {Intrinsic::mips_mul_s_ph, 65743}, // __builtin_mips_mul_s_ph
      {Intrinsic::mips_muleq_s_w_phl, 65767}, // __builtin_mips_muleq_s_w_phl
      {Intrinsic::mips_muleq_s_w_phr, 65796}, // __builtin_mips_muleq_s_w_phr
      {Intrinsic::mips_muleu_s_ph_qbl, 65825}, // __builtin_mips_muleu_s_ph_qbl
      {Intrinsic::mips_muleu_s_ph_qbr, 65855}, // __builtin_mips_muleu_s_ph_qbr
      {Intrinsic::mips_mulq_rs_ph, 65885}, // __builtin_mips_mulq_rs_ph
      {Intrinsic::mips_mulq_rs_w, 65911}, // __builtin_mips_mulq_rs_w
      {Intrinsic::mips_mulq_s_ph, 65936}, // __builtin_mips_mulq_s_ph
      {Intrinsic::mips_mulq_s_w, 65961}, // __builtin_mips_mulq_s_w
      {Intrinsic::mips_mulsa_w_ph, 66031}, // __builtin_mips_mulsa_w_ph
      {Intrinsic::mips_mulsaq_s_w_ph, 66057}, // __builtin_mips_mulsaq_s_w_ph
      {Intrinsic::mips_mult, 66086}, // __builtin_mips_mult
      {Intrinsic::mips_multu, 66106}, // __builtin_mips_multu
      {Intrinsic::mips_packrl_ph, 66459}, // __builtin_mips_packrl_ph
      {Intrinsic::mips_pick_ph, 66744}, // __builtin_mips_pick_ph
      {Intrinsic::mips_pick_qb, 66767}, // __builtin_mips_pick_qb
      {Intrinsic::mips_preceq_w_phl, 66790}, // __builtin_mips_preceq_w_phl
      {Intrinsic::mips_preceq_w_phr, 66818}, // __builtin_mips_preceq_w_phr
      {Intrinsic::mips_precequ_ph_qbl, 66846}, // __builtin_mips_precequ_ph_qbl
      {Intrinsic::mips_precequ_ph_qbla, 66876}, // __builtin_mips_precequ_ph_qbla
      {Intrinsic::mips_precequ_ph_qbr, 66907}, // __builtin_mips_precequ_ph_qbr
      {Intrinsic::mips_precequ_ph_qbra, 66937}, // __builtin_mips_precequ_ph_qbra
      {Intrinsic::mips_preceu_ph_qbl, 66968}, // __builtin_mips_preceu_ph_qbl
      {Intrinsic::mips_preceu_ph_qbla, 66997}, // __builtin_mips_preceu_ph_qbla
      {Intrinsic::mips_preceu_ph_qbr, 67027}, // __builtin_mips_preceu_ph_qbr
      {Intrinsic::mips_preceu_ph_qbra, 67056}, // __builtin_mips_preceu_ph_qbra
      {Intrinsic::mips_precr_qb_ph, 67086}, // __builtin_mips_precr_qb_ph
      {Intrinsic::mips_precr_sra_ph_w, 67113}, // __builtin_mips_precr_sra_ph_w
      {Intrinsic::mips_precr_sra_r_ph_w, 67143}, // __builtin_mips_precr_sra_r_ph_w
      {Intrinsic::mips_precrq_ph_w, 67175}, // __builtin_mips_precrq_ph_w
      {Intrinsic::mips_precrq_qb_ph, 67202}, // __builtin_mips_precrq_qb_ph
      {Intrinsic::mips_precrq_rs_ph_w, 67230}, // __builtin_mips_precrq_rs_ph_w
      {Intrinsic::mips_precrqu_s_qb_ph, 67260}, // __builtin_mips_precrqu_s_qb_ph
      {Intrinsic::mips_prepend, 67291}, // __builtin_mips_prepend
      {Intrinsic::mips_raddu_w_qb, 67314}, // __builtin_mips_raddu_w_qb
      {Intrinsic::mips_rddsp, 67340}, // __builtin_mips_rddsp
      {Intrinsic::mips_repl_ph, 67361}, // __builtin_mips_repl_ph
      {Intrinsic::mips_repl_qb, 67384}, // __builtin_mips_repl_qb
      {Intrinsic::mips_shilo, 67643}, // __builtin_mips_shilo
      {Intrinsic::mips_shll_ph, 67664}, // __builtin_mips_shll_ph
      {Intrinsic::mips_shll_qb, 67687}, // __builtin_mips_shll_qb
      {Intrinsic::mips_shll_s_ph, 67710}, // __builtin_mips_shll_s_ph
      {Intrinsic::mips_shll_s_w, 67735}, // __builtin_mips_shll_s_w
      {Intrinsic::mips_shra_ph, 67759}, // __builtin_mips_shra_ph
      {Intrinsic::mips_shra_qb, 67782}, // __builtin_mips_shra_qb
      {Intrinsic::mips_shra_r_ph, 67805}, // __builtin_mips_shra_r_ph
      {Intrinsic::mips_shra_r_qb, 67830}, // __builtin_mips_shra_r_qb
      {Intrinsic::mips_shra_r_w, 67855}, // __builtin_mips_shra_r_w
      {Intrinsic::mips_shrl_ph, 67879}, // __builtin_mips_shrl_ph
      {Intrinsic::mips_shrl_qb, 67902}, // __builtin_mips_shrl_qb
      {Intrinsic::mips_subq_ph, 69221}, // __builtin_mips_subq_ph
      {Intrinsic::mips_subq_s_ph, 69244}, // __builtin_mips_subq_s_ph
      {Intrinsic::mips_subq_s_w, 69269}, // __builtin_mips_subq_s_w
      {Intrinsic::mips_subqh_ph, 69293}, // __builtin_mips_subqh_ph
      {Intrinsic::mips_subqh_r_ph, 69317}, // __builtin_mips_subqh_r_ph
      {Intrinsic::mips_subqh_r_w, 69343}, // __builtin_mips_subqh_r_w
      {Intrinsic::mips_subqh_w, 69368}, // __builtin_mips_subqh_w
      {Intrinsic::mips_subu_ph, 69775}, // __builtin_mips_subu_ph
      {Intrinsic::mips_subu_qb, 69798}, // __builtin_mips_subu_qb
      {Intrinsic::mips_subu_s_ph, 69821}, // __builtin_mips_subu_s_ph
      {Intrinsic::mips_subu_s_qb, 69846}, // __builtin_mips_subu_s_qb
      {Intrinsic::mips_subuh_qb, 69871}, // __builtin_mips_subuh_qb
      {Intrinsic::mips_subuh_r_qb, 69895}, // __builtin_mips_subuh_r_qb
      {Intrinsic::mips_wrdsp, 70177}, // __builtin_mips_wrdsp
      {Intrinsic::mips_add_a_b, 55195}, // __builtin_msa_add_a_b
      {Intrinsic::mips_add_a_d, 55217}, // __builtin_msa_add_a_d
      {Intrinsic::mips_add_a_h, 55239}, // __builtin_msa_add_a_h
      {Intrinsic::mips_add_a_w, 55261}, // __builtin_msa_add_a_w
      {Intrinsic::mips_adds_a_b, 55453}, // __builtin_msa_adds_a_b
      {Intrinsic::mips_adds_a_d, 55476}, // __builtin_msa_adds_a_d
      {Intrinsic::mips_adds_a_h, 55499}, // __builtin_msa_adds_a_h
      {Intrinsic::mips_adds_a_w, 55522}, // __builtin_msa_adds_a_w
      {Intrinsic::mips_adds_s_b, 55545}, // __builtin_msa_adds_s_b
      {Intrinsic::mips_adds_s_d, 55568}, // __builtin_msa_adds_s_d
      {Intrinsic::mips_adds_s_h, 55591}, // __builtin_msa_adds_s_h
      {Intrinsic::mips_adds_s_w, 55614}, // __builtin_msa_adds_s_w
      {Intrinsic::mips_adds_u_b, 55637}, // __builtin_msa_adds_u_b
      {Intrinsic::mips_adds_u_d, 55660}, // __builtin_msa_adds_u_d
      {Intrinsic::mips_adds_u_h, 55683}, // __builtin_msa_adds_u_h
      {Intrinsic::mips_adds_u_w, 55706}, // __builtin_msa_adds_u_w
      {Intrinsic::mips_addv_b, 55896}, // __builtin_msa_addv_b
      {Intrinsic::mips_addv_d, 55917}, // __builtin_msa_addv_d
      {Intrinsic::mips_addv_h, 55938}, // __builtin_msa_addv_h
      {Intrinsic::mips_addv_w, 55959}, // __builtin_msa_addv_w
      {Intrinsic::mips_addvi_b, 55980}, // __builtin_msa_addvi_b
      {Intrinsic::mips_addvi_d, 56002}, // __builtin_msa_addvi_d
      {Intrinsic::mips_addvi_h, 56024}, // __builtin_msa_addvi_h
      {Intrinsic::mips_addvi_w, 56046}, // __builtin_msa_addvi_w
      {Intrinsic::mips_and_v, 56089}, // __builtin_msa_and_v
      {Intrinsic::mips_andi_b, 56109}, // __builtin_msa_andi_b
      {Intrinsic::mips_asub_s_b, 56152}, // __builtin_msa_asub_s_b
      {Intrinsic::mips_asub_s_d, 56175}, // __builtin_msa_asub_s_d
      {Intrinsic::mips_asub_s_h, 56198}, // __builtin_msa_asub_s_h
      {Intrinsic::mips_asub_s_w, 56221}, // __builtin_msa_asub_s_w
      {Intrinsic::mips_asub_u_b, 56244}, // __builtin_msa_asub_u_b
      {Intrinsic::mips_asub_u_d, 56267}, // __builtin_msa_asub_u_d
      {Intrinsic::mips_asub_u_h, 56290}, // __builtin_msa_asub_u_h
      {Intrinsic::mips_asub_u_w, 56313}, // __builtin_msa_asub_u_w
      {Intrinsic::mips_ave_s_b, 56336}, // __builtin_msa_ave_s_b
      {Intrinsic::mips_ave_s_d, 56358}, // __builtin_msa_ave_s_d
      {Intrinsic::mips_ave_s_h, 56380}, // __builtin_msa_ave_s_h
      {Intrinsic::mips_ave_s_w, 56402}, // __builtin_msa_ave_s_w
      {Intrinsic::mips_ave_u_b, 56424}, // __builtin_msa_ave_u_b
      {Intrinsic::mips_ave_u_d, 56446}, // __builtin_msa_ave_u_d
      {Intrinsic::mips_ave_u_h, 56468}, // __builtin_msa_ave_u_h
      {Intrinsic::mips_ave_u_w, 56490}, // __builtin_msa_ave_u_w
      {Intrinsic::mips_aver_s_b, 56512}, // __builtin_msa_aver_s_b
      {Intrinsic::mips_aver_s_d, 56535}, // __builtin_msa_aver_s_d
      {Intrinsic::mips_aver_s_h, 56558}, // __builtin_msa_aver_s_h
      {Intrinsic::mips_aver_s_w, 56581}, // __builtin_msa_aver_s_w
      {Intrinsic::mips_aver_u_b, 56604}, // __builtin_msa_aver_u_b
      {Intrinsic::mips_aver_u_d, 56627}, // __builtin_msa_aver_u_d
      {Intrinsic::mips_aver_u_h, 56650}, // __builtin_msa_aver_u_h
      {Intrinsic::mips_aver_u_w, 56673}, // __builtin_msa_aver_u_w
      {Intrinsic::mips_bclr_b, 56718}, // __builtin_msa_bclr_b
      {Intrinsic::mips_bclr_d, 56739}, // __builtin_msa_bclr_d
      {Intrinsic::mips_bclr_h, 56760}, // __builtin_msa_bclr_h
      {Intrinsic::mips_bclr_w, 56781}, // __builtin_msa_bclr_w
      {Intrinsic::mips_bclri_b, 56802}, // __builtin_msa_bclri_b
      {Intrinsic::mips_bclri_d, 56824}, // __builtin_msa_bclri_d
      {Intrinsic::mips_bclri_h, 56846}, // __builtin_msa_bclri_h
      {Intrinsic::mips_bclri_w, 56868}, // __builtin_msa_bclri_w
      {Intrinsic::mips_binsl_b, 56890}, // __builtin_msa_binsl_b
      {Intrinsic::mips_binsl_d, 56912}, // __builtin_msa_binsl_d
      {Intrinsic::mips_binsl_h, 56934}, // __builtin_msa_binsl_h
      {Intrinsic::mips_binsl_w, 56956}, // __builtin_msa_binsl_w
      {Intrinsic::mips_binsli_b, 56978}, // __builtin_msa_binsli_b
      {Intrinsic::mips_binsli_d, 57001}, // __builtin_msa_binsli_d
      {Intrinsic::mips_binsli_h, 57024}, // __builtin_msa_binsli_h
      {Intrinsic::mips_binsli_w, 57047}, // __builtin_msa_binsli_w
      {Intrinsic::mips_binsr_b, 57070}, // __builtin_msa_binsr_b
      {Intrinsic::mips_binsr_d, 57092}, // __builtin_msa_binsr_d
      {Intrinsic::mips_binsr_h, 57114}, // __builtin_msa_binsr_h
      {Intrinsic::mips_binsr_w, 57136}, // __builtin_msa_binsr_w
      {Intrinsic::mips_binsri_b, 57158}, // __builtin_msa_binsri_b
      {Intrinsic::mips_binsri_d, 57181}, // __builtin_msa_binsri_d
      {Intrinsic::mips_binsri_h, 57204}, // __builtin_msa_binsri_h
      {Intrinsic::mips_binsri_w, 57227}, // __builtin_msa_binsri_w
      {Intrinsic::mips_bmnz_v, 57272}, // __builtin_msa_bmnz_v
      {Intrinsic::mips_bmnzi_b, 57293}, // __builtin_msa_bmnzi_b
      {Intrinsic::mips_bmz_v, 57315}, // __builtin_msa_bmz_v
      {Intrinsic::mips_bmzi_b, 57335}, // __builtin_msa_bmzi_b
      {Intrinsic::mips_bneg_b, 57356}, // __builtin_msa_bneg_b
      {Intrinsic::mips_bneg_d, 57377}, // __builtin_msa_bneg_d
      {Intrinsic::mips_bneg_h, 57398}, // __builtin_msa_bneg_h
      {Intrinsic::mips_bneg_w, 57419}, // __builtin_msa_bneg_w
      {Intrinsic::mips_bnegi_b, 57440}, // __builtin_msa_bnegi_b
      {Intrinsic::mips_bnegi_d, 57462}, // __builtin_msa_bnegi_d
      {Intrinsic::mips_bnegi_h, 57484}, // __builtin_msa_bnegi_h
      {Intrinsic::mips_bnegi_w, 57506}, // __builtin_msa_bnegi_w
      {Intrinsic::mips_bnz_b, 57528}, // __builtin_msa_bnz_b
      {Intrinsic::mips_bnz_d, 57548}, // __builtin_msa_bnz_d
      {Intrinsic::mips_bnz_h, 57568}, // __builtin_msa_bnz_h
      {Intrinsic::mips_bnz_v, 57588}, // __builtin_msa_bnz_v
      {Intrinsic::mips_bnz_w, 57608}, // __builtin_msa_bnz_w
      {Intrinsic::mips_bsel_v, 57652}, // __builtin_msa_bsel_v
      {Intrinsic::mips_bseli_b, 57673}, // __builtin_msa_bseli_b
      {Intrinsic::mips_bset_b, 57695}, // __builtin_msa_bset_b
      {Intrinsic::mips_bset_d, 57716}, // __builtin_msa_bset_d
      {Intrinsic::mips_bset_h, 57737}, // __builtin_msa_bset_h
      {Intrinsic::mips_bset_w, 57758}, // __builtin_msa_bset_w
      {Intrinsic::mips_bseti_b, 57779}, // __builtin_msa_bseti_b
      {Intrinsic::mips_bseti_d, 57801}, // __builtin_msa_bseti_d
      {Intrinsic::mips_bseti_h, 57823}, // __builtin_msa_bseti_h
      {Intrinsic::mips_bseti_w, 57845}, // __builtin_msa_bseti_w
      {Intrinsic::mips_bz_b, 57867}, // __builtin_msa_bz_b
      {Intrinsic::mips_bz_d, 57886}, // __builtin_msa_bz_d
      {Intrinsic::mips_bz_h, 57905}, // __builtin_msa_bz_h
      {Intrinsic::mips_bz_v, 57924}, // __builtin_msa_bz_v
      {Intrinsic::mips_bz_w, 57943}, // __builtin_msa_bz_w
      {Intrinsic::mips_ceq_b, 57962}, // __builtin_msa_ceq_b
      {Intrinsic::mips_ceq_d, 57982}, // __builtin_msa_ceq_d
      {Intrinsic::mips_ceq_h, 58002}, // __builtin_msa_ceq_h
      {Intrinsic::mips_ceq_w, 58022}, // __builtin_msa_ceq_w
      {Intrinsic::mips_ceqi_b, 58042}, // __builtin_msa_ceqi_b
      {Intrinsic::mips_ceqi_d, 58063}, // __builtin_msa_ceqi_d
      {Intrinsic::mips_ceqi_h, 58084}, // __builtin_msa_ceqi_h
      {Intrinsic::mips_ceqi_w, 58105}, // __builtin_msa_ceqi_w
      {Intrinsic::mips_cfcmsa, 58126}, // __builtin_msa_cfcmsa
      {Intrinsic::mips_cle_s_b, 58147}, // __builtin_msa_cle_s_b
      {Intrinsic::mips_cle_s_d, 58169}, // __builtin_msa_cle_s_d
      {Intrinsic::mips_cle_s_h, 58191}, // __builtin_msa_cle_s_h
      {Intrinsic::mips_cle_s_w, 58213}, // __builtin_msa_cle_s_w
      {Intrinsic::mips_cle_u_b, 58235}, // __builtin_msa_cle_u_b
      {Intrinsic::mips_cle_u_d, 58257}, // __builtin_msa_cle_u_d
      {Intrinsic::mips_cle_u_h, 58279}, // __builtin_msa_cle_u_h
      {Intrinsic::mips_cle_u_w, 58301}, // __builtin_msa_cle_u_w
      {Intrinsic::mips_clei_s_b, 58323}, // __builtin_msa_clei_s_b
      {Intrinsic::mips_clei_s_d, 58346}, // __builtin_msa_clei_s_d
      {Intrinsic::mips_clei_s_h, 58369}, // __builtin_msa_clei_s_h
      {Intrinsic::mips_clei_s_w, 58392}, // __builtin_msa_clei_s_w
      {Intrinsic::mips_clei_u_b, 58415}, // __builtin_msa_clei_u_b
      {Intrinsic::mips_clei_u_d, 58438}, // __builtin_msa_clei_u_d
      {Intrinsic::mips_clei_u_h, 58461}, // __builtin_msa_clei_u_h
      {Intrinsic::mips_clei_u_w, 58484}, // __builtin_msa_clei_u_w
      {Intrinsic::mips_clt_s_b, 58507}, // __builtin_msa_clt_s_b
      {Intrinsic::mips_clt_s_d, 58529}, // __builtin_msa_clt_s_d
      {Intrinsic::mips_clt_s_h, 58551}, // __builtin_msa_clt_s_h
      {Intrinsic::mips_clt_s_w, 58573}, // __builtin_msa_clt_s_w
      {Intrinsic::mips_clt_u_b, 58595}, // __builtin_msa_clt_u_b
      {Intrinsic::mips_clt_u_d, 58617}, // __builtin_msa_clt_u_d
      {Intrinsic::mips_clt_u_h, 58639}, // __builtin_msa_clt_u_h
      {Intrinsic::mips_clt_u_w, 58661}, // __builtin_msa_clt_u_w
      {Intrinsic::mips_clti_s_b, 58683}, // __builtin_msa_clti_s_b
      {Intrinsic::mips_clti_s_d, 58706}, // __builtin_msa_clti_s_d
      {Intrinsic::mips_clti_s_h, 58729}, // __builtin_msa_clti_s_h
      {Intrinsic::mips_clti_s_w, 58752}, // __builtin_msa_clti_s_w
      {Intrinsic::mips_clti_u_b, 58775}, // __builtin_msa_clti_u_b
      {Intrinsic::mips_clti_u_d, 58798}, // __builtin_msa_clti_u_d
      {Intrinsic::mips_clti_u_h, 58821}, // __builtin_msa_clti_u_h
      {Intrinsic::mips_clti_u_w, 58844}, // __builtin_msa_clti_u_w
      {Intrinsic::mips_copy_s_b, 59185}, // __builtin_msa_copy_s_b
      {Intrinsic::mips_copy_s_d, 59208}, // __builtin_msa_copy_s_d
      {Intrinsic::mips_copy_s_h, 59231}, // __builtin_msa_copy_s_h
      {Intrinsic::mips_copy_s_w, 59254}, // __builtin_msa_copy_s_w
      {Intrinsic::mips_copy_u_b, 59277}, // __builtin_msa_copy_u_b
      {Intrinsic::mips_copy_u_d, 59300}, // __builtin_msa_copy_u_d
      {Intrinsic::mips_copy_u_h, 59323}, // __builtin_msa_copy_u_h
      {Intrinsic::mips_copy_u_w, 59346}, // __builtin_msa_copy_u_w
      {Intrinsic::mips_ctcmsa, 59369}, // __builtin_msa_ctcmsa
      {Intrinsic::mips_div_s_b, 59390}, // __builtin_msa_div_s_b
      {Intrinsic::mips_div_s_d, 59412}, // __builtin_msa_div_s_d
      {Intrinsic::mips_div_s_h, 59434}, // __builtin_msa_div_s_h
      {Intrinsic::mips_div_s_w, 59456}, // __builtin_msa_div_s_w
      {Intrinsic::mips_div_u_b, 59478}, // __builtin_msa_div_u_b
      {Intrinsic::mips_div_u_d, 59500}, // __builtin_msa_div_u_d
      {Intrinsic::mips_div_u_h, 59522}, // __builtin_msa_div_u_h
      {Intrinsic::mips_div_u_w, 59544}, // __builtin_msa_div_u_w
      {Intrinsic::mips_dotp_s_d, 59586}, // __builtin_msa_dotp_s_d
      {Intrinsic::mips_dotp_s_h, 59609}, // __builtin_msa_dotp_s_h
      {Intrinsic::mips_dotp_s_w, 59632}, // __builtin_msa_dotp_s_w
      {Intrinsic::mips_dotp_u_d, 59655}, // __builtin_msa_dotp_u_d
      {Intrinsic::mips_dotp_u_h, 59678}, // __builtin_msa_dotp_u_h
      {Intrinsic::mips_dotp_u_w, 59701}, // __builtin_msa_dotp_u_w
      {Intrinsic::mips_dpadd_s_d, 59748}, // __builtin_msa_dpadd_s_d
      {Intrinsic::mips_dpadd_s_h, 59772}, // __builtin_msa_dpadd_s_h
      {Intrinsic::mips_dpadd_s_w, 59796}, // __builtin_msa_dpadd_s_w
      {Intrinsic::mips_dpadd_u_d, 59820}, // __builtin_msa_dpadd_u_d
      {Intrinsic::mips_dpadd_u_h, 59844}, // __builtin_msa_dpadd_u_h
      {Intrinsic::mips_dpadd_u_w, 59868}, // __builtin_msa_dpadd_u_w
      {Intrinsic::mips_dpsub_s_d, 60267}, // __builtin_msa_dpsub_s_d
      {Intrinsic::mips_dpsub_s_h, 60291}, // __builtin_msa_dpsub_s_h
      {Intrinsic::mips_dpsub_s_w, 60315}, // __builtin_msa_dpsub_s_w
      {Intrinsic::mips_dpsub_u_d, 60339}, // __builtin_msa_dpsub_u_d
      {Intrinsic::mips_dpsub_u_h, 60363}, // __builtin_msa_dpsub_u_h
      {Intrinsic::mips_dpsub_u_w, 60387}, // __builtin_msa_dpsub_u_w
      {Intrinsic::mips_fadd_d, 60573}, // __builtin_msa_fadd_d
      {Intrinsic::mips_fadd_w, 60594}, // __builtin_msa_fadd_w
      {Intrinsic::mips_fcaf_d, 60615}, // __builtin_msa_fcaf_d
      {Intrinsic::mips_fcaf_w, 60636}, // __builtin_msa_fcaf_w
      {Intrinsic::mips_fceq_d, 60657}, // __builtin_msa_fceq_d
      {Intrinsic::mips_fceq_w, 60678}, // __builtin_msa_fceq_w
      {Intrinsic::mips_fclass_d, 60699}, // __builtin_msa_fclass_d
      {Intrinsic::mips_fclass_w, 60722}, // __builtin_msa_fclass_w
      {Intrinsic::mips_fcle_d, 60745}, // __builtin_msa_fcle_d
      {Intrinsic::mips_fcle_w, 60766}, // __builtin_msa_fcle_w
      {Intrinsic::mips_fclt_d, 60787}, // __builtin_msa_fclt_d
      {Intrinsic::mips_fclt_w, 60808}, // __builtin_msa_fclt_w
      {Intrinsic::mips_fcne_d, 60829}, // __builtin_msa_fcne_d
      {Intrinsic::mips_fcne_w, 60850}, // __builtin_msa_fcne_w
      {Intrinsic::mips_fcor_d, 60871}, // __builtin_msa_fcor_d
      {Intrinsic::mips_fcor_w, 60892}, // __builtin_msa_fcor_w
      {Intrinsic::mips_fcueq_d, 60913}, // __builtin_msa_fcueq_d
      {Intrinsic::mips_fcueq_w, 60935}, // __builtin_msa_fcueq_w
      {Intrinsic::mips_fcule_d, 60957}, // __builtin_msa_fcule_d
      {Intrinsic::mips_fcule_w, 60979}, // __builtin_msa_fcule_w
      {Intrinsic::mips_fcult_d, 61001}, // __builtin_msa_fcult_d
      {Intrinsic::mips_fcult_w, 61023}, // __builtin_msa_fcult_w
      {Intrinsic::mips_fcun_d, 61045}, // __builtin_msa_fcun_d
      {Intrinsic::mips_fcun_w, 61066}, // __builtin_msa_fcun_w
      {Intrinsic::mips_fcune_d, 61087}, // __builtin_msa_fcune_d
      {Intrinsic::mips_fcune_w, 61109}, // __builtin_msa_fcune_w
      {Intrinsic::mips_fdiv_d, 61131}, // __builtin_msa_fdiv_d
      {Intrinsic::mips_fdiv_w, 61152}, // __builtin_msa_fdiv_w
      {Intrinsic::mips_fexdo_h, 61173}, // __builtin_msa_fexdo_h
      {Intrinsic::mips_fexdo_w, 61195}, // __builtin_msa_fexdo_w
      {Intrinsic::mips_fexp2_d, 61217}, // __builtin_msa_fexp2_d
      {Intrinsic::mips_fexp2_w, 61239}, // __builtin_msa_fexp2_w
      {Intrinsic::mips_fexupl_d, 61261}, // __builtin_msa_fexupl_d
      {Intrinsic::mips_fexupl_w, 61284}, // __builtin_msa_fexupl_w
      {Intrinsic::mips_fexupr_d, 61307}, // __builtin_msa_fexupr_d
      {Intrinsic::mips_fexupr_w, 61330}, // __builtin_msa_fexupr_w
      {Intrinsic::mips_ffint_s_d, 61353}, // __builtin_msa_ffint_s_d
      {Intrinsic::mips_ffint_s_w, 61377}, // __builtin_msa_ffint_s_w
      {Intrinsic::mips_ffint_u_d, 61401}, // __builtin_msa_ffint_u_d
      {Intrinsic::mips_ffint_u_w, 61425}, // __builtin_msa_ffint_u_w
      {Intrinsic::mips_ffql_d, 61449}, // __builtin_msa_ffql_d
      {Intrinsic::mips_ffql_w, 61470}, // __builtin_msa_ffql_w
      {Intrinsic::mips_ffqr_d, 61491}, // __builtin_msa_ffqr_d
      {Intrinsic::mips_ffqr_w, 61512}, // __builtin_msa_ffqr_w
      {Intrinsic::mips_fill_b, 61533}, // __builtin_msa_fill_b
      {Intrinsic::mips_fill_d, 61554}, // __builtin_msa_fill_d
      {Intrinsic::mips_fill_h, 61575}, // __builtin_msa_fill_h
      {Intrinsic::mips_fill_w, 61596}, // __builtin_msa_fill_w
      {Intrinsic::mips_flog2_d, 61617}, // __builtin_msa_flog2_d
      {Intrinsic::mips_flog2_w, 61639}, // __builtin_msa_flog2_w
      {Intrinsic::mips_fmadd_d, 61661}, // __builtin_msa_fmadd_d
      {Intrinsic::mips_fmadd_w, 61683}, // __builtin_msa_fmadd_w
      {Intrinsic::mips_fmax_a_d, 61705}, // __builtin_msa_fmax_a_d
      {Intrinsic::mips_fmax_a_w, 61728}, // __builtin_msa_fmax_a_w
      {Intrinsic::mips_fmax_d, 61751}, // __builtin_msa_fmax_d
      {Intrinsic::mips_fmax_w, 61772}, // __builtin_msa_fmax_w
      {Intrinsic::mips_fmin_a_d, 61793}, // __builtin_msa_fmin_a_d
      {Intrinsic::mips_fmin_a_w, 61816}, // __builtin_msa_fmin_a_w
      {Intrinsic::mips_fmin_d, 61839}, // __builtin_msa_fmin_d
      {Intrinsic::mips_fmin_w, 61860}, // __builtin_msa_fmin_w
      {Intrinsic::mips_fmsub_d, 61881}, // __builtin_msa_fmsub_d
      {Intrinsic::mips_fmsub_w, 61903}, // __builtin_msa_fmsub_w
      {Intrinsic::mips_fmul_d, 61925}, // __builtin_msa_fmul_d
      {Intrinsic::mips_fmul_w, 61946}, // __builtin_msa_fmul_w
      {Intrinsic::mips_frcp_d, 61967}, // __builtin_msa_frcp_d
      {Intrinsic::mips_frcp_w, 61988}, // __builtin_msa_frcp_w
      {Intrinsic::mips_frint_d, 62009}, // __builtin_msa_frint_d
      {Intrinsic::mips_frint_w, 62031}, // __builtin_msa_frint_w
      {Intrinsic::mips_frsqrt_d, 62053}, // __builtin_msa_frsqrt_d
      {Intrinsic::mips_frsqrt_w, 62076}, // __builtin_msa_frsqrt_w
      {Intrinsic::mips_fsaf_d, 62099}, // __builtin_msa_fsaf_d
      {Intrinsic::mips_fsaf_w, 62120}, // __builtin_msa_fsaf_w
      {Intrinsic::mips_fseq_d, 62141}, // __builtin_msa_fseq_d
      {Intrinsic::mips_fseq_w, 62162}, // __builtin_msa_fseq_w
      {Intrinsic::mips_fsle_d, 62183}, // __builtin_msa_fsle_d
      {Intrinsic::mips_fsle_w, 62204}, // __builtin_msa_fsle_w
      {Intrinsic::mips_fslt_d, 62225}, // __builtin_msa_fslt_d
      {Intrinsic::mips_fslt_w, 62246}, // __builtin_msa_fslt_w
      {Intrinsic::mips_fsne_d, 62267}, // __builtin_msa_fsne_d
      {Intrinsic::mips_fsne_w, 62288}, // __builtin_msa_fsne_w
      {Intrinsic::mips_fsor_d, 62309}, // __builtin_msa_fsor_d
      {Intrinsic::mips_fsor_w, 62330}, // __builtin_msa_fsor_w
      {Intrinsic::mips_fsqrt_d, 62351}, // __builtin_msa_fsqrt_d
      {Intrinsic::mips_fsqrt_w, 62373}, // __builtin_msa_fsqrt_w
      {Intrinsic::mips_fsub_d, 62395}, // __builtin_msa_fsub_d
      {Intrinsic::mips_fsub_w, 62416}, // __builtin_msa_fsub_w
      {Intrinsic::mips_fsueq_d, 62437}, // __builtin_msa_fsueq_d
      {Intrinsic::mips_fsueq_w, 62459}, // __builtin_msa_fsueq_w
      {Intrinsic::mips_fsule_d, 62481}, // __builtin_msa_fsule_d
      {Intrinsic::mips_fsule_w, 62503}, // __builtin_msa_fsule_w
      {Intrinsic::mips_fsult_d, 62525}, // __builtin_msa_fsult_d
      {Intrinsic::mips_fsult_w, 62547}, // __builtin_msa_fsult_w
      {Intrinsic::mips_fsun_d, 62569}, // __builtin_msa_fsun_d
      {Intrinsic::mips_fsun_w, 62590}, // __builtin_msa_fsun_w
      {Intrinsic::mips_fsune_d, 62611}, // __builtin_msa_fsune_d
      {Intrinsic::mips_fsune_w, 62633}, // __builtin_msa_fsune_w
      {Intrinsic::mips_ftint_s_d, 62655}, // __builtin_msa_ftint_s_d
      {Intrinsic::mips_ftint_s_w, 62679}, // __builtin_msa_ftint_s_w
      {Intrinsic::mips_ftint_u_d, 62703}, // __builtin_msa_ftint_u_d
      {Intrinsic::mips_ftint_u_w, 62727}, // __builtin_msa_ftint_u_w
      {Intrinsic::mips_ftq_h, 62751}, // __builtin_msa_ftq_h
      {Intrinsic::mips_ftq_w, 62771}, // __builtin_msa_ftq_w
      {Intrinsic::mips_ftrunc_s_d, 62791}, // __builtin_msa_ftrunc_s_d
      {Intrinsic::mips_ftrunc_s_w, 62816}, // __builtin_msa_ftrunc_s_w
      {Intrinsic::mips_ftrunc_u_d, 62841}, // __builtin_msa_ftrunc_u_d
      {Intrinsic::mips_ftrunc_u_w, 62866}, // __builtin_msa_ftrunc_u_w
      {Intrinsic::mips_hadd_s_d, 62891}, // __builtin_msa_hadd_s_d
      {Intrinsic::mips_hadd_s_h, 62914}, // __builtin_msa_hadd_s_h
      {Intrinsic::mips_hadd_s_w, 62937}, // __builtin_msa_hadd_s_w
      {Intrinsic::mips_hadd_u_d, 62960}, // __builtin_msa_hadd_u_d
      {Intrinsic::mips_hadd_u_h, 62983}, // __builtin_msa_hadd_u_h
      {Intrinsic::mips_hadd_u_w, 63006}, // __builtin_msa_hadd_u_w
      {Intrinsic::mips_hsub_s_d, 63029}, // __builtin_msa_hsub_s_d
      {Intrinsic::mips_hsub_s_h, 63052}, // __builtin_msa_hsub_s_h
      {Intrinsic::mips_hsub_s_w, 63075}, // __builtin_msa_hsub_s_w
      {Intrinsic::mips_hsub_u_d, 63098}, // __builtin_msa_hsub_u_d
      {Intrinsic::mips_hsub_u_h, 63121}, // __builtin_msa_hsub_u_h
      {Intrinsic::mips_hsub_u_w, 63144}, // __builtin_msa_hsub_u_w
      {Intrinsic::mips_ilvev_b, 63167}, // __builtin_msa_ilvev_b
      {Intrinsic::mips_ilvev_d, 63189}, // __builtin_msa_ilvev_d
      {Intrinsic::mips_ilvev_h, 63211}, // __builtin_msa_ilvev_h
      {Intrinsic::mips_ilvev_w, 63233}, // __builtin_msa_ilvev_w
      {Intrinsic::mips_ilvl_b, 63255}, // __builtin_msa_ilvl_b
      {Intrinsic::mips_ilvl_d, 63276}, // __builtin_msa_ilvl_d
      {Intrinsic::mips_ilvl_h, 63297}, // __builtin_msa_ilvl_h
      {Intrinsic::mips_ilvl_w, 63318}, // __builtin_msa_ilvl_w
      {Intrinsic::mips_ilvod_b, 63339}, // __builtin_msa_ilvod_b
      {Intrinsic::mips_ilvod_d, 63361}, // __builtin_msa_ilvod_d
      {Intrinsic::mips_ilvod_h, 63383}, // __builtin_msa_ilvod_h
      {Intrinsic::mips_ilvod_w, 63405}, // __builtin_msa_ilvod_w
      {Intrinsic::mips_ilvr_b, 63427}, // __builtin_msa_ilvr_b
      {Intrinsic::mips_ilvr_d, 63448}, // __builtin_msa_ilvr_d
      {Intrinsic::mips_ilvr_h, 63469}, // __builtin_msa_ilvr_h
      {Intrinsic::mips_ilvr_w, 63490}, // __builtin_msa_ilvr_w
      {Intrinsic::mips_insert_b, 63511}, // __builtin_msa_insert_b
      {Intrinsic::mips_insert_d, 63534}, // __builtin_msa_insert_d
      {Intrinsic::mips_insert_h, 63557}, // __builtin_msa_insert_h
      {Intrinsic::mips_insert_w, 63580}, // __builtin_msa_insert_w
      {Intrinsic::mips_insve_b, 63623}, // __builtin_msa_insve_b
      {Intrinsic::mips_insve_d, 63645}, // __builtin_msa_insve_d
      {Intrinsic::mips_insve_h, 63667}, // __builtin_msa_insve_h
      {Intrinsic::mips_insve_w, 63689}, // __builtin_msa_insve_w
      {Intrinsic::mips_ld_b, 63731}, // __builtin_msa_ld_b
      {Intrinsic::mips_ld_d, 63750}, // __builtin_msa_ld_d
      {Intrinsic::mips_ld_h, 63769}, // __builtin_msa_ld_h
      {Intrinsic::mips_ld_w, 63788}, // __builtin_msa_ld_w
      {Intrinsic::mips_ldi_b, 63807}, // __builtin_msa_ldi_b
      {Intrinsic::mips_ldi_d, 63827}, // __builtin_msa_ldi_d
      {Intrinsic::mips_ldi_h, 63847}, // __builtin_msa_ldi_h
      {Intrinsic::mips_ldi_w, 63867}, // __builtin_msa_ldi_w
      {Intrinsic::mips_ldr_d, 63887}, // __builtin_msa_ldr_d
      {Intrinsic::mips_ldr_w, 63907}, // __builtin_msa_ldr_w
      {Intrinsic::mips_madd_q_h, 64004}, // __builtin_msa_madd_q_h
      {Intrinsic::mips_madd_q_w, 64027}, // __builtin_msa_madd_q_w
      {Intrinsic::mips_maddr_q_h, 64050}, // __builtin_msa_maddr_q_h
      {Intrinsic::mips_maddr_q_w, 64074}, // __builtin_msa_maddr_q_w
      {Intrinsic::mips_maddv_b, 64119}, // __builtin_msa_maddv_b
      {Intrinsic::mips_maddv_d, 64141}, // __builtin_msa_maddv_d
      {Intrinsic::mips_maddv_h, 64163}, // __builtin_msa_maddv_h
      {Intrinsic::mips_maddv_w, 64185}, // __builtin_msa_maddv_w
      {Intrinsic::mips_max_a_b, 64317}, // __builtin_msa_max_a_b
      {Intrinsic::mips_max_a_d, 64339}, // __builtin_msa_max_a_d
      {Intrinsic::mips_max_a_h, 64361}, // __builtin_msa_max_a_h
      {Intrinsic::mips_max_a_w, 64383}, // __builtin_msa_max_a_w
      {Intrinsic::mips_max_s_b, 64405}, // __builtin_msa_max_s_b
      {Intrinsic::mips_max_s_d, 64427}, // __builtin_msa_max_s_d
      {Intrinsic::mips_max_s_h, 64449}, // __builtin_msa_max_s_h
      {Intrinsic::mips_max_s_w, 64471}, // __builtin_msa_max_s_w
      {Intrinsic::mips_max_u_b, 64493}, // __builtin_msa_max_u_b
      {Intrinsic::mips_max_u_d, 64515}, // __builtin_msa_max_u_d
      {Intrinsic::mips_max_u_h, 64537}, // __builtin_msa_max_u_h
      {Intrinsic::mips_max_u_w, 64559}, // __builtin_msa_max_u_w
      {Intrinsic::mips_maxi_s_b, 64581}, // __builtin_msa_maxi_s_b
      {Intrinsic::mips_maxi_s_d, 64604}, // __builtin_msa_maxi_s_d
      {Intrinsic::mips_maxi_s_h, 64627}, // __builtin_msa_maxi_s_h
      {Intrinsic::mips_maxi_s_w, 64650}, // __builtin_msa_maxi_s_w
      {Intrinsic::mips_maxi_u_b, 64673}, // __builtin_msa_maxi_u_b
      {Intrinsic::mips_maxi_u_d, 64696}, // __builtin_msa_maxi_u_d
      {Intrinsic::mips_maxi_u_h, 64719}, // __builtin_msa_maxi_u_h
      {Intrinsic::mips_maxi_u_w, 64742}, // __builtin_msa_maxi_u_w
      {Intrinsic::mips_min_a_b, 64765}, // __builtin_msa_min_a_b
      {Intrinsic::mips_min_a_d, 64787}, // __builtin_msa_min_a_d
      {Intrinsic::mips_min_a_h, 64809}, // __builtin_msa_min_a_h
      {Intrinsic::mips_min_a_w, 64831}, // __builtin_msa_min_a_w
      {Intrinsic::mips_min_s_b, 64853}, // __builtin_msa_min_s_b
      {Intrinsic::mips_min_s_d, 64875}, // __builtin_msa_min_s_d
      {Intrinsic::mips_min_s_h, 64897}, // __builtin_msa_min_s_h
      {Intrinsic::mips_min_s_w, 64919}, // __builtin_msa_min_s_w
      {Intrinsic::mips_min_u_b, 64941}, // __builtin_msa_min_u_b
      {Intrinsic::mips_min_u_d, 64963}, // __builtin_msa_min_u_d
      {Intrinsic::mips_min_u_h, 64985}, // __builtin_msa_min_u_h
      {Intrinsic::mips_min_u_w, 65007}, // __builtin_msa_min_u_w
      {Intrinsic::mips_mini_s_b, 65029}, // __builtin_msa_mini_s_b
      {Intrinsic::mips_mini_s_d, 65052}, // __builtin_msa_mini_s_d
      {Intrinsic::mips_mini_s_h, 65075}, // __builtin_msa_mini_s_h
      {Intrinsic::mips_mini_s_w, 65098}, // __builtin_msa_mini_s_w
      {Intrinsic::mips_mini_u_b, 65121}, // __builtin_msa_mini_u_b
      {Intrinsic::mips_mini_u_d, 65144}, // __builtin_msa_mini_u_d
      {Intrinsic::mips_mini_u_h, 65167}, // __builtin_msa_mini_u_h
      {Intrinsic::mips_mini_u_w, 65190}, // __builtin_msa_mini_u_w
      {Intrinsic::mips_mod_s_b, 65213}, // __builtin_msa_mod_s_b
      {Intrinsic::mips_mod_s_d, 65235}, // __builtin_msa_mod_s_d
      {Intrinsic::mips_mod_s_h, 65257}, // __builtin_msa_mod_s_h
      {Intrinsic::mips_mod_s_w, 65279}, // __builtin_msa_mod_s_w
      {Intrinsic::mips_mod_u_b, 65301}, // __builtin_msa_mod_u_b
      {Intrinsic::mips_mod_u_d, 65323}, // __builtin_msa_mod_u_d
      {Intrinsic::mips_mod_u_h, 65345}, // __builtin_msa_mod_u_h
      {Intrinsic::mips_mod_u_w, 65367}, // __builtin_msa_mod_u_w
      {Intrinsic::mips_move_v, 65411}, // __builtin_msa_move_v
      {Intrinsic::mips_msub_q_h, 65452}, // __builtin_msa_msub_q_h
      {Intrinsic::mips_msub_q_w, 65475}, // __builtin_msa_msub_q_w
      {Intrinsic::mips_msubr_q_h, 65498}, // __builtin_msa_msubr_q_h
      {Intrinsic::mips_msubr_q_w, 65522}, // __builtin_msa_msubr_q_w
      {Intrinsic::mips_msubv_b, 65567}, // __builtin_msa_msubv_b
      {Intrinsic::mips_msubv_d, 65589}, // __builtin_msa_msubv_d
      {Intrinsic::mips_msubv_h, 65611}, // __builtin_msa_msubv_h
      {Intrinsic::mips_msubv_w, 65633}, // __builtin_msa_msubv_w
      {Intrinsic::mips_mul_q_h, 65699}, // __builtin_msa_mul_q_h
      {Intrinsic::mips_mul_q_w, 65721}, // __builtin_msa_mul_q_w
      {Intrinsic::mips_mulr_q_h, 65985}, // __builtin_msa_mulr_q_h
      {Intrinsic::mips_mulr_q_w, 66008}, // __builtin_msa_mulr_q_w
      {Intrinsic::mips_mulv_b, 66127}, // __builtin_msa_mulv_b
      {Intrinsic::mips_mulv_d, 66148}, // __builtin_msa_mulv_d
      {Intrinsic::mips_mulv_h, 66169}, // __builtin_msa_mulv_h
      {Intrinsic::mips_mulv_w, 66190}, // __builtin_msa_mulv_w
      {Intrinsic::mips_nloc_b, 66211}, // __builtin_msa_nloc_b
      {Intrinsic::mips_nloc_d, 66232}, // __builtin_msa_nloc_d
      {Intrinsic::mips_nloc_h, 66253}, // __builtin_msa_nloc_h
      {Intrinsic::mips_nloc_w, 66274}, // __builtin_msa_nloc_w
      {Intrinsic::mips_nlzc_b, 66295}, // __builtin_msa_nlzc_b
      {Intrinsic::mips_nlzc_d, 66316}, // __builtin_msa_nlzc_d
      {Intrinsic::mips_nlzc_h, 66337}, // __builtin_msa_nlzc_h
      {Intrinsic::mips_nlzc_w, 66358}, // __builtin_msa_nlzc_w
      {Intrinsic::mips_nor_v, 66379}, // __builtin_msa_nor_v
      {Intrinsic::mips_nori_b, 66399}, // __builtin_msa_nori_b
      {Intrinsic::mips_or_v, 66420}, // __builtin_msa_or_v
      {Intrinsic::mips_ori_b, 66439}, // __builtin_msa_ori_b
      {Intrinsic::mips_pckev_b, 66484}, // __builtin_msa_pckev_b
      {Intrinsic::mips_pckev_d, 66506}, // __builtin_msa_pckev_d
      {Intrinsic::mips_pckev_h, 66528}, // __builtin_msa_pckev_h
      {Intrinsic::mips_pckev_w, 66550}, // __builtin_msa_pckev_w
      {Intrinsic::mips_pckod_b, 66572}, // __builtin_msa_pckod_b
      {Intrinsic::mips_pckod_d, 66594}, // __builtin_msa_pckod_d
      {Intrinsic::mips_pckod_h, 66616}, // __builtin_msa_pckod_h
      {Intrinsic::mips_pckod_w, 66638}, // __builtin_msa_pckod_w
      {Intrinsic::mips_pcnt_b, 66660}, // __builtin_msa_pcnt_b
      {Intrinsic::mips_pcnt_d, 66681}, // __builtin_msa_pcnt_d
      {Intrinsic::mips_pcnt_h, 66702}, // __builtin_msa_pcnt_h
      {Intrinsic::mips_pcnt_w, 66723}, // __builtin_msa_pcnt_w
      {Intrinsic::mips_sat_s_b, 67407}, // __builtin_msa_sat_s_b
      {Intrinsic::mips_sat_s_d, 67429}, // __builtin_msa_sat_s_d
      {Intrinsic::mips_sat_s_h, 67451}, // __builtin_msa_sat_s_h
      {Intrinsic::mips_sat_s_w, 67473}, // __builtin_msa_sat_s_w
      {Intrinsic::mips_sat_u_b, 67495}, // __builtin_msa_sat_u_b
      {Intrinsic::mips_sat_u_d, 67517}, // __builtin_msa_sat_u_d
      {Intrinsic::mips_sat_u_h, 67539}, // __builtin_msa_sat_u_h
      {Intrinsic::mips_sat_u_w, 67561}, // __builtin_msa_sat_u_w
      {Intrinsic::mips_shf_b, 67583}, // __builtin_msa_shf_b
      {Intrinsic::mips_shf_h, 67603}, // __builtin_msa_shf_h
      {Intrinsic::mips_shf_w, 67623}, // __builtin_msa_shf_w
      {Intrinsic::mips_sld_b, 67925}, // __builtin_msa_sld_b
      {Intrinsic::mips_sld_d, 67945}, // __builtin_msa_sld_d
      {Intrinsic::mips_sld_h, 67965}, // __builtin_msa_sld_h
      {Intrinsic::mips_sld_w, 67985}, // __builtin_msa_sld_w
      {Intrinsic::mips_sldi_b, 68005}, // __builtin_msa_sldi_b
      {Intrinsic::mips_sldi_d, 68026}, // __builtin_msa_sldi_d
      {Intrinsic::mips_sldi_h, 68047}, // __builtin_msa_sldi_h
      {Intrinsic::mips_sldi_w, 68068}, // __builtin_msa_sldi_w
      {Intrinsic::mips_sll_b, 68089}, // __builtin_msa_sll_b
      {Intrinsic::mips_sll_d, 68109}, // __builtin_msa_sll_d
      {Intrinsic::mips_sll_h, 68129}, // __builtin_msa_sll_h
      {Intrinsic::mips_sll_w, 68149}, // __builtin_msa_sll_w
      {Intrinsic::mips_slli_b, 68169}, // __builtin_msa_slli_b
      {Intrinsic::mips_slli_d, 68190}, // __builtin_msa_slli_d
      {Intrinsic::mips_slli_h, 68211}, // __builtin_msa_slli_h
      {Intrinsic::mips_slli_w, 68232}, // __builtin_msa_slli_w
      {Intrinsic::mips_splat_b, 68253}, // __builtin_msa_splat_b
      {Intrinsic::mips_splat_d, 68275}, // __builtin_msa_splat_d
      {Intrinsic::mips_splat_h, 68297}, // __builtin_msa_splat_h
      {Intrinsic::mips_splat_w, 68319}, // __builtin_msa_splat_w
      {Intrinsic::mips_splati_b, 68341}, // __builtin_msa_splati_b
      {Intrinsic::mips_splati_d, 68364}, // __builtin_msa_splati_d
      {Intrinsic::mips_splati_h, 68387}, // __builtin_msa_splati_h
      {Intrinsic::mips_splati_w, 68410}, // __builtin_msa_splati_w
      {Intrinsic::mips_sra_b, 68433}, // __builtin_msa_sra_b
      {Intrinsic::mips_sra_d, 68453}, // __builtin_msa_sra_d
      {Intrinsic::mips_sra_h, 68473}, // __builtin_msa_sra_h
      {Intrinsic::mips_sra_w, 68493}, // __builtin_msa_sra_w
      {Intrinsic::mips_srai_b, 68513}, // __builtin_msa_srai_b
      {Intrinsic::mips_srai_d, 68534}, // __builtin_msa_srai_d
      {Intrinsic::mips_srai_h, 68555}, // __builtin_msa_srai_h
      {Intrinsic::mips_srai_w, 68576}, // __builtin_msa_srai_w
      {Intrinsic::mips_srar_b, 68597}, // __builtin_msa_srar_b
      {Intrinsic::mips_srar_d, 68618}, // __builtin_msa_srar_d
      {Intrinsic::mips_srar_h, 68639}, // __builtin_msa_srar_h
      {Intrinsic::mips_srar_w, 68660}, // __builtin_msa_srar_w
      {Intrinsic::mips_srari_b, 68681}, // __builtin_msa_srari_b
      {Intrinsic::mips_srari_d, 68703}, // __builtin_msa_srari_d
      {Intrinsic::mips_srari_h, 68725}, // __builtin_msa_srari_h
      {Intrinsic::mips_srari_w, 68747}, // __builtin_msa_srari_w
      {Intrinsic::mips_srl_b, 68769}, // __builtin_msa_srl_b
      {Intrinsic::mips_srl_d, 68789}, // __builtin_msa_srl_d
      {Intrinsic::mips_srl_h, 68809}, // __builtin_msa_srl_h
      {Intrinsic::mips_srl_w, 68829}, // __builtin_msa_srl_w
      {Intrinsic::mips_srli_b, 68849}, // __builtin_msa_srli_b
      {Intrinsic::mips_srli_d, 68870}, // __builtin_msa_srli_d
      {Intrinsic::mips_srli_h, 68891}, // __builtin_msa_srli_h
      {Intrinsic::mips_srli_w, 68912}, // __builtin_msa_srli_w
      {Intrinsic::mips_srlr_b, 68933}, // __builtin_msa_srlr_b
      {Intrinsic::mips_srlr_d, 68954}, // __builtin_msa_srlr_d
      {Intrinsic::mips_srlr_h, 68975}, // __builtin_msa_srlr_h
      {Intrinsic::mips_srlr_w, 68996}, // __builtin_msa_srlr_w
      {Intrinsic::mips_srlri_b, 69017}, // __builtin_msa_srlri_b
      {Intrinsic::mips_srlri_d, 69039}, // __builtin_msa_srlri_d
      {Intrinsic::mips_srlri_h, 69061}, // __builtin_msa_srlri_h
      {Intrinsic::mips_srlri_w, 69083}, // __builtin_msa_srlri_w
      {Intrinsic::mips_st_b, 69105}, // __builtin_msa_st_b
      {Intrinsic::mips_st_d, 69124}, // __builtin_msa_st_d
      {Intrinsic::mips_st_h, 69143}, // __builtin_msa_st_h
      {Intrinsic::mips_st_w, 69162}, // __builtin_msa_st_w
      {Intrinsic::mips_str_d, 69181}, // __builtin_msa_str_d
      {Intrinsic::mips_str_w, 69201}, // __builtin_msa_str_w
      {Intrinsic::mips_subs_s_b, 69391}, // __builtin_msa_subs_s_b
      {Intrinsic::mips_subs_s_d, 69414}, // __builtin_msa_subs_s_d
      {Intrinsic::mips_subs_s_h, 69437}, // __builtin_msa_subs_s_h
      {Intrinsic::mips_subs_s_w, 69460}, // __builtin_msa_subs_s_w
      {Intrinsic::mips_subs_u_b, 69483}, // __builtin_msa_subs_u_b
      {Intrinsic::mips_subs_u_d, 69506}, // __builtin_msa_subs_u_d
      {Intrinsic::mips_subs_u_h, 69529}, // __builtin_msa_subs_u_h
      {Intrinsic::mips_subs_u_w, 69552}, // __builtin_msa_subs_u_w
      {Intrinsic::mips_subsus_u_b, 69575}, // __builtin_msa_subsus_u_b
      {Intrinsic::mips_subsus_u_d, 69600}, // __builtin_msa_subsus_u_d
      {Intrinsic::mips_subsus_u_h, 69625}, // __builtin_msa_subsus_u_h
      {Intrinsic::mips_subsus_u_w, 69650}, // __builtin_msa_subsus_u_w
      {Intrinsic::mips_subsuu_s_b, 69675}, // __builtin_msa_subsuu_s_b
      {Intrinsic::mips_subsuu_s_d, 69700}, // __builtin_msa_subsuu_s_d
      {Intrinsic::mips_subsuu_s_h, 69725}, // __builtin_msa_subsuu_s_h
      {Intrinsic::mips_subsuu_s_w, 69750}, // __builtin_msa_subsuu_s_w
      {Intrinsic::mips_subv_b, 69921}, // __builtin_msa_subv_b
      {Intrinsic::mips_subv_d, 69942}, // __builtin_msa_subv_d
      {Intrinsic::mips_subv_h, 69963}, // __builtin_msa_subv_h
      {Intrinsic::mips_subv_w, 69984}, // __builtin_msa_subv_w
      {Intrinsic::mips_subvi_b, 70005}, // __builtin_msa_subvi_b
      {Intrinsic::mips_subvi_d, 70027}, // __builtin_msa_subvi_d
      {Intrinsic::mips_subvi_h, 70049}, // __builtin_msa_subvi_h
      {Intrinsic::mips_subvi_w, 70071}, // __builtin_msa_subvi_w
      {Intrinsic::mips_vshf_b, 70093}, // __builtin_msa_vshf_b
      {Intrinsic::mips_vshf_d, 70114}, // __builtin_msa_vshf_d
      {Intrinsic::mips_vshf_h, 70135}, // __builtin_msa_vshf_h
      {Intrinsic::mips_vshf_w, 70156}, // __builtin_msa_vshf_w
      {Intrinsic::mips_xor_v, 70198}, // __builtin_msa_xor_v
      {Intrinsic::mips_xori_b, 70218}, // __builtin_msa_xori_b
    };
    auto I = std::lower_bound(std::begin(mipsNames),
                              std::end(mipsNames),
                              BuiltinNameStr);
    if (I != std::end(mipsNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "nvvm") {
    static const BuiltinEntry nvvmNames[] = {
      {Intrinsic::nvvm_add_rm_d, 70239}, // __nvvm_add_rm_d
      {Intrinsic::nvvm_add_rm_f, 70255}, // __nvvm_add_rm_f
      {Intrinsic::nvvm_add_rm_ftz_f, 70271}, // __nvvm_add_rm_ftz_f
      {Intrinsic::nvvm_add_rn_d, 70291}, // __nvvm_add_rn_d
      {Intrinsic::nvvm_add_rn_f, 70307}, // __nvvm_add_rn_f
      {Intrinsic::nvvm_add_rn_ftz_f, 70323}, // __nvvm_add_rn_ftz_f
      {Intrinsic::nvvm_add_rp_d, 70343}, // __nvvm_add_rp_d
      {Intrinsic::nvvm_add_rp_f, 70359}, // __nvvm_add_rp_f
      {Intrinsic::nvvm_add_rp_ftz_f, 70375}, // __nvvm_add_rp_ftz_f
      {Intrinsic::nvvm_add_rz_d, 70395}, // __nvvm_add_rz_d
      {Intrinsic::nvvm_add_rz_f, 70411}, // __nvvm_add_rz_f
      {Intrinsic::nvvm_add_rz_ftz_f, 70427}, // __nvvm_add_rz_ftz_f
      {Intrinsic::nvvm_barrier, 70484}, // __nvvm_bar
      {Intrinsic::nvvm_barrier0_and, 70566}, // __nvvm_bar0_and
      {Intrinsic::nvvm_barrier0_or, 70582}, // __nvvm_bar0_or
      {Intrinsic::nvvm_barrier0_popc, 70597}, // __nvvm_bar0_popc
      {Intrinsic::nvvm_barrier_n, 70495}, // __nvvm_bar_n
      {Intrinsic::nvvm_bar_sync, 70447}, // __nvvm_bar_sync
      {Intrinsic::nvvm_bar_warp_sync, 70463}, // __nvvm_bar_warp_sync
      {Intrinsic::nvvm_barrier_sync, 70508}, // __nvvm_barrier_sync
      {Intrinsic::nvvm_barrier_sync_cnt, 70528}, // __nvvm_barrier_sync_cnt
      {Intrinsic::nvvm_bitcast_d2ll, 70614}, // __nvvm_bitcast_d2ll
      {Intrinsic::nvvm_bitcast_f2i, 70634}, // __nvvm_bitcast_f2i
      {Intrinsic::nvvm_bitcast_i2f, 70653}, // __nvvm_bitcast_i2f
      {Intrinsic::nvvm_bitcast_ll2d, 70672}, // __nvvm_bitcast_ll2d
      {Intrinsic::nvvm_ceil_d, 70692}, // __nvvm_ceil_d
      {Intrinsic::nvvm_ceil_f, 70706}, // __nvvm_ceil_f
      {Intrinsic::nvvm_ceil_ftz_f, 70720}, // __nvvm_ceil_ftz_f
      {Intrinsic::nvvm_cos_approx_f, 70738}, // __nvvm_cos_approx_f
      {Intrinsic::nvvm_cos_approx_ftz_f, 70758}, // __nvvm_cos_approx_ftz_f
      {Intrinsic::nvvm_d2f_rm, 70782}, // __nvvm_d2f_rm
      {Intrinsic::nvvm_d2f_rm_ftz, 70796}, // __nvvm_d2f_rm_ftz
      {Intrinsic::nvvm_d2f_rn, 70814}, // __nvvm_d2f_rn
      {Intrinsic::nvvm_d2f_rn_ftz, 70828}, // __nvvm_d2f_rn_ftz
      {Intrinsic::nvvm_d2f_rp, 70846}, // __nvvm_d2f_rp
      {Intrinsic::nvvm_d2f_rp_ftz, 70860}, // __nvvm_d2f_rp_ftz
      {Intrinsic::nvvm_d2f_rz, 70878}, // __nvvm_d2f_rz
      {Intrinsic::nvvm_d2f_rz_ftz, 70892}, // __nvvm_d2f_rz_ftz
      {Intrinsic::nvvm_d2i_hi, 70910}, // __nvvm_d2i_hi
      {Intrinsic::nvvm_d2i_lo, 70924}, // __nvvm_d2i_lo
      {Intrinsic::nvvm_d2i_rm, 70938}, // __nvvm_d2i_rm
      {Intrinsic::nvvm_d2i_rn, 70952}, // __nvvm_d2i_rn
      {Intrinsic::nvvm_d2i_rp, 70966}, // __nvvm_d2i_rp
      {Intrinsic::nvvm_d2i_rz, 70980}, // __nvvm_d2i_rz
      {Intrinsic::nvvm_d2ll_rm, 70994}, // __nvvm_d2ll_rm
      {Intrinsic::nvvm_d2ll_rn, 71009}, // __nvvm_d2ll_rn
      {Intrinsic::nvvm_d2ll_rp, 71024}, // __nvvm_d2ll_rp
      {Intrinsic::nvvm_d2ll_rz, 71039}, // __nvvm_d2ll_rz
      {Intrinsic::nvvm_d2ui_rm, 71054}, // __nvvm_d2ui_rm
      {Intrinsic::nvvm_d2ui_rn, 71069}, // __nvvm_d2ui_rn
      {Intrinsic::nvvm_d2ui_rp, 71084}, // __nvvm_d2ui_rp
      {Intrinsic::nvvm_d2ui_rz, 71099}, // __nvvm_d2ui_rz
      {Intrinsic::nvvm_d2ull_rm, 71114}, // __nvvm_d2ull_rm
      {Intrinsic::nvvm_d2ull_rn, 71130}, // __nvvm_d2ull_rn
      {Intrinsic::nvvm_d2ull_rp, 71146}, // __nvvm_d2ull_rp
      {Intrinsic::nvvm_d2ull_rz, 71162}, // __nvvm_d2ull_rz
      {Intrinsic::nvvm_div_approx_f, 71178}, // __nvvm_div_approx_f
      {Intrinsic::nvvm_div_approx_ftz_f, 71198}, // __nvvm_div_approx_ftz_f
      {Intrinsic::nvvm_div_rm_d, 71222}, // __nvvm_div_rm_d
      {Intrinsic::nvvm_div_rm_f, 71238}, // __nvvm_div_rm_f
      {Intrinsic::nvvm_div_rm_ftz_f, 71254}, // __nvvm_div_rm_ftz_f
      {Intrinsic::nvvm_div_rn_d, 71274}, // __nvvm_div_rn_d
      {Intrinsic::nvvm_div_rn_f, 71290}, // __nvvm_div_rn_f
      {Intrinsic::nvvm_div_rn_ftz_f, 71306}, // __nvvm_div_rn_ftz_f
      {Intrinsic::nvvm_div_rp_d, 71326}, // __nvvm_div_rp_d
      {Intrinsic::nvvm_div_rp_f, 71342}, // __nvvm_div_rp_f
      {Intrinsic::nvvm_div_rp_ftz_f, 71358}, // __nvvm_div_rp_ftz_f
      {Intrinsic::nvvm_div_rz_d, 71378}, // __nvvm_div_rz_d
      {Intrinsic::nvvm_div_rz_f, 71394}, // __nvvm_div_rz_f
      {Intrinsic::nvvm_div_rz_ftz_f, 71410}, // __nvvm_div_rz_ftz_f
      {Intrinsic::nvvm_ex2_approx_d, 71430}, // __nvvm_ex2_approx_d
      {Intrinsic::nvvm_ex2_approx_f, 71450}, // __nvvm_ex2_approx_f
      {Intrinsic::nvvm_ex2_approx_ftz_f, 71470}, // __nvvm_ex2_approx_ftz_f
      {Intrinsic::nvvm_f2h_rn, 71494}, // __nvvm_f2h_rn
      {Intrinsic::nvvm_f2h_rn_ftz, 71508}, // __nvvm_f2h_rn_ftz
      {Intrinsic::nvvm_f2i_rm, 71526}, // __nvvm_f2i_rm
      {Intrinsic::nvvm_f2i_rm_ftz, 71540}, // __nvvm_f2i_rm_ftz
      {Intrinsic::nvvm_f2i_rn, 71558}, // __nvvm_f2i_rn
      {Intrinsic::nvvm_f2i_rn_ftz, 71572}, // __nvvm_f2i_rn_ftz
      {Intrinsic::nvvm_f2i_rp, 71590}, // __nvvm_f2i_rp
      {Intrinsic::nvvm_f2i_rp_ftz, 71604}, // __nvvm_f2i_rp_ftz
      {Intrinsic::nvvm_f2i_rz, 71622}, // __nvvm_f2i_rz
      {Intrinsic::nvvm_f2i_rz_ftz, 71636}, // __nvvm_f2i_rz_ftz
      {Intrinsic::nvvm_f2ll_rm, 71654}, // __nvvm_f2ll_rm
      {Intrinsic::nvvm_f2ll_rm_ftz, 71669}, // __nvvm_f2ll_rm_ftz
      {Intrinsic::nvvm_f2ll_rn, 71688}, // __nvvm_f2ll_rn
      {Intrinsic::nvvm_f2ll_rn_ftz, 71703}, // __nvvm_f2ll_rn_ftz
      {Intrinsic::nvvm_f2ll_rp, 71722}, // __nvvm_f2ll_rp
      {Intrinsic::nvvm_f2ll_rp_ftz, 71737}, // __nvvm_f2ll_rp_ftz
      {Intrinsic::nvvm_f2ll_rz, 71756}, // __nvvm_f2ll_rz
      {Intrinsic::nvvm_f2ll_rz_ftz, 71771}, // __nvvm_f2ll_rz_ftz
      {Intrinsic::nvvm_f2ui_rm, 71790}, // __nvvm_f2ui_rm
      {Intrinsic::nvvm_f2ui_rm_ftz, 71805}, // __nvvm_f2ui_rm_ftz
      {Intrinsic::nvvm_f2ui_rn, 71824}, // __nvvm_f2ui_rn
      {Intrinsic::nvvm_f2ui_rn_ftz, 71839}, // __nvvm_f2ui_rn_ftz
      {Intrinsic::nvvm_f2ui_rp, 71858}, // __nvvm_f2ui_rp
      {Intrinsic::nvvm_f2ui_rp_ftz, 71873}, // __nvvm_f2ui_rp_ftz
      {Intrinsic::nvvm_f2ui_rz, 71892}, // __nvvm_f2ui_rz
      {Intrinsic::nvvm_f2ui_rz_ftz, 71907}, // __nvvm_f2ui_rz_ftz
      {Intrinsic::nvvm_f2ull_rm, 71926}, // __nvvm_f2ull_rm
      {Intrinsic::nvvm_f2ull_rm_ftz, 71942}, // __nvvm_f2ull_rm_ftz
      {Intrinsic::nvvm_f2ull_rn, 71962}, // __nvvm_f2ull_rn
      {Intrinsic::nvvm_f2ull_rn_ftz, 71978}, // __nvvm_f2ull_rn_ftz
      {Intrinsic::nvvm_f2ull_rp, 71998}, // __nvvm_f2ull_rp
      {Intrinsic::nvvm_f2ull_rp_ftz, 72014}, // __nvvm_f2ull_rp_ftz
      {Intrinsic::nvvm_f2ull_rz, 72034}, // __nvvm_f2ull_rz
      {Intrinsic::nvvm_f2ull_rz_ftz, 72050}, // __nvvm_f2ull_rz_ftz
      {Intrinsic::nvvm_fabs_d, 72070}, // __nvvm_fabs_d
      {Intrinsic::nvvm_fabs_f, 72084}, // __nvvm_fabs_f
      {Intrinsic::nvvm_fabs_ftz_f, 72098}, // __nvvm_fabs_ftz_f
      {Intrinsic::nvvm_floor_d, 72116}, // __nvvm_floor_d
      {Intrinsic::nvvm_floor_f, 72131}, // __nvvm_floor_f
      {Intrinsic::nvvm_floor_ftz_f, 72146}, // __nvvm_floor_ftz_f
      {Intrinsic::nvvm_fma_rm_d, 72165}, // __nvvm_fma_rm_d
      {Intrinsic::nvvm_fma_rm_f, 72181}, // __nvvm_fma_rm_f
      {Intrinsic::nvvm_fma_rm_ftz_f, 72197}, // __nvvm_fma_rm_ftz_f
      {Intrinsic::nvvm_fma_rn_d, 72217}, // __nvvm_fma_rn_d
      {Intrinsic::nvvm_fma_rn_f, 72233}, // __nvvm_fma_rn_f
      {Intrinsic::nvvm_fma_rn_ftz_f, 72249}, // __nvvm_fma_rn_ftz_f
      {Intrinsic::nvvm_fma_rp_d, 72269}, // __nvvm_fma_rp_d
      {Intrinsic::nvvm_fma_rp_f, 72285}, // __nvvm_fma_rp_f
      {Intrinsic::nvvm_fma_rp_ftz_f, 72301}, // __nvvm_fma_rp_ftz_f
      {Intrinsic::nvvm_fma_rz_d, 72321}, // __nvvm_fma_rz_d
      {Intrinsic::nvvm_fma_rz_f, 72337}, // __nvvm_fma_rz_f
      {Intrinsic::nvvm_fma_rz_ftz_f, 72353}, // __nvvm_fma_rz_ftz_f
      {Intrinsic::nvvm_fmax_d, 72373}, // __nvvm_fmax_d
      {Intrinsic::nvvm_fmax_f, 72387}, // __nvvm_fmax_f
      {Intrinsic::nvvm_fmax_ftz_f, 72401}, // __nvvm_fmax_ftz_f
      {Intrinsic::nvvm_fmin_d, 72419}, // __nvvm_fmin_d
      {Intrinsic::nvvm_fmin_f, 72433}, // __nvvm_fmin_f
      {Intrinsic::nvvm_fmin_ftz_f, 72447}, // __nvvm_fmin_ftz_f
      {Intrinsic::nvvm_fns, 72465}, // __nvvm_fns
      {Intrinsic::nvvm_i2d_rm, 72476}, // __nvvm_i2d_rm
      {Intrinsic::nvvm_i2d_rn, 72490}, // __nvvm_i2d_rn
      {Intrinsic::nvvm_i2d_rp, 72504}, // __nvvm_i2d_rp
      {Intrinsic::nvvm_i2d_rz, 72518}, // __nvvm_i2d_rz
      {Intrinsic::nvvm_i2f_rm, 72532}, // __nvvm_i2f_rm
      {Intrinsic::nvvm_i2f_rn, 72546}, // __nvvm_i2f_rn
      {Intrinsic::nvvm_i2f_rp, 72560}, // __nvvm_i2f_rp
      {Intrinsic::nvvm_i2f_rz, 72574}, // __nvvm_i2f_rz
      {Intrinsic::nvvm_isspacep_const, 72588}, // __nvvm_isspacep_const
      {Intrinsic::nvvm_isspacep_global, 72610}, // __nvvm_isspacep_global
      {Intrinsic::nvvm_isspacep_local, 72633}, // __nvvm_isspacep_local
      {Intrinsic::nvvm_isspacep_shared, 72655}, // __nvvm_isspacep_shared
      {Intrinsic::nvvm_istypep_sampler, 72678}, // __nvvm_istypep_sampler
      {Intrinsic::nvvm_istypep_surface, 72701}, // __nvvm_istypep_surface
      {Intrinsic::nvvm_istypep_texture, 72724}, // __nvvm_istypep_texture
      {Intrinsic::nvvm_lg2_approx_d, 72747}, // __nvvm_lg2_approx_d
      {Intrinsic::nvvm_lg2_approx_f, 72767}, // __nvvm_lg2_approx_f
      {Intrinsic::nvvm_lg2_approx_ftz_f, 72787}, // __nvvm_lg2_approx_ftz_f
      {Intrinsic::nvvm_ll2d_rm, 72811}, // __nvvm_ll2d_rm
      {Intrinsic::nvvm_ll2d_rn, 72826}, // __nvvm_ll2d_rn
      {Intrinsic::nvvm_ll2d_rp, 72841}, // __nvvm_ll2d_rp
      {Intrinsic::nvvm_ll2d_rz, 72856}, // __nvvm_ll2d_rz
      {Intrinsic::nvvm_ll2f_rm, 72871}, // __nvvm_ll2f_rm
      {Intrinsic::nvvm_ll2f_rn, 72886}, // __nvvm_ll2f_rn
      {Intrinsic::nvvm_ll2f_rp, 72901}, // __nvvm_ll2f_rp
      {Intrinsic::nvvm_ll2f_rz, 72916}, // __nvvm_ll2f_rz
      {Intrinsic::nvvm_lohi_i2d, 72931}, // __nvvm_lohi_i2d
      {Intrinsic::nvvm_match_any_sync_i32, 72947}, // __nvvm_match_any_sync_i32
      {Intrinsic::nvvm_match_any_sync_i64, 72973}, // __nvvm_match_any_sync_i64
      {Intrinsic::nvvm_membar_cta, 72999}, // __nvvm_membar_cta
      {Intrinsic::nvvm_membar_gl, 73017}, // __nvvm_membar_gl
      {Intrinsic::nvvm_membar_sys, 73034}, // __nvvm_membar_sys
      {Intrinsic::nvvm_mul24_i, 73260}, // __nvvm_mul24_i
      {Intrinsic::nvvm_mul24_ui, 73275}, // __nvvm_mul24_ui
      {Intrinsic::nvvm_mul_rm_d, 73052}, // __nvvm_mul_rm_d
      {Intrinsic::nvvm_mul_rm_f, 73068}, // __nvvm_mul_rm_f
      {Intrinsic::nvvm_mul_rm_ftz_f, 73084}, // __nvvm_mul_rm_ftz_f
      {Intrinsic::nvvm_mul_rn_d, 73104}, // __nvvm_mul_rn_d
      {Intrinsic::nvvm_mul_rn_f, 73120}, // __nvvm_mul_rn_f
      {Intrinsic::nvvm_mul_rn_ftz_f, 73136}, // __nvvm_mul_rn_ftz_f
      {Intrinsic::nvvm_mul_rp_d, 73156}, // __nvvm_mul_rp_d
      {Intrinsic::nvvm_mul_rp_f, 73172}, // __nvvm_mul_rp_f
      {Intrinsic::nvvm_mul_rp_ftz_f, 73188}, // __nvvm_mul_rp_ftz_f
      {Intrinsic::nvvm_mul_rz_d, 73208}, // __nvvm_mul_rz_d
      {Intrinsic::nvvm_mul_rz_f, 73224}, // __nvvm_mul_rz_f
      {Intrinsic::nvvm_mul_rz_ftz_f, 73240}, // __nvvm_mul_rz_ftz_f
      {Intrinsic::nvvm_mulhi_i, 73291}, // __nvvm_mulhi_i
      {Intrinsic::nvvm_mulhi_ll, 73306}, // __nvvm_mulhi_ll
      {Intrinsic::nvvm_mulhi_ui, 73322}, // __nvvm_mulhi_ui
      {Intrinsic::nvvm_mulhi_ull, 73338}, // __nvvm_mulhi_ull
      {Intrinsic::nvvm_prmt, 73355}, // __nvvm_prmt
      {Intrinsic::nvvm_rcp_approx_ftz_d, 73367}, // __nvvm_rcp_approx_ftz_d
      {Intrinsic::nvvm_rcp_rm_d, 73391}, // __nvvm_rcp_rm_d
      {Intrinsic::nvvm_rcp_rm_f, 73407}, // __nvvm_rcp_rm_f
      {Intrinsic::nvvm_rcp_rm_ftz_f, 73423}, // __nvvm_rcp_rm_ftz_f
      {Intrinsic::nvvm_rcp_rn_d, 73443}, // __nvvm_rcp_rn_d
      {Intrinsic::nvvm_rcp_rn_f, 73459}, // __nvvm_rcp_rn_f
      {Intrinsic::nvvm_rcp_rn_ftz_f, 73475}, // __nvvm_rcp_rn_ftz_f
      {Intrinsic::nvvm_rcp_rp_d, 73495}, // __nvvm_rcp_rp_d
      {Intrinsic::nvvm_rcp_rp_f, 73511}, // __nvvm_rcp_rp_f
      {Intrinsic::nvvm_rcp_rp_ftz_f, 73527}, // __nvvm_rcp_rp_ftz_f
      {Intrinsic::nvvm_rcp_rz_d, 73547}, // __nvvm_rcp_rz_d
      {Intrinsic::nvvm_rcp_rz_f, 73563}, // __nvvm_rcp_rz_f
      {Intrinsic::nvvm_rcp_rz_ftz_f, 73579}, // __nvvm_rcp_rz_ftz_f
      {Intrinsic::nvvm_read_ptx_sreg_clock, 73599}, // __nvvm_read_ptx_sreg_clock
      {Intrinsic::nvvm_read_ptx_sreg_clock64, 73626}, // __nvvm_read_ptx_sreg_clock64
      {Intrinsic::nvvm_read_ptx_sreg_ctaid_w, 73655}, // __nvvm_read_ptx_sreg_ctaid_w
      {Intrinsic::nvvm_read_ptx_sreg_ctaid_x, 73684}, // __nvvm_read_ptx_sreg_ctaid_x
      {Intrinsic::nvvm_read_ptx_sreg_ctaid_y, 73713}, // __nvvm_read_ptx_sreg_ctaid_y
      {Intrinsic::nvvm_read_ptx_sreg_ctaid_z, 73742}, // __nvvm_read_ptx_sreg_ctaid_z
      {Intrinsic::nvvm_read_ptx_sreg_envreg0, 73771}, // __nvvm_read_ptx_sreg_envreg0
      {Intrinsic::nvvm_read_ptx_sreg_envreg1, 73800}, // __nvvm_read_ptx_sreg_envreg1
      {Intrinsic::nvvm_read_ptx_sreg_envreg10, 73829}, // __nvvm_read_ptx_sreg_envreg10
      {Intrinsic::nvvm_read_ptx_sreg_envreg11, 73859}, // __nvvm_read_ptx_sreg_envreg11
      {Intrinsic::nvvm_read_ptx_sreg_envreg12, 73889}, // __nvvm_read_ptx_sreg_envreg12
      {Intrinsic::nvvm_read_ptx_sreg_envreg13, 73919}, // __nvvm_read_ptx_sreg_envreg13
      {Intrinsic::nvvm_read_ptx_sreg_envreg14, 73949}, // __nvvm_read_ptx_sreg_envreg14
      {Intrinsic::nvvm_read_ptx_sreg_envreg15, 73979}, // __nvvm_read_ptx_sreg_envreg15
      {Intrinsic::nvvm_read_ptx_sreg_envreg16, 74009}, // __nvvm_read_ptx_sreg_envreg16
      {Intrinsic::nvvm_read_ptx_sreg_envreg17, 74039}, // __nvvm_read_ptx_sreg_envreg17
      {Intrinsic::nvvm_read_ptx_sreg_envreg18, 74069}, // __nvvm_read_ptx_sreg_envreg18
      {Intrinsic::nvvm_read_ptx_sreg_envreg19, 74099}, // __nvvm_read_ptx_sreg_envreg19
      {Intrinsic::nvvm_read_ptx_sreg_envreg2, 74129}, // __nvvm_read_ptx_sreg_envreg2
      {Intrinsic::nvvm_read_ptx_sreg_envreg20, 74158}, // __nvvm_read_ptx_sreg_envreg20
      {Intrinsic::nvvm_read_ptx_sreg_envreg21, 74188}, // __nvvm_read_ptx_sreg_envreg21
      {Intrinsic::nvvm_read_ptx_sreg_envreg22, 74218}, // __nvvm_read_ptx_sreg_envreg22
      {Intrinsic::nvvm_read_ptx_sreg_envreg23, 74248}, // __nvvm_read_ptx_sreg_envreg23
      {Intrinsic::nvvm_read_ptx_sreg_envreg24, 74278}, // __nvvm_read_ptx_sreg_envreg24
      {Intrinsic::nvvm_read_ptx_sreg_envreg25, 74308}, // __nvvm_read_ptx_sreg_envreg25
      {Intrinsic::nvvm_read_ptx_sreg_envreg26, 74338}, // __nvvm_read_ptx_sreg_envreg26
      {Intrinsic::nvvm_read_ptx_sreg_envreg27, 74368}, // __nvvm_read_ptx_sreg_envreg27
      {Intrinsic::nvvm_read_ptx_sreg_envreg28, 74398}, // __nvvm_read_ptx_sreg_envreg28
      {Intrinsic::nvvm_read_ptx_sreg_envreg29, 74428}, // __nvvm_read_ptx_sreg_envreg29
      {Intrinsic::nvvm_read_ptx_sreg_envreg3, 74458}, // __nvvm_read_ptx_sreg_envreg3
      {Intrinsic::nvvm_read_ptx_sreg_envreg30, 74487}, // __nvvm_read_ptx_sreg_envreg30
      {Intrinsic::nvvm_read_ptx_sreg_envreg31, 74517}, // __nvvm_read_ptx_sreg_envreg31
      {Intrinsic::nvvm_read_ptx_sreg_envreg4, 74547}, // __nvvm_read_ptx_sreg_envreg4
      {Intrinsic::nvvm_read_ptx_sreg_envreg5, 74576}, // __nvvm_read_ptx_sreg_envreg5
      {Intrinsic::nvvm_read_ptx_sreg_envreg6, 74605}, // __nvvm_read_ptx_sreg_envreg6
      {Intrinsic::nvvm_read_ptx_sreg_envreg7, 74634}, // __nvvm_read_ptx_sreg_envreg7
      {Intrinsic::nvvm_read_ptx_sreg_envreg8, 74663}, // __nvvm_read_ptx_sreg_envreg8
      {Intrinsic::nvvm_read_ptx_sreg_envreg9, 74692}, // __nvvm_read_ptx_sreg_envreg9
      {Intrinsic::nvvm_read_ptx_sreg_gridid, 74721}, // __nvvm_read_ptx_sreg_gridid
      {Intrinsic::nvvm_read_ptx_sreg_laneid, 74749}, // __nvvm_read_ptx_sreg_laneid
      {Intrinsic::nvvm_read_ptx_sreg_lanemask_eq, 74777}, // __nvvm_read_ptx_sreg_lanemask_eq
      {Intrinsic::nvvm_read_ptx_sreg_lanemask_ge, 74810}, // __nvvm_read_ptx_sreg_lanemask_ge
      {Intrinsic::nvvm_read_ptx_sreg_lanemask_gt, 74843}, // __nvvm_read_ptx_sreg_lanemask_gt
      {Intrinsic::nvvm_read_ptx_sreg_lanemask_le, 74876}, // __nvvm_read_ptx_sreg_lanemask_le
      {Intrinsic::nvvm_read_ptx_sreg_lanemask_lt, 74909}, // __nvvm_read_ptx_sreg_lanemask_lt
      {Intrinsic::nvvm_read_ptx_sreg_nctaid_w, 74942}, // __nvvm_read_ptx_sreg_nctaid_w
      {Intrinsic::nvvm_read_ptx_sreg_nctaid_x, 74972}, // __nvvm_read_ptx_sreg_nctaid_x
      {Intrinsic::nvvm_read_ptx_sreg_nctaid_y, 75002}, // __nvvm_read_ptx_sreg_nctaid_y
      {Intrinsic::nvvm_read_ptx_sreg_nctaid_z, 75032}, // __nvvm_read_ptx_sreg_nctaid_z
      {Intrinsic::nvvm_read_ptx_sreg_nsmid, 75062}, // __nvvm_read_ptx_sreg_nsmid
      {Intrinsic::nvvm_read_ptx_sreg_ntid_w, 75089}, // __nvvm_read_ptx_sreg_ntid_w
      {Intrinsic::nvvm_read_ptx_sreg_ntid_x, 75117}, // __nvvm_read_ptx_sreg_ntid_x
      {Intrinsic::nvvm_read_ptx_sreg_ntid_y, 75145}, // __nvvm_read_ptx_sreg_ntid_y
      {Intrinsic::nvvm_read_ptx_sreg_ntid_z, 75173}, // __nvvm_read_ptx_sreg_ntid_z
      {Intrinsic::nvvm_read_ptx_sreg_nwarpid, 75201}, // __nvvm_read_ptx_sreg_nwarpid
      {Intrinsic::nvvm_read_ptx_sreg_pm0, 75230}, // __nvvm_read_ptx_sreg_pm0
      {Intrinsic::nvvm_read_ptx_sreg_pm1, 75255}, // __nvvm_read_ptx_sreg_pm1
      {Intrinsic::nvvm_read_ptx_sreg_pm2, 75280}, // __nvvm_read_ptx_sreg_pm2
      {Intrinsic::nvvm_read_ptx_sreg_pm3, 75305}, // __nvvm_read_ptx_sreg_pm3
      {Intrinsic::nvvm_read_ptx_sreg_smid, 75330}, // __nvvm_read_ptx_sreg_smid
      {Intrinsic::nvvm_read_ptx_sreg_tid_w, 75356}, // __nvvm_read_ptx_sreg_tid_w
      {Intrinsic::nvvm_read_ptx_sreg_tid_x, 75383}, // __nvvm_read_ptx_sreg_tid_x
      {Intrinsic::nvvm_read_ptx_sreg_tid_y, 75410}, // __nvvm_read_ptx_sreg_tid_y
      {Intrinsic::nvvm_read_ptx_sreg_tid_z, 75437}, // __nvvm_read_ptx_sreg_tid_z
      {Intrinsic::nvvm_read_ptx_sreg_warpid, 75464}, // __nvvm_read_ptx_sreg_warpid
      {Intrinsic::nvvm_read_ptx_sreg_warpsize, 75492}, // __nvvm_read_ptx_sreg_warpsize
      {Intrinsic::nvvm_rotate_b32, 75522}, // __nvvm_rotate_b32
      {Intrinsic::nvvm_rotate_b64, 75540}, // __nvvm_rotate_b64
      {Intrinsic::nvvm_rotate_right_b64, 75558}, // __nvvm_rotate_right_b64
      {Intrinsic::nvvm_round_d, 75582}, // __nvvm_round_d
      {Intrinsic::nvvm_round_f, 75597}, // __nvvm_round_f
      {Intrinsic::nvvm_round_ftz_f, 75612}, // __nvvm_round_ftz_f
      {Intrinsic::nvvm_rsqrt_approx_d, 75631}, // __nvvm_rsqrt_approx_d
      {Intrinsic::nvvm_rsqrt_approx_f, 75653}, // __nvvm_rsqrt_approx_f
      {Intrinsic::nvvm_rsqrt_approx_ftz_f, 75675}, // __nvvm_rsqrt_approx_ftz_f
      {Intrinsic::nvvm_sad_i, 75701}, // __nvvm_sad_i
      {Intrinsic::nvvm_sad_ui, 75714}, // __nvvm_sad_ui
      {Intrinsic::nvvm_saturate_d, 75728}, // __nvvm_saturate_d
      {Intrinsic::nvvm_saturate_f, 75746}, // __nvvm_saturate_f
      {Intrinsic::nvvm_saturate_ftz_f, 75764}, // __nvvm_saturate_ftz_f
      {Intrinsic::nvvm_shfl_bfly_f32, 75786}, // __nvvm_shfl_bfly_f32
      {Intrinsic::nvvm_shfl_bfly_i32, 75807}, // __nvvm_shfl_bfly_i32
      {Intrinsic::nvvm_shfl_down_f32, 75828}, // __nvvm_shfl_down_f32
      {Intrinsic::nvvm_shfl_down_i32, 75849}, // __nvvm_shfl_down_i32
      {Intrinsic::nvvm_shfl_idx_f32, 75870}, // __nvvm_shfl_idx_f32
      {Intrinsic::nvvm_shfl_idx_i32, 75890}, // __nvvm_shfl_idx_i32
      {Intrinsic::nvvm_shfl_sync_bfly_f32, 75910}, // __nvvm_shfl_sync_bfly_f32
      {Intrinsic::nvvm_shfl_sync_bfly_i32, 75936}, // __nvvm_shfl_sync_bfly_i32
      {Intrinsic::nvvm_shfl_sync_down_f32, 75962}, // __nvvm_shfl_sync_down_f32
      {Intrinsic::nvvm_shfl_sync_down_i32, 75988}, // __nvvm_shfl_sync_down_i32
      {Intrinsic::nvvm_shfl_sync_idx_f32, 76014}, // __nvvm_shfl_sync_idx_f32
      {Intrinsic::nvvm_shfl_sync_idx_i32, 76039}, // __nvvm_shfl_sync_idx_i32
      {Intrinsic::nvvm_shfl_sync_up_f32, 76064}, // __nvvm_shfl_sync_up_f32
      {Intrinsic::nvvm_shfl_sync_up_i32, 76088}, // __nvvm_shfl_sync_up_i32
      {Intrinsic::nvvm_shfl_up_f32, 76112}, // __nvvm_shfl_up_f32
      {Intrinsic::nvvm_shfl_up_i32, 76131}, // __nvvm_shfl_up_i32
      {Intrinsic::nvvm_sin_approx_f, 76150}, // __nvvm_sin_approx_f
      {Intrinsic::nvvm_sin_approx_ftz_f, 76170}, // __nvvm_sin_approx_ftz_f
      {Intrinsic::nvvm_sqrt_approx_f, 76194}, // __nvvm_sqrt_approx_f
      {Intrinsic::nvvm_sqrt_approx_ftz_f, 76215}, // __nvvm_sqrt_approx_ftz_f
      {Intrinsic::nvvm_sqrt_f, 76240}, // __nvvm_sqrt_f
      {Intrinsic::nvvm_sqrt_rm_d, 76254}, // __nvvm_sqrt_rm_d
      {Intrinsic::nvvm_sqrt_rm_f, 76271}, // __nvvm_sqrt_rm_f
      {Intrinsic::nvvm_sqrt_rm_ftz_f, 76288}, // __nvvm_sqrt_rm_ftz_f
      {Intrinsic::nvvm_sqrt_rn_d, 76309}, // __nvvm_sqrt_rn_d
      {Intrinsic::nvvm_sqrt_rn_f, 76326}, // __nvvm_sqrt_rn_f
      {Intrinsic::nvvm_sqrt_rn_ftz_f, 76343}, // __nvvm_sqrt_rn_ftz_f
      {Intrinsic::nvvm_sqrt_rp_d, 76364}, // __nvvm_sqrt_rp_d
      {Intrinsic::nvvm_sqrt_rp_f, 76381}, // __nvvm_sqrt_rp_f
      {Intrinsic::nvvm_sqrt_rp_ftz_f, 76398}, // __nvvm_sqrt_rp_ftz_f
      {Intrinsic::nvvm_sqrt_rz_d, 76419}, // __nvvm_sqrt_rz_d
      {Intrinsic::nvvm_sqrt_rz_f, 76436}, // __nvvm_sqrt_rz_f
      {Intrinsic::nvvm_sqrt_rz_ftz_f, 76453}, // __nvvm_sqrt_rz_ftz_f
      {Intrinsic::nvvm_suq_array_size, 76474}, // __nvvm_suq_array_size
      {Intrinsic::nvvm_suq_channel_data_type, 76496}, // __nvvm_suq_channel_data_type
      {Intrinsic::nvvm_suq_channel_order, 76525}, // __nvvm_suq_channel_order
      {Intrinsic::nvvm_suq_depth, 76550}, // __nvvm_suq_depth
      {Intrinsic::nvvm_suq_height, 76567}, // __nvvm_suq_height
      {Intrinsic::nvvm_suq_width, 76585}, // __nvvm_suq_width
      {Intrinsic::nvvm_sust_b_1d_array_i16_clamp, 76602}, // __nvvm_sust_b_1d_array_i16_clamp
      {Intrinsic::nvvm_sust_b_1d_array_i16_trap, 76635}, // __nvvm_sust_b_1d_array_i16_trap
      {Intrinsic::nvvm_sust_b_1d_array_i16_zero, 76667}, // __nvvm_sust_b_1d_array_i16_zero
      {Intrinsic::nvvm_sust_b_1d_array_i32_clamp, 76699}, // __nvvm_sust_b_1d_array_i32_clamp
      {Intrinsic::nvvm_sust_b_1d_array_i32_trap, 76732}, // __nvvm_sust_b_1d_array_i32_trap
      {Intrinsic::nvvm_sust_b_1d_array_i32_zero, 76764}, // __nvvm_sust_b_1d_array_i32_zero
      {Intrinsic::nvvm_sust_b_1d_array_i64_clamp, 76796}, // __nvvm_sust_b_1d_array_i64_clamp
      {Intrinsic::nvvm_sust_b_1d_array_i64_trap, 76829}, // __nvvm_sust_b_1d_array_i64_trap
      {Intrinsic::nvvm_sust_b_1d_array_i64_zero, 76861}, // __nvvm_sust_b_1d_array_i64_zero
      {Intrinsic::nvvm_sust_b_1d_array_i8_clamp, 76893}, // __nvvm_sust_b_1d_array_i8_clamp
      {Intrinsic::nvvm_sust_b_1d_array_i8_trap, 76925}, // __nvvm_sust_b_1d_array_i8_trap
      {Intrinsic::nvvm_sust_b_1d_array_i8_zero, 76956}, // __nvvm_sust_b_1d_array_i8_zero
      {Intrinsic::nvvm_sust_b_1d_array_v2i16_clamp, 76987}, // __nvvm_sust_b_1d_array_v2i16_clamp
      {Intrinsic::nvvm_sust_b_1d_array_v2i16_trap, 77022}, // __nvvm_sust_b_1d_array_v2i16_trap
      {Intrinsic::nvvm_sust_b_1d_array_v2i16_zero, 77056}, // __nvvm_sust_b_1d_array_v2i16_zero
      {Intrinsic::nvvm_sust_b_1d_array_v2i32_clamp, 77090}, // __nvvm_sust_b_1d_array_v2i32_clamp
      {Intrinsic::nvvm_sust_b_1d_array_v2i32_trap, 77125}, // __nvvm_sust_b_1d_array_v2i32_trap
      {Intrinsic::nvvm_sust_b_1d_array_v2i32_zero, 77159}, // __nvvm_sust_b_1d_array_v2i32_zero
      {Intrinsic::nvvm_sust_b_1d_array_v2i64_clamp, 77193}, // __nvvm_sust_b_1d_array_v2i64_clamp
      {Intrinsic::nvvm_sust_b_1d_array_v2i64_trap, 77228}, // __nvvm_sust_b_1d_array_v2i64_trap
      {Intrinsic::nvvm_sust_b_1d_array_v2i64_zero, 77262}, // __nvvm_sust_b_1d_array_v2i64_zero
      {Intrinsic::nvvm_sust_b_1d_array_v2i8_clamp, 77296}, // __nvvm_sust_b_1d_array_v2i8_clamp
      {Intrinsic::nvvm_sust_b_1d_array_v2i8_trap, 77330}, // __nvvm_sust_b_1d_array_v2i8_trap
      {Intrinsic::nvvm_sust_b_1d_array_v2i8_zero, 77363}, // __nvvm_sust_b_1d_array_v2i8_zero
      {Intrinsic::nvvm_sust_b_1d_array_v4i16_clamp, 77396}, // __nvvm_sust_b_1d_array_v4i16_clamp
      {Intrinsic::nvvm_sust_b_1d_array_v4i16_trap, 77431}, // __nvvm_sust_b_1d_array_v4i16_trap
      {Intrinsic::nvvm_sust_b_1d_array_v4i16_zero, 77465}, // __nvvm_sust_b_1d_array_v4i16_zero
      {Intrinsic::nvvm_sust_b_1d_array_v4i32_clamp, 77499}, // __nvvm_sust_b_1d_array_v4i32_clamp
      {Intrinsic::nvvm_sust_b_1d_array_v4i32_trap, 77534}, // __nvvm_sust_b_1d_array_v4i32_trap
      {Intrinsic::nvvm_sust_b_1d_array_v4i32_zero, 77568}, // __nvvm_sust_b_1d_array_v4i32_zero
      {Intrinsic::nvvm_sust_b_1d_array_v4i8_clamp, 77602}, // __nvvm_sust_b_1d_array_v4i8_clamp
      {Intrinsic::nvvm_sust_b_1d_array_v4i8_trap, 77636}, // __nvvm_sust_b_1d_array_v4i8_trap
      {Intrinsic::nvvm_sust_b_1d_array_v4i8_zero, 77669}, // __nvvm_sust_b_1d_array_v4i8_zero
      {Intrinsic::nvvm_sust_b_1d_i16_clamp, 77702}, // __nvvm_sust_b_1d_i16_clamp
      {Intrinsic::nvvm_sust_b_1d_i16_trap, 77729}, // __nvvm_sust_b_1d_i16_trap
      {Intrinsic::nvvm_sust_b_1d_i16_zero, 77755}, // __nvvm_sust_b_1d_i16_zero
      {Intrinsic::nvvm_sust_b_1d_i32_clamp, 77781}, // __nvvm_sust_b_1d_i32_clamp
      {Intrinsic::nvvm_sust_b_1d_i32_trap, 77808}, // __nvvm_sust_b_1d_i32_trap
      {Intrinsic::nvvm_sust_b_1d_i32_zero, 77834}, // __nvvm_sust_b_1d_i32_zero
      {Intrinsic::nvvm_sust_b_1d_i64_clamp, 77860}, // __nvvm_sust_b_1d_i64_clamp
      {Intrinsic::nvvm_sust_b_1d_i64_trap, 77887}, // __nvvm_sust_b_1d_i64_trap
      {Intrinsic::nvvm_sust_b_1d_i64_zero, 77913}, // __nvvm_sust_b_1d_i64_zero
      {Intrinsic::nvvm_sust_b_1d_i8_clamp, 77939}, // __nvvm_sust_b_1d_i8_clamp
      {Intrinsic::nvvm_sust_b_1d_i8_trap, 77965}, // __nvvm_sust_b_1d_i8_trap
      {Intrinsic::nvvm_sust_b_1d_i8_zero, 77990}, // __nvvm_sust_b_1d_i8_zero
      {Intrinsic::nvvm_sust_b_1d_v2i16_clamp, 78015}, // __nvvm_sust_b_1d_v2i16_clamp
      {Intrinsic::nvvm_sust_b_1d_v2i16_trap, 78044}, // __nvvm_sust_b_1d_v2i16_trap
      {Intrinsic::nvvm_sust_b_1d_v2i16_zero, 78072}, // __nvvm_sust_b_1d_v2i16_zero
      {Intrinsic::nvvm_sust_b_1d_v2i32_clamp, 78100}, // __nvvm_sust_b_1d_v2i32_clamp
      {Intrinsic::nvvm_sust_b_1d_v2i32_trap, 78129}, // __nvvm_sust_b_1d_v2i32_trap
      {Intrinsic::nvvm_sust_b_1d_v2i32_zero, 78157}, // __nvvm_sust_b_1d_v2i32_zero
      {Intrinsic::nvvm_sust_b_1d_v2i64_clamp, 78185}, // __nvvm_sust_b_1d_v2i64_clamp
      {Intrinsic::nvvm_sust_b_1d_v2i64_trap, 78214}, // __nvvm_sust_b_1d_v2i64_trap
      {Intrinsic::nvvm_sust_b_1d_v2i64_zero, 78242}, // __nvvm_sust_b_1d_v2i64_zero
      {Intrinsic::nvvm_sust_b_1d_v2i8_clamp, 78270}, // __nvvm_sust_b_1d_v2i8_clamp
      {Intrinsic::nvvm_sust_b_1d_v2i8_trap, 78298}, // __nvvm_sust_b_1d_v2i8_trap
      {Intrinsic::nvvm_sust_b_1d_v2i8_zero, 78325}, // __nvvm_sust_b_1d_v2i8_zero
      {Intrinsic::nvvm_sust_b_1d_v4i16_clamp, 78352}, // __nvvm_sust_b_1d_v4i16_clamp
      {Intrinsic::nvvm_sust_b_1d_v4i16_trap, 78381}, // __nvvm_sust_b_1d_v4i16_trap
      {Intrinsic::nvvm_sust_b_1d_v4i16_zero, 78409}, // __nvvm_sust_b_1d_v4i16_zero
      {Intrinsic::nvvm_sust_b_1d_v4i32_clamp, 78437}, // __nvvm_sust_b_1d_v4i32_clamp
      {Intrinsic::nvvm_sust_b_1d_v4i32_trap, 78466}, // __nvvm_sust_b_1d_v4i32_trap
      {Intrinsic::nvvm_sust_b_1d_v4i32_zero, 78494}, // __nvvm_sust_b_1d_v4i32_zero
      {Intrinsic::nvvm_sust_b_1d_v4i8_clamp, 78522}, // __nvvm_sust_b_1d_v4i8_clamp
      {Intrinsic::nvvm_sust_b_1d_v4i8_trap, 78550}, // __nvvm_sust_b_1d_v4i8_trap
      {Intrinsic::nvvm_sust_b_1d_v4i8_zero, 78577}, // __nvvm_sust_b_1d_v4i8_zero
      {Intrinsic::nvvm_sust_b_2d_array_i16_clamp, 78604}, // __nvvm_sust_b_2d_array_i16_clamp
      {Intrinsic::nvvm_sust_b_2d_array_i16_trap, 78637}, // __nvvm_sust_b_2d_array_i16_trap
      {Intrinsic::nvvm_sust_b_2d_array_i16_zero, 78669}, // __nvvm_sust_b_2d_array_i16_zero
      {Intrinsic::nvvm_sust_b_2d_array_i32_clamp, 78701}, // __nvvm_sust_b_2d_array_i32_clamp
      {Intrinsic::nvvm_sust_b_2d_array_i32_trap, 78734}, // __nvvm_sust_b_2d_array_i32_trap
      {Intrinsic::nvvm_sust_b_2d_array_i32_zero, 78766}, // __nvvm_sust_b_2d_array_i32_zero
      {Intrinsic::nvvm_sust_b_2d_array_i64_clamp, 78798}, // __nvvm_sust_b_2d_array_i64_clamp
      {Intrinsic::nvvm_sust_b_2d_array_i64_trap, 78831}, // __nvvm_sust_b_2d_array_i64_trap
      {Intrinsic::nvvm_sust_b_2d_array_i64_zero, 78863}, // __nvvm_sust_b_2d_array_i64_zero
      {Intrinsic::nvvm_sust_b_2d_array_i8_clamp, 78895}, // __nvvm_sust_b_2d_array_i8_clamp
      {Intrinsic::nvvm_sust_b_2d_array_i8_trap, 78927}, // __nvvm_sust_b_2d_array_i8_trap
      {Intrinsic::nvvm_sust_b_2d_array_i8_zero, 78958}, // __nvvm_sust_b_2d_array_i8_zero
      {Intrinsic::nvvm_sust_b_2d_array_v2i16_clamp, 78989}, // __nvvm_sust_b_2d_array_v2i16_clamp
      {Intrinsic::nvvm_sust_b_2d_array_v2i16_trap, 79024}, // __nvvm_sust_b_2d_array_v2i16_trap
      {Intrinsic::nvvm_sust_b_2d_array_v2i16_zero, 79058}, // __nvvm_sust_b_2d_array_v2i16_zero
      {Intrinsic::nvvm_sust_b_2d_array_v2i32_clamp, 79092}, // __nvvm_sust_b_2d_array_v2i32_clamp
      {Intrinsic::nvvm_sust_b_2d_array_v2i32_trap, 79127}, // __nvvm_sust_b_2d_array_v2i32_trap
      {Intrinsic::nvvm_sust_b_2d_array_v2i32_zero, 79161}, // __nvvm_sust_b_2d_array_v2i32_zero
      {Intrinsic::nvvm_sust_b_2d_array_v2i64_clamp, 79195}, // __nvvm_sust_b_2d_array_v2i64_clamp
      {Intrinsic::nvvm_sust_b_2d_array_v2i64_trap, 79230}, // __nvvm_sust_b_2d_array_v2i64_trap
      {Intrinsic::nvvm_sust_b_2d_array_v2i64_zero, 79264}, // __nvvm_sust_b_2d_array_v2i64_zero
      {Intrinsic::nvvm_sust_b_2d_array_v2i8_clamp, 79298}, // __nvvm_sust_b_2d_array_v2i8_clamp
      {Intrinsic::nvvm_sust_b_2d_array_v2i8_trap, 79332}, // __nvvm_sust_b_2d_array_v2i8_trap
      {Intrinsic::nvvm_sust_b_2d_array_v2i8_zero, 79365}, // __nvvm_sust_b_2d_array_v2i8_zero
      {Intrinsic::nvvm_sust_b_2d_array_v4i16_clamp, 79398}, // __nvvm_sust_b_2d_array_v4i16_clamp
      {Intrinsic::nvvm_sust_b_2d_array_v4i16_trap, 79433}, // __nvvm_sust_b_2d_array_v4i16_trap
      {Intrinsic::nvvm_sust_b_2d_array_v4i16_zero, 79467}, // __nvvm_sust_b_2d_array_v4i16_zero
      {Intrinsic::nvvm_sust_b_2d_array_v4i32_clamp, 79501}, // __nvvm_sust_b_2d_array_v4i32_clamp
      {Intrinsic::nvvm_sust_b_2d_array_v4i32_trap, 79536}, // __nvvm_sust_b_2d_array_v4i32_trap
      {Intrinsic::nvvm_sust_b_2d_array_v4i32_zero, 79570}, // __nvvm_sust_b_2d_array_v4i32_zero
      {Intrinsic::nvvm_sust_b_2d_array_v4i8_clamp, 79604}, // __nvvm_sust_b_2d_array_v4i8_clamp
      {Intrinsic::nvvm_sust_b_2d_array_v4i8_trap, 79638}, // __nvvm_sust_b_2d_array_v4i8_trap
      {Intrinsic::nvvm_sust_b_2d_array_v4i8_zero, 79671}, // __nvvm_sust_b_2d_array_v4i8_zero
      {Intrinsic::nvvm_sust_b_2d_i16_clamp, 79704}, // __nvvm_sust_b_2d_i16_clamp
      {Intrinsic::nvvm_sust_b_2d_i16_trap, 79731}, // __nvvm_sust_b_2d_i16_trap
      {Intrinsic::nvvm_sust_b_2d_i16_zero, 79757}, // __nvvm_sust_b_2d_i16_zero
      {Intrinsic::nvvm_sust_b_2d_i32_clamp, 79783}, // __nvvm_sust_b_2d_i32_clamp
      {Intrinsic::nvvm_sust_b_2d_i32_trap, 79810}, // __nvvm_sust_b_2d_i32_trap
      {Intrinsic::nvvm_sust_b_2d_i32_zero, 79836}, // __nvvm_sust_b_2d_i32_zero
      {Intrinsic::nvvm_sust_b_2d_i64_clamp, 79862}, // __nvvm_sust_b_2d_i64_clamp
      {Intrinsic::nvvm_sust_b_2d_i64_trap, 79889}, // __nvvm_sust_b_2d_i64_trap
      {Intrinsic::nvvm_sust_b_2d_i64_zero, 79915}, // __nvvm_sust_b_2d_i64_zero
      {Intrinsic::nvvm_sust_b_2d_i8_clamp, 79941}, // __nvvm_sust_b_2d_i8_clamp
      {Intrinsic::nvvm_sust_b_2d_i8_trap, 79967}, // __nvvm_sust_b_2d_i8_trap
      {Intrinsic::nvvm_sust_b_2d_i8_zero, 79992}, // __nvvm_sust_b_2d_i8_zero
      {Intrinsic::nvvm_sust_b_2d_v2i16_clamp, 80017}, // __nvvm_sust_b_2d_v2i16_clamp
      {Intrinsic::nvvm_sust_b_2d_v2i16_trap, 80046}, // __nvvm_sust_b_2d_v2i16_trap
      {Intrinsic::nvvm_sust_b_2d_v2i16_zero, 80074}, // __nvvm_sust_b_2d_v2i16_zero
      {Intrinsic::nvvm_sust_b_2d_v2i32_clamp, 80102}, // __nvvm_sust_b_2d_v2i32_clamp
      {Intrinsic::nvvm_sust_b_2d_v2i32_trap, 80131}, // __nvvm_sust_b_2d_v2i32_trap
      {Intrinsic::nvvm_sust_b_2d_v2i32_zero, 80159}, // __nvvm_sust_b_2d_v2i32_zero
      {Intrinsic::nvvm_sust_b_2d_v2i64_clamp, 80187}, // __nvvm_sust_b_2d_v2i64_clamp
      {Intrinsic::nvvm_sust_b_2d_v2i64_trap, 80216}, // __nvvm_sust_b_2d_v2i64_trap
      {Intrinsic::nvvm_sust_b_2d_v2i64_zero, 80244}, // __nvvm_sust_b_2d_v2i64_zero
      {Intrinsic::nvvm_sust_b_2d_v2i8_clamp, 80272}, // __nvvm_sust_b_2d_v2i8_clamp
      {Intrinsic::nvvm_sust_b_2d_v2i8_trap, 80300}, // __nvvm_sust_b_2d_v2i8_trap
      {Intrinsic::nvvm_sust_b_2d_v2i8_zero, 80327}, // __nvvm_sust_b_2d_v2i8_zero
      {Intrinsic::nvvm_sust_b_2d_v4i16_clamp, 80354}, // __nvvm_sust_b_2d_v4i16_clamp
      {Intrinsic::nvvm_sust_b_2d_v4i16_trap, 80383}, // __nvvm_sust_b_2d_v4i16_trap
      {Intrinsic::nvvm_sust_b_2d_v4i16_zero, 80411}, // __nvvm_sust_b_2d_v4i16_zero
      {Intrinsic::nvvm_sust_b_2d_v4i32_clamp, 80439}, // __nvvm_sust_b_2d_v4i32_clamp
      {Intrinsic::nvvm_sust_b_2d_v4i32_trap, 80468}, // __nvvm_sust_b_2d_v4i32_trap
      {Intrinsic::nvvm_sust_b_2d_v4i32_zero, 80496}, // __nvvm_sust_b_2d_v4i32_zero
      {Intrinsic::nvvm_sust_b_2d_v4i8_clamp, 80524}, // __nvvm_sust_b_2d_v4i8_clamp
      {Intrinsic::nvvm_sust_b_2d_v4i8_trap, 80552}, // __nvvm_sust_b_2d_v4i8_trap
      {Intrinsic::nvvm_sust_b_2d_v4i8_zero, 80579}, // __nvvm_sust_b_2d_v4i8_zero
      {Intrinsic::nvvm_sust_b_3d_i16_clamp, 80606}, // __nvvm_sust_b_3d_i16_clamp
      {Intrinsic::nvvm_sust_b_3d_i16_trap, 80633}, // __nvvm_sust_b_3d_i16_trap
      {Intrinsic::nvvm_sust_b_3d_i16_zero, 80659}, // __nvvm_sust_b_3d_i16_zero
      {Intrinsic::nvvm_sust_b_3d_i32_clamp, 80685}, // __nvvm_sust_b_3d_i32_clamp
      {Intrinsic::nvvm_sust_b_3d_i32_trap, 80712}, // __nvvm_sust_b_3d_i32_trap
      {Intrinsic::nvvm_sust_b_3d_i32_zero, 80738}, // __nvvm_sust_b_3d_i32_zero
      {Intrinsic::nvvm_sust_b_3d_i64_clamp, 80764}, // __nvvm_sust_b_3d_i64_clamp
      {Intrinsic::nvvm_sust_b_3d_i64_trap, 80791}, // __nvvm_sust_b_3d_i64_trap
      {Intrinsic::nvvm_sust_b_3d_i64_zero, 80817}, // __nvvm_sust_b_3d_i64_zero
      {Intrinsic::nvvm_sust_b_3d_i8_clamp, 80843}, // __nvvm_sust_b_3d_i8_clamp
      {Intrinsic::nvvm_sust_b_3d_i8_trap, 80869}, // __nvvm_sust_b_3d_i8_trap
      {Intrinsic::nvvm_sust_b_3d_i8_zero, 80894}, // __nvvm_sust_b_3d_i8_zero
      {Intrinsic::nvvm_sust_b_3d_v2i16_clamp, 80919}, // __nvvm_sust_b_3d_v2i16_clamp
      {Intrinsic::nvvm_sust_b_3d_v2i16_trap, 80948}, // __nvvm_sust_b_3d_v2i16_trap
      {Intrinsic::nvvm_sust_b_3d_v2i16_zero, 80976}, // __nvvm_sust_b_3d_v2i16_zero
      {Intrinsic::nvvm_sust_b_3d_v2i32_clamp, 81004}, // __nvvm_sust_b_3d_v2i32_clamp
      {Intrinsic::nvvm_sust_b_3d_v2i32_trap, 81033}, // __nvvm_sust_b_3d_v2i32_trap
      {Intrinsic::nvvm_sust_b_3d_v2i32_zero, 81061}, // __nvvm_sust_b_3d_v2i32_zero
      {Intrinsic::nvvm_sust_b_3d_v2i64_clamp, 81089}, // __nvvm_sust_b_3d_v2i64_clamp
      {Intrinsic::nvvm_sust_b_3d_v2i64_trap, 81118}, // __nvvm_sust_b_3d_v2i64_trap
      {Intrinsic::nvvm_sust_b_3d_v2i64_zero, 81146}, // __nvvm_sust_b_3d_v2i64_zero
      {Intrinsic::nvvm_sust_b_3d_v2i8_clamp, 81174}, // __nvvm_sust_b_3d_v2i8_clamp
      {Intrinsic::nvvm_sust_b_3d_v2i8_trap, 81202}, // __nvvm_sust_b_3d_v2i8_trap
      {Intrinsic::nvvm_sust_b_3d_v2i8_zero, 81229}, // __nvvm_sust_b_3d_v2i8_zero
      {Intrinsic::nvvm_sust_b_3d_v4i16_clamp, 81256}, // __nvvm_sust_b_3d_v4i16_clamp
      {Intrinsic::nvvm_sust_b_3d_v4i16_trap, 81285}, // __nvvm_sust_b_3d_v4i16_trap
      {Intrinsic::nvvm_sust_b_3d_v4i16_zero, 81313}, // __nvvm_sust_b_3d_v4i16_zero
      {Intrinsic::nvvm_sust_b_3d_v4i32_clamp, 81341}, // __nvvm_sust_b_3d_v4i32_clamp
      {Intrinsic::nvvm_sust_b_3d_v4i32_trap, 81370}, // __nvvm_sust_b_3d_v4i32_trap
      {Intrinsic::nvvm_sust_b_3d_v4i32_zero, 81398}, // __nvvm_sust_b_3d_v4i32_zero
      {Intrinsic::nvvm_sust_b_3d_v4i8_clamp, 81426}, // __nvvm_sust_b_3d_v4i8_clamp
      {Intrinsic::nvvm_sust_b_3d_v4i8_trap, 81454}, // __nvvm_sust_b_3d_v4i8_trap
      {Intrinsic::nvvm_sust_b_3d_v4i8_zero, 81481}, // __nvvm_sust_b_3d_v4i8_zero
      {Intrinsic::nvvm_sust_p_1d_array_i16_trap, 81508}, // __nvvm_sust_p_1d_array_i16_trap
      {Intrinsic::nvvm_sust_p_1d_array_i32_trap, 81540}, // __nvvm_sust_p_1d_array_i32_trap
      {Intrinsic::nvvm_sust_p_1d_array_i8_trap, 81572}, // __nvvm_sust_p_1d_array_i8_trap
      {Intrinsic::nvvm_sust_p_1d_array_v2i16_trap, 81603}, // __nvvm_sust_p_1d_array_v2i16_trap
      {Intrinsic::nvvm_sust_p_1d_array_v2i32_trap, 81637}, // __nvvm_sust_p_1d_array_v2i32_trap
      {Intrinsic::nvvm_sust_p_1d_array_v2i8_trap, 81671}, // __nvvm_sust_p_1d_array_v2i8_trap
      {Intrinsic::nvvm_sust_p_1d_array_v4i16_trap, 81704}, // __nvvm_sust_p_1d_array_v4i16_trap
      {Intrinsic::nvvm_sust_p_1d_array_v4i32_trap, 81738}, // __nvvm_sust_p_1d_array_v4i32_trap
      {Intrinsic::nvvm_sust_p_1d_array_v4i8_trap, 81772}, // __nvvm_sust_p_1d_array_v4i8_trap
      {Intrinsic::nvvm_sust_p_1d_i16_trap, 81805}, // __nvvm_sust_p_1d_i16_trap
      {Intrinsic::nvvm_sust_p_1d_i32_trap, 81831}, // __nvvm_sust_p_1d_i32_trap
      {Intrinsic::nvvm_sust_p_1d_i8_trap, 81857}, // __nvvm_sust_p_1d_i8_trap
      {Intrinsic::nvvm_sust_p_1d_v2i16_trap, 81882}, // __nvvm_sust_p_1d_v2i16_trap
      {Intrinsic::nvvm_sust_p_1d_v2i32_trap, 81910}, // __nvvm_sust_p_1d_v2i32_trap
      {Intrinsic::nvvm_sust_p_1d_v2i8_trap, 81938}, // __nvvm_sust_p_1d_v2i8_trap
      {Intrinsic::nvvm_sust_p_1d_v4i16_trap, 81965}, // __nvvm_sust_p_1d_v4i16_trap
      {Intrinsic::nvvm_sust_p_1d_v4i32_trap, 81993}, // __nvvm_sust_p_1d_v4i32_trap
      {Intrinsic::nvvm_sust_p_1d_v4i8_trap, 82021}, // __nvvm_sust_p_1d_v4i8_trap
      {Intrinsic::nvvm_sust_p_2d_array_i16_trap, 82048}, // __nvvm_sust_p_2d_array_i16_trap
      {Intrinsic::nvvm_sust_p_2d_array_i32_trap, 82080}, // __nvvm_sust_p_2d_array_i32_trap
      {Intrinsic::nvvm_sust_p_2d_array_i8_trap, 82112}, // __nvvm_sust_p_2d_array_i8_trap
      {Intrinsic::nvvm_sust_p_2d_array_v2i16_trap, 82143}, // __nvvm_sust_p_2d_array_v2i16_trap
      {Intrinsic::nvvm_sust_p_2d_array_v2i32_trap, 82177}, // __nvvm_sust_p_2d_array_v2i32_trap
      {Intrinsic::nvvm_sust_p_2d_array_v2i8_trap, 82211}, // __nvvm_sust_p_2d_array_v2i8_trap
      {Intrinsic::nvvm_sust_p_2d_array_v4i16_trap, 82244}, // __nvvm_sust_p_2d_array_v4i16_trap
      {Intrinsic::nvvm_sust_p_2d_array_v4i32_trap, 82278}, // __nvvm_sust_p_2d_array_v4i32_trap
      {Intrinsic::nvvm_sust_p_2d_array_v4i8_trap, 82312}, // __nvvm_sust_p_2d_array_v4i8_trap
      {Intrinsic::nvvm_sust_p_2d_i16_trap, 82345}, // __nvvm_sust_p_2d_i16_trap
      {Intrinsic::nvvm_sust_p_2d_i32_trap, 82371}, // __nvvm_sust_p_2d_i32_trap
      {Intrinsic::nvvm_sust_p_2d_i8_trap, 82397}, // __nvvm_sust_p_2d_i8_trap
      {Intrinsic::nvvm_sust_p_2d_v2i16_trap, 82422}, // __nvvm_sust_p_2d_v2i16_trap
      {Intrinsic::nvvm_sust_p_2d_v2i32_trap, 82450}, // __nvvm_sust_p_2d_v2i32_trap
      {Intrinsic::nvvm_sust_p_2d_v2i8_trap, 82478}, // __nvvm_sust_p_2d_v2i8_trap
      {Intrinsic::nvvm_sust_p_2d_v4i16_trap, 82505}, // __nvvm_sust_p_2d_v4i16_trap
      {Intrinsic::nvvm_sust_p_2d_v4i32_trap, 82533}, // __nvvm_sust_p_2d_v4i32_trap
      {Intrinsic::nvvm_sust_p_2d_v4i8_trap, 82561}, // __nvvm_sust_p_2d_v4i8_trap
      {Intrinsic::nvvm_sust_p_3d_i16_trap, 82588}, // __nvvm_sust_p_3d_i16_trap
      {Intrinsic::nvvm_sust_p_3d_i32_trap, 82614}, // __nvvm_sust_p_3d_i32_trap
      {Intrinsic::nvvm_sust_p_3d_i8_trap, 82640}, // __nvvm_sust_p_3d_i8_trap
      {Intrinsic::nvvm_sust_p_3d_v2i16_trap, 82665}, // __nvvm_sust_p_3d_v2i16_trap
      {Intrinsic::nvvm_sust_p_3d_v2i32_trap, 82693}, // __nvvm_sust_p_3d_v2i32_trap
      {Intrinsic::nvvm_sust_p_3d_v2i8_trap, 82721}, // __nvvm_sust_p_3d_v2i8_trap
      {Intrinsic::nvvm_sust_p_3d_v4i16_trap, 82748}, // __nvvm_sust_p_3d_v4i16_trap
      {Intrinsic::nvvm_sust_p_3d_v4i32_trap, 82776}, // __nvvm_sust_p_3d_v4i32_trap
      {Intrinsic::nvvm_sust_p_3d_v4i8_trap, 82804}, // __nvvm_sust_p_3d_v4i8_trap
      {Intrinsic::nvvm_swap_lo_hi_b64, 82831}, // __nvvm_swap_lo_hi_b64
      {Intrinsic::nvvm_trunc_d, 82853}, // __nvvm_trunc_d
      {Intrinsic::nvvm_trunc_f, 82868}, // __nvvm_trunc_f
      {Intrinsic::nvvm_trunc_ftz_f, 82883}, // __nvvm_trunc_ftz_f
      {Intrinsic::nvvm_txq_array_size, 82902}, // __nvvm_txq_array_size
      {Intrinsic::nvvm_txq_channel_data_type, 82924}, // __nvvm_txq_channel_data_type
      {Intrinsic::nvvm_txq_channel_order, 82953}, // __nvvm_txq_channel_order
      {Intrinsic::nvvm_txq_depth, 82978}, // __nvvm_txq_depth
      {Intrinsic::nvvm_txq_height, 82995}, // __nvvm_txq_height
      {Intrinsic::nvvm_txq_num_mipmap_levels, 83013}, // __nvvm_txq_num_mipmap_levels
      {Intrinsic::nvvm_txq_num_samples, 83042}, // __nvvm_txq_num_samples
      {Intrinsic::nvvm_txq_width, 83065}, // __nvvm_txq_width
      {Intrinsic::nvvm_ui2d_rm, 83082}, // __nvvm_ui2d_rm
      {Intrinsic::nvvm_ui2d_rn, 83097}, // __nvvm_ui2d_rn
      {Intrinsic::nvvm_ui2d_rp, 83112}, // __nvvm_ui2d_rp
      {Intrinsic::nvvm_ui2d_rz, 83127}, // __nvvm_ui2d_rz
      {Intrinsic::nvvm_ui2f_rm, 83142}, // __nvvm_ui2f_rm
      {Intrinsic::nvvm_ui2f_rn, 83157}, // __nvvm_ui2f_rn
      {Intrinsic::nvvm_ui2f_rp, 83172}, // __nvvm_ui2f_rp
      {Intrinsic::nvvm_ui2f_rz, 83187}, // __nvvm_ui2f_rz
      {Intrinsic::nvvm_ull2d_rm, 83202}, // __nvvm_ull2d_rm
      {Intrinsic::nvvm_ull2d_rn, 83218}, // __nvvm_ull2d_rn
      {Intrinsic::nvvm_ull2d_rp, 83234}, // __nvvm_ull2d_rp
      {Intrinsic::nvvm_ull2d_rz, 83250}, // __nvvm_ull2d_rz
      {Intrinsic::nvvm_ull2f_rm, 83266}, // __nvvm_ull2f_rm
      {Intrinsic::nvvm_ull2f_rn, 83282}, // __nvvm_ull2f_rn
      {Intrinsic::nvvm_ull2f_rp, 83298}, // __nvvm_ull2f_rp
      {Intrinsic::nvvm_ull2f_rz, 83314}, // __nvvm_ull2f_rz
      {Intrinsic::nvvm_vote_all, 83330}, // __nvvm_vote_all
      {Intrinsic::nvvm_vote_all_sync, 83346}, // __nvvm_vote_all_sync
      {Intrinsic::nvvm_vote_any, 83367}, // __nvvm_vote_any
      {Intrinsic::nvvm_vote_any_sync, 83383}, // __nvvm_vote_any_sync
      {Intrinsic::nvvm_vote_ballot, 83404}, // __nvvm_vote_ballot
      {Intrinsic::nvvm_vote_ballot_sync, 83423}, // __nvvm_vote_ballot_sync
      {Intrinsic::nvvm_vote_uni, 83447}, // __nvvm_vote_uni
      {Intrinsic::nvvm_vote_uni_sync, 83463}, // __nvvm_vote_uni_sync
      {Intrinsic::nvvm_barrier0, 70552}, // __syncthreads
    };
    auto I = std::lower_bound(std::begin(nvvmNames),
                              std::end(nvvmNames),
                              BuiltinNameStr);
    if (I != std::end(nvvmNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "ppc") {
    static const BuiltinEntry ppcNames[] = {
      {Intrinsic::ppc_addf128_round_to_odd, 83484}, // __builtin_addf128_round_to_odd
      {Intrinsic::ppc_altivec_crypto_vcipher, 83515}, // __builtin_altivec_crypto_vcipher
      {Intrinsic::ppc_altivec_crypto_vcipherlast, 83548}, // __builtin_altivec_crypto_vcipherlast
      {Intrinsic::ppc_altivec_crypto_vncipher, 83585}, // __builtin_altivec_crypto_vncipher
      {Intrinsic::ppc_altivec_crypto_vncipherlast, 83619}, // __builtin_altivec_crypto_vncipherlast
      {Intrinsic::ppc_altivec_crypto_vpermxor, 83657}, // __builtin_altivec_crypto_vpermxor
      {Intrinsic::ppc_altivec_crypto_vpmsumb, 83691}, // __builtin_altivec_crypto_vpmsumb
      {Intrinsic::ppc_altivec_crypto_vpmsumd, 83724}, // __builtin_altivec_crypto_vpmsumd
      {Intrinsic::ppc_altivec_crypto_vpmsumh, 83757}, // __builtin_altivec_crypto_vpmsumh
      {Intrinsic::ppc_altivec_crypto_vpmsumw, 83790}, // __builtin_altivec_crypto_vpmsumw
      {Intrinsic::ppc_altivec_crypto_vsbox, 83823}, // __builtin_altivec_crypto_vsbox
      {Intrinsic::ppc_altivec_crypto_vshasigmad, 83854}, // __builtin_altivec_crypto_vshasigmad
      {Intrinsic::ppc_altivec_crypto_vshasigmaw, 83890}, // __builtin_altivec_crypto_vshasigmaw
      {Intrinsic::ppc_altivec_dss, 83926}, // __builtin_altivec_dss
      {Intrinsic::ppc_altivec_dssall, 83948}, // __builtin_altivec_dssall
      {Intrinsic::ppc_altivec_dst, 83973}, // __builtin_altivec_dst
      {Intrinsic::ppc_altivec_dstst, 83995}, // __builtin_altivec_dstst
      {Intrinsic::ppc_altivec_dststt, 84019}, // __builtin_altivec_dststt
      {Intrinsic::ppc_altivec_dstt, 84044}, // __builtin_altivec_dstt
      {Intrinsic::ppc_altivec_mfvscr, 84067}, // __builtin_altivec_mfvscr
      {Intrinsic::ppc_altivec_mtvscr, 84092}, // __builtin_altivec_mtvscr
      {Intrinsic::ppc_altivec_mtvsrbm, 84117}, // __builtin_altivec_mtvsrbm
      {Intrinsic::ppc_altivec_mtvsrdm, 84143}, // __builtin_altivec_mtvsrdm
      {Intrinsic::ppc_altivec_mtvsrhm, 84169}, // __builtin_altivec_mtvsrhm
      {Intrinsic::ppc_altivec_mtvsrqm, 84195}, // __builtin_altivec_mtvsrqm
      {Intrinsic::ppc_altivec_mtvsrwm, 84221}, // __builtin_altivec_mtvsrwm
      {Intrinsic::ppc_altivec_vabsdub, 84247}, // __builtin_altivec_vabsdub
      {Intrinsic::ppc_altivec_vabsduh, 84273}, // __builtin_altivec_vabsduh
      {Intrinsic::ppc_altivec_vabsduw, 84299}, // __builtin_altivec_vabsduw
      {Intrinsic::ppc_altivec_vaddcuq, 84325}, // __builtin_altivec_vaddcuq
      {Intrinsic::ppc_altivec_vaddcuw, 84351}, // __builtin_altivec_vaddcuw
      {Intrinsic::ppc_altivec_vaddecuq, 84377}, // __builtin_altivec_vaddecuq
      {Intrinsic::ppc_altivec_vaddeuqm, 84404}, // __builtin_altivec_vaddeuqm
      {Intrinsic::ppc_altivec_vaddsbs, 84431}, // __builtin_altivec_vaddsbs
      {Intrinsic::ppc_altivec_vaddshs, 84457}, // __builtin_altivec_vaddshs
      {Intrinsic::ppc_altivec_vaddsws, 84483}, // __builtin_altivec_vaddsws
      {Intrinsic::ppc_altivec_vaddubs, 84509}, // __builtin_altivec_vaddubs
      {Intrinsic::ppc_altivec_vadduhs, 84535}, // __builtin_altivec_vadduhs
      {Intrinsic::ppc_altivec_vadduws, 84561}, // __builtin_altivec_vadduws
      {Intrinsic::ppc_altivec_vavgsb, 84587}, // __builtin_altivec_vavgsb
      {Intrinsic::ppc_altivec_vavgsh, 84612}, // __builtin_altivec_vavgsh
      {Intrinsic::ppc_altivec_vavgsw, 84637}, // __builtin_altivec_vavgsw
      {Intrinsic::ppc_altivec_vavgub, 84662}, // __builtin_altivec_vavgub
      {Intrinsic::ppc_altivec_vavguh, 84687}, // __builtin_altivec_vavguh
      {Intrinsic::ppc_altivec_vavguw, 84712}, // __builtin_altivec_vavguw
      {Intrinsic::ppc_altivec_vbpermq, 84737}, // __builtin_altivec_vbpermq
      {Intrinsic::ppc_altivec_vcfsx, 84763}, // __builtin_altivec_vcfsx
      {Intrinsic::ppc_altivec_vcfuged, 84787}, // __builtin_altivec_vcfuged
      {Intrinsic::ppc_altivec_vcfux, 84813}, // __builtin_altivec_vcfux
      {Intrinsic::ppc_altivec_vclrlb, 84837}, // __builtin_altivec_vclrlb
      {Intrinsic::ppc_altivec_vclrrb, 84862}, // __builtin_altivec_vclrrb
      {Intrinsic::ppc_altivec_vclzdm, 84887}, // __builtin_altivec_vclzdm
      {Intrinsic::ppc_altivec_vclzlsbb, 84912}, // __builtin_altivec_vclzlsbb
      {Intrinsic::ppc_altivec_vcmpbfp, 84939}, // __builtin_altivec_vcmpbfp
      {Intrinsic::ppc_altivec_vcmpbfp_p, 84965}, // __builtin_altivec_vcmpbfp_p
      {Intrinsic::ppc_altivec_vcmpeqfp, 84993}, // __builtin_altivec_vcmpeqfp
      {Intrinsic::ppc_altivec_vcmpeqfp_p, 85020}, // __builtin_altivec_vcmpeqfp_p
      {Intrinsic::ppc_altivec_vcmpequb, 85049}, // __builtin_altivec_vcmpequb
      {Intrinsic::ppc_altivec_vcmpequb_p, 85076}, // __builtin_altivec_vcmpequb_p
      {Intrinsic::ppc_altivec_vcmpequd, 85105}, // __builtin_altivec_vcmpequd
      {Intrinsic::ppc_altivec_vcmpequd_p, 85132}, // __builtin_altivec_vcmpequd_p
      {Intrinsic::ppc_altivec_vcmpequh, 85161}, // __builtin_altivec_vcmpequh
      {Intrinsic::ppc_altivec_vcmpequh_p, 85188}, // __builtin_altivec_vcmpequh_p
      {Intrinsic::ppc_altivec_vcmpequq, 85217}, // __builtin_altivec_vcmpequq
      {Intrinsic::ppc_altivec_vcmpequq_p, 85244}, // __builtin_altivec_vcmpequq_p
      {Intrinsic::ppc_altivec_vcmpequw, 85273}, // __builtin_altivec_vcmpequw
      {Intrinsic::ppc_altivec_vcmpequw_p, 85300}, // __builtin_altivec_vcmpequw_p
      {Intrinsic::ppc_altivec_vcmpgefp, 85329}, // __builtin_altivec_vcmpgefp
      {Intrinsic::ppc_altivec_vcmpgefp_p, 85356}, // __builtin_altivec_vcmpgefp_p
      {Intrinsic::ppc_altivec_vcmpgtfp, 85385}, // __builtin_altivec_vcmpgtfp
      {Intrinsic::ppc_altivec_vcmpgtfp_p, 85412}, // __builtin_altivec_vcmpgtfp_p
      {Intrinsic::ppc_altivec_vcmpgtsb, 85441}, // __builtin_altivec_vcmpgtsb
      {Intrinsic::ppc_altivec_vcmpgtsb_p, 85468}, // __builtin_altivec_vcmpgtsb_p
      {Intrinsic::ppc_altivec_vcmpgtsd, 85497}, // __builtin_altivec_vcmpgtsd
      {Intrinsic::ppc_altivec_vcmpgtsd_p, 85524}, // __builtin_altivec_vcmpgtsd_p
      {Intrinsic::ppc_altivec_vcmpgtsh, 85553}, // __builtin_altivec_vcmpgtsh
      {Intrinsic::ppc_altivec_vcmpgtsh_p, 85580}, // __builtin_altivec_vcmpgtsh_p
      {Intrinsic::ppc_altivec_vcmpgtsq, 85609}, // __builtin_altivec_vcmpgtsq
      {Intrinsic::ppc_altivec_vcmpgtsq_p, 85636}, // __builtin_altivec_vcmpgtsq_p
      {Intrinsic::ppc_altivec_vcmpgtsw, 85665}, // __builtin_altivec_vcmpgtsw
      {Intrinsic::ppc_altivec_vcmpgtsw_p, 85692}, // __builtin_altivec_vcmpgtsw_p
      {Intrinsic::ppc_altivec_vcmpgtub, 85721}, // __builtin_altivec_vcmpgtub
      {Intrinsic::ppc_altivec_vcmpgtub_p, 85748}, // __builtin_altivec_vcmpgtub_p
      {Intrinsic::ppc_altivec_vcmpgtud, 85777}, // __builtin_altivec_vcmpgtud
      {Intrinsic::ppc_altivec_vcmpgtud_p, 85804}, // __builtin_altivec_vcmpgtud_p
      {Intrinsic::ppc_altivec_vcmpgtuh, 85833}, // __builtin_altivec_vcmpgtuh
      {Intrinsic::ppc_altivec_vcmpgtuh_p, 85860}, // __builtin_altivec_vcmpgtuh_p
      {Intrinsic::ppc_altivec_vcmpgtuq, 85889}, // __builtin_altivec_vcmpgtuq
      {Intrinsic::ppc_altivec_vcmpgtuq_p, 85916}, // __builtin_altivec_vcmpgtuq_p
      {Intrinsic::ppc_altivec_vcmpgtuw, 85945}, // __builtin_altivec_vcmpgtuw
      {Intrinsic::ppc_altivec_vcmpgtuw_p, 85972}, // __builtin_altivec_vcmpgtuw_p
      {Intrinsic::ppc_altivec_vcmpneb, 86001}, // __builtin_altivec_vcmpneb
      {Intrinsic::ppc_altivec_vcmpneb_p, 86027}, // __builtin_altivec_vcmpneb_p
      {Intrinsic::ppc_altivec_vcmpneh, 86055}, // __builtin_altivec_vcmpneh
      {Intrinsic::ppc_altivec_vcmpneh_p, 86081}, // __builtin_altivec_vcmpneh_p
      {Intrinsic::ppc_altivec_vcmpnew, 86109}, // __builtin_altivec_vcmpnew
      {Intrinsic::ppc_altivec_vcmpnew_p, 86135}, // __builtin_altivec_vcmpnew_p
      {Intrinsic::ppc_altivec_vcmpnezb, 86163}, // __builtin_altivec_vcmpnezb
      {Intrinsic::ppc_altivec_vcmpnezb_p, 86190}, // __builtin_altivec_vcmpnezb_p
      {Intrinsic::ppc_altivec_vcmpnezh, 86219}, // __builtin_altivec_vcmpnezh
      {Intrinsic::ppc_altivec_vcmpnezh_p, 86246}, // __builtin_altivec_vcmpnezh_p
      {Intrinsic::ppc_altivec_vcmpnezw, 86275}, // __builtin_altivec_vcmpnezw
      {Intrinsic::ppc_altivec_vcmpnezw_p, 86302}, // __builtin_altivec_vcmpnezw_p
      {Intrinsic::ppc_altivec_vcntmbb, 86331}, // __builtin_altivec_vcntmbb
      {Intrinsic::ppc_altivec_vcntmbd, 86357}, // __builtin_altivec_vcntmbd
      {Intrinsic::ppc_altivec_vcntmbh, 86383}, // __builtin_altivec_vcntmbh
      {Intrinsic::ppc_altivec_vcntmbw, 86409}, // __builtin_altivec_vcntmbw
      {Intrinsic::ppc_altivec_vctsxs, 86435}, // __builtin_altivec_vctsxs
      {Intrinsic::ppc_altivec_vctuxs, 86460}, // __builtin_altivec_vctuxs
      {Intrinsic::ppc_altivec_vctzdm, 86485}, // __builtin_altivec_vctzdm
      {Intrinsic::ppc_altivec_vctzlsbb, 86510}, // __builtin_altivec_vctzlsbb
      {Intrinsic::ppc_altivec_vdivesd, 86537}, // __builtin_altivec_vdivesd
      {Intrinsic::ppc_altivec_vdivesq, 86563}, // __builtin_altivec_vdivesq
      {Intrinsic::ppc_altivec_vdivesw, 86589}, // __builtin_altivec_vdivesw
      {Intrinsic::ppc_altivec_vdiveud, 86615}, // __builtin_altivec_vdiveud
      {Intrinsic::ppc_altivec_vdiveuq, 86641}, // __builtin_altivec_vdiveuq
      {Intrinsic::ppc_altivec_vdiveuw, 86667}, // __builtin_altivec_vdiveuw
      {Intrinsic::ppc_altivec_vexpandbm, 86693}, // __builtin_altivec_vexpandbm
      {Intrinsic::ppc_altivec_vexpanddm, 86721}, // __builtin_altivec_vexpanddm
      {Intrinsic::ppc_altivec_vexpandhm, 86749}, // __builtin_altivec_vexpandhm
      {Intrinsic::ppc_altivec_vexpandqm, 86777}, // __builtin_altivec_vexpandqm
      {Intrinsic::ppc_altivec_vexpandwm, 86805}, // __builtin_altivec_vexpandwm
      {Intrinsic::ppc_altivec_vexptefp, 86833}, // __builtin_altivec_vexptefp
      {Intrinsic::ppc_altivec_vextddvlx, 86860}, // __builtin_altivec_vextddvlx
      {Intrinsic::ppc_altivec_vextddvrx, 86888}, // __builtin_altivec_vextddvrx
      {Intrinsic::ppc_altivec_vextdubvlx, 86916}, // __builtin_altivec_vextdubvlx
      {Intrinsic::ppc_altivec_vextdubvrx, 86945}, // __builtin_altivec_vextdubvrx
      {Intrinsic::ppc_altivec_vextduhvlx, 86974}, // __builtin_altivec_vextduhvlx
      {Intrinsic::ppc_altivec_vextduhvrx, 87003}, // __builtin_altivec_vextduhvrx
      {Intrinsic::ppc_altivec_vextduwvlx, 87032}, // __builtin_altivec_vextduwvlx
      {Intrinsic::ppc_altivec_vextduwvrx, 87061}, // __builtin_altivec_vextduwvrx
      {Intrinsic::ppc_altivec_vextractbm, 87090}, // __builtin_altivec_vextractbm
      {Intrinsic::ppc_altivec_vextractdm, 87119}, // __builtin_altivec_vextractdm
      {Intrinsic::ppc_altivec_vextracthm, 87148}, // __builtin_altivec_vextracthm
      {Intrinsic::ppc_altivec_vextractqm, 87177}, // __builtin_altivec_vextractqm
      {Intrinsic::ppc_altivec_vextractwm, 87206}, // __builtin_altivec_vextractwm
      {Intrinsic::ppc_altivec_vextsb2d, 87235}, // __builtin_altivec_vextsb2d
      {Intrinsic::ppc_altivec_vextsb2w, 87262}, // __builtin_altivec_vextsb2w
      {Intrinsic::ppc_altivec_vextsd2q, 87289}, // __builtin_altivec_vextsd2q
      {Intrinsic::ppc_altivec_vextsh2d, 87316}, // __builtin_altivec_vextsh2d
      {Intrinsic::ppc_altivec_vextsh2w, 87343}, // __builtin_altivec_vextsh2w
      {Intrinsic::ppc_altivec_vextsw2d, 87370}, // __builtin_altivec_vextsw2d
      {Intrinsic::ppc_altivec_vgbbd, 87397}, // __builtin_altivec_vgbbd
      {Intrinsic::ppc_altivec_vgnb, 87421}, // __builtin_altivec_vgnb
      {Intrinsic::ppc_altivec_vinsblx, 87444}, // __builtin_altivec_vinsblx
      {Intrinsic::ppc_altivec_vinsbrx, 87470}, // __builtin_altivec_vinsbrx
      {Intrinsic::ppc_altivec_vinsbvlx, 87496}, // __builtin_altivec_vinsbvlx
      {Intrinsic::ppc_altivec_vinsbvrx, 87523}, // __builtin_altivec_vinsbvrx
      {Intrinsic::ppc_altivec_vinsdlx, 87550}, // __builtin_altivec_vinsdlx
      {Intrinsic::ppc_altivec_vinsdrx, 87576}, // __builtin_altivec_vinsdrx
      {Intrinsic::ppc_altivec_vinshlx, 87602}, // __builtin_altivec_vinshlx
      {Intrinsic::ppc_altivec_vinshrx, 87628}, // __builtin_altivec_vinshrx
      {Intrinsic::ppc_altivec_vinshvlx, 87654}, // __builtin_altivec_vinshvlx
      {Intrinsic::ppc_altivec_vinshvrx, 87681}, // __builtin_altivec_vinshvrx
      {Intrinsic::ppc_altivec_vinswlx, 87708}, // __builtin_altivec_vinswlx
      {Intrinsic::ppc_altivec_vinswrx, 87734}, // __builtin_altivec_vinswrx
      {Intrinsic::ppc_altivec_vinswvlx, 87760}, // __builtin_altivec_vinswvlx
      {Intrinsic::ppc_altivec_vinswvrx, 87787}, // __builtin_altivec_vinswvrx
      {Intrinsic::ppc_altivec_vlogefp, 87814}, // __builtin_altivec_vlogefp
      {Intrinsic::ppc_altivec_vmaddfp, 87840}, // __builtin_altivec_vmaddfp
      {Intrinsic::ppc_altivec_vmaxfp, 87866}, // __builtin_altivec_vmaxfp
      {Intrinsic::ppc_altivec_vmaxsb, 87891}, // __builtin_altivec_vmaxsb
      {Intrinsic::ppc_altivec_vmaxsd, 87916}, // __builtin_altivec_vmaxsd
      {Intrinsic::ppc_altivec_vmaxsh, 87941}, // __builtin_altivec_vmaxsh
      {Intrinsic::ppc_altivec_vmaxsw, 87966}, // __builtin_altivec_vmaxsw
      {Intrinsic::ppc_altivec_vmaxub, 87991}, // __builtin_altivec_vmaxub
      {Intrinsic::ppc_altivec_vmaxud, 88016}, // __builtin_altivec_vmaxud
      {Intrinsic::ppc_altivec_vmaxuh, 88041}, // __builtin_altivec_vmaxuh
      {Intrinsic::ppc_altivec_vmaxuw, 88066}, // __builtin_altivec_vmaxuw
      {Intrinsic::ppc_altivec_vmhaddshs, 88091}, // __builtin_altivec_vmhaddshs
      {Intrinsic::ppc_altivec_vmhraddshs, 88119}, // __builtin_altivec_vmhraddshs
      {Intrinsic::ppc_altivec_vminfp, 88148}, // __builtin_altivec_vminfp
      {Intrinsic::ppc_altivec_vminsb, 88173}, // __builtin_altivec_vminsb
      {Intrinsic::ppc_altivec_vminsd, 88198}, // __builtin_altivec_vminsd
      {Intrinsic::ppc_altivec_vminsh, 88223}, // __builtin_altivec_vminsh
      {Intrinsic::ppc_altivec_vminsw, 88248}, // __builtin_altivec_vminsw
      {Intrinsic::ppc_altivec_vminub, 88273}, // __builtin_altivec_vminub
      {Intrinsic::ppc_altivec_vminud, 88298}, // __builtin_altivec_vminud
      {Intrinsic::ppc_altivec_vminuh, 88323}, // __builtin_altivec_vminuh
      {Intrinsic::ppc_altivec_vminuw, 88348}, // __builtin_altivec_vminuw
      {Intrinsic::ppc_altivec_vmladduhm, 88373}, // __builtin_altivec_vmladduhm
      {Intrinsic::ppc_altivec_vmsumcud, 88401}, // __builtin_altivec_vmsumcud
      {Intrinsic::ppc_altivec_vmsummbm, 88428}, // __builtin_altivec_vmsummbm
      {Intrinsic::ppc_altivec_vmsumshm, 88455}, // __builtin_altivec_vmsumshm
      {Intrinsic::ppc_altivec_vmsumshs, 88482}, // __builtin_altivec_vmsumshs
      {Intrinsic::ppc_altivec_vmsumubm, 88509}, // __builtin_altivec_vmsumubm
      {Intrinsic::ppc_altivec_vmsumudm, 88536}, // __builtin_altivec_vmsumudm
      {Intrinsic::ppc_altivec_vmsumuhm, 88563}, // __builtin_altivec_vmsumuhm
      {Intrinsic::ppc_altivec_vmsumuhs, 88590}, // __builtin_altivec_vmsumuhs
      {Intrinsic::ppc_altivec_vmulesb, 88617}, // __builtin_altivec_vmulesb
      {Intrinsic::ppc_altivec_vmulesd, 88643}, // __builtin_altivec_vmulesd
      {Intrinsic::ppc_altivec_vmulesh, 88669}, // __builtin_altivec_vmulesh
      {Intrinsic::ppc_altivec_vmulesw, 88695}, // __builtin_altivec_vmulesw
      {Intrinsic::ppc_altivec_vmuleub, 88721}, // __builtin_altivec_vmuleub
      {Intrinsic::ppc_altivec_vmuleud, 88747}, // __builtin_altivec_vmuleud
      {Intrinsic::ppc_altivec_vmuleuh, 88773}, // __builtin_altivec_vmuleuh
      {Intrinsic::ppc_altivec_vmuleuw, 88799}, // __builtin_altivec_vmuleuw
      {Intrinsic::ppc_altivec_vmulhsd, 88825}, // __builtin_altivec_vmulhsd
      {Intrinsic::ppc_altivec_vmulhsw, 88851}, // __builtin_altivec_vmulhsw
      {Intrinsic::ppc_altivec_vmulhud, 88877}, // __builtin_altivec_vmulhud
      {Intrinsic::ppc_altivec_vmulhuw, 88903}, // __builtin_altivec_vmulhuw
      {Intrinsic::ppc_altivec_vmulosb, 88929}, // __builtin_altivec_vmulosb
      {Intrinsic::ppc_altivec_vmulosd, 88955}, // __builtin_altivec_vmulosd
      {Intrinsic::ppc_altivec_vmulosh, 88981}, // __builtin_altivec_vmulosh
      {Intrinsic::ppc_altivec_vmulosw, 89007}, // __builtin_altivec_vmulosw
      {Intrinsic::ppc_altivec_vmuloub, 89033}, // __builtin_altivec_vmuloub
      {Intrinsic::ppc_altivec_vmuloud, 89059}, // __builtin_altivec_vmuloud
      {Intrinsic::ppc_altivec_vmulouh, 89085}, // __builtin_altivec_vmulouh
      {Intrinsic::ppc_altivec_vmulouw, 89111}, // __builtin_altivec_vmulouw
      {Intrinsic::ppc_altivec_vnmsubfp, 89137}, // __builtin_altivec_vnmsubfp
      {Intrinsic::ppc_altivec_vpdepd, 89164}, // __builtin_altivec_vpdepd
      {Intrinsic::ppc_altivec_vperm, 89189}, // __builtin_altivec_vperm_4si
      {Intrinsic::ppc_altivec_vpextd, 89217}, // __builtin_altivec_vpextd
      {Intrinsic::ppc_altivec_vpkpx, 89242}, // __builtin_altivec_vpkpx
      {Intrinsic::ppc_altivec_vpksdss, 89266}, // __builtin_altivec_vpksdss
      {Intrinsic::ppc_altivec_vpksdus, 89292}, // __builtin_altivec_vpksdus
      {Intrinsic::ppc_altivec_vpkshss, 89318}, // __builtin_altivec_vpkshss
      {Intrinsic::ppc_altivec_vpkshus, 89344}, // __builtin_altivec_vpkshus
      {Intrinsic::ppc_altivec_vpkswss, 89370}, // __builtin_altivec_vpkswss
      {Intrinsic::ppc_altivec_vpkswus, 89396}, // __builtin_altivec_vpkswus
      {Intrinsic::ppc_altivec_vpkudus, 89422}, // __builtin_altivec_vpkudus
      {Intrinsic::ppc_altivec_vpkuhus, 89448}, // __builtin_altivec_vpkuhus
      {Intrinsic::ppc_altivec_vpkuwus, 89474}, // __builtin_altivec_vpkuwus
      {Intrinsic::ppc_altivec_vprtybd, 89500}, // __builtin_altivec_vprtybd
      {Intrinsic::ppc_altivec_vprtybq, 89526}, // __builtin_altivec_vprtybq
      {Intrinsic::ppc_altivec_vprtybw, 89552}, // __builtin_altivec_vprtybw
      {Intrinsic::ppc_altivec_vrefp, 89578}, // __builtin_altivec_vrefp
      {Intrinsic::ppc_altivec_vrfim, 89602}, // __builtin_altivec_vrfim
      {Intrinsic::ppc_altivec_vrfin, 89626}, // __builtin_altivec_vrfin
      {Intrinsic::ppc_altivec_vrfip, 89650}, // __builtin_altivec_vrfip
      {Intrinsic::ppc_altivec_vrfiz, 89674}, // __builtin_altivec_vrfiz
      {Intrinsic::ppc_altivec_vrlb, 89698}, // __builtin_altivec_vrlb
      {Intrinsic::ppc_altivec_vrld, 89721}, // __builtin_altivec_vrld
      {Intrinsic::ppc_altivec_vrldmi, 89744}, // __builtin_altivec_vrldmi
      {Intrinsic::ppc_altivec_vrldnm, 89769}, // __builtin_altivec_vrldnm
      {Intrinsic::ppc_altivec_vrlh, 89794}, // __builtin_altivec_vrlh
      {Intrinsic::ppc_altivec_vrlqmi, 89817}, // __builtin_altivec_vrlqmi
      {Intrinsic::ppc_altivec_vrlqnm, 89842}, // __builtin_altivec_vrlqnm
      {Intrinsic::ppc_altivec_vrlw, 89867}, // __builtin_altivec_vrlw
      {Intrinsic::ppc_altivec_vrlwmi, 89890}, // __builtin_altivec_vrlwmi
      {Intrinsic::ppc_altivec_vrlwnm, 89915}, // __builtin_altivec_vrlwnm
      {Intrinsic::ppc_altivec_vrsqrtefp, 89940}, // __builtin_altivec_vrsqrtefp
      {Intrinsic::ppc_altivec_vsel, 89968}, // __builtin_altivec_vsel_4si
      {Intrinsic::ppc_altivec_vsl, 89995}, // __builtin_altivec_vsl
      {Intrinsic::ppc_altivec_vslb, 90017}, // __builtin_altivec_vslb
      {Intrinsic::ppc_altivec_vsldbi, 90040}, // __builtin_altivec_vsldbi
      {Intrinsic::ppc_altivec_vslh, 90065}, // __builtin_altivec_vslh
      {Intrinsic::ppc_altivec_vslo, 90088}, // __builtin_altivec_vslo
      {Intrinsic::ppc_altivec_vslv, 90111}, // __builtin_altivec_vslv
      {Intrinsic::ppc_altivec_vslw, 90134}, // __builtin_altivec_vslw
      {Intrinsic::ppc_altivec_vsr, 90157}, // __builtin_altivec_vsr
      {Intrinsic::ppc_altivec_vsrab, 90179}, // __builtin_altivec_vsrab
      {Intrinsic::ppc_altivec_vsrah, 90203}, // __builtin_altivec_vsrah
      {Intrinsic::ppc_altivec_vsraw, 90227}, // __builtin_altivec_vsraw
      {Intrinsic::ppc_altivec_vsrb, 90251}, // __builtin_altivec_vsrb
      {Intrinsic::ppc_altivec_vsrdbi, 90274}, // __builtin_altivec_vsrdbi
      {Intrinsic::ppc_altivec_vsrh, 90299}, // __builtin_altivec_vsrh
      {Intrinsic::ppc_altivec_vsro, 90322}, // __builtin_altivec_vsro
      {Intrinsic::ppc_altivec_vsrv, 90345}, // __builtin_altivec_vsrv
      {Intrinsic::ppc_altivec_vsrw, 90368}, // __builtin_altivec_vsrw
      {Intrinsic::ppc_altivec_vstribl, 90391}, // __builtin_altivec_vstribl
      {Intrinsic::ppc_altivec_vstribl_p, 90417}, // __builtin_altivec_vstribl_p
      {Intrinsic::ppc_altivec_vstribr, 90445}, // __builtin_altivec_vstribr
      {Intrinsic::ppc_altivec_vstribr_p, 90471}, // __builtin_altivec_vstribr_p
      {Intrinsic::ppc_altivec_vstrihl, 90499}, // __builtin_altivec_vstrihl
      {Intrinsic::ppc_altivec_vstrihl_p, 90525}, // __builtin_altivec_vstrihl_p
      {Intrinsic::ppc_altivec_vstrihr, 90553}, // __builtin_altivec_vstrihr
      {Intrinsic::ppc_altivec_vstrihr_p, 90579}, // __builtin_altivec_vstrihr_p
      {Intrinsic::ppc_altivec_vsubcuq, 90607}, // __builtin_altivec_vsubcuq
      {Intrinsic::ppc_altivec_vsubcuw, 90633}, // __builtin_altivec_vsubcuw
      {Intrinsic::ppc_altivec_vsubecuq, 90659}, // __builtin_altivec_vsubecuq
      {Intrinsic::ppc_altivec_vsubeuqm, 90686}, // __builtin_altivec_vsubeuqm
      {Intrinsic::ppc_altivec_vsubsbs, 90713}, // __builtin_altivec_vsubsbs
      {Intrinsic::ppc_altivec_vsubshs, 90739}, // __builtin_altivec_vsubshs
      {Intrinsic::ppc_altivec_vsubsws, 90765}, // __builtin_altivec_vsubsws
      {Intrinsic::ppc_altivec_vsububs, 90791}, // __builtin_altivec_vsububs
      {Intrinsic::ppc_altivec_vsubuhs, 90817}, // __builtin_altivec_vsubuhs
      {Intrinsic::ppc_altivec_vsubuws, 90843}, // __builtin_altivec_vsubuws
      {Intrinsic::ppc_altivec_vsum2sws, 90869}, // __builtin_altivec_vsum2sws
      {Intrinsic::ppc_altivec_vsum4sbs, 90896}, // __builtin_altivec_vsum4sbs
      {Intrinsic::ppc_altivec_vsum4shs, 90923}, // __builtin_altivec_vsum4shs
      {Intrinsic::ppc_altivec_vsum4ubs, 90950}, // __builtin_altivec_vsum4ubs
      {Intrinsic::ppc_altivec_vsumsws, 90977}, // __builtin_altivec_vsumsws
      {Intrinsic::ppc_altivec_vupkhpx, 91003}, // __builtin_altivec_vupkhpx
      {Intrinsic::ppc_altivec_vupkhsb, 91029}, // __builtin_altivec_vupkhsb
      {Intrinsic::ppc_altivec_vupkhsh, 91055}, // __builtin_altivec_vupkhsh
      {Intrinsic::ppc_altivec_vupkhsw, 91081}, // __builtin_altivec_vupkhsw
      {Intrinsic::ppc_altivec_vupklpx, 91107}, // __builtin_altivec_vupklpx
      {Intrinsic::ppc_altivec_vupklsb, 91133}, // __builtin_altivec_vupklsb
      {Intrinsic::ppc_altivec_vupklsh, 91159}, // __builtin_altivec_vupklsh
      {Intrinsic::ppc_altivec_vupklsw, 91185}, // __builtin_altivec_vupklsw
      {Intrinsic::ppc_bpermd, 91211}, // __builtin_bpermd
      {Intrinsic::ppc_cfuged, 91228}, // __builtin_cfuged
      {Intrinsic::ppc_cntlzdm, 91245}, // __builtin_cntlzdm
      {Intrinsic::ppc_cnttzdm, 91263}, // __builtin_cnttzdm
      {Intrinsic::ppc_dcbf, 91281}, // __builtin_dcbf
      {Intrinsic::ppc_divde, 91296}, // __builtin_divde
      {Intrinsic::ppc_divdeu, 91312}, // __builtin_divdeu
      {Intrinsic::ppc_divf128_round_to_odd, 91329}, // __builtin_divf128_round_to_odd
      {Intrinsic::ppc_divwe, 91360}, // __builtin_divwe
      {Intrinsic::ppc_divweu, 91376}, // __builtin_divweu
      {Intrinsic::ppc_fmaf128_round_to_odd, 91393}, // __builtin_fmaf128_round_to_odd
      {Intrinsic::ppc_get_texasr, 91424}, // __builtin_get_texasr
      {Intrinsic::ppc_get_texasru, 91445}, // __builtin_get_texasru
      {Intrinsic::ppc_get_tfhar, 91467}, // __builtin_get_tfhar
      {Intrinsic::ppc_get_tfiar, 91487}, // __builtin_get_tfiar
      {Intrinsic::ppc_mulf128_round_to_odd, 91507}, // __builtin_mulf128_round_to_odd
      {Intrinsic::ppc_pdepd, 91538}, // __builtin_pdepd
      {Intrinsic::ppc_pextd, 91554}, // __builtin_pextd
      {Intrinsic::ppc_readflm, 91570}, // __builtin_readflm
      {Intrinsic::ppc_set_texasr, 91657}, // __builtin_set_texasr
      {Intrinsic::ppc_set_texasru, 91678}, // __builtin_set_texasru
      {Intrinsic::ppc_set_tfhar, 91700}, // __builtin_set_tfhar
      {Intrinsic::ppc_set_tfiar, 91720}, // __builtin_set_tfiar
      {Intrinsic::ppc_setflm, 91740}, // __builtin_setflm
      {Intrinsic::ppc_setrnd, 91757}, // __builtin_setrnd
      {Intrinsic::ppc_sqrtf128_round_to_odd, 91774}, // __builtin_sqrtf128_round_to_odd
      {Intrinsic::ppc_subf128_round_to_odd, 91806}, // __builtin_subf128_round_to_odd
      {Intrinsic::ppc_tabort, 91837}, // __builtin_tabort
      {Intrinsic::ppc_tabortdc, 91854}, // __builtin_tabortdc
      {Intrinsic::ppc_tabortdci, 91873}, // __builtin_tabortdci
      {Intrinsic::ppc_tabortwc, 91893}, // __builtin_tabortwc
      {Intrinsic::ppc_tabortwci, 91912}, // __builtin_tabortwci
      {Intrinsic::ppc_tbegin, 91932}, // __builtin_tbegin
      {Intrinsic::ppc_tcheck, 91949}, // __builtin_tcheck
      {Intrinsic::ppc_tend, 91966}, // __builtin_tend
      {Intrinsic::ppc_tendall, 91981}, // __builtin_tendall
      {Intrinsic::ppc_trechkpt, 91999}, // __builtin_trechkpt
      {Intrinsic::ppc_treclaim, 92018}, // __builtin_treclaim
      {Intrinsic::ppc_tresume, 92037}, // __builtin_tresume
      {Intrinsic::ppc_truncf128_round_to_odd, 92055}, // __builtin_truncf128_round_to_odd
      {Intrinsic::ppc_tsr, 92088}, // __builtin_tsr
      {Intrinsic::ppc_tsuspend, 92102}, // __builtin_tsuspend
      {Intrinsic::ppc_ttest, 92121}, // __builtin_ttest
      {Intrinsic::ppc_scalar_extract_expq, 91588}, // __builtin_vsx_scalar_extract_expq
      {Intrinsic::ppc_scalar_insert_exp_qp, 91622}, // __builtin_vsx_scalar_insert_exp_qp
      {Intrinsic::ppc_vsx_xsmaxdp, 92137}, // __builtin_vsx_xsmaxdp
      {Intrinsic::ppc_vsx_xsmindp, 92159}, // __builtin_vsx_xsmindp
      {Intrinsic::ppc_vsx_xvcmpeqdp, 92181}, // __builtin_vsx_xvcmpeqdp
      {Intrinsic::ppc_vsx_xvcmpeqdp_p, 92205}, // __builtin_vsx_xvcmpeqdp_p
      {Intrinsic::ppc_vsx_xvcmpeqsp, 92231}, // __builtin_vsx_xvcmpeqsp
      {Intrinsic::ppc_vsx_xvcmpeqsp_p, 92255}, // __builtin_vsx_xvcmpeqsp_p
      {Intrinsic::ppc_vsx_xvcmpgedp, 92281}, // __builtin_vsx_xvcmpgedp
      {Intrinsic::ppc_vsx_xvcmpgedp_p, 92305}, // __builtin_vsx_xvcmpgedp_p
      {Intrinsic::ppc_vsx_xvcmpgesp, 92331}, // __builtin_vsx_xvcmpgesp
      {Intrinsic::ppc_vsx_xvcmpgesp_p, 92355}, // __builtin_vsx_xvcmpgesp_p
      {Intrinsic::ppc_vsx_xvcmpgtdp, 92381}, // __builtin_vsx_xvcmpgtdp
      {Intrinsic::ppc_vsx_xvcmpgtdp_p, 92405}, // __builtin_vsx_xvcmpgtdp_p
      {Intrinsic::ppc_vsx_xvcmpgtsp, 92431}, // __builtin_vsx_xvcmpgtsp
      {Intrinsic::ppc_vsx_xvcmpgtsp_p, 92455}, // __builtin_vsx_xvcmpgtsp_p
      {Intrinsic::ppc_vsx_xvcvbf16spn, 92481}, // __builtin_vsx_xvcvbf16spn
      {Intrinsic::ppc_vsx_xvcvdpsp, 92507}, // __builtin_vsx_xvcvdpsp
      {Intrinsic::ppc_vsx_xvcvdpsxws, 92530}, // __builtin_vsx_xvcvdpsxws
      {Intrinsic::ppc_vsx_xvcvdpuxws, 92555}, // __builtin_vsx_xvcvdpuxws
      {Intrinsic::ppc_vsx_xvcvhpsp, 92580}, // __builtin_vsx_xvcvhpsp
      {Intrinsic::ppc_vsx_xvcvspbf16, 92603}, // __builtin_vsx_xvcvspbf16
      {Intrinsic::ppc_vsx_xvcvspdp, 92628}, // __builtin_vsx_xvcvspdp
      {Intrinsic::ppc_vsx_xvcvsphp, 92651}, // __builtin_vsx_xvcvsphp
      {Intrinsic::ppc_vsx_xvcvsxdsp, 92674}, // __builtin_vsx_xvcvsxdsp
      {Intrinsic::ppc_vsx_xvcvsxwdp, 92698}, // __builtin_vsx_xvcvsxwdp
      {Intrinsic::ppc_vsx_xvcvuxdsp, 92722}, // __builtin_vsx_xvcvuxdsp
      {Intrinsic::ppc_vsx_xvcvuxwdp, 92746}, // __builtin_vsx_xvcvuxwdp
      {Intrinsic::ppc_vsx_xvdivdp, 92770}, // __builtin_vsx_xvdivdp
      {Intrinsic::ppc_vsx_xvdivsp, 92792}, // __builtin_vsx_xvdivsp
      {Intrinsic::ppc_vsx_xviexpdp, 92814}, // __builtin_vsx_xviexpdp
      {Intrinsic::ppc_vsx_xviexpsp, 92837}, // __builtin_vsx_xviexpsp
      {Intrinsic::ppc_vsx_xvmaxdp, 92860}, // __builtin_vsx_xvmaxdp
      {Intrinsic::ppc_vsx_xvmaxsp, 92882}, // __builtin_vsx_xvmaxsp
      {Intrinsic::ppc_vsx_xvmindp, 92904}, // __builtin_vsx_xvmindp
      {Intrinsic::ppc_vsx_xvminsp, 92926}, // __builtin_vsx_xvminsp
      {Intrinsic::ppc_vsx_xvredp, 92948}, // __builtin_vsx_xvredp
      {Intrinsic::ppc_vsx_xvresp, 92969}, // __builtin_vsx_xvresp
      {Intrinsic::ppc_vsx_xvrsqrtedp, 92990}, // __builtin_vsx_xvrsqrtedp
      {Intrinsic::ppc_vsx_xvrsqrtesp, 93015}, // __builtin_vsx_xvrsqrtesp
      {Intrinsic::ppc_vsx_xvtdivdp, 93040}, // __builtin_vsx_xvtdivdp
      {Intrinsic::ppc_vsx_xvtdivsp, 93063}, // __builtin_vsx_xvtdivsp
      {Intrinsic::ppc_vsx_xvtlsbb, 93086}, // __builtin_vsx_xvtlsbb
      {Intrinsic::ppc_vsx_xvtsqrtdp, 93108}, // __builtin_vsx_xvtsqrtdp
      {Intrinsic::ppc_vsx_xvtsqrtsp, 93132}, // __builtin_vsx_xvtsqrtsp
      {Intrinsic::ppc_vsx_xvtstdcdp, 93156}, // __builtin_vsx_xvtstdcdp
      {Intrinsic::ppc_vsx_xvtstdcsp, 93180}, // __builtin_vsx_xvtstdcsp
      {Intrinsic::ppc_vsx_xvxexpdp, 93204}, // __builtin_vsx_xvxexpdp
      {Intrinsic::ppc_vsx_xvxexpsp, 93227}, // __builtin_vsx_xvxexpsp
      {Intrinsic::ppc_vsx_xvxsigdp, 93250}, // __builtin_vsx_xvxsigdp
      {Intrinsic::ppc_vsx_xvxsigsp, 93273}, // __builtin_vsx_xvxsigsp
      {Intrinsic::ppc_vsx_xxblendvb, 93296}, // __builtin_vsx_xxblendvb
      {Intrinsic::ppc_vsx_xxblendvd, 93320}, // __builtin_vsx_xxblendvd
      {Intrinsic::ppc_vsx_xxblendvh, 93344}, // __builtin_vsx_xxblendvh
      {Intrinsic::ppc_vsx_xxblendvw, 93368}, // __builtin_vsx_xxblendvw
      {Intrinsic::ppc_vsx_xxeval, 93392}, // __builtin_vsx_xxeval
      {Intrinsic::ppc_vsx_xxextractuw, 93413}, // __builtin_vsx_xxextractuw
      {Intrinsic::ppc_vsx_xxgenpcvbm, 93439}, // __builtin_vsx_xxgenpcvbm
      {Intrinsic::ppc_vsx_xxgenpcvdm, 93464}, // __builtin_vsx_xxgenpcvdm
      {Intrinsic::ppc_vsx_xxgenpcvhm, 93489}, // __builtin_vsx_xxgenpcvhm
      {Intrinsic::ppc_vsx_xxgenpcvwm, 93514}, // __builtin_vsx_xxgenpcvwm
      {Intrinsic::ppc_vsx_xxinsertw, 93539}, // __builtin_vsx_xxinsertw
      {Intrinsic::ppc_vsx_xxleqv, 93563}, // __builtin_vsx_xxleqv
      {Intrinsic::ppc_vsx_xxpermx, 93584}, // __builtin_vsx_xxpermx
    };
    auto I = std::lower_bound(std::begin(ppcNames),
                              std::end(ppcNames),
                              BuiltinNameStr);
    if (I != std::end(ppcNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "r600") {
    static const BuiltinEntry r600Names[] = {
      {Intrinsic::r600_group_barrier, 93606}, // __builtin_r600_group_barrier
      {Intrinsic::r600_implicitarg_ptr, 93635}, // __builtin_r600_implicitarg_ptr
      {Intrinsic::r600_rat_store_typed, 93666}, // __builtin_r600_rat_store_typed
      {Intrinsic::r600_read_global_size_x, 93697}, // __builtin_r600_read_global_size_x
      {Intrinsic::r600_read_global_size_y, 93731}, // __builtin_r600_read_global_size_y
      {Intrinsic::r600_read_global_size_z, 93765}, // __builtin_r600_read_global_size_z
      {Intrinsic::r600_read_ngroups_x, 93799}, // __builtin_r600_read_ngroups_x
      {Intrinsic::r600_read_ngroups_y, 93829}, // __builtin_r600_read_ngroups_y
      {Intrinsic::r600_read_ngroups_z, 93859}, // __builtin_r600_read_ngroups_z
      {Intrinsic::r600_read_tgid_x, 93889}, // __builtin_r600_read_tgid_x
      {Intrinsic::r600_read_tgid_y, 93916}, // __builtin_r600_read_tgid_y
      {Intrinsic::r600_read_tgid_z, 93943}, // __builtin_r600_read_tgid_z
    };
    auto I = std::lower_bound(std::begin(r600Names),
                              std::end(r600Names),
                              BuiltinNameStr);
    if (I != std::end(r600Names) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "s390") {
    static const BuiltinEntry s390Names[] = {
      {Intrinsic::s390_efpc, 93970}, // __builtin_s390_efpc
      {Intrinsic::s390_lcbb, 94017}, // __builtin_s390_lcbb
      {Intrinsic::s390_sfpc, 94057}, // __builtin_s390_sfpc
      {Intrinsic::s390_vaccb, 94077}, // __builtin_s390_vaccb
      {Intrinsic::s390_vacccq, 94098}, // __builtin_s390_vacccq
      {Intrinsic::s390_vaccf, 94120}, // __builtin_s390_vaccf
      {Intrinsic::s390_vaccg, 94141}, // __builtin_s390_vaccg
      {Intrinsic::s390_vacch, 94162}, // __builtin_s390_vacch
      {Intrinsic::s390_vaccq, 94183}, // __builtin_s390_vaccq
      {Intrinsic::s390_vacq, 94204}, // __builtin_s390_vacq
      {Intrinsic::s390_vaq, 94224}, // __builtin_s390_vaq
      {Intrinsic::s390_vavgb, 94243}, // __builtin_s390_vavgb
      {Intrinsic::s390_vavgf, 94264}, // __builtin_s390_vavgf
      {Intrinsic::s390_vavgg, 94285}, // __builtin_s390_vavgg
      {Intrinsic::s390_vavgh, 94306}, // __builtin_s390_vavgh
      {Intrinsic::s390_vavglb, 94327}, // __builtin_s390_vavglb
      {Intrinsic::s390_vavglf, 94349}, // __builtin_s390_vavglf
      {Intrinsic::s390_vavglg, 94371}, // __builtin_s390_vavglg
      {Intrinsic::s390_vavglh, 94393}, // __builtin_s390_vavglh
      {Intrinsic::s390_vbperm, 94415}, // __builtin_s390_vbperm
      {Intrinsic::s390_vcksm, 94437}, // __builtin_s390_vcksm
      {Intrinsic::s390_verimb, 94458}, // __builtin_s390_verimb
      {Intrinsic::s390_verimf, 94480}, // __builtin_s390_verimf
      {Intrinsic::s390_verimg, 94502}, // __builtin_s390_verimg
      {Intrinsic::s390_verimh, 94524}, // __builtin_s390_verimh
      {Intrinsic::s390_verllb, 94546}, // __builtin_s390_verllb
      {Intrinsic::s390_verllf, 94568}, // __builtin_s390_verllf
      {Intrinsic::s390_verllg, 94590}, // __builtin_s390_verllg
      {Intrinsic::s390_verllh, 94612}, // __builtin_s390_verllh
      {Intrinsic::s390_verllvb, 94634}, // __builtin_s390_verllvb
      {Intrinsic::s390_verllvf, 94657}, // __builtin_s390_verllvf
      {Intrinsic::s390_verllvg, 94680}, // __builtin_s390_verllvg
      {Intrinsic::s390_verllvh, 94703}, // __builtin_s390_verllvh
      {Intrinsic::s390_vfaeb, 94726}, // __builtin_s390_vfaeb
      {Intrinsic::s390_vfaef, 94747}, // __builtin_s390_vfaef
      {Intrinsic::s390_vfaeh, 94768}, // __builtin_s390_vfaeh
      {Intrinsic::s390_vfaezb, 94789}, // __builtin_s390_vfaezb
      {Intrinsic::s390_vfaezf, 94811}, // __builtin_s390_vfaezf
      {Intrinsic::s390_vfaezh, 94833}, // __builtin_s390_vfaezh
      {Intrinsic::s390_vfeeb, 94855}, // __builtin_s390_vfeeb
      {Intrinsic::s390_vfeef, 94876}, // __builtin_s390_vfeef
      {Intrinsic::s390_vfeeh, 94897}, // __builtin_s390_vfeeh
      {Intrinsic::s390_vfeezb, 94918}, // __builtin_s390_vfeezb
      {Intrinsic::s390_vfeezf, 94940}, // __builtin_s390_vfeezf
      {Intrinsic::s390_vfeezh, 94962}, // __builtin_s390_vfeezh
      {Intrinsic::s390_vfeneb, 94984}, // __builtin_s390_vfeneb
      {Intrinsic::s390_vfenef, 95006}, // __builtin_s390_vfenef
      {Intrinsic::s390_vfeneh, 95028}, // __builtin_s390_vfeneh
      {Intrinsic::s390_vfenezb, 95050}, // __builtin_s390_vfenezb
      {Intrinsic::s390_vfenezf, 95073}, // __builtin_s390_vfenezf
      {Intrinsic::s390_vfenezh, 95096}, // __builtin_s390_vfenezh
      {Intrinsic::s390_vgfmab, 95119}, // __builtin_s390_vgfmab
      {Intrinsic::s390_vgfmaf, 95141}, // __builtin_s390_vgfmaf
      {Intrinsic::s390_vgfmag, 95163}, // __builtin_s390_vgfmag
      {Intrinsic::s390_vgfmah, 95185}, // __builtin_s390_vgfmah
      {Intrinsic::s390_vgfmb, 95207}, // __builtin_s390_vgfmb
      {Intrinsic::s390_vgfmf, 95228}, // __builtin_s390_vgfmf
      {Intrinsic::s390_vgfmg, 95249}, // __builtin_s390_vgfmg
      {Intrinsic::s390_vgfmh, 95270}, // __builtin_s390_vgfmh
      {Intrinsic::s390_vistrb, 95291}, // __builtin_s390_vistrb
      {Intrinsic::s390_vistrf, 95313}, // __builtin_s390_vistrf
      {Intrinsic::s390_vistrh, 95335}, // __builtin_s390_vistrh
      {Intrinsic::s390_vlbb, 95357}, // __builtin_s390_vlbb
      {Intrinsic::s390_vll, 95377}, // __builtin_s390_vll
      {Intrinsic::s390_vlrl, 95396}, // __builtin_s390_vlrl
      {Intrinsic::s390_vmaeb, 95416}, // __builtin_s390_vmaeb
      {Intrinsic::s390_vmaef, 95437}, // __builtin_s390_vmaef
      {Intrinsic::s390_vmaeh, 95458}, // __builtin_s390_vmaeh
      {Intrinsic::s390_vmahb, 95479}, // __builtin_s390_vmahb
      {Intrinsic::s390_vmahf, 95500}, // __builtin_s390_vmahf
      {Intrinsic::s390_vmahh, 95521}, // __builtin_s390_vmahh
      {Intrinsic::s390_vmaleb, 95542}, // __builtin_s390_vmaleb
      {Intrinsic::s390_vmalef, 95564}, // __builtin_s390_vmalef
      {Intrinsic::s390_vmaleh, 95586}, // __builtin_s390_vmaleh
      {Intrinsic::s390_vmalhb, 95608}, // __builtin_s390_vmalhb
      {Intrinsic::s390_vmalhf, 95630}, // __builtin_s390_vmalhf
      {Intrinsic::s390_vmalhh, 95652}, // __builtin_s390_vmalhh
      {Intrinsic::s390_vmalob, 95674}, // __builtin_s390_vmalob
      {Intrinsic::s390_vmalof, 95696}, // __builtin_s390_vmalof
      {Intrinsic::s390_vmaloh, 95718}, // __builtin_s390_vmaloh
      {Intrinsic::s390_vmaob, 95740}, // __builtin_s390_vmaob
      {Intrinsic::s390_vmaof, 95761}, // __builtin_s390_vmaof
      {Intrinsic::s390_vmaoh, 95782}, // __builtin_s390_vmaoh
      {Intrinsic::s390_vmeb, 95803}, // __builtin_s390_vmeb
      {Intrinsic::s390_vmef, 95823}, // __builtin_s390_vmef
      {Intrinsic::s390_vmeh, 95843}, // __builtin_s390_vmeh
      {Intrinsic::s390_vmhb, 95863}, // __builtin_s390_vmhb
      {Intrinsic::s390_vmhf, 95883}, // __builtin_s390_vmhf
      {Intrinsic::s390_vmhh, 95903}, // __builtin_s390_vmhh
      {Intrinsic::s390_vmleb, 95923}, // __builtin_s390_vmleb
      {Intrinsic::s390_vmlef, 95944}, // __builtin_s390_vmlef
      {Intrinsic::s390_vmleh, 95965}, // __builtin_s390_vmleh
      {Intrinsic::s390_vmlhb, 95986}, // __builtin_s390_vmlhb
      {Intrinsic::s390_vmlhf, 96007}, // __builtin_s390_vmlhf
      {Intrinsic::s390_vmlhh, 96028}, // __builtin_s390_vmlhh
      {Intrinsic::s390_vmlob, 96049}, // __builtin_s390_vmlob
      {Intrinsic::s390_vmlof, 96070}, // __builtin_s390_vmlof
      {Intrinsic::s390_vmloh, 96091}, // __builtin_s390_vmloh
      {Intrinsic::s390_vmob, 96112}, // __builtin_s390_vmob
      {Intrinsic::s390_vmof, 96132}, // __builtin_s390_vmof
      {Intrinsic::s390_vmoh, 96152}, // __builtin_s390_vmoh
      {Intrinsic::s390_vmslg, 96172}, // __builtin_s390_vmslg
      {Intrinsic::s390_vpdi, 96193}, // __builtin_s390_vpdi
      {Intrinsic::s390_vperm, 96213}, // __builtin_s390_vperm
      {Intrinsic::s390_vpklsf, 96234}, // __builtin_s390_vpklsf
      {Intrinsic::s390_vpklsg, 96256}, // __builtin_s390_vpklsg
      {Intrinsic::s390_vpklsh, 96278}, // __builtin_s390_vpklsh
      {Intrinsic::s390_vpksf, 96300}, // __builtin_s390_vpksf
      {Intrinsic::s390_vpksg, 96321}, // __builtin_s390_vpksg
      {Intrinsic::s390_vpksh, 96342}, // __builtin_s390_vpksh
      {Intrinsic::s390_vsbcbiq, 96363}, // __builtin_s390_vsbcbiq
      {Intrinsic::s390_vsbiq, 96386}, // __builtin_s390_vsbiq
      {Intrinsic::s390_vscbib, 96407}, // __builtin_s390_vscbib
      {Intrinsic::s390_vscbif, 96429}, // __builtin_s390_vscbif
      {Intrinsic::s390_vscbig, 96451}, // __builtin_s390_vscbig
      {Intrinsic::s390_vscbih, 96473}, // __builtin_s390_vscbih
      {Intrinsic::s390_vscbiq, 96495}, // __builtin_s390_vscbiq
      {Intrinsic::s390_vsl, 96517}, // __builtin_s390_vsl
      {Intrinsic::s390_vslb, 96536}, // __builtin_s390_vslb
      {Intrinsic::s390_vsld, 96556}, // __builtin_s390_vsld
      {Intrinsic::s390_vsldb, 96576}, // __builtin_s390_vsldb
      {Intrinsic::s390_vsq, 96597}, // __builtin_s390_vsq
      {Intrinsic::s390_vsra, 96616}, // __builtin_s390_vsra
      {Intrinsic::s390_vsrab, 96636}, // __builtin_s390_vsrab
      {Intrinsic::s390_vsrd, 96657}, // __builtin_s390_vsrd
      {Intrinsic::s390_vsrl, 96677}, // __builtin_s390_vsrl
      {Intrinsic::s390_vsrlb, 96697}, // __builtin_s390_vsrlb
      {Intrinsic::s390_vstl, 96718}, // __builtin_s390_vstl
      {Intrinsic::s390_vstrcb, 96738}, // __builtin_s390_vstrcb
      {Intrinsic::s390_vstrcf, 96760}, // __builtin_s390_vstrcf
      {Intrinsic::s390_vstrch, 96782}, // __builtin_s390_vstrch
      {Intrinsic::s390_vstrczb, 96804}, // __builtin_s390_vstrczb
      {Intrinsic::s390_vstrczf, 96827}, // __builtin_s390_vstrczf
      {Intrinsic::s390_vstrczh, 96850}, // __builtin_s390_vstrczh
      {Intrinsic::s390_vstrl, 96873}, // __builtin_s390_vstrl
      {Intrinsic::s390_vsumb, 96894}, // __builtin_s390_vsumb
      {Intrinsic::s390_vsumgf, 96915}, // __builtin_s390_vsumgf
      {Intrinsic::s390_vsumgh, 96937}, // __builtin_s390_vsumgh
      {Intrinsic::s390_vsumh, 96959}, // __builtin_s390_vsumh
      {Intrinsic::s390_vsumqf, 96980}, // __builtin_s390_vsumqf
      {Intrinsic::s390_vsumqg, 97002}, // __builtin_s390_vsumqg
      {Intrinsic::s390_vtm, 97024}, // __builtin_s390_vtm
      {Intrinsic::s390_vuphb, 97043}, // __builtin_s390_vuphb
      {Intrinsic::s390_vuphf, 97064}, // __builtin_s390_vuphf
      {Intrinsic::s390_vuphh, 97085}, // __builtin_s390_vuphh
      {Intrinsic::s390_vuplb, 97106}, // __builtin_s390_vuplb
      {Intrinsic::s390_vuplf, 97127}, // __builtin_s390_vuplf
      {Intrinsic::s390_vuplhb, 97148}, // __builtin_s390_vuplhb
      {Intrinsic::s390_vuplhf, 97170}, // __builtin_s390_vuplhf
      {Intrinsic::s390_vuplhh, 97192}, // __builtin_s390_vuplhh
      {Intrinsic::s390_vuplhw, 97214}, // __builtin_s390_vuplhw
      {Intrinsic::s390_vupllb, 97236}, // __builtin_s390_vupllb
      {Intrinsic::s390_vupllf, 97258}, // __builtin_s390_vupllf
      {Intrinsic::s390_vupllh, 97280}, // __builtin_s390_vupllh
      {Intrinsic::s390_tend, 91966}, // __builtin_tend
      {Intrinsic::s390_ppa_txassist, 94037}, // __builtin_tx_assist
      {Intrinsic::s390_etnd, 93990}, // __builtin_tx_nesting_depth
    };
    auto I = std::lower_bound(std::begin(s390Names),
                              std::end(s390Names),
                              BuiltinNameStr);
    if (I != std::end(s390Names) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "x86") {
    static const BuiltinEntry x86Names[] = {
      {Intrinsic::x86_avx512_add_pd_512, 101601}, // __builtin_ia32_addpd512
      {Intrinsic::x86_avx512_add_ps_512, 101625}, // __builtin_ia32_addps512
      {Intrinsic::x86_avx512_mask_add_sd_round, 102699}, // __builtin_ia32_addsd_round_mask
      {Intrinsic::x86_avx512_mask_add_ss_round, 102731}, // __builtin_ia32_addss_round_mask
      {Intrinsic::x86_sse3_addsub_pd, 120520}, // __builtin_ia32_addsubpd
      {Intrinsic::x86_avx_addsub_pd_256, 98193}, // __builtin_ia32_addsubpd256
      {Intrinsic::x86_sse3_addsub_ps, 120544}, // __builtin_ia32_addsubps
      {Intrinsic::x86_avx_addsub_ps_256, 98220}, // __builtin_ia32_addsubps256
      {Intrinsic::x86_aesni_aesdec, 97810}, // __builtin_ia32_aesdec128
      {Intrinsic::x86_aesni_aesdec_256, 97835}, // __builtin_ia32_aesdec256
      {Intrinsic::x86_aesni_aesdec_512, 97860}, // __builtin_ia32_aesdec512
      {Intrinsic::x86_aesni_aesdeclast, 97885}, // __builtin_ia32_aesdeclast128
      {Intrinsic::x86_aesni_aesdeclast_256, 97914}, // __builtin_ia32_aesdeclast256
      {Intrinsic::x86_aesni_aesdeclast_512, 97943}, // __builtin_ia32_aesdeclast512
      {Intrinsic::x86_aesni_aesenc, 97972}, // __builtin_ia32_aesenc128
      {Intrinsic::x86_aesni_aesenc_256, 97997}, // __builtin_ia32_aesenc256
      {Intrinsic::x86_aesni_aesenc_512, 98022}, // __builtin_ia32_aesenc512
      {Intrinsic::x86_aesni_aesenclast, 98047}, // __builtin_ia32_aesenclast128
      {Intrinsic::x86_aesni_aesenclast_256, 98076}, // __builtin_ia32_aesenclast256
      {Intrinsic::x86_aesni_aesenclast_512, 98105}, // __builtin_ia32_aesenclast512
      {Intrinsic::x86_aesni_aesimc, 98134}, // __builtin_ia32_aesimc128
      {Intrinsic::x86_aesni_aeskeygenassist, 98159}, // __builtin_ia32_aeskeygenassist128
      {Intrinsic::x86_bmi_bextr_32, 114994}, // __builtin_ia32_bextr_u32
      {Intrinsic::x86_bmi_bextr_64, 115019}, // __builtin_ia32_bextr_u64
      {Intrinsic::x86_tbm_bextri_u32, 122371}, // __builtin_ia32_bextri_u32
      {Intrinsic::x86_tbm_bextri_u64, 122397}, // __builtin_ia32_bextri_u64
      {Intrinsic::x86_sse41_blendvpd, 120721}, // __builtin_ia32_blendvpd
      {Intrinsic::x86_avx_blendv_pd_256, 98247}, // __builtin_ia32_blendvpd256
      {Intrinsic::x86_sse41_blendvps, 120745}, // __builtin_ia32_blendvps
      {Intrinsic::x86_avx_blendv_ps_256, 98274}, // __builtin_ia32_blendvps256
      {Intrinsic::x86_avx512_broadcastmb_128, 101649}, // __builtin_ia32_broadcastmb128
      {Intrinsic::x86_avx512_broadcastmb_256, 101679}, // __builtin_ia32_broadcastmb256
      {Intrinsic::x86_avx512_broadcastmb_512, 101709}, // __builtin_ia32_broadcastmb512
      {Intrinsic::x86_avx512_broadcastmw_128, 101739}, // __builtin_ia32_broadcastmw128
      {Intrinsic::x86_avx512_broadcastmw_256, 101769}, // __builtin_ia32_broadcastmw256
      {Intrinsic::x86_avx512_broadcastmw_512, 101799}, // __builtin_ia32_broadcastmw512
      {Intrinsic::x86_bmi_bzhi_64, 115067}, // __builtin_ia32_bzhi_di
      {Intrinsic::x86_bmi_bzhi_32, 115044}, // __builtin_ia32_bzhi_si
      {Intrinsic::x86_cldemote, 115182}, // __builtin_ia32_cldemote
      {Intrinsic::x86_sse2_clflush, 119083}, // __builtin_ia32_clflush
      {Intrinsic::x86_clflushopt, 115206}, // __builtin_ia32_clflushopt
      {Intrinsic::x86_clrssbsy, 115232}, // __builtin_ia32_clrssbsy
      {Intrinsic::x86_clwb, 115256}, // __builtin_ia32_clwb
      {Intrinsic::x86_clzero, 115276}, // __builtin_ia32_clzero
      {Intrinsic::x86_sse2_cmp_sd, 119106}, // __builtin_ia32_cmpsd
      {Intrinsic::x86_avx512_mask_cmp_sd, 102763}, // __builtin_ia32_cmpsd_mask
      {Intrinsic::x86_sse_cmp_ss, 118302}, // __builtin_ia32_cmpss
      {Intrinsic::x86_avx512_mask_cmp_ss, 102789}, // __builtin_ia32_cmpss_mask
      {Intrinsic::x86_sse_comieq_ss, 118323}, // __builtin_ia32_comieq
      {Intrinsic::x86_sse_comige_ss, 118345}, // __builtin_ia32_comige
      {Intrinsic::x86_sse_comigt_ss, 118367}, // __builtin_ia32_comigt
      {Intrinsic::x86_sse_comile_ss, 118389}, // __builtin_ia32_comile
      {Intrinsic::x86_sse_comilt_ss, 118411}, // __builtin_ia32_comilt
      {Intrinsic::x86_sse_comineq_ss, 118433}, // __builtin_ia32_comineq
      {Intrinsic::x86_sse2_comieq_sd, 119127}, // __builtin_ia32_comisdeq
      {Intrinsic::x86_sse2_comige_sd, 119151}, // __builtin_ia32_comisdge
      {Intrinsic::x86_sse2_comigt_sd, 119175}, // __builtin_ia32_comisdgt
      {Intrinsic::x86_sse2_comile_sd, 119199}, // __builtin_ia32_comisdle
      {Intrinsic::x86_sse2_comilt_sd, 119223}, // __builtin_ia32_comisdlt
      {Intrinsic::x86_sse2_comineq_sd, 119247}, // __builtin_ia32_comisdneq
      {Intrinsic::x86_sse42_crc32_64_64, 121183}, // __builtin_ia32_crc32di
      {Intrinsic::x86_sse42_crc32_32_16, 121114}, // __builtin_ia32_crc32hi
      {Intrinsic::x86_sse42_crc32_32_8, 121160}, // __builtin_ia32_crc32qi
      {Intrinsic::x86_sse42_crc32_32_32, 121137}, // __builtin_ia32_crc32si
      {Intrinsic::x86_avx512bf16_cvtne2ps2bf16_128, 114747}, // __builtin_ia32_cvtne2ps2bf16_128
      {Intrinsic::x86_avx512bf16_cvtne2ps2bf16_256, 114780}, // __builtin_ia32_cvtne2ps2bf16_256
      {Intrinsic::x86_avx512bf16_cvtne2ps2bf16_512, 114813}, // __builtin_ia32_cvtne2ps2bf16_512
      {Intrinsic::x86_avx512bf16_cvtneps2bf16_256, 114846}, // __builtin_ia32_cvtneps2bf16_256
      {Intrinsic::x86_avx512bf16_cvtneps2bf16_512, 114878}, // __builtin_ia32_cvtneps2bf16_512
      {Intrinsic::x86_sse2_cvtpd2dq, 119272}, // __builtin_ia32_cvtpd2dq
      {Intrinsic::x86_avx512_mask_cvtpd2dq_128, 102815}, // __builtin_ia32_cvtpd2dq128_mask
      {Intrinsic::x86_avx_cvt_pd2dq_256, 98328}, // __builtin_ia32_cvtpd2dq256
      {Intrinsic::x86_avx512_mask_cvtpd2dq_512, 102847}, // __builtin_ia32_cvtpd2dq512_mask
      {Intrinsic::x86_sse_cvtpd2pi, 118456}, // __builtin_ia32_cvtpd2pi
      {Intrinsic::x86_sse2_cvtpd2ps, 119296}, // __builtin_ia32_cvtpd2ps
      {Intrinsic::x86_avx_cvt_pd2_ps_256, 98301}, // __builtin_ia32_cvtpd2ps256
      {Intrinsic::x86_avx512_mask_cvtpd2ps_512, 102908}, // __builtin_ia32_cvtpd2ps512_mask
      {Intrinsic::x86_avx512_mask_cvtpd2ps, 102879}, // __builtin_ia32_cvtpd2ps_mask
      {Intrinsic::x86_avx512_mask_cvtpd2qq_128, 102940}, // __builtin_ia32_cvtpd2qq128_mask
      {Intrinsic::x86_avx512_mask_cvtpd2qq_256, 102972}, // __builtin_ia32_cvtpd2qq256_mask
      {Intrinsic::x86_avx512_mask_cvtpd2qq_512, 103004}, // __builtin_ia32_cvtpd2qq512_mask
      {Intrinsic::x86_avx512_mask_cvtpd2udq_128, 103036}, // __builtin_ia32_cvtpd2udq128_mask
      {Intrinsic::x86_avx512_mask_cvtpd2udq_256, 103069}, // __builtin_ia32_cvtpd2udq256_mask
      {Intrinsic::x86_avx512_mask_cvtpd2udq_512, 103102}, // __builtin_ia32_cvtpd2udq512_mask
      {Intrinsic::x86_avx512_mask_cvtpd2uqq_128, 103135}, // __builtin_ia32_cvtpd2uqq128_mask
      {Intrinsic::x86_avx512_mask_cvtpd2uqq_256, 103168}, // __builtin_ia32_cvtpd2uqq256_mask
      {Intrinsic::x86_avx512_mask_cvtpd2uqq_512, 103201}, // __builtin_ia32_cvtpd2uqq512_mask
      {Intrinsic::x86_sse_cvtpi2pd, 118480}, // __builtin_ia32_cvtpi2pd
      {Intrinsic::x86_sse_cvtpi2ps, 118504}, // __builtin_ia32_cvtpi2ps
      {Intrinsic::x86_sse2_cvtps2dq, 119320}, // __builtin_ia32_cvtps2dq
      {Intrinsic::x86_avx512_mask_cvtps2dq_128, 103234}, // __builtin_ia32_cvtps2dq128_mask
      {Intrinsic::x86_avx_cvt_ps2dq_256, 98355}, // __builtin_ia32_cvtps2dq256
      {Intrinsic::x86_avx512_mask_cvtps2dq_256, 103266}, // __builtin_ia32_cvtps2dq256_mask
      {Intrinsic::x86_avx512_mask_cvtps2dq_512, 103298}, // __builtin_ia32_cvtps2dq512_mask
      {Intrinsic::x86_avx512_mask_cvtps2pd_512, 103330}, // __builtin_ia32_cvtps2pd512_mask
      {Intrinsic::x86_sse_cvtps2pi, 118528}, // __builtin_ia32_cvtps2pi
      {Intrinsic::x86_avx512_mask_cvtps2qq_128, 103362}, // __builtin_ia32_cvtps2qq128_mask
      {Intrinsic::x86_avx512_mask_cvtps2qq_256, 103394}, // __builtin_ia32_cvtps2qq256_mask
      {Intrinsic::x86_avx512_mask_cvtps2qq_512, 103426}, // __builtin_ia32_cvtps2qq512_mask
      {Intrinsic::x86_avx512_mask_cvtps2udq_128, 103458}, // __builtin_ia32_cvtps2udq128_mask
      {Intrinsic::x86_avx512_mask_cvtps2udq_256, 103491}, // __builtin_ia32_cvtps2udq256_mask
      {Intrinsic::x86_avx512_mask_cvtps2udq_512, 103524}, // __builtin_ia32_cvtps2udq512_mask
      {Intrinsic::x86_avx512_mask_cvtps2uqq_128, 103557}, // __builtin_ia32_cvtps2uqq128_mask
      {Intrinsic::x86_avx512_mask_cvtps2uqq_256, 103590}, // __builtin_ia32_cvtps2uqq256_mask
      {Intrinsic::x86_avx512_mask_cvtps2uqq_512, 103623}, // __builtin_ia32_cvtps2uqq512_mask
      {Intrinsic::x86_avx512_mask_cvtqq2ps_128, 103656}, // __builtin_ia32_cvtqq2ps128_mask
      {Intrinsic::x86_sse2_cvtsd2si, 119344}, // __builtin_ia32_cvtsd2si
      {Intrinsic::x86_sse2_cvtsd2si64, 119368}, // __builtin_ia32_cvtsd2si64
      {Intrinsic::x86_sse2_cvtsd2ss, 119394}, // __builtin_ia32_cvtsd2ss
      {Intrinsic::x86_avx512_mask_cvtsd2ss_round, 103688}, // __builtin_ia32_cvtsd2ss_round_mask
      {Intrinsic::x86_avx512_cvtsi2sd64, 102021}, // __builtin_ia32_cvtsi2sd64
      {Intrinsic::x86_avx512_cvtsi2ss32, 102047}, // __builtin_ia32_cvtsi2ss32
      {Intrinsic::x86_avx512_cvtsi2ss64, 102073}, // __builtin_ia32_cvtsi2ss64
      {Intrinsic::x86_avx512_mask_cvtss2sd_round, 103723}, // __builtin_ia32_cvtss2sd_round_mask
      {Intrinsic::x86_sse_cvtss2si, 118552}, // __builtin_ia32_cvtss2si
      {Intrinsic::x86_sse_cvtss2si64, 118576}, // __builtin_ia32_cvtss2si64
      {Intrinsic::x86_sse2_cvttpd2dq, 119418}, // __builtin_ia32_cvttpd2dq
      {Intrinsic::x86_avx512_mask_cvttpd2dq_128, 103758}, // __builtin_ia32_cvttpd2dq128_mask
      {Intrinsic::x86_avx_cvtt_pd2dq_256, 98382}, // __builtin_ia32_cvttpd2dq256
      {Intrinsic::x86_avx512_mask_cvttpd2dq_512, 103791}, // __builtin_ia32_cvttpd2dq512_mask
      {Intrinsic::x86_sse_cvttpd2pi, 118602}, // __builtin_ia32_cvttpd2pi
      {Intrinsic::x86_avx512_mask_cvttpd2qq_128, 103824}, // __builtin_ia32_cvttpd2qq128_mask
      {Intrinsic::x86_avx512_mask_cvttpd2qq_256, 103857}, // __builtin_ia32_cvttpd2qq256_mask
      {Intrinsic::x86_avx512_mask_cvttpd2qq_512, 103890}, // __builtin_ia32_cvttpd2qq512_mask
      {Intrinsic::x86_avx512_mask_cvttpd2udq_128, 103923}, // __builtin_ia32_cvttpd2udq128_mask
      {Intrinsic::x86_avx512_mask_cvttpd2udq_256, 103957}, // __builtin_ia32_cvttpd2udq256_mask
      {Intrinsic::x86_avx512_mask_cvttpd2udq_512, 103991}, // __builtin_ia32_cvttpd2udq512_mask
      {Intrinsic::x86_avx512_mask_cvttpd2uqq_128, 104025}, // __builtin_ia32_cvttpd2uqq128_mask
      {Intrinsic::x86_avx512_mask_cvttpd2uqq_256, 104059}, // __builtin_ia32_cvttpd2uqq256_mask
      {Intrinsic::x86_avx512_mask_cvttpd2uqq_512, 104093}, // __builtin_ia32_cvttpd2uqq512_mask
      {Intrinsic::x86_sse2_cvttps2dq, 119443}, // __builtin_ia32_cvttps2dq
      {Intrinsic::x86_avx_cvtt_ps2dq_256, 98410}, // __builtin_ia32_cvttps2dq256
      {Intrinsic::x86_avx512_mask_cvttps2dq_512, 104127}, // __builtin_ia32_cvttps2dq512_mask
      {Intrinsic::x86_sse_cvttps2pi, 118627}, // __builtin_ia32_cvttps2pi
      {Intrinsic::x86_avx512_mask_cvttps2qq_128, 104160}, // __builtin_ia32_cvttps2qq128_mask
      {Intrinsic::x86_avx512_mask_cvttps2qq_256, 104193}, // __builtin_ia32_cvttps2qq256_mask
      {Intrinsic::x86_avx512_mask_cvttps2qq_512, 104226}, // __builtin_ia32_cvttps2qq512_mask
      {Intrinsic::x86_avx512_mask_cvttps2udq_128, 104259}, // __builtin_ia32_cvttps2udq128_mask
      {Intrinsic::x86_avx512_mask_cvttps2udq_256, 104293}, // __builtin_ia32_cvttps2udq256_mask
      {Intrinsic::x86_avx512_mask_cvttps2udq_512, 104327}, // __builtin_ia32_cvttps2udq512_mask
      {Intrinsic::x86_avx512_mask_cvttps2uqq_128, 104361}, // __builtin_ia32_cvttps2uqq128_mask
      {Intrinsic::x86_avx512_mask_cvttps2uqq_256, 104395}, // __builtin_ia32_cvttps2uqq256_mask
      {Intrinsic::x86_avx512_mask_cvttps2uqq_512, 104429}, // __builtin_ia32_cvttps2uqq512_mask
      {Intrinsic::x86_sse2_cvttsd2si, 119468}, // __builtin_ia32_cvttsd2si
      {Intrinsic::x86_sse2_cvttsd2si64, 119493}, // __builtin_ia32_cvttsd2si64
      {Intrinsic::x86_sse_cvttss2si, 118652}, // __builtin_ia32_cvttss2si
      {Intrinsic::x86_sse_cvttss2si64, 118677}, // __builtin_ia32_cvttss2si64
      {Intrinsic::x86_avx512_mask_cvtuqq2ps_128, 104463}, // __builtin_ia32_cvtuqq2ps128_mask
      {Intrinsic::x86_avx512_cvtusi642sd, 102354}, // __builtin_ia32_cvtusi2sd64
      {Intrinsic::x86_avx512_cvtusi2ss, 102327}, // __builtin_ia32_cvtusi2ss32
      {Intrinsic::x86_avx512_cvtusi642ss, 102381}, // __builtin_ia32_cvtusi2ss64
      {Intrinsic::x86_avx512_dbpsadbw_128, 102408}, // __builtin_ia32_dbpsadbw128
      {Intrinsic::x86_avx512_dbpsadbw_256, 102435}, // __builtin_ia32_dbpsadbw256
      {Intrinsic::x86_avx512_dbpsadbw_512, 102462}, // __builtin_ia32_dbpsadbw512
      {Intrinsic::x86_directstore32, 115298}, // __builtin_ia32_directstore_u32
      {Intrinsic::x86_directstore64, 115329}, // __builtin_ia32_directstore_u64
      {Intrinsic::x86_avx512_div_pd_512, 102489}, // __builtin_ia32_divpd512
      {Intrinsic::x86_avx512_div_ps_512, 102513}, // __builtin_ia32_divps512
      {Intrinsic::x86_avx512_mask_div_sd_round, 104496}, // __builtin_ia32_divsd_round_mask
      {Intrinsic::x86_avx512_mask_div_ss_round, 104528}, // __builtin_ia32_divss_round_mask
      {Intrinsic::x86_avx512bf16_dpbf16ps_128, 114910}, // __builtin_ia32_dpbf16ps_128
      {Intrinsic::x86_avx512bf16_dpbf16ps_256, 114938}, // __builtin_ia32_dpbf16ps_256
      {Intrinsic::x86_avx512bf16_dpbf16ps_512, 114966}, // __builtin_ia32_dpbf16ps_512
      {Intrinsic::x86_sse41_dppd, 120769}, // __builtin_ia32_dppd
      {Intrinsic::x86_sse41_dpps, 120789}, // __builtin_ia32_dpps
      {Intrinsic::x86_avx_dp_ps_256, 98438}, // __builtin_ia32_dpps256
      {Intrinsic::x86_mmx_emms, 115978}, // __builtin_ia32_emms
      {Intrinsic::x86_enqcmd, 115360}, // __builtin_ia32_enqcmd
      {Intrinsic::x86_enqcmds, 115382}, // __builtin_ia32_enqcmds
      {Intrinsic::x86_avx512_exp2_pd, 102537}, // __builtin_ia32_exp2pd_mask
      {Intrinsic::x86_avx512_exp2_ps, 102564}, // __builtin_ia32_exp2ps_mask
      {Intrinsic::x86_sse4a_extrq, 121608}, // __builtin_ia32_extrq
      {Intrinsic::x86_sse4a_extrqi, 121629}, // __builtin_ia32_extrqi
      {Intrinsic::x86_mmx_femms, 115998}, // __builtin_ia32_femms
      {Intrinsic::x86_avx512_mask_fixupimm_pd_128, 104560}, // __builtin_ia32_fixupimmpd128_mask
      {Intrinsic::x86_avx512_maskz_fixupimm_pd_128, 110124}, // __builtin_ia32_fixupimmpd128_maskz
      {Intrinsic::x86_avx512_mask_fixupimm_pd_256, 104594}, // __builtin_ia32_fixupimmpd256_mask
      {Intrinsic::x86_avx512_maskz_fixupimm_pd_256, 110159}, // __builtin_ia32_fixupimmpd256_maskz
      {Intrinsic::x86_avx512_mask_fixupimm_pd_512, 104628}, // __builtin_ia32_fixupimmpd512_mask
      {Intrinsic::x86_avx512_maskz_fixupimm_pd_512, 110194}, // __builtin_ia32_fixupimmpd512_maskz
      {Intrinsic::x86_avx512_mask_fixupimm_ps_128, 104662}, // __builtin_ia32_fixupimmps128_mask
      {Intrinsic::x86_avx512_maskz_fixupimm_ps_128, 110229}, // __builtin_ia32_fixupimmps128_maskz
      {Intrinsic::x86_avx512_mask_fixupimm_ps_256, 104696}, // __builtin_ia32_fixupimmps256_mask
      {Intrinsic::x86_avx512_maskz_fixupimm_ps_256, 110264}, // __builtin_ia32_fixupimmps256_maskz
      {Intrinsic::x86_avx512_mask_fixupimm_ps_512, 104730}, // __builtin_ia32_fixupimmps512_mask
      {Intrinsic::x86_avx512_maskz_fixupimm_ps_512, 110299}, // __builtin_ia32_fixupimmps512_maskz
      {Intrinsic::x86_avx512_mask_fixupimm_sd, 104764}, // __builtin_ia32_fixupimmsd_mask
      {Intrinsic::x86_avx512_maskz_fixupimm_sd, 110334}, // __builtin_ia32_fixupimmsd_maskz
      {Intrinsic::x86_avx512_mask_fixupimm_ss, 104795}, // __builtin_ia32_fixupimmss_mask
      {Intrinsic::x86_avx512_maskz_fixupimm_ss, 110366}, // __builtin_ia32_fixupimmss_maskz
      {Intrinsic::x86_avx512_mask_fpclass_sd, 104826}, // __builtin_ia32_fpclasssd_mask
      {Intrinsic::x86_avx512_mask_fpclass_ss, 104856}, // __builtin_ia32_fpclassss_mask
      {Intrinsic::x86_fxrstor, 115641}, // __builtin_ia32_fxrstor
      {Intrinsic::x86_fxrstor64, 115664}, // __builtin_ia32_fxrstor64
      {Intrinsic::x86_fxsave, 115689}, // __builtin_ia32_fxsave
      {Intrinsic::x86_fxsave64, 115711}, // __builtin_ia32_fxsave64
      {Intrinsic::x86_avx2_gather_d_d, 99620}, // __builtin_ia32_gatherd_d
      {Intrinsic::x86_avx2_gather_d_d_256, 99645}, // __builtin_ia32_gatherd_d256
      {Intrinsic::x86_avx2_gather_d_pd, 99673}, // __builtin_ia32_gatherd_pd
      {Intrinsic::x86_avx2_gather_d_pd_256, 99699}, // __builtin_ia32_gatherd_pd256
      {Intrinsic::x86_avx2_gather_d_ps, 99728}, // __builtin_ia32_gatherd_ps
      {Intrinsic::x86_avx2_gather_d_ps_256, 99754}, // __builtin_ia32_gatherd_ps256
      {Intrinsic::x86_avx2_gather_d_q, 99783}, // __builtin_ia32_gatherd_q
      {Intrinsic::x86_avx2_gather_d_q_256, 99808}, // __builtin_ia32_gatherd_q256
      {Intrinsic::x86_avx512_gatherpf_dpd_512, 102591}, // __builtin_ia32_gatherpfdpd
      {Intrinsic::x86_avx512_gatherpf_dps_512, 102618}, // __builtin_ia32_gatherpfdps
      {Intrinsic::x86_avx512_gatherpf_qpd_512, 102645}, // __builtin_ia32_gatherpfqpd
      {Intrinsic::x86_avx512_gatherpf_qps_512, 102672}, // __builtin_ia32_gatherpfqps
      {Intrinsic::x86_avx2_gather_q_d, 99836}, // __builtin_ia32_gatherq_d
      {Intrinsic::x86_avx2_gather_q_d_256, 99861}, // __builtin_ia32_gatherq_d256
      {Intrinsic::x86_avx2_gather_q_pd, 99889}, // __builtin_ia32_gatherq_pd
      {Intrinsic::x86_avx2_gather_q_pd_256, 99915}, // __builtin_ia32_gatherq_pd256
      {Intrinsic::x86_avx2_gather_q_ps, 99944}, // __builtin_ia32_gatherq_ps
      {Intrinsic::x86_avx2_gather_q_ps_256, 99970}, // __builtin_ia32_gatherq_ps256
      {Intrinsic::x86_avx2_gather_q_q, 99999}, // __builtin_ia32_gatherq_q
      {Intrinsic::x86_avx2_gather_q_q_256, 100024}, // __builtin_ia32_gatherq_q256
      {Intrinsic::x86_avx512_mask_getexp_pd_128, 104886}, // __builtin_ia32_getexppd128_mask
      {Intrinsic::x86_avx512_mask_getexp_pd_256, 104918}, // __builtin_ia32_getexppd256_mask
      {Intrinsic::x86_avx512_mask_getexp_pd_512, 104950}, // __builtin_ia32_getexppd512_mask
      {Intrinsic::x86_avx512_mask_getexp_ps_128, 104982}, // __builtin_ia32_getexpps128_mask
      {Intrinsic::x86_avx512_mask_getexp_ps_256, 105014}, // __builtin_ia32_getexpps256_mask
      {Intrinsic::x86_avx512_mask_getexp_ps_512, 105046}, // __builtin_ia32_getexpps512_mask
      {Intrinsic::x86_avx512_mask_getexp_sd, 105078}, // __builtin_ia32_getexpsd128_round_mask
      {Intrinsic::x86_avx512_mask_getexp_ss, 105116}, // __builtin_ia32_getexpss128_round_mask
      {Intrinsic::x86_avx512_mask_getmant_pd_128, 105154}, // __builtin_ia32_getmantpd128_mask
      {Intrinsic::x86_avx512_mask_getmant_pd_256, 105187}, // __builtin_ia32_getmantpd256_mask
      {Intrinsic::x86_avx512_mask_getmant_pd_512, 105220}, // __builtin_ia32_getmantpd512_mask
      {Intrinsic::x86_avx512_mask_getmant_ps_128, 105253}, // __builtin_ia32_getmantps128_mask
      {Intrinsic::x86_avx512_mask_getmant_ps_256, 105286}, // __builtin_ia32_getmantps256_mask
      {Intrinsic::x86_avx512_mask_getmant_ps_512, 105319}, // __builtin_ia32_getmantps512_mask
      {Intrinsic::x86_avx512_mask_getmant_sd, 105352}, // __builtin_ia32_getmantsd_round_mask
      {Intrinsic::x86_avx512_mask_getmant_ss, 105388}, // __builtin_ia32_getmantss_round_mask
      {Intrinsic::x86_sse3_hadd_pd, 120568}, // __builtin_ia32_haddpd
      {Intrinsic::x86_avx_hadd_pd_256, 98461}, // __builtin_ia32_haddpd256
      {Intrinsic::x86_sse3_hadd_ps, 120590}, // __builtin_ia32_haddps
      {Intrinsic::x86_avx_hadd_ps_256, 98486}, // __builtin_ia32_haddps256
      {Intrinsic::x86_sse3_hsub_pd, 120612}, // __builtin_ia32_hsubpd
      {Intrinsic::x86_avx_hsub_pd_256, 98511}, // __builtin_ia32_hsubpd256
      {Intrinsic::x86_sse3_hsub_ps, 120634}, // __builtin_ia32_hsubps
      {Intrinsic::x86_avx_hsub_ps_256, 98536}, // __builtin_ia32_hsubps256
      {Intrinsic::x86_incsspd, 115735}, // __builtin_ia32_incsspd
      {Intrinsic::x86_incsspq, 115758}, // __builtin_ia32_incsspq
      {Intrinsic::x86_sse41_insertps, 120809}, // __builtin_ia32_insertps128
      {Intrinsic::x86_sse4a_insertq, 121651}, // __builtin_ia32_insertq
      {Intrinsic::x86_sse4a_insertqi, 121674}, // __builtin_ia32_insertqi
      {Intrinsic::x86_invpcid, 115781}, // __builtin_ia32_invpcid
      {Intrinsic::x86_sse3_ldu_dq, 120656}, // __builtin_ia32_lddqu
      {Intrinsic::x86_avx_ldu_dq_256, 98561}, // __builtin_ia32_lddqu256
      {Intrinsic::x86_sse2_lfence, 119520}, // __builtin_ia32_lfence
      {Intrinsic::x86_llwpcb, 115835}, // __builtin_ia32_llwpcb
      {Intrinsic::x86_loadiwkey, 115857}, // __builtin_ia32_loadiwkey
      {Intrinsic::x86_lwpins32, 115882}, // __builtin_ia32_lwpins32
      {Intrinsic::x86_lwpins64, 115906}, // __builtin_ia32_lwpins64
      {Intrinsic::x86_lwpval32, 115930}, // __builtin_ia32_lwpval32
      {Intrinsic::x86_lwpval64, 115954}, // __builtin_ia32_lwpval64
      {Intrinsic::x86_avx2_maskload_d, 100052}, // __builtin_ia32_maskloadd
      {Intrinsic::x86_avx2_maskload_d_256, 100077}, // __builtin_ia32_maskloadd256
      {Intrinsic::x86_avx_maskload_pd, 98585}, // __builtin_ia32_maskloadpd
      {Intrinsic::x86_avx_maskload_pd_256, 98611}, // __builtin_ia32_maskloadpd256
      {Intrinsic::x86_avx_maskload_ps, 98640}, // __builtin_ia32_maskloadps
      {Intrinsic::x86_avx_maskload_ps_256, 98666}, // __builtin_ia32_maskloadps256
      {Intrinsic::x86_avx2_maskload_q, 100105}, // __builtin_ia32_maskloadq
      {Intrinsic::x86_avx2_maskload_q_256, 100130}, // __builtin_ia32_maskloadq256
      {Intrinsic::x86_sse2_maskmov_dqu, 119542}, // __builtin_ia32_maskmovdqu
      {Intrinsic::x86_mmx_maskmovq, 116019}, // __builtin_ia32_maskmovq
      {Intrinsic::x86_avx2_maskstore_d, 100158}, // __builtin_ia32_maskstored
      {Intrinsic::x86_avx2_maskstore_d_256, 100184}, // __builtin_ia32_maskstored256
      {Intrinsic::x86_avx_maskstore_pd, 98695}, // __builtin_ia32_maskstorepd
      {Intrinsic::x86_avx_maskstore_pd_256, 98722}, // __builtin_ia32_maskstorepd256
      {Intrinsic::x86_avx_maskstore_ps, 98752}, // __builtin_ia32_maskstoreps
      {Intrinsic::x86_avx_maskstore_ps_256, 98779}, // __builtin_ia32_maskstoreps256
      {Intrinsic::x86_avx2_maskstore_q, 100213}, // __builtin_ia32_maskstoreq
      {Intrinsic::x86_avx2_maskstore_q_256, 100239}, // __builtin_ia32_maskstoreq256
      {Intrinsic::x86_sse2_max_pd, 119568}, // __builtin_ia32_maxpd
      {Intrinsic::x86_avx_max_pd_256, 98809}, // __builtin_ia32_maxpd256
      {Intrinsic::x86_avx512_max_pd_512, 110398}, // __builtin_ia32_maxpd512
      {Intrinsic::x86_sse_max_ps, 118704}, // __builtin_ia32_maxps
      {Intrinsic::x86_avx_max_ps_256, 98833}, // __builtin_ia32_maxps256
      {Intrinsic::x86_avx512_max_ps_512, 110422}, // __builtin_ia32_maxps512
      {Intrinsic::x86_sse2_max_sd, 119589}, // __builtin_ia32_maxsd
      {Intrinsic::x86_avx512_mask_max_sd_round, 105424}, // __builtin_ia32_maxsd_round_mask
      {Intrinsic::x86_sse_max_ss, 118725}, // __builtin_ia32_maxss
      {Intrinsic::x86_avx512_mask_max_ss_round, 105456}, // __builtin_ia32_maxss_round_mask
      {Intrinsic::x86_sse2_mfence, 119610}, // __builtin_ia32_mfence
      {Intrinsic::x86_sse2_min_pd, 119632}, // __builtin_ia32_minpd
      {Intrinsic::x86_avx_min_pd_256, 98857}, // __builtin_ia32_minpd256
      {Intrinsic::x86_avx512_min_pd_512, 110446}, // __builtin_ia32_minpd512
      {Intrinsic::x86_sse_min_ps, 118746}, // __builtin_ia32_minps
      {Intrinsic::x86_avx_min_ps_256, 98881}, // __builtin_ia32_minps256
      {Intrinsic::x86_avx512_min_ps_512, 110470}, // __builtin_ia32_minps512
      {Intrinsic::x86_sse2_min_sd, 119653}, // __builtin_ia32_minsd
      {Intrinsic::x86_avx512_mask_min_sd_round, 105488}, // __builtin_ia32_minsd_round_mask
      {Intrinsic::x86_sse_min_ss, 118767}, // __builtin_ia32_minss
      {Intrinsic::x86_avx512_mask_min_ss_round, 105520}, // __builtin_ia32_minss_round_mask
      {Intrinsic::x86_sse3_monitor, 120677}, // __builtin_ia32_monitor
      {Intrinsic::x86_monitorx, 117565}, // __builtin_ia32_monitorx
      {Intrinsic::x86_movdir64b, 117589}, // __builtin_ia32_movdir64b
      {Intrinsic::x86_sse2_movmsk_pd, 119674}, // __builtin_ia32_movmskpd
      {Intrinsic::x86_avx_movmsk_pd_256, 98905}, // __builtin_ia32_movmskpd256
      {Intrinsic::x86_sse_movmsk_ps, 118788}, // __builtin_ia32_movmskps
      {Intrinsic::x86_avx_movmsk_ps_256, 98932}, // __builtin_ia32_movmskps256
      {Intrinsic::x86_mmx_movnt_dq, 116043}, // __builtin_ia32_movntq
      {Intrinsic::x86_sse41_mpsadbw, 120836}, // __builtin_ia32_mpsadbw128
      {Intrinsic::x86_avx2_mpsadbw, 100268}, // __builtin_ia32_mpsadbw256
      {Intrinsic::x86_avx512_mul_pd_512, 110494}, // __builtin_ia32_mulpd512
      {Intrinsic::x86_avx512_mul_ps_512, 110518}, // __builtin_ia32_mulps512
      {Intrinsic::x86_avx512_mask_mul_sd_round, 105552}, // __builtin_ia32_mulsd_round_mask
      {Intrinsic::x86_avx512_mask_mul_ss_round, 105584}, // __builtin_ia32_mulss_round_mask
      {Intrinsic::x86_sse3_mwait, 120700}, // __builtin_ia32_mwait
      {Intrinsic::x86_mwaitx, 117614}, // __builtin_ia32_mwaitx
      {Intrinsic::x86_ssse3_pabs_b, 121698}, // __builtin_ia32_pabsb
      {Intrinsic::x86_ssse3_pabs_d, 121719}, // __builtin_ia32_pabsd
      {Intrinsic::x86_ssse3_pabs_w, 121740}, // __builtin_ia32_pabsw
      {Intrinsic::x86_mmx_packssdw, 116065}, // __builtin_ia32_packssdw
      {Intrinsic::x86_sse2_packssdw_128, 119698}, // __builtin_ia32_packssdw128
      {Intrinsic::x86_avx2_packssdw, 100294}, // __builtin_ia32_packssdw256
      {Intrinsic::x86_avx512_packssdw_512, 110542}, // __builtin_ia32_packssdw512
      {Intrinsic::x86_mmx_packsswb, 116089}, // __builtin_ia32_packsswb
      {Intrinsic::x86_sse2_packsswb_128, 119725}, // __builtin_ia32_packsswb128
      {Intrinsic::x86_avx2_packsswb, 100321}, // __builtin_ia32_packsswb256
      {Intrinsic::x86_avx512_packsswb_512, 110569}, // __builtin_ia32_packsswb512
      {Intrinsic::x86_sse41_packusdw, 120862}, // __builtin_ia32_packusdw128
      {Intrinsic::x86_avx2_packusdw, 100348}, // __builtin_ia32_packusdw256
      {Intrinsic::x86_avx512_packusdw_512, 110596}, // __builtin_ia32_packusdw512
      {Intrinsic::x86_mmx_packuswb, 116113}, // __builtin_ia32_packuswb
      {Intrinsic::x86_sse2_packuswb_128, 119752}, // __builtin_ia32_packuswb128
      {Intrinsic::x86_avx2_packuswb, 100375}, // __builtin_ia32_packuswb256
      {Intrinsic::x86_avx512_packuswb_512, 110623}, // __builtin_ia32_packuswb512
      {Intrinsic::x86_mmx_padd_b, 116137}, // __builtin_ia32_paddb
      {Intrinsic::x86_mmx_padd_d, 116158}, // __builtin_ia32_paddd
      {Intrinsic::x86_mmx_padd_q, 116179}, // __builtin_ia32_paddq
      {Intrinsic::x86_mmx_padds_b, 116221}, // __builtin_ia32_paddsb
      {Intrinsic::x86_mmx_padds_w, 116243}, // __builtin_ia32_paddsw
      {Intrinsic::x86_mmx_paddus_b, 116265}, // __builtin_ia32_paddusb
      {Intrinsic::x86_mmx_paddus_w, 116288}, // __builtin_ia32_paddusw
      {Intrinsic::x86_mmx_padd_w, 116200}, // __builtin_ia32_paddw
      {Intrinsic::x86_mmx_palignr_b, 116311}, // __builtin_ia32_palignr
      {Intrinsic::x86_mmx_pand, 116334}, // __builtin_ia32_pand
      {Intrinsic::x86_mmx_pandn, 116354}, // __builtin_ia32_pandn
      {Intrinsic::x86_sse2_pause, 119779}, // __builtin_ia32_pause
      {Intrinsic::x86_mmx_pavg_b, 116375}, // __builtin_ia32_pavgb
      {Intrinsic::x86_sse2_pavg_b, 119800}, // __builtin_ia32_pavgb128
      {Intrinsic::x86_avx2_pavg_b, 100402}, // __builtin_ia32_pavgb256
      {Intrinsic::x86_avx512_pavg_b_512, 110650}, // __builtin_ia32_pavgb512
      {Intrinsic::x86_3dnow_pavgusb, 97302}, // __builtin_ia32_pavgusb
      {Intrinsic::x86_mmx_pavg_w, 116396}, // __builtin_ia32_pavgw
      {Intrinsic::x86_sse2_pavg_w, 119824}, // __builtin_ia32_pavgw128
      {Intrinsic::x86_avx2_pavg_w, 100426}, // __builtin_ia32_pavgw256
      {Intrinsic::x86_avx512_pavg_w_512, 110674}, // __builtin_ia32_pavgw512
      {Intrinsic::x86_sse41_pblendvb, 120889}, // __builtin_ia32_pblendvb128
      {Intrinsic::x86_avx2_pblendvb, 100450}, // __builtin_ia32_pblendvb256
      {Intrinsic::x86_pclmulqdq, 117636}, // __builtin_ia32_pclmulqdq128
      {Intrinsic::x86_pclmulqdq_256, 117664}, // __builtin_ia32_pclmulqdq256
      {Intrinsic::x86_pclmulqdq_512, 117692}, // __builtin_ia32_pclmulqdq512
      {Intrinsic::x86_mmx_pcmpeq_b, 116417}, // __builtin_ia32_pcmpeqb
      {Intrinsic::x86_mmx_pcmpeq_d, 116440}, // __builtin_ia32_pcmpeqd
      {Intrinsic::x86_mmx_pcmpeq_w, 116463}, // __builtin_ia32_pcmpeqw
      {Intrinsic::x86_sse42_pcmpestri128, 121206}, // __builtin_ia32_pcmpestri128
      {Intrinsic::x86_sse42_pcmpestria128, 121234}, // __builtin_ia32_pcmpestria128
      {Intrinsic::x86_sse42_pcmpestric128, 121263}, // __builtin_ia32_pcmpestric128
      {Intrinsic::x86_sse42_pcmpestrio128, 121292}, // __builtin_ia32_pcmpestrio128
      {Intrinsic::x86_sse42_pcmpestris128, 121321}, // __builtin_ia32_pcmpestris128
      {Intrinsic::x86_sse42_pcmpestriz128, 121350}, // __builtin_ia32_pcmpestriz128
      {Intrinsic::x86_sse42_pcmpestrm128, 121379}, // __builtin_ia32_pcmpestrm128
      {Intrinsic::x86_mmx_pcmpgt_b, 116486}, // __builtin_ia32_pcmpgtb
      {Intrinsic::x86_mmx_pcmpgt_d, 116509}, // __builtin_ia32_pcmpgtd
      {Intrinsic::x86_mmx_pcmpgt_w, 116532}, // __builtin_ia32_pcmpgtw
      {Intrinsic::x86_sse42_pcmpistri128, 121407}, // __builtin_ia32_pcmpistri128
      {Intrinsic::x86_sse42_pcmpistria128, 121435}, // __builtin_ia32_pcmpistria128
      {Intrinsic::x86_sse42_pcmpistric128, 121464}, // __builtin_ia32_pcmpistric128
      {Intrinsic::x86_sse42_pcmpistrio128, 121493}, // __builtin_ia32_pcmpistrio128
      {Intrinsic::x86_sse42_pcmpistris128, 121522}, // __builtin_ia32_pcmpistris128
      {Intrinsic::x86_sse42_pcmpistriz128, 121551}, // __builtin_ia32_pcmpistriz128
      {Intrinsic::x86_sse42_pcmpistrm128, 121580}, // __builtin_ia32_pcmpistrm128
      {Intrinsic::x86_bmi_pdep_64, 115113}, // __builtin_ia32_pdep_di
      {Intrinsic::x86_bmi_pdep_32, 115090}, // __builtin_ia32_pdep_si
      {Intrinsic::x86_avx512_permvar_df_256, 110698}, // __builtin_ia32_permvardf256
      {Intrinsic::x86_avx512_permvar_df_512, 110726}, // __builtin_ia32_permvardf512
      {Intrinsic::x86_avx512_permvar_di_256, 110754}, // __builtin_ia32_permvardi256
      {Intrinsic::x86_avx512_permvar_di_512, 110782}, // __builtin_ia32_permvardi512
      {Intrinsic::x86_avx512_permvar_hi_128, 110810}, // __builtin_ia32_permvarhi128
      {Intrinsic::x86_avx512_permvar_hi_256, 110838}, // __builtin_ia32_permvarhi256
      {Intrinsic::x86_avx512_permvar_hi_512, 110866}, // __builtin_ia32_permvarhi512
      {Intrinsic::x86_avx512_permvar_qi_128, 110894}, // __builtin_ia32_permvarqi128
      {Intrinsic::x86_avx512_permvar_qi_256, 110922}, // __builtin_ia32_permvarqi256
      {Intrinsic::x86_avx512_permvar_qi_512, 110950}, // __builtin_ia32_permvarqi512
      {Intrinsic::x86_avx2_permps, 100505}, // __builtin_ia32_permvarsf256
      {Intrinsic::x86_avx512_permvar_sf_512, 110978}, // __builtin_ia32_permvarsf512
      {Intrinsic::x86_avx2_permd, 100477}, // __builtin_ia32_permvarsi256
      {Intrinsic::x86_avx512_permvar_si_512, 111006}, // __builtin_ia32_permvarsi512
      {Intrinsic::x86_bmi_pext_64, 115159}, // __builtin_ia32_pext_di
      {Intrinsic::x86_bmi_pext_32, 115136}, // __builtin_ia32_pext_si
      {Intrinsic::x86_3dnow_pf2id, 97325}, // __builtin_ia32_pf2id
      {Intrinsic::x86_3dnowa_pf2iw, 97723}, // __builtin_ia32_pf2iw
      {Intrinsic::x86_3dnow_pfacc, 97346}, // __builtin_ia32_pfacc
      {Intrinsic::x86_3dnow_pfadd, 97367}, // __builtin_ia32_pfadd
      {Intrinsic::x86_3dnow_pfcmpeq, 97388}, // __builtin_ia32_pfcmpeq
      {Intrinsic::x86_3dnow_pfcmpge, 97411}, // __builtin_ia32_pfcmpge
      {Intrinsic::x86_3dnow_pfcmpgt, 97434}, // __builtin_ia32_pfcmpgt
      {Intrinsic::x86_3dnow_pfmax, 97457}, // __builtin_ia32_pfmax
      {Intrinsic::x86_3dnow_pfmin, 97478}, // __builtin_ia32_pfmin
      {Intrinsic::x86_3dnow_pfmul, 97499}, // __builtin_ia32_pfmul
      {Intrinsic::x86_3dnowa_pfnacc, 97744}, // __builtin_ia32_pfnacc
      {Intrinsic::x86_3dnowa_pfpnacc, 97766}, // __builtin_ia32_pfpnacc
      {Intrinsic::x86_3dnow_pfrcp, 97520}, // __builtin_ia32_pfrcp
      {Intrinsic::x86_3dnow_pfrcpit1, 97541}, // __builtin_ia32_pfrcpit1
      {Intrinsic::x86_3dnow_pfrcpit2, 97565}, // __builtin_ia32_pfrcpit2
      {Intrinsic::x86_3dnow_pfrsqit1, 97589}, // __builtin_ia32_pfrsqit1
      {Intrinsic::x86_3dnow_pfrsqrt, 97613}, // __builtin_ia32_pfrsqrt
      {Intrinsic::x86_3dnow_pfsub, 97636}, // __builtin_ia32_pfsub
      {Intrinsic::x86_3dnow_pfsubr, 97657}, // __builtin_ia32_pfsubr
      {Intrinsic::x86_ssse3_phadd_d, 121761}, // __builtin_ia32_phaddd
      {Intrinsic::x86_ssse3_phadd_d_128, 121783}, // __builtin_ia32_phaddd128
      {Intrinsic::x86_avx2_phadd_d, 100533}, // __builtin_ia32_phaddd256
      {Intrinsic::x86_ssse3_phadd_sw, 121808}, // __builtin_ia32_phaddsw
      {Intrinsic::x86_ssse3_phadd_sw_128, 121831}, // __builtin_ia32_phaddsw128
      {Intrinsic::x86_avx2_phadd_sw, 100558}, // __builtin_ia32_phaddsw256
      {Intrinsic::x86_ssse3_phadd_w, 121857}, // __builtin_ia32_phaddw
      {Intrinsic::x86_ssse3_phadd_w_128, 121879}, // __builtin_ia32_phaddw128
      {Intrinsic::x86_avx2_phadd_w, 100584}, // __builtin_ia32_phaddw256
      {Intrinsic::x86_sse41_phminposuw, 120916}, // __builtin_ia32_phminposuw128
      {Intrinsic::x86_ssse3_phsub_d, 121904}, // __builtin_ia32_phsubd
      {Intrinsic::x86_ssse3_phsub_d_128, 121926}, // __builtin_ia32_phsubd128
      {Intrinsic::x86_avx2_phsub_d, 100609}, // __builtin_ia32_phsubd256
      {Intrinsic::x86_ssse3_phsub_sw, 121951}, // __builtin_ia32_phsubsw
      {Intrinsic::x86_ssse3_phsub_sw_128, 121974}, // __builtin_ia32_phsubsw128
      {Intrinsic::x86_avx2_phsub_sw, 100634}, // __builtin_ia32_phsubsw256
      {Intrinsic::x86_ssse3_phsub_w, 122000}, // __builtin_ia32_phsubw
      {Intrinsic::x86_ssse3_phsub_w_128, 122022}, // __builtin_ia32_phsubw128
      {Intrinsic::x86_avx2_phsub_w, 100660}, // __builtin_ia32_phsubw256
      {Intrinsic::x86_3dnow_pi2fd, 97679}, // __builtin_ia32_pi2fd
      {Intrinsic::x86_3dnowa_pi2fw, 97789}, // __builtin_ia32_pi2fw
      {Intrinsic::x86_ssse3_pmadd_ub_sw, 122047}, // __builtin_ia32_pmaddubsw
      {Intrinsic::x86_ssse3_pmadd_ub_sw_128, 122072}, // __builtin_ia32_pmaddubsw128
      {Intrinsic::x86_avx2_pmadd_ub_sw, 100685}, // __builtin_ia32_pmaddubsw256
      {Intrinsic::x86_avx512_pmaddubs_w_512, 111034}, // __builtin_ia32_pmaddubsw512
      {Intrinsic::x86_mmx_pmadd_wd, 116611}, // __builtin_ia32_pmaddwd
      {Intrinsic::x86_sse2_pmadd_wd, 119848}, // __builtin_ia32_pmaddwd128
      {Intrinsic::x86_avx2_pmadd_wd, 100713}, // __builtin_ia32_pmaddwd256
      {Intrinsic::x86_avx512_pmaddw_d_512, 111062}, // __builtin_ia32_pmaddwd512
      {Intrinsic::x86_mmx_pmaxs_w, 116634}, // __builtin_ia32_pmaxsw
      {Intrinsic::x86_mmx_pmaxu_b, 116656}, // __builtin_ia32_pmaxub
      {Intrinsic::x86_mmx_pmins_w, 116678}, // __builtin_ia32_pminsw
      {Intrinsic::x86_mmx_pminu_b, 116700}, // __builtin_ia32_pminub
      {Intrinsic::x86_avx512_mask_pmov_db_128, 105616}, // __builtin_ia32_pmovdb128_mask
      {Intrinsic::x86_avx512_mask_pmov_db_mem_128, 105676}, // __builtin_ia32_pmovdb128mem_mask
      {Intrinsic::x86_avx512_mask_pmov_db_256, 105646}, // __builtin_ia32_pmovdb256_mask
      {Intrinsic::x86_avx512_mask_pmov_db_mem_256, 105709}, // __builtin_ia32_pmovdb256mem_mask
      {Intrinsic::x86_avx512_mask_pmov_db_mem_512, 105742}, // __builtin_ia32_pmovdb512mem_mask
      {Intrinsic::x86_avx512_mask_pmov_dw_128, 105775}, // __builtin_ia32_pmovdw128_mask
      {Intrinsic::x86_avx512_mask_pmov_dw_mem_128, 105835}, // __builtin_ia32_pmovdw128mem_mask
      {Intrinsic::x86_avx512_mask_pmov_dw_256, 105805}, // __builtin_ia32_pmovdw256_mask
      {Intrinsic::x86_avx512_mask_pmov_dw_mem_256, 105868}, // __builtin_ia32_pmovdw256mem_mask
      {Intrinsic::x86_avx512_mask_pmov_dw_mem_512, 105901}, // __builtin_ia32_pmovdw512mem_mask
      {Intrinsic::x86_mmx_pmovmskb, 116722}, // __builtin_ia32_pmovmskb
      {Intrinsic::x86_sse2_pmovmskb_128, 119874}, // __builtin_ia32_pmovmskb128
      {Intrinsic::x86_avx2_pmovmskb, 100739}, // __builtin_ia32_pmovmskb256
      {Intrinsic::x86_avx512_mask_pmov_qb_128, 105934}, // __builtin_ia32_pmovqb128_mask
      {Intrinsic::x86_avx512_mask_pmov_qb_mem_128, 106024}, // __builtin_ia32_pmovqb128mem_mask
      {Intrinsic::x86_avx512_mask_pmov_qb_256, 105964}, // __builtin_ia32_pmovqb256_mask
      {Intrinsic::x86_avx512_mask_pmov_qb_mem_256, 106057}, // __builtin_ia32_pmovqb256mem_mask
      {Intrinsic::x86_avx512_mask_pmov_qb_512, 105994}, // __builtin_ia32_pmovqb512_mask
      {Intrinsic::x86_avx512_mask_pmov_qb_mem_512, 106090}, // __builtin_ia32_pmovqb512mem_mask
      {Intrinsic::x86_avx512_mask_pmov_qd_128, 106123}, // __builtin_ia32_pmovqd128_mask
      {Intrinsic::x86_avx512_mask_pmov_qd_mem_128, 106153}, // __builtin_ia32_pmovqd128mem_mask
      {Intrinsic::x86_avx512_mask_pmov_qd_mem_256, 106186}, // __builtin_ia32_pmovqd256mem_mask
      {Intrinsic::x86_avx512_mask_pmov_qd_mem_512, 106219}, // __builtin_ia32_pmovqd512mem_mask
      {Intrinsic::x86_avx512_mask_pmov_qw_128, 106252}, // __builtin_ia32_pmovqw128_mask
      {Intrinsic::x86_avx512_mask_pmov_qw_mem_128, 106312}, // __builtin_ia32_pmovqw128mem_mask
      {Intrinsic::x86_avx512_mask_pmov_qw_256, 106282}, // __builtin_ia32_pmovqw256_mask
      {Intrinsic::x86_avx512_mask_pmov_qw_mem_256, 106345}, // __builtin_ia32_pmovqw256mem_mask
      {Intrinsic::x86_avx512_mask_pmov_qw_mem_512, 106378}, // __builtin_ia32_pmovqw512mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_db_128, 106540}, // __builtin_ia32_pmovsdb128_mask
      {Intrinsic::x86_avx512_mask_pmovs_db_mem_128, 106633}, // __builtin_ia32_pmovsdb128mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_db_256, 106571}, // __builtin_ia32_pmovsdb256_mask
      {Intrinsic::x86_avx512_mask_pmovs_db_mem_256, 106667}, // __builtin_ia32_pmovsdb256mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_db_512, 106602}, // __builtin_ia32_pmovsdb512_mask
      {Intrinsic::x86_avx512_mask_pmovs_db_mem_512, 106701}, // __builtin_ia32_pmovsdb512mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_dw_128, 106735}, // __builtin_ia32_pmovsdw128_mask
      {Intrinsic::x86_avx512_mask_pmovs_dw_mem_128, 106828}, // __builtin_ia32_pmovsdw128mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_dw_256, 106766}, // __builtin_ia32_pmovsdw256_mask
      {Intrinsic::x86_avx512_mask_pmovs_dw_mem_256, 106862}, // __builtin_ia32_pmovsdw256mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_dw_512, 106797}, // __builtin_ia32_pmovsdw512_mask
      {Intrinsic::x86_avx512_mask_pmovs_dw_mem_512, 106896}, // __builtin_ia32_pmovsdw512mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qb_128, 106930}, // __builtin_ia32_pmovsqb128_mask
      {Intrinsic::x86_avx512_mask_pmovs_qb_mem_128, 107023}, // __builtin_ia32_pmovsqb128mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qb_256, 106961}, // __builtin_ia32_pmovsqb256_mask
      {Intrinsic::x86_avx512_mask_pmovs_qb_mem_256, 107057}, // __builtin_ia32_pmovsqb256mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qb_512, 106992}, // __builtin_ia32_pmovsqb512_mask
      {Intrinsic::x86_avx512_mask_pmovs_qb_mem_512, 107091}, // __builtin_ia32_pmovsqb512mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qd_128, 107125}, // __builtin_ia32_pmovsqd128_mask
      {Intrinsic::x86_avx512_mask_pmovs_qd_mem_128, 107218}, // __builtin_ia32_pmovsqd128mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qd_256, 107156}, // __builtin_ia32_pmovsqd256_mask
      {Intrinsic::x86_avx512_mask_pmovs_qd_mem_256, 107252}, // __builtin_ia32_pmovsqd256mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qd_512, 107187}, // __builtin_ia32_pmovsqd512_mask
      {Intrinsic::x86_avx512_mask_pmovs_qd_mem_512, 107286}, // __builtin_ia32_pmovsqd512mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qw_128, 107320}, // __builtin_ia32_pmovsqw128_mask
      {Intrinsic::x86_avx512_mask_pmovs_qw_mem_128, 107413}, // __builtin_ia32_pmovsqw128mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qw_256, 107351}, // __builtin_ia32_pmovsqw256_mask
      {Intrinsic::x86_avx512_mask_pmovs_qw_mem_256, 107447}, // __builtin_ia32_pmovsqw256mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_qw_512, 107382}, // __builtin_ia32_pmovsqw512_mask
      {Intrinsic::x86_avx512_mask_pmovs_qw_mem_512, 107481}, // __builtin_ia32_pmovsqw512mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_wb_128, 107515}, // __builtin_ia32_pmovswb128_mask
      {Intrinsic::x86_avx512_mask_pmovs_wb_mem_128, 107608}, // __builtin_ia32_pmovswb128mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_wb_256, 107546}, // __builtin_ia32_pmovswb256_mask
      {Intrinsic::x86_avx512_mask_pmovs_wb_mem_256, 107642}, // __builtin_ia32_pmovswb256mem_mask
      {Intrinsic::x86_avx512_mask_pmovs_wb_512, 107577}, // __builtin_ia32_pmovswb512_mask
      {Intrinsic::x86_avx512_mask_pmovs_wb_mem_512, 107676}, // __builtin_ia32_pmovswb512mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_db_128, 107710}, // __builtin_ia32_pmovusdb128_mask
      {Intrinsic::x86_avx512_mask_pmovus_db_mem_128, 107806}, // __builtin_ia32_pmovusdb128mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_db_256, 107742}, // __builtin_ia32_pmovusdb256_mask
      {Intrinsic::x86_avx512_mask_pmovus_db_mem_256, 107841}, // __builtin_ia32_pmovusdb256mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_db_512, 107774}, // __builtin_ia32_pmovusdb512_mask
      {Intrinsic::x86_avx512_mask_pmovus_db_mem_512, 107876}, // __builtin_ia32_pmovusdb512mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_dw_128, 107911}, // __builtin_ia32_pmovusdw128_mask
      {Intrinsic::x86_avx512_mask_pmovus_dw_mem_128, 108007}, // __builtin_ia32_pmovusdw128mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_dw_256, 107943}, // __builtin_ia32_pmovusdw256_mask
      {Intrinsic::x86_avx512_mask_pmovus_dw_mem_256, 108042}, // __builtin_ia32_pmovusdw256mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_dw_512, 107975}, // __builtin_ia32_pmovusdw512_mask
      {Intrinsic::x86_avx512_mask_pmovus_dw_mem_512, 108077}, // __builtin_ia32_pmovusdw512mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qb_128, 108112}, // __builtin_ia32_pmovusqb128_mask
      {Intrinsic::x86_avx512_mask_pmovus_qb_mem_128, 108208}, // __builtin_ia32_pmovusqb128mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qb_256, 108144}, // __builtin_ia32_pmovusqb256_mask
      {Intrinsic::x86_avx512_mask_pmovus_qb_mem_256, 108243}, // __builtin_ia32_pmovusqb256mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qb_512, 108176}, // __builtin_ia32_pmovusqb512_mask
      {Intrinsic::x86_avx512_mask_pmovus_qb_mem_512, 108278}, // __builtin_ia32_pmovusqb512mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qd_128, 108313}, // __builtin_ia32_pmovusqd128_mask
      {Intrinsic::x86_avx512_mask_pmovus_qd_mem_128, 108409}, // __builtin_ia32_pmovusqd128mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qd_256, 108345}, // __builtin_ia32_pmovusqd256_mask
      {Intrinsic::x86_avx512_mask_pmovus_qd_mem_256, 108444}, // __builtin_ia32_pmovusqd256mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qd_512, 108377}, // __builtin_ia32_pmovusqd512_mask
      {Intrinsic::x86_avx512_mask_pmovus_qd_mem_512, 108479}, // __builtin_ia32_pmovusqd512mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qw_128, 108514}, // __builtin_ia32_pmovusqw128_mask
      {Intrinsic::x86_avx512_mask_pmovus_qw_mem_128, 108610}, // __builtin_ia32_pmovusqw128mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qw_256, 108546}, // __builtin_ia32_pmovusqw256_mask
      {Intrinsic::x86_avx512_mask_pmovus_qw_mem_256, 108645}, // __builtin_ia32_pmovusqw256mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_qw_512, 108578}, // __builtin_ia32_pmovusqw512_mask
      {Intrinsic::x86_avx512_mask_pmovus_qw_mem_512, 108680}, // __builtin_ia32_pmovusqw512mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_wb_128, 108715}, // __builtin_ia32_pmovuswb128_mask
      {Intrinsic::x86_avx512_mask_pmovus_wb_mem_128, 108811}, // __builtin_ia32_pmovuswb128mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_wb_256, 108747}, // __builtin_ia32_pmovuswb256_mask
      {Intrinsic::x86_avx512_mask_pmovus_wb_mem_256, 108846}, // __builtin_ia32_pmovuswb256mem_mask
      {Intrinsic::x86_avx512_mask_pmovus_wb_512, 108779}, // __builtin_ia32_pmovuswb512_mask
      {Intrinsic::x86_avx512_mask_pmovus_wb_mem_512, 108881}, // __builtin_ia32_pmovuswb512mem_mask
      {Intrinsic::x86_avx512_mask_pmov_wb_128, 106411}, // __builtin_ia32_pmovwb128_mask
      {Intrinsic::x86_avx512_mask_pmov_wb_mem_128, 106441}, // __builtin_ia32_pmovwb128mem_mask
      {Intrinsic::x86_avx512_mask_pmov_wb_mem_256, 106474}, // __builtin_ia32_pmovwb256mem_mask
      {Intrinsic::x86_avx512_mask_pmov_wb_mem_512, 106507}, // __builtin_ia32_pmovwb512mem_mask
      {Intrinsic::x86_ssse3_pmul_hr_sw, 122100}, // __builtin_ia32_pmulhrsw
      {Intrinsic::x86_ssse3_pmul_hr_sw_128, 122124}, // __builtin_ia32_pmulhrsw128
      {Intrinsic::x86_avx2_pmul_hr_sw, 100766}, // __builtin_ia32_pmulhrsw256
      {Intrinsic::x86_avx512_pmul_hr_sw_512, 111088}, // __builtin_ia32_pmulhrsw512
      {Intrinsic::x86_3dnow_pmulhrw, 97700}, // __builtin_ia32_pmulhrw
      {Intrinsic::x86_mmx_pmulhu_w, 116768}, // __builtin_ia32_pmulhuw
      {Intrinsic::x86_sse2_pmulhu_w, 119926}, // __builtin_ia32_pmulhuw128
      {Intrinsic::x86_avx2_pmulhu_w, 100818}, // __builtin_ia32_pmulhuw256
      {Intrinsic::x86_avx512_pmulhu_w_512, 111140}, // __builtin_ia32_pmulhuw512
      {Intrinsic::x86_mmx_pmulh_w, 116746}, // __builtin_ia32_pmulhw
      {Intrinsic::x86_sse2_pmulh_w, 119901}, // __builtin_ia32_pmulhw128
      {Intrinsic::x86_avx2_pmulh_w, 100793}, // __builtin_ia32_pmulhw256
      {Intrinsic::x86_avx512_pmulh_w_512, 111115}, // __builtin_ia32_pmulhw512
      {Intrinsic::x86_mmx_pmull_w, 116791}, // __builtin_ia32_pmullw
      {Intrinsic::x86_mmx_pmulu_dq, 116813}, // __builtin_ia32_pmuludq
      {Intrinsic::x86_mmx_por, 116836}, // __builtin_ia32_por
      {Intrinsic::x86_mmx_psad_bw, 116855}, // __builtin_ia32_psadbw
      {Intrinsic::x86_sse2_psad_bw, 119952}, // __builtin_ia32_psadbw128
      {Intrinsic::x86_avx2_psad_bw, 100844}, // __builtin_ia32_psadbw256
      {Intrinsic::x86_avx512_psad_bw_512, 111265}, // __builtin_ia32_psadbw512
      {Intrinsic::x86_ssse3_pshuf_b, 122151}, // __builtin_ia32_pshufb
      {Intrinsic::x86_ssse3_pshuf_b_128, 122173}, // __builtin_ia32_pshufb128
      {Intrinsic::x86_avx2_pshuf_b, 100869}, // __builtin_ia32_pshufb256
      {Intrinsic::x86_avx512_pshuf_b_512, 111290}, // __builtin_ia32_pshufb512
      {Intrinsic::x86_sse_pshuf_w, 118812}, // __builtin_ia32_pshufw
      {Intrinsic::x86_ssse3_psign_b, 122198}, // __builtin_ia32_psignb
      {Intrinsic::x86_ssse3_psign_b_128, 122220}, // __builtin_ia32_psignb128
      {Intrinsic::x86_avx2_psign_b, 100894}, // __builtin_ia32_psignb256
      {Intrinsic::x86_ssse3_psign_d, 122245}, // __builtin_ia32_psignd
      {Intrinsic::x86_ssse3_psign_d_128, 122267}, // __builtin_ia32_psignd128
      {Intrinsic::x86_avx2_psign_d, 100919}, // __builtin_ia32_psignd256
      {Intrinsic::x86_ssse3_psign_w, 122292}, // __builtin_ia32_psignw
      {Intrinsic::x86_ssse3_psign_w_128, 122314}, // __builtin_ia32_psignw128
      {Intrinsic::x86_avx2_psign_w, 100944}, // __builtin_ia32_psignw256
      {Intrinsic::x86_mmx_psll_d, 116877}, // __builtin_ia32_pslld
      {Intrinsic::x86_sse2_psll_d, 119977}, // __builtin_ia32_pslld128
      {Intrinsic::x86_avx2_psll_d, 100969}, // __builtin_ia32_pslld256
      {Intrinsic::x86_avx512_psll_d_512, 111315}, // __builtin_ia32_pslld512
      {Intrinsic::x86_mmx_pslli_d, 116940}, // __builtin_ia32_pslldi
      {Intrinsic::x86_sse2_pslli_d, 120049}, // __builtin_ia32_pslldi128
      {Intrinsic::x86_avx2_pslli_d, 101041}, // __builtin_ia32_pslldi256
      {Intrinsic::x86_avx512_pslli_d_512, 111387}, // __builtin_ia32_pslldi512
      {Intrinsic::x86_mmx_psll_q, 116898}, // __builtin_ia32_psllq
      {Intrinsic::x86_sse2_psll_q, 120001}, // __builtin_ia32_psllq128
      {Intrinsic::x86_avx2_psll_q, 100993}, // __builtin_ia32_psllq256
      {Intrinsic::x86_avx512_psll_q_512, 111339}, // __builtin_ia32_psllq512
      {Intrinsic::x86_mmx_pslli_q, 116962}, // __builtin_ia32_psllqi
      {Intrinsic::x86_sse2_pslli_q, 120074}, // __builtin_ia32_psllqi128
      {Intrinsic::x86_avx2_pslli_q, 101066}, // __builtin_ia32_psllqi256
      {Intrinsic::x86_avx512_pslli_q_512, 111412}, // __builtin_ia32_psllqi512
      {Intrinsic::x86_avx512_psllv_w_256, 111535}, // __builtin_ia32_psllv16hi
      {Intrinsic::x86_avx512_psllv_d_512, 111462}, // __builtin_ia32_psllv16si
      {Intrinsic::x86_avx2_psllv_q, 101164}, // __builtin_ia32_psllv2di
      {Intrinsic::x86_avx512_psllv_w_512, 111560}, // __builtin_ia32_psllv32hi
      {Intrinsic::x86_avx2_psllv_q_256, 101188}, // __builtin_ia32_psllv4di
      {Intrinsic::x86_avx2_psllv_d, 101116}, // __builtin_ia32_psllv4si
      {Intrinsic::x86_avx512_psllv_q_512, 111487}, // __builtin_ia32_psllv8di
      {Intrinsic::x86_avx512_psllv_w_128, 111511}, // __builtin_ia32_psllv8hi
      {Intrinsic::x86_avx2_psllv_d_256, 101140}, // __builtin_ia32_psllv8si
      {Intrinsic::x86_mmx_psll_w, 116919}, // __builtin_ia32_psllw
      {Intrinsic::x86_sse2_psll_w, 120025}, // __builtin_ia32_psllw128
      {Intrinsic::x86_avx2_psll_w, 101017}, // __builtin_ia32_psllw256
      {Intrinsic::x86_avx512_psll_w_512, 111363}, // __builtin_ia32_psllw512
      {Intrinsic::x86_mmx_pslli_w, 116984}, // __builtin_ia32_psllwi
      {Intrinsic::x86_sse2_pslli_w, 120099}, // __builtin_ia32_psllwi128
      {Intrinsic::x86_avx2_pslli_w, 101091}, // __builtin_ia32_psllwi256
      {Intrinsic::x86_avx512_pslli_w_512, 111437}, // __builtin_ia32_psllwi512
      {Intrinsic::x86_mmx_psra_d, 117006}, // __builtin_ia32_psrad
      {Intrinsic::x86_sse2_psra_d, 120124}, // __builtin_ia32_psrad128
      {Intrinsic::x86_avx2_psra_d, 101212}, // __builtin_ia32_psrad256
      {Intrinsic::x86_avx512_psra_d_512, 111585}, // __builtin_ia32_psrad512
      {Intrinsic::x86_mmx_psrai_d, 117048}, // __builtin_ia32_psradi
      {Intrinsic::x86_sse2_psrai_d, 120172}, // __builtin_ia32_psradi128
      {Intrinsic::x86_avx2_psrai_d, 101260}, // __builtin_ia32_psradi256
      {Intrinsic::x86_avx512_psrai_d_512, 111705}, // __builtin_ia32_psradi512
      {Intrinsic::x86_avx512_psra_q_128, 111609}, // __builtin_ia32_psraq128
      {Intrinsic::x86_avx512_psra_q_256, 111633}, // __builtin_ia32_psraq256
      {Intrinsic::x86_avx512_psra_q_512, 111657}, // __builtin_ia32_psraq512
      {Intrinsic::x86_avx512_psrai_q_128, 111730}, // __builtin_ia32_psraqi128
      {Intrinsic::x86_avx512_psrai_q_256, 111755}, // __builtin_ia32_psraqi256
      {Intrinsic::x86_avx512_psrai_q_512, 111780}, // __builtin_ia32_psraqi512
      {Intrinsic::x86_avx512_psrav_w_256, 111953}, // __builtin_ia32_psrav16hi
      {Intrinsic::x86_avx512_psrav_d_512, 111830}, // __builtin_ia32_psrav16si
      {Intrinsic::x86_avx512_psrav_w_512, 111978}, // __builtin_ia32_psrav32hi
      {Intrinsic::x86_avx2_psrav_d, 101310}, // __builtin_ia32_psrav4si
      {Intrinsic::x86_avx512_psrav_q_512, 111905}, // __builtin_ia32_psrav8di
      {Intrinsic::x86_avx512_psrav_w_128, 111929}, // __builtin_ia32_psrav8hi
      {Intrinsic::x86_avx2_psrav_d_256, 101334}, // __builtin_ia32_psrav8si
      {Intrinsic::x86_avx512_psrav_q_128, 111855}, // __builtin_ia32_psravq128
      {Intrinsic::x86_avx512_psrav_q_256, 111880}, // __builtin_ia32_psravq256
      {Intrinsic::x86_mmx_psra_w, 117027}, // __builtin_ia32_psraw
      {Intrinsic::x86_sse2_psra_w, 120148}, // __builtin_ia32_psraw128
      {Intrinsic::x86_avx2_psra_w, 101236}, // __builtin_ia32_psraw256
      {Intrinsic::x86_avx512_psra_w_512, 111681}, // __builtin_ia32_psraw512
      {Intrinsic::x86_mmx_psrai_w, 117070}, // __builtin_ia32_psrawi
      {Intrinsic::x86_sse2_psrai_w, 120197}, // __builtin_ia32_psrawi128
      {Intrinsic::x86_avx2_psrai_w, 101285}, // __builtin_ia32_psrawi256
      {Intrinsic::x86_avx512_psrai_w_512, 111805}, // __builtin_ia32_psrawi512
      {Intrinsic::x86_mmx_psrl_d, 117092}, // __builtin_ia32_psrld
      {Intrinsic::x86_sse2_psrl_d, 120222}, // __builtin_ia32_psrld128
      {Intrinsic::x86_avx2_psrl_d, 101358}, // __builtin_ia32_psrld256
      {Intrinsic::x86_avx512_psrl_d_512, 112003}, // __builtin_ia32_psrld512
      {Intrinsic::x86_mmx_psrli_d, 117155}, // __builtin_ia32_psrldi
      {Intrinsic::x86_sse2_psrli_d, 120294}, // __builtin_ia32_psrldi128
      {Intrinsic::x86_avx2_psrli_d, 101430}, // __builtin_ia32_psrldi256
      {Intrinsic::x86_avx512_psrli_d_512, 112075}, // __builtin_ia32_psrldi512
      {Intrinsic::x86_mmx_psrl_q, 117113}, // __builtin_ia32_psrlq
      {Intrinsic::x86_sse2_psrl_q, 120246}, // __builtin_ia32_psrlq128
      {Intrinsic::x86_avx2_psrl_q, 101382}, // __builtin_ia32_psrlq256
      {Intrinsic::x86_avx512_psrl_q_512, 112027}, // __builtin_ia32_psrlq512
      {Intrinsic::x86_mmx_psrli_q, 117177}, // __builtin_ia32_psrlqi
      {Intrinsic::x86_sse2_psrli_q, 120319}, // __builtin_ia32_psrlqi128
      {Intrinsic::x86_avx2_psrli_q, 101455}, // __builtin_ia32_psrlqi256
      {Intrinsic::x86_avx512_psrli_q_512, 112100}, // __builtin_ia32_psrlqi512
      {Intrinsic::x86_avx512_psrlv_w_256, 112223}, // __builtin_ia32_psrlv16hi
      {Intrinsic::x86_avx512_psrlv_d_512, 112150}, // __builtin_ia32_psrlv16si
      {Intrinsic::x86_avx2_psrlv_q, 101553}, // __builtin_ia32_psrlv2di
      {Intrinsic::x86_avx512_psrlv_w_512, 112248}, // __builtin_ia32_psrlv32hi
      {Intrinsic::x86_avx2_psrlv_q_256, 101577}, // __builtin_ia32_psrlv4di
      {Intrinsic::x86_avx2_psrlv_d, 101505}, // __builtin_ia32_psrlv4si
      {Intrinsic::x86_avx512_psrlv_q_512, 112175}, // __builtin_ia32_psrlv8di
      {Intrinsic::x86_avx512_psrlv_w_128, 112199}, // __builtin_ia32_psrlv8hi
      {Intrinsic::x86_avx2_psrlv_d_256, 101529}, // __builtin_ia32_psrlv8si
      {Intrinsic::x86_mmx_psrl_w, 117134}, // __builtin_ia32_psrlw
      {Intrinsic::x86_sse2_psrl_w, 120270}, // __builtin_ia32_psrlw128
      {Intrinsic::x86_avx2_psrl_w, 101406}, // __builtin_ia32_psrlw256
      {Intrinsic::x86_avx512_psrl_w_512, 112051}, // __builtin_ia32_psrlw512
      {Intrinsic::x86_mmx_psrli_w, 117199}, // __builtin_ia32_psrlwi
      {Intrinsic::x86_sse2_psrli_w, 120344}, // __builtin_ia32_psrlwi128
      {Intrinsic::x86_avx2_psrli_w, 101480}, // __builtin_ia32_psrlwi256
      {Intrinsic::x86_avx512_psrli_w_512, 112125}, // __builtin_ia32_psrlwi512
      {Intrinsic::x86_mmx_psub_b, 117221}, // __builtin_ia32_psubb
      {Intrinsic::x86_mmx_psub_d, 117242}, // __builtin_ia32_psubd
      {Intrinsic::x86_mmx_psub_q, 117263}, // __builtin_ia32_psubq
      {Intrinsic::x86_mmx_psubs_b, 117305}, // __builtin_ia32_psubsb
      {Intrinsic::x86_mmx_psubs_w, 117327}, // __builtin_ia32_psubsw
      {Intrinsic::x86_mmx_psubus_b, 117349}, // __builtin_ia32_psubusb
      {Intrinsic::x86_mmx_psubus_w, 117372}, // __builtin_ia32_psubusw
      {Intrinsic::x86_mmx_psub_w, 117284}, // __builtin_ia32_psubw
      {Intrinsic::x86_avx512_pternlog_d_128, 112273}, // __builtin_ia32_pternlogd128
      {Intrinsic::x86_avx512_pternlog_d_256, 112301}, // __builtin_ia32_pternlogd256
      {Intrinsic::x86_avx512_pternlog_d_512, 112329}, // __builtin_ia32_pternlogd512
      {Intrinsic::x86_avx512_pternlog_q_128, 112357}, // __builtin_ia32_pternlogq128
      {Intrinsic::x86_avx512_pternlog_q_256, 112385}, // __builtin_ia32_pternlogq256
      {Intrinsic::x86_avx512_pternlog_q_512, 112413}, // __builtin_ia32_pternlogq512
      {Intrinsic::x86_sse41_ptestc, 120945}, // __builtin_ia32_ptestc128
      {Intrinsic::x86_avx_ptestc_256, 98959}, // __builtin_ia32_ptestc256
      {Intrinsic::x86_sse41_ptestnzc, 120970}, // __builtin_ia32_ptestnzc128
      {Intrinsic::x86_avx_ptestnzc_256, 98984}, // __builtin_ia32_ptestnzc256
      {Intrinsic::x86_sse41_ptestz, 120997}, // __builtin_ia32_ptestz128
      {Intrinsic::x86_avx_ptestz_256, 99011}, // __builtin_ia32_ptestz256
      {Intrinsic::x86_ptwrite32, 117720}, // __builtin_ia32_ptwrite32
      {Intrinsic::x86_ptwrite64, 117745}, // __builtin_ia32_ptwrite64
      {Intrinsic::x86_mmx_punpckhbw, 117395}, // __builtin_ia32_punpckhbw
      {Intrinsic::x86_mmx_punpckhdq, 117420}, // __builtin_ia32_punpckhdq
      {Intrinsic::x86_mmx_punpckhwd, 117445}, // __builtin_ia32_punpckhwd
      {Intrinsic::x86_mmx_punpcklbw, 117470}, // __builtin_ia32_punpcklbw
      {Intrinsic::x86_mmx_punpckldq, 117495}, // __builtin_ia32_punpckldq
      {Intrinsic::x86_mmx_punpcklwd, 117520}, // __builtin_ia32_punpcklwd
      {Intrinsic::x86_mmx_pxor, 117545}, // __builtin_ia32_pxor
      {Intrinsic::x86_avx512_mask_range_pd_128, 108916}, // __builtin_ia32_rangepd128_mask
      {Intrinsic::x86_avx512_mask_range_pd_256, 108947}, // __builtin_ia32_rangepd256_mask
      {Intrinsic::x86_avx512_mask_range_pd_512, 108978}, // __builtin_ia32_rangepd512_mask
      {Intrinsic::x86_avx512_mask_range_ps_128, 109009}, // __builtin_ia32_rangeps128_mask
      {Intrinsic::x86_avx512_mask_range_ps_256, 109040}, // __builtin_ia32_rangeps256_mask
      {Intrinsic::x86_avx512_mask_range_ps_512, 109071}, // __builtin_ia32_rangeps512_mask
      {Intrinsic::x86_avx512_mask_range_sd, 109102}, // __builtin_ia32_rangesd128_round_mask
      {Intrinsic::x86_avx512_mask_range_ss, 109139}, // __builtin_ia32_rangess128_round_mask
      {Intrinsic::x86_avx512_rcp14_pd_128, 112441}, // __builtin_ia32_rcp14pd128_mask
      {Intrinsic::x86_avx512_rcp14_pd_256, 112472}, // __builtin_ia32_rcp14pd256_mask
      {Intrinsic::x86_avx512_rcp14_pd_512, 112503}, // __builtin_ia32_rcp14pd512_mask
      {Intrinsic::x86_avx512_rcp14_ps_128, 112534}, // __builtin_ia32_rcp14ps128_mask
      {Intrinsic::x86_avx512_rcp14_ps_256, 112565}, // __builtin_ia32_rcp14ps256_mask
      {Intrinsic::x86_avx512_rcp14_ps_512, 112596}, // __builtin_ia32_rcp14ps512_mask
      {Intrinsic::x86_avx512_rcp14_sd, 112627}, // __builtin_ia32_rcp14sd_mask
      {Intrinsic::x86_avx512_rcp14_ss, 112655}, // __builtin_ia32_rcp14ss_mask
      {Intrinsic::x86_avx512_rcp28_pd, 112683}, // __builtin_ia32_rcp28pd_mask
      {Intrinsic::x86_avx512_rcp28_ps, 112711}, // __builtin_ia32_rcp28ps_mask
      {Intrinsic::x86_avx512_rcp28_sd, 112739}, // __builtin_ia32_rcp28sd_round_mask
      {Intrinsic::x86_avx512_rcp28_ss, 112773}, // __builtin_ia32_rcp28ss_round_mask
      {Intrinsic::x86_sse_rcp_ps, 118834}, // __builtin_ia32_rcpps
      {Intrinsic::x86_avx_rcp_ps_256, 99036}, // __builtin_ia32_rcpps256
      {Intrinsic::x86_sse_rcp_ss, 118855}, // __builtin_ia32_rcpss
      {Intrinsic::x86_rdfsbase_32, 117770}, // __builtin_ia32_rdfsbase32
      {Intrinsic::x86_rdfsbase_64, 117796}, // __builtin_ia32_rdfsbase64
      {Intrinsic::x86_rdgsbase_32, 117822}, // __builtin_ia32_rdgsbase32
      {Intrinsic::x86_rdgsbase_64, 117848}, // __builtin_ia32_rdgsbase64
      {Intrinsic::x86_rdpid, 117874}, // __builtin_ia32_rdpid
      {Intrinsic::x86_rdpkru, 117895}, // __builtin_ia32_rdpkru
      {Intrinsic::x86_rdpmc, 117917}, // __builtin_ia32_rdpmc
      {Intrinsic::x86_rdsspd, 117938}, // __builtin_ia32_rdsspd
      {Intrinsic::x86_rdsspq, 117960}, // __builtin_ia32_rdsspq
      {Intrinsic::x86_rdtsc, 117982}, // __builtin_ia32_rdtsc
      {Intrinsic::x86_flags_read_u32, 115405}, // __builtin_ia32_readeflags_u32
      {Intrinsic::x86_flags_read_u64, 115435}, // __builtin_ia32_readeflags_u64
      {Intrinsic::x86_avx512_mask_reduce_pd_128, 109176}, // __builtin_ia32_reducepd128_mask
      {Intrinsic::x86_avx512_mask_reduce_pd_256, 109208}, // __builtin_ia32_reducepd256_mask
      {Intrinsic::x86_avx512_mask_reduce_pd_512, 109240}, // __builtin_ia32_reducepd512_mask
      {Intrinsic::x86_avx512_mask_reduce_ps_128, 109272}, // __builtin_ia32_reduceps128_mask
      {Intrinsic::x86_avx512_mask_reduce_ps_256, 109304}, // __builtin_ia32_reduceps256_mask
      {Intrinsic::x86_avx512_mask_reduce_ps_512, 109336}, // __builtin_ia32_reduceps512_mask
      {Intrinsic::x86_avx512_mask_reduce_sd, 109368}, // __builtin_ia32_reducesd_mask
      {Intrinsic::x86_avx512_mask_reduce_ss, 109397}, // __builtin_ia32_reducess_mask
      {Intrinsic::x86_avx512_mask_rndscale_pd_128, 109426}, // __builtin_ia32_rndscalepd_128_mask
      {Intrinsic::x86_avx512_mask_rndscale_pd_256, 109461}, // __builtin_ia32_rndscalepd_256_mask
      {Intrinsic::x86_avx512_mask_rndscale_pd_512, 109496}, // __builtin_ia32_rndscalepd_mask
      {Intrinsic::x86_avx512_mask_rndscale_ps_128, 109527}, // __builtin_ia32_rndscaleps_128_mask
      {Intrinsic::x86_avx512_mask_rndscale_ps_256, 109562}, // __builtin_ia32_rndscaleps_256_mask
      {Intrinsic::x86_avx512_mask_rndscale_ps_512, 109597}, // __builtin_ia32_rndscaleps_mask
      {Intrinsic::x86_avx512_mask_rndscale_sd, 109628}, // __builtin_ia32_rndscalesd_round_mask
      {Intrinsic::x86_avx512_mask_rndscale_ss, 109665}, // __builtin_ia32_rndscaless_round_mask
      {Intrinsic::x86_sse41_round_pd, 121022}, // __builtin_ia32_roundpd
      {Intrinsic::x86_avx_round_pd_256, 99060}, // __builtin_ia32_roundpd256
      {Intrinsic::x86_sse41_round_ps, 121045}, // __builtin_ia32_roundps
      {Intrinsic::x86_avx_round_ps_256, 99086}, // __builtin_ia32_roundps256
      {Intrinsic::x86_sse41_round_sd, 121068}, // __builtin_ia32_roundsd
      {Intrinsic::x86_sse41_round_ss, 121091}, // __builtin_ia32_roundss
      {Intrinsic::x86_avx512_rsqrt14_pd_128, 112807}, // __builtin_ia32_rsqrt14pd128_mask
      {Intrinsic::x86_avx512_rsqrt14_pd_256, 112840}, // __builtin_ia32_rsqrt14pd256_mask
      {Intrinsic::x86_avx512_rsqrt14_pd_512, 112873}, // __builtin_ia32_rsqrt14pd512_mask
      {Intrinsic::x86_avx512_rsqrt14_ps_128, 112906}, // __builtin_ia32_rsqrt14ps128_mask
      {Intrinsic::x86_avx512_rsqrt14_ps_256, 112939}, // __builtin_ia32_rsqrt14ps256_mask
      {Intrinsic::x86_avx512_rsqrt14_ps_512, 112972}, // __builtin_ia32_rsqrt14ps512_mask
      {Intrinsic::x86_avx512_rsqrt14_sd, 113005}, // __builtin_ia32_rsqrt14sd_mask
      {Intrinsic::x86_avx512_rsqrt14_ss, 113035}, // __builtin_ia32_rsqrt14ss_mask
      {Intrinsic::x86_avx512_rsqrt28_pd, 113065}, // __builtin_ia32_rsqrt28pd_mask
      {Intrinsic::x86_avx512_rsqrt28_ps, 113095}, // __builtin_ia32_rsqrt28ps_mask
      {Intrinsic::x86_avx512_rsqrt28_sd, 113125}, // __builtin_ia32_rsqrt28sd_round_mask
      {Intrinsic::x86_avx512_rsqrt28_ss, 113161}, // __builtin_ia32_rsqrt28ss_round_mask
      {Intrinsic::x86_sse_rsqrt_ps, 118876}, // __builtin_ia32_rsqrtps
      {Intrinsic::x86_avx_rsqrt_ps_256, 99112}, // __builtin_ia32_rsqrtps256
      {Intrinsic::x86_sse_rsqrt_ss, 118899}, // __builtin_ia32_rsqrtss
      {Intrinsic::x86_rstorssp, 118003}, // __builtin_ia32_rstorssp
      {Intrinsic::x86_saveprevssp, 118027}, // __builtin_ia32_saveprevssp
      {Intrinsic::x86_avx512_mask_scalef_pd_128, 109702}, // __builtin_ia32_scalefpd128_mask
      {Intrinsic::x86_avx512_mask_scalef_pd_256, 109734}, // __builtin_ia32_scalefpd256_mask
      {Intrinsic::x86_avx512_mask_scalef_pd_512, 109766}, // __builtin_ia32_scalefpd512_mask
      {Intrinsic::x86_avx512_mask_scalef_ps_128, 109798}, // __builtin_ia32_scalefps128_mask
      {Intrinsic::x86_avx512_mask_scalef_ps_256, 109830}, // __builtin_ia32_scalefps256_mask
      {Intrinsic::x86_avx512_mask_scalef_ps_512, 109862}, // __builtin_ia32_scalefps512_mask
      {Intrinsic::x86_avx512_mask_scalef_sd, 109894}, // __builtin_ia32_scalefsd_round_mask
      {Intrinsic::x86_avx512_mask_scalef_ss, 109929}, // __builtin_ia32_scalefss_round_mask
      {Intrinsic::x86_avx512_scatterpf_dpd_512, 113197}, // __builtin_ia32_scatterpfdpd
      {Intrinsic::x86_avx512_scatterpf_dps_512, 113225}, // __builtin_ia32_scatterpfdps
      {Intrinsic::x86_avx512_scatterpf_qpd_512, 113253}, // __builtin_ia32_scatterpfqpd
      {Intrinsic::x86_avx512_scatterpf_qps_512, 113281}, // __builtin_ia32_scatterpfqps
      {Intrinsic::x86_serialize, 118054}, // __builtin_ia32_serialize
      {Intrinsic::x86_setssbsy, 118079}, // __builtin_ia32_setssbsy
      {Intrinsic::x86_sse_sfence, 118922}, // __builtin_ia32_sfence
      {Intrinsic::x86_sha1msg1, 118103}, // __builtin_ia32_sha1msg1
      {Intrinsic::x86_sha1msg2, 118127}, // __builtin_ia32_sha1msg2
      {Intrinsic::x86_sha1nexte, 118151}, // __builtin_ia32_sha1nexte
      {Intrinsic::x86_sha1rnds4, 118176}, // __builtin_ia32_sha1rnds4
      {Intrinsic::x86_sha256msg1, 118201}, // __builtin_ia32_sha256msg1
      {Intrinsic::x86_sha256msg2, 118227}, // __builtin_ia32_sha256msg2
      {Intrinsic::x86_sha256rnds2, 118253}, // __builtin_ia32_sha256rnds2
      {Intrinsic::x86_slwpcb, 118280}, // __builtin_ia32_slwpcb
      {Intrinsic::x86_avx512_sub_pd_512, 113309}, // __builtin_ia32_subpd512
      {Intrinsic::x86_avx512_sub_ps_512, 113333}, // __builtin_ia32_subps512
      {Intrinsic::x86_avx512_mask_sub_sd_round, 109964}, // __builtin_ia32_subsd_round_mask
      {Intrinsic::x86_avx512_mask_sub_ss_round, 109996}, // __builtin_ia32_subss_round_mask
      {Intrinsic::x86_tdpbf16ps, 122423}, // __builtin_ia32_tdpbf16ps
      {Intrinsic::x86_tdpbssd, 122448}, // __builtin_ia32_tdpbssd
      {Intrinsic::x86_tdpbsud, 122471}, // __builtin_ia32_tdpbsud
      {Intrinsic::x86_tdpbusd, 122494}, // __builtin_ia32_tdpbusd
      {Intrinsic::x86_tdpbuud, 122517}, // __builtin_ia32_tdpbuud
      {Intrinsic::x86_ldtilecfg, 115804}, // __builtin_ia32_tile_loadconfig
      {Intrinsic::x86_sttilecfg, 122339}, // __builtin_ia32_tile_storeconfig
      {Intrinsic::x86_tileloadd64, 122540}, // __builtin_ia32_tileloadd64
      {Intrinsic::x86_tileloaddt164, 122567}, // __builtin_ia32_tileloaddt164
      {Intrinsic::x86_tilerelease, 122596}, // __builtin_ia32_tilerelease
      {Intrinsic::x86_tilestored64, 122623}, // __builtin_ia32_tilestored64
      {Intrinsic::x86_tilezero, 122651}, // __builtin_ia32_tilezero
      {Intrinsic::x86_tpause, 122675}, // __builtin_ia32_tpause
      {Intrinsic::x86_sse_ucomieq_ss, 118944}, // __builtin_ia32_ucomieq
      {Intrinsic::x86_sse_ucomige_ss, 118967}, // __builtin_ia32_ucomige
      {Intrinsic::x86_sse_ucomigt_ss, 118990}, // __builtin_ia32_ucomigt
      {Intrinsic::x86_sse_ucomile_ss, 119013}, // __builtin_ia32_ucomile
      {Intrinsic::x86_sse_ucomilt_ss, 119036}, // __builtin_ia32_ucomilt
      {Intrinsic::x86_sse_ucomineq_ss, 119059}, // __builtin_ia32_ucomineq
      {Intrinsic::x86_sse2_ucomieq_sd, 120369}, // __builtin_ia32_ucomisdeq
      {Intrinsic::x86_sse2_ucomige_sd, 120394}, // __builtin_ia32_ucomisdge
      {Intrinsic::x86_sse2_ucomigt_sd, 120419}, // __builtin_ia32_ucomisdgt
      {Intrinsic::x86_sse2_ucomile_sd, 120444}, // __builtin_ia32_ucomisdle
      {Intrinsic::x86_sse2_ucomilt_sd, 120469}, // __builtin_ia32_ucomisdlt
      {Intrinsic::x86_sse2_ucomineq_sd, 120494}, // __builtin_ia32_ucomisdneq
      {Intrinsic::x86_umonitor, 122697}, // __builtin_ia32_umonitor
      {Intrinsic::x86_umwait, 122721}, // __builtin_ia32_umwait
      {Intrinsic::x86_avx512_vcomi_sd, 113357}, // __builtin_ia32_vcomisd
      {Intrinsic::x86_avx512_vcomi_ss, 113380}, // __builtin_ia32_vcomiss
      {Intrinsic::x86_vcvtps2ph_128, 122743}, // __builtin_ia32_vcvtps2ph
      {Intrinsic::x86_vcvtps2ph_256, 122768}, // __builtin_ia32_vcvtps2ph256
      {Intrinsic::x86_avx512_mask_vcvtps2ph_256, 110058}, // __builtin_ia32_vcvtps2ph256_mask
      {Intrinsic::x86_avx512_mask_vcvtps2ph_512, 110091}, // __builtin_ia32_vcvtps2ph512_mask
      {Intrinsic::x86_avx512_mask_vcvtps2ph_128, 110028}, // __builtin_ia32_vcvtps2ph_mask
      {Intrinsic::x86_avx512_vcvtsd2si32, 113403}, // __builtin_ia32_vcvtsd2si32
      {Intrinsic::x86_avx512_vcvtsd2si64, 113430}, // __builtin_ia32_vcvtsd2si64
      {Intrinsic::x86_avx512_vcvtsd2usi32, 113457}, // __builtin_ia32_vcvtsd2usi32
      {Intrinsic::x86_avx512_vcvtsd2usi64, 113485}, // __builtin_ia32_vcvtsd2usi64
      {Intrinsic::x86_avx512_vcvtss2si32, 113513}, // __builtin_ia32_vcvtss2si32
      {Intrinsic::x86_avx512_vcvtss2si64, 113540}, // __builtin_ia32_vcvtss2si64
      {Intrinsic::x86_avx512_vcvtss2usi32, 113567}, // __builtin_ia32_vcvtss2usi32
      {Intrinsic::x86_avx512_vcvtss2usi64, 113595}, // __builtin_ia32_vcvtss2usi64
      {Intrinsic::x86_avx512_cvttsd2si, 102099}, // __builtin_ia32_vcvttsd2si32
      {Intrinsic::x86_avx512_cvttsd2si64, 102127}, // __builtin_ia32_vcvttsd2si64
      {Intrinsic::x86_avx512_cvttsd2usi, 102155}, // __builtin_ia32_vcvttsd2usi32
      {Intrinsic::x86_avx512_cvttsd2usi64, 102184}, // __builtin_ia32_vcvttsd2usi64
      {Intrinsic::x86_avx512_cvttss2si, 102213}, // __builtin_ia32_vcvttss2si32
      {Intrinsic::x86_avx512_cvttss2si64, 102241}, // __builtin_ia32_vcvttss2si64
      {Intrinsic::x86_avx512_cvttss2usi, 102269}, // __builtin_ia32_vcvttss2usi32
      {Intrinsic::x86_avx512_cvttss2usi64, 102298}, // __builtin_ia32_vcvttss2usi64
      {Intrinsic::x86_mmx_pextr_w, 116555}, // __builtin_ia32_vec_ext_v4hi
      {Intrinsic::x86_mmx_pinsr_w, 116583}, // __builtin_ia32_vec_set_v4hi
      {Intrinsic::x86_fma_vfmaddsub_pd, 115527}, // __builtin_ia32_vfmaddsubpd
      {Intrinsic::x86_fma_vfmaddsub_pd_256, 115554}, // __builtin_ia32_vfmaddsubpd256
      {Intrinsic::x86_fma_vfmaddsub_ps, 115584}, // __builtin_ia32_vfmaddsubps
      {Intrinsic::x86_fma_vfmaddsub_ps_256, 115611}, // __builtin_ia32_vfmaddsubps256
      {Intrinsic::x86_xop_vfrcz_pd, 123439}, // __builtin_ia32_vfrczpd
      {Intrinsic::x86_xop_vfrcz_pd_256, 123462}, // __builtin_ia32_vfrczpd256
      {Intrinsic::x86_xop_vfrcz_ps, 123488}, // __builtin_ia32_vfrczps
      {Intrinsic::x86_xop_vfrcz_ps_256, 123511}, // __builtin_ia32_vfrczps256
      {Intrinsic::x86_xop_vfrcz_sd, 123537}, // __builtin_ia32_vfrczsd
      {Intrinsic::x86_xop_vfrcz_ss, 123560}, // __builtin_ia32_vfrczss
      {Intrinsic::x86_vgf2p8affineinvqb_128, 122796}, // __builtin_ia32_vgf2p8affineinvqb_v16qi
      {Intrinsic::x86_vgf2p8affineinvqb_256, 122835}, // __builtin_ia32_vgf2p8affineinvqb_v32qi
      {Intrinsic::x86_vgf2p8affineinvqb_512, 122874}, // __builtin_ia32_vgf2p8affineinvqb_v64qi
      {Intrinsic::x86_vgf2p8affineqb_128, 122913}, // __builtin_ia32_vgf2p8affineqb_v16qi
      {Intrinsic::x86_vgf2p8affineqb_256, 122949}, // __builtin_ia32_vgf2p8affineqb_v32qi
      {Intrinsic::x86_vgf2p8affineqb_512, 122985}, // __builtin_ia32_vgf2p8affineqb_v64qi
      {Intrinsic::x86_vgf2p8mulb_128, 123021}, // __builtin_ia32_vgf2p8mulb_v16qi
      {Intrinsic::x86_vgf2p8mulb_256, 123053}, // __builtin_ia32_vgf2p8mulb_v32qi
      {Intrinsic::x86_vgf2p8mulb_512, 123085}, // __builtin_ia32_vgf2p8mulb_v64qi
      {Intrinsic::x86_avx512_conflict_q_128, 101925}, // __builtin_ia32_vpconflictdi_128
      {Intrinsic::x86_avx512_conflict_q_256, 101957}, // __builtin_ia32_vpconflictdi_256
      {Intrinsic::x86_avx512_conflict_q_512, 101989}, // __builtin_ia32_vpconflictdi_512
      {Intrinsic::x86_avx512_conflict_d_128, 101829}, // __builtin_ia32_vpconflictsi_128
      {Intrinsic::x86_avx512_conflict_d_256, 101861}, // __builtin_ia32_vpconflictsi_256
      {Intrinsic::x86_avx512_conflict_d_512, 101893}, // __builtin_ia32_vpconflictsi_512
      {Intrinsic::x86_avx512_vpdpbusd_128, 113623}, // __builtin_ia32_vpdpbusd128
      {Intrinsic::x86_avx512_vpdpbusd_256, 113650}, // __builtin_ia32_vpdpbusd256
      {Intrinsic::x86_avx512_vpdpbusd_512, 113677}, // __builtin_ia32_vpdpbusd512
      {Intrinsic::x86_avx512_vpdpbusds_128, 113704}, // __builtin_ia32_vpdpbusds128
      {Intrinsic::x86_avx512_vpdpbusds_256, 113732}, // __builtin_ia32_vpdpbusds256
      {Intrinsic::x86_avx512_vpdpbusds_512, 113760}, // __builtin_ia32_vpdpbusds512
      {Intrinsic::x86_avx512_vpdpwssd_128, 113788}, // __builtin_ia32_vpdpwssd128
      {Intrinsic::x86_avx512_vpdpwssd_256, 113815}, // __builtin_ia32_vpdpwssd256
      {Intrinsic::x86_avx512_vpdpwssd_512, 113842}, // __builtin_ia32_vpdpwssd512
      {Intrinsic::x86_avx512_vpdpwssds_128, 113869}, // __builtin_ia32_vpdpwssds128
      {Intrinsic::x86_avx512_vpdpwssds_256, 113897}, // __builtin_ia32_vpdpwssds256
      {Intrinsic::x86_avx512_vpdpwssds_512, 113925}, // __builtin_ia32_vpdpwssds512
      {Intrinsic::x86_avx512_vpermi2var_d_128, 113953}, // __builtin_ia32_vpermi2vard128
      {Intrinsic::x86_avx512_vpermi2var_d_256, 113983}, // __builtin_ia32_vpermi2vard256
      {Intrinsic::x86_avx512_vpermi2var_d_512, 114013}, // __builtin_ia32_vpermi2vard512
      {Intrinsic::x86_avx512_vpermi2var_hi_128, 114043}, // __builtin_ia32_vpermi2varhi128
      {Intrinsic::x86_avx512_vpermi2var_hi_256, 114074}, // __builtin_ia32_vpermi2varhi256
      {Intrinsic::x86_avx512_vpermi2var_hi_512, 114105}, // __builtin_ia32_vpermi2varhi512
      {Intrinsic::x86_avx512_vpermi2var_pd_128, 114136}, // __builtin_ia32_vpermi2varpd128
      {Intrinsic::x86_avx512_vpermi2var_pd_256, 114167}, // __builtin_ia32_vpermi2varpd256
      {Intrinsic::x86_avx512_vpermi2var_pd_512, 114198}, // __builtin_ia32_vpermi2varpd512
      {Intrinsic::x86_avx512_vpermi2var_ps_128, 114229}, // __builtin_ia32_vpermi2varps128
      {Intrinsic::x86_avx512_vpermi2var_ps_256, 114260}, // __builtin_ia32_vpermi2varps256
      {Intrinsic::x86_avx512_vpermi2var_ps_512, 114291}, // __builtin_ia32_vpermi2varps512
      {Intrinsic::x86_avx512_vpermi2var_q_128, 114322}, // __builtin_ia32_vpermi2varq128
      {Intrinsic::x86_avx512_vpermi2var_q_256, 114352}, // __builtin_ia32_vpermi2varq256
      {Intrinsic::x86_avx512_vpermi2var_q_512, 114382}, // __builtin_ia32_vpermi2varq512
      {Intrinsic::x86_avx512_vpermi2var_qi_128, 114412}, // __builtin_ia32_vpermi2varqi128
      {Intrinsic::x86_avx512_vpermi2var_qi_256, 114443}, // __builtin_ia32_vpermi2varqi256
      {Intrinsic::x86_avx512_vpermi2var_qi_512, 114474}, // __builtin_ia32_vpermi2varqi512
      {Intrinsic::x86_xop_vpermil2pd, 123583}, // __builtin_ia32_vpermil2pd
      {Intrinsic::x86_xop_vpermil2pd_256, 123609}, // __builtin_ia32_vpermil2pd256
      {Intrinsic::x86_xop_vpermil2ps, 123638}, // __builtin_ia32_vpermil2ps
      {Intrinsic::x86_xop_vpermil2ps_256, 123664}, // __builtin_ia32_vpermil2ps256
      {Intrinsic::x86_avx_vpermilvar_pd, 99138}, // __builtin_ia32_vpermilvarpd
      {Intrinsic::x86_avx_vpermilvar_pd_256, 99166}, // __builtin_ia32_vpermilvarpd256
      {Intrinsic::x86_avx512_vpermilvar_pd_512, 114505}, // __builtin_ia32_vpermilvarpd512
      {Intrinsic::x86_avx_vpermilvar_ps, 99197}, // __builtin_ia32_vpermilvarps
      {Intrinsic::x86_avx_vpermilvar_ps_256, 99225}, // __builtin_ia32_vpermilvarps256
      {Intrinsic::x86_avx512_vpermilvar_ps_512, 114536}, // __builtin_ia32_vpermilvarps512
      {Intrinsic::x86_xop_vphaddbd, 123693}, // __builtin_ia32_vphaddbd
      {Intrinsic::x86_xop_vphaddbq, 123717}, // __builtin_ia32_vphaddbq
      {Intrinsic::x86_xop_vphaddbw, 123741}, // __builtin_ia32_vphaddbw
      {Intrinsic::x86_xop_vphadddq, 123765}, // __builtin_ia32_vphadddq
      {Intrinsic::x86_xop_vphaddubd, 123789}, // __builtin_ia32_vphaddubd
      {Intrinsic::x86_xop_vphaddubq, 123814}, // __builtin_ia32_vphaddubq
      {Intrinsic::x86_xop_vphaddubw, 123839}, // __builtin_ia32_vphaddubw
      {Intrinsic::x86_xop_vphaddudq, 123864}, // __builtin_ia32_vphaddudq
      {Intrinsic::x86_xop_vphadduwd, 123889}, // __builtin_ia32_vphadduwd
      {Intrinsic::x86_xop_vphadduwq, 123914}, // __builtin_ia32_vphadduwq
      {Intrinsic::x86_xop_vphaddwd, 123939}, // __builtin_ia32_vphaddwd
      {Intrinsic::x86_xop_vphaddwq, 123963}, // __builtin_ia32_vphaddwq
      {Intrinsic::x86_xop_vphsubbw, 123987}, // __builtin_ia32_vphsubbw
      {Intrinsic::x86_xop_vphsubdq, 124011}, // __builtin_ia32_vphsubdq
      {Intrinsic::x86_xop_vphsubwd, 124035}, // __builtin_ia32_vphsubwd
      {Intrinsic::x86_xop_vpmacsdd, 124059}, // __builtin_ia32_vpmacsdd
      {Intrinsic::x86_xop_vpmacsdqh, 124083}, // __builtin_ia32_vpmacsdqh
      {Intrinsic::x86_xop_vpmacsdql, 124108}, // __builtin_ia32_vpmacsdql
      {Intrinsic::x86_xop_vpmacssdd, 124133}, // __builtin_ia32_vpmacssdd
      {Intrinsic::x86_xop_vpmacssdqh, 124158}, // __builtin_ia32_vpmacssdqh
      {Intrinsic::x86_xop_vpmacssdql, 124184}, // __builtin_ia32_vpmacssdql
      {Intrinsic::x86_xop_vpmacsswd, 124210}, // __builtin_ia32_vpmacsswd
      {Intrinsic::x86_xop_vpmacssww, 124235}, // __builtin_ia32_vpmacssww
      {Intrinsic::x86_xop_vpmacswd, 124260}, // __builtin_ia32_vpmacswd
      {Intrinsic::x86_xop_vpmacsww, 124284}, // __builtin_ia32_vpmacsww
      {Intrinsic::x86_xop_vpmadcsswd, 124308}, // __builtin_ia32_vpmadcsswd
      {Intrinsic::x86_xop_vpmadcswd, 124334}, // __builtin_ia32_vpmadcswd
      {Intrinsic::x86_avx512_vpmadd52h_uq_128, 114567}, // __builtin_ia32_vpmadd52huq128
      {Intrinsic::x86_avx512_vpmadd52h_uq_256, 114597}, // __builtin_ia32_vpmadd52huq256
      {Intrinsic::x86_avx512_vpmadd52h_uq_512, 114627}, // __builtin_ia32_vpmadd52huq512
      {Intrinsic::x86_avx512_vpmadd52l_uq_128, 114657}, // __builtin_ia32_vpmadd52luq128
      {Intrinsic::x86_avx512_vpmadd52l_uq_256, 114687}, // __builtin_ia32_vpmadd52luq256
      {Intrinsic::x86_avx512_vpmadd52l_uq_512, 114717}, // __builtin_ia32_vpmadd52luq512
      {Intrinsic::x86_avx512_pmultishift_qb_128, 111166}, // __builtin_ia32_vpmultishiftqb128
      {Intrinsic::x86_avx512_pmultishift_qb_256, 111199}, // __builtin_ia32_vpmultishiftqb256
      {Intrinsic::x86_avx512_pmultishift_qb_512, 111232}, // __builtin_ia32_vpmultishiftqb512
      {Intrinsic::x86_xop_vpperm, 124359}, // __builtin_ia32_vpperm
      {Intrinsic::x86_xop_vpshab, 124381}, // __builtin_ia32_vpshab
      {Intrinsic::x86_xop_vpshad, 124403}, // __builtin_ia32_vpshad
      {Intrinsic::x86_xop_vpshaq, 124425}, // __builtin_ia32_vpshaq
      {Intrinsic::x86_xop_vpshaw, 124447}, // __builtin_ia32_vpshaw
      {Intrinsic::x86_xop_vpshlb, 124469}, // __builtin_ia32_vpshlb
      {Intrinsic::x86_xop_vpshld, 124491}, // __builtin_ia32_vpshld
      {Intrinsic::x86_xop_vpshlq, 124513}, // __builtin_ia32_vpshlq
      {Intrinsic::x86_xop_vpshlw, 124535}, // __builtin_ia32_vpshlw
      {Intrinsic::x86_avx_vtestc_pd, 99256}, // __builtin_ia32_vtestcpd
      {Intrinsic::x86_avx_vtestc_pd_256, 99280}, // __builtin_ia32_vtestcpd256
      {Intrinsic::x86_avx_vtestc_ps, 99307}, // __builtin_ia32_vtestcps
      {Intrinsic::x86_avx_vtestc_ps_256, 99331}, // __builtin_ia32_vtestcps256
      {Intrinsic::x86_avx_vtestnzc_pd, 99358}, // __builtin_ia32_vtestnzcpd
      {Intrinsic::x86_avx_vtestnzc_pd_256, 99384}, // __builtin_ia32_vtestnzcpd256
      {Intrinsic::x86_avx_vtestnzc_ps, 99413}, // __builtin_ia32_vtestnzcps
      {Intrinsic::x86_avx_vtestnzc_ps_256, 99439}, // __builtin_ia32_vtestnzcps256
      {Intrinsic::x86_avx_vtestz_pd, 99468}, // __builtin_ia32_vtestzpd
      {Intrinsic::x86_avx_vtestz_pd_256, 99492}, // __builtin_ia32_vtestzpd256
      {Intrinsic::x86_avx_vtestz_ps, 99519}, // __builtin_ia32_vtestzps
      {Intrinsic::x86_avx_vtestz_ps_256, 99543}, // __builtin_ia32_vtestzps256
      {Intrinsic::x86_avx_vzeroall, 99570}, // __builtin_ia32_vzeroall
      {Intrinsic::x86_avx_vzeroupper, 99594}, // __builtin_ia32_vzeroupper
      {Intrinsic::x86_wbinvd, 123117}, // __builtin_ia32_wbinvd
      {Intrinsic::x86_wbnoinvd, 123139}, // __builtin_ia32_wbnoinvd
      {Intrinsic::x86_wrfsbase_32, 123163}, // __builtin_ia32_wrfsbase32
      {Intrinsic::x86_wrfsbase_64, 123189}, // __builtin_ia32_wrfsbase64
      {Intrinsic::x86_wrgsbase_32, 123215}, // __builtin_ia32_wrgsbase32
      {Intrinsic::x86_wrgsbase_64, 123241}, // __builtin_ia32_wrgsbase64
      {Intrinsic::x86_flags_write_u32, 115465}, // __builtin_ia32_writeeflags_u32
      {Intrinsic::x86_flags_write_u64, 115496}, // __builtin_ia32_writeeflags_u64
      {Intrinsic::x86_wrpkru, 123267}, // __builtin_ia32_wrpkru
      {Intrinsic::x86_wrssd, 123289}, // __builtin_ia32_wrssd
      {Intrinsic::x86_wrssq, 123310}, // __builtin_ia32_wrssq
      {Intrinsic::x86_wrussd, 123331}, // __builtin_ia32_wrussd
      {Intrinsic::x86_wrussq, 123353}, // __builtin_ia32_wrussq
      {Intrinsic::x86_xabort, 123375}, // __builtin_ia32_xabort
      {Intrinsic::x86_xbegin, 123397}, // __builtin_ia32_xbegin
      {Intrinsic::x86_xend, 123419}, // __builtin_ia32_xend
      {Intrinsic::x86_xresldtrk, 124557}, // __builtin_ia32_xresldtrk
      {Intrinsic::x86_xsusldtrk, 124582}, // __builtin_ia32_xsusldtrk
      {Intrinsic::x86_xtest, 124607}, // __builtin_ia32_xtest
    };
    auto I = std::lower_bound(std::begin(x86Names),
                              std::end(x86Names),
                              BuiltinNameStr);
    if (I != std::end(x86Names) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "xcore") {
    static const BuiltinEntry xcoreNames[] = {
      {Intrinsic::xcore_bitrev, 124628}, // __builtin_bitrev
      {Intrinsic::xcore_getid, 124645}, // __builtin_getid
      {Intrinsic::xcore_getps, 124661}, // __builtin_getps
      {Intrinsic::xcore_setps, 124677}, // __builtin_setps
    };
    auto I = std::lower_bound(std::begin(xcoreNames),
                              std::end(xcoreNames),
                              BuiltinNameStr);
    if (I != std::end(xcoreNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  return Intrinsic::not_intrinsic;
}
#endif

// Get the LLVM intrinsic that corresponds to a builtin.
// This is used by the C front-end.  The builtin name is passed
// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed
// in as TargetPrefix.  The result is assigned to 'IntrinsicID'.
#ifdef GET_LLVM_INTRINSIC_FOR_MS_BUILTIN
Intrinsic::ID Intrinsic::getIntrinsicForMSBuiltin(const char *TargetPrefixStr, StringRef BuiltinNameStr) {
  static const char BuiltinNames[] = {
  '_', '_', 'd', 'm', 'b', '\000', '_', '_', 'd', 's', 'b', '\000', '_', '_', 'i',
  's', 'b', '\000', '_', 'M', 'o', 'v', 'e', 'F', 'r', 'o', 'm', 'C', 'o', 'p',
  'r', 'o', 'c', 'e', 's', 's', 'o', 'r', '\000', '_', 'M', 'o', 'v', 'e', 'F',
  'r', 'o', 'm', 'C', 'o', 'p', 'r', 'o', 'c', 'e', 's', 's', 'o', 'r', '2',
  '\000',
  };

  struct BuiltinEntry {
    Intrinsic::ID IntrinID;
    unsigned StrTabOffset;
    const char *getName() const {
      return &BuiltinNames[StrTabOffset];
    }
    bool operator<(StringRef RHS) const {
      return strncmp(getName(), RHS.data(), RHS.size()) < 0;
    }
  };
  StringRef TargetPrefix(TargetPrefixStr);

  if (TargetPrefix == "aarch64") {
    static const BuiltinEntry aarch64Names[] = {
      {Intrinsic::aarch64_dmb, 0}, // __dmb
      {Intrinsic::aarch64_dsb, 6}, // __dsb
      {Intrinsic::aarch64_isb, 12}, // __isb
    };
    auto I = std::lower_bound(std::begin(aarch64Names),
                              std::end(aarch64Names),
                              BuiltinNameStr);
    if (I != std::end(aarch64Names) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  if (TargetPrefix == "arm") {
    static const BuiltinEntry armNames[] = {
      {Intrinsic::arm_mrc, 18}, // _MoveFromCoprocessor
      {Intrinsic::arm_mrc2, 39}, // _MoveFromCoprocessor2
      {Intrinsic::arm_dmb, 0}, // __dmb
      {Intrinsic::arm_dsb, 6}, // __dsb
      {Intrinsic::arm_isb, 12}, // __isb
    };
    auto I = std::lower_bound(std::begin(armNames),
                              std::end(armNames),
                              BuiltinNameStr);
    if (I != std::end(armNames) &&
        I->getName() == BuiltinNameStr)
      return I->IntrinID;
  }
  return Intrinsic::not_intrinsic;
}
#endif