| /**************************************************************************** |
| **************************************************************************** |
| *** |
| *** This header was automatically generated from a Linux kernel header |
| *** of the same name, to make information necessary for userspace to |
| *** call into the kernel available to libc. It contains only constants, |
| *** structures, and macros generated from the original header, and thus, |
| *** contains no copyrightable information. |
| *** |
| *** To edit the content of this header, modify the corresponding |
| *** source file (e.g. under external/kernel-headers/original/) then |
| *** run bionic/libc/kernel/tools/update_all.py |
| *** |
| *** Any manual change here will be lost the next time this script will |
| *** be run. You've been warned! |
| *** |
| **************************************************************************** |
| ****************************************************************************/ |
| #ifndef VIRTGPU_DRM_H |
| #define VIRTGPU_DRM_H |
| #include <stddef.h> |
| #include "drm/drm.h" |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_VIRTGPU_MAP 0x01 |
| #define DRM_VIRTGPU_EXECBUFFER 0x02 |
| #define DRM_VIRTGPU_GETPARAM 0x03 |
| #define DRM_VIRTGPU_RESOURCE_CREATE 0x04 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_VIRTGPU_RESOURCE_INFO 0x05 |
| #define DRM_VIRTGPU_TRANSFER_FROM_HOST 0x06 |
| #define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07 |
| #define DRM_VIRTGPU_WAIT 0x08 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_VIRTGPU_GET_CAPS 0x09 |
| struct drm_virtgpu_map { |
| uint64_t offset; |
| uint32_t handle; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t pad; |
| }; |
| struct drm_virtgpu_execbuffer { |
| uint32_t flags; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t size; |
| uint64_t command; |
| uint64_t bo_handles; |
| uint32_t num_bo_handles; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t pad; |
| }; |
| #define VIRTGPU_PARAM_3D_FEATURES 1 |
| struct drm_virtgpu_getparam { |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint64_t param; |
| uint64_t value; |
| }; |
| struct drm_virtgpu_resource_create { |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t target; |
| uint32_t format; |
| uint32_t bind; |
| uint32_t width; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t height; |
| uint32_t depth; |
| uint32_t array_size; |
| uint32_t last_level; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t nr_samples; |
| uint32_t flags; |
| uint32_t bo_handle; |
| uint32_t res_handle; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t size; |
| uint32_t stride; |
| }; |
| struct drm_virtgpu_resource_info { |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t bo_handle; |
| uint32_t res_handle; |
| uint32_t size; |
| uint32_t stride; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| }; |
| struct drm_virtgpu_3d_box { |
| uint32_t x; |
| uint32_t y; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t z; |
| uint32_t w; |
| uint32_t h; |
| uint32_t d; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| }; |
| struct drm_virtgpu_3d_transfer_to_host { |
| uint32_t bo_handle; |
| struct drm_virtgpu_3d_box box; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t level; |
| uint32_t offset; |
| }; |
| struct drm_virtgpu_3d_transfer_from_host { |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t bo_handle; |
| struct drm_virtgpu_3d_box box; |
| uint32_t level; |
| uint32_t offset; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| }; |
| #define VIRTGPU_WAIT_NOWAIT 1 |
| struct drm_virtgpu_3d_wait { |
| uint32_t handle; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t flags; |
| }; |
| struct drm_virtgpu_get_caps { |
| uint32_t cap_set_id; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| uint32_t cap_set_ver; |
| uint64_t addr; |
| uint32_t size; |
| uint32_t pad; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| }; |
| #define DRM_IOCTL_VIRTGPU_MAP DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map) |
| #define DRM_IOCTL_VIRTGPU_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER, struct drm_virtgpu_execbuffer) |
| #define DRM_IOCTL_VIRTGPU_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GETPARAM, struct drm_virtgpu_getparam) |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE, struct drm_virtgpu_resource_create) |
| #define DRM_IOCTL_VIRTGPU_RESOURCE_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_INFO, struct drm_virtgpu_resource_info) |
| #define DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_FROM_HOST, struct drm_virtgpu_3d_transfer_from_host) |
| #define DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_TO_HOST, struct drm_virtgpu_3d_transfer_to_host) |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_IOCTL_VIRTGPU_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_WAIT, struct drm_virtgpu_3d_wait) |
| #define DRM_IOCTL_VIRTGPU_GET_CAPS DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, struct drm_virtgpu_get_caps) |
| #endif |