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<h5 class="subsubsection">9.8.2.2 Sub-Instructions</h5>

<p><a name="index-D10V-sub_002dinstructions-756"></a><a name="index-sub_002dinstructions_002c-D10V-757"></a>The D10V assembler takes as input a series of instructions, either one-per-line,
or in the special two-per-line format described in the next section.  Some of these
instructions will be short-form or sub-instructions.  These sub-instructions can be packed
into a single instruction.  The assembler will do this automatically.  It will also detect
when it should not pack instructions.  For example, when a label is defined, the next
instruction will never be packaged with the previous one.  Whenever a branch and link
instruction is called, it will not be packaged with the next instruction so the return
address will be valid.  Nops are automatically inserted when necessary.

   <p>If you do not want the assembler automatically making these decisions, you can control
the packaging and execution type (parallel or sequential) with the special execution
symbols described in the next section.

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