/******************************************************************************
*  Filename:       hw_cpu_tiprop_h
*  Revised:        2016-03-14 09:20:59 +0100 (Mon, 14 Mar 2016)
*  Revision:       45924
*
* Copyright (c) 2015 - 2016, Texas Instruments Incorporated
* All rights reserved.
*
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* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
*    this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
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*    and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
*    be used to endorse or promote products derived from this software without
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*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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*
******************************************************************************/

#ifndef __HW_CPU_TIPROP_H__
#define __HW_CPU_TIPROP_H__

//*****************************************************************************
//
// This section defines the register offsets of
// CPU_TIPROP component
//
//*****************************************************************************
// Internal
#define CPU_TIPROP_O_TRACECLKMUX                                    0x00000FF8

// Internal
#define CPU_TIPROP_O_DYN_CG                                         0x00000FFC

//*****************************************************************************
//
// Register: CPU_TIPROP_O_TRACECLKMUX
//
//*****************************************************************************
// Field:     [0] TRACECLK_N_SWV
//
// Internal. Only to be used through TI provided API.
// ENUMs:
// TRACECLK                 Internal. Only to be used through TI provided API.
// SWV                      Internal. Only to be used through TI provided API.
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV                       0x00000001
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_BITN                           0
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_M                     0x00000001
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_S                              0
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_TRACECLK              0x00000001
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_SWV                   0x00000000

//*****************************************************************************
//
// Register: CPU_TIPROP_O_DYN_CG
//
//*****************************************************************************
// Field:   [1:0] DYN_CG
//
// Internal. Only to be used through TI provided API.
#define CPU_TIPROP_DYN_CG_DYN_CG_W                                           2
#define CPU_TIPROP_DYN_CG_DYN_CG_M                                  0x00000003
#define CPU_TIPROP_DYN_CG_DYN_CG_S                                           0


#endif // __CPU_TIPROP__