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nest-open-source / nest-detect / 1.1.1 / freertos / 40f64f9f13eca7c99c37d414f8806b42f68bd1af / . / FreeRTOS / Demo / HCS12_CodeWarrior_small / CODE / IO_Map.H
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : IO_Map.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : IO_Map
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "IO_Map" implements an IO devices mapping.
** Settings :
**
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* Linker pragmas */
#pragma LINK_INFO DERIVATIVE "MC9S12C32"
#pragma LINK_INFO OSCFREQUENCY "16000000"
#define REG_BASE 0x0000 /* Base address for the I/O register block */
/* Based on CPU DB MC9S12C32_80, version 2.87.264 (RegistersPrg V1.027) */
#ifndef _MC9S12C32_80_H
#define _MC9S12C32_80_H
#include "PE_Types.h"
#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */
/*********************************************/
/* */
/* PE I/O map format */
/* */
/*********************************************/
/*** PORTAB - Port AB Register; 0x00000000 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PORTA - Port A Register; 0x00000000 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Port A Bit 0 */
byte BIT1 :1; /* Port A Bit 1 */
byte BIT2 :1; /* Port A Bit 2 */
byte BIT3 :1; /* Port A Bit 3 */
byte BIT4 :1; /* Port A Bit 4 */
byte BIT5 :1; /* Port A Bit 5 */
byte BIT6 :1; /* Port A Bit 6 */
byte BIT7 :1; /* Port A Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} PORTASTR;
#define PORTA _PORTAB.Overlap_STR.PORTASTR.Byte
#define PORTA_BIT0 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT0
#define PORTA_BIT1 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT1
#define PORTA_BIT2 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT2
#define PORTA_BIT3 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT3
#define PORTA_BIT4 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT4
#define PORTA_BIT5 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT5
#define PORTA_BIT6 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT6
#define PORTA_BIT7 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT7
#define PORTA_BIT _PORTAB.Overlap_STR.PORTASTR.MergedBits.grpBIT
/*** PORTB - Port B Register; 0x00000001 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Port B Bit 0 */
byte BIT1 :1; /* Port B Bit 1 */
byte BIT2 :1; /* Port B Bit 2 */
byte BIT3 :1; /* Port B Bit 3 */
byte BIT4 :1; /* Port B Bit 4 */
byte BIT5 :1; /* Port B Bit 5 */
byte BIT6 :1; /* Port B Bit 6 */
byte BIT7 :1; /* Port B Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} PORTBSTR;
#define PORTB _PORTAB.Overlap_STR.PORTBSTR.Byte
#define PORTB_BIT0 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT0
#define PORTB_BIT1 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT1
#define PORTB_BIT2 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT2
#define PORTB_BIT3 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT3
#define PORTB_BIT4 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT4
#define PORTB_BIT5 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT5
#define PORTB_BIT6 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT6
#define PORTB_BIT7 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT7
#define PORTB_BIT _PORTAB.Overlap_STR.PORTBSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word BIT0 :1; /* Port AB Bit 0 */
word BIT1 :1; /* Port AB Bit 1 */
word BIT2 :1; /* Port AB Bit 2 */
word BIT3 :1; /* Port AB Bit 3 */
word BIT4 :1; /* Port AB Bit 4 */
word BIT5 :1; /* Port AB Bit 5 */
word BIT6 :1; /* Port AB Bit 6 */
word BIT7 :1; /* Port AB Bit 7 */
word BIT8 :1; /* Port AB Bit 8 */
word BIT9 :1; /* Port AB Bit 9 */
word BIT10 :1; /* Port AB Bit 10 */
word BIT11 :1; /* Port AB Bit 11 */
word BIT12 :1; /* Port AB Bit 12 */
word BIT13 :1; /* Port AB Bit 13 */
word BIT14 :1; /* Port AB Bit 14 */
word BIT15 :1; /* Port AB Bit 15 */
} Bits;
struct {
word grpBIT :16;
} MergedBits;
} PORTABSTR;
extern volatile PORTABSTR _PORTAB @(REG_BASE + 0x00000000);
#define PORTAB _PORTAB.Word
#define PORTAB_BIT0 _PORTAB.Bits.BIT0
#define PORTAB_BIT1 _PORTAB.Bits.BIT1
#define PORTAB_BIT2 _PORTAB.Bits.BIT2
#define PORTAB_BIT3 _PORTAB.Bits.BIT3
#define PORTAB_BIT4 _PORTAB.Bits.BIT4
#define PORTAB_BIT5 _PORTAB.Bits.BIT5
#define PORTAB_BIT6 _PORTAB.Bits.BIT6
#define PORTAB_BIT7 _PORTAB.Bits.BIT7
#define PORTAB_BIT8 _PORTAB.Bits.BIT8
#define PORTAB_BIT9 _PORTAB.Bits.BIT9
#define PORTAB_BIT10 _PORTAB.Bits.BIT10
#define PORTAB_BIT11 _PORTAB.Bits.BIT11
#define PORTAB_BIT12 _PORTAB.Bits.BIT12
#define PORTAB_BIT13 _PORTAB.Bits.BIT13
#define PORTAB_BIT14 _PORTAB.Bits.BIT14
#define PORTAB_BIT15 _PORTAB.Bits.BIT15
#define PORTAB_BIT _PORTAB.MergedBits.grpBIT
/*** DDRAB - Port AB Data Direction Register; 0x00000002 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** DDRA - Port A Data Direction Register; 0x00000002 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Data Direction Port A Bit 0 */
byte BIT1 :1; /* Data Direction Port A Bit 1 */
byte BIT2 :1; /* Data Direction Port A Bit 2 */
byte BIT3 :1; /* Data Direction Port A Bit 3 */
byte BIT4 :1; /* Data Direction Port A Bit 4 */
byte BIT5 :1; /* Data Direction Port A Bit 5 */
byte BIT6 :1; /* Data Direction Port A Bit 6 */
byte BIT7 :1; /* Data Direction Port A Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} DDRASTR;
#define DDRA _DDRAB.Overlap_STR.DDRASTR.Byte
#define DDRA_BIT0 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT0
#define DDRA_BIT1 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT1
#define DDRA_BIT2 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT2
#define DDRA_BIT3 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT3
#define DDRA_BIT4 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT4
#define DDRA_BIT5 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT5
#define DDRA_BIT6 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT6
#define DDRA_BIT7 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT7
#define DDRA_BIT _DDRAB.Overlap_STR.DDRASTR.MergedBits.grpBIT
/*** DDRB - Port B Data Direction Register; 0x00000003 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Data Direction Port B Bit 0 */
byte BIT1 :1; /* Data Direction Port B Bit 1 */
byte BIT2 :1; /* Data Direction Port B Bit 2 */
byte BIT3 :1; /* Data Direction Port B Bit 3 */
byte BIT4 :1; /* Data Direction Port B Bit 4 */
byte BIT5 :1; /* Data Direction Port B Bit 5 */
byte BIT6 :1; /* Data Direction Port B Bit 6 */
byte BIT7 :1; /* Data Direction Port B Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} DDRBSTR;
#define DDRB _DDRAB.Overlap_STR.DDRBSTR.Byte
#define DDRB_BIT0 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT0
#define DDRB_BIT1 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT1
#define DDRB_BIT2 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT2
#define DDRB_BIT3 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT3
#define DDRB_BIT4 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT4
#define DDRB_BIT5 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT5
#define DDRB_BIT6 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT6
#define DDRB_BIT7 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT7
#define DDRB_BIT _DDRAB.Overlap_STR.DDRBSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word BIT0 :1; /* Data Direction Port B Bit 0 */
word BIT1 :1; /* Data Direction Port B Bit 1 */
word BIT2 :1; /* Data Direction Port B Bit 2 */
word BIT3 :1; /* Data Direction Port B Bit 3 */
word BIT4 :1; /* Data Direction Port B Bit 4 */
word BIT5 :1; /* Data Direction Port B Bit 5 */
word BIT6 :1; /* Data Direction Port B Bit 6 */
word BIT7 :1; /* Data Direction Port B Bit 7 */
word BIT8 :1; /* Data Direction Port A Bit 8 */
word BIT9 :1; /* Data Direction Port A Bit 9 */
word BIT10 :1; /* Data Direction Port A Bit 10 */
word BIT11 :1; /* Data Direction Port A Bit 11 */
word BIT12 :1; /* Data Direction Port A Bit 12 */
word BIT13 :1; /* Data Direction Port A Bit 13 */
word BIT14 :1; /* Data Direction Port A Bit 14 */
word BIT15 :1; /* Data Direction Port A Bit 15 */
} Bits;
struct {
word grpBIT :16;
} MergedBits;
} DDRABSTR;
extern volatile DDRABSTR _DDRAB @(REG_BASE + 0x00000002);
#define DDRAB _DDRAB.Word
#define DDRAB_BIT0 _DDRAB.Bits.BIT0
#define DDRAB_BIT1 _DDRAB.Bits.BIT1
#define DDRAB_BIT2 _DDRAB.Bits.BIT2
#define DDRAB_BIT3 _DDRAB.Bits.BIT3
#define DDRAB_BIT4 _DDRAB.Bits.BIT4
#define DDRAB_BIT5 _DDRAB.Bits.BIT5
#define DDRAB_BIT6 _DDRAB.Bits.BIT6
#define DDRAB_BIT7 _DDRAB.Bits.BIT7
#define DDRAB_BIT8 _DDRAB.Bits.BIT8
#define DDRAB_BIT9 _DDRAB.Bits.BIT9
#define DDRAB_BIT10 _DDRAB.Bits.BIT10
#define DDRAB_BIT11 _DDRAB.Bits.BIT11
#define DDRAB_BIT12 _DDRAB.Bits.BIT12
#define DDRAB_BIT13 _DDRAB.Bits.BIT13
#define DDRAB_BIT14 _DDRAB.Bits.BIT14
#define DDRAB_BIT15 _DDRAB.Bits.BIT15
#define DDRAB_BIT _DDRAB.MergedBits.grpBIT
/*** TCNT - Timer Count Register; 0x00000044 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TCNTHi - Timer Count Register High; 0x00000044 ***/
union {
byte Byte;
struct {
byte BIT15 :1; /* Timer Count Register Bit 15 */
byte BIT14 :1; /* Timer Count Register Bit 14 */
byte BIT13 :1; /* Timer Count Register Bit 13 */
byte BIT12 :1; /* Timer Count Register Bit 12 */
byte BIT11 :1; /* Timer Count Register Bit 11 */
byte BIT10 :1; /* Timer Count Register Bit 10 */
byte BIT9 :1; /* Timer Count Register Bit 9 */
byte BIT8 :1; /* Timer Count Register Bit 8 */
} Bits;
} TCNTHiSTR;
#define TCNTHi _TCNT.Overlap_STR.TCNTHiSTR.Byte
#define TCNTHi_BIT15 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT15
#define TCNTHi_BIT14 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT14
#define TCNTHi_BIT13 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT13
#define TCNTHi_BIT12 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT12
#define TCNTHi_BIT11 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT11
#define TCNTHi_BIT10 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT10
#define TCNTHi_BIT9 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT9
#define TCNTHi_BIT8 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT8
/*** TCNTLo - Timer Count Register Low; 0x00000045 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Count Register Bit 0 */
byte BIT1 :1; /* Timer Count Register Bit 1 */
byte BIT2 :1; /* Timer Count Register Bit 2 */
byte BIT3 :1; /* Timer Count Register Bit 3 */
byte BIT4 :1; /* Timer Count Bit Register 4 */
byte BIT5 :1; /* Timer Count Bit Register 5 */
byte BIT6 :1; /* Timer Count Bit Register 6 */
byte BIT7 :1; /* Timer Count Bit Register 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TCNTLoSTR;
#define TCNTLo _TCNT.Overlap_STR.TCNTLoSTR.Byte
#define TCNTLo_BIT0 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT0
#define TCNTLo_BIT1 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT1
#define TCNTLo_BIT2 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT2
#define TCNTLo_BIT3 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT3
#define TCNTLo_BIT4 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT4
#define TCNTLo_BIT5 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT5
#define TCNTLo_BIT6 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT6
#define TCNTLo_BIT7 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT7
#define TCNTLo_BIT _TCNT.Overlap_STR.TCNTLoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TCNTSTR;
extern volatile TCNTSTR _TCNT @(REG_BASE + 0x00000044);
#define TCNT _TCNT.Word
#define TCNT_BIT _TCNT.MergedBits.grpBIT
/*** TC0 - Timer Input Capture/Output Compare Register 0; 0x00000050 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC0Hi - Timer Input Capture/Output Compare Register 0 High; 0x00000050 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 0 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 0 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 0 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 0 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 0 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 0 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 0 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 0 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC0HiSTR;
#define TC0Hi _TC0.Overlap_STR.TC0HiSTR.Byte
#define TC0Hi_BIT8 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT8
#define TC0Hi_BIT9 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT9
#define TC0Hi_BIT10 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT10
#define TC0Hi_BIT11 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT11
#define TC0Hi_BIT12 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT12
#define TC0Hi_BIT13 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT13
#define TC0Hi_BIT14 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT14
#define TC0Hi_BIT15 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT15
#define TC0Hi_BIT_8 _TC0.Overlap_STR.TC0HiSTR.MergedBits.grpBIT_8
#define TC0Hi_BIT TC0Hi_BIT_8
/*** TC0Lo - Timer Input Capture/Output Compare Register 0 Low; 0x00000051 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 0 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 0 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 0 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 0 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 0 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 0 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 0 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 0 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC0LoSTR;
#define TC0Lo _TC0.Overlap_STR.TC0LoSTR.Byte
#define TC0Lo_BIT0 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT0
#define TC0Lo_BIT1 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT1
#define TC0Lo_BIT2 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT2
#define TC0Lo_BIT3 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT3
#define TC0Lo_BIT4 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT4
#define TC0Lo_BIT5 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT5
#define TC0Lo_BIT6 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT6
#define TC0Lo_BIT7 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT7
#define TC0Lo_BIT _TC0.Overlap_STR.TC0LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC0STR;
extern volatile TC0STR _TC0 @(REG_BASE + 0x00000050);
#define TC0 _TC0.Word
#define TC0_BIT _TC0.MergedBits.grpBIT
/*** TC1 - Timer Input Capture/Output Compare Register 1; 0x00000052 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC1Hi - Timer Input Capture/Output Compare Register 1 High; 0x00000052 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 1 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 1 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 1 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 1 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 1 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 1 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 1 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 1 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC1HiSTR;
#define TC1Hi _TC1.Overlap_STR.TC1HiSTR.Byte
#define TC1Hi_BIT8 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT8
#define TC1Hi_BIT9 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT9
#define TC1Hi_BIT10 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT10
#define TC1Hi_BIT11 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT11
#define TC1Hi_BIT12 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT12
#define TC1Hi_BIT13 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT13
#define TC1Hi_BIT14 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT14
#define TC1Hi_BIT15 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT15
#define TC1Hi_BIT_8 _TC1.Overlap_STR.TC1HiSTR.MergedBits.grpBIT_8
#define TC1Hi_BIT TC1Hi_BIT_8
/*** TC1Lo - Timer Input Capture/Output Compare Register 1 Low; 0x00000053 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 1 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 1 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 1 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 1 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 1 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 1 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 1 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 1 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC1LoSTR;
#define TC1Lo _TC1.Overlap_STR.TC1LoSTR.Byte
#define TC1Lo_BIT0 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT0
#define TC1Lo_BIT1 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT1
#define TC1Lo_BIT2 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT2
#define TC1Lo_BIT3 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT3
#define TC1Lo_BIT4 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT4
#define TC1Lo_BIT5 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT5
#define TC1Lo_BIT6 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT6
#define TC1Lo_BIT7 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT7
#define TC1Lo_BIT _TC1.Overlap_STR.TC1LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC1STR;
extern volatile TC1STR _TC1 @(REG_BASE + 0x00000052);
#define TC1 _TC1.Word
#define TC1_BIT _TC1.MergedBits.grpBIT
/*** TC2 - Timer Input Capture/Output Compare Register 2; 0x00000054 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC2Hi - Timer Input Capture/Output Compare Register 2 High; 0x00000054 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 2 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 2 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 2 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 2 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 2 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 2 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 2 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 2 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC2HiSTR;
#define TC2Hi _TC2.Overlap_STR.TC2HiSTR.Byte
#define TC2Hi_BIT8 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT8
#define TC2Hi_BIT9 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT9
#define TC2Hi_BIT10 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT10
#define TC2Hi_BIT11 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT11
#define TC2Hi_BIT12 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT12
#define TC2Hi_BIT13 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT13
#define TC2Hi_BIT14 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT14
#define TC2Hi_BIT15 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT15
#define TC2Hi_BIT_8 _TC2.Overlap_STR.TC2HiSTR.MergedBits.grpBIT_8
#define TC2Hi_BIT TC2Hi_BIT_8
/*** TC2Lo - Timer Input Capture/Output Compare Register 2 Low; 0x00000055 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 2 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 2 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 2 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 2 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 2 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 2 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 2 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 2 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC2LoSTR;
#define TC2Lo _TC2.Overlap_STR.TC2LoSTR.Byte
#define TC2Lo_BIT0 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT0
#define TC2Lo_BIT1 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT1
#define TC2Lo_BIT2 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT2
#define TC2Lo_BIT3 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT3
#define TC2Lo_BIT4 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT4
#define TC2Lo_BIT5 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT5
#define TC2Lo_BIT6 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT6
#define TC2Lo_BIT7 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT7
#define TC2Lo_BIT _TC2.Overlap_STR.TC2LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC2STR;
extern volatile TC2STR _TC2 @(REG_BASE + 0x00000054);
#define TC2 _TC2.Word
#define TC2_BIT _TC2.MergedBits.grpBIT
/*** TC3 - Timer Input Capture/Output Compare Register 3; 0x00000056 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC3Hi - Timer Input Capture/Output Compare Register 3 High; 0x00000056 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 3 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 3 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 3 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 3 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 3 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 3 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 3 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 3 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC3HiSTR;
#define TC3Hi _TC3.Overlap_STR.TC3HiSTR.Byte
#define TC3Hi_BIT8 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT8
#define TC3Hi_BIT9 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT9
#define TC3Hi_BIT10 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT10
#define TC3Hi_BIT11 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT11
#define TC3Hi_BIT12 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT12
#define TC3Hi_BIT13 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT13
#define TC3Hi_BIT14 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT14
#define TC3Hi_BIT15 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT15
#define TC3Hi_BIT_8 _TC3.Overlap_STR.TC3HiSTR.MergedBits.grpBIT_8
#define TC3Hi_BIT TC3Hi_BIT_8
/*** TC3Lo - Timer Input Capture/Output Compare Register 3 Low; 0x00000057 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 3 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 3 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 3 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 3 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 3 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 3 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 3 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 3 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC3LoSTR;
#define TC3Lo _TC3.Overlap_STR.TC3LoSTR.Byte
#define TC3Lo_BIT0 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT0
#define TC3Lo_BIT1 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT1
#define TC3Lo_BIT2 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT2
#define TC3Lo_BIT3 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT3
#define TC3Lo_BIT4 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT4
#define TC3Lo_BIT5 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT5
#define TC3Lo_BIT6 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT6
#define TC3Lo_BIT7 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT7
#define TC3Lo_BIT _TC3.Overlap_STR.TC3LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC3STR;
extern volatile TC3STR _TC3 @(REG_BASE + 0x00000056);
#define TC3 _TC3.Word
#define TC3_BIT _TC3.MergedBits.grpBIT
/*** TC4 - Timer Input Capture/Output Compare Register 4; 0x00000058 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC4Hi - Timer Input Capture/Output Compare Register 4 High; 0x00000058 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 4 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 4 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 4 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 4 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 4 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 4 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 4 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 4 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC4HiSTR;
#define TC4Hi _TC4.Overlap_STR.TC4HiSTR.Byte
#define TC4Hi_BIT8 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT8
#define TC4Hi_BIT9 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT9
#define TC4Hi_BIT10 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT10
#define TC4Hi_BIT11 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT11
#define TC4Hi_BIT12 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT12
#define TC4Hi_BIT13 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT13
#define TC4Hi_BIT14 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT14
#define TC4Hi_BIT15 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT15
#define TC4Hi_BIT_8 _TC4.Overlap_STR.TC4HiSTR.MergedBits.grpBIT_8
#define TC4Hi_BIT TC4Hi_BIT_8
/*** TC4Lo - Timer Input Capture/Output Compare Register 4 Low; 0x00000059 ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 4 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 4 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 4 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 4 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 4 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 4 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 4 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 4 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC4LoSTR;
#define TC4Lo _TC4.Overlap_STR.TC4LoSTR.Byte
#define TC4Lo_BIT0 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT0
#define TC4Lo_BIT1 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT1
#define TC4Lo_BIT2 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT2
#define TC4Lo_BIT3 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT3
#define TC4Lo_BIT4 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT4
#define TC4Lo_BIT5 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT5
#define TC4Lo_BIT6 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT6
#define TC4Lo_BIT7 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT7
#define TC4Lo_BIT _TC4.Overlap_STR.TC4LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC4STR;
extern volatile TC4STR _TC4 @(REG_BASE + 0x00000058);
#define TC4 _TC4.Word
#define TC4_BIT _TC4.MergedBits.grpBIT
/*** TC5 - Timer Input Capture/Output Compare Register 5; 0x0000005A ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC5Hi - Timer Input Capture/Output Compare Register 5 High; 0x0000005A ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 5 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 5 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 5 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 5 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 5 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 5 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 5 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 5 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC5HiSTR;
#define TC5Hi _TC5.Overlap_STR.TC5HiSTR.Byte
#define TC5Hi_BIT8 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT8
#define TC5Hi_BIT9 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT9
#define TC5Hi_BIT10 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT10
#define TC5Hi_BIT11 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT11
#define TC5Hi_BIT12 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT12
#define TC5Hi_BIT13 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT13
#define TC5Hi_BIT14 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT14
#define TC5Hi_BIT15 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT15
#define TC5Hi_BIT_8 _TC5.Overlap_STR.TC5HiSTR.MergedBits.grpBIT_8
#define TC5Hi_BIT TC5Hi_BIT_8
/*** TC5Lo - Timer Input Capture/Output Compare Register 5 Low; 0x0000005B ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 5 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 5 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 5 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 5 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 5 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 5 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 5 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 5 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC5LoSTR;
#define TC5Lo _TC5.Overlap_STR.TC5LoSTR.Byte
#define TC5Lo_BIT0 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT0
#define TC5Lo_BIT1 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT1
#define TC5Lo_BIT2 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT2
#define TC5Lo_BIT3 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT3
#define TC5Lo_BIT4 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT4
#define TC5Lo_BIT5 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT5
#define TC5Lo_BIT6 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT6
#define TC5Lo_BIT7 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT7
#define TC5Lo_BIT _TC5.Overlap_STR.TC5LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC5STR;
extern volatile TC5STR _TC5 @(REG_BASE + 0x0000005A);
#define TC5 _TC5.Word
#define TC5_BIT _TC5.MergedBits.grpBIT
/*** TC6 - Timer Input Capture/Output Compare Register 6; 0x0000005C ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC6Hi - Timer Input Capture/Output Compare Register 6 High; 0x0000005C ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 6 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 6 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 6 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 6 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 6 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 6 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 6 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 6 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC6HiSTR;
#define TC6Hi _TC6.Overlap_STR.TC6HiSTR.Byte
#define TC6Hi_BIT8 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT8
#define TC6Hi_BIT9 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT9
#define TC6Hi_BIT10 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT10
#define TC6Hi_BIT11 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT11
#define TC6Hi_BIT12 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT12
#define TC6Hi_BIT13 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT13
#define TC6Hi_BIT14 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT14
#define TC6Hi_BIT15 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT15
#define TC6Hi_BIT_8 _TC6.Overlap_STR.TC6HiSTR.MergedBits.grpBIT_8
#define TC6Hi_BIT TC6Hi_BIT_8
/*** TC6Lo - Timer Input Capture/Output Compare Register 6 Low; 0x0000005D ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 6 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 6 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 6 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 6 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 6 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 6 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 6 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 6 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC6LoSTR;
#define TC6Lo _TC6.Overlap_STR.TC6LoSTR.Byte
#define TC6Lo_BIT0 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT0
#define TC6Lo_BIT1 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT1
#define TC6Lo_BIT2 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT2
#define TC6Lo_BIT3 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT3
#define TC6Lo_BIT4 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT4
#define TC6Lo_BIT5 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT5
#define TC6Lo_BIT6 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT6
#define TC6Lo_BIT7 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT7
#define TC6Lo_BIT _TC6.Overlap_STR.TC6LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC6STR;
extern volatile TC6STR _TC6 @(REG_BASE + 0x0000005C);
#define TC6 _TC6.Word
#define TC6_BIT _TC6.MergedBits.grpBIT
/*** TC7 - Timer Input Capture/Output Compare Register 7; 0x0000005E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** TC7Hi - Timer Input Capture/Output Compare Register 7 High; 0x0000005E ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 7 Bit 8 */
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 7 Bit 9 */
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 7 Bit 10 */
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 7 Bit 11 */
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 7 Bit 12 */
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 7 Bit 13 */
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 7 Bit 14 */
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 7 Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} TC7HiSTR;
#define TC7Hi _TC7.Overlap_STR.TC7HiSTR.Byte
#define TC7Hi_BIT8 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT8
#define TC7Hi_BIT9 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT9
#define TC7Hi_BIT10 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT10
#define TC7Hi_BIT11 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT11
#define TC7Hi_BIT12 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT12
#define TC7Hi_BIT13 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT13
#define TC7Hi_BIT14 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT14
#define TC7Hi_BIT15 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT15
#define TC7Hi_BIT_8 _TC7.Overlap_STR.TC7HiSTR.MergedBits.grpBIT_8
#define TC7Hi_BIT TC7Hi_BIT_8
/*** TC7Lo - Timer Input Capture/Output Compare Register 7 Low; 0x0000005F ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 7 Bit 0 */
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 7 Bit 1 */
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 7 Bit 2 */
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 7 Bit 3 */
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 7 Bit 4 */
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 7 Bit 5 */
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 7 Bit 6 */
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 7 Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} TC7LoSTR;
#define TC7Lo _TC7.Overlap_STR.TC7LoSTR.Byte
#define TC7Lo_BIT0 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT0
#define TC7Lo_BIT1 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT1
#define TC7Lo_BIT2 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT2
#define TC7Lo_BIT3 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT3
#define TC7Lo_BIT4 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT4
#define TC7Lo_BIT5 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT5
#define TC7Lo_BIT6 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT6
#define TC7Lo_BIT7 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT7
#define TC7Lo_BIT _TC7.Overlap_STR.TC7LoSTR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} TC7STR;
extern volatile TC7STR _TC7 @(REG_BASE + 0x0000005E);
#define TC7 _TC7.Word
#define TC7_BIT _TC7.MergedBits.grpBIT
/*** PACNT - Pulse Accumulators Count Register; 0x00000062 ***/
typedef union {
word Word;
struct {
word grpBIT :16;
} MergedBits;
} PACNTSTR;
extern volatile PACNTSTR _PACNT @(REG_BASE + 0x00000062);
#define PACNT _PACNT.Word
#define PACNT_BIT _PACNT.MergedBits.grpBIT
/*** ATDCTL23 - ATD Control Register 23; 0x00000082 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDCTL2 - ATD Control Register 2; 0x00000082 ***/
union {
byte Byte;
struct {
byte ASCIF :1; /* ATD Sequence Complete Interrupt Flag */
byte ASCIE :1; /* ATD Sequence Complete Interrupt Enable */
byte ETRIGE :1; /* External Trigger Mode enable */
byte ETRIGP :1; /* External Trigger Polarity */
byte ETRIGLE :1; /* External Trigger Level/Edge control */
byte AWAI :1; /* ATD Wait Mode */
byte AFFC :1; /* ATD Fast Conversion Complete Flag Clear */
byte ADPU :1; /* ATD Disable / Power Down */
} Bits;
} ATDCTL2STR;
#define ATDCTL2 _ATDCTL23.Overlap_STR.ATDCTL2STR.Byte
#define ATDCTL2_ASCIF _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ASCIF
#define ATDCTL2_ASCIE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ASCIE
#define ATDCTL2_ETRIGE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGE
#define ATDCTL2_ETRIGP _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGP
#define ATDCTL2_ETRIGLE _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ETRIGLE
#define ATDCTL2_AWAI _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.AWAI
#define ATDCTL2_AFFC _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.AFFC
#define ATDCTL2_ADPU _ATDCTL23.Overlap_STR.ATDCTL2STR.Bits.ADPU
/*** ATDCTL3 - ATD Control Register 3; 0x00000083 ***/
union {
byte Byte;
struct {
byte FRZ0 :1; /* Background Debug Freeze Enable */
byte FRZ1 :1; /* Background Debug Freeze Enable */
byte FIFO :1; /* Result Register FIFO Mode */
byte S1C :1; /* Conversion Sequence Length 1 */
byte S2C :1; /* Conversion Sequence Length 2 */
byte S4C :1; /* Conversion Sequence Length 4 */
byte S8C :1; /* Conversion Sequence Length 8 */
byte :1;
} Bits;
struct {
byte grpFRZ :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} ATDCTL3STR;
#define ATDCTL3 _ATDCTL23.Overlap_STR.ATDCTL3STR.Byte
#define ATDCTL3_FRZ0 _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FRZ0
#define ATDCTL3_FRZ1 _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FRZ1
#define ATDCTL3_FIFO _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.FIFO
#define ATDCTL3_S1C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S1C
#define ATDCTL3_S2C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S2C
#define ATDCTL3_S4C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S4C
#define ATDCTL3_S8C _ATDCTL23.Overlap_STR.ATDCTL3STR.Bits.S8C
#define ATDCTL3_FRZ _ATDCTL23.Overlap_STR.ATDCTL3STR.MergedBits.grpFRZ
} Overlap_STR;
struct {
word FRZ0 :1; /* Background Debug Freeze Enable */
word FRZ1 :1; /* Background Debug Freeze Enable */
word FIFO :1; /* Result Register FIFO Mode */
word S1C :1; /* Conversion Sequence Length 1 */
word S2C :1; /* Conversion Sequence Length 2 */
word S4C :1; /* Conversion Sequence Length 4 */
word S8C :1; /* Conversion Sequence Length 8 */
word :1;
word ASCIF :1; /* ATD Sequence Complete Interrupt Flag */
word ASCIE :1; /* ATD Sequence Complete Interrupt Enable */
word ETRIGE :1; /* External Trigger Mode enable */
word ETRIGP :1; /* External Trigger Polarity */
word ETRIGLE :1; /* External Trigger Level/Edge control */
word AWAI :1; /* ATD Wait Mode */
word AFFC :1; /* ATD Fast Conversion Complete Flag Clear */
word ADPU :1; /* ATD Disable / Power Down */
} Bits;
struct {
word grpFRZ :2;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
} MergedBits;
} ATDCTL23STR;
extern volatile ATDCTL23STR _ATDCTL23 @(REG_BASE + 0x00000082);
#define ATDCTL23 _ATDCTL23.Word
#define ATDCTL23_FRZ0 _ATDCTL23.Bits.FRZ0
#define ATDCTL23_FRZ1 _ATDCTL23.Bits.FRZ1
#define ATDCTL23_FIFO _ATDCTL23.Bits.FIFO
#define ATDCTL23_S1C _ATDCTL23.Bits.S1C
#define ATDCTL23_S2C _ATDCTL23.Bits.S2C
#define ATDCTL23_S4C _ATDCTL23.Bits.S4C
#define ATDCTL23_S8C _ATDCTL23.Bits.S8C
#define ATDCTL23_ASCIF _ATDCTL23.Bits.ASCIF
#define ATDCTL23_ASCIE _ATDCTL23.Bits.ASCIE
#define ATDCTL23_ETRIGE _ATDCTL23.Bits.ETRIGE
#define ATDCTL23_ETRIGP _ATDCTL23.Bits.ETRIGP
#define ATDCTL23_ETRIGLE _ATDCTL23.Bits.ETRIGLE
#define ATDCTL23_AWAI _ATDCTL23.Bits.AWAI
#define ATDCTL23_AFFC _ATDCTL23.Bits.AFFC
#define ATDCTL23_ADPU _ATDCTL23.Bits.ADPU
#define ATDCTL23_FRZ _ATDCTL23.MergedBits.grpFRZ
/*** ATDCTL45 - ATD Control Register 45; 0x00000084 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDCTL4 - ATD Control Register 4; 0x00000084 ***/
union {
byte Byte;
struct {
byte PRS0 :1; /* ATD Clock Prescaler 0 */
byte PRS1 :1; /* ATD Clock Prescaler 1 */
byte PRS2 :1; /* ATD Clock Prescaler 2 */
byte PRS3 :1; /* ATD Clock Prescaler 3 */
byte PRS4 :1; /* ATD Clock Prescaler 4 */
byte SMP0 :1; /* Sample Time Select 0 */
byte SMP1 :1; /* Sample Time Select 1 */
byte SRES8 :1; /* A/D Resolution Select */
} Bits;
struct {
byte grpPRS :5;
byte grpSMP :2;
byte grpSRES_8 :1;
} MergedBits;
} ATDCTL4STR;
#define ATDCTL4 _ATDCTL45.Overlap_STR.ATDCTL4STR.Byte
#define ATDCTL4_PRS0 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS0
#define ATDCTL4_PRS1 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS1
#define ATDCTL4_PRS2 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS2
#define ATDCTL4_PRS3 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS3
#define ATDCTL4_PRS4 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.PRS4
#define ATDCTL4_SMP0 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.SMP0
#define ATDCTL4_SMP1 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.SMP1
#define ATDCTL4_SRES8 _ATDCTL45.Overlap_STR.ATDCTL4STR.Bits.SRES8
#define ATDCTL4_PRS _ATDCTL45.Overlap_STR.ATDCTL4STR.MergedBits.grpPRS
#define ATDCTL4_SMP _ATDCTL45.Overlap_STR.ATDCTL4STR.MergedBits.grpSMP
/*** ATDCTL5 - ATD Control Register 5; 0x00000085 ***/
union {
byte Byte;
struct {
byte CA :1; /* Analog Input Channel Select Code A */
byte CB :1; /* Analog Input Channel Select Code B */
byte CC :1; /* Analog Input Channel Select Code C */
byte :1;
byte MULT :1; /* Multi-Channel Sample Mode */
byte SCAN :1; /* Continuous Conversion Sequence Mode */
byte DSGN :1; /* Signed/Unsigned Result Data Mode */
byte DJM :1; /* Result Register Data Justification Mode */
} Bits;
} ATDCTL5STR;
#define ATDCTL5 _ATDCTL45.Overlap_STR.ATDCTL5STR.Byte
#define ATDCTL5_CA _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.CA
#define ATDCTL5_CB _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.CB
#define ATDCTL5_CC _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.CC
#define ATDCTL5_MULT _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.MULT
#define ATDCTL5_SCAN _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.SCAN
#define ATDCTL5_DSGN _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.DSGN
#define ATDCTL5_DJM _ATDCTL45.Overlap_STR.ATDCTL5STR.Bits.DJM
} Overlap_STR;
struct {
word CA :1; /* Analog Input Channel Select Code A */
word CB :1; /* Analog Input Channel Select Code B */
word CC :1; /* Analog Input Channel Select Code C */
word :1;
word MULT :1; /* Multi-Channel Sample Mode */
word SCAN :1; /* Continuous Conversion Sequence Mode */
word DSGN :1; /* Signed/Unsigned Result Data Mode */
word DJM :1; /* Result Register Data Justification Mode */
word PRS0 :1; /* ATD Clock Prescaler 0 */
word PRS1 :1; /* ATD Clock Prescaler 1 */
word PRS2 :1; /* ATD Clock Prescaler 2 */
word PRS3 :1; /* ATD Clock Prescaler 3 */
word PRS4 :1; /* ATD Clock Prescaler 4 */
word SMP0 :1; /* Sample Time Select 0 */
word SMP1 :1; /* Sample Time Select 1 */
word SRES8 :1; /* A/D Resolution Select */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpPRS :5;
word grpSMP :2;
word grpSRES_8 :1;
} MergedBits;
} ATDCTL45STR;
extern volatile ATDCTL45STR _ATDCTL45 @(REG_BASE + 0x00000084);
#define ATDCTL45 _ATDCTL45.Word
#define ATDCTL45_CA _ATDCTL45.Bits.CA
#define ATDCTL45_CB _ATDCTL45.Bits.CB
#define ATDCTL45_CC _ATDCTL45.Bits.CC
#define ATDCTL45_MULT _ATDCTL45.Bits.MULT
#define ATDCTL45_SCAN _ATDCTL45.Bits.SCAN
#define ATDCTL45_DSGN _ATDCTL45.Bits.DSGN
#define ATDCTL45_DJM _ATDCTL45.Bits.DJM
#define ATDCTL45_PRS0 _ATDCTL45.Bits.PRS0
#define ATDCTL45_PRS1 _ATDCTL45.Bits.PRS1
#define ATDCTL45_PRS2 _ATDCTL45.Bits.PRS2
#define ATDCTL45_PRS3 _ATDCTL45.Bits.PRS3
#define ATDCTL45_PRS4 _ATDCTL45.Bits.PRS4
#define ATDCTL45_SMP0 _ATDCTL45.Bits.SMP0
#define ATDCTL45_SMP1 _ATDCTL45.Bits.SMP1
#define ATDCTL45_SRES8 _ATDCTL45.Bits.SRES8
#define ATDCTL45_PRS _ATDCTL45.MergedBits.grpPRS
#define ATDCTL45_SMP _ATDCTL45.MergedBits.grpSMP
/*** ATDDR0 - A/D Conversion Result Register 0; 0x00000090 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR0H - A/D Conversion Result Register 0 High; 0x00000090 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} ATDDR0HSTR;
#define ATDDR0H _ATDDR0.Overlap_STR.ATDDR0HSTR.Byte
#define ATDDR0H_BIT8 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT8
#define ATDDR0H_BIT9 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT9
#define ATDDR0H_BIT10 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT10
#define ATDDR0H_BIT11 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT11
#define ATDDR0H_BIT12 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT12
#define ATDDR0H_BIT13 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT13
#define ATDDR0H_BIT14 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT14
#define ATDDR0H_BIT15 _ATDDR0.Overlap_STR.ATDDR0HSTR.Bits.BIT15
#define ATDDR0H_BIT_8 _ATDDR0.Overlap_STR.ATDDR0HSTR.MergedBits.grpBIT_8
#define ATDDR0H_BIT ATDDR0H_BIT_8
/*** ATDDR0L - A/D Conversion Result Register 0 Low; 0x00000091 ***/
union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_6 :2;
} MergedBits;
} ATDDR0LSTR;
#define ATDDR0L _ATDDR0.Overlap_STR.ATDDR0LSTR.Byte
#define ATDDR0L_BIT6 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT6
#define ATDDR0L_BIT7 _ATDDR0.Overlap_STR.ATDDR0LSTR.Bits.BIT7
#define ATDDR0L_BIT_6 _ATDDR0.Overlap_STR.ATDDR0LSTR.MergedBits.grpBIT_6
#define ATDDR0L_BIT ATDDR0L_BIT_6
} Overlap_STR;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpBIT_6 :10;
} MergedBits;
} ATDDR0STR;
extern volatile ATDDR0STR _ATDDR0 @(REG_BASE + 0x00000090);
#define ATDDR0 _ATDDR0.Word
#define ATDDR0_BIT6 _ATDDR0.Bits.BIT6
#define ATDDR0_BIT7 _ATDDR0.Bits.BIT7
#define ATDDR0_BIT8 _ATDDR0.Bits.BIT8
#define ATDDR0_BIT9 _ATDDR0.Bits.BIT9
#define ATDDR0_BIT10 _ATDDR0.Bits.BIT10
#define ATDDR0_BIT11 _ATDDR0.Bits.BIT11
#define ATDDR0_BIT12 _ATDDR0.Bits.BIT12
#define ATDDR0_BIT13 _ATDDR0.Bits.BIT13
#define ATDDR0_BIT14 _ATDDR0.Bits.BIT14
#define ATDDR0_BIT15 _ATDDR0.Bits.BIT15
#define ATDDR0_BIT_6 _ATDDR0.MergedBits.grpBIT_6
#define ATDDR0_BIT ATDDR0_BIT_6
/*** ATDDR1 - A/D Conversion Result Register 1; 0x00000092 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR1H - A/D Conversion Result Register 1 High; 0x00000092 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} ATDDR1HSTR;
#define ATDDR1H _ATDDR1.Overlap_STR.ATDDR1HSTR.Byte
#define ATDDR1H_BIT8 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT8
#define ATDDR1H_BIT9 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT9
#define ATDDR1H_BIT10 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT10
#define ATDDR1H_BIT11 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT11
#define ATDDR1H_BIT12 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT12
#define ATDDR1H_BIT13 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT13
#define ATDDR1H_BIT14 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT14
#define ATDDR1H_BIT15 _ATDDR1.Overlap_STR.ATDDR1HSTR.Bits.BIT15
#define ATDDR1H_BIT_8 _ATDDR1.Overlap_STR.ATDDR1HSTR.MergedBits.grpBIT_8
#define ATDDR1H_BIT ATDDR1H_BIT_8
/*** ATDDR1L - A/D Conversion Result Register 1 Low; 0x00000093 ***/
union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_6 :2;
} MergedBits;
} ATDDR1LSTR;
#define ATDDR1L _ATDDR1.Overlap_STR.ATDDR1LSTR.Byte
#define ATDDR1L_BIT6 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT6
#define ATDDR1L_BIT7 _ATDDR1.Overlap_STR.ATDDR1LSTR.Bits.BIT7
#define ATDDR1L_BIT_6 _ATDDR1.Overlap_STR.ATDDR1LSTR.MergedBits.grpBIT_6
#define ATDDR1L_BIT ATDDR1L_BIT_6
} Overlap_STR;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpBIT_6 :10;
} MergedBits;
} ATDDR1STR;
extern volatile ATDDR1STR _ATDDR1 @(REG_BASE + 0x00000092);
#define ATDDR1 _ATDDR1.Word
#define ATDDR1_BIT6 _ATDDR1.Bits.BIT6
#define ATDDR1_BIT7 _ATDDR1.Bits.BIT7
#define ATDDR1_BIT8 _ATDDR1.Bits.BIT8
#define ATDDR1_BIT9 _ATDDR1.Bits.BIT9
#define ATDDR1_BIT10 _ATDDR1.Bits.BIT10
#define ATDDR1_BIT11 _ATDDR1.Bits.BIT11
#define ATDDR1_BIT12 _ATDDR1.Bits.BIT12
#define ATDDR1_BIT13 _ATDDR1.Bits.BIT13
#define ATDDR1_BIT14 _ATDDR1.Bits.BIT14
#define ATDDR1_BIT15 _ATDDR1.Bits.BIT15
#define ATDDR1_BIT_6 _ATDDR1.MergedBits.grpBIT_6
#define ATDDR1_BIT ATDDR1_BIT_6
/*** ATDDR2 - A/D Conversion Result Register 2; 0x00000094 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR2H - A/D Conversion Result Register 2 High; 0x00000094 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} ATDDR2HSTR;
#define ATDDR2H _ATDDR2.Overlap_STR.ATDDR2HSTR.Byte
#define ATDDR2H_BIT8 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT8
#define ATDDR2H_BIT9 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT9
#define ATDDR2H_BIT10 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT10
#define ATDDR2H_BIT11 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT11
#define ATDDR2H_BIT12 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT12
#define ATDDR2H_BIT13 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT13
#define ATDDR2H_BIT14 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT14
#define ATDDR2H_BIT15 _ATDDR2.Overlap_STR.ATDDR2HSTR.Bits.BIT15
#define ATDDR2H_BIT_8 _ATDDR2.Overlap_STR.ATDDR2HSTR.MergedBits.grpBIT_8
#define ATDDR2H_BIT ATDDR2H_BIT_8
/*** ATDDR2L - A/D Conversion Result Register 2 Low; 0x00000095 ***/
union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_6 :2;
} MergedBits;
} ATDDR2LSTR;
#define ATDDR2L _ATDDR2.Overlap_STR.ATDDR2LSTR.Byte
#define ATDDR2L_BIT6 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT6
#define ATDDR2L_BIT7 _ATDDR2.Overlap_STR.ATDDR2LSTR.Bits.BIT7
#define ATDDR2L_BIT_6 _ATDDR2.Overlap_STR.ATDDR2LSTR.MergedBits.grpBIT_6
#define ATDDR2L_BIT ATDDR2L_BIT_6
} Overlap_STR;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpBIT_6 :10;
} MergedBits;
} ATDDR2STR;
extern volatile ATDDR2STR _ATDDR2 @(REG_BASE + 0x00000094);
#define ATDDR2 _ATDDR2.Word
#define ATDDR2_BIT6 _ATDDR2.Bits.BIT6
#define ATDDR2_BIT7 _ATDDR2.Bits.BIT7
#define ATDDR2_BIT8 _ATDDR2.Bits.BIT8
#define ATDDR2_BIT9 _ATDDR2.Bits.BIT9
#define ATDDR2_BIT10 _ATDDR2.Bits.BIT10
#define ATDDR2_BIT11 _ATDDR2.Bits.BIT11
#define ATDDR2_BIT12 _ATDDR2.Bits.BIT12
#define ATDDR2_BIT13 _ATDDR2.Bits.BIT13
#define ATDDR2_BIT14 _ATDDR2.Bits.BIT14
#define ATDDR2_BIT15 _ATDDR2.Bits.BIT15
#define ATDDR2_BIT_6 _ATDDR2.MergedBits.grpBIT_6
#define ATDDR2_BIT ATDDR2_BIT_6
/*** ATDDR3 - A/D Conversion Result Register 3; 0x00000096 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR3H - A/D Conversion Result Register 3 High; 0x00000096 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} ATDDR3HSTR;
#define ATDDR3H _ATDDR3.Overlap_STR.ATDDR3HSTR.Byte
#define ATDDR3H_BIT8 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT8
#define ATDDR3H_BIT9 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT9
#define ATDDR3H_BIT10 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT10
#define ATDDR3H_BIT11 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT11
#define ATDDR3H_BIT12 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT12
#define ATDDR3H_BIT13 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT13
#define ATDDR3H_BIT14 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT14
#define ATDDR3H_BIT15 _ATDDR3.Overlap_STR.ATDDR3HSTR.Bits.BIT15
#define ATDDR3H_BIT_8 _ATDDR3.Overlap_STR.ATDDR3HSTR.MergedBits.grpBIT_8
#define ATDDR3H_BIT ATDDR3H_BIT_8
/*** ATDDR3L - A/D Conversion Result Register 3 Low; 0x00000097 ***/
union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_6 :2;
} MergedBits;
} ATDDR3LSTR;
#define ATDDR3L _ATDDR3.Overlap_STR.ATDDR3LSTR.Byte
#define ATDDR3L_BIT6 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT6
#define ATDDR3L_BIT7 _ATDDR3.Overlap_STR.ATDDR3LSTR.Bits.BIT7
#define ATDDR3L_BIT_6 _ATDDR3.Overlap_STR.ATDDR3LSTR.MergedBits.grpBIT_6
#define ATDDR3L_BIT ATDDR3L_BIT_6
} Overlap_STR;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpBIT_6 :10;
} MergedBits;
} ATDDR3STR;
extern volatile ATDDR3STR _ATDDR3 @(REG_BASE + 0x00000096);
#define ATDDR3 _ATDDR3.Word
#define ATDDR3_BIT6 _ATDDR3.Bits.BIT6
#define ATDDR3_BIT7 _ATDDR3.Bits.BIT7
#define ATDDR3_BIT8 _ATDDR3.Bits.BIT8
#define ATDDR3_BIT9 _ATDDR3.Bits.BIT9
#define ATDDR3_BIT10 _ATDDR3.Bits.BIT10
#define ATDDR3_BIT11 _ATDDR3.Bits.BIT11
#define ATDDR3_BIT12 _ATDDR3.Bits.BIT12
#define ATDDR3_BIT13 _ATDDR3.Bits.BIT13
#define ATDDR3_BIT14 _ATDDR3.Bits.BIT14
#define ATDDR3_BIT15 _ATDDR3.Bits.BIT15
#define ATDDR3_BIT_6 _ATDDR3.MergedBits.grpBIT_6
#define ATDDR3_BIT ATDDR3_BIT_6
/*** ATDDR4 - A/D Conversion Result Register 4; 0x00000098 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR4H - A/D Conversion Result Register 4 High; 0x00000098 ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} ATDDR4HSTR;
#define ATDDR4H _ATDDR4.Overlap_STR.ATDDR4HSTR.Byte
#define ATDDR4H_BIT8 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT8
#define ATDDR4H_BIT9 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT9
#define ATDDR4H_BIT10 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT10
#define ATDDR4H_BIT11 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT11
#define ATDDR4H_BIT12 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT12
#define ATDDR4H_BIT13 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT13
#define ATDDR4H_BIT14 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT14
#define ATDDR4H_BIT15 _ATDDR4.Overlap_STR.ATDDR4HSTR.Bits.BIT15
#define ATDDR4H_BIT_8 _ATDDR4.Overlap_STR.ATDDR4HSTR.MergedBits.grpBIT_8
#define ATDDR4H_BIT ATDDR4H_BIT_8
/*** ATDDR4L - A/D Conversion Result Register 4 Low; 0x00000099 ***/
union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_6 :2;
} MergedBits;
} ATDDR4LSTR;
#define ATDDR4L _ATDDR4.Overlap_STR.ATDDR4LSTR.Byte
#define ATDDR4L_BIT6 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT6
#define ATDDR4L_BIT7 _ATDDR4.Overlap_STR.ATDDR4LSTR.Bits.BIT7
#define ATDDR4L_BIT_6 _ATDDR4.Overlap_STR.ATDDR4LSTR.MergedBits.grpBIT_6
#define ATDDR4L_BIT ATDDR4L_BIT_6
} Overlap_STR;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpBIT_6 :10;
} MergedBits;
} ATDDR4STR;
extern volatile ATDDR4STR _ATDDR4 @(REG_BASE + 0x00000098);
#define ATDDR4 _ATDDR4.Word
#define ATDDR4_BIT6 _ATDDR4.Bits.BIT6
#define ATDDR4_BIT7 _ATDDR4.Bits.BIT7
#define ATDDR4_BIT8 _ATDDR4.Bits.BIT8
#define ATDDR4_BIT9 _ATDDR4.Bits.BIT9
#define ATDDR4_BIT10 _ATDDR4.Bits.BIT10
#define ATDDR4_BIT11 _ATDDR4.Bits.BIT11
#define ATDDR4_BIT12 _ATDDR4.Bits.BIT12
#define ATDDR4_BIT13 _ATDDR4.Bits.BIT13
#define ATDDR4_BIT14 _ATDDR4.Bits.BIT14
#define ATDDR4_BIT15 _ATDDR4.Bits.BIT15
#define ATDDR4_BIT_6 _ATDDR4.MergedBits.grpBIT_6
#define ATDDR4_BIT ATDDR4_BIT_6
/*** ATDDR5 - A/D Conversion Result Register 5; 0x0000009A ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR5H - A/D Conversion Result Register 5 High; 0x0000009A ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} ATDDR5HSTR;
#define ATDDR5H _ATDDR5.Overlap_STR.ATDDR5HSTR.Byte
#define ATDDR5H_BIT8 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT8
#define ATDDR5H_BIT9 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT9
#define ATDDR5H_BIT10 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT10
#define ATDDR5H_BIT11 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT11
#define ATDDR5H_BIT12 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT12
#define ATDDR5H_BIT13 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT13
#define ATDDR5H_BIT14 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT14
#define ATDDR5H_BIT15 _ATDDR5.Overlap_STR.ATDDR5HSTR.Bits.BIT15
#define ATDDR5H_BIT_8 _ATDDR5.Overlap_STR.ATDDR5HSTR.MergedBits.grpBIT_8
#define ATDDR5H_BIT ATDDR5H_BIT_8
/*** ATDDR5L - A/D Conversion Result Register 5 Low; 0x0000009B ***/
union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_6 :2;
} MergedBits;
} ATDDR5LSTR;
#define ATDDR5L _ATDDR5.Overlap_STR.ATDDR5LSTR.Byte
#define ATDDR5L_BIT6 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT6
#define ATDDR5L_BIT7 _ATDDR5.Overlap_STR.ATDDR5LSTR.Bits.BIT7
#define ATDDR5L_BIT_6 _ATDDR5.Overlap_STR.ATDDR5LSTR.MergedBits.grpBIT_6
#define ATDDR5L_BIT ATDDR5L_BIT_6
} Overlap_STR;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpBIT_6 :10;
} MergedBits;
} ATDDR5STR;
extern volatile ATDDR5STR _ATDDR5 @(REG_BASE + 0x0000009A);
#define ATDDR5 _ATDDR5.Word
#define ATDDR5_BIT6 _ATDDR5.Bits.BIT6
#define ATDDR5_BIT7 _ATDDR5.Bits.BIT7
#define ATDDR5_BIT8 _ATDDR5.Bits.BIT8
#define ATDDR5_BIT9 _ATDDR5.Bits.BIT9
#define ATDDR5_BIT10 _ATDDR5.Bits.BIT10
#define ATDDR5_BIT11 _ATDDR5.Bits.BIT11
#define ATDDR5_BIT12 _ATDDR5.Bits.BIT12
#define ATDDR5_BIT13 _ATDDR5.Bits.BIT13
#define ATDDR5_BIT14 _ATDDR5.Bits.BIT14
#define ATDDR5_BIT15 _ATDDR5.Bits.BIT15
#define ATDDR5_BIT_6 _ATDDR5.MergedBits.grpBIT_6
#define ATDDR5_BIT ATDDR5_BIT_6
/*** ATDDR6 - A/D Conversion Result Register 6; 0x0000009C ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR6H - A/D Conversion Result Register 6 High; 0x0000009C ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} ATDDR6HSTR;
#define ATDDR6H _ATDDR6.Overlap_STR.ATDDR6HSTR.Byte
#define ATDDR6H_BIT8 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT8
#define ATDDR6H_BIT9 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT9
#define ATDDR6H_BIT10 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT10
#define ATDDR6H_BIT11 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT11
#define ATDDR6H_BIT12 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT12
#define ATDDR6H_BIT13 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT13
#define ATDDR6H_BIT14 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT14
#define ATDDR6H_BIT15 _ATDDR6.Overlap_STR.ATDDR6HSTR.Bits.BIT15
#define ATDDR6H_BIT_8 _ATDDR6.Overlap_STR.ATDDR6HSTR.MergedBits.grpBIT_8
#define ATDDR6H_BIT ATDDR6H_BIT_8
/*** ATDDR6L - A/D Conversion Result Register 6 Low; 0x0000009D ***/
union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_6 :2;
} MergedBits;
} ATDDR6LSTR;
#define ATDDR6L _ATDDR6.Overlap_STR.ATDDR6LSTR.Byte
#define ATDDR6L_BIT6 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT6
#define ATDDR6L_BIT7 _ATDDR6.Overlap_STR.ATDDR6LSTR.Bits.BIT7
#define ATDDR6L_BIT_6 _ATDDR6.Overlap_STR.ATDDR6LSTR.MergedBits.grpBIT_6
#define ATDDR6L_BIT ATDDR6L_BIT_6
} Overlap_STR;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpBIT_6 :10;
} MergedBits;
} ATDDR6STR;
extern volatile ATDDR6STR _ATDDR6 @(REG_BASE + 0x0000009C);
#define ATDDR6 _ATDDR6.Word
#define ATDDR6_BIT6 _ATDDR6.Bits.BIT6
#define ATDDR6_BIT7 _ATDDR6.Bits.BIT7
#define ATDDR6_BIT8 _ATDDR6.Bits.BIT8
#define ATDDR6_BIT9 _ATDDR6.Bits.BIT9
#define ATDDR6_BIT10 _ATDDR6.Bits.BIT10
#define ATDDR6_BIT11 _ATDDR6.Bits.BIT11
#define ATDDR6_BIT12 _ATDDR6.Bits.BIT12
#define ATDDR6_BIT13 _ATDDR6.Bits.BIT13
#define ATDDR6_BIT14 _ATDDR6.Bits.BIT14
#define ATDDR6_BIT15 _ATDDR6.Bits.BIT15
#define ATDDR6_BIT_6 _ATDDR6.MergedBits.grpBIT_6
#define ATDDR6_BIT ATDDR6_BIT_6
/*** ATDDR7 - A/D Conversion Result Register 7; 0x0000009E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** ATDDR7H - A/D Conversion Result Register 7 High; 0x0000009E ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* Bit 8 */
byte BIT9 :1; /* Bit 9 */
byte BIT10 :1; /* Bit 10 */
byte BIT11 :1; /* Bit 11 */
byte BIT12 :1; /* Bit 12 */
byte BIT13 :1; /* Bit 13 */
byte BIT14 :1; /* Bit 14 */
byte BIT15 :1; /* Bit 15 */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} ATDDR7HSTR;
#define ATDDR7H _ATDDR7.Overlap_STR.ATDDR7HSTR.Byte
#define ATDDR7H_BIT8 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT8
#define ATDDR7H_BIT9 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT9
#define ATDDR7H_BIT10 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT10
#define ATDDR7H_BIT11 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT11
#define ATDDR7H_BIT12 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT12
#define ATDDR7H_BIT13 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT13
#define ATDDR7H_BIT14 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT14
#define ATDDR7H_BIT15 _ATDDR7.Overlap_STR.ATDDR7HSTR.Bits.BIT15
#define ATDDR7H_BIT_8 _ATDDR7.Overlap_STR.ATDDR7HSTR.MergedBits.grpBIT_8
#define ATDDR7H_BIT ATDDR7H_BIT_8
/*** ATDDR7L - A/D Conversion Result Register 7 Low; 0x0000009F ***/
union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT6 :1; /* Bit 6 */
byte BIT7 :1; /* Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_6 :2;
} MergedBits;
} ATDDR7LSTR;
#define ATDDR7L _ATDDR7.Overlap_STR.ATDDR7LSTR.Byte
#define ATDDR7L_BIT6 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT6
#define ATDDR7L_BIT7 _ATDDR7.Overlap_STR.ATDDR7LSTR.Bits.BIT7
#define ATDDR7L_BIT_6 _ATDDR7.Overlap_STR.ATDDR7LSTR.MergedBits.grpBIT_6
#define ATDDR7L_BIT ATDDR7L_BIT_6
} Overlap_STR;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word BIT6 :1; /* Bit 6 */
word BIT7 :1; /* Bit 7 */
word BIT8 :1; /* Bit 8 */
word BIT9 :1; /* Bit 9 */
word BIT10 :1; /* Bit 10 */
word BIT11 :1; /* Bit 11 */
word BIT12 :1; /* Bit 12 */
word BIT13 :1; /* Bit 13 */
word BIT14 :1; /* Bit 14 */
word BIT15 :1; /* Bit 15 */
} Bits;
struct {
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word grpBIT_6 :10;
} MergedBits;
} ATDDR7STR;
extern volatile ATDDR7STR _ATDDR7 @(REG_BASE + 0x0000009E);
#define ATDDR7 _ATDDR7.Word
#define ATDDR7_BIT6 _ATDDR7.Bits.BIT6
#define ATDDR7_BIT7 _ATDDR7.Bits.BIT7
#define ATDDR7_BIT8 _ATDDR7.Bits.BIT8
#define ATDDR7_BIT9 _ATDDR7.Bits.BIT9
#define ATDDR7_BIT10 _ATDDR7.Bits.BIT10
#define ATDDR7_BIT11 _ATDDR7.Bits.BIT11
#define ATDDR7_BIT12 _ATDDR7.Bits.BIT12
#define ATDDR7_BIT13 _ATDDR7.Bits.BIT13
#define ATDDR7_BIT14 _ATDDR7.Bits.BIT14
#define ATDDR7_BIT15 _ATDDR7.Bits.BIT15
#define ATDDR7_BIT_6 _ATDDR7.MergedBits.grpBIT_6
#define ATDDR7_BIT ATDDR7_BIT_6
/*** SCIBD - SCI Baud Rate Register; 0x000000C8 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** SCIBDH - SCI Baud Rate Register High; 0x000000C8 ***/
union {
byte Byte;
struct {
byte SBR8 :1; /* SCI baud rate Bit 8 */
byte SBR9 :1; /* SCI baud rate Bit 9 */
byte SBR10 :1; /* SCI baud rate Bit 10 */
byte SBR11 :1; /* SCI baud rate Bit 11 */
byte SBR12 :1; /* SCI baud rate Bit 12 */
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpSBR_8 :5;
byte :1;
byte :1;
byte :1;
} MergedBits;
} SCIBDHSTR;
#define SCIBDH _SCIBD.Overlap_STR.SCIBDHSTR.Byte
#define SCIBDH_SBR8 _SCIBD.Overlap_STR.SCIBDHSTR.Bits.SBR8
#define SCIBDH_SBR9 _SCIBD.Overlap_STR.SCIBDHSTR.Bits.SBR9
#define SCIBDH_SBR10 _SCIBD.Overlap_STR.SCIBDHSTR.Bits.SBR10
#define SCIBDH_SBR11 _SCIBD.Overlap_STR.SCIBDHSTR.Bits.SBR11
#define SCIBDH_SBR12 _SCIBD.Overlap_STR.SCIBDHSTR.Bits.SBR12
#define SCIBDH_SBR_8 _SCIBD.Overlap_STR.SCIBDHSTR.MergedBits.grpSBR_8
#define SCIBDH_SBR SCIBDH_SBR_8
/*** SCIBDL - SCI Baud Rate Register Low; 0x000000C9 ***/
union {
byte Byte;
struct {
byte SBR0 :1; /* SCI baud rate Bit 0 */
byte SBR1 :1; /* SCI baud rate Bit 1 */
byte SBR2 :1; /* SCI baud rate Bit 2 */
byte SBR3 :1; /* SCI baud rate Bit 3 */
byte SBR4 :1; /* SCI baud rate Bit 4 */
byte SBR5 :1; /* SCI baud rate Bit 5 */
byte SBR6 :1; /* SCI baud rate Bit 6 */
byte SBR7 :1; /* SCI baud rate Bit 7 */
} Bits;
struct {
byte grpSBR :8;
} MergedBits;
} SCIBDLSTR;
#define SCIBDL _SCIBD.Overlap_STR.SCIBDLSTR.Byte
#define SCIBDL_SBR0 _SCIBD.Overlap_STR.SCIBDLSTR.Bits.SBR0
#define SCIBDL_SBR1 _SCIBD.Overlap_STR.SCIBDLSTR.Bits.SBR1
#define SCIBDL_SBR2 _SCIBD.Overlap_STR.SCIBDLSTR.Bits.SBR2
#define SCIBDL_SBR3 _SCIBD.Overlap_STR.SCIBDLSTR.Bits.SBR3
#define SCIBDL_SBR4 _SCIBD.Overlap_STR.SCIBDLSTR.Bits.SBR4
#define SCIBDL_SBR5 _SCIBD.Overlap_STR.SCIBDLSTR.Bits.SBR5
#define SCIBDL_SBR6 _SCIBD.Overlap_STR.SCIBDLSTR.Bits.SBR6
#define SCIBDL_SBR7 _SCIBD.Overlap_STR.SCIBDLSTR.Bits.SBR7
#define SCIBDL_SBR _SCIBD.Overlap_STR.SCIBDLSTR.MergedBits.grpSBR
} Overlap_STR;
struct {
word SBR0 :1; /* SCI baud rate Bit 0 */
word SBR1 :1; /* SCI baud rate Bit 1 */
word SBR2 :1; /* SCI baud rate Bit 2 */
word SBR3 :1; /* SCI baud rate Bit 3 */
word SBR4 :1; /* SCI baud rate Bit 4 */
word SBR5 :1; /* SCI baud rate Bit 5 */
word SBR6 :1; /* SCI baud rate Bit 6 */
word SBR7 :1; /* SCI baud rate Bit 7 */
word SBR8 :1; /* SCI baud rate Bit 8 */
word SBR9 :1; /* SCI baud rate Bit 9 */
word SBR10 :1; /* SCI baud rate Bit 10 */
word SBR11 :1; /* SCI baud rate Bit 11 */
word SBR12 :1; /* SCI baud rate Bit 12 */
word :1;
word :1;
word :1;
} Bits;
struct {
word grpSBR :13;
word :1;
word :1;
word :1;
} MergedBits;
} SCIBDSTR;
extern volatile SCIBDSTR _SCIBD @(REG_BASE + 0x000000C8);
#define SCIBD _SCIBD.Word
#define SCIBD_SBR0 _SCIBD.Bits.SBR0
#define SCIBD_SBR1 _SCIBD.Bits.SBR1
#define SCIBD_SBR2 _SCIBD.Bits.SBR2
#define SCIBD_SBR3 _SCIBD.Bits.SBR3
#define SCIBD_SBR4 _SCIBD.Bits.SBR4
#define SCIBD_SBR5 _SCIBD.Bits.SBR5
#define SCIBD_SBR6 _SCIBD.Bits.SBR6
#define SCIBD_SBR7 _SCIBD.Bits.SBR7
#define SCIBD_SBR8 _SCIBD.Bits.SBR8
#define SCIBD_SBR9 _SCIBD.Bits.SBR9
#define SCIBD_SBR10 _SCIBD.Bits.SBR10
#define SCIBD_SBR11 _SCIBD.Bits.SBR11
#define SCIBD_SBR12 _SCIBD.Bits.SBR12
#define SCIBD_SBR _SCIBD.MergedBits.grpSBR
/*** PWMCNT01 - PWM Channel Counter 01 Register; 0x000000EC ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMCNT0 - PWM Channel Counter 0 Register; 0x000000EC ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMCNT0STR;
#define PWMCNT0 _PWMCNT01.Overlap_STR.PWMCNT0STR.Byte
#define PWMCNT0_BIT _PWMCNT01.Overlap_STR.PWMCNT0STR.MergedBits.grpBIT
/*** PWMCNT1 - PWM Channel Counter 1 Register; 0x000000ED ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMCNT1STR;
#define PWMCNT1 _PWMCNT01.Overlap_STR.PWMCNT1STR.Byte
#define PWMCNT1_BIT _PWMCNT01.Overlap_STR.PWMCNT1STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMCNT01STR;
extern volatile PWMCNT01STR _PWMCNT01 @(REG_BASE + 0x000000EC);
#define PWMCNT01 _PWMCNT01.Word
#define PWMCNT01_BIT _PWMCNT01.MergedBits.grpBIT
/*** PWMCNT23 - PWM Channel Counter 23 Register; 0x000000EE ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMCNT2 - PWM Channel Counter 2 Register; 0x000000EE ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMCNT2STR;
#define PWMCNT2 _PWMCNT23.Overlap_STR.PWMCNT2STR.Byte
#define PWMCNT2_BIT _PWMCNT23.Overlap_STR.PWMCNT2STR.MergedBits.grpBIT
/*** PWMCNT3 - PWM Channel Counter 3 Register; 0x000000EF ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMCNT3STR;
#define PWMCNT3 _PWMCNT23.Overlap_STR.PWMCNT3STR.Byte
#define PWMCNT3_BIT _PWMCNT23.Overlap_STR.PWMCNT3STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMCNT23STR;
extern volatile PWMCNT23STR _PWMCNT23 @(REG_BASE + 0x000000EE);
#define PWMCNT23 _PWMCNT23.Word
#define PWMCNT23_BIT _PWMCNT23.MergedBits.grpBIT
/*** PWMCNT45 - PWM Channel Counter 45 Register; 0x000000F0 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMCNT4 - PWM Channel Counter 4 Register; 0x000000F0 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMCNT4STR;
#define PWMCNT4 _PWMCNT45.Overlap_STR.PWMCNT4STR.Byte
#define PWMCNT4_BIT _PWMCNT45.Overlap_STR.PWMCNT4STR.MergedBits.grpBIT
/*** PWMCNT5 - PWM Channel Counter 5 Register; 0x000000F1 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMCNT5STR;
#define PWMCNT5 _PWMCNT45.Overlap_STR.PWMCNT5STR.Byte
#define PWMCNT5_BIT _PWMCNT45.Overlap_STR.PWMCNT5STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMCNT45STR;
extern volatile PWMCNT45STR _PWMCNT45 @(REG_BASE + 0x000000F0);
#define PWMCNT45 _PWMCNT45.Word
#define PWMCNT45_BIT _PWMCNT45.MergedBits.grpBIT
/*** PWMPER01 - PWM Channel Period 01 Register; 0x000000F2 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMPER0 - PWM Channel Period 0 Register; 0x000000F2 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMPER0STR;
#define PWMPER0 _PWMPER01.Overlap_STR.PWMPER0STR.Byte
#define PWMPER0_BIT _PWMPER01.Overlap_STR.PWMPER0STR.MergedBits.grpBIT
/*** PWMPER1 - PWM Channel Period 1 Register; 0x000000F3 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMPER1STR;
#define PWMPER1 _PWMPER01.Overlap_STR.PWMPER1STR.Byte
#define PWMPER1_BIT _PWMPER01.Overlap_STR.PWMPER1STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMPER01STR;
extern volatile PWMPER01STR _PWMPER01 @(REG_BASE + 0x000000F2);
#define PWMPER01 _PWMPER01.Word
#define PWMPER01_BIT _PWMPER01.MergedBits.grpBIT
/*** PWMPER23 - PWM Channel Period 23 Register; 0x000000F4 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMPER2 - PWM Channel Period 2 Register; 0x000000F4 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMPER2STR;
#define PWMPER2 _PWMPER23.Overlap_STR.PWMPER2STR.Byte
#define PWMPER2_BIT _PWMPER23.Overlap_STR.PWMPER2STR.MergedBits.grpBIT
/*** PWMPER3 - PWM Channel Period 3 Register; 0x000000F5 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMPER3STR;
#define PWMPER3 _PWMPER23.Overlap_STR.PWMPER3STR.Byte
#define PWMPER3_BIT _PWMPER23.Overlap_STR.PWMPER3STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMPER23STR;
extern volatile PWMPER23STR _PWMPER23 @(REG_BASE + 0x000000F4);
#define PWMPER23 _PWMPER23.Word
#define PWMPER23_BIT _PWMPER23.MergedBits.grpBIT
/*** PWMPER45 - PWM Channel Period 45 Register; 0x000000F6 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMPER4 - PWM Channel Period 4 Register; 0x000000F6 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMPER4STR;
#define PWMPER4 _PWMPER45.Overlap_STR.PWMPER4STR.Byte
#define PWMPER4_BIT _PWMPER45.Overlap_STR.PWMPER4STR.MergedBits.grpBIT
/*** PWMPER5 - PWM Channel Period 5 Register; 0x000000F7 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMPER5STR;
#define PWMPER5 _PWMPER45.Overlap_STR.PWMPER5STR.Byte
#define PWMPER5_BIT _PWMPER45.Overlap_STR.PWMPER5STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMPER45STR;
extern volatile PWMPER45STR _PWMPER45 @(REG_BASE + 0x000000F6);
#define PWMPER45 _PWMPER45.Word
#define PWMPER45_BIT _PWMPER45.MergedBits.grpBIT
/*** PWMDTY01 - PWM Channel Duty 01 Register; 0x000000F8 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMDTY0 - PWM Channel Duty 0 Register; 0x000000F8 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMDTY0STR;
#define PWMDTY0 _PWMDTY01.Overlap_STR.PWMDTY0STR.Byte
#define PWMDTY0_BIT _PWMDTY01.Overlap_STR.PWMDTY0STR.MergedBits.grpBIT
/*** PWMDTY1 - PWM Channel Duty 1 Register; 0x000000F9 ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMDTY1STR;
#define PWMDTY1 _PWMDTY01.Overlap_STR.PWMDTY1STR.Byte
#define PWMDTY1_BIT _PWMDTY01.Overlap_STR.PWMDTY1STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMDTY01STR;
extern volatile PWMDTY01STR _PWMDTY01 @(REG_BASE + 0x000000F8);
#define PWMDTY01 _PWMDTY01.Word
#define PWMDTY01_BIT _PWMDTY01.MergedBits.grpBIT
/*** PWMDTY23 - PWM Channel Duty 23 Register; 0x000000FA ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMDTY2 - PWM Channel Duty 2 Register; 0x000000FA ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMDTY2STR;
#define PWMDTY2 _PWMDTY23.Overlap_STR.PWMDTY2STR.Byte
#define PWMDTY2_BIT _PWMDTY23.Overlap_STR.PWMDTY2STR.MergedBits.grpBIT
/*** PWMDTY3 - PWM Channel Duty 3 Register; 0x000000FB ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMDTY3STR;
#define PWMDTY3 _PWMDTY23.Overlap_STR.PWMDTY3STR.Byte
#define PWMDTY3_BIT _PWMDTY23.Overlap_STR.PWMDTY3STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMDTY23STR;
extern volatile PWMDTY23STR _PWMDTY23 @(REG_BASE + 0x000000FA);
#define PWMDTY23 _PWMDTY23.Word
#define PWMDTY23_BIT _PWMDTY23.MergedBits.grpBIT
/*** PWMDTY45 - PWM Channel Duty 45 Register; 0x000000FC ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PWMDTY4 - PWM Channel Duty 4 Register; 0x000000FC ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMDTY4STR;
#define PWMDTY4 _PWMDTY45.Overlap_STR.PWMDTY4STR.Byte
#define PWMDTY4_BIT _PWMDTY45.Overlap_STR.PWMDTY4STR.MergedBits.grpBIT
/*** PWMDTY5 - PWM Channel Duty 5 Register; 0x000000FD ***/
union {
byte Byte;
struct {
byte grpBIT :8;
} MergedBits;
} PWMDTY5STR;
#define PWMDTY5 _PWMDTY45.Overlap_STR.PWMDTY5STR.Byte
#define PWMDTY5_BIT _PWMDTY45.Overlap_STR.PWMDTY5STR.MergedBits.grpBIT
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} PWMDTY45STR;
extern volatile PWMDTY45STR _PWMDTY45 @(REG_BASE + 0x000000FC);
#define PWMDTY45 _PWMDTY45.Word
#define PWMDTY45_BIT _PWMDTY45.MergedBits.grpBIT
/*** PORTE - Port E Register; 0x00000008 ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* Port E Bit 0 */
byte BIT1 :1; /* Port E Bit 1 */
byte BIT2 :1; /* Port E Bit 2 */
byte BIT3 :1; /* Port E Bit 3 */
byte BIT4 :1; /* Port E Bit 4 */
byte BIT5 :1; /* Port E Bit 5 */
byte BIT6 :1; /* Port E Bit 6 */
byte BIT7 :1; /* Port E Bit 7 */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} PORTESTR;
extern volatile PORTESTR _PORTE @(REG_BASE + 0x00000008);
#define PORTE _PORTE.Byte
#define PORTE_BIT0 _PORTE.Bits.BIT0
#define PORTE_BIT1 _PORTE.Bits.BIT1
#define PORTE_BIT2 _PORTE.Bits.BIT2
#define PORTE_BIT3 _PORTE.Bits.BIT3
#define PORTE_BIT4 _PORTE.Bits.BIT4
#define PORTE_BIT5 _PORTE.Bits.BIT5
#define PORTE_BIT6 _PORTE.Bits.BIT6
#define PORTE_BIT7 _PORTE.Bits.BIT7
#define PORTE_BIT _PORTE.MergedBits.grpBIT
/*** DDRE - Port E Data Direction Register; 0x00000009 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte BIT2 :1; /* Data Direction Port A Bit 2 */
byte BIT3 :1; /* Data Direction Port A Bit 3 */
byte BIT4 :1; /* Data Direction Port A Bit 4 */
byte BIT5 :1; /* Data Direction Port A Bit 5 */
byte BIT6 :1; /* Data Direction Port A Bit 6 */
byte BIT7 :1; /* Data Direction Port A Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte grpBIT_2 :6;
} MergedBits;
} DDRESTR;
extern volatile DDRESTR _DDRE @(REG_BASE + 0x00000009);
#define DDRE _DDRE.Byte
#define DDRE_BIT2 _DDRE.Bits.BIT2
#define DDRE_BIT3 _DDRE.Bits.BIT3
#define DDRE_BIT4 _DDRE.Bits.BIT4
#define DDRE_BIT5 _DDRE.Bits.BIT5
#define DDRE_BIT6 _DDRE.Bits.BIT6
#define DDRE_BIT7 _DDRE.Bits.BIT7
#define DDRE_BIT_2 _DDRE.MergedBits.grpBIT_2
#define DDRE_BIT DDRE_BIT_2
/*** PEAR - Port E Assignment Register; 0x0000000A ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte RDWE :1; /* Read / Write Enable */
byte LSTRE :1; /* Low Strobe (LSTRB) Enable */
byte NECLK :1; /* No External E Clock */
byte PIPOE :1; /* Pipe Status Signal Output Enable */
byte :1;
byte NOACCE :1; /* CPU No Access Output Enable */
} Bits;
} PEARSTR;
extern volatile PEARSTR _PEAR @(REG_BASE + 0x0000000A);
#define PEAR _PEAR.Byte
#define PEAR_RDWE _PEAR.Bits.RDWE
#define PEAR_LSTRE _PEAR.Bits.LSTRE
#define PEAR_NECLK _PEAR.Bits.NECLK
#define PEAR_PIPOE _PEAR.Bits.PIPOE
#define PEAR_NOACCE _PEAR.Bits.NOACCE
/*** MODE - Mode Register; 0x0000000B ***/
typedef union {
byte Byte;
struct {
byte EME :1; /* Emulate Port E */
byte EMK :1; /* Emulate Port K */
byte :1;
byte IVIS :1; /* Internal Visibility */
byte :1;
byte MODA :1; /* Mode Select Bit A */
byte MODB :1; /* Mode Select Bit B */
byte MODC :1; /* Mode Select Bit C */
} Bits;
} MODESTR;
extern volatile MODESTR _MODE @(REG_BASE + 0x0000000B);
#define MODE _MODE.Byte
#define MODE_EME _MODE.Bits.EME
#define MODE_EMK _MODE.Bits.EMK
#define MODE_IVIS _MODE.Bits.IVIS
#define MODE_MODA _MODE.Bits.MODA
#define MODE_MODB _MODE.Bits.MODB
#define MODE_MODC _MODE.Bits.MODC
/*** PUCR - Pull-Up Control Register; 0x0000000C ***/
typedef union {
byte Byte;
struct {
byte PUPAE :1; /* Pull-Up Port A Enable */
byte PUPBE :1; /* Pull-Up Port B Enable */
byte :1;
byte :1;
byte PUPEE :1; /* Pull-Up Port E Enable */
byte :1;
byte :1;
byte PUPKE :1; /* Pull-Up Port K Enable */
} Bits;
} PUCRSTR;
extern volatile PUCRSTR _PUCR @(REG_BASE + 0x0000000C);
#define PUCR _PUCR.Byte
#define PUCR_PUPAE _PUCR.Bits.PUPAE
#define PUCR_PUPBE _PUCR.Bits.PUPBE
#define PUCR_PUPEE _PUCR.Bits.PUPEE
#define PUCR_PUPKE _PUCR.Bits.PUPKE
/*** RDRIV - Reduced Drive of I/O Lines; 0x0000000D ***/
typedef union {
byte Byte;
struct {
byte RDPA :1; /* Reduced Drive of Port A */
byte RDPB :1; /* Reduced Drive of Port B */
byte :1;
byte :1;
byte RDPE :1; /* Reduced Drive of Port E */
byte :1;
byte :1;
byte RDPK :1; /* Reduced Drive of Port K */
} Bits;
} RDRIVSTR;
extern volatile RDRIVSTR _RDRIV @(REG_BASE + 0x0000000D);
#define RDRIV _RDRIV.Byte
#define RDRIV_RDPA _RDRIV.Bits.RDPA
#define RDRIV_RDPB _RDRIV.Bits.RDPB
#define RDRIV_RDPE _RDRIV.Bits.RDPE
#define RDRIV_RDPK _RDRIV.Bits.RDPK
/*** EBICTL - External Bus Interface Control; 0x0000000E ***/
typedef union {
byte Byte;
struct {
byte ESTR :1; /* E Stretches */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} EBICTLSTR;
extern volatile EBICTLSTR _EBICTL @(REG_BASE + 0x0000000E);
#define EBICTL _EBICTL.Byte
#define EBICTL_ESTR _EBICTL.Bits.ESTR
/*** INITRM - Initialization of Internal RAM Position Register; 0x00000010 ***/
typedef union {
byte Byte;
struct {
byte RAMHAL :1; /* Internal RAM map alignment */
byte :1;
byte :1;
byte RAM11 :1; /* Internal RAM map position Bit 11 */
byte RAM12 :1; /* Internal RAM map position Bit 12 */
byte RAM13 :1; /* Internal RAM map position Bit 13 */
byte RAM14 :1; /* Internal RAM map position Bit 14 */
byte RAM15 :1; /* Internal RAM map position Bit 15 */
} Bits;
struct {
byte