| /** | |
| * \file | |
| * | |
| * \brief Instance description for WDT | |
| * | |
| * Copyright (c) 2013 Atmel Corporation. All rights reserved. | |
| * | |
| * \asf_license_start | |
| * | |
| * \page License | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * | |
| * 1. Redistributions of source code must retain the above copyright notice, | |
| * this list of conditions and the following disclaimer. | |
| * | |
| * 2. Redistributions in binary form must reproduce the above copyright notice, | |
| * this list of conditions and the following disclaimer in the documentation | |
| * and/or other materials provided with the distribution. | |
| * | |
| * 3. The name of Atmel may not be used to endorse or promote products derived | |
| * from this software without specific prior written permission. | |
| * | |
| * 4. This software may only be redistributed and used in connection with an | |
| * Atmel microcontroller product. | |
| * | |
| * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED | |
| * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
| * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE | |
| * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR | |
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| * POSSIBILITY OF SUCH DAMAGE. | |
| * | |
| * \asf_license_stop | |
| * | |
| */ | |
| #ifndef _SAMD20_WDT_INSTANCE_ | |
| #define _SAMD20_WDT_INSTANCE_ | |
| /* ========== Register definition for WDT peripheral ========== */ | |
| #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) | |
| #define REG_WDT_CTRL (0x40001000U) /**< \brief (WDT) Control Register */ | |
| #define REG_WDT_CONFIG (0x40001001U) /**< \brief (WDT) Configuration Register */ | |
| #define REG_WDT_EWCTRL (0x40001002U) /**< \brief (WDT) Early Warning Control Register */ | |
| #define REG_WDT_INTENCLR (0x40001004U) /**< \brief (WDT) Interrupt Enable Clear Register */ | |
| #define REG_WDT_INTENSET (0x40001005U) /**< \brief (WDT) Interrupt Enable Set Register */ | |
| #define REG_WDT_INTFLAG (0x40001006U) /**< \brief (WDT) Interrupt Flag Status and Clear Register */ | |
| #define REG_WDT_STATUS (0x40001007U) /**< \brief (WDT) Status Register */ | |
| #define REG_WDT_CLEAR (0x40001008U) /**< \brief (WDT) Clear Register */ | |
| #else | |
| #define REG_WDT_CTRL (*(RwReg8 *)0x40001000U) /**< \brief (WDT) Control Register */ | |
| #define REG_WDT_CONFIG (*(RwReg8 *)0x40001001U) /**< \brief (WDT) Configuration Register */ | |
| #define REG_WDT_EWCTRL (*(RwReg8 *)0x40001002U) /**< \brief (WDT) Early Warning Control Register */ | |
| #define REG_WDT_INTENCLR (*(RwReg8 *)0x40001004U) /**< \brief (WDT) Interrupt Enable Clear Register */ | |
| #define REG_WDT_INTENSET (*(RwReg8 *)0x40001005U) /**< \brief (WDT) Interrupt Enable Set Register */ | |
| #define REG_WDT_INTFLAG (*(RwReg8 *)0x40001006U) /**< \brief (WDT) Interrupt Flag Status and Clear Register */ | |
| #define REG_WDT_STATUS (*(RoReg8 *)0x40001007U) /**< \brief (WDT) Status Register */ | |
| #define REG_WDT_CLEAR (*(WoReg8 *)0x40001008U) /**< \brief (WDT) Clear Register */ | |
| #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ | |
| /* ========== Instance parameters for WDT peripheral ========== */ | |
| #define WDT_GCLK_ID 1 | |
| #endif /* _SAMD20_WDT_INSTANCE_ */ |