/*
 * (C) Copyright 2010,2011
 * NVIDIA Corporation <www.nvidia.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _TEGRA20_H_
#define _TEGRA20_H_

#define NV_PA_SDRAM_BASE	0x00000000
#define NV_PA_MC_BASE		0x7000F000

#include <asm/arch-tegra/tegra.h>

#define TEGRA_USB1_BASE		0xC5000000

#define BCT_ODMDATA_OFFSET	4068	/* 12 bytes from end of BCT */

#define MAX_NUM_CPU		2

#endif	/* TEGRA20_H */