u-boot-imx/include/configs/mx6sxsabresd.h - nest-learning-thermostat/5.1.7/u-boot - Git at Google

 /*
  * Copyright (C) 2014 Freescale Semiconductor, Inc.
  *
  * Configuration settings for the Freescale i.MX6SX SABRESD board.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */

 #ifndef __MX6SX_SABRESD_CONFIG_H
 #define __MX6SX_SABRESD_CONFIG_H

 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
 #include "mx6_common.h"
 #include <asm/imx-common/gpio.h>

 #define CONFIG_MX6
 #define CONFIG_ROM_UNIFIED_SECTIONS
 #define CONFIG_SYS_GENERIC_BOARD
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO

 #define CONFIG_DBG_MONITOR
 /* uncomment for PLUGIN mode support */
 /* #define CONFIG_USE_PLUGIN */

 /* uncomment for SECURE mode support */
 /* #define CONFIG_SECURE_BOOT */

 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG

 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)

 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_MXC_GPIO

 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE		UART1_BASE

 #define CONFIG_CMD_FUSE
 #ifdef CONFIG_CMD_FUSE
 #define CONFIG_MXC_OCOTP
 #endif

 /* MMC Configs */
 #define CONFIG_FSL_ESDHC
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 #define CONFIG_SYS_FSL_USDHC_NUM	3

 #define CONFIG_MMC
 #define CONFIG_CMD_MMC
 #define CONFIG_GENERIC_MMC
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */

 #define CONFIG_BAUDRATE			115200

 #undef CONFIG_BOOTM_NETBSD
 #undef CONFIG_BOOTM_PLAN9
 #undef CONFIG_BOOTM_RTEMS

 #undef CONFIG_CMD_EXPORTENV
 #undef CONFIG_CMD_IMPORTENV

 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 #define CONFIG_FEC_MXC
 #define CONFIG_MII
 #define CONFIG_FEC_ENET_DEV 0

 #if (CONFIG_FEC_ENET_DEV == 0)
 #define IMX_FEC_BASE			ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x1
 #elif (CONFIG_FEC_ENET_DEV == 1)
 #define IMX_FEC_BASE			ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x2
 #endif
 #define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_ETHPRIME                 "FEC"

 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 #define CONFIG_FEC_DMA_MINALIGN		64
 #define CONFIG_FEC_MXC_25M_REF_CLK

 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX		1

 /* I2C configs */
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_SPEED		100000

 /* MAX7322 */
 #ifdef CONFIG_FEC_ENABLE_MAX7322
 #define CONFIG_MAX7322_I2C_ADDR		0x68
 #define CONFIG_MAX7322_I2C_BUS		1
 #endif

 /* PMIC */
 #define CONFIG_PFUZE100_PMIC_I2C
 #ifdef CONFIG_PFUZE100_PMIC_I2C
 #define CONFIG_PMIC_I2C_BUS		0
 #define CONFIG_PMIC_I2C_SLAVE		0x8
 #endif

 /* VIDEO */
 #define CONFIG_VIDEO
 #define CONFIG_VIDEO_GIS

 /* Command definition */
 #include <config_cmd_default.h>

 #undef CONFIG_CMD_IMLS

 #define CONFIG_BOOTDELAY		3

 #define CONFIG_LOADADDR			0x80800000
 #define CONFIG_SYS_TEXT_BASE		0x87800000

 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 /* Set to QSPI2 B flash at default */
 #ifndef CONFIG_SYS_AUXCORE_FASTUP
 #define CONFIG_CMD_BOOTAUX /* Boot M4 by command, disable this when M4 fast up */
 #define CONFIG_CMD_SETEXPR
 #endif

 #ifdef CONFIG_CMD_BOOTAUX
 #define UPDATE_M4_ENV \
 	"m4image=m4_qspi.bin\0" \
 	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
 	"update_m4_from_sd=" \
 		"if sf probe 1:0; then " \
 			"if run loadm4image; then " \
 				"setexpr fw_sz ${filesize} + 0xffff; " \
 				"setexpr fw_sz ${fw_sz} / 0x10000; "	\
 				"setexpr fw_sz ${fw_sz} * 0x10000; "	\
 				"sf erase 0x0 ${fw_sz}; " \
 				"sf write ${loadaddr} 0x0 ${filesize}; " \
 			"fi; " \
 		"fi\0" \
 	"m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
 #else
 #define UPDATE_M4_ENV ""
 #endif

 #ifdef CONFIG_VIDEO
 #define CONFIG_VIDEO_MODE \
 	"panel=Hannstar-XGA\0"
 #else
 #define CONFIG_VIDEO_MODE ""
 #endif

 #define CONFIG_MFG_ENV_SETTINGS \
 	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
 		"rdinit=/linuxrc " \
 		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
 		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
 		"g_mass_storage.iSerialNumber=\"\" "\
 		"\0" \
 	"initrd_addr=0x83800000\0" \
 	"initrd_high=0xffffffff\0" \
 	"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \

 #define CONFIG_EXTRA_ENV_SETTINGS \
 	CONFIG_MFG_ENV_SETTINGS \
 	UPDATE_M4_ENV \
 	CONFIG_VIDEO_MODE \
 	"script=boot.scr\0" \
 	"image=zImage\0" \
 	"console=ttymxc0\0" \
 	"fdt_high=0xffffffff\0" \
 	"initrd_high=0xffffffff\0" \
 	"fdt_file=imx6sx-sdb.dtb\0" \
 	"fdt_addr=0x83000000\0" \
 	"boot_fdt=try\0" \
 	"ip_dyn=yes\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
 	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
 		"root=${mmcroot}\0" \
 	"loadbootscript=" \
 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 	"bootscript=echo Running bootscript from mmc ...; " \
 		"source\0" \
 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
 	"mmcboot=echo Booting from mmc ...; " \
 		"run mmcargs; " \
 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 			"if run loadfdt; then " \
 				"bootz ${loadaddr} - ${fdt_addr}; " \
 			"else " \
 				"if test ${boot_fdt} = try; then " \
 					"bootz; " \
 				"else " \
 					"echo WARN: Cannot load the DT; " \
 				"fi; " \
 			"fi; " \
 		"else " \
 			"bootz; " \
 		"fi;\0" \
 	"netargs=setenv bootargs console=${console},${baudrate} " \
 		"root=/dev/nfs " \
 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 		"netboot=echo Booting from net ...; " \
 		"run netargs; " \
 		"if test ${ip_dyn} = yes; then " \
 			"setenv get_cmd dhcp; " \
 		"else " \
 			"setenv get_cmd tftp; " \
 		"fi; " \
 		"${get_cmd} ${image}; " \
 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 				"bootz ${loadaddr} - ${fdt_addr}; " \
 			"else " \
 				"if test ${boot_fdt} = try; then " \
 					"bootz; " \
 				"else " \
 					"echo WARN: Cannot load the DT; " \
 				"fi; " \
 			"fi; " \
 		"else " \
 			"bootz; " \
 		"fi;\0"

 #define CONFIG_BOOTCOMMAND \
 	   "mmc dev ${mmcdev};" \
 	   "if mmc rescan; then " \
 		   "if run loadbootscript; then " \
 			   "run bootscript; " \
 		   "else " \
 			   "if run loadimage; then " \
 				   "run mmcboot; " \
 			   "else run netboot; " \
 			   "fi; " \
 		   "fi; " \
 	   "else run netboot; fi"

 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_HUSH_PARSER
 #define CONFIG_SYS_PROMPT		"=> "
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_CBSIZE		1024

 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_MAXARGS		256
 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

 #define CONFIG_CMD_MEMTEST
 #define CONFIG_SYS_MEMTEST_START	0x80000000
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)

 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000

 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_STACKSIZE		SZ_128K

 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS		1
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
 #define PHYS_SDRAM_SIZE			SZ_1G

 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

 #define CONFIG_SYS_INIT_SP_OFFSET \
 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

 /* FLASH and environment organization */
 #define CONFIG_SYS_NO_FLASH

 #define CONFIG_ENV_SIZE			SZ_8K

 #ifdef CONFIG_SYS_AUXCORE_FASTUP
 /*#define CONFIG_MXC_RDC*/   /* Disable the RDC temporarily, will enable it in future */
 #define CONFIG_ENV_IS_IN_MMC  /* Must disable QSPI driver, because M4 run on QSPI */
 #elif defined CONFIG_SYS_BOOT_QSPI
 #define CONFIG_SYS_USE_QSPI
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #else
 #define CONFIG_SYS_USE_QSPI   /* Enable the QSPI flash at default */
 #define CONFIG_ENV_IS_IN_MMC
 #endif

 #ifdef CONFIG_SYS_USE_QSPI
 #define CONFIG_QSPI    /* enable the QUADSPI driver */
 #define CONFIG_QSPI_BASE			QSPI2_BASE_ADDR
 #define CONFIG_QSPI_MEMMAP_BASE		QSPI2_ARB_BASE_ADDR

 #define CONFIG_CMD_SF
 #define	CONFIG_SPI_FLASH
 #define	CONFIG_SPI_FLASH_BAR
 #define	CONFIG_SPI_FLASH_SPANSION
 #define CONFIG_SPI_FLASH_STMICRO
 #define	CONFIG_SF_DEFAULT_BUS		0
 #define	CONFIG_SF_DEFAULT_CS		0
 #define	CONFIG_SF_DEFAULT_SPEED		40000000
 #define	CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
 #endif

 #define CONFIG_SYS_MMC_ENV_DEV		2  /*USDHC4*/
 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
 #define CONFIG_MMCROOT			"/dev/mmcblk3p2"  /* USDHC4 */

 #if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 #define CONFIG_ENV_OFFSET		(768 * 1024)
 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
 #endif


 #define CONFIG_OF_LIBFDT
 #define CONFIG_CMD_BOOTZ

 #define CONFIG_CMD_BMODE

 #ifndef CONFIG_SYS_DCACHE_OFF
 #define CONFIG_CMD_CACHE
 #endif

 #ifdef CONFIG_VIDEO
 #define	CONFIG_CFB_CONSOLE
 #define	CONFIG_VIDEO_MXS
 #define	CONFIG_VIDEO_LOGO
 #define	CONFIG_VIDEO_SW_CURSOR
 #define	CONFIG_VGA_AS_SINGLE_DEVICE
 #define	CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define	CONFIG_SPLASH_SCREEN
 #define CONFIG_SPLASH_SCREEN_ALIGN
 #define	CONFIG_CMD_BMP
 #define	CONFIG_BMP_16BPP
 #define	CONFIG_VIDEO_BMP_RLE8
 #define CONFIG_VIDEO_BMP_LOGO
 #ifdef CONFIG_VIDEO_GIS
 #define CONFIG_VIDEO_CSI
 #define CONFIG_VIDEO_PXP
 #define CONFIG_VIDEO_VADC
 #endif
 #endif

 #define CONFIG_CMD_USB
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_MX6
 #define CONFIG_USB_STORAGE
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2

 /*
  * The PCIe support in uboot would bring failures in i.MX6SX PCIe
  * EP/RC validations. Disable PCIe support in uboot here.
  * RootCause: The bit10(ltssm_en) of GPR12 would be set in uboot,
  * thus the i.MX6SX PCIe EP would be cheated that the other i.MX6SX
  * PCIe RC had been configured and trying to setup PCIe link directly,
  * although the i.MX6SX RC is not properly configured at that time.
  * PCIe can be supported in uboot, if the i.MX6SX PCIe EP/RC validation
  * is not running.
  */
 /* #define CONFIG_CMD_PCI */
 #ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI
 #define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_PCIE_IMX
 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(2, 0)
 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(2, 1)
 #endif

 #if defined(CONFIG_ANDROID_SUPPORT)
 #include "mx6sxsabresdandroid.h"
 #endif

 #endif				/* __CONFIG_H */
	/*
	* Copyright (C) 2014 Freescale Semiconductor, Inc.
	*
	* Configuration settings for the Freescale i.MX6SX SABRESD board.
	*
	* SPDX-License-Identifier: GPL-2.0+
	*/

	#ifndef __MX6SX_SABRESD_CONFIG_H
	#define __MX6SX_SABRESD_CONFIG_H

	#include <asm/arch/imx-regs.h>
	#include <linux/sizes.h>
	#include "mx6_common.h"
	#include <asm/imx-common/gpio.h>

	#define CONFIG_MX6
	#define CONFIG_ROM_UNIFIED_SECTIONS
	#define CONFIG_SYS_GENERIC_BOARD
	#define CONFIG_DISPLAY_CPUINFO
	#define CONFIG_DISPLAY_BOARDINFO

	#define CONFIG_DBG_MONITOR
	/* uncomment for PLUGIN mode support */
	/* #define CONFIG_USE_PLUGIN */

	/* uncomment for SECURE mode support */
	/* #define CONFIG_SECURE_BOOT */

	#define CONFIG_CMDLINE_TAG
	#define CONFIG_SETUP_MEMORY_TAGS
	#define CONFIG_INITRD_TAG
	#define CONFIG_REVISION_TAG

	/* Size of malloc() pool */
	#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)

	#define CONFIG_BOARD_EARLY_INIT_F
	#define CONFIG_BOARD_LATE_INIT
	#define CONFIG_MXC_GPIO

	#define CONFIG_MXC_UART
	#define CONFIG_MXC_UART_BASE UART1_BASE

	#define CONFIG_CMD_FUSE
	#ifdef CONFIG_CMD_FUSE
	#define CONFIG_MXC_OCOTP
	#endif

	/* MMC Configs */
	#define CONFIG_FSL_ESDHC
	#define CONFIG_FSL_USDHC
	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	#define CONFIG_SYS_FSL_USDHC_NUM 3

	#define CONFIG_MMC
	#define CONFIG_CMD_MMC
	#define CONFIG_GENERIC_MMC
	#define CONFIG_CMD_FAT
	#define CONFIG_DOS_PARTITION
	#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */

	#define CONFIG_BAUDRATE 115200

	#undef CONFIG_BOOTM_NETBSD
	#undef CONFIG_BOOTM_PLAN9
	#undef CONFIG_BOOTM_RTEMS

	#undef CONFIG_CMD_EXPORTENV
	#undef CONFIG_CMD_IMPORTENV

	#define CONFIG_CMD_PING
	#define CONFIG_CMD_DHCP
	#define CONFIG_CMD_MII
	#define CONFIG_CMD_NET
	#define CONFIG_FEC_MXC
	#define CONFIG_MII
	#define CONFIG_FEC_ENET_DEV 0

	#if (CONFIG_FEC_ENET_DEV == 0)
	#define IMX_FEC_BASE ENET_BASE_ADDR
	#define CONFIG_FEC_MXC_PHYADDR 0x1
	#elif (CONFIG_FEC_ENET_DEV == 1)
	#define IMX_FEC_BASE ENET2_BASE_ADDR
	#define CONFIG_FEC_MXC_PHYADDR 0x2
	#endif
	#define CONFIG_FEC_XCV_TYPE RGMII
	#define CONFIG_ETHPRIME "FEC"

	#define CONFIG_PHYLIB
	#define CONFIG_PHY_ATHEROS
	#define CONFIG_FEC_DMA_MINALIGN 64
	#define CONFIG_FEC_MXC_25M_REF_CLK

	/* allow to overwrite serial and ethaddr */
	#define CONFIG_ENV_OVERWRITE
	#define CONFIG_CONS_INDEX 1

	/* I2C configs */
	#define CONFIG_CMD_I2C
	#define CONFIG_SYS_I2C
	#define CONFIG_SYS_I2C_MXC
	#define CONFIG_SYS_I2C_SPEED 100000

	/* MAX7322 */
	#ifdef CONFIG_FEC_ENABLE_MAX7322
	#define CONFIG_MAX7322_I2C_ADDR 0x68
	#define CONFIG_MAX7322_I2C_BUS 1
	#endif

	/* PMIC */
	#define CONFIG_PFUZE100_PMIC_I2C
	#ifdef CONFIG_PFUZE100_PMIC_I2C
	#define CONFIG_PMIC_I2C_BUS 0
	#define CONFIG_PMIC_I2C_SLAVE 0x8
	#endif

	/* VIDEO */
	#define CONFIG_VIDEO
	#define CONFIG_VIDEO_GIS

	/* Command definition */
	#include <config_cmd_default.h>

	#undef CONFIG_CMD_IMLS

	#define CONFIG_BOOTDELAY 3

	#define CONFIG_LOADADDR 0x80800000
	#define CONFIG_SYS_TEXT_BASE 0x87800000

	#define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 /* Set to QSPI2 B flash at default */
	#ifndef CONFIG_SYS_AUXCORE_FASTUP
	#define CONFIG_CMD_BOOTAUX /* Boot M4 by command, disable this when M4 fast up */
	#define CONFIG_CMD_SETEXPR
	#endif

	#ifdef CONFIG_CMD_BOOTAUX
	#define UPDATE_M4_ENV \
	"m4image=m4_qspi.bin\0" \
	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
	"update_m4_from_sd=" \
	"if sf probe 1:0; then " \
	"if run loadm4image; then " \
	"setexpr fw_sz ${filesize} + 0xffff; " \
	"setexpr fw_sz ${fw_sz} / 0x10000; " \
	"setexpr fw_sz ${fw_sz} * 0x10000; " \
	"sf erase 0x0 ${fw_sz}; " \
	"sf write ${loadaddr} 0x0 ${filesize}; " \
	"fi; " \
	"fi\0" \
	"m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
	#else
	#define UPDATE_M4_ENV ""
	#endif

	#ifdef CONFIG_VIDEO
	#define CONFIG_VIDEO_MODE \
	"panel=Hannstar-XGA\0"
	#else
	#define CONFIG_VIDEO_MODE ""
	#endif

	#define CONFIG_MFG_ENV_SETTINGS \
	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
	"rdinit=/linuxrc " \
	"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
	"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
	"g_mass_storage.iSerialNumber=\"\" "\
	"\0" \
	"initrd_addr=0x83800000\0" \
	"initrd_high=0xffffffff\0" \
	"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \

	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_MFG_ENV_SETTINGS \
	UPDATE_M4_ENV \
	CONFIG_VIDEO_MODE \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttymxc0\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=imx6sx-sdb.dtb\0" \
	"fdt_addr=0x83000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	"mmcpart=1\0" \
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	"root=${mmcroot}\0" \
	"loadbootscript=" \
	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
	"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
	"run mmcargs; " \
	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	"if run loadfdt; then " \
	"bootz ${loadaddr} - ${fdt_addr}; " \
	"else " \
	"if test ${boot_fdt} = try; then " \
	"bootz; " \
	"else " \
	"echo WARN: Cannot load the DT; " \
	"fi; " \
	"fi; " \
	"else " \
	"bootz; " \
	"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
	"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	"netboot=echo Booting from net ...; " \
	"run netargs; " \
	"if test ${ip_dyn} = yes; then " \
	"setenv get_cmd dhcp; " \
	"else " \
	"setenv get_cmd tftp; " \
	"fi; " \
	"${get_cmd} ${image}; " \
	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	"bootz ${loadaddr} - ${fdt_addr}; " \
	"else " \
	"if test ${boot_fdt} = try; then " \
	"bootz; " \
	"else " \
	"echo WARN: Cannot load the DT; " \
	"fi; " \
	"fi; " \
	"else " \
	"bootz; " \
	"fi;\0"

	#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev};" \
	"if mmc rescan; then " \
	"if run loadbootscript; then " \
	"run bootscript; " \
	"else " \
	"if run loadimage; then " \
	"run mmcboot; " \
	"else run netboot; " \
	"fi; " \
	"fi; " \
	"else run netboot; fi"

	/* Miscellaneous configurable options */
	#define CONFIG_SYS_LONGHELP
	#define CONFIG_SYS_HUSH_PARSER
	#define CONFIG_SYS_PROMPT "=> "
	#define CONFIG_AUTO_COMPLETE
	#define CONFIG_SYS_CBSIZE 1024

	/* Print Buffer Size */
	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	#define CONFIG_SYS_MAXARGS 256
	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

	#define CONFIG_CMD_MEMTEST
	#define CONFIG_SYS_MEMTEST_START 0x80000000
	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)

	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	#define CONFIG_SYS_HZ 1000

	#define CONFIG_CMDLINE_EDITING
	#define CONFIG_STACKSIZE SZ_128K

	/* Physical Memory Map */
	#define CONFIG_NR_DRAM_BANKS 1
	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	#define PHYS_SDRAM_SIZE SZ_1G

	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE

	#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

	/* FLASH and environment organization */
	#define CONFIG_SYS_NO_FLASH

	#define CONFIG_ENV_SIZE SZ_8K

	#ifdef CONFIG_SYS_AUXCORE_FASTUP
	/#define CONFIG_MXC_RDC/ /* Disable the RDC temporarily, will enable it in future */
	#define CONFIG_ENV_IS_IN_MMC /* Must disable QSPI driver, because M4 run on QSPI */
	#elif defined CONFIG_SYS_BOOT_QSPI
	#define CONFIG_SYS_USE_QSPI
	#define CONFIG_ENV_IS_IN_SPI_FLASH
	#else
	#define CONFIG_SYS_USE_QSPI /* Enable the QSPI flash at default */
	#define CONFIG_ENV_IS_IN_MMC
	#endif

	#ifdef CONFIG_SYS_USE_QSPI
	#define CONFIG_QSPI /* enable the QUADSPI driver */
	#define CONFIG_QSPI_BASE QSPI2_BASE_ADDR
	#define CONFIG_QSPI_MEMMAP_BASE QSPI2_ARB_BASE_ADDR

	#define CONFIG_CMD_SF
	#define CONFIG_SPI_FLASH
	#define CONFIG_SPI_FLASH_BAR
	#define CONFIG_SPI_FLASH_SPANSION
	#define CONFIG_SPI_FLASH_STMICRO
	#define CONFIG_SF_DEFAULT_BUS 0
	#define CONFIG_SF_DEFAULT_CS 0
	#define CONFIG_SF_DEFAULT_SPEED 40000000
	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	#endif

	#define CONFIG_SYS_MMC_ENV_DEV 2 /USDHC4/
	#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
	#define CONFIG_MMCROOT "/dev/mmcblk3p2" /* USDHC4 */

	#if defined(CONFIG_ENV_IS_IN_MMC)
	#define CONFIG_ENV_OFFSET (8 * SZ_64K)
	#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
	#define CONFIG_ENV_OFFSET (768 * 1024)
	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	#endif


	#define CONFIG_OF_LIBFDT
	#define CONFIG_CMD_BOOTZ

	#define CONFIG_CMD_BMODE

	#ifndef CONFIG_SYS_DCACHE_OFF
	#define CONFIG_CMD_CACHE
	#endif

	#ifdef CONFIG_VIDEO
	#define CONFIG_CFB_CONSOLE
	#define CONFIG_VIDEO_MXS
	#define CONFIG_VIDEO_LOGO
	#define CONFIG_VIDEO_SW_CURSOR
	#define CONFIG_VGA_AS_SINGLE_DEVICE
	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	#define CONFIG_SPLASH_SCREEN
	#define CONFIG_SPLASH_SCREEN_ALIGN
	#define CONFIG_CMD_BMP
	#define CONFIG_BMP_16BPP
	#define CONFIG_VIDEO_BMP_RLE8
	#define CONFIG_VIDEO_BMP_LOGO
	#ifdef CONFIG_VIDEO_GIS
	#define CONFIG_VIDEO_CSI
	#define CONFIG_VIDEO_PXP
	#define CONFIG_VIDEO_VADC
	#endif
	#endif

	#define CONFIG_CMD_USB
	#define CONFIG_USB_EHCI
	#define CONFIG_USB_EHCI_MX6
	#define CONFIG_USB_STORAGE
	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	#define CONFIG_USB_HOST_ETHER
	#define CONFIG_USB_ETHER_ASIX
	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	#define CONFIG_MXC_USB_FLAGS 0
	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

	/*
	* The PCIe support in uboot would bring failures in i.MX6SX PCIe
	* EP/RC validations. Disable PCIe support in uboot here.
	* RootCause: The bit10(ltssm_en) of GPR12 would be set in uboot,
	* thus the i.MX6SX PCIe EP would be cheated that the other i.MX6SX
	* PCIe RC had been configured and trying to setup PCIe link directly,
	* although the i.MX6SX RC is not properly configured at that time.
	* PCIe can be supported in uboot, if the i.MX6SX PCIe EP/RC validation
	* is not running.
	*/
	/* #define CONFIG_CMD_PCI */
	#ifdef CONFIG_CMD_PCI
	#define CONFIG_PCI
	#define CONFIG_PCI_PNP
	#define CONFIG_PCI_SCAN_SHOW
	#define CONFIG_PCIE_IMX
	#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
	#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
	#endif

	#if defined(CONFIG_ANDROID_SUPPORT)
	#include "mx6sxsabresdandroid.h"
	#endif

	#endif /* __CONFIG_H */