* Freescale VF610 PORT/GPIO module

The Freescale PORT/GPIO modules are two adjacent modules providing GPIO
functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of
each, and each PORT module has its own interrupt.

Required properties for GPIO node:
- compatible : Should be "fsl,<soc>-gpio", below is supported list:
	       "fsl,vf610-gpio"
	       "fsl,imx7ulp-gpio"
- reg : The first reg tuple represents the PORT module, the second tuple
  the GPIO module.
- interrupts : Should be the port interrupt shared by all 32 pins.
- gpio-controller : Marks the device node as a gpio controller.
- #gpio-cells : Should be two. The first cell is the pin number and
  the second cell is used to specify the gpio polarity:
      0 = active high
      1 = active low
- interrupt-controller: Marks the device node as an interrupt controller.
- #interrupt-cells : Should be 2.  The first cell is the GPIO number.
  The second cell bits[3:0] is used to specify trigger type and level flags:
      1 = low-to-high edge triggered.
      2 = high-to-low edge triggered.
      4 = active high level-sensitive.
      8 = active low level-sensitive.

Note: Each GPIO port should have an alias correctly numbered in "aliases"
node.

Optional properties:
- clocks	: phandle + clock specifier pairs, one for each entry in
		  clock-names.
- clock-names	: should contain: "port" - the Port module clock and
		  "gpio" - the GPIO module clock.

Examples:

aliases {
	gpio0 = &gpio1;
	gpio1 = &gpio2;
};

gpio1: gpio@40049000 {
	compatible = "fsl,vf610-gpio";
	reg = <0x40049000 0x1000 0x400ff000 0x40>;
	interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
	gpio-controller;
	#gpio-cells = <2>;
	interrupt-controller;
	#interrupt-cells = <2>;
	gpio-ranges = <&iomuxc 0 0 32>;
};

gpio2: gpio@4004a000 {
	compatible = "fsl,vf610-gpio";
	reg = <0x4004a000 0x1000 0x400ff040 0x40>;
	interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
	gpio-controller;
	#gpio-cells = <2>;
	interrupt-controller;
	#interrupt-cells = <2>;
	gpio-ranges = <&iomuxc 0 32 32>;
};