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Abilis Systems TB10x pin controller
Required properties
- compatible: should be "abilis,tb10x-iomux";
- reg: should contain the physical address and size of the pin controller's
register range.
Function definitions
Functions are defined (and referenced) by sub-nodes of the pin controller.
Every sub-node defines exactly one function (implying a set of pins).
Every function is associated to one named pin group inside the pin controller
driver and these names are used to associate pin group predefinitions to pin
controller sub-nodes.
Required function definition subnode properties:
- abilis,function: should be set to the name of the function's pin group.
The following pin groups are available:
- GPIO ports: gpioa, gpiob, gpioc, gpiod, gpioe, gpiof, gpiog,
gpioh, gpioi, gpioj, gpiok, gpiol, gpiom, gpion
- Serial TS input ports: mis0, mis1, mis2, mis3, mis4, mis5, mis6, mis7
- Parallel TS input ports: mip1, mip3, mip5, mip7
- Serial TS output ports: mos0, mos1, mos2, mos3
- Parallel TS output port: mop
- CI+ port: ciplus
- CableCard (Mcard) port: mcard
- Smart card ports: stc0, stc1
- UART ports: uart0, uart1
- SPI ports: spi1, spi3
- JTAG: jtag
All other ports of the chip are not multiplexed and thus not managed by this
GPIO ranges definition
The named pin groups of GPIO ports can be used to define GPIO ranges as
explained in Documentation/devicetree/bindings/gpio/gpio.txt.
iomux: iomux@FF10601c {
compatible = "abilis,tb10x-iomux";
reg = <0xFF10601c 0x4>;
pctl_gpio_a: pctl-gpio-a {
abilis,function = "gpioa";
pctl_uart0: pctl-uart0 {
abilis,function = "uart0";
uart@FF100000 {
compatible = "snps,dw-apb-uart";
reg = <0xFF100000 0x100>;
clock-frequency = <166666666>;
interrupts = <25 1>;
reg-shift = <2>;
reg-io-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pctl_uart0>;
gpioa: gpio@FF140000 {
compatible = "abilis,tb10x-gpio";
reg = <0xFF140000 0x1000>;
#gpio-cells = <2>;
ngpio = <3>;
gpio-ranges = <&iomux 0 0>;
gpio-ranges-group-names = "gpioa";