* Freescale i.MX ci13xxx usb controllers

Required properties:
- compatible: Should be "fsl,imx27-usb"
- reg: Should contain registers location and length
- interrupts: Should contain controller interrupt
- fsl,usbphy: phandle of usb phy that connects to the port

Recommended properies:
- phy_type: the type of the phy connected to the core. Should be one
  of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
  property the PORTSC register won't be touched
- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"

Optional properties:
- fsl,usbmisc: phandler of non-core register device, with one argument
  that indicate usb controller index
- vbus-supply: regulator for vbus
- disable-over-current: disable over current detect
- external-vbus-divider: enables off-chip resistor divider for Vbus
- imx-usb-charger-detection: enable imx usb charger detect function,
  only set it when the user wants SoC usb charger detection capabilities.
  If the user wants to use charger IC's usb charger detection capabilities,
  please do not set it.
- fsl,anatop: phandle for anatop module, anatop module is only existed
  at imx6 SoC series.
- pinctrl-names: for names of hsic pin group
- pinctrl-0: hsic "idle" pin group
- pinctrl-1: hsic "active" pin group
- osc-clkgate-delay: the delay between powering up the xtal 24MHz clock
  and release the clock to the digital logic inside the analog block,
  0 <= osc-clkgate-delay <= 7.
- maximum-speed: limit the maximum connection speed to "full-speed".
- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
- phy-clkgate-delay-us: the delay time(us) between putting phy into low power
  mode and gate phy clock.

Examples:
usb@02184000 { /* USB OTG */
	compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
	reg = <0x02184000 0x200>;
	interrupts = <0 43 0x04>;
	fsl,usbphy = <&usbphy1>;
	fsl,usbmisc = <&usbmisc 0>;
	disable-over-current;
	external-vbus-divider;
	imx-usb-charger-detection;
	fsl,anatop = <&anatop>;
	pinctrl-names = "idle", "active";
	pinctrl-0 = <&pinctrl_usbh2_1>;
	pinctrl-1 = <&pinctrl_usbh2_2>;
	osc-clkgate-delay = <0x3>;
	maximum-speed = "full-speed";
	tpl-support;
	phy-clkgate-delay-us = <400>;
};