* Samsung SPI Controller

The Samsung SPI controller is used to interface with various devices such as flash
and display controllers using the SPI communication interface.

Required SoC Specific Properties:

- compatible: should be one of the following.
    - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
    - samsung,s3c6410-spi: for s3c6410 platforms
    - samsung,s5p6440-spi: for s5p6440 and s5p6450 platforms
    - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
    - samsung,exynos4210-spi: for exynos4 and exynos5 platforms

- reg: physical base address of the controller and length of memory mapped
  region.

- interrupts: The interrupt number to the cpu. The interrupt specifier format
  depends on the interrupt controller.

[PRELIMINARY: the dma channel allocation will change once there are
official DMA bindings]

- tx-dma-channel: The dma channel specifier for tx operations. The format of
  the dma specifier depends on the dma controller.

- rx-dma-channel: The dma channel specifier for rx operations. The format of
  the dma specifier depends on the dma controller.

Required Board Specific Properties:

- #address-cells: should be 1.
- #size-cells: should be 0.

Optional Board Specific Properties:

- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
  select the clock source for the spi bus clock, this property can be used to
  indicate the clock to be used for driving the spi bus clock. If not specified,
  the clock number 0 is used as default.

- num-cs: Specifies the number of chip select lines supported. If
  not specified, the default number of chip select lines is set to 1.

SPI Controller specific data in SPI slave nodes:

- The spi slave nodes should provide the following information which is required
  by the spi controller.

  - cs-gpio: A gpio specifier that specifies the gpio line used as
    the slave select line by the spi controller. The format of the gpio
    specifier depends on the gpio controller.

  - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
    miso line (to account for any lag in the miso line). The following are the
    valid values.

      - 0: No phase shift.
      - 1: 90 degree phase shift sampling.
      - 2: 180 degree phase shift sampling.
      - 3: 270 degree phase shift sampling.

Aliases:

- All the SPI controller nodes should be represented in the aliases node using
  the following format 'spi{n}' where n is a unique number for the alias.


Example:

- SoC Specific Portion:

	spi_0: spi@12d20000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x12d20000 0x100>;
		interrupts = <0 66 0>;
		tx-dma-channel = <&pdma0 5>;
		rx-dma-channel = <&pdma0 4>;
	};

- Board Specific Portion:

	spi_0: spi@12d20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&spi0_bus>;

		w25q80bw@0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "w25x80";
			reg = <0>;
			spi-max-frequency = <10000>;

			controller-data {
				cs-gpio = <&gpa2 5 1 0 3>;
				samsung,spi-feedback-delay = <0>;
			};

			partition@0 {
				label = "U-Boot";
				reg = <0x0 0x40000>;
				read-only;
			};

			partition@40000 {
				label = "Kernel";
				reg = <0x40000 0xc0000>;
			};
		};
	};