/*
 * Copyright (C) 2016 Nest Labs, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include "onyx-ffd.dts"

/ {
	model = "NestLabs Onyx Proto Board";
	compatible = "nestlabs,onyx-proto", "fsl,imx6ul";

	aliases {
		serial-ble0 = &uart2;
		serial-sensormcu0 = &uart3;
	};

	/* Overlay the magwheel driver instead of the default ADC driver */
	soc {
		aips-bus@02100000 {
			magwheel: adc@02198000 {
				compatible = "nestlabs,vf610-adc-magwheel";
				pinctrl-0 = <&pinctrl_adc1>;
				vref-supply = <&adc_ref>;
				reg = <0x02198000 0x4000>;
				interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX6UL_CLK_ADC1>;
				nestlabs,adc-channels-used = <6 7>;
				nestlabs,adc-channel-midpoints = <1965 2038>;
				hall-sensor-enable-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
				status = "okay";
				#io-channel-cells = <1>;
			};
		};
	};
};

&em35x_gpios {
	output-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>,
	               <&gpio2 2 GPIO_ACTIVE_HIGH>;
	input-gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
};

&pinctrl_em35x_gpios {
	fsl,pins = <
		MX6UL_PAD_SD1_DATA1__GPIO2_IO19         PAD_CONFIG__GPIO        /* 6LO_RESET_L */
		MX6UL_PAD_SD1_DATA0__GPIO2_IO18         PAD_CONFIG__GPIO        /* INT_6LO_TO_AP */
		MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02       PAD_CONFIG__GPIO        /* INT_AP_TO_6LO */
	>;
};

&pinctrl_hog_extra {
	fsl,pins = <
		MX6UL_PAD_SD1_DATA2__CCM_CLKO1          PAD_CONFIG__DEFAULT     /* CLK_32K_AP_OUT_TP */
		MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10       PAD_CONFIG__GPIO        /* RAM_PWR_EN_L */
	>;
};

&battery {
	io-channels = <&magwheel 4>; /* GPIO01_IO4 */
	io-channel-names = "vbat";
	vbatt-adc-input-enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
	divider-r1-ohm = <715>; /* 71.5k */
	divider-r2-ohm = <511>; /* 51.1k */
	delay-us = <8000>;
};

&adc_ref{
	 regulator-min-microvolt = <1800000>;
	 regulator-max-microvolt = <1800000>;
};

&iomuxc {
	adc1 {
		pinctrl_adc1: adc1grp {
			fsl,pins = <
			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04        PAD_CONFIG__ADC         /* ADC_VBAT_AP */
			MX6UL_PAD_GPIO1_IO06__GPIO1_IO06        PAD_CONFIG__ADC         /* ADC_MAG_1 */
			MX6UL_PAD_GPIO1_IO07__GPIO1_IO07        PAD_CONFIG__ADC         /* ADC_MAG_2 */
			MX6UL_PAD_SD1_DATA3__GPIO2_IO21         PAD_CONFIG__GPIO        /* AP_HEF_EN */
			>;
		  };
	};
};