/*
 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/dts-v1/;

#include <dt-bindings/mrc/quark.h>

/include/ "skeleton.dtsi"

/ {
	model = "Intel Galileo";
	compatible = "intel,galileo", "intel,quark";

	config {
		silent_console = <0>;
	};

	chosen {
		stdout-path = &pciuart0;
	};

	mrc {
		compatible = "intel,quark-mrc";
		flags = <MRC_FLAG_SCRAMBLE_EN>;
		dram-width = <DRAM_WIDTH_X8>;
		dram-speed = <DRAM_FREQ_800>;
		dram-type = <DRAM_TYPE_DDR3>;
		rank-mask = <DRAM_RANK(0)>;
		chan-mask = <DRAM_CHANNEL(0)>;
		chan-width = <DRAM_CHANNEL_WIDTH_X16>;
		addr-mode = <DRAM_ADDR_MODE0>;
		refresh-rate = <DRAM_REFRESH_RATE_785US>;
		sr-temp-range = <DRAM_SRT_RANGE_NORMAL>;
		ron-value = <DRAM_RON_34OHM>;
		rtt-nom-value = <DRAM_RTT_NOM_120OHM>;
		rd-odt-value = <DRAM_RD_ODT_OFF>;
		dram-density = <DRAM_DENSITY_1G>;
		dram-cl = <6>;
		dram-ras = <0x0000927c>;
		dram-wtr = <0x00002710>;
		dram-rrd = <0x00002710>;
		dram-faw = <0x00009c40>;
	};

	pci {
		#address-cells = <3>;
		#size-cells = <2>;
		compatible = "intel,pci";
		device_type = "pci";

		pciuart0: uart@14,5 {
			compatible = "pci8086,0936.00",
					"pci8086,0936",
					"pciclass,070002",
					"pciclass,0700",
					"x86-uart";
			reg = <0x0000a500 0x0 0x0 0x0 0x0
			       0x0200a510 0x0 0x0 0x0 0x0>;
			reg-shift = <2>;
			clock-frequency = <44236800>;
			current-speed = <115200>;
		};
	};

	gpioa {
		compatible = "intel,ich6-gpio";
		u-boot,dm-pre-reloc;
		reg = <0 0x20>;
		bank-name = "A";
	};

	gpiob {
		compatible = "intel,ich6-gpio";
		u-boot,dm-pre-reloc;
		reg = <0x20 0x20>;
		bank-name = "B";
	};

	spi {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "intel,ich-spi";
		spi-flash@0 {
			#size-cells = <1>;
			#address-cells = <1>;
			reg = <0>;
			compatible = "winbond,w25q64", "spi-flash";
			memory-map = <0xff800000 0x00800000>;
		};
	};

};