| DT bindings for the R-/SH-Mobile irqpin controller |
| |
| Required properties: |
| |
| - compatible: has to be "renesas,intc-irqpin-<soctype>", "renesas,intc-irqpin" |
| as fallback. |
| Examples with soctypes are: |
| - "renesas,intc-irqpin-r8a7740" (R-Mobile A1) |
| - "renesas,intc-irqpin-r8a7778" (R-Car M1A) |
| - "renesas,intc-irqpin-r8a7779" (R-Car H1) |
| - "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5) |
| |
| - reg: Base address and length of each register bank used by the external |
| IRQ pins driven by the interrupt controller hardware module. The base |
| addresses, length and number of required register banks varies with soctype. |
| |
| - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in |
| interrupts.txt in this directory |
| |
| Optional properties: |
| |
| - any properties, listed in interrupts.txt, and any standard resource allocation |
| properties |
| - sense-bitfield-width: width of a single sense bitfield in the SENSE register, |
| if different from the default 4 bits |
| - control-parent: disable and enable interrupts on the parent interrupt |
| controller, needed for some broken implementations |
