blob: 1540526a61348eb1959a6f6864b135c648adcbd6 [file] [log] [blame]
/*
* (C) Copyright 2010-2013
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/gp_padctrl.h>
#include <asm/arch/gpio.h>
#include <asm/gpio.h>
#include "pinmux-config-cardhu.h"
#include <i2c.h>
#include <netdev.h>
#define PMU_I2C_ADDRESS 0x2D
#define MAX_I2C_RETRY 3
/*
* Routine: pinmux_init
* Description: Do individual peripheral pinmux configs
*/
void pinmux_init(void)
{
pinmux_config_pingrp_table(tegra3_pinmux_common,
ARRAY_SIZE(tegra3_pinmux_common));
pinmux_config_pingrp_table(unused_pins_lowpower,
ARRAY_SIZE(unused_pins_lowpower));
/* Initialize any non-default pad configs (APB_MISC_GP regs) */
pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
}
#if defined(CONFIG_TEGRA_MMC)
/*
* Do I2C/PMU writes to bring up SD card bus power
*
*/
void board_sdmmc_voltage_init(void)
{
struct udevice *dev;
uchar reg, data_buffer[1];
int ret;
int i;
ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
if (ret) {
debug("%s: Cannot find PMIC I2C chip\n", __func__);
return;
}
/* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 */
data_buffer[0] = 0x65;
reg = 0x32;
for (i = 0; i < MAX_I2C_RETRY; ++i) {
if (dm_i2c_write(dev, reg, data_buffer, 1))
udelay(100);
}
/* TPS659110: GPIO7_REG = PDEN, output a 1 to EN_3V3_SYS */
data_buffer[0] = 0x09;
reg = 0x67;
for (i = 0; i < MAX_I2C_RETRY; ++i) {
if (dm_i2c_write(dev, reg, data_buffer, 1))
udelay(100);
}
}
/*
* Routine: pin_mux_mmc
* Description: setup the MMC muxes, power rails, etc.
*/
void pin_mux_mmc(void)
{
/*
* NOTE: We don't do mmc-specific pin muxes here.
* They were done globally in pinmux_init().
*/
/* Bring up the SDIO1 power rail */
board_sdmmc_voltage_init();
}
#endif /* MMC */
#ifdef CONFIG_PCI_TEGRA
int tegra_pcie_board_init(void)
{
struct udevice *dev;
u8 addr, data[1];
int err;
err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
if (err) {
debug("failed to find PMU bus\n");
return err;
}
/* TPS659110: LDO1_REG = 1.05V, ACTIVE */
data[0] = 0x15;
addr = 0x30;
err = dm_i2c_write(dev, addr, data, 1);
if (err) {
debug("failed to set VDD supply\n");
return err;
}
/* GPIO: PEX = 3.3V */
err = gpio_request(GPIO_PL7, "PEX");
if (err < 0)
return err;
gpio_direction_output(GPIO_PL7, 1);
/* TPS659110: LDO2_REG = 1.05V, ACTIVE */
data[0] = 0x15;
addr = 0x31;
err = dm_i2c_write(dev, addr, data, 1);
if (err) {
debug("failed to set AVDD supply\n");
return err;
}
return 0;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
#endif /* PCI */