| /* |
| * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> |
| * (C) Copyright 2013 Xilinx, Inc. |
| * |
| * Common configuration options for all Zynq boards. |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #ifndef __CONFIG_ZYNQ_COMMON_H |
| #define __CONFIG_ZYNQ_COMMON_H |
| |
| /* CPU clock */ |
| #ifndef CONFIG_CPU_FREQ_HZ |
| # define CONFIG_CPU_FREQ_HZ 800000000 |
| #endif |
| |
| /* Cache options */ |
| #define CONFIG_CMD_CACHE |
| #define CONFIG_SYS_CACHELINE_SIZE 32 |
| |
| #define CONFIG_SYS_L2CACHE_OFF |
| #ifndef CONFIG_SYS_L2CACHE_OFF |
| # define CONFIG_SYS_L2_PL310 |
| # define CONFIG_SYS_PL310_BASE 0xf8f02000 |
| #endif |
| |
| #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 |
| #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR |
| #define CONFIG_SYS_TIMER_COUNTS_DOWN |
| #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) |
| |
| /* Serial drivers */ |
| #define CONFIG_BAUDRATE 115200 |
| /* The following table includes the supported baudrates */ |
| #define CONFIG_SYS_BAUDRATE_TABLE \ |
| {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} |
| |
| /* DCC driver */ |
| #if defined(CONFIG_ZYNQ_DCC) |
| # define CONFIG_ARM_DCC |
| #else |
| # define CONFIG_ZYNQ_SERIAL |
| #endif |
| |
| #define CONFIG_ZYNQ_GPIO |
| |
| /* Ethernet driver */ |
| #if defined(CONFIG_ZYNQ_GEM) |
| # define CONFIG_MII |
| # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
| # define CONFIG_PHY_MARVELL |
| # define CONFIG_BOOTP_SERVERIP |
| # define CONFIG_BOOTP_BOOTPATH |
| # define CONFIG_BOOTP_GATEWAY |
| # define CONFIG_BOOTP_HOSTNAME |
| # define CONFIG_BOOTP_MAY_FAIL |
| #endif |
| |
| /* SPI */ |
| #ifdef CONFIG_ZYNQ_SPI |
| # define CONFIG_CMD_SF |
| #endif |
| |
| /* QSPI */ |
| #ifdef CONFIG_ZYNQ_QSPI |
| # define CONFIG_SF_DEFAULT_SPEED 30000000 |
| # define CONFIG_SPI_FLASH_ISSI |
| # define CONFIG_SPI_FLASH_BAR |
| # define CONFIG_CMD_SF |
| #endif |
| |
| /* NOR */ |
| #ifndef CONFIG_SYS_NO_FLASH |
| # define CONFIG_SYS_FLASH_BASE 0xE2000000 |
| # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) |
| # define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| # define CONFIG_SYS_MAX_FLASH_SECT 512 |
| # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 |
| # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 |
| # define CONFIG_FLASH_SHOW_PROGRESS 10 |
| # define CONFIG_SYS_FLASH_CFI |
| # undef CONFIG_SYS_FLASH_EMPTY_INFO |
| # define CONFIG_FLASH_CFI_DRIVER |
| # undef CONFIG_SYS_FLASH_PROTECTION |
| # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
| #endif |
| |
| /* MMC */ |
| #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) |
| # define CONFIG_MMC |
| # define CONFIG_GENERIC_MMC |
| # define CONFIG_SDHCI |
| # define CONFIG_ZYNQ_SDHCI |
| # define CONFIG_CMD_MMC |
| # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 |
| #endif |
| |
| #ifdef CONFIG_ZYNQ_USB |
| # define CONFIG_USB_EHCI |
| # define CONFIG_CMD_USB |
| # define CONFIG_USB_STORAGE |
| # define CONFIG_USB_EHCI_ZYNQ |
| # define CONFIG_USB_ULPI_VIEWPORT |
| # define CONFIG_USB_ULPI |
| # define CONFIG_EHCI_IS_TDI |
| # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| |
| # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ |
| # define CONFIG_USB_GADGET |
| # define CONFIG_USB_GADGET_DUALSPEED |
| # define CONFIG_USB_GADGET_DOWNLOAD |
| # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 |
| # define DFU_DEFAULT_POLL_TIMEOUT 300 |
| # define CONFIG_USB_FUNCTION_DFU |
| # define CONFIG_DFU_RAM |
| # define CONFIG_USB_GADGET_VBUS_DRAW 2 |
| # define CONFIG_G_DNL_VENDOR_NUM 0x03FD |
| # define CONFIG_G_DNL_PRODUCT_NUM 0x0300 |
| # define CONFIG_G_DNL_MANUFACTURER "Xilinx" |
| # define CONFIG_USB_GADGET |
| # define CONFIG_USB_CABLE_CHECK |
| # define CONFIG_CMD_DFU |
| # define CONFIG_CMD_THOR_DOWNLOAD |
| # define CONFIG_USB_FUNCTION_THOR |
| # define DFU_ALT_INFO_RAM \ |
| "dfu_ram_info=" \ |
| "set dfu_alt_info " \ |
| "${kernel_image} ram 0x3000000 0x500000\\\\;" \ |
| "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ |
| "${ramdisk_image} ram 0x2000000 0x600000\0" \ |
| "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ |
| "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" |
| |
| # if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) |
| # define CONFIG_DFU_MMC |
| # define DFU_ALT_INFO_MMC \ |
| "dfu_mmc_info=" \ |
| "set dfu_alt_info " \ |
| "${kernel_image} fat 0 1\\\\;" \ |
| "${devicetree_image} fat 0 1\\\\;" \ |
| "${ramdisk_image} fat 0 1\0" \ |
| "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ |
| "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" |
| |
| # define DFU_ALT_INFO \ |
| DFU_ALT_INFO_RAM \ |
| DFU_ALT_INFO_MMC |
| # else |
| # define DFU_ALT_INFO \ |
| DFU_ALT_INFO_RAM |
| # endif |
| #endif |
| |
| #if !defined(DFU_ALT_INFO) |
| # define DFU_ALT_INFO |
| #endif |
| |
| #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) |
| # define CONFIG_SUPPORT_VFAT |
| # define CONFIG_CMD_FAT |
| # define CONFIG_CMD_EXT2 |
| # define CONFIG_FAT_WRITE |
| # define CONFIG_DOS_PARTITION |
| # define CONFIG_CMD_EXT4 |
| # define CONFIG_CMD_EXT4_WRITE |
| # define CONFIG_CMD_FS_GENERIC |
| #endif |
| |
| #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) |
| #define CONFIG_SYS_I2C_ZYNQ |
| #endif |
| |
| /* I2C */ |
| #if defined(CONFIG_SYS_I2C_ZYNQ) |
| # define CONFIG_CMD_I2C |
| # define CONFIG_SYS_I2C |
| # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 |
| # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 |
| #endif |
| |
| /* EEPROM */ |
| #ifdef CONFIG_ZYNQ_EEPROM |
| # define CONFIG_CMD_EEPROM |
| # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 |
| # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 |
| # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 |
| # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ |
| #endif |
| |
| /* Total Size of Environment Sector */ |
| #define CONFIG_ENV_SIZE (128 << 10) |
| |
| /* Allow to overwrite serial and ethaddr */ |
| #define CONFIG_ENV_OVERWRITE |
| |
| /* Environment */ |
| #ifndef CONFIG_ENV_IS_NOWHERE |
| # ifndef CONFIG_SYS_NO_FLASH |
| # define CONFIG_ENV_IS_IN_FLASH |
| # elif defined(CONFIG_SYS_NO_FLASH) |
| # define CONFIG_ENV_IS_NOWHERE |
| # endif |
| |
| # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE |
| # define CONFIG_ENV_OFFSET 0xE0000 |
| #endif |
| |
| /* Default environment */ |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| "fit_image=fit.itb\0" \ |
| "load_addr=0x2000000\0" \ |
| "fit_size=0x800000\0" \ |
| "flash_off=0x100000\0" \ |
| "nor_flash_off=0xE2100000\0" \ |
| "fdt_high=0x20000000\0" \ |
| "initrd_high=0x20000000\0" \ |
| "norboot=echo Copying FIT from NOR flash to RAM... && " \ |
| "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ |
| "bootm ${load_addr}\0" \ |
| "sdboot=echo Copying FIT from SD to RAM... && " \ |
| "load mmc 0 ${load_addr} ${fit_image} && " \ |
| "bootm ${load_addr}\0" \ |
| "jtagboot=echo TFTPing FIT to RAM... && " \ |
| "tftpboot ${load_addr} ${fit_image} && " \ |
| "bootm ${load_addr}\0" \ |
| "usbboot=if usb start; then " \ |
| "echo Copying FIT from USB to RAM... && " \ |
| "load usb 0 ${load_addr} ${fit_image} && " \ |
| "bootm ${load_addr}\0" \ |
| "fi\0" \ |
| DFU_ALT_INFO |
| |
| #define CONFIG_BOOTCOMMAND "run $modeboot" |
| #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ |
| #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ |
| |
| /* Miscellaneous configurable options */ |
| #define CONFIG_SYS_HUSH_PARSER |
| |
| #define CONFIG_CMDLINE_EDITING |
| #define CONFIG_AUTO_COMPLETE |
| #define CONFIG_BOARD_LATE_INIT |
| #define CONFIG_DISPLAY_BOARDINFO |
| #define CONFIG_SYS_LONGHELP |
| #define CONFIG_CLOCKS |
| #define CONFIG_CMD_CLK |
| #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| sizeof(CONFIG_SYS_PROMPT) + 16) |
| |
| /* Physical Memory map */ |
| #define CONFIG_SYS_TEXT_BASE 0x4000000 |
| |
| #define CONFIG_NR_DRAM_BANKS 1 |
| #define CONFIG_SYS_SDRAM_BASE 0 |
| |
| #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) |
| |
| #define CONFIG_SYS_MALLOC_LEN 0x1400000 |
| #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE |
| #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN |
| #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| CONFIG_SYS_INIT_RAM_SIZE - \ |
| GENERATED_GBL_DATA_SIZE) |
| |
| /* Enable the PL to be downloaded */ |
| #define CONFIG_FPGA |
| #define CONFIG_FPGA_XILINX |
| #define CONFIG_FPGA_ZYNQPL |
| #define CONFIG_CMD_FPGA_LOADMK |
| #define CONFIG_CMD_FPGA_LOADP |
| #define CONFIG_CMD_FPGA_LOADBP |
| #define CONFIG_CMD_FPGA_LOADFS |
| |
| /* Open Firmware flat tree */ |
| #define CONFIG_OF_LIBFDT |
| |
| /* FIT support */ |
| #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ |
| |
| /* FDT support */ |
| #define CONFIG_DISPLAY_BOARDINFO_LATE |
| |
| /* Extend size of kernel image for uncompression */ |
| #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) |
| |
| /* Boot FreeBSD/vxWorks from an ELF image */ |
| #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) |
| # define CONFIG_SYS_MMC_MAX_DEVICE 1 |
| #endif |
| |
| #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" |
| |
| /* Commands */ |
| #define CONFIG_CMD_PING |
| #define CONFIG_CMD_DHCP |
| #define CONFIG_CMD_MII |
| #define CONFIG_CMD_TFTPPUT |
| |
| /* SPL part */ |
| #define CONFIG_CMD_SPL |
| #define CONFIG_SPL_FRAMEWORK |
| #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| #define CONFIG_SPL_SERIAL_SUPPORT |
| #define CONFIG_SPL_BOARD_INIT |
| |
| #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" |
| |
| /* MMC support */ |
| #ifdef CONFIG_ZYNQ_SDHCI0 |
| #define CONFIG_SPL_MMC_SUPPORT |
| #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ |
| #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ |
| #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
| #define CONFIG_SPL_LIBDISK_SUPPORT |
| #define CONFIG_SPL_FAT_SUPPORT |
| #ifdef CONFIG_OF_SEPARATE |
| # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" |
| #else |
| # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
| #endif |
| #endif |
| |
| /* Disable dcache for SPL just for sure */ |
| #ifdef CONFIG_SPL_BUILD |
| #define CONFIG_SYS_DCACHE_OFF |
| #undef CONFIG_FPGA |
| #endif |
| |
| /* Address in RAM where the parameters must be copied by SPL. */ |
| #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 |
| |
| #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" |
| #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" |
| |
| /* Not using MMC raw mode - just for compilation purpose */ |
| #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 |
| #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 |
| #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 |
| |
| /* qspi mode is working fine */ |
| #ifdef CONFIG_ZYNQ_QSPI |
| #define CONFIG_SPL_SPI_SUPPORT |
| #define CONFIG_SPL_SPI_LOAD |
| #define CONFIG_SPL_SPI_FLASH_SUPPORT |
| #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 |
| #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 |
| #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 |
| #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ |
| CONFIG_SYS_SPI_ARGS_SIZE) |
| #endif |
| |
| /* for booting directly linux */ |
| #define CONFIG_SPL_OS_BOOT |
| |
| /* SP location before relocation, must use scratch RAM */ |
| #define CONFIG_SPL_TEXT_BASE 0x0 |
| |
| /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ |
| #define CONFIG_SPL_MAX_SIZE 0x30000 |
| |
| /* The highest 64k OCM address */ |
| #define OCM_HIGH_ADDR 0xffff0000 |
| |
| /* On the top of OCM space */ |
| #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR |
| #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 |
| |
| /* |
| * SPL stack position - and stack goes down |
| * 0xfffffe00 is used for putting wfi loop. |
| * Set it up as limit for now. |
| */ |
| #define CONFIG_SPL_STACK 0xfffffe00 |
| |
| /* BSS setup */ |
| #define CONFIG_SPL_BSS_START_ADDR 0x100000 |
| #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 |
| |
| #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE |
| |
| |
| #endif /* __CONFIG_ZYNQ_COMMON_H */ |
