| /* |
| * Copyright (C) 2018 Advanced Micro Devices, Inc. |
| * |
| * Permission is hereby granted, free of charge, to any person obtaining a |
| * copy of this software and associated documentation files (the "Software"), |
| * to deal in the Software without restriction, including without limitation |
| * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| * and/or sell copies of the Software, and to permit persons to whom the |
| * Software is furnished to do so, subject to the following conditions: |
| * |
| * The above copyright notice and this permission notice shall be included |
| * in all copies or substantial portions of the Software. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN |
| * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| */ |
| #ifndef _mmhub_9_4_0_OFFSET_HEADER |
| #define _mmhub_9_4_0_OFFSET_HEADER |
| |
| /* MMEA */ |
| #define mmMMEA0_SDP_ARB_FINAL_VG20 0x01ee |
| #define mmMMEA0_SDP_ARB_FINAL_VG20_BASE_IDX 0 |
| #define mmMMEA0_EDC_CNT_VG20 0x0206 |
| #define mmMMEA0_EDC_CNT_VG20_BASE_IDX 0 |
| #define mmMMEA0_EDC_CNT2_VG20 0x0207 |
| #define mmMMEA0_EDC_CNT2_VG20_BASE_IDX 0 |
| #define mmMMEA0_EDC_MODE_VG20 0x0210 |
| #define mmMMEA0_EDC_MODE_VG20_BASE_IDX 0 |
| #define mmMMEA0_ERR_STATUS_VG20 0x0211 |
| #define mmMMEA0_ERR_STATUS_VG20_BASE_IDX 0 |
| #define mmMMEA1_SDP_ARB_FINAL_VG20 0x032e |
| #define mmMMEA1_SDP_ARB_FINAL_VG20_BASE_IDX 0 |
| #define mmMMEA1_EDC_CNT_VG20 0x0346 |
| #define mmMMEA1_EDC_CNT_VG20_BASE_IDX 0 |
| #define mmMMEA1_EDC_CNT2_VG20 0x0347 |
| #define mmMMEA1_EDC_CNT2_VG20_BASE_IDX 0 |
| #define mmMMEA1_EDC_MODE_VG20 0x0350 |
| #define mmMMEA1_EDC_MODE_VG20_BASE_IDX 0 |
| #define mmMMEA1_ERR_STATUS_VG20 0x0351 |
| #define mmMMEA1_ERR_STATUS_VG20_BASE_IDX 0 |
| |
| // addressBlock: mmhub_utcl2_vmsharedpfdec |
| // base address: 0x6a040 |
| #define mmMC_VM_XGMI_LFB_CNTL 0x0823 |
| #define mmMC_VM_XGMI_LFB_CNTL_BASE_IDX 0 |
| #define mmMC_VM_XGMI_LFB_SIZE 0x0824 |
| #define mmMC_VM_XGMI_LFB_SIZE_BASE_IDX 0 |
| |
| #endif |
