| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| */ |
| |
| /dts-v1/; |
| |
| #include "meson-c2.dtsi" |
| #include "bsv3-partition.dtsi" |
| |
| / { |
| compatible = "amlogic,c2"; |
| model = "Google Venus B3"; |
| |
| aliases { |
| serial0 = &uart_B; |
| serial1 = &uart_E; /*/dev/ttyS1 for BT */ |
| serial2 = &uart_C; |
| serial3 = &uart_D; |
| serial4 = &uart_A; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| i2c3 = &i2c3; |
| i2c4 = &i2c4; |
| spi0 = &spifc; |
| spi1 = &spicc0; |
| spi2 = &spicc1; |
| tsensor0 = &tsensor; |
| }; |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| memory@0 { |
| device_type = "memory"; |
| linux,usable-memory = <0x0 0x0 0x0 0x80000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| secmon_reserved:linux,secmon { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x800000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x05000000 0x0 0x800000>; |
| }; |
| |
| dsp_fw_reserved:linux,dsp_fw { |
| compatible = "amlogic, aml_dsp_memory"; |
| reusable; |
| size = <0x0 0x900000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x6000000 0x0 0x900000>; |
| }; |
| |
| autocap_reserved:linux,autocap_reserved { |
| compatible = "amlogic, aml_autocap_memory"; |
| status = "disabled"; |
| size = <0x0 0x0>; |
| }; |
| |
| ramoops@0x07400000 { |
| compatible = "ramoops"; |
| reg = <0x0 0x07400000 0x0 0x00100000>; |
| record-size = <0x20000>; |
| console-size = <0x20000>; |
| ftrace-size = <0x80000>; |
| pmsg-size = <0x0>; |
| no-map; |
| }; |
| |
| /* codec shared reserved */ |
| codec_mm_reserved:linux,codec_mm_reserved { |
| compatible = "cnm, MultiEnc-mem"; |
| // TODO: b/329781899 - investigate actual size needed |
| size = <0x0 0x5000000>; |
| alignment = <0x0 0x400000>; |
| }; |
| |
| isp_cma_reserved:linux,isp_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| status = "okay"; |
| size = <0x0 0x5400000>; |
| // 6x RGB24 frame buffer = 6 * 2048 * 2048 * 24 (bits) = 72(MB) |
| // 1x temper2 buffer = 2048 * 2048 * 3 (bytes) = 12(MB) |
| // total: 84 MB |
| alignment = <0x0 0x400000>; |
| }; |
| |
| adapt_cma_reserved:linux,adapt_cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| status = "okay"; |
| size = <0x0 0x2000000>; |
| // 6x dol buffer = 6 * 2048 * 10 / 8 * 2048 = 30(MB) |
| // cma buffer alignment = 2(MB) |
| // total: 32 MB |
| alignment = <0x0 0x400000>; |
| }; |
| |
| ion_cma_reserved:linux,ion-dev { |
| compatible = "ion, private-mem"; |
| size = <0x0 0x8000000>; |
| alignment = <0x0 0x400000>; |
| }; |
| |
| jpegenc_reserved:linux,jpegenc_reserved { |
| compatible = "amlogic, jpegenc-memory"; |
| // To support 2048x2048 |
| // Buffer Needs: 0xe10000 |
| // Eventually, we will switch back to 1600x1600. |
| // For now, this is just for experiment. |
| size = <0x0 0xe10000>; |
| }; |
| |
| }; |
| |
| free_reserved { |
| compatible = "amlogic, free_reserved"; |
| memory-region = <&autocap_reserved>; |
| status = "disabled"; |
| }; |
| |
| codec_mm { |
| compatible = "amlogic, codec, mm"; |
| memory-region = <&codec_mm_reserved>; |
| |
| dev_name = "codec_mm"; |
| status = "okay"; |
| }; |
| |
| main_12v: regulator-main_12v { |
| compatible = "regulator-fixed"; |
| regulator-name = "12V"; |
| regulator-min-microvolt = <12000000>; |
| regulator-max-microvolt = <12000000>; |
| regulator-always-on; |
| }; |
| |
| vcc_5v: regulator-vcc_5v { |
| compatible = "regulator-fixed"; |
| regulator-name = "VCC_5V"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| vin-supply = <&main_12v>; |
| regulator-always-on; |
| }; |
| |
| vddq_1v2: regulator-vddq_1v2 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDDQ_1V2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| vin-supply = <&main_12v>; |
| regulator-always-on; |
| }; |
| |
| vddao_3v3: regulator-vddao_3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDDAO_3V3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&main_12v>; |
| regulator-always-on; |
| }; |
| |
| vcc_3v3: regulator-vcc_3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VCC_3V3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&vddao_3v3>; |
| regulator-always-on; |
| }; |
| |
| vddio_1v8: regulator-vddio_1v8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDDIO_1V8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| vin-supply = <&vddao_3v3>; |
| regulator-always-on; |
| }; |
| |
| vcc_1v8: regulator-vcc_1v8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VCC_1V8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| vin-supply = <&vcc_3v3>; |
| regulator-always-on; |
| }; |
| |
| sdcard_power: regulator-sdcard { |
| status = "disabled"; |
| compatible = "regulator-fixed"; |
| |
| regulator-name = "SDCARD_POWER"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpio = <&gpio GPIOD_5 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-boot-on; |
| }; |
| |
| vddio_card: gpio-regulator { |
| compatible = "regulator-gpio"; |
| |
| regulator-name = "VDDIO_CARD"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| |
| //gpios = <&gpio GPIOC_7 GPIO_ACTIVE_LOW>; |
| gpios-states = <1>; |
| |
| /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ |
| states = <1800000 1 |
| 3300000 0>; |
| }; |
| |
| /* Audio Related start */ |
| pdm_codec:pdm_codec{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, pdm_dummy_codec"; |
| status = "okay"; |
| }; |
| |
| dummy_codec:dummy_codec{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml_dummy_codec"; |
| status = "okay"; |
| }; |
| |
| a1_codec:a1_codec { |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, c2_acodec"; |
| status = "disabled"; |
| reg = <0x0 0xFE004800 0x0 0x20>; |
| tdmout_index = <1>; |
| tdmin_index = <1>; |
| dat0_ch_sel = <0>; |
| dacr_output_inv = <0>; |
| power-domains = <&pwrdm PDID_ACODEC>; |
| }; |
| |
| auge_sound { |
| compatible = "amlogic, a1-sound-card"; |
| aml-audio-card,name = "AML-AUGESOUND"; |
| spk_mute = <&gpio GPIOX_17 GPIO_ACTIVE_LOW>; |
| |
| aml-audio-card,dai-link@0 { |
| format = "i2s";// "dsp_a"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmb>; |
| frame-master = <&tdmb>; |
| /* slave mode */ |
| //bitclock-master = <&tdmbcodec>; |
| //frame-master = <&tdmbcodec>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-i2s"; |
| tdmbcpu: cpu { |
| sound-dai = <&tdmb>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <1155072000>; |
| }; |
| tdmbcodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@1 { |
| mclk-fs = <64>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-pdm"; |
| cpu { |
| sound-dai = <&pdm>; |
| }; |
| codec { |
| sound-dai = <&pdm_codec>; |
| }; |
| }; |
| }; |
| audiolocker: locker { |
| compatible = "amlogic, audiolocker"; |
| clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT |
| &clkaudio CLKID_AUDIO_LOCKER_IN |
| &clkaudio CLKID_AUDIO_MCLK_C |
| &clkaudio CLKID_AUDIO_MCLK_D |
| &clkc CLKID_FCLK_DIV2 |
| &clkc CLKID_FCLK_DIV3>; |
| clock-names = "lock_out", "lock_in", "out_src", |
| "in_src", "out_calc", "in_ref"; |
| interrupts = <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq"; |
| frequency = <49000000>; /* pll */ |
| dividor = <49>; /* locker's parent */ |
| power-domains = <&pwrdm PDID_AUDIO>; |
| status = "okay"; |
| }; |
| /* Audio Related end */ |
| aml_enc { |
| compatible = "cnm, MultiEnc"; |
| dev_name = "amvenc_multi"; |
| status = "okay"; |
| config_mm_sz_mb = <64>; |
| clock_freq_mhz = <400>; |
| clocks = <&clkc CLKID_SYS_DOS |
| &clkc CLKID_DOS_APB |
| &clkc CLKID_WAVE_A_GATE |
| &clkc CLKID_WAVE_B_GATE |
| &clkc CLKID_WAVE_C_GATE>; |
| clock-names = "clk_dos", |
| "clk_apb_dos", |
| "clk_MultiEnc_A", |
| "clk_MultiEnc_B", |
| "clk_MultiEnc_C"; |
| interrupts = <0 58 1 |
| 0 59 1>; |
| interrupt-names = "multienc_irq", |
| "multienc_idle_irq"; |
| #address-cells=<2>; |
| #size-cells=<2>; |
| ranges; |
| io_reg_base { |
| reg = <0x0 0xfe070000 0x0 0x10000>; |
| }; |
| }; |
| sensor: sensor { |
| compatible = "soc, sensor"; |
| status = "okay"; |
| sensor-name = "os04e10"; /*imx290;os08a10;imx227*/ |
| pinctrl-names= "default"; |
| pinctrl-0= <&cmclkout1_pins>; |
| //clocks = <&clkc CLKID_GP_PLL_DIV2_GATE>; |
| clocks = <&clkc CLKID_GP_PLL_MCLK1_GATE>; |
| clock-names = "mclk_0"; |
| reset = <&gpio GPIOA_11 GPIO_ACTIVE_HIGH>; |
| dovdd = <&gpio GPIOA_7 GPIO_ACTIVE_HIGH>;//1.8V |
| dvdd = <&gpio GPIOA_13 GPIO_ACTIVE_HIGH>;//1.2V |
| avdd = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>;//2.8V |
| //ir_cut_gpio = <&gpio GPIOA_10 GPIO_ACTIVE_HIGH |
| // &gpio GPIOA_12 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| iq: iq { |
| compatible = "soc, iq"; |
| status = "okay"; |
| sensor-name = "os04e10"; /*imx290;os08a10;imx227*/ |
| cali-file-path = "/factory/cam_param.txt"; |
| }; |
| |
| aw8637c: aw8637c { |
| compatible = "awinic, aw8637c"; |
| pwm-gpios = <&gpio GPIOD_4 GPIO_ACTIVE_HIGH>, |
| <&gpio GPIOD_3 GPIO_ACTIVE_HIGH>; |
| // Uncomment the line below to skip initializing with 0 when driver probes the chip |
| // skip_init; |
| }; |
| |
| cpu_opp_table0: cpu_opp_table0 { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp00 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp01 { |
| opp-hz = /bits/ 64 <250000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp02 { |
| opp-hz = /bits/ 64 <500000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp03 { |
| opp-hz = /bits/ 64 <667000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp04 { |
| opp-hz = /bits/ 64 <1000000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp05 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <819000>; |
| }; |
| opp06 { |
| opp-hz = /bits/ 64 <1404000000>; |
| opp-microvolt = <849000>; |
| }; |
| opp07 { |
| opp-hz = /bits/ 64 <1500000000>; |
| opp-microvolt = <879000>; |
| }; |
| opp08 { |
| opp-hz = /bits/ 64 <1608000000>; |
| opp-microvolt = <899000>; |
| }; |
| opp09 { |
| opp-hz = /bits/ 64 <1704000000>; |
| opp-microvolt = <919000>; |
| }; |
| opp10 { |
| opp-hz = /bits/ 64 <1800000000>; |
| opp-microvolt = <939000>; |
| }; |
| opp11 { |
| opp-hz = /bits/ 64 <1920000000>; |
| opp-microvolt = <969000>; |
| }; |
| opp12 { |
| opp-hz = /bits/ 64 <2016000000>; |
| opp-microvolt = <989000>; |
| }; |
| }; |
| |
| cpu_opp_table1: cpu_opp_table1 { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp00 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp01 { |
| opp-hz = /bits/ 64 <250000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp02 { |
| opp-hz = /bits/ 64 <500000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp03 { |
| opp-hz = /bits/ 64 <667000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp04 { |
| opp-hz = /bits/ 64 <1000000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp05 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <819000>; |
| }; |
| opp06 { |
| opp-hz = /bits/ 64 <1404000000>; |
| opp-microvolt = <849000>; |
| }; |
| opp07 { |
| opp-hz = /bits/ 64 <1500000000>; |
| opp-microvolt = <879000>; |
| }; |
| opp08 { |
| opp-hz = /bits/ 64 <1608000000>; |
| opp-microvolt = <899000>; |
| }; |
| opp09 { |
| opp-hz = /bits/ 64 <1704000000>; |
| opp-microvolt = <919000>; |
| }; |
| opp10 { |
| opp-hz = /bits/ 64 <1800000000>; |
| opp-microvolt = <939000>; |
| }; |
| opp11 { |
| opp-hz = /bits/ 64 <1920000000>; |
| opp-microvolt = <969000>; |
| }; |
| opp12 { |
| opp-hz = /bits/ 64 <2016000000>; |
| opp-microvolt = <989000>; |
| }; |
| }; |
| |
| cpu_opp_table2: cpu_opp_table2 { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp00 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <729000>; |
| }; |
| opp01 { |
| opp-hz = /bits/ 64 <250000000>; |
| opp-microvolt = <729000>; |
| }; |
| opp02 { |
| opp-hz = /bits/ 64 <500000000>; |
| opp-microvolt = <729000>; |
| }; |
| opp03 { |
| opp-hz = /bits/ 64 <667000000>; |
| opp-microvolt = <729000>; |
| }; |
| opp04 { |
| opp-hz = /bits/ 64 <1000000000>; |
| opp-microvolt = <729000>; |
| }; |
| opp05 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp06 { |
| opp-hz = /bits/ 64 <1404000000>; |
| opp-microvolt = <799000>; |
| }; |
| opp07 { |
| opp-hz = /bits/ 64 <1500000000>; |
| opp-microvolt = <829000>; |
| }; |
| opp08 { |
| opp-hz = /bits/ 64 <1608000000>; |
| opp-microvolt = <849000>; |
| }; |
| opp09 { |
| opp-hz = /bits/ 64 <1704000000>; |
| opp-microvolt = <869000>; |
| }; |
| opp10 { |
| opp-hz = /bits/ 64 <1800000000>; |
| opp-microvolt = <889000>; |
| }; |
| opp11 { |
| opp-hz = /bits/ 64 <1920000000>; |
| opp-microvolt = <919000>; |
| }; |
| opp12 { |
| opp-hz = /bits/ 64 <2016000000>; |
| opp-microvolt = <929000>; |
| }; |
| }; |
| |
| cpu_opp_table3: cpu_opp_table3 { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp00 { |
| opp-hz = /bits/ 64 <100000000>; |
| opp-microvolt = <719000>; |
| }; |
| opp01 { |
| opp-hz = /bits/ 64 <250000000>; |
| opp-microvolt = <719000>; |
| }; |
| opp02 { |
| opp-hz = /bits/ 64 <500000000>; |
| opp-microvolt = <719000>; |
| }; |
| opp03 { |
| opp-hz = /bits/ 64 <667000000>; |
| opp-microvolt = <719000>; |
| }; |
| opp04 { |
| opp-hz = /bits/ 64 <1000000000>; |
| opp-microvolt = <719000>; |
| }; |
| opp05 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <719000>; |
| }; |
| opp06 { |
| opp-hz = /bits/ 64 <1404000000>; |
| opp-microvolt = <749000>; |
| }; |
| opp07 { |
| opp-hz = /bits/ 64 <1500000000>; |
| opp-microvolt = <769000>; |
| }; |
| opp08 { |
| opp-hz = /bits/ 64 <1608000000>; |
| opp-microvolt = <779000>; |
| }; |
| opp09 { |
| opp-hz = /bits/ 64 <1704000000>; |
| opp-microvolt = <799000>; |
| }; |
| opp10 { |
| opp-hz = /bits/ 64 <1800000000>; |
| opp-microvolt = <819000>; |
| }; |
| opp11 { |
| opp-hz = /bits/ 64 <1920000000>; |
| opp-microvolt = <839000>; |
| }; |
| opp12 { |
| opp-hz = /bits/ 64 <2016000000>; |
| opp-microvolt = <869000>; |
| }; |
| }; |
| |
| cpufreq-meson { |
| compatible = "amlogic, cpufreq-meson"; |
| status = "okay"; |
| }; |
| |
| mux: mux-controller { |
| compatible = "gpio-mux"; |
| #mux-control-cells = <0>; |
| |
| mux-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>, |
| <&gpio GPIOX_9 GPIO_ACTIVE_HIGH>, |
| <&gpio GPIOX_10 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| mux_vsense: mux-controller-vsense { |
| compatible = "gpio-mux"; |
| #mux-control-cells = <0>; |
| |
| mux-gpios = <&gpio GPIOX_11 GPIO_ACTIVE_HIGH>; |
| idle-state = <0>; |
| }; |
| |
| adc_mux: adc_mux { |
| compatible = "io-channel-mux"; |
| io-channels = <&saradc 3>; |
| io-channel-names = "parent"; |
| #io-channel-cells = <1>; |
| |
| mux-controls = <&mux>; |
| channels = "", "cam", "ir", "", "btn", "", "", ""; |
| }; |
| |
| adc_mux_vsense { |
| compatible = "io-channel-mux"; |
| io-channels = <&saradc 1>; |
| io-channel-names = "parent"; |
| #io-channel-cells = <1>; |
| |
| mux-controls = <&mux_vsense>; |
| channels = "", "bat_vsense"; |
| }; |
| |
| thermistor_cam { |
| compatible = "ti,tmp6331decr,vbias-1.8v-100000ohm"; |
| pullup-uv = <1800000>; |
| pull-ohm = <100000>; |
| connected-positive; |
| io-channels = <&adc_mux 0>; |
| }; |
| |
| thermistor_ir { |
| compatible = "murata,ncp03wf104"; |
| pullup-uv = <1800000>; |
| pullup-ohm = <0>; |
| pulldown-ohm = <100000>; |
| connected-positive; |
| io-channels = <&adc_mux 1>; |
| }; |
| |
| thermistor_btn { |
| compatible = "murata,ncp03wf104"; |
| pullup-uv = <1800000>; |
| pullup-ohm = <0>; |
| pulldown-ohm = <100000>; |
| connected-positive; |
| io-channels = <&adc_mux 2>; |
| }; |
| |
| thermistor_bat { |
| compatible = "ti,tmp6331decr,vbias-1.8v-100000ohm"; |
| pullup-uv = <1800000>; |
| pull-ohm = <100000>; |
| io-channels = <&saradc 2>; |
| }; |
| |
| pwm_leds { |
| compatible = "pwm-leds"; |
| status = "okay"; |
| ir_led { |
| label = "ir_led_pwm"; |
| /* GPIOX_16/PWM_E, 2kHz */ |
| pwms = <&pwm_ef MESON_PWM_0 500000 0>; |
| max-brightness = <255>; |
| }; |
| }; |
| |
| cpu-dvfsid { |
| compatible = "amlogic, dvfs-id"; |
| reg=<0x0 0xfe005b00 0x0 0x4>; |
| status = "okay"; |
| }; |
| |
| bat: battery { |
| compatible = "simple-battery"; |
| constant-charge-current-max-microamp = <100000>; |
| constant-charge-voltage-max-microvolt = <3904000>; |
| precharge-current-microamp = <20000>; |
| charge-term-current-microamp = <20000>; |
| }; |
| }; |
| |
| &cpu0 { |
| cpu-supply = <&vddcpu0>; |
| /*set ema according to vcck*/ |
| set_ema_available; |
| multi_tables_available; |
| operating-points-v2 = <&cpu_opp_table0>, |
| <&cpu_opp_table1>, |
| <&cpu_opp_table2>, |
| <&cpu_opp_table3>; |
| }; |
| |
| &cpu1 { |
| cpu-supply = <&vddcpu0>; |
| /*set ema according to vcck*/ |
| set_ema_available; |
| multi_tables_available; |
| operating-points-v2 = <&cpu_opp_table0>, |
| <&cpu_opp_table1>, |
| <&cpu_opp_table2>, |
| <&cpu_opp_table3>; |
| }; |
| |
| &pwm_ab { |
| status = "okay"; |
| }; |
| |
| &vddcpu0 { |
| status = "okay"; |
| }; |
| |
| /* Audio Related start */ |
| &audiobus { |
| tdma: tdm@0 { |
| compatible = "amlogic, a1-snd-tdma"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <0 1>; |
| dai-tdm-lane-oe-slot-mask-out = <1 0>; |
| dai-tdm-clk-sel = <0>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_A |
| &clkc CLKID_FCLK_DIV3>; |
| clock-names = "mclk", "clk_srcpll"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = </*&tdmout_a*/ &tdmin_a>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| status = "disabled"; |
| }; |
| |
| tdmb: tdm@1 { |
| compatible = "amlogic, a1-snd-tdmb"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
| dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
| /* dai-tdm-lane-oe-slot-mask-in = <0 1>; */ |
| dai-tdm-clk-sel = <1>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
| &clkaudio CLKID_AUDIO_MCLK_PAD0 |
| &clkc CLKID_HIFI_PLL>; |
| clock-names = "mclk", "mclk_pad", "clk_srcpll"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = <&tdmout_b>; |
| |
| /* tdmin data comes from ACODEC adc */ |
| acodec_adc = <1>; |
| |
| /* |
| * 0: tdmout_a; |
| * 1: tdmout_b; |
| * 2: tdmout_c; |
| * 3: spdifout; |
| * 4: spdifout_b; |
| */ |
| //samesource_sel = <3>; |
| start_clk_enable = <1>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| src-clk-freq = <1155072000>; |
| |
| status = "okay"; |
| }; |
| |
| tdmlb:tdm@3 { |
| compatible = "amlogic, a1-snd-tdmlb"; |
| #sound-dai-cells = <0>; |
| |
| dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>; |
| dai-tdm-clk-sel = <1>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
| &clkc CLKID_FCLK_DIV3>; |
| clock-names = "mclk", "clk_srcpll"; |
| |
| /* |
| * select tdmin_lb src; |
| * AXG |
| * 0: TDMOUTA |
| * 1: TDMOUTB |
| * 2: TDMOUTC |
| * 3: PAD_TDMINA |
| * 4: PAD_TDMINB |
| * 5: PAD_TDMINC |
| * |
| * G12A/G12B |
| * 0: TDMOUTA |
| * 1: TDMOUTB |
| * 2: TDMOUTC |
| * 3: PAD_TDMINA_DIN* |
| * 4: PAD_TDMINB_DIN* |
| * 5: PAD_TDMINC_DIN* |
| * 6: PAD_TDMINA_D*, oe pin |
| * 7: PAD_TDMINB_D*, oe pin |
| * |
| * TL1/SM1 |
| * 0: TDMOUTA |
| * 1: TDMOUTB |
| * 2: TDMOUTC |
| * 3: PAD_TDMINA_DIN* |
| * 4: PAD_TDMINB_DIN* |
| * 5: PAD_TDMINC_DIN* |
| * 6: PAD_TDMINA_D* |
| * 7: PAD_TDMINB_D* |
| * 8: PAD_TDMINC_D* |
| * 9: HDMIRX_I2S |
| * 10: ACODEC_ADC |
| * |
| * A1 |
| * 0: TDMOUTA |
| * 1: TDMOUTB |
| * 3: PAD_TDMINA_DIN* |
| * 4: PAD_TDMINB_DIN* |
| */ |
| |
| lb-src-sel = <1>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| status = "disabled"; |
| }; |
| |
| pdm: pdm { |
| compatible = "amlogic, a1-snd-pdm"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO2_GATE_PDM |
| &clkc CLKID_HIFI_PLL |
| &clkc CLKID_HIFI_PLL |
| &clkaudio CLKID_AUDIO2_PDM_DCLK |
| &clkaudio CLKID_AUDIO2_PDM_SYSCLK>; |
| clock-names = "gate", |
| "sysclk_srcpll", |
| "dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk"; |
| |
| pinctrl-names = "pdm_pins"; |
| pinctrl-0 = <&pdmin>; |
| |
| /* mode 0~4, defalut:1 */ |
| filter_mode = <1>; |
| lane-mask-in = <1 1 0 0>; |
| |
| sys-src-clk-freq = <1155072000>; |
| power-domains = <&pwrdm PDID_PDM>; |
| |
| status = "okay"; |
| }; |
| |
| asrcb: resample@1 { |
| compatible = "amlogic, c2-resample-b"; |
| clocks = <&clkc CLKID_HIFI_PLL |
| &clkaudio CLKID_AUDIO_MCLK_D |
| &clkaudio CLKID_AUDIO_RESAMPLEA>; |
| clock-names = "resample_pll", "resample_src", "resample_clk"; |
| |
| /*this resample is only used for loopback_A.*/ |
| /*only support 16000 or 48000Hz for capture*/ |
| capture_sample_rate = <16000>; |
| |
| /* hifi pll rate */ |
| src-clk-freq = <1155072000>; |
| |
| status = "disabled"; |
| }; |
| |
| vad:vad { |
| compatible = "amlogic, snd-vad-top"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO2_GATE_TOVAD |
| /* &clkc CLKID_FCLK_DIV2 */ |
| &xtal |
| &clkaudio CLKID_AUDIO2_VAD_CLK>; |
| clock-names = "gate", "pll", "clk"; |
| |
| interrupts = <GIC_SPI 185 IRQ_TYPE_EDGE_RISING |
| GIC_SPI 186 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "irq_wakeup", "irq_frame_sync"; |
| |
| /* |
| * Data src sel: |
| * 2: tdmin_c, actually tdmin_vad |
| * 4: pdmin |
| */ |
| src = <4>; |
| |
| /* |
| * deal with hot word in user space or kernel space |
| * 0: in user space |
| * 1: in kernel space |
| */ |
| level = <1>; |
| |
| status = "disabled"; |
| }; |
| |
| loopback: loopback { |
| compatible = "amlogic, a1-loopbacka"; |
| #sound-dai-cells = <0>; |
| |
| original-src = <&tdmb>; |
| //tdmin_lb-src = <&tdmin_lb>; |
| |
| clocks = <&clkaudio CLKID_AUDIO2_GATE_PDM |
| &clkc CLKID_HIFI_PLL |
| &clkc CLKID_HIFI_PLL |
| &clkaudio CLKID_AUDIO2_PDM_DCLK |
| &clkaudio CLKID_AUDIO2_PDM_SYSCLK |
| &clkc CLKID_HIFI_PLL |
| &clkaudio CLKID_AUDIO_MCLK_C>; |
| clock-names = "pdm_gate", |
| "pdm_sysclk_srcpll", |
| "pdm_dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk", |
| "tdminlb_mpll", |
| "tdminlb_mclk"; |
| |
| /* datain src |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| */ |
| datain_src = <4>; |
| datain_chnum = <2>; |
| datain_chmask = <0x3>; |
| /* config which data pin for loopback */ |
| datain-lane-mask-in = <1 0 0 0>; |
| |
| sys-src-clk-freq = <1155072000>; |
| |
| /* calc mclk for datalb */ |
| mclk-fs = <256>; |
| |
| /* tdmin_lb src |
| * 0: tdmoutA |
| * 1: tdmoutB |
| * 2: tdmoutC |
| * 3: PAD_TDMINA_DIN*, refer to core pinmux |
| * 4: PAD_TDMINB_DIN*, refer to core pinmux |
| * 5: PAD_TDMINC_DIN*, refer to core pinmux |
| * 6: PAD_TDMINA_D*, oe, refer to core pinmux |
| * 7: PAD_TDMINB_D*, oe, refer to core pinmux |
| */ |
| /* if tdmin_lb >= 3, use external loopback */ |
| datalb_src = <1>; |
| datalb_chnum = <2>; |
| datalb_chmask = <0x3>; |
| /* config which data pin as loopback */ |
| datalb-lane-mask-in = <1 0 0 0>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| status = "disabled"; |
| }; |
| |
| aed:effect { |
| compatible = "amlogic, snd-effect-v4"; |
| #sound-dai-cells = <0>; |
| clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC |
| &clkc CLKID_FCLK_DIV3 |
| &clkaudio CLKID_AUDIO_EQDRC>; |
| clock-names = "gate", "srcpll", "eqdrc"; |
| /* |
| * 0:tdmout_a |
| * 1:tdmout_b |
| * 2:tdmout_c |
| * 3:spdifout |
| * 4:spdifout_b |
| */ |
| eqdrc_module = <1>; |
| /* max 0xf, each bit for one lane, usually one lane */ |
| lane_mask = <0x1>; |
| /* max 0xff, each bit for one channel */ |
| channel_mask = <0x3>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| status = "disabled"; |
| }; |
| }; /* end of audiobus */ |
| /* Audio Related end */ |
| |
| &i2c4 { |
| status = "okay"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&i2c4_master_pins1>; |
| pinctrl-1 = <&i2c4_master_sleep_pins1>; |
| clock-frequency = <400000>; /* 400K, b/159627458 */ |
| sensor-i2c@36 { |
| compatible = "arm, i2c-sensor"; |
| reg = <0x36>; |
| reg-names = "i2c-sensor"; |
| slave-addr = <0x6c>; |
| reg-type = <2>; |
| reg-data-type = <1>; |
| link-device = <&phycsi>; |
| }; |
| |
| lp5009_ir: lp5009_ir@14 { |
| compatible = "ti,led-lp5009"; |
| reg = <0x14>; |
| // Each leds have 3 channel (RGB). We use them individually for |
| // 6 IR led and status LED (RGB). |
| num_leds = <3>; |
| start_num = <0 3 6>; |
| ignore_enable_pin; |
| }; |
| |
| // Status LED |
| aw2015@64 { |
| compatible = "awinic,aw2015_led"; |
| reg = <0x64>; |
| aw2015,imax = <3>; |
| aw2015,pwmlog = <3>; |
| |
| aw2015,red { |
| aw2015,name = "status-R"; |
| aw2015,id = <0>; |
| aw2015,led-current = <255>; |
| aw2015,max-brightness = <255>; |
| aw2015,rise-time-ms = <0>; |
| aw2015,hold-time-ms = <0>; |
| aw2015,fall-time-ms = <0>; |
| aw2015,off-time-ms = <0>; |
| }; |
| |
| aw2015,green { |
| aw2015,name = "status-G"; |
| aw2015,id = <1>; |
| aw2015,led-current = <255>; |
| aw2015,max-brightness = <255>; |
| aw2015,rise-time-ms = <0>; |
| aw2015,hold-time-ms = <0>; |
| aw2015,fall-time-ms = <0>; |
| aw2015,off-time-ms = <0>; |
| }; |
| |
| aw2015,blue { |
| aw2015,name = "status-B"; |
| aw2015,id = <2>; |
| aw2015,led-current = <255>; |
| aw2015,max-brightness = <255>; |
| aw2015,rise-time-ms = <0>; |
| aw2015,hold-time-ms = <0>; |
| aw2015,fall-time-ms = <0>; |
| aw2015,off-time-ms = <0>; |
| }; |
| }; |
| }; |
| |
| &isp { |
| status = "okay"; |
| temper-line-offset = <0x1800>; // 2048*3 |
| temper-buf-size = <12>; |
| temper-frame-num = <1>; |
| temper-frame-size = <0xC00000>; // 2048*3*2048 |
| memory-region = <&isp_cma_reserved>; |
| clk-level = <0>; |
| csi-clk-level = <0>; |
| }; |
| |
| &adapter { |
| status = "okay"; |
| mem_alloc = <30>; |
| memory-region = <&adapt_cma_reserved>; |
| }; |
| |
| &phycsi { |
| dphy-ctrl0-cfg = <0x123>; |
| dphy-ctrl1-cfg = <0x123>; |
| }; |
| |
| &pinctrl_periphs { |
| icr_int_default:icr_int_default { |
| mux { |
| groups = "GPIOD_4"; |
| function = "gpio_periphs"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| /* Audio Related start */ |
| tdmout_a: tdmout_a { |
| mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */ |
| groups = "tdm_a_sclk", |
| "tdm_a_fs", |
| "tdm_a_dout0"; |
| function = "tdm_a"; |
| }; |
| }; |
| |
| tdmin_a: tdmin_a { |
| mux { /* GPIOX_8 */ |
| groups = "tdm_a_din1"; |
| function = "tdm_a"; |
| }; |
| }; |
| |
| tdmb_mclk: tdmb_mclk { |
| mux { |
| groups = "mclk_0"; |
| function = "mclk_0"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| tdmout_b: tdmout_b { |
| mux { /* GPIOA_1, GPIOA_2, GPIOA_3 */ |
| groups = "tdm_b_sclk", |
| "tdm_b_fs", |
| "tdm_b_dout0"; |
| function = "tdm_b"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| tdmin_b:tdmin_b { |
| mux { /* GPIOA_7 */ |
| groups = "tdm_b_din0"; |
| function = "tdm_b"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| spdifin: spdifin { |
| mux {/* GPIOF_6 */ |
| groups = "spdif_in_f6"; |
| function = "spdif_in"; |
| }; |
| }; |
| |
| pdmin: pdmin { |
| mux { /* GPIOC_4 GPIOC_0*/ |
| groups = |
| "pdm_dclk_c", |
| "pdm_din0_c"; |
| function = "pdm"; |
| }; |
| }; |
| |
| /* Audio Related end */ |
| cmclkout2_pins:cmclkout2_pins { |
| mux { |
| groups = "cmclkout2"; |
| function = "cmclkout"; |
| drive-strength = <4>; |
| }; |
| }; |
| |
| /* Sensor clk output-pins */ |
| cmclkout1_pins:cmclkout1_pins { |
| mux { |
| groups = "mclk_0"; |
| function = "mclk_0"; |
| drive-strenth = <4>; |
| }; |
| }; |
| |
| a_uart_pins1:a_uart1 { |
| mux { |
| groups = "uart_a_tx_x12", |
| "uart_a_rts"; |
| function = "uart_a"; |
| }; |
| |
| mux1 { |
| groups = "uart_a_rx_x13", |
| "uart_a_cts"; |
| function = "uart_a"; |
| vin-threshold= <1>; |
| }; |
| }; |
| }; /* end of pinctrl_periphs */ |
| |
| &gdc { |
| status = "okay"; |
| }; |
| |
| &sd_emmc_c { |
| status = "okay"; |
| pinctrl-0 = <&emmc_pins>; |
| pinctrl-1 = <&emmc_clk_gate_pins>; |
| pinctrl-2 = <&emmc_pins_sleep>; |
| pinctrl-names = "default", "clk-gate", "sleep"; |
| bus-width = <8>; |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| max-frequency = <167000000>; |
| non-removable; |
| disable-wp; |
| mmc-cap-erase; |
| //mmc-ddr-1_8v; |
| mmc-hs200-1_8v; |
| // mmc-hs400-1_8v; |
| card_type = <1>;/*emmc:1,sdcard:2,sdio:3*/ |
| post-power-on-delay-ms = <0>; |
| //vmmc-supply = <&vcc_3v3>; |
| //vqmmc-supply = <&vcc_1v8>; |
| }; |
| |
| /* SD card */ |
| &sd_emmc_b { |
| status = "disabled"; |
| pinctrl-0 = <&sdcard_pins>; |
| pinctrl-1 = <&sdcard_clk_gate_pins>; |
| pinctrl-2 = <&sd_1bit_pins>; |
| pinctrl-3 = <&b_uart_pins1 |
| &sdcard_clk_gate_pins &ao_to_sd_uart_pins>; |
| pinctrl-4 = <&b_uart_pins1 |
| &sd_1bit_pins &ao_to_sd_uart_pins>; |
| pinctrl-5 = <&sdcard_pins &b_uart_enable_pins1>; |
| pinctrl-6 = <&b_uart_pins1 |
| &ao_to_sd_uart_pins>; |
| pinctrl-7 = <&sdcard_pins &b_uart_enable_pins1>; |
| pinctrl-8 = <&b_uart_pins1 |
| &ao_to_sd_uart_pins>; |
| pinctrl-9 = <&sdcard_pins_sleep>; |
| pinctrl-names = "sd_default", |
| "clk-gate", |
| "sd_1bit_pins", |
| "sd_clk_cmd_uart_pins", |
| "sd_1bit_uart_pins", |
| "sd_to_ao_uart_pins", |
| "ao_to_sd_uart_pins", |
| "sd_to_ao_jtag_pins", |
| "ao_to_sd_jtag_pins", |
| "sleep"; |
| bus-width = <4>; |
| cap-sd-highspeed; |
| // sd-uhs-sdr12; |
| // sd-uhs-sdr25; |
| // sd-uhs-sdr50; |
| // sd-uhs-sdr104; |
| max-frequency = <200000000>; |
| disable-wp; |
| cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; |
| //dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; |
| dat3-gpios = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>; |
| cd-inverted; |
| card_type = <5>; |
| // vmmc-supply = <&sdcard_power>; |
| // vqmmc-supply = <&vddio_card>; |
| }; |
| |
| /*sdio*/ |
| &sd_emmc_a { |
| status = "okay"; |
| pinctrl-0 = <&sdio_x_pins>; |
| pinctrl-names = "default"; |
| bus-width = <4>; |
| cap-sd-highspeed; |
| sd-uhs-sdr12; |
| sd-uhs-sdr25; |
| sd-uhs-sdr50; |
| non-removable; |
| max-frequency = <80000000>; |
| disable-wp; |
| cap-sdio-irq; |
| keep-power-in-suspend; |
| card_type = <3>; |
| post-power-on-delay-ms = <0>; |
| vmmc-supply = <&vddao_3v3>; |
| vqmmc-supply = <&vcc_1v8>; |
| }; |
| |
| &nand { |
| status = "disabled"; |
| pinctrl-names = "nand_norb_mod", "nand_cs_only"; |
| pinctrl-0 = <&all_nand_pins>; |
| pinctrl-1 = <&nand_cs_pins>; |
| /* bl_mode: 0 compact mode; 1 descrete mode */ |
| bl_mode = <1>; |
| fip_copies = <4>; |
| fip_size = <0x200000>; |
| nand_clk_ctrl = <0xFE012000>; |
| nand_ext_clk_ctrl = <0xFE000920>; |
| partition = <&slc_partitions>; |
| slc_partitions: slc_partitions{ |
| tpl{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x0>; |
| }; |
| recovery{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x2000000>; |
| }; |
| boot{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x2000000>; |
| }; |
| system{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x13000000>; |
| }; |
| data{ |
| offset=<0xffffffff 0xffffffff>; |
| size=<0x0 0x0>; |
| }; |
| }; |
| }; |
| |
| &dwc2_a { |
| status = "okay"; |
| /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ |
| controller-type = <3>; |
| }; |
| |
| &usb0 { |
| status = "okay"; |
| }; |
| |
| &usb2_phy_v2 { |
| status = "okay"; |
| portnum = <1>; |
| otg-phy-index = <0>; |
| }; |
| |
| &usb3_phy_v2 { |
| status = "okay"; |
| portnum = <0>; |
| /* |
| otg = <1>; |
| gpio-vbus-power = "GPIOD_9"; |
| gpios = <&gpio GPIOD_9 GPIO_ACTIVE_HIGH>; |
| */ |
| }; |
| |
| &aml_bc { |
| status = "okay"; |
| }; |
| |
| &aml_cc { |
| status = "disabled"; |
| }; |
| |
| &uart_B { |
| status = "okay"; |
| }; |
| |
| &uart_C { |
| status = "disabled"; |
| }; |
| |
| &i2c3 { |
| status = "okay"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&i2c3_master_pins1>; |
| pinctrl-1 = <&i2c3_master_sleep_pins1>; |
| clock-frequency = <400000>; /* max supported freq */ |
| |
| /* Ring LED */ |
| lp5009: lp5009@14 { |
| compatible = "ti,led-lp5009"; |
| reg = <0x14>; |
| num_leds = <3>; // 8 white LEDs. 1 channel is left unused. |
| start_num = <0 3 6>; |
| reset_gpio = <&gpio GPIOA_5 GPIO_ACTIVE_HIGH>; |
| soft-init = /bits/ 8 <1>; |
| }; |
| |
| /* Ring LED 2nd Source */ |
| aw201xx_led: aw210xx_led@20 { |
| compatible = "awinic,aw210xx_led"; |
| reg = <0x20>; |
| enable-gpio = <&gpio GPIOA_5 GPIO_ACTIVE_HIGH>; |
| global_current = <0xFF>; |
| // 32kHz for 9bits + 3bits dither BR |
| osc_clk = <1>; |
| // 9bits + 3bits dither |
| br_res = <4>; |
| status = "okay"; |
| aw210xx,led { |
| aw210xx,name = "aw210xx_led"; |
| aw210xx,imax = <1>; |
| aw210xx,brightness = <0>; |
| aw210xx,max_brightness = <4095>; |
| }; |
| }; |
| |
| bq25618: bq25618@6a { |
| compatible = "ti,bq25618"; |
| reg = <0x6a>; |
| monitored-battery = <&bat>; |
| interrupt-parent = <&gpio_intc>; |
| enable_gpio = <&gpio GPIOA_14 GPIO_ACTIVE_LOW>; |
| interrupts = <33 IRQ_TYPE_EDGE_FALLING>; |
| ti,watchdog-timeout-ms = <40000>; |
| |
| input-voltage-limit-microvolt = <4500000>; |
| input-current-limit-microamp = <200000>; |
| }; |
| |
| ps13216: ps13216@10 { |
| compatible = "photeon,ps13216"; |
| reg = <0x10>; |
| enable-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; |
| interrupt-parent = <&gpio_intc>; |
| interrupts = <83 IRQ_TYPE_EDGE_BOTH>; |
| hvbuck-gpios = <&gpio GPIOD_10 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| &spifc { |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spifc_pins>; |
| spi-nor@1 { |
| compatible = "jedec,spi-nor"; |
| spi-max-frequency = <96000000>; |
| }; |
| spi-nand@0 { |
| compatible = "spi-nand"; |
| status = "disabled"; |
| reg = <0>; |
| spi-max-frequency = <96000000>; |
| bl_mode = <1>; |
| fip_copies = <4>; |
| fip_size = <0x200000>; |
| partition = <&snand_partitions>; |
| snand_partitions: snand_partitions{ |
| bootloader{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x0>; |
| }; |
| tpl{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x0>; |
| }; |
| logo{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x200000>; |
| }; |
| recovery{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x1000000>; |
| }; |
| boot{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x1000000>; |
| }; |
| system{ |
| offset=<0x0 0x0>; |
| size=<0x0 0x4000000>; |
| }; |
| data{ |
| offset=<0xffffffff 0xffffffff>; |
| size=<0x0 0x0>; |
| }; |
| }; |
| }; |
| }; |
| |
| &spicc0 { |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc0_pins1>; |
| cs-gpios = <&gpio GPIOA_8 0>, |
| <&gpio GPIOA_9 0>; |
| }; |
| |
| &spicc1 { |
| status = "disabled"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spicc1_pins1>; |
| cs-gpios = <&gpio GPIOA_14 0>; |
| }; |
| |
| &uart_A { |
| status = "disabled"; |
| }; |
| |
| &aml_wifi { |
| status = "okay"; |
| power_on-gpios = <&gpio GPIOM_6 GPIO_ACTIVE_HIGH>; |
| interrupt-gpios= <&gpio GPIOM_13 GPIO_ACTIVE_HIGH>; |
| dhd_static_buf; //if use bcm wifi, config dhd_static_buf |
| pwm_config = <&wifi_pwm_conf>; |
| //single_pwm; |
| }; |
| |
| &aml_bt { |
| status = "okay"; |
| reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &bluesleep { |
| status = "okay"; |
| bt_port_id = <1>; |
| bt_ext_wake = <&gpio GPIOA_15 GPIO_ACTIVE_HIGH>; |
| bt_host_wake = <&gpio GPIOM_12 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &pwm_ef { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm_e_pins1>; |
| }; |
| |
| &pwm_gh { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm_g_pins7>; |
| }; |
| |
| ðmac { |
| status = "disabled"; |
| pinctrl-names = "external_eth_pins"; |
| pinctrl-0 = <&external_eth_pins>; |
| mc_val = <0x1624>; |
| internal_phy=<0>; |
| }; |
| |
| /*8211f 1g ref setting*/ |
| //ðmac { |
| // status = "okay"; |
| // pinctrl-names = "external_eth_rgmii_pins"; |
| // pinctrl-0 = <&external_eth_rgmii_pins>; |
| // mc_val = <0x1601>; |
| // cali_val = <0xb0000>; |
| // internal_phy=<0>; |
| //}; |
| |
| &freertos { |
| status = "disabled"; |
| }; |
| |
| &rtosfmw { |
| status = "okay"; |
| firmware = "TYPE_SECPU","secpu.bin"; |
| }; |
| |
| &saradc { |
| status = "okay"; |
| thermal-name = "thermal"; |
| vref-supply = <&vcc_1v8>; |
| }; |
| |
| &meson_fb { |
| status = "disabled"; |
| memory-region = ""; |
| display_size_default = <1920 1080 1920 1080 32>; |
| mem_size = <0x00800000>; |
| }; |
| |
| &pwm_ij { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pwm_i_pins1>; |
| }; |
| |
| &uart_E { |
| status = "okay"; |
| pinctrl-0 = <&e_uart_pins2>; |
| }; |
| |
| &secmon { |
| reserve_mem_size = <0x00600000>; |
| }; |
| |
| &jpegenc { |
| status = "okay"; |
| memory-region = <&jpegenc_reserved>; |
| }; |
| |
| &jtag { |
| status = "disabled"; |
| }; |
| |
| &amlogic_unifykey { |
| status = "disabled"; |
| }; |
| |
| &aml_reboot { |
| /* change poweroff to reset */ |
| sys_poweroff = <0x84000009>; |
| }; |
| |
| &audiolocker { |
| status = "disabled"; |
| }; |
| |
| &tdmb { |
| status = "disabled"; |
| }; |
| |
| &pdm { |
| status = "disabled"; |
| }; |
