| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| */ |
| |
| /dts-v1/; |
| |
| #include "meson-a1.dtsi" |
| |
| / { |
| compatible = "amlogic,a1"; |
| model = "Amlogic Meson a1 Development Board"; |
| |
| aliases { |
| serial0 = &uart_B; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| i2c3 = &i2c3; |
| spi0 = &spifc; |
| }; |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| memory@0 { |
| device_type = "memory"; |
| linux,usable-memory = <0x0 0x0 0x0 0x8000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| secmon_reserved:linux,secmon { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0x400000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x05000000 0x0 0x400000>; |
| }; |
| |
| dsp_fw_reserved:linux,dsp_fw { |
| compatible = "amlogic, aml_dsp_memory"; |
| reusable; |
| size = <0x0 0x1400000>; |
| alignment = <0x0 0x400000>; |
| alloc-ranges = <0x0 0x2800000 0x0 0x1400000>; |
| }; |
| |
| secos_reserved:linux,secos { |
| status = "okay"; |
| compatible = "amlogic, aml_secos_memory"; |
| reg = <0x0 0x03d00000 0x0 0x00300000>; |
| no-map; |
| }; |
| }; |
| |
| /* Audio Related start */ |
| pdm_codec:pdm_codec{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, pdm_dummy_codec"; |
| status = "okay"; |
| }; |
| |
| dummy_codec:dummy_codec{ |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, aml_dummy_codec"; |
| status = "okay"; |
| }; |
| |
| a1_codec:a1_codec { |
| #sound-dai-cells = <0>; |
| compatible = "amlogic, a1_acodec"; |
| status = "okay"; |
| reg = <0x0 0xFE004800 0x0 0x20>; |
| tdmout_index = <1>; |
| tdmin_index = <1>; |
| dat0_ch_sel = <0>; |
| power-domains = <&pwrdm PDID_ACODEC>; |
| }; |
| |
| auge_sound { |
| compatible = "amlogic, a1-sound-card"; |
| aml-audio-card,name = "AML-AUGESOUND"; |
| |
| /*avout mute gpio*/ |
| avout_mute-gpios = <&gpio GPIOF_4 GPIO_ACTIVE_HIGH>; |
| |
| aml-audio-card,dai-link@0 { |
| format = "dsp_a"; |
| mclk-fs = <512>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdma>; |
| frame-master = <&tdma>; |
| /* slave mode */ |
| /* |
| * bitclock-master = <&tdmacodec>; |
| * frame-master = <&tdmacodec>; |
| */ |
| suffix-name = "alsaPORT-pcm"; |
| tdmacpu: cpu { |
| sound-dai = <&tdma>; |
| dai-tdm-slot-tx-mask = |
| <1 1 1 1 1 1 1 1>; |
| dai-tdm-slot-rx-mask = |
| <1 1 1 1 1 1 1 1>; |
| dai-tdm-slot-num = <8>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <24576000>; |
| }; |
| tdmacodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@1 { |
| format = "i2s";// "dsp_a"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmb>; |
| frame-master = <&tdmb>; |
| /* slave mode */ |
| //bitclock-master = <&tdmbcodec>; |
| //frame-master = <&tdmbcodec>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-i2s"; |
| cpu { |
| sound-dai = <&tdmb>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmbcodec: codec { |
| sound-dai = <&a1_codec>; |
| }; |
| }; |
| |
| #if 0 |
| aml-audio-card,dai-link@2 { |
| format = "i2s";// "dsp_a"; |
| mclk-fs = <256>; |
| //continuous-clock; |
| //bitclock-inversion; |
| //frame-inversion; |
| /* master mode */ |
| bitclock-master = <&tdmlb>; |
| frame-master = <&tdmlb>; |
| /* slave mode */ |
| //bitclock-master = <&tdmlbcodec>; |
| //frame-master = <&tdmlbcodec>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-i2s"; |
| cpu { |
| sound-dai = <&tdmlb>; |
| dai-tdm-slot-tx-mask = <1 1>; |
| dai-tdm-slot-rx-mask = <1 1>; |
| dai-tdm-slot-num = <2>; |
| dai-tdm-slot-width = <32>; |
| system-clock-frequency = <12288000>; |
| }; |
| tdmlbcodec: codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| #endif |
| |
| aml-audio-card,dai-link@2 { |
| mclk-fs = <64>; |
| /* suffix-name, sync with android audio hal |
| * what's the dai link used for |
| */ |
| suffix-name = "alsaPORT-pdm"; |
| cpu { |
| sound-dai = <&pdm>; |
| }; |
| codec { |
| sound-dai = <&pdm_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@3 { |
| mclk-fs = <128>; |
| /* suffix-name, sync with android audio hal used for */ |
| suffix-name = "alsaPORT-spdif"; |
| cpu { |
| sound-dai = <&spdifa>; |
| system-clock-frequency = <6144000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| |
| aml-audio-card,dai-link@4 { |
| mclk-fs = <256>; |
| continuous-clock; |
| suffix-name = "alsaPORT-loopback"; |
| cpu { |
| sound-dai = <&loopback>; |
| system-clock-frequency = <12288000>; |
| }; |
| codec { |
| sound-dai = <&dummy_codec>; |
| }; |
| }; |
| }; |
| /* Audio Related end */ |
| |
| cpu_opp_table0: cpu_opp_table0 { |
| compatible = "operating-points-v2"; |
| opp-shared; |
| |
| opp00 { |
| opp-hz = /bits/ 64 <128000000>; |
| opp-microvolt = <750000>; |
| }; |
| opp01 { |
| opp-hz = /bits/ 64 <256000000>; |
| opp-microvolt = <750000>; |
| }; |
| opp02 { |
| opp-hz = /bits/ 64 <512000000>; |
| opp-microvolt = <780000>; |
| }; |
| opp03 { |
| opp-hz = /bits/ 64 <768000000>; |
| opp-microvolt = <780000>; |
| }; |
| opp04 { |
| opp-hz = /bits/ 64 <1008000000>; |
| opp-microvolt = <790000>; |
| }; |
| opp05 { |
| opp-hz = /bits/ 64 <1200000000>; |
| opp-microvolt = <800000>; |
| }; |
| opp06 { |
| opp-hz = /bits/ 64 <1320000000>; |
| opp-microvolt = <850000>; |
| }; |
| opp07 { |
| opp-hz = /bits/ 64 <1416000000>; |
| opp-microvolt = <880000>; |
| }; |
| opp08 { |
| opp-hz = /bits/ 64 <1512000000>; |
| opp-microvolt = <900000>; |
| }; |
| }; |
| |
| cpufreq-meson { |
| compatible = "amlogic, cpufreq-meson"; |
| status = "disable"; |
| }; |
| }; |
| |
| /* Audio Related start */ |
| &audiobus { |
| tdma: tdm@0 { |
| compatible = "amlogic, a1-snd-tdma"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <0 1>; |
| dai-tdm-lane-oe-slot-mask-out = <1 0>; |
| dai-tdm-clk-sel = <0>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_A |
| &clkc CLKID_FCLK_DIV3>; |
| clock-names = "mclk", "clk_srcpll"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = <&tdmout_a &tdmin_a>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| status = "okay"; |
| }; |
| |
| tdmb: tdm@1 { |
| compatible = "amlogic, a1-snd-tdmb"; |
| #sound-dai-cells = <0>; |
| dai-tdm-lane-slot-mask-in = <1 0 0 0>; |
| dai-tdm-lane-slot-mask-out = <1 0 0 0>; |
| /* dai-tdm-lane-oe-slot-mask-in = <0 1>; */ |
| dai-tdm-clk-sel = <1>; |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
| &clkc CLKID_FCLK_DIV3>; |
| //&clkc CLKID_HIFI_PLL>; |
| clock-names = "mclk", "clk_srcpll"; |
| pinctrl-names = "tdm_pins"; |
| pinctrl-0 = <&tdmb_mclk &tdmout_b>; |
| |
| mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */ |
| |
| /* tdmin data comes from ACODEC adc */ |
| acodec_adc = <1>; |
| |
| /* |
| * 0: tdmout_a; |
| * 1: tdmout_b; |
| * 2: tdmout_c; |
| * 3: spdifout; |
| * 4: spdifout_b; |
| */ |
| //samesource_sel = <3>; |
| start_clk_enable = <1>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| status = "okay"; |
| }; |
| |
| tdmlb:tdm@3 { |
| compatible = "amlogic, a1-snd-tdmlb"; |
| #sound-dai-cells = <0>; |
| |
| dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>; |
| dai-tdm-clk-sel = <1>; |
| |
| clocks = <&clkaudio CLKID_AUDIO_MCLK_B |
| &clkc CLKID_FCLK_DIV3>; |
| clock-names = "mclk", "clk_srcpll"; |
| |
| /* |
| * select tdmin_lb src; |
| * AXG |
| * 0: TDMOUTA |
| * 1: TDMOUTB |
| * 2: TDMOUTC |
| * 3: PAD_TDMINA |
| * 4: PAD_TDMINB |
| * 5: PAD_TDMINC |
| * |
| * G12A/G12B |
| * 0: TDMOUTA |
| * 1: TDMOUTB |
| * 2: TDMOUTC |
| * 3: PAD_TDMINA_DIN* |
| * 4: PAD_TDMINB_DIN* |
| * 5: PAD_TDMINC_DIN* |
| * 6: PAD_TDMINA_D*, oe pin |
| * 7: PAD_TDMINB_D*, oe pin |
| * |
| * TL1/SM1 |
| * 0: TDMOUTA |
| * 1: TDMOUTB |
| * 2: TDMOUTC |
| * 3: PAD_TDMINA_DIN* |
| * 4: PAD_TDMINB_DIN* |
| * 5: PAD_TDMINC_DIN* |
| * 6: PAD_TDMINA_D* |
| * 7: PAD_TDMINB_D* |
| * 8: PAD_TDMINC_D* |
| * 9: HDMIRX_I2S |
| * 10: ACODEC_ADC |
| * |
| * A1 |
| * 0: TDMOUTA |
| * 1: TDMOUTB |
| * 3: PAD_TDMINA_DIN* |
| * 4: PAD_TDMINB_DIN* |
| */ |
| |
| lb-src-sel = <1>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| status = "okay"; |
| }; |
| |
| spdifa: spdif@0 { |
| compatible = "amlogic, a1-snd-spdif-a"; |
| #sound-dai-cells = <0>; |
| clocks = <&clkc CLKID_FCLK_DIV3 |
| &clkaudio CLKID_AUDIO_GATE_SPDIFIN |
| &clkaudio CLKID_AUDIO_SPDIFIN>; |
| clock-names = "fixed_clk", "gate_spdifin", "clk_spdifin"; |
| interrupts = |
| <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>; |
| |
| interrupt-names = "irq_spdifin"; |
| pinctrl-names = "spdif_pins"; |
| pinctrl-0 = <&spdifin>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| status = "okay"; |
| }; |
| |
| pdm: pdm { |
| compatible = "amlogic, a1-snd-pdm"; |
| #sound-dai-cells = <0>; |
| |
| clocks = <&clkaudio CLKID_AUDIO2_GATE_PDM |
| &clkc CLKID_FCLK_DIV2 |
| &clkc CLKID_FCLK_DIV2 |
| &clkaudio CLKID_AUDIO2_PDM_DCLK |
| &clkaudio CLKID_AUDIO2_PDM_SYSCLK>; |
| clock-names = "gate", |
| "sysclk_srcpll", |
| "dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk"; |
| |
| pinctrl-names = "pdm_pins"; |
| pinctrl-0 = <&pdmin>; |
| |
| /* mode 0~4, defalut:1 */ |
| filter_mode = <1>; |
| /*power-domains = <&pwrdm PDID_PDM>;*/ |
| |
| status = "okay"; |
| }; |
| |
| asrca: resample@0 { |
| compatible = "amlogic, a1-resample-a"; |
| clocks = <&clkc CLKID_FCLK_DIV3 |
| &clkaudio CLKID_AUDIO_MCLK_C |
| &clkaudio CLKID_AUDIO_RESAMPLEA>; |
| clock-names = "resample_pll", "resample_src", "resample_clk"; |
| |
| /*same with toddr_src |
| * TDMIN_A, 0 |
| * TDMIN_B, 1 |
| * TDMIN_C, 2 |
| * SPDIFIN, 3 |
| * PDMIN, 4 |
| * FRATV, 5 |
| * TDMIN_LB, 6 |
| * LOOPBACK_A, 7 |
| * FRHDMIRX, 8 |
| * LOOPBACK_B, 9 |
| * SPDIFIN_LB, 10 |
| * EARC_RX, 11 |
| */ |
| resample_module = <3>; |
| |
| /* only can enable one new resample |
| * as only have one new resample HW |
| */ |
| status = "disabled"; |
| }; |
| |
| asrcb: resample@1 { |
| compatible = "amlogic, a1-resample-b"; |
| clocks = <&clkc CLKID_FCLK_DIV3 |
| &clkaudio CLKID_AUDIO_MCLK_D |
| &clkaudio CLKID_AUDIO_RESAMPLEA>; |
| clock-names = "resample_pll", "resample_src", "resample_clk"; |
| |
| /*this resample is only used for loopback_A.*/ |
| /*only support 16000 or 48000Hz for capture*/ |
| capture_sample_rate = <16000>; |
| |
| status = "okay"; |
| }; |
| |
| loopback: loopback { |
| compatible = "amlogic, a1-loopbacka"; |
| #sound-dai-cells = <0>; |
| |
| original-src = <&tdmb>; |
| //tdmin_lb-src = <&tdmin_lb>; |
| |
| clocks = <&clkaudio CLKID_AUDIO2_GATE_PDM |
| &clkc CLKID_FCLK_DIV2 |
| &clkc CLKID_FCLK_DIV2 |
| &clkaudio CLKID_AUDIO2_PDM_DCLK |
| &clkaudio CLKID_AUDIO2_PDM_SYSCLK |
| &clkc CLKID_FCLK_DIV3 |
| &clkaudio CLKID_AUDIO_MCLK_C>; |
| clock-names = "pdm_gate", |
| "pdm_sysclk_srcpll", |
| "pdm_dclk_srcpll", |
| "pdm_dclk", |
| "pdm_sysclk", |
| "tdminlb_mpll", |
| "tdminlb_mclk"; |
| |
| /* datain src |
| * 0: tdmin_a; |
| * 1: tdmin_b; |
| * 2: tdmin_c; |
| * 3: spdifin; |
| * 4: pdmin; |
| */ |
| datain_src = <1>; |
| datain_chnum = <2>; |
| datain_chmask = <0x3>; |
| /* config which data pin for loopback */ |
| datain-lane-mask-in = <1 0 0 0>; |
| |
| /* calc mclk for datalb */ |
| mclk-fs = <256>; |
| |
| /* tdmin_lb src |
| * 0: tdmoutA |
| * 1: tdmoutB |
| * 2: tdmoutC |
| * 3: PAD_TDMINA_DIN*, refer to core pinmux |
| * 4: PAD_TDMINB_DIN*, refer to core pinmux |
| * 5: PAD_TDMINC_DIN*, refer to core pinmux |
| * 6: PAD_TDMINA_D*, oe, refer to core pinmux |
| * 7: PAD_TDMINB_D*, oe, refer to core pinmux |
| */ |
| /* if tdmin_lb >= 3, use external loopback */ |
| datalb_src = <1>; |
| datalb_chnum = <2>; |
| datalb_chmask = <0x3>; |
| /* config which data pin as loopback */ |
| datalb-lane-mask-in = <1 0 0 0>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| |
| status = "okay"; |
| }; |
| |
| aed:effect { |
| compatible = "amlogic, snd-effect-v3"; |
| #sound-dai-cells = <0>; |
| clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC |
| &clkc CLKID_FCLK_DIV3 |
| &clkaudio CLKID_AUDIO_EQDRC>; |
| clock-names = "gate", "srcpll", "eqdrc"; |
| /* |
| * 0:tdmout_a |
| * 1:tdmout_b |
| * 2:tdmout_c |
| * 3:spdifout |
| * 4:spdifout_b |
| */ |
| eqdrc_module = <1>; |
| /* max 0xf, each bit for one lane, usually one lane */ |
| lane_mask = <0x1>; |
| /* max 0xff, each bit for one channel */ |
| channel_mask = <0x3>; |
| power-domains = <&pwrdm PDID_AUDIO>; |
| status = "okay"; |
| }; |
| }; /* end of audiobus */ |
| /* Audio Related end */ |
| |
| &pinctrl_periphs { |
| /* Audio Related start */ |
| tdmout_a: tdmout_a { |
| mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */ |
| groups = "tdm_a_sclk", |
| "tdm_a_dout0"; |
| /* "tdm_a_fs",*/ |
| function = "tdm_a"; |
| }; |
| }; |
| |
| tdmin_a: tdmin_a { |
| mux { /* GPIOX_8 */ |
| groups = "tdm_a_din1"; |
| function = "tdm_a"; |
| }; |
| }; |
| |
| tdmb_mclk: tdmb_mclk { |
| mux { |
| groups = "mclk_0"; |
| function = "mclk_0"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| tdmout_b: tdmout_b { |
| mux { /* GPIOA_1, GPIOA_2, GPIOA_3 */ |
| groups = "tdm_b_sclk", |
| "tdm_b_fs", |
| "tdm_b_dout0"; |
| function = "tdm_b"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| tdmin_b:tdmin_b { |
| mux { /* GPIOA_7 */ |
| groups = "tdm_b_din0"; |
| function = "tdm_b"; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| spdifin: spdifin { |
| mux {/* GPIOF_6 */ |
| groups = "spdif_in_f6"; |
| function = "spdif_in"; |
| }; |
| }; |
| |
| pdmin: pdmin { |
| mux { /* GPIOA_6, GPIOA_7, GPIOA_8, GPIOA_9 */ |
| groups = |
| "pdm_din2_a", |
| "pdm_din1_a", |
| "pdm_din0_a", |
| "pdm_dclk"; |
| function = "pdm"; |
| }; |
| }; |
| |
| /* Audio Related end */ |
| |
| }; /* end of pinctrl_periphs */ |
| |
| &sd_emmc_a { |
| status = "okay"; |
| pinctrl-0 = <&sdio_pins>; |
| pinctrl-1 = <&sdio_clk_gate_pins>; |
| pinctrl-names = "default", "clk-gate"; |
| bus-width = <4>; |
| cap-sd-highspeed; |
| sd-uhs-sdr12; |
| sd-uhs-sdr25; |
| sd-uhs-sdr50; |
| sd-uhs-sdr104; |
| non-removable; |
| keep-power-in-suspend; |
| max-frequency = <200000000>; |
| disable-wp; |
| cap-sdio-irq; |
| card_type = <3>; |
| |
| }; |
| |
| &uart_B { |
| status = "okay"; |
| }; |
| |
| &spifc { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spifc_pins>; |
| spi-nand@0 { |
| compatible = "spi-nand"; |
| status = "okay"; |
| reg = <0>; |
| spi-max-frequency = <16000000>; |
| }; |
| }; |
| |
| &dwc2_a { |
| status = "okay"; |
| /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ |
| controller-type = <1>; |
| }; |
| |
| &usb0 { |
| status = "okay"; |
| }; |
| |
| &usb2_phy_v2 { |
| status = "okay"; |
| portnum = <1>; |
| }; |
| |
| &usb3_phy_v2 { |
| status = "okay"; |
| portnum = <0>; |
| }; |
