arch/arm64/boot/dts/amlogic/nq-b4.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
 * Device tree for NQ BX development board
 */

/dts-v1/;

#include "quartz-common.dtsi"

/ {
	model = "Google NQ B4 Development Board";

	memory@00000000 {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x40000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		secmon_reserved:linux,secmon {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x0 0x800000>;
			alignment = <0x0 0x400000>;
			alloc-ranges = <0x0 0x05000000 0x0 0x800000>;
		};

		dsp_fw_reserved:linux,dsp_fw {
			compatible = "amlogic, aml_dsp_memory";
			reusable;
			size = <0x0 0x900000>;
			alignment = <0x0 0x400000>;
			alloc-ranges = <0x0 0x6000000 0x0 0x900000>;
		};

		codec_mm_reserved:linux,codec_mm_reserved {
			compatible = "cnm, MultiEnc-mem";
			size = <0x0 0x4000000>;
			alignment = <0x0 0x400000>;
		};

		ion_cma_reserved:linux,ion-dev {
			compatible = "ion, private-mem";
			size = <0x0 0x7000000>;
			alignment = <0x0 0x400000>;
		};

		isp_cma_reserved:linux,isp_cma {
			compatible = "shared-dma-pool";
			reusable;
			status = "okay";
			size = <0x0 0x2400000>;
			alignment = <0x0 0x400000>;
		};

		// Shared the temper mem between rtos and kernel
		temper_reserved:linux,temper_reserved {
			compatible = "amlogic, aml_isp_shared_memory";
			status = "okay";
			size = <0x0 0x600000>;
			alloc-ranges = <0x0 0x15c00000 0x0 0x600000>;
		};

		// Shared the adapter mem between rtos and kernel
		adapt_cma_reserved:linux,adapt_cma {
			compatible = "amlogic, aml_isp_shared_memory";
			status = "okay";
			size = <0x0 0x1800000>;
			alignment = <0x0 0x400000>;
			alloc-ranges = <0x0 0x16800000 0x0 0x1800000>;
		};

		autocap_reserved:linux,autocap_reserved {
			compatible = "amlogic, aml_autocap_memory";
			status = "okay";
			size = <0x0 0x18000000>;
			alloc-ranges = <0x0 0x18000000 0x0 0x18000000>;
		};

		jpegenc_reserved:linux,jpegenc_reserved {
			compatible = "amlogic, jpegenc-memory";
			// To support  2048x2048
			// Buffer Needs: 0xe10000
			size = <0x0 0xe10000>;
		};
	};

	sensor: sensor {
		compatible = "soc, sensor";
		status = "okay";
		sensor-name = "imx307"; /*imx290;os08a10;imx227*/
		//pinctrl-names="default";
		//pinctrl-0=<&clk12_24_z_pins>;
		//clocks = <&clkc CLKID_24M>;
		//clock-names = "g12a_24m";
		clock-reg = <0xfe007cd4>;
		clock-bit = /bits/ 8 <7>;
		reset = <&gpio GPIOM_12 GPIO_ACTIVE_HIGH>;
	};

	iq: iq {
		compatible = "soc, iq";
		status = "okay";
		sensor-name = "imx307"; /*imx290;os08a10;imx227*/
		cali-file-path = "/factory/cam_param.txt";
	};
};

/*ISP temper-line-offset = width*3 */
/*width:  NQ:1920  GQ:1280 */
&isp {
	temper-line-offset = <5760>; /* default 1920*3 */
	temper-buf-size = <6>;
	temper-frame-num = <1>;
	temper-frame-size = <0x5EEC00>;
	temper-buf-base = <0x15c00000>; /* temper-buf base address */
};

&adapter {
	/* the address is consistent with the rtos. */
	adapter-buf-base = <0x16800000>;
	/* if we don't need debug, we can reduce the size. */
	/* 24M is for DEBUG feature: Normally: 4M is enough. */
	mem_alloc = <24>;
};

&phycsi {
	dphy-ctrl0-cfg = <0x123>;
	dphy-ctrl1-cfg = <0x123>;
};

/* SOC_I2C_ACCE (I2CM_C) at GPIOX_18, GPIOX_19 */
&i2c2 {
	status = "okay";
	pinctrl-names="default";
	pinctrl-0=<&i2c2_master_pins1>;
	clock-frequency = <100000>; /* default 100k */
};

/* SOC_I2C_1P8 (I2CM_D) at GPIOX_14, GPIOX_15 */
&i2c3 {
	status = "okay";
	pinctrl-names="default";
	pinctrl-0=<&i2c3_master_pins1>;
	clock-frequency = <100000>; /* default 100k */

	//ICR
	drv8830@64 {
		compatible = "ti,drv8830";
		reg = <0x64>;
		ti,vset_setting = <0x30>; /* 0x30 translates to 3.86v */
		ti,fault_gpio = <&gpio GPIOD_4 GPIO_ACTIVE_HIGH>;
		ti,polarity = <1>;
		ti,skip_init; /* Keep the original ICR position */
		/* Delay the probe after freertos exit */
		ti,rtos_probe_after_finish;
		pinctrl-0 = <&icr_int_default>;
		status = "okay";
	};

	//RGB Status Led
	lp5562: lp5562@30 {
		compatible = "ti,lp5562";
		reg = <0x30>;
		clock-mode = /bits/ 8 <1>;
		enable-gpio = <&gpio GPIOM_7 GPIO_ACTIVE_HIGH>;
		soft-init = /bits/ 8 <1>;
		chan0 {
			chan-name = "status-R";
			led-cur = /bits/ 8 <0x20>;
			max-cur = /bits/ 8 <0xff>;
		};
		chan1 {
			chan-name = "status-G";
			led-cur = /bits/ 8 <0x20>;
			max-cur = /bits/ 8 <0xff>;
		};
		chan2 {
			chan-name = "status-B";
			led-cur = /bits/ 8 <0x20>;
			max-cur = /bits/ 8 <0xff>;
		};
	};
};

&uart_B {
	status = "disabled";
};

&pinctrl_periphs {
	e_uart_pins2:e_uart2 {
		mux {
			groups = "uart_e_tx_m",
				"uart_e_rx_m",
				"uart_e_rts";
			function = "uart_e";
		};
		mux1 {
			groups = "uart_e_cts";
			function = "uart_e";
			bias-pull-up;
		};

		mux2 {
			// Set UART_B (the primary UART) RX/TX pins as
			// GPIO input/No pull
			groups = "GPIOD_0", "GPIOD_1";
			function = "gpio_periphs";
			input-enable;
			bias-disable;
		};
	};
}; /* end of pinctrl_periphs */