| /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ |
| /* |
| * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| */ |
| |
| #ifndef _SYSTEM_AUTO_WRITE_H_ |
| #define _SYSTEM_AUTO_WRITE_H_ |
| |
| #define MIPI_BL_PING_ADDR0_ST 0x00 |
| #define MIPI_BL_PING_ADDR0_ED 0x04 |
| #define MIPI_BL_PING_ADDR1_ST 0x08 |
| #define MIPI_BL_PING_ADDR1_ED 0x0C |
| #define MIPI_BL_PONG_ADDR0_ST 0x10 |
| #define MIPI_BL_PONG_ADDR0_ED 0x14 |
| #define MIPI_BL_PONG_ADDR1_ST 0x18 |
| #define MIPI_BL_PONG_ADDR1_ED 0x1C |
| #define MIPI_BL_FRAME_TH 0x20 |
| #define MIPI_BL_FRAME_BUFFER_START_ADDR0 0x24 |
| #define MIPI_BL_FRAME_SIZE0 0x28 |
| #define MIPI_BL_FRAME_BUF_SIZE0 0x2c |
| #define MIPI_BL_FRAME_BUFFER_START_ADDR1 0x30 |
| #define MIPI_BL_FRAME_SIZE1 0x34 |
| #define MIPI_BL_FRAME_BUF_SIZE1 0x38 |
| #define MIPI_BL_CTRL0 0x3c |
| #define MIPI_BL_CTRL1 0x40 |
| #define MIPI_BL_COUNT 0x44 |
| #define MIPI_BL_AWADDR_0 0x48 |
| #define MIPI_BL_AWADDR_I 0x4c |
| #define MIPI_BL_STAT0 0x50 |
| #define MIPI_BL_STAT1 0x54 |
| #define MIPI_BL_STAT2 0x58 |
| #define MIPI_BL_STAT3 0x5c |
| #define MIPI_BL_FRAME_BUFFER_START_ADDR0P 0x60 |
| |
| #define GDC_CFG_BIN_NAME_SIZE 128 |
| |
| enum autowr_path_type { |
| AUTOWR_FR_PATH, |
| AUTOWR_DS1_PATH, |
| AUTOWR_DS2_PATH, |
| AUTOWR_MAX_PATH |
| }; |
| |
| struct autowr_frm_info { |
| u32 path_type; |
| u32 frame_idx; |
| u32 input_addr; |
| u32 output_addr; |
| }; |
| |
| struct autowr_frmbuf_info { |
| u32 path_type; |
| u32 frmbuf_base; |
| u32 frmbuf_size; |
| u32 frm_size; |
| }; |
| |
| struct autowr_gdc_cfg { |
| u32 path_type; |
| u32 format; |
| char cfg_name[GDC_CFG_BIN_NAME_SIZE]; |
| u32 i_width; |
| u32 i_height; |
| u32 o_width; |
| u32 o_height; |
| }; |
| |
| struct autowr_dev_base { |
| void *pdev; |
| struct mutex pmutex; /* protect access to mmap */ |
| u32 f_mmap; |
| void __iomem *fr_base; |
| void __iomem *ds1_base; |
| void __iomem *ds2_base; |
| u32 fr_frmbuf_base; |
| u32 ds1_frmbuf_base; |
| u32 ds2_frmbuf_base; |
| void *fr_g_ctx; |
| void *fr_g_set; |
| void *ds1_g_ctx; |
| void *ds1_g_set; |
| void *ds2_g_ctx; |
| void *ds2_g_set; |
| }; |
| |
| int autowr_get_frmbuf_info(void *base, void *frmbuf_info); |
| int autowr_mmap_frmbuf_base(void *base, void *p_vma); |
| int autowr_get_frminfo(void *base, void *frm_info); |
| int autowr_stop_capture(void *base, void *frm_info); |
| |
| #endif |