blob: 50544ee5d1f2de5ce346c545966dd595ce4384f2 [file] [log] [blame]
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
*/
#define PDID_CPU_PWR0 0
#define PDID_CPU_CORE0 1
#define PDID_CPU_CORE1 2
#define PDID_SPTOP 5
#define PDID_DSP_A 8
#define PDID_DSP_B 9
#define PDID_UART 10
#define PDID_DMC 11
#define PDID_I2C 12
#define PDID_SDEMMC_B 13
#define PDID_ACODEC 14
#define PDID_AUDIO 15
#define PDID_MKL_OTP 16
#define PDID_DMA 17
#define PDID_SDEMMC_A 18
#define PDID_SRAM_A 19
#define PDID_SRAM_B 20
#define PDID_IR 21
#define PDID_SPICC 22
#define PDID_SPIFC 23
#define PDID_USB 24
#define PDID_NIC 25
#define PDID_PDM 26
#define PDID_RSA 27
#define PDID_MIPI_ISP 28
#define PDID_HCODEC 29
#define PDID_WAVE 30
#define PDID_SDEMMC_C 31
#define PDID_SRAM_C 32
#define PDID_GDC 33
#define PDID_GE2D 34
#define PDID_NNA 35
#define PDID_ETH 36
#define PDID_GIC 37
#define PDID_DDR 38
#define PDID_SPICC_B 39
#define PDID_MAX 40