include/linux/amlogic/rtosfmw.h

/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
 */

#ifndef _RTOSFMW_H_
#define _RTOSFMW_H_

enum rtosfmw_type {
	RFT_SECPU = 0,
	RFT_MAX
};

enum msg_direction {
	ARM2SECPU = 0,  // Write
	SECPU2ARM       // Read
};

// secpu source code project
// demos/amlogic/include/rpc-user.h"
enum secpu_cmd_list {
	MBX_CMD_RPCUINTREE_TEST = 0x6,
	MBX_CMD_RPCUINTTEE_TEST = 0x7,
	MBX_CMD_SPI_CFG_RW = 0x13,
};

#define SECPU_MSG_LEN 20

struct uintcase {
	char data[SECPU_MSG_LEN];
	u32 ultaskdelay;
};

struct secpu_spi_device {
	u32 max_speed_hz;
	u16 mode;
	u8  bits_per_word;
	u8  direction;
};

struct secpu_msg_buf {
	char send_msg[SECPU_MSG_LEN];
	char rev_msg[SECPU_MSG_LEN];
};

#define SECPU_IOC_MAGIC	'W'
#define REE_SECPU_MSG		_IOWR(SECPU_IOC_MAGIC, \
					0x00, struct uintcase)
#define TEE_SECPU_MSG		_IOWR(SECPU_IOC_MAGIC, \
					0x01, struct uintcase)
#define TRIGGER_SECPU_RUN	_IOWR(SECPU_IOC_MAGIC, \
					0x02, struct uintcase)
#define GET_RUN_STATUS		_IOWR(SECPU_IOC_MAGIC, \
					0x03, struct uintcase)

#define SPI_MODE_WR_32		_IOWR(SECPU_IOC_MAGIC, \
					0x04, u32)
#define SPI_MODE_RD_32		_IOWR(SECPU_IOC_MAGIC, \
					0x05, u32)
#define SPI_BITS_PER_WORD_WR	_IOWR(SECPU_IOC_MAGIC, \
					0x06, u8)
#define SPI_BITS_PER_WORD_RD	_IOWR(SECPU_IOC_MAGIC, \
					0x07, u8)
#define SPI_MAX_SPEED_HZ_WR	_IOWR(SECPU_IOC_MAGIC, \
					0x08, u32)
#define SPI_MAX_SPEED_HZ_RD	_IOWR(SECPU_IOC_MAGIC, \
					0x09, u32)
#define SPI_CFG_WR		_IOWR(SECPU_IOC_MAGIC, \
					0x0a, struct secpu_spi_device)
#define SPI_CFG_RD		_IOWR(SECPU_IOC_MAGIC, \
					0x0b, struct secpu_spi_device)

int aml_rtosfmw_run(enum rtosfmw_type type, const char *name);
#endif