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<div class="titlepage"><div><div><h2 class="title" style="clear: both">
<a name="coroutine.performance"></a><a class="link" href="performance.html" title="Performance">Performance</a>
</h2></div></div></div>
<p>
Performance of <span class="bold"><strong>Boost.Coroutine</strong></span> was measured
on the platforms shown in the following table. Performance measurements were
taken using <code class="computeroutput"><span class="identifier">rdtsc</span></code> and <code class="computeroutput"><span class="identifier">boost</span><span class="special">::</span><span class="identifier">chrono</span><span class="special">::</span><span class="identifier">high_resolution_clock</span></code>,
with overhead corrections, on x86 platforms. In each case, cache warm-up was
accounted for, and the one running thread was pinned to a single CPU.
</p>
<div class="table">
<a name="coroutine.performance.performance_of_asymmetric_coroutines"></a><p class="title"><b>Table&#160;1.1.&#160;Performance of asymmetric coroutines</b></p>
<div class="table-contents"><table class="table" summary="Performance of asymmetric coroutines">
<colgroup>
<col>
<col>
<col>
<col>
<col>
</colgroup>
<thead><tr>
<th>
<p>
Platform
</p>
</th>
<th>
<p>
switch
</p>
</th>
<th>
<p>
construction (protected stack-allocator)
</p>
</th>
<th>
<p>
construction (preallocated stack-allocator)
</p>
</th>
<th>
<p>
construction (standard stack-allocator)
</p>
</th>
</tr></thead>
<tbody>
<tr>
<td>
<p>
i386 (AMD Athlon 64 DualCore 4400+, Linux 32bit)
</p>
</td>
<td>
<p>
49 ns / 50 cycles
</p>
</td>
<td>
<p>
51 &#181;s / 51407 cycles
</p>
</td>
<td>
<p>
14 &#181;s / 15231 cycles
</p>
</td>
<td>
<p>
14 &#181;s / 15216 cycles
</p>
</td>
</tr>
<tr>
<td>
<p>
x86_64 (Intel Core2 Q6700, Linux 64bit)
</p>
</td>
<td>
<p>
12 ns / 39 cycles
</p>
</td>
<td>
<p>
16 &#181;s / 41802 cycles
</p>
</td>
<td>
<p>
6 &#181;s / 10350 cycles
</p>
</td>
<td>
<p>
6 &#181;s / 18817 cycles
</p>
</td>
</tr>
</tbody>
</table></div>
</div>
<br class="table-break"><div class="table">
<a name="coroutine.performance.performance_of_symmetric_coroutines"></a><p class="title"><b>Table&#160;1.2.&#160;Performance of symmetric coroutines</b></p>
<div class="table-contents"><table class="table" summary="Performance of symmetric coroutines">
<colgroup>
<col>
<col>
<col>
<col>
<col>
</colgroup>
<thead><tr>
<th>
<p>
Platform
</p>
</th>
<th>
<p>
switch
</p>
</th>
<th>
<p>
construction (protected stack-allocator)
</p>
</th>
<th>
<p>
construction (preallocated stack-allocator)
</p>
</th>
<th>
<p>
construction (standard stack-allocator)
</p>
</th>
</tr></thead>
<tbody>
<tr>
<td>
<p>
i386 (AMD Athlon 64 DualCore 4400+, Linux 32bit)
</p>
</td>
<td>
<p>
47 ns / 49 cycles
</p>
</td>
<td>
<p>
27 &#181;s / 28002 cycles
</p>
</td>
<td>
<p>
98 ns / 116 cycles
</p>
</td>
<td>
<p>
319 ns / 328 cycles
</p>
</td>
</tr>
<tr>
<td>
<p>
x86_64 (Intel Core2 Q6700, Linux 64bit)
</p>
</td>
<td>
<p>
10 ns / 33 cycles
</p>
</td>
<td>
<p>
10 &#181;s / 22828 cycles
</p>
</td>
<td>
<p>
42 ns / 710 cycles
</p>
</td>
<td>
<p>
135 ns / 362 cycles
</p>
</td>
</tr>
</tbody>
</table></div>
</div>
<br class="table-break">
</div>
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<td align="left"></td>
<td align="right"><div class="copyright-footer">Copyright &#169; 2009 Oliver Kowalke<p>
Distributed under the Boost Software License, Version 1.0. (See accompanying
file LICENSE_1_0.txt or copy at <a href="http://www.boost.org/LICENSE_1_0.txt" target="_top">http://www.boost.org/LICENSE_1_0.txt</a>)
</p>
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