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| <h4 class="subsection">9.33.1 Options</h4> |
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| <p><a name="index-SH-options-1565"></a><a name="index-options_002c-SH-1566"></a><code>as</code> has following command-line options for the Renesas |
| (formerly Hitachi) / SuperH SH family. |
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| <a name="index-g_t_002d_002dlittle-1567"></a> |
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| <a name="index-g_t_002d_002drelax-1569"></a> |
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| <a name="index-g_t_002d_002drenesas-1572"></a> |
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| <dl> |
| <dt><code>--little</code><dd>Generate little endian code. |
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| <br><dt><code>--big</code><dd>Generate big endian code. |
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| <br><dt><code>--relax</code><dd>Alter jump instructions for long displacements. |
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| <br><dt><code>--small</code><dd>Align sections to 4 byte boundaries, not 16. |
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| <br><dt><code>--dsp</code><dd>Enable sh-dsp insns, and disable sh3e / sh4 insns. |
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| <br><dt><code>--renesas</code><dd>Disable optimization with section symbol for compatibility with |
| Renesas assembler. |
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| <br><dt><code>--allow-reg-prefix</code><dd>Allow '$' as a register name prefix. |
| |
| <p><a name="index-g_t_002d_002dfdpic-1574"></a><br><dt><code>--fdpic</code><dd>Generate an FDPIC object file. |
| |
| <br><dt><code>--isa=sh4 | sh4a</code><dd>Specify the sh4 or sh4a instruction set. |
| <br><dt><code>--isa=dsp</code><dd>Enable sh-dsp insns, and disable sh3e / sh4 insns. |
| <br><dt><code>--isa=fp</code><dd>Enable sh2e, sh3e, sh4, and sh4a insn sets. |
| <br><dt><code>--isa=all</code><dd>Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. |
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| <br><dt><code>-h-tick-hex</code><dd>Support H'00 style hex constants in addition to 0x00 style. |
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