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| <h4 class="subsection">9.3.5 Opcodes</h4> |
| |
| <p><a name="index-ARM-opcodes-652"></a><a name="index-opcodes-for-ARM-653"></a><code>as</code> implements all the standard ARM opcodes. It also |
| implements several pseudo opcodes, including several synthetic load |
| instructions. |
| |
| |
| <a name="index-g_t_0040code_007bNOP_007d-pseudo-op_002c-ARM-654"></a> |
| <dl><dt><code>NOP</code><dd> |
| <pre class="smallexample"> nop |
| </pre> |
| <p>This pseudo op will always evaluate to a legal ARM instruction that does |
| nothing. Currently it will evaluate to MOV r0, r0. |
| |
| <p><a name="index-g_t_0040code_007bLDR-reg_002c_003d_003clabel_003e_007d-pseudo-op_002c-ARM-655"></a><br><dt><code>LDR</code><dd> |
| <pre class="smallexample"> ldr <register> , = <expression> |
| </pre> |
| <p>If expression evaluates to a numeric constant then a MOV or MVN |
| instruction will be used in place of the LDR instruction, if the |
| constant can be generated by either of these instructions. Otherwise |
| the constant will be placed into the nearest literal pool (if it not |
| already there) and a PC relative LDR instruction will be generated. |
| |
| <p><a name="index-g_t_0040code_007bADR-reg_002c_003clabel_003e_007d-pseudo-op_002c-ARM-656"></a><br><dt><code>ADR</code><dd> |
| <pre class="smallexample"> adr <register> <label> |
| </pre> |
| <p>This instruction will load the address of <var>label</var> into the indicated |
| register. The instruction will evaluate to a PC relative ADD or SUB |
| instruction depending upon where the label is located. If the label is |
| out of range, or if it is not defined in the same file (and section) as |
| the ADR instruction, then an error will be generated. This instruction |
| will not make use of the literal pool. |
| |
| <p><a name="index-g_t_0040code_007bADRL-reg_002c_003clabel_003e_007d-pseudo-op_002c-ARM-657"></a><br><dt><code>ADRL</code><dd> |
| <pre class="smallexample"> adrl <register> <label> |
| </pre> |
| <p>This instruction will load the address of <var>label</var> into the indicated |
| register. The instruction will evaluate to one or two PC relative ADD |
| or SUB instructions depending upon where the label is located. If a |
| second instruction is not needed a NOP instruction will be generated in |
| its place, so that this instruction is always 8 bytes long. |
| |
| <p>If the label is out of range, or if it is not defined in the same file |
| (and section) as the ADRL instruction, then an error will be generated. |
| This instruction will not make use of the literal pool. |
| |
| </dl> |
| |
| <p>For information on the ARM or Thumb instruction sets, see <cite>ARM |
| Software Development Toolkit Reference Manual</cite>, Advanced RISC Machines |
| Ltd. |
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