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| <h4 class="subsection">9.6.1 CR16 Operand Qualifiers</h4> |
| |
| <p><a name="index-CR16-Operand-Qualifiers-694"></a> |
| The National Semiconductor CR16 target of <code>as</code> has a few machine dependent operand qualifiers. |
| |
| <p>Operand expression type qualifier is an optional field in the instruction operand, to determines the type of the expression field of an operand. The <code>@</code> is required. CR16 architecture uses one of the following expression qualifiers: |
| |
| <dl> |
| <dt><code>s</code><dd>- <code>Specifies expression operand type as small</code> |
| <br><dt><code>m</code><dd>- <code>Specifies expression operand type as medium</code> |
| <br><dt><code>l</code><dd>- <code>Specifies expression operand type as large</code> |
| <br><dt><code>c</code><dd>- <code>Specifies the CR16 Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.</code> |
| <br><dt><code>got/GOT</code><dd>- <code>Specifies the CR16 Assembler generates a relocation entry for the operand, offset from Global Offset Table. The linker uses this relocation entry to update the operand address at link time</code> |
| <br><dt><code>cgot/cGOT</code><dd>- <code>Specifies the CompactRISC Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.</code> |
| </dl> |
| |
| <p>CR16 target operand qualifiers and its size (in bits): |
| |
| <dl> |
| <dt>‘<samp><span class="samp">Immediate Operand</span></samp>’<dd>- s —– 4 bits |
| <br><dt>‘<samp></samp>’<dd>- m —– 16 bits, for movb and movw instructions. |
| <br><dt>‘<samp></samp>’<dd>- m —– 20 bits, movd instructions. |
| <br><dt>‘<samp></samp>’<dd>- l —– 32 bits |
| |
| <br><dt>‘<samp><span class="samp">Absolute Operand</span></samp>’<dd>- s —– Illegal specifier for this operand. |
| <br><dt>‘<samp></samp>’<dd>- m —– 20 bits, movd instructions. |
| |
| <br><dt>‘<samp><span class="samp">Displacement Operand</span></samp>’<dd>- s —– 8 bits |
| <br><dt>‘<samp></samp>’<dd>- m —– 16 bits |
| <br><dt>‘<samp></samp>’<dd>- l —– 24 bits |
| </dl> |
| |
| <p>For example: |
| <pre class="example"> 1 <code>movw $_myfun@c,r1</code> |
| |
| This loads the address of _myfun, shifted right by 1, into r1. |
| |
| 2 <code>movd $_myfun@c,(r2,r1)</code> |
| |
| This loads the address of _myfun, shifted right by 1, into register-pair r2-r1. |
| |
| 3 <code>_myfun_ptr:</code> |
| <code>.long _myfun@c</code> |
| <code>loadd _myfun_ptr, (r1,r0)</code> |
| <code>jal (r1,r0)</code> |
| |
| This .long directive, the address of _myfunc, shifted right by 1 at link time. |
| |
| 4 <code>loadd _data1@GOT(r12), (r1,r0)</code> |
| |
| This loads the address of _data1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r2-r1. |
| |
| 5 <code>loadd _myfunc@cGOT(r12), (r1,r0)</code> |
| |
| This loads the address of _myfun, shifted right by 1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r1-r0. |
| </pre> |
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