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<h5 class="subsubsection">9.42.4.3 Other Immediate Field Relaxation</h5>
<p><a name="index-immediate-fields_002c-relaxation-2029"></a><a name="index-relaxation-of-immediate-fields-2030"></a>
The assembler normally performs the following other relaxations. They
can be disabled by using underscore prefixes (see <a href="Xtensa-Opcodes.html#Xtensa-Opcodes">Opcode Names</a>), the &lsquo;<samp><span class="samp">--no-transform</span></samp>&rsquo; command-line option
(see <a href="Xtensa-Options.html#Xtensa-Options">Command Line Options</a>), or the
<code>no-transform</code> directive (see <a href="Transform-Directive.html#Transform-Directive">transform</a>).
<p><a name="index-g_t_0040code_007bMOVI_007d-instructions_002c-relaxation-2031"></a><a name="index-relaxation-of-_0040code_007bMOVI_007d-instructions-2032"></a>The <code>MOVI</code> machine instruction can only materialize values in the
range from -2048 to 2047. Values outside this range are best
materialized with <code>L32R</code> instructions. Thus:
<pre class="smallexample"> movi a0, 100000
</pre>
<p>is assembled into the following machine code:
<pre class="smallexample"> .literal .L1, 100000
l32r a0, .L1
</pre>
<p><a name="index-g_t_0040code_007bL8UI_007d-instructions_002c-relaxation-2033"></a><a name="index-g_t_0040code_007bL16SI_007d-instructions_002c-relaxation-2034"></a><a name="index-g_t_0040code_007bL16UI_007d-instructions_002c-relaxation-2035"></a><a name="index-g_t_0040code_007bL32I_007d-instructions_002c-relaxation-2036"></a><a name="index-relaxation-of-_0040code_007bL8UI_007d-instructions-2037"></a><a name="index-relaxation-of-_0040code_007bL16SI_007d-instructions-2038"></a><a name="index-relaxation-of-_0040code_007bL16UI_007d-instructions-2039"></a><a name="index-relaxation-of-_0040code_007bL32I_007d-instructions-2040"></a>The <code>L8UI</code> machine instruction can only be used with immediate
offsets in the range from 0 to 255. The <code>L16SI</code> and <code>L16UI</code>
machine instructions can only be used with offsets from 0 to 510. The
<code>L32I</code> machine instruction can only be used with offsets from 0 to
1020. A load offset outside these ranges can be materialized with
an <code>L32R</code> instruction if the destination register of the load
is different than the source address register. For example:
<pre class="smallexample"> l32i a1, a0, 2040
</pre>
<p>is translated to:
<pre class="smallexample"> .literal .L1, 2040
l32r a1, .L1
add a1, a0, a1
l32i a1, a1, 0
</pre>
<p class="noindent">If the load destination and source address register are the same, an
out-of-range offset causes an error.
<p><a name="index-g_t_0040code_007bADDI_007d-instructions_002c-relaxation-2041"></a><a name="index-relaxation-of-_0040code_007bADDI_007d-instructions-2042"></a>The Xtensa <code>ADDI</code> instruction only allows immediate operands in the
range from -128 to 127. There are a number of alternate instruction
sequences for the <code>ADDI</code> operation. First, if the
immediate is 0, the <code>ADDI</code> will be turned into a <code>MOV.N</code>
instruction (or the equivalent <code>OR</code> instruction if the code density
option is not available). If the <code>ADDI</code> immediate is outside of
the range -128 to 127, but inside the range -32896 to 32639, an
<code>ADDMI</code> instruction or <code>ADDMI</code>/<code>ADDI</code> sequence will be
used. Finally, if the immediate is outside of this range and a free
register is available, an <code>L32R</code>/<code>ADD</code> sequence will be used
with a literal allocated from the literal pool.
<p>For example:
<pre class="smallexample"> addi a5, a6, 0
addi a5, a6, 512
addi a5, a6, 513
addi a5, a6, 50000
</pre>
<p>is assembled into the following:
<pre class="smallexample"> .literal .L1, 50000
mov.n a5, a6
addmi a5, a6, 0x200
addmi a5, a6, 0x200
addi a5, a5, 1
l32r a5, .L1
add a5, a6, a5
</pre>
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