blob: 97ec6443f45936c99128958f4ac445612fbd6e8e [file] [log] [blame]
<html lang="en">
<head>
<title>i386-Syntax - Using as</title>
<meta http-equiv="Content-Type" content="text/html">
<meta name="description" content="Using as">
<meta name="generator" content="makeinfo 4.13">
<link title="Top" rel="start" href="index.html#Top">
<link rel="up" href="i386_002dDependent.html#i386_002dDependent" title="i386-Dependent">
<link rel="prev" href="i386_002dDirectives.html#i386_002dDirectives" title="i386-Directives">
<link rel="next" href="i386_002dMnemonics.html#i386_002dMnemonics" title="i386-Mnemonics">
<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
<!--
This file documents the GNU Assembler "as".
Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
2000, 2001, 2002, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
or any later version published by the Free Software Foundation;
with no Invariant Sections, with no Front-Cover Texts, and with no
Back-Cover Texts. A copy of the license is included in the
section entitled ``GNU Free Documentation License''.
-->
<meta http-equiv="Content-Style-Type" content="text/css">
<style type="text/css"><!--
pre.display { font-family:inherit }
pre.format { font-family:inherit }
pre.smalldisplay { font-family:inherit; font-size:smaller }
pre.smallformat { font-family:inherit; font-size:smaller }
pre.smallexample { font-size:smaller }
pre.smalllisp { font-size:smaller }
span.sc { font-variant:small-caps }
span.roman { font-family:serif; font-weight:normal; }
span.sansserif { font-family:sans-serif; font-weight:normal; }
--></style>
<link rel="stylesheet" type="text/css" href="../cs.css">
</head>
<body>
<div class="node">
<a name="i386-Syntax"></a>
<a name="i386_002dSyntax"></a>
<p>
Next:&nbsp;<a rel="next" accesskey="n" href="i386_002dMnemonics.html#i386_002dMnemonics">i386-Mnemonics</a>,
Previous:&nbsp;<a rel="previous" accesskey="p" href="i386_002dDirectives.html#i386_002dDirectives">i386-Directives</a>,
Up:&nbsp;<a rel="up" accesskey="u" href="i386_002dDependent.html#i386_002dDependent">i386-Dependent</a>
<hr>
</div>
<h4 class="subsection">9.13.3 AT&amp;T Syntax versus Intel Syntax</h4>
<p><a name="index-i386-intel_005fsyntax-pseudo-op-872"></a><a name="index-intel_005fsyntax-pseudo-op_002c-i386-873"></a><a name="index-i386-att_005fsyntax-pseudo-op-874"></a><a name="index-att_005fsyntax-pseudo-op_002c-i386-875"></a><a name="index-i386-syntax-compatibility-876"></a><a name="index-syntax-compatibility_002c-i386-877"></a><a name="index-x86_002d64-intel_005fsyntax-pseudo-op-878"></a><a name="index-intel_005fsyntax-pseudo-op_002c-x86_002d64-879"></a><a name="index-x86_002d64-att_005fsyntax-pseudo-op-880"></a><a name="index-att_005fsyntax-pseudo-op_002c-x86_002d64-881"></a><a name="index-x86_002d64-syntax-compatibility-882"></a><a name="index-syntax-compatibility_002c-x86_002d64-883"></a>
<code>as</code> now supports assembly using Intel assembler syntax.
<code>.intel_syntax</code> selects Intel mode, and <code>.att_syntax</code> switches
back to the usual AT&amp;T mode for compatibility with the output of
<code>gcc</code>. Either of these directives may have an optional
argument, <code>prefix</code>, or <code>noprefix</code> specifying whether registers
require a &lsquo;<samp><span class="samp">%</span></samp>&rsquo; prefix. AT&amp;T System V/386 assembler syntax is quite
different from Intel syntax. We mention these differences because
almost all 80386 documents use Intel syntax. Notable differences
between the two syntaxes are:
<p><a name="index-immediate-operands_002c-i386-884"></a><a name="index-i386-immediate-operands-885"></a><a name="index-register-operands_002c-i386-886"></a><a name="index-i386-register-operands-887"></a><a name="index-jump_002fcall-operands_002c-i386-888"></a><a name="index-i386-jump_002fcall-operands-889"></a><a name="index-operand-delimiters_002c-i386-890"></a>
<a name="index-immediate-operands_002c-x86_002d64-891"></a><a name="index-x86_002d64-immediate-operands-892"></a><a name="index-register-operands_002c-x86_002d64-893"></a><a name="index-x86_002d64-register-operands-894"></a><a name="index-jump_002fcall-operands_002c-x86_002d64-895"></a><a name="index-x86_002d64-jump_002fcall-operands-896"></a><a name="index-operand-delimiters_002c-x86_002d64-897"></a>
<ul>
<li>AT&amp;T immediate operands are preceded by &lsquo;<samp><span class="samp">$</span></samp>&rsquo;; Intel immediate
operands are undelimited (Intel &lsquo;<samp><span class="samp">push 4</span></samp>&rsquo; is AT&amp;T &lsquo;<samp><span class="samp">pushl $4</span></samp>&rsquo;).
AT&amp;T register operands are preceded by &lsquo;<samp><span class="samp">%</span></samp>&rsquo;; Intel register operands
are undelimited. AT&amp;T absolute (as opposed to PC relative) jump/call
operands are prefixed by &lsquo;<samp><span class="samp">*</span></samp>&rsquo;; they are undelimited in Intel syntax.
<p><a name="index-i386-source_002c-destination-operands-898"></a><a name="index-source_002c-destination-operands_003b-i386-899"></a><a name="index-x86_002d64-source_002c-destination-operands-900"></a><a name="index-source_002c-destination-operands_003b-x86_002d64-901"></a><li>AT&amp;T and Intel syntax use the opposite order for source and destination
operands. Intel &lsquo;<samp><span class="samp">add eax, 4</span></samp>&rsquo; is &lsquo;<samp><span class="samp">addl $4, %eax</span></samp>&rsquo;. The
&lsquo;<samp><span class="samp">source, dest</span></samp>&rsquo; convention is maintained for compatibility with
previous Unix assemblers. Note that &lsquo;<samp><span class="samp">bound</span></samp>&rsquo;, &lsquo;<samp><span class="samp">invlpga</span></samp>&rsquo;, and
instructions with 2 immediate operands, such as the &lsquo;<samp><span class="samp">enter</span></samp>&rsquo;
instruction, do <em>not</em> have reversed order. <a href="i386_002dBugs.html#i386_002dBugs">i386-Bugs</a>.
<p><a name="index-mnemonic-suffixes_002c-i386-902"></a><a name="index-sizes-operands_002c-i386-903"></a><a name="index-i386-size-suffixes-904"></a><a name="index-mnemonic-suffixes_002c-x86_002d64-905"></a><a name="index-sizes-operands_002c-x86_002d64-906"></a><a name="index-x86_002d64-size-suffixes-907"></a><li>In AT&amp;T syntax the size of memory operands is determined from the last
character of the instruction mnemonic. Mnemonic suffixes of &lsquo;<samp><span class="samp">b</span></samp>&rsquo;,
&lsquo;<samp><span class="samp">w</span></samp>&rsquo;, &lsquo;<samp><span class="samp">l</span></samp>&rsquo; and &lsquo;<samp><span class="samp">q</span></samp>&rsquo; specify byte (8-bit), word (16-bit), long
(32-bit) and quadruple word (64-bit) memory references. Intel syntax accomplishes
this by prefixing memory operands (<em>not</em> the instruction mnemonics) with
&lsquo;<samp><span class="samp">byte ptr</span></samp>&rsquo;, &lsquo;<samp><span class="samp">word ptr</span></samp>&rsquo;, &lsquo;<samp><span class="samp">dword ptr</span></samp>&rsquo; and &lsquo;<samp><span class="samp">qword ptr</span></samp>&rsquo;. Thus,
Intel &lsquo;<samp><span class="samp">mov al, byte ptr </span><var>foo</var></samp>&rsquo; is &lsquo;<samp><span class="samp">movb </span><var>foo</var><span class="samp">, %al</span></samp>&rsquo; in AT&amp;T
syntax.
<p>In 64-bit code, &lsquo;<samp><span class="samp">movabs</span></samp>&rsquo; can be used to encode the &lsquo;<samp><span class="samp">mov</span></samp>&rsquo;
instruction with the 64-bit displacement or immediate operand.
<p><a name="index-return-instructions_002c-i386-908"></a><a name="index-i386-jump_002c-call_002c-return-909"></a><a name="index-return-instructions_002c-x86_002d64-910"></a><a name="index-x86_002d64-jump_002c-call_002c-return-911"></a><li>Immediate form long jumps and calls are
&lsquo;<samp><span class="samp">lcall/ljmp $</span><var>section</var><span class="samp">, $</span><var>offset</var></samp>&rsquo; in AT&amp;T syntax; the
Intel syntax is
&lsquo;<samp><span class="samp">call/jmp far </span><var>section</var><span class="samp">:</span><var>offset</var></samp>&rsquo;. Also, the far return
instruction
is &lsquo;<samp><span class="samp">lret $</span><var>stack-adjust</var></samp>&rsquo; in AT&amp;T syntax; Intel syntax is
&lsquo;<samp><span class="samp">ret far </span><var>stack-adjust</var></samp>&rsquo;.
<p><a name="index-sections_002c-i386-912"></a><a name="index-i386-sections-913"></a><a name="index-sections_002c-x86_002d64-914"></a><a name="index-x86_002d64-sections-915"></a><li>The AT&amp;T assembler does not provide support for multiple section
programs. Unix style systems expect all programs to be single sections.
</ul>
</body></html>