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| <h4 class="subsection">21.3.11 Zilog Z8000</h4> |
| |
| <p><a name="index-Z8000-1377"></a><a name="index-simulator_002c-Z8000-1378"></a><a name="index-Zilog-Z8000-simulator-1379"></a> |
| When configured for debugging Zilog Z8000 targets, <span class="sc">gdb</span> includes |
| a Z8000 simulator. |
| |
| <p>For the Z8000 family, ‘<samp><span class="samp">target sim</span></samp>’ simulates either the Z8002 (the |
| unsegmented variant of the Z8000 architecture) or the Z8001 (the |
| segmented variant). The simulator recognizes which architecture is |
| appropriate by inspecting the object code. |
| |
| <dl> |
| <dt><code>target sim </code><var>args</var><dd><a name="index-sim-1380"></a><a name="index-target-sim_0040r_007b_002c-with-Z8000_007d-1381"></a>Debug programs on a simulated CPU. If the simulator supports setup |
| options, specify them via <var>args</var>. |
| </dl> |
| |
| <p class="noindent">After specifying this target, you can debug programs for the simulated |
| CPU in the same style as programs for your host computer; use the |
| <code>file</code> command to load a new program image, the <code>run</code> command |
| to run your program, and so on. |
| |
| <p>As well as making available all the usual machine registers |
| (see <a href="Registers.html#Registers">Registers</a>), the Z8000 simulator provides three |
| additional items of information as specially named registers: |
| |
| <dl> |
| <dt><code>cycles</code><dd>Counts clock-ticks in the simulator. |
| |
| <br><dt><code>insts</code><dd>Counts instructions run in the simulator. |
| |
| <br><dt><code>time</code><dd>Execution time in 60ths of a second. |
| |
| </dl> |
| |
| <p>You can refer to these values in <span class="sc">gdb</span> expressions with the usual |
| conventions; for example, ‘<samp><span class="samp">b fputc if $cycles>5000</span></samp>’<!-- /@w --> sets a |
| conditional breakpoint that suspends only after at least 5000 |
| simulated clock ticks. |
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