/** | |
****************************************************************************** | |
* @file stm32f0xx_syscfg.h | |
* @author MCD Application Team | |
* @version V1.0.0RC1 | |
* @date 27-January-2012 | |
* @brief This file contains all the functions prototypes for the SYSCFG firmware | |
* library. | |
****************************************************************************** | |
* @attention | |
* | |
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | |
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | |
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | |
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | |
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
* | |
* FOR MORE INFORMATION PLEASE READ CAREFULLY THE LICENSE AGREEMENT FILE | |
* LOCATED IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE. | |
* | |
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> | |
****************************************************************************** | |
*/ | |
/*!< Define to prevent recursive inclusion -------------------------------------*/ | |
#ifndef __STM32F0XX_SYSCFG_H | |
#define __STM32F0XX_SYSCFG_H | |
#ifdef __cplusplus | |
extern "C" { | |
#endif | |
/*!< Includes ------------------------------------------------------------------*/ | |
#include "stm32f0xx.h" | |
/** @addtogroup STM32F0xx_StdPeriph_Driver | |
* @{ | |
*/ | |
/** @addtogroup SYSCFG | |
* @{ | |
*/ | |
/* Exported types ------------------------------------------------------------*/ | |
/* Exported constants --------------------------------------------------------*/ | |
/** @defgroup SYSCFG_Exported_Constants | |
* @{ | |
*/ | |
/** @defgroup EXTI_Port_Sources | |
* @{ | |
*/ | |
#define EXTI_PortSourceGPIOA ((uint8_t)0x00) | |
#define EXTI_PortSourceGPIOB ((uint8_t)0x01) | |
#define EXTI_PortSourceGPIOC ((uint8_t)0x02) | |
#define EXTI_PortSourceGPIOD ((uint8_t)0x03) | |
#define EXTI_PortSourceGPIOF ((uint8_t)0x05) | |
#define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \ | |
((PORTSOURCE) == EXTI_PortSourceGPIOB) || \ | |
((PORTSOURCE) == EXTI_PortSourceGPIOC) || \ | |
((PORTSOURCE) == EXTI_PortSourceGPIOD) || \ | |
((PORTSOURCE) == EXTI_PortSourceGPIOF)) | |
/** | |
* @} | |
*/ | |
/** @defgroup EXTI_Pin_sources | |
* @{ | |
*/ | |
#define EXTI_PinSource0 ((uint8_t)0x00) | |
#define EXTI_PinSource1 ((uint8_t)0x01) | |
#define EXTI_PinSource2 ((uint8_t)0x02) | |
#define EXTI_PinSource3 ((uint8_t)0x03) | |
#define EXTI_PinSource4 ((uint8_t)0x04) | |
#define EXTI_PinSource5 ((uint8_t)0x05) | |
#define EXTI_PinSource6 ((uint8_t)0x06) | |
#define EXTI_PinSource7 ((uint8_t)0x07) | |
#define EXTI_PinSource8 ((uint8_t)0x08) | |
#define EXTI_PinSource9 ((uint8_t)0x09) | |
#define EXTI_PinSource10 ((uint8_t)0x0A) | |
#define EXTI_PinSource11 ((uint8_t)0x0B) | |
#define EXTI_PinSource12 ((uint8_t)0x0C) | |
#define EXTI_PinSource13 ((uint8_t)0x0D) | |
#define EXTI_PinSource14 ((uint8_t)0x0E) | |
#define EXTI_PinSource15 ((uint8_t)0x0F) | |
#define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \ | |
((PINSOURCE) == EXTI_PinSource1) || \ | |
((PINSOURCE) == EXTI_PinSource2) || \ | |
((PINSOURCE) == EXTI_PinSource3) || \ | |
((PINSOURCE) == EXTI_PinSource4) || \ | |
((PINSOURCE) == EXTI_PinSource5) || \ | |
((PINSOURCE) == EXTI_PinSource6) || \ | |
((PINSOURCE) == EXTI_PinSource7) || \ | |
((PINSOURCE) == EXTI_PinSource8) || \ | |
((PINSOURCE) == EXTI_PinSource9) || \ | |
((PINSOURCE) == EXTI_PinSource10) || \ | |
((PINSOURCE) == EXTI_PinSource11) || \ | |
((PINSOURCE) == EXTI_PinSource12) || \ | |
((PINSOURCE) == EXTI_PinSource13) || \ | |
((PINSOURCE) == EXTI_PinSource14) || \ | |
((PINSOURCE) == EXTI_PinSource15)) | |
/** | |
* @} | |
*/ | |
/** @defgroup SYSCFG_Memory_Remap_Config | |
* @{ | |
*/ | |
#define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00) | |
#define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01) | |
#define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03) | |
#define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ | |
((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \ | |
((REMAP) == SYSCFG_MemoryRemap_SRAM)) | |
/** | |
* @} | |
*/ | |
/** @defgroup SYSCFG_DMA_Remap_Config | |
* @{ | |
*/ | |
#define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /* Remap TIM17 DMA requests from channel1 to channel2 */ | |
#define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /* Remap TIM16 DMA requests from channel3 to channel4 */ | |
#define SYSCFG_DMARemap_USART1Rx SYSCFG_CFGR1_USART1RX_DMA_RMP /* Remap USART1 Rx DMA requests from channel3 to channel5 */ | |
#define SYSCFG_DMARemap_USART1Tx SYSCFG_CFGR1_USART1TX_DMA_RMP /* Remap USART1 Tx DMA requests from channel2 to channel4 */ | |
#define SYSCFG_DMARemap_ADC1 SYSCFG_CFGR1_ADC_DMA_RMP /* Remap ADC1 DMA requests from channel1 to channel2 */ | |
#define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \ | |
((REMAP) == SYSCFG_DMARemap_TIM16) || \ | |
((REMAP) == SYSCFG_DMARemap_USART1Rx) || \ | |
((REMAP) == SYSCFG_DMARemap_USART1Tx) || \ | |
((REMAP) == SYSCFG_DMARemap_ADC1)) | |
/** | |
* @} | |
*/ | |
/** @defgroup SYSCFG_I2C_FastModePlus_Config | |
* @{ | |
*/ | |
#define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /* Enable Fast Mode Plus on PB6 */ | |
#define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /* Enable Fast Mode Plus on PB7 */ | |
#define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /* Enable Fast Mode Plus on PB8 */ | |
#define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /* Enable Fast Mode Plus on PB9 */ | |
#define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \ | |
((PIN) == SYSCFG_I2CFastModePlus_PB7) || \ | |
((PIN) == SYSCFG_I2CFastModePlus_PB8) || \ | |
((PIN) == SYSCFG_I2CFastModePlus_PB9)) | |
/** | |
* @} | |
*/ | |
/** @defgroup SYSCFG_Lock_Config | |
* @{ | |
*/ | |
#define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Connects the PVD event to the Break Input of TIM1 */ | |
#define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK /*!< Connects the SRAM_PARITY error signal to the Break Input of TIM1 */ | |
#define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK /*!< Connects Lockup output of CortexM0 to the break input of TIM1 */ | |
#define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \ | |
((CONFIG) == SYSCFG_Break_SRAMParity) || \ | |
((CONFIG) == SYSCFG_Break_Lockup)) | |
/** | |
* @} | |
*/ | |
/** @defgroup SYSCFG_flags_definition | |
* @{ | |
*/ | |
#define SYSCFG_FLAG_PE SYSCFG_CFGR2_SRAM_PE | |
#define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE)) | |
/** | |
* @} | |
*/ | |
/** | |
* @} | |
*/ | |
/* Exported macro ------------------------------------------------------------*/ | |
/* Exported functions ------------------------------------------------------- */ | |
/* Function used to set the SYSCFG configuration to the default reset state **/ | |
void SYSCFG_DeInit(void); | |
/* SYSCFG configuration functions *********************************************/ | |
void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap); | |
void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState); | |
void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState); | |
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex); | |
void SYSCFG_BreakConfig(uint32_t SYSCFG_Break); | |
FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag); | |
void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag); | |
#ifdef __cplusplus | |
} | |
#endif | |
#endif /*__STM32F0XX_SYSCFG_H */ | |
/** | |
* @} | |
*/ | |
/** | |
* @} | |
*/ | |
/******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE****/ |