/** | |
* \file | |
* | |
* Copyright (c) 2012 Atmel Corporation. All rights reserved. | |
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* \page License | |
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* Redistribution and use in source and binary forms, with or without | |
* modification, are permitted provided that the following conditions are met: | |
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* 1. Redistributions of source code must retain the above copyright notice, | |
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* 2. Redistributions in binary form must reproduce the above copyright notice, | |
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* 3. The name of Atmel may not be used to endorse or promote products derived | |
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* 4. This software may only be redistributed and used in connection with an | |
* Atmel microcontroller product. | |
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*/ | |
#ifndef _SAM3XA_EFC0_INSTANCE_ | |
#define _SAM3XA_EFC0_INSTANCE_ | |
/* ========== Register definition for EFC0 peripheral ========== */ | |
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) | |
#define REG_EFC0_FMR (0x400E0A00U) /**< \brief (EFC0) EEFC Flash Mode Register */ | |
#define REG_EFC0_FCR (0x400E0A04U) /**< \brief (EFC0) EEFC Flash Command Register */ | |
#define REG_EFC0_FSR (0x400E0A08U) /**< \brief (EFC0) EEFC Flash Status Register */ | |
#define REG_EFC0_FRR (0x400E0A0CU) /**< \brief (EFC0) EEFC Flash Result Register */ | |
#else | |
#define REG_EFC0_FMR (*(RwReg*)0x400E0A00U) /**< \brief (EFC0) EEFC Flash Mode Register */ | |
#define REG_EFC0_FCR (*(WoReg*)0x400E0A04U) /**< \brief (EFC0) EEFC Flash Command Register */ | |
#define REG_EFC0_FSR (*(RoReg*)0x400E0A08U) /**< \brief (EFC0) EEFC Flash Status Register */ | |
#define REG_EFC0_FRR (*(RoReg*)0x400E0A0CU) /**< \brief (EFC0) EEFC Flash Result Register */ | |
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ | |
#endif /* _SAM3XA_EFC0_INSTANCE_ */ |