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| * |
| * Copyright (C) 2013 - 2015 Xilinx, Inc. All rights reserved. |
| * |
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| * |
| * Use of the Software is limited solely to applications: |
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| /*****************************************************************************/ |
| /** |
| * |
| * @file xil_errata.h |
| * |
| * This header file contains Cortex A9 and PL310 Errata definitions. |
| * |
| * |
| * <pre> |
| * MODIFICATION HISTORY: |
| * |
| * Ver Who Date Changes |
| * ----- ---- -------- ----------------------------------------------- |
| * 1.00a srt 04/18/13 First release |
| * </pre> |
| * |
| ******************************************************************************/ |
| #ifndef XIL_ERRATA_H |
| #define XIL_ERRATA_H |
| |
| #define ENABLE_ARM_ERRATA 1 |
| |
| #ifdef ENABLE_ARM_ERRATA |
| /* Cortex A9 ARM Errata */ |
| |
| /* |
| * Errata No: 742230 |
| * Description: DMB operation may be faulty |
| */ |
| #define CONFIG_ARM_ERRATA_742230 1 |
| |
| /* |
| * Errata No: 743622 |
| * Description: Faulty hazard checking in the Store Buffer may lead |
| * to data corruption. |
| */ |
| #define CONFIG_ARM_ERRATA_743622 1 |
| |
| /* |
| * Errata No: 775420 |
| * Description: A data cache maintenance operation which aborts, |
| * might lead to deadlock |
| */ |
| #define CONFIG_ARM_ERRATA_775420 1 |
| |
| /* |
| * Errata No: 794073 |
| * Description: Speculative instruction fetches with MMU disabled |
| * might not comply with architectural requirements |
| */ |
| #define CONFIG_ARM_ERRATA_794073 1 |
| |
| |
| /* PL310 L2 Cache Errata */ |
| |
| /* |
| * Errata No: 588369 |
| * Description: Clean & Invalidate maintenance operations do not |
| * invalidate clean lines |
| */ |
| #define CONFIG_PL310_ERRATA_588369 1 |
| |
| /* |
| * Errata No: 727915 |
| * Description: Background Clean and Invalidate by Way operation |
| * can cause data corruption |
| */ |
| #define CONFIG_PL310_ERRATA_727915 1 |
| |
| /* |
| * Errata No: 753970 |
| * Description: Cache sync operation may be faulty |
| */ |
| #define CONFIG_PL310_ERRATA_753970 1 |
| |
| #endif /* ENABLE_ARM_ERRATA */ |
| |
| #endif /* XIL_ERRATA_H */ |