FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/AtmelFiles/libboard_sama5d4x-ek/resources/ewarm/sama5d4x/ddram.icf

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_DDRAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_DDRAM_end__   = 0x23FFFFFF;
define symbol __ICFEDIT_region_RAM_start__   = 0x200000;
define symbol __ICFEDIT_region_RAM_end__     = 0x21FFFF;
define symbol __ICFEDIT_region_DDRAM_BUF_start__ = 0x24000000;
define symbol __ICFEDIT_region_DDRAM_BUF_end__   = 0x24FFFFFF;

/*-Sizes-*/
define symbol __ICFEDIT_size_startup__  = 0x200;
define symbol __ICFEDIT_size_vectors__  = 0x100;
define symbol __ICFEDIT_size_cstack__   = 0x4000;
define symbol __ICFEDIT_size_irqstack__ = 0x60;
define symbol __ICFEDIT_size_fiqstack__ = 0x60;
define symbol __ICFEDIT_size_abtstack__ = 0x60;
define symbol __ICFEDIT_size_undstack__ = 0x40;

define symbol __ICFEDIT_size_heap__     = 0x60;
/*-Exports-*/
export symbol __ICFEDIT_region_DDRAM_start__;
export symbol __ICFEDIT_region_DDRAM_end__;
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
export symbol __ICFEDIT_size_startup__;
export symbol __ICFEDIT_size_vectors__;
export symbol __ICFEDIT_size_cstack__;
export symbol __ICFEDIT_size_irqstack__;
export symbol __ICFEDIT_size_fiqstack__;
export symbol __ICFEDIT_size_heap__;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region STA_region =   mem:[from __ICFEDIT_region_DDRAM_start__ size __ICFEDIT_size_startup__];
define region STACK_region  = mem:[from __ICFEDIT_region_DDRAM_start__+__ICFEDIT_size_startup__ size __ICFEDIT_size_startup__+__ICFEDIT_size_cstack__+__ICFEDIT_size_irqstack__+__ICFEDIT_size_fiqstack__+__ICFEDIT_size_heap__];
define region DDRAM_region = mem:[from __ICFEDIT_region_DDRAM_start__+__ICFEDIT_size_startup__+__ICFEDIT_size_cstack__+__ICFEDIT_size_irqstack__+__ICFEDIT_size_fiqstack__+__ICFEDIT_size_heap__ to __ICFEDIT_region_DDRAM_end__];
define region VEC_region =   mem:[from __ICFEDIT_region_RAM_start__ size __ICFEDIT_size_vectors__];
define region RAM_region =   mem:[from __ICFEDIT_region_RAM_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM_end__];
define region DMA_BUF_region = mem:[from __ICFEDIT_region_DDRAM_BUF_start__ to __ICFEDIT_region_DDRAM_BUF_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

initialize by copy { section .vectors };
do not initialize  { section .noinit };

place in STA_region { section .cstartup };
place in VEC_region { section .vectors };
place in DDRAM_region { readonly };
place in DDRAM_region { readwrite };
place in DDRAM_region { zeroinit };
place in STACK_region { block IRQ_STACK,  block FIQ_STACK, block ABT_STACK, block UND_STACK, block CSTACK, block HEAP };
place in DMA_BUF_region {section region_dma_nocache };