| /****************************************************************************** |
| * Filename: watchdog_doc.h |
| * Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016) |
| * Revision: 45971 |
| * |
| * Copyright (c) 2015 - 2016, Texas Instruments Incorporated |
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| ******************************************************************************/ |
| //! \addtogroup wdt_api |
| //! @{ |
| //! \section sec_wdt Introduction |
| //! |
| //! The watchdog timer (WDT) is used to regain control when the system has failed due to unexpected |
| //! software behavior. The WDT can generate a non-maskable interrupt (NMI), a regular interrupt, or a |
| //! reset if the software fails to reload the watchdog before it times out. |
| //! |
| //! WDT has the following features: |
| //! - 32-bit down counter with a programmable load register. |
| //! - Programmable interrupt generation logic with interrupt masking and optional NMI function. |
| //! - Optional reset generation. |
| //! - Register protection from runaway software (lock). |
| //! - User-enabled stalling when the system CPU asserts the CPU Halt flag during debug. |
| //! |
| //! After the first time-out event, the 32-bit counter is re-loaded with the value of the Load register, |
| //! and the timer resumes counting down from that value. |
| //! If the timer counts down to its zero state again before the first time-out interrupt is cleared, |
| //! and the reset signal has been enabled, the WDT asserts its reset signal to the system. If the interrupt |
| //! is cleared before the 32-bit counter reaches its second time-out, the 32-bit counter is loaded with the |
| //! value in the Load register, and counting resumes from that value. |
| //! |
| //! If Load register is written with a new value while the WDT counter is counting, then the counter is |
| //! loaded with the new value and continues counting. |
| //! Writing to the Load register does not clear an active interrupt. An interrupt must be explicitly cleared |
| //! by clearing the interrupt. |
| //! |
| //! The WDT counter runs at system HF clock divided by 32; however, when in powerdown it runs at |
| //! LF clock (32 kHz) - if the LF clock to the MCU domain has been enabled. |
| //! |
| //! \section sec_wdt_api API |
| //! |
| //! The API functions can be grouped like this: |
| //! |
| //! Watchdog configuration: |
| //! - \ref WatchdogIntTypeSet() |
| //! - \ref WatchdogResetEnable() |
| //! - \ref WatchdogResetDisable() |
| //! - \ref WatchdogReloadSet() |
| //! - \ref WatchdogEnable() |
| //! |
| //! Status: |
| //! - \ref WatchdogRunning() |
| //! - \ref WatchdogValueGet() |
| //! - \ref WatchdogReloadGet() |
| //! - \ref WatchdogIntStatus() |
| //! |
| //! Interrupt configuration: |
| //! - \ref WatchdogIntEnable() |
| //! - \ref WatchdogIntClear() |
| //! - \ref WatchdogIntRegister() |
| //! - \ref WatchdogIntUnregister() |
| //! |
| //! Register protection: |
| //! - \ref WatchdogLock() |
| //! - \ref WatchdogLockState() |
| //! - \ref WatchdogUnlock() |
| //! |
| //! Stall configuration for debugging: |
| //! - \ref WatchdogStallDisable() |
| //! - \ref WatchdogStallEnable() |
| //! |
| //! @} |