| /* |
| * Copyright (C) 2014 Freescale Semiconductor, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| / { |
| memory { |
| reg = <0x80000000 0x40000000>; |
| }; |
| |
| battery: max8903@0 { |
| compatible = "fsl,max8903-charger"; |
| pinctrl-names = "default"; |
| dok_input = <&gpio4 13 1>; |
| uok_input = <&gpio4 13 1>; |
| chg_input = <&gpio4 15 1>; |
| flt_input = <&gpio4 14 1>; |
| fsl,dcm_always_high; |
| fsl,dc_valid; |
| fsl,adc_disable; |
| status = "okay"; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| |
| reg_lcd_3v3: lcd-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "lcd-3v3"; |
| gpio = <&gpio4 3 0>; |
| enable-active-high; |
| }; |
| |
| reg_aud3v: wm8962_supply_3v15 { |
| compatible = "regulator-fixed"; |
| regulator-name = "wm8962-supply-3v15"; |
| regulator-min-microvolt = <3150000>; |
| regulator-max-microvolt = <3150000>; |
| regulator-boot-on; |
| }; |
| |
| reg_aud4v: wm8962_supply_4v2 { |
| compatible = "regulator-fixed"; |
| regulator-name = "wm8962-supply-4v2"; |
| regulator-min-microvolt = <4325000>; |
| regulator-max-microvolt = <4325000>; |
| regulator-boot-on; |
| }; |
| |
| reg_usb_otg1_vbus: usb_otg1_vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg1_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio4 0 0>; |
| enable-active-high; |
| }; |
| |
| reg_usb_otg2_vbus: usb_otg2_vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg2_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio4 2 0>; |
| enable-active-high; |
| }; |
| }; |
| |
| backlight { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm1 0 5000000>; |
| brightness-levels = <0 4 8 16 32 64 128 255>; |
| default-brightness-level = <6>; |
| }; |
| |
| csi_v4l2_cap { |
| compatible = "fsl,imx6sl-csi-v4l2"; |
| csi_id = <0>; |
| status = "disabled"; |
| }; |
| |
| pxp_v4l2_out { |
| compatible = "fsl,imx6sl-pxp-v4l2"; |
| status = "okay"; |
| }; |
| |
| sound { |
| compatible = "fsl,imx6q-sabresd-wm8962", |
| "fsl,imx-audio-wm8962"; |
| model = "wm8962-audio"; |
| cpu-dai = <&ssi2>; |
| audio-codec = <&codec>; |
| audio-routing = |
| "Headphone Jack", "HPOUTL", |
| "Headphone Jack", "HPOUTR", |
| "Ext Spk", "SPKOUTL", |
| "Ext Spk", "SPKOUTR", |
| "AMIC", "MICBIAS", |
| "IN3R", "AMIC"; |
| amic-mono; |
| mux-int-port = <2>; |
| mux-ext-port = <3>; |
| hp-det-gpios = <&gpio4 19 1>; |
| }; |
| |
| sound-spdif { |
| compatible = "fsl,imx-audio-spdif", |
| "fsl,imx6sl-evk-spdif"; |
| model = "imx-spdif"; |
| spdif-controller = <&spdif>; |
| spdif-out; |
| }; |
| |
| sii902x_reset: sii902x-reset { |
| compatible = "gpio-reset"; |
| reset-gpios = <&gpio2 19 1>; |
| reset-delay-us = <100000>; |
| #reset-cells = <0>; |
| }; |
| }; |
| |
| &audmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_audmux_1>; |
| status = "okay"; |
| }; |
| |
| &csi1 { |
| status = "disabled"; |
| }; |
| |
| &ecspi1 { |
| fsl,spi-num-chipselects = <1>; |
| cs-gpios = <&gpio4 11 0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi1_1>; |
| status = "okay"; |
| |
| flash: m25p80@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "st,m25p32"; |
| spi-max-frequency = <20000000>; |
| reg = <0>; |
| }; |
| }; |
| |
| &epdc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_epdc_0>; |
| V3P3-supply = <&V3P3_reg>; |
| VCOM-supply = <&VCOM_reg>; |
| DISPLAY-supply = <&DISPLAY_reg>; |
| status = "okay"; |
| }; |
| |
| &cpu0 { |
| arm-supply = <&sw1a_reg>; |
| soc-supply = <&sw1c_reg>; |
| pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */ |
| }; |
| |
| &fec { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&pinctrl_fec_1>; |
| pinctrl-1 = <&pinctrl_fec_1_sleep>; |
| phy-mode = "rmii"; |
| phy-reset-gpios = <&gpio4 21 0>; /* GPIO4_21 */ |
| phy-reset-duration = <1>; |
| status = "okay"; |
| }; |
| |
| &gpc { |
| fsl,cpu_pupscr_sw2iso = <0xf>; |
| fsl,cpu_pupscr_sw = <0xf>; |
| fsl,cpu_pdnscr_iso2sw = <0x1>; |
| fsl,cpu_pdnscr_iso = <0x1>; |
| fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ |
| fsl,wdog-reset = <1>; /* watchdog select of reset source */ |
| pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ |
| }; |
| |
| &gpu { |
| pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ |
| }; |
| |
| &i2c1 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1_1>; |
| status = "okay"; |
| |
| elan@10 { |
| compatible = "elan,elan-touch"; |
| reg = <0x10>; |
| interrupt-parent = <&gpio2>; |
| interrupts = <10 2>; |
| gpio_elan_cs = <&gpio2 9 0>; |
| gpio_elan_rst = <&gpio4 4 0>; |
| gpio_intr = <&gpio2 10 0>; |
| status = "okay"; |
| }; |
| |
| max17135@48 { |
| compatible = "maxim,max17135"; |
| reg = <0x48>; |
| vneg_pwrup = <1>; |
| gvee_pwrup = <2>; |
| vpos_pwrup = <10>; |
| gvdd_pwrup = <12>; |
| gvdd_pwrdn = <1>; |
| vpos_pwrdn = <2>; |
| gvee_pwrdn = <8>; |
| vneg_pwrdn = <10>; |
| gpio_pmic_pwrgood = <&gpio2 13 0>; |
| gpio_pmic_vcom_ctrl = <&gpio2 3 0>; |
| gpio_pmic_wakeup = <&gpio2 14 0>; |
| gpio_pmic_v3p3 = <&gpio2 7 0>; |
| gpio_pmic_intr = <&gpio2 12 0>; |
| |
| regulators { |
| DISPLAY_reg: DISPLAY { |
| regulator-name = "DISPLAY"; |
| }; |
| |
| GVDD_reg: GVDD { |
| /* 20v */ |
| regulator-name = "GVDD"; |
| }; |
| |
| GVEE_reg: GVEE { |
| /* -22v */ |
| regulator-name = "GVEE"; |
| }; |
| |
| HVINN_reg: HVINN { |
| /* -22v */ |
| regulator-name = "HVINN"; |
| }; |
| |
| HVINP_reg: HVINP { |
| /* 20v */ |
| regulator-name = "HVINP"; |
| }; |
| |
| VCOM_reg: VCOM { |
| regulator-name = "VCOM"; |
| /* 2's-compliment, -4325000 */ |
| regulator-min-microvolt = <0xffbe0178>; |
| /* 2's-compliment, -500000 */ |
| regulator-max-microvolt = <0xfff85ee0>; |
| }; |
| |
| VNEG_reg: VNEG { |
| /* -15v */ |
| regulator-name = "VNEG"; |
| }; |
| |
| VPOS_reg: VPOS { |
| /* 15v */ |
| regulator-name = "VPOS"; |
| }; |
| |
| V3P3_reg: V3P3 { |
| regulator-name = "V3P3"; |
| }; |
| }; |
| }; |
| |
| mma8450@1c { |
| compatible = "fsl,mma8450"; |
| reg = <0x1c>; |
| }; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2_1>; |
| status = "okay"; |
| |
| codec: wm8962@1a { |
| compatible = "wlf,wm8962"; |
| reg = <0x1a>; |
| clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>; |
| DCVDD-supply = <&vgen3_reg>; |
| DBVDD-supply = <®_aud3v>; |
| AVDD-supply = <&vgen3_reg>; |
| CPVDD-supply = <&vgen3_reg>; |
| MICVDD-supply = <®_aud3v>; |
| PLLVDD-supply = <&vgen3_reg>; |
| SPKVDD1-supply = <®_aud4v>; |
| SPKVDD2-supply = <®_aud4v>; |
| amic-mono; |
| }; |
| |
| sii902x@39 { |
| compatible = "SiI,sii902x"; |
| interrupt-parent = <&gpio2>; |
| interrupts = <10 2>; |
| mode_str ="1280x720M@60"; |
| bits-per-pixel = <32>; |
| resets = <&sii902x_reset>; |
| reg = <0x39>; |
| }; |
| }; |
| |
| &i2c3 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3_1>; |
| status = "disabled"; |
| |
| ov564x: ov564x@3c { |
| compatible = "ovti,ov564x"; |
| reg = <0x3c>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_csi_0>; |
| clocks = <&clks IMX6SL_CLK_CSI>; |
| clock-names = "csi_mclk"; |
| AVDD-supply = <&vgen6_reg>; /* 2.8v */ |
| DVDD-supply = <&vgen2_reg>; /* 1.5v*/ |
| pwn-gpios = <&gpio1 25 1>; |
| rst-gpios = <&gpio1 26 0>; |
| csi_id = <0>; |
| mclk = <24000000>; |
| mclk_source = <0>; |
| }; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&pinctrl_hog>; |
| pinctrl-1 = <&pinctrl_hog_sleep>; |
| |
| hog { |
| pinctrl_hog: hoggrp { |
| fsl,pins = < |
| MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059 |
| MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059 |
| MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059 |
| MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059 |
| MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 |
| MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x80000000 |
| MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x110b0 |
| MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x80000000 |
| MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x80000000 |
| MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x80000000 |
| MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x80000000 |
| MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x80000000 |
| MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x17000 |
| MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x80000000 |
| MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x110b0 |
| MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x17000 |
| MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x17000 |
| MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15 0x17000 |
| MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b0b0 |
| MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x1b0b0 |
| MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000 |
| MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000 |
| >; |
| }; |
| |
| pinctrl_hog_sleep: hoggrp_sleep { |
| fsl,pins = < |
| MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x3080 |
| MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x3080 |
| MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x3080 |
| >; |
| }; |
| }; |
| }; |
| |
| &kpp { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&pinctrl_kpp_1>; |
| pinctrl-1 = <&pinctrl_kpp_1_sleep>; |
| linux,keymap = < |
| 0x00000067 /* KEY_UP */ |
| 0x0001006c /* KEY_DOWN */ |
| 0x0002001c /* KEY_ENTER */ |
| 0x01000066 /* KEY_HOME */ |
| 0x0101006a /* KEY_RIGHT */ |
| 0x01020069 /* KEY_LEFT */ |
| 0x02000072 /* KEY_VOLUMEDOWN */ |
| 0x02010073 /* KEY_VOLUMEUP */ |
| >; |
| status = "okay"; |
| }; |
| |
| &lcdif { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_lcdif_dat_0 |
| &pinctrl_lcdif_ctrl_0>; |
| lcd-supply = <®_lcd_3v3>; |
| display = <&display>; |
| status = "okay"; |
| |
| display: display { |
| bits-per-pixel = <16>; |
| bus-width = <24>; |
| |
| display-timings { |
| native-mode = <&timing0>; |
| timing0: timing0 { |
| clock-frequency = <33500000>; |
| hactive = <800>; |
| vactive = <480>; |
| hback-porch = <89>; |
| hfront-porch = <164>; |
| vback-porch = <23>; |
| vfront-porch = <10>; |
| hsync-len = <10>; |
| vsync-len = <10>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <1>; |
| pixelclk-active = <0>; |
| }; |
| }; |
| }; |
| }; |
| |
| &pwm1 { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&pinctrl_pwm1_0>; |
| pinctrl-1 = <&pinctrl_pwm1_0_sleep>; |
| status = "okay"; |
| }; |
| |
| &pxp { |
| status = "okay"; |
| }; |
| |
| &spdif { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spdif_1>; |
| status = "okay"; |
| }; |
| |
| &ssi2 { |
| fsl,mode = "i2s-slave"; |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1_1>; |
| status = "okay"; |
| }; |
| |
| &usbotg1 { |
| vbus-supply = <®_usb_otg1_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg1_1>; |
| disable-over-current; |
| imx6-usb-charger-detection; |
| status = "okay"; |
| }; |
| |
| &usbotg2 { |
| vbus-supply = <®_usb_otg2_vbus>; |
| dr_mode = "host"; |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &usdhc1 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc1_1>; |
| pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>; |
| bus-width = <8>; |
| cd-gpios = <&gpio4 7 0>; |
| wp-gpios = <&gpio4 6 0>; |
| keep-power-in-suspend; |
| enable-sdio-wakeup; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc2_1>; |
| pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>; |
| cd-gpios = <&gpio5 0 0>; |
| wp-gpios = <&gpio4 29 0>; |
| keep-power-in-suspend; |
| enable-sdio-wakeup; |
| status = "okay"; |
| }; |
| |
| &usdhc3 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc3_1>; |
| pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>; |
| cd-gpios = <&gpio3 22 0>; |
| keep-power-in-suspend; |
| enable-sdio-wakeup; |
| status = "okay"; |
| }; |
