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* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
Required properties:
- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
The compatible <chip> indicated will be the first SoC to support an
additional mode or an USART new feature.
For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt
- clock-names: tuple listing input clock names.
Required elements: "usart"
- clocks: phandles to input clocks.
Optional properties:
- atmel,use-dma-rx: use of PDC or DMA for receiving data
- atmel,use-dma-tx: use of PDC or DMA for transmitting data
- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
It will use specified PIO instead of the peripheral function pin for the USART feature.
If unsure, don't specify this property.
- add dma bindings for dma transfer:
- dmas: DMA specifier, consisting of a phandle to DMA controller node,
memory peripheral interface and USART DMA channel ID, FIFO configuration.
Refer to dma.txt and atmel-dma.txt for details.
- dma-names: "rx" for RX channel, "tx" for TX channel.
<chip> compatible description:
- at91rm9200: legacy USART support
- at91sam9260: generic USART implementation for SAM9 SoCs
- use PDC:
usart0: serial@fff8c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff8c000 0x4000>;
interrupts = <7>;
clocks = <&usart0_clk>;
clock-names = "usart";
rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
- use DMA:
usart0: serial@f001c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf001c000 0x100>;
interrupts = <12 4 5>;
clocks = <&usart0_clk>;
clock-names = "usart";
dmas = <&dma0 2 0x3>,
<&dma0 2 0x204>;
dma-names = "tx", "rx";